bt459reg.h revision 1.3 1 1.3 perry /* $NetBSD: bt459reg.h,v 1.3 2005/02/27 00:27:01 perry Exp $ */
2 1.1 nisimura
3 1.3 perry /*
4 1.1 nisimura * Mach Operating System
5 1.1 nisimura * Copyright (c) 1991,1990,1989 Carnegie Mellon University
6 1.1 nisimura * All Rights Reserved.
7 1.3 perry *
8 1.1 nisimura * Permission to use, copy, modify and distribute this software and its
9 1.1 nisimura * documentation is hereby granted, provided that both the copyright
10 1.1 nisimura * notice and this permission notice appear in all copies of the
11 1.1 nisimura * software, derivative works or modified versions, and any portions
12 1.1 nisimura * thereof, and that both notices appear in supporting documentation.
13 1.3 perry *
14 1.1 nisimura * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
15 1.1 nisimura * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
16 1.1 nisimura * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17 1.3 perry *
18 1.1 nisimura * Carnegie Mellon requests users of this software to return to
19 1.3 perry *
20 1.1 nisimura * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
21 1.1 nisimura * School of Computer Science
22 1.1 nisimura * Carnegie Mellon University
23 1.1 nisimura * Pittsburgh PA 15213-3890
24 1.3 perry *
25 1.1 nisimura * any improvements or extensions that they make and grant Carnegie Mellon
26 1.1 nisimura * the rights to redistribute these changes.
27 1.1 nisimura */
28 1.1 nisimura
29 1.1 nisimura /*
30 1.1 nisimura * Register definitions for the Brooktree Bt459 135 MHz Monolithic
31 1.1 nisimura * CMOS 256x64 Color Palette RAMDAC.
32 1.1 nisimura */
33 1.1 nisimura
34 1.2 ad /*
35 1.2 ad * Directly-accessible registers. Note the address register is
36 1.2 ad * auto-incrementing.
37 1.2 ad */
38 1.2 ad #define BT459_REG_ADDR_LOW 0x00 /* C1,C0 == 0,0 */
39 1.2 ad #define BT459_REG_ADDR_HIGH 0x01 /* C1,C0 == 0,1 */
40 1.2 ad #define BT459_REG_IREG_DATA 0x02 /* C1,C0 == 1,0 */
41 1.2 ad #define BT459_REG_CMAP_DATA 0x03 /* C1,C0 == 1,1 */
42 1.2 ad
43 1.2 ad #define BT459_REG_MAX BT459_REG_CMAP_DATA
44 1.2 ad
45 1.2 ad /*
46 1.2 ad * All internal register access to the Bt459 is done indirectly via the
47 1.2 ad * Address Register (mapped into the host bus in a device-specific
48 1.2 ad * fashion). The following register definitions are in terms of
49 1.2 ad * their address register address values.
50 1.2 ad */
51 1.2 ad
52 1.2 ad /* 0000-00ff colormap entries */
53 1.2 ad
54 1.2 ad #define BT459_IREG_CCOLOR_1 0x0181 /* Cursor color regs */
55 1.2 ad #define BT459_IREG_CCOLOR_2 0x0182
56 1.2 ad #define BT459_IREG_CCOLOR_3 0x0183
57 1.2 ad #define BT459_IREG_ID 0x0200 /* read-only, gives "4a" */
58 1.2 ad #define BT459_IREG_COMMAND_0 0x0201
59 1.3 perry #define BT459_IREG_COMMAND_1 0x0202
60 1.2 ad #define BT459_IREG_COMMAND_2 0x0203
61 1.2 ad #define BT459_IREG_PRM 0x0204
62 1.2 ad /* 0205 reserved */
63 1.2 ad #define BT459_IREG_PBM 0x0206
64 1.2 ad /* 0207 reserved */
65 1.2 ad #define BT459_IREG_ORM 0x0208
66 1.2 ad #define BT459_IREG_OBM 0x0209
67 1.2 ad #define BT459_IREG_ILV 0x020a
68 1.2 ad #define BT459_IREG_TEST 0x020b
69 1.2 ad #define BT459_IREG_RSIG 0x020c
70 1.2 ad #define BT459_IREG_GSIG 0x020d
71 1.2 ad #define BT459_IREG_BSIG 0x020e
72 1.2 ad /* 020f-02ff reserved */
73 1.2 ad #define BT459_IREG_CCR 0x0300
74 1.2 ad #define BT459_IREG_CURSOR_X_LOW 0x0301
75 1.2 ad #define BT459_IREG_CURSOR_X_HIGH 0x0302
76 1.2 ad #define BT459_IREG_CURSOR_Y_LOW 0x0303
77 1.2 ad #define BT459_IREG_CURSOR_Y_HIGH 0x0304
78 1.2 ad #define BT459_IREG_WXLO 0x0305
79 1.2 ad #define BT459_IREG_WXHI 0x0306
80 1.2 ad #define BT459_IREG_WYLO 0x0307
81 1.2 ad #define BT459_IREG_WYHI 0x0308
82 1.2 ad #define BT459_IREG_WWLO 0x0309
83 1.2 ad #define BT459_IREG_WWHI 0x030a
84 1.2 ad #define BT459_IREG_WHLO 0x030b
85 1.2 ad #define BT459_IREG_WHHI 0x030c
86 1.2 ad /* 030d-03ff reserved */
87 1.2 ad #define BT459_IREG_CRAM_BASE 0x0400
88