1 1.3 christos /* $NetBSD: bt485reg.h,v 1.3 2005/12/11 12:21:26 christos Exp $ */ 2 1.1 drochner 3 1.1 drochner /* 4 1.1 drochner * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 1.1 drochner * All rights reserved. 6 1.1 drochner * 7 1.1 drochner * Author: Chris G. Demetriou 8 1.2 perry * 9 1.1 drochner * Permission to use, copy, modify and distribute this software and 10 1.1 drochner * its documentation is hereby granted, provided that both the copyright 11 1.1 drochner * notice and this permission notice appear in all copies of the 12 1.1 drochner * software, derivative works or modified versions, and any portions 13 1.1 drochner * thereof, and that both notices appear in supporting documentation. 14 1.2 perry * 15 1.2 perry * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 1.2 perry * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 1.1 drochner * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 1.2 perry * 19 1.1 drochner * Carnegie Mellon requests users of this software to return to 20 1.1 drochner * 21 1.1 drochner * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 1.1 drochner * School of Computer Science 23 1.1 drochner * Carnegie Mellon University 24 1.1 drochner * Pittsburgh PA 15213-3890 25 1.1 drochner * 26 1.1 drochner * any improvements or extensions that they make and grant Carnegie the 27 1.1 drochner * rights to redistribute these changes. 28 1.1 drochner */ 29 1.1 drochner 30 1.1 drochner /* 31 1.1 drochner * Register definitions for the Brooktree Bt485A 170MHz Monolithic 32 1.1 drochner * CMOS True-Color RAMDAC. 33 1.1 drochner */ 34 1.1 drochner 35 1.1 drochner 36 1.1 drochner /* 37 1.1 drochner * Directly-addressed registers. 38 1.1 drochner */ 39 1.1 drochner #define BT485_REG_PCRAM_WRADDR 0x00 40 1.1 drochner #define BT485_REG_PALETTE 0x01 41 1.1 drochner #define BT485_REG_PIXMASK 0x02 42 1.1 drochner #define BT485_REG_PCRAM_RDADDR 0x03 43 1.1 drochner #define BT485_REG_COC_WRADDR 0x04 44 1.1 drochner #define BT485_REG_COCDATA 0x05 45 1.1 drochner #define BT485_REG_COMMAND_0 0x06 46 1.1 drochner #define BT485_REG_COC_RDADDR 0x07 47 1.1 drochner #define BT485_REG_COMMAND_1 0x08 48 1.1 drochner #define BT485_REG_COMMAND_2 0x09 49 1.1 drochner #define BT485_REG_STATUS 0x0a 50 1.1 drochner #define BT485_REG_EXTENDED BT485_REG_STATUS 51 1.1 drochner #define BT485_REG_CURSOR_RAM 0x0b 52 1.1 drochner #define BT485_REG_CURSOR_X_LOW 0x0c 53 1.1 drochner #define BT485_REG_CURSOR_X_HIGH 0x0d 54 1.1 drochner #define BT485_REG_CURSOR_Y_LOW 0x0e 55 1.1 drochner #define BT485_REG_CURSOR_Y_HIGH 0x0f 56 1.1 drochner 57 1.1 drochner #define BT485_REG_MAX 0x0f 58 1.1 drochner 59 1.1 drochner #define BT485_IREG_STATUS 0x00 60 1.1 drochner #define BT485_IREG_COMMAND_3 0x01 61 1.1 drochner #define BT485_IREG_COMMAND_4 0x02 62 1.1 drochner #define BT485_IREG_RSA 0x20 63 1.1 drochner #define BT485_IREG_GSA 0x21 64 1.1 drochner #define BT485_IREG_BSA 0x22 65