cd1400reg.h revision 1.1 1 1.1 andrew /*
2 1.1 andrew * cyclades cyclom-y serial driver
3 1.1 andrew * Andrew Herbert <andrew (at) werple.apana.org.au>, 17 August 1993
4 1.1 andrew *
5 1.1 andrew * Copyright (c) 1993 Andrew Herbert.
6 1.1 andrew * All rights reserved.
7 1.1 andrew *
8 1.1 andrew * Redistribution and use in source and binary forms, with or without
9 1.1 andrew * modification, are permitted provided that the following conditions
10 1.1 andrew * are met:
11 1.1 andrew * 1. Redistributions of source code must retain the above copyright
12 1.1 andrew * notice, this list of conditions and the following disclaimer.
13 1.1 andrew * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 andrew * notice, this list of conditions and the following disclaimer in the
15 1.1 andrew * documentation and/or other materials provided with the distribution.
16 1.1 andrew * 3. The name Andrew Herbert may not be used to endorse or promote products
17 1.1 andrew * derived from this software without specific prior written permission.
18 1.1 andrew *
19 1.1 andrew * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 andrew * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 andrew * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 1.1 andrew * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 1.1 andrew * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 1.1 andrew * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 1.1 andrew * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 1.1 andrew * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 1.1 andrew * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 1.1 andrew * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 1.1 andrew */
30 1.1 andrew
31 1.1 andrew #define CD1400_NO_OF_CHANNELS 4 /* four serial channels per chip */
32 1.1 andrew #define CD1400_FIFOSIZE 12 /* 12 chars */
33 1.1 andrew
34 1.1 andrew /* register definitions */
35 1.1 andrew
36 1.1 andrew #define CD1400_CCR 2*0x05 /* channel control */
37 1.1 andrew #define CD1400_CMD_RESET 0x81 /* full reset */
38 1.1 andrew
39 1.1 andrew #define CD1400_SRER 2*0x06 /* service request enable */
40 1.1 andrew
41 1.1 andrew #define CD1400_GFRCR 2*0x40 /* global firmware revision code */
42 1.1 andrew
43 1.1 andrew #define CD1400_LIVR 2*0x18 /* local intr vector */
44 1.1 andrew #define CD1400_MIVR 2*0x41 /* modem intr vector */
45 1.1 andrew #define CD1400_TIVR 2*0x42 /* transmit intr vector */
46 1.1 andrew #define CD1400_RIVR 2*0x43 /* receive intr vector */
47 1.1 andrew #define CD1400_RIVR_EXCEPTION (1<<2) /* receive exception bit */
48 1.1 andrew
49 1.1 andrew #define CD1400_RICR 2*0x44 /* receive intr channel */
50 1.1 andrew #define CD1400_TICR 2*0x45 /* transmit intr channel */
51 1.1 andrew #define CD1400_MICR 2*0x46 /* modem intr channel */
52 1.1 andrew
53 1.1 andrew #define CD1400_RDCR 2*0x0e /* rx data count */
54 1.1 andrew
55 1.1 andrew #define CD1400_EOSRR 2*0x60 /* end of service request */
56 1.1 andrew #define CD1400_RDSR 2*0x62 /* rx data/status */
57 1.1 andrew #define CD1400_RDSR_OVERRUN (1<<0) /* rx overrun error */
58 1.1 andrew #define CD1400_RDSR_FRAMING (1<<1) /* rx framing error */
59 1.1 andrew #define CD1400_RDSR_PARITY (1<<2) /* rx parity error */
60 1.1 andrew #define CD1400_RDSR_BREAK (1<<3) /* rx break */
61 1.1 andrew #define CD1400_RDSR_SPECIAL (7<<4) /* rx special char */
62 1.1 andrew #define CD1400_RDSR_SPECIAL_SHIFT 4 /* rx special char shift */
63 1.1 andrew #define CD1400_RDSR_TIMEOUT (1<<7) /* rx timeout */
64 1.1 andrew
65 1.1 andrew #define CD1400_TDR 2*0x63 /* tx data */
66 1.1 andrew
67 1.1 andrew #define CD1400_MISR 2*0x4c /* modem intr status */
68 1.1 andrew #define CD1400_MISR_DSRd (1<<7) /* DSR delta */
69 1.1 andrew #define CD1400_MISR_CTSd (1<<6) /* CTS delta */
70 1.1 andrew #define CD1400_MISR_RId (1<<5) /* RI delta */
71 1.1 andrew #define CD1400_MISR_CDd (1<<4) /* CD delta */
72 1.1 andrew
73 1.1 andrew #define CD1400_MSVR 2*0x6d /* modem signals */
74 1.1 andrew #define CD1400_MSVR_DSR (1<<7) /* !DSR line */
75 1.1 andrew #define CD1400_MSVR_CTS (1<<6) /* !CTS line */
76 1.1 andrew #define CD1400_MSVR_RI (1<<5) /* !RI line */
77 1.1 andrew #define CD1400_MSVR_CD (1<<4) /* !CD line */
78 1.1 andrew #define CD1400_MSVR_DTR (1<<1) /* DTR line */
79 1.1 andrew
80 1.1 andrew #define CD1400_DTR 2*0x6d /* dtr control */
81 1.1 andrew #define CD1400_DTR_CLEAR 0
82 1.1 andrew #define CD1400_DTR_SET (1<<1)
83 1.1 andrew
84 1.1 andrew #define CD1400_PPR 2*0x7e
85 1.1 andrew #define CD1400_CLOCK_25_1MS 0x31
86 1.1 andrew
87 1.1 andrew #define CD1400_CAR 2*0x68 /* channel access */
88 1.1 andrew
89 1.1 andrew #define CD1400_RIR 2*0x6B /* receive interrupt status */
90 1.1 andrew #define CD1400_TIR 2*0x6A /* transmit interrupt status */
91 1.1 andrew #define CD1400_MIR 2*0x69 /* modem interrupt status */
92 1.1 andrew
93 1.1 andrew #define CD1400_RBPR 2*0x78 /* receive baud rate period */
94 1.1 andrew #define CD1400_RCOR 2*0x7C /* receive clock option */
95 1.1 andrew #define CD1400_TBPR 2*0x72 /* transmit baud rate period */
96 1.1 andrew #define CD1400_TCOR 2*0x76 /* transmit clock option */
97 1.1 andrew
98 1.1 andrew #define CD1400_COR1 2*0x08 /* channel option 1 */
99 1.1 andrew #define CD1400_COR2 2*0x09 /* channel option 2 */
100 1.1 andrew #define CD1400_COR3 2*0x0A /* channel option 3 */
101 1.1 andrew #define CD1400_COR4 2*0x1E /* channel option 4 */
102 1.1 andrew #define CD1400_COR5 2*0x1F /* channel option 5 */
103 1.1 andrew
104 1.1 andrew #define CD1400_SCHR1 2*0x1A /* special character 1 */
105 1.1 andrew #define CD1400_SCHR2 2*0x1B /* special character 2 */
106 1.1 andrew #define CD1400_SCHR3 2*0x1C /* special character 3 */
107 1.1 andrew #define CD1400_SCHR4 2*0x1D /* special character 4 */
108 1.1 andrew
109 1.1 andrew #define CD1400_MCOR1 2*0x15 /* modem change 1 */
110 1.1 andrew #define CD1400_MCOR2 2*0x16 /* modem change 2 */
111 1.1 andrew #define CD1400_RTPR 2*0x21 /* receive timeout period */
112 1.1 andrew
113 1.1 andrew #define CD1400_SVRR 2*0x67 /* service request */
114 1.1 andrew #define CD1400_SVRR_RX (1<<0)
115 1.1 andrew #define CD1400_SVRR_TX (1<<1)
116 1.1 andrew #define CD1400_SVRR_MDM (1<<2)
117 1.1 andrew
118 1.1 andrew /* hardware SVCACK addresses, for use in interrupt handlers */
119 1.1 andrew #define CD1400_SVCACKR 0x100
120 1.1 andrew #define CD1400_SVCACKT 0x200
121 1.1 andrew #define CD1400_SVCACKM 0x300
122