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cd18xx.c revision 1.13.10.2
      1  1.13.10.2      elad /*	$NetBSD: cd18xx.c,v 1.13.10.2 2006/03/10 14:39:01 elad Exp $	*/
      2        1.1       mrg 
      3        1.1       mrg /*
      4        1.1       mrg  * Copyright (c) 1998, 2001 Matthew R. Green
      5        1.1       mrg  * All rights reserved.
      6        1.1       mrg  *
      7        1.1       mrg  * Redistribution and use in source and binary forms, with or without
      8        1.1       mrg  * modification, are permitted provided that the following conditions
      9        1.1       mrg  * are met:
     10        1.1       mrg  * 1. Redistributions of source code must retain the above copyright
     11        1.1       mrg  *    notice, this list of conditions and the following disclaimer.
     12        1.1       mrg  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1       mrg  *    notice, this list of conditions and the following disclaimer in the
     14        1.1       mrg  *    documentation and/or other materials provided with the distribution.
     15        1.1       mrg  * 3. The name of the author may not be used to endorse or promote products
     16        1.1       mrg  *    derived from this software without specific prior written permission.
     17        1.1       mrg  *
     18        1.1       mrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19        1.1       mrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20        1.1       mrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21        1.1       mrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22        1.1       mrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23        1.1       mrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24        1.1       mrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25        1.1       mrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26        1.1       mrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27        1.1       mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28        1.1       mrg  * SUCH DAMAGE.
     29        1.1       mrg  */
     30        1.1       mrg 
     31        1.1       mrg /*-
     32        1.1       mrg  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     33        1.1       mrg  * All rights reserved.
     34        1.1       mrg  *
     35        1.1       mrg  * This code is derived from software contributed to The NetBSD Foundation
     36        1.1       mrg  * by Charles M. Hannum.
     37        1.1       mrg  *
     38        1.1       mrg  * Redistribution and use in source and binary forms, with or without
     39        1.1       mrg  * modification, are permitted provided that the following conditions
     40        1.1       mrg  * are met:
     41        1.1       mrg  * 1. Redistributions of source code must retain the above copyright
     42        1.1       mrg  *    notice, this list of conditions and the following disclaimer.
     43        1.1       mrg  * 2. Redistributions in binary form must reproduce the above copyright
     44        1.1       mrg  *    notice, this list of conditions and the following disclaimer in the
     45        1.1       mrg  *    documentation and/or other materials provided with the distribution.
     46        1.1       mrg  * 3. All advertising materials mentioning features or use of this software
     47        1.1       mrg  *    must display the following acknowledgement:
     48        1.1       mrg  *        This product includes software developed by the NetBSD
     49        1.1       mrg  *        Foundation, Inc. and its contributors.
     50        1.1       mrg  * 4. Neither the name of The NetBSD Foundation nor the names of its
     51        1.1       mrg  *    contributors may be used to endorse or promote products derived
     52        1.1       mrg  *    from this software without specific prior written permission.
     53        1.1       mrg  *
     54        1.1       mrg  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     55        1.1       mrg  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     56        1.1       mrg  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     57        1.1       mrg  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     58        1.1       mrg  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     59        1.1       mrg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     60        1.1       mrg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     61        1.1       mrg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     62        1.1       mrg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     63        1.1       mrg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     64        1.1       mrg  * POSSIBILITY OF SUCH DAMAGE.
     65        1.1       mrg  */
     66        1.1       mrg 
     67        1.1       mrg /*
     68        1.1       mrg  * Copyright (c) 1991 The Regents of the University of California.
     69        1.1       mrg  * All rights reserved.
     70        1.1       mrg  *
     71        1.1       mrg  * Redistribution and use in source and binary forms, with or without
     72        1.1       mrg  * modification, are permitted provided that the following conditions
     73        1.1       mrg  * are met:
     74        1.1       mrg  * 1. Redistributions of source code must retain the above copyright
     75        1.1       mrg  *    notice, this list of conditions and the following disclaimer.
     76        1.1       mrg  * 2. Redistributions in binary form must reproduce the above copyright
     77        1.1       mrg  *    notice, this list of conditions and the following disclaimer in the
     78        1.1       mrg  *    documentation and/or other materials provided with the distribution.
     79        1.9       agc  * 3. Neither the name of the University nor the names of its contributors
     80        1.1       mrg  *    may be used to endorse or promote products derived from this software
     81        1.1       mrg  *    without specific prior written permission.
     82        1.1       mrg  *
     83        1.1       mrg  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     84        1.1       mrg  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     85        1.1       mrg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     86        1.1       mrg  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     87        1.1       mrg  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     88        1.1       mrg  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     89        1.1       mrg  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     90        1.1       mrg  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     91        1.1       mrg  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     92        1.1       mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     93        1.1       mrg  * SUCH DAMAGE.
     94        1.1       mrg  *
     95        1.1       mrg  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     96        1.1       mrg  */
     97        1.1       mrg 
     98        1.1       mrg /*
     99        1.1       mrg  * cirrus logic CL-CD180/CD1864/CD1865 driver, based in (large) parts on
    100        1.1       mrg  * the com and z8530 drivers.  thanks charles.
    101        1.1       mrg  */
    102        1.2     lukem 
    103        1.2     lukem #include <sys/cdefs.h>
    104  1.13.10.2      elad __KERNEL_RCSID(0, "$NetBSD: cd18xx.c,v 1.13.10.2 2006/03/10 14:39:01 elad Exp $");
    105        1.1       mrg 
    106        1.1       mrg #include <sys/param.h>
    107        1.1       mrg #include <sys/conf.h>
    108        1.1       mrg #include <sys/device.h>
    109        1.1       mrg #include <sys/systm.h>
    110        1.1       mrg #include <sys/malloc.h>
    111        1.1       mrg #include <sys/proc.h>
    112        1.1       mrg #include <sys/kernel.h>
    113        1.1       mrg #include <sys/tty.h>
    114        1.1       mrg #include <sys/fcntl.h>
    115  1.13.10.1      elad #include <sys/kauth.h>
    116        1.1       mrg 
    117        1.1       mrg #include <machine/bus.h>
    118        1.1       mrg 
    119        1.1       mrg #include <dev/ic/cd18xxvar.h>
    120        1.1       mrg #include <dev/ic/cd18xxreg.h>
    121        1.1       mrg 
    122        1.1       mrg #include "ioconf.h"
    123        1.1       mrg 
    124        1.1       mrg /*
    125        1.1       mrg  * some helpers
    126        1.1       mrg  */
    127        1.1       mrg 
    128        1.1       mrg /* macros to clear/set/test flags. */
    129        1.1       mrg #define SET(t, f)	(t) |= (f)
    130        1.1       mrg #define CLR(t, f)	(t) &= ~(f)
    131        1.1       mrg #define ISSET(t, f)	((t) & (f))
    132        1.1       mrg 
    133        1.1       mrg static void	cdtty_attach(struct cd18xx_softc *, int);
    134        1.1       mrg 
    135       1.13     perry static inline void cd18xx_rint(struct cd18xx_softc *, int *);
    136       1.13     perry static inline void cd18xx_tint(struct cd18xx_softc *, int *);
    137       1.13     perry static inline void cd18xx_mint(struct cd18xx_softc *, int *);
    138        1.1       mrg 
    139        1.1       mrg void cdtty_rxsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    140        1.1       mrg void cdtty_txsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    141        1.1       mrg void cdtty_stsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    142        1.1       mrg void cd18xx_softintr(void *);
    143        1.1       mrg 
    144        1.4   gehenna dev_type_open(cdttyopen);
    145        1.4   gehenna dev_type_close(cdttyclose);
    146        1.4   gehenna dev_type_read(cdttyread);
    147        1.4   gehenna dev_type_write(cdttywrite);
    148        1.4   gehenna dev_type_ioctl(cdttyioctl);
    149        1.4   gehenna dev_type_stop(cdttystop);
    150        1.4   gehenna dev_type_tty(cdttytty);
    151        1.4   gehenna dev_type_poll(cdttypoll);
    152        1.4   gehenna 
    153        1.4   gehenna const struct cdevsw cdtty_cdevsw = {
    154        1.4   gehenna 	cdttyopen, cdttyclose, cdttyread, cdttywrite, cdttyioctl,
    155        1.5  jdolecek 	cdttystop, cdttytty, cdttypoll, nommap, ttykqfilter, D_TTY
    156        1.4   gehenna };
    157        1.1       mrg 
    158        1.6       mrg static void	cdtty_shutdown(struct cd18xx_softc *, struct cdtty_port *);
    159        1.1       mrg static void	cdttystart(struct tty *);
    160        1.1       mrg static int	cdttyparam(struct tty *, struct termios *);
    161        1.1       mrg static void	cdtty_break(struct cd18xx_softc *, struct cdtty_port *, int);
    162        1.1       mrg static void	cdtty_modem(struct cd18xx_softc *, struct cdtty_port *, int);
    163        1.1       mrg static int	cdttyhwiflow(struct tty *, int);
    164        1.1       mrg static void	cdtty_hwiflow(struct cd18xx_softc *, struct cdtty_port *);
    165        1.1       mrg 
    166        1.1       mrg static void	cdtty_loadchannelregs(struct cd18xx_softc *,
    167        1.1       mrg 					   struct cdtty_port *);
    168        1.1       mrg 
    169        1.1       mrg /* default read buffer size */
    170        1.1       mrg u_int cdtty_rbuf_size = CDTTY_RING_SIZE;
    171        1.1       mrg 
    172        1.1       mrg /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    173        1.1       mrg u_int cdtty_rbuf_hiwat = (CDTTY_RING_SIZE * 1) / 4;
    174        1.1       mrg u_int cdtty_rbuf_lowat = (CDTTY_RING_SIZE * 3) / 4;
    175        1.1       mrg 
    176        1.1       mrg #define CD18XXDEBUG
    177        1.1       mrg #ifdef CD18XXDEBUG
    178        1.1       mrg #define CDD_INFO	0x0001
    179        1.1       mrg #define CDD_INTR	0x0002
    180        1.1       mrg int cd18xx_debug = CDD_INTR|CDD_INFO;
    181        1.1       mrg # define DPRINTF(l, x)	if (cd18xx_debug & l) printf x
    182        1.1       mrg #else
    183        1.1       mrg # define DPRINTF(l, x)	/* nothing */
    184        1.1       mrg #endif
    185        1.1       mrg 
    186        1.1       mrg /* Known supported revisions. */
    187        1.1       mrg struct cd18xx_revs {
    188        1.1       mrg 	u_char	revision;
    189        1.1       mrg 	u_char	onehundred_pin;
    190        1.1       mrg 	char	*name;
    191        1.1       mrg } cd18xx_revs[] = {
    192        1.1       mrg 	{ CD180_GFRCR_REV_B,		0, "CL-CD180 rev. B" },
    193        1.1       mrg 	{ CD180_GFRCR_REV_C,		0, "CL-CD180 rev. C" },
    194        1.1       mrg 	{ CD1864_GFRCR_REVISION_A,	1, "CL-CD1864 rev. A" },
    195        1.1       mrg 	{ CD1865_GFRCR_REVISION_A,	1, "CL-CD1865 rev. A" },
    196        1.1       mrg 	{ CD1865_GFRCR_REVISION_B,	1, "CL-CD1865 rev. B" },
    197        1.1       mrg 	{ CD1865_GFRCR_REVISION_C,	1, "CL-CD1865 rev. C" },
    198        1.1       mrg 	{ 0, 0, 0 }
    199        1.1       mrg };
    200        1.1       mrg 
    201        1.1       mrg /* wait for the CCR to go to zero */
    202       1.13     perry static inline int cd18xx_wait_ccr(struct cd18xx_softc *);
    203       1.13     perry static inline int
    204        1.1       mrg cd18xx_wait_ccr(sc)
    205        1.1       mrg 	struct cd18xx_softc *sc;
    206        1.1       mrg {
    207        1.1       mrg 	int i = 100000;
    208        1.1       mrg 
    209        1.1       mrg 	while (--i &&
    210        1.7       mrg 	    bus_space_read_1(sc->sc_tag, sc->sc_handle, CD18xx_CCR) != 0)
    211        1.7       mrg 		;
    212        1.1       mrg 	return (i == 0);
    213        1.1       mrg }
    214        1.1       mrg 
    215        1.1       mrg /*
    216        1.1       mrg  * device attach routine, high-end portion
    217        1.1       mrg  */
    218       1.10     perry void
    219        1.1       mrg cd18xx_attach(sc)
    220        1.1       mrg 	struct cd18xx_softc *sc;
    221        1.1       mrg {
    222        1.1       mrg 	static int chip_id_next = 1;
    223        1.1       mrg 	int onehundred_pin, revision, i, port;
    224        1.1       mrg 
    225        1.1       mrg 	/* read and print the revision */
    226        1.1       mrg 	revision = cd18xx_read(sc, CD18xx_GFRCR);
    227        1.1       mrg 	onehundred_pin = ISSET(cd18xx_read(sc, CD18xx_SRCR),CD18xx_SRCR_PKGTYP);
    228        1.1       mrg 	for (i = 0; cd18xx_revs[i].name; i++)
    229        1.1       mrg 		if (revision == cd18xx_revs[i].revision ||
    230        1.1       mrg 		    onehundred_pin == cd18xx_revs[i].onehundred_pin) {
    231        1.1       mrg 			printf(": %s", cd18xx_revs[i].name);
    232        1.1       mrg 			break;
    233        1.1       mrg 		}
    234        1.1       mrg 
    235        1.1       mrg 	if (cd18xx_revs[i].name == NULL) {
    236        1.1       mrg 		printf("%s: unknown revision, bailing.\n", sc->sc_dev.dv_xname);
    237        1.1       mrg 		return;
    238        1.1       mrg 	}
    239        1.1       mrg 
    240        1.1       mrg 	/* prepare for reset */
    241        1.1       mrg 	cd18xx_set_car(sc, 0);
    242        1.1       mrg 	cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_CLEAR);
    243        1.1       mrg 
    244        1.1       mrg 	/* wait for CCR to go to zero */
    245        1.1       mrg 	if (cd18xx_wait_ccr(sc)) {
    246        1.1       mrg 		printf("cd18xx_attach: reset change command timed out\n");
    247        1.1       mrg 		return;
    248        1.1       mrg 	}
    249        1.1       mrg 
    250        1.1       mrg 	/* full reset of all channels */
    251       1.10     perry 	cd18xx_write(sc, CD18xx_CCR,
    252        1.1       mrg 	    CD18xx_CCR_RESET|CD18xx_CCR_RESET_HARD);
    253        1.1       mrg 
    254        1.1       mrg 	/* loop until the GSVR is ready */
    255        1.1       mrg 	i = 100000;
    256        1.1       mrg 	while (--i && cd18xx_read(sc, CD18xx_GSVR) == CD18xx_GSVR_READY)
    257        1.1       mrg 		;
    258        1.1       mrg 	if (i == 0) {
    259        1.1       mrg 		printf("\n%s: did not reset!\n", sc->sc_dev.dv_xname);
    260        1.1       mrg 		return;
    261        1.1       mrg 	}
    262        1.1       mrg 
    263        1.1       mrg 	/* write the chip_id */
    264        1.1       mrg 	sc->sc_chip_id = chip_id_next++;
    265        1.1       mrg #ifdef DIAGNOSTIC
    266        1.1       mrg 	if (sc->sc_chip_id > 31)
    267        1.1       mrg 		panic("more than 31 cd18xx's?  help.");
    268        1.1       mrg #endif
    269        1.1       mrg 	cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_SETID(sc));
    270        1.1       mrg 
    271        1.1       mrg 	/* rx/tx/modem service match vectors, initalised by higher level */
    272        1.1       mrg 	cd18xx_write(sc, CD18xx_MSMR, sc->sc_msmr | 0x80);
    273        1.1       mrg 	cd18xx_write(sc, CD18xx_TSMR, sc->sc_tsmr | 0x80);
    274        1.1       mrg 	cd18xx_write(sc, CD18xx_RSMR, sc->sc_rsmr | 0x80);
    275        1.1       mrg 
    276        1.1       mrg 	printf(", gsvr %x msmr %x tsmr %x rsmr %x",
    277        1.1       mrg 	    cd18xx_read(sc, CD18xx_GSVR),
    278        1.1       mrg 	    cd18xx_read(sc, CD18xx_MSMR),
    279        1.1       mrg 	    cd18xx_read(sc, CD18xx_TSMR),
    280        1.1       mrg 	    cd18xx_read(sc, CD18xx_RSMR));
    281        1.1       mrg 
    282        1.1       mrg 	/* prescale registers */
    283        1.1       mrg 	sc->sc_pprh = 0xf0;
    284        1.1       mrg 	sc->sc_pprl = 0;
    285        1.1       mrg 	cd18xx_write(sc, CD18xx_PPRH, sc->sc_pprh);
    286        1.1       mrg 	cd18xx_write(sc, CD18xx_PPRL, sc->sc_pprl);
    287        1.1       mrg 
    288        1.1       mrg 	/* establish our soft interrupt. */
    289        1.1       mrg 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, cd18xx_softintr, sc);
    290        1.1       mrg 
    291        1.1       mrg 	printf(", 8 ports ready (chip id %d)\n", sc->sc_chip_id);
    292        1.1       mrg 
    293        1.1       mrg 	/*
    294       1.10     perry 	 * finally, we loop over all 8 channels initialising them
    295        1.1       mrg 	 */
    296        1.1       mrg 	for (port = 0; port < 8; port++)
    297        1.1       mrg 		cdtty_attach(sc, port);
    298        1.1       mrg }
    299        1.1       mrg 
    300        1.1       mrg /* tty portion of the code */
    301        1.1       mrg 
    302        1.1       mrg /*
    303        1.1       mrg  * tty portion attach routine
    304        1.1       mrg  */
    305       1.10     perry void
    306        1.1       mrg cdtty_attach(sc, port)
    307        1.1       mrg 	struct	cd18xx_softc *sc;
    308        1.1       mrg 	int port;
    309        1.1       mrg {
    310        1.1       mrg 	struct cdtty_port *p = &sc->sc_ports[port];
    311        1.1       mrg 	int i;
    312        1.1       mrg 
    313        1.1       mrg 	/* load CAR with channel number */
    314        1.1       mrg 	cd18xx_set_car(sc, port);
    315        1.1       mrg 
    316        1.1       mrg 	/* wait for CCR to go to zero */
    317        1.1       mrg 	if (cd18xx_wait_ccr(sc)) {
    318        1.1       mrg 		printf("cd18xx_attach: change command timed out setting "
    319        1.1       mrg 		       "CAR for port %d\n", i);
    320        1.1       mrg 		return;
    321        1.1       mrg 	}
    322        1.1       mrg 
    323        1.1       mrg 	/* set the RPTR to (arbitrary) 8 */
    324        1.1       mrg 	cd18xx_write(sc, CD18xx_RTPR, 8);
    325        1.1       mrg 
    326        1.1       mrg 	/* reset the modem signal value register */
    327        1.1       mrg 	sc->sc_ports[port].p_msvr = CD18xx_MSVR_RESET;
    328        1.1       mrg 
    329        1.1       mrg 	/* zero the service request enable register */
    330        1.1       mrg 	cd18xx_write(sc, CD18xx_SRER, 0);
    331        1.1       mrg 
    332        1.1       mrg 	/* enable the transmitter & receiver */
    333        1.1       mrg 	SET(p->p_chanctl, CD18xx_CCR_CHANCTL |
    334        1.1       mrg 		          CD18xx_CCR_CHANCTL_TxEN |
    335        1.1       mrg 		          CD18xx_CCR_CHANCTL_RxEN);
    336        1.1       mrg 
    337        1.1       mrg 	/* XXX no console or kgdb support yet! */
    338        1.1       mrg 
    339        1.1       mrg 	/* get a tty structure */
    340        1.1       mrg 	p->p_tty = ttymalloc();
    341        1.1       mrg 	p->p_tty->t_oproc = cdttystart;
    342        1.1       mrg 	p->p_tty->t_param = cdttyparam;
    343        1.1       mrg 	p->p_tty->t_hwiflow = cdttyhwiflow;
    344        1.1       mrg 
    345        1.1       mrg 	p->p_rbuf = malloc(cdtty_rbuf_size << 1, M_DEVBUF, M_WAITOK);
    346        1.1       mrg 	p->p_rbput = p->p_rbget = p->p_rbuf;
    347        1.1       mrg 	p->p_rbavail = cdtty_rbuf_size;
    348        1.1       mrg 	if (p->p_rbuf == NULL) {
    349        1.1       mrg 		printf("%s: unable to allocate ring buffer for tty %d\n",
    350        1.1       mrg 		    sc->sc_dev.dv_xname, port);
    351        1.1       mrg 		return;
    352        1.1       mrg 	}
    353        1.1       mrg 	p->p_ebuf = p->p_rbuf + (cdtty_rbuf_size << 1);
    354        1.1       mrg 
    355        1.1       mrg 	tty_attach(p->p_tty);
    356        1.1       mrg }
    357        1.1       mrg 
    358        1.1       mrg /*
    359        1.6       mrg  * cdtty_shutdown: called when the device is last closed.
    360        1.1       mrg  */
    361        1.1       mrg void
    362        1.1       mrg cdtty_shutdown(sc, p)
    363        1.1       mrg 	struct cd18xx_softc *sc;
    364        1.1       mrg 	struct cdtty_port *p;
    365        1.1       mrg {
    366        1.1       mrg 	struct tty *tp = p->p_tty;
    367        1.1       mrg 	int s;
    368        1.1       mrg 
    369        1.1       mrg 	s = splserial();
    370        1.1       mrg 
    371        1.1       mrg 	/* If we were asserting flow control, then deassert it. */
    372        1.1       mrg 	SET(p->p_rx_flags, RX_IBUF_BLOCKED);
    373        1.1       mrg 	cdtty_hwiflow(sc, p);
    374        1.1       mrg 
    375        1.1       mrg 	/* Clear any break condition set with TIOCSBRK. */
    376        1.1       mrg 	cdtty_break(sc, p, 0);
    377        1.1       mrg 
    378        1.1       mrg 	/*
    379        1.1       mrg 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    380        1.1       mrg 	 * notice even if we immediately open the port again.
    381        1.1       mrg 	 * Avoid tsleeping above splhigh().
    382        1.1       mrg 	 */
    383        1.1       mrg 	if (ISSET(tp->t_cflag, HUPCL)) {
    384        1.1       mrg 		cdtty_modem(sc, p, 0);
    385        1.1       mrg 		splx(s);
    386        1.1       mrg 		/* XXX tsleep will only timeout */
    387        1.1       mrg 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    388        1.1       mrg 		s = splserial();
    389        1.1       mrg 	}
    390        1.1       mrg 
    391        1.1       mrg 	/* Turn off interrupts. */
    392        1.1       mrg 	p->p_srer = 0;
    393        1.1       mrg 	cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    394        1.1       mrg 
    395        1.1       mrg 	splx(s);
    396        1.1       mrg }
    397        1.1       mrg 
    398        1.1       mrg /*
    399        1.1       mrg  * cdttyopen:  open syscall for cdtty terminals..
    400        1.1       mrg  */
    401        1.1       mrg int
    402        1.1       mrg cdttyopen(dev, flag, mode, p)
    403        1.1       mrg 	dev_t dev;
    404        1.1       mrg 	int flag;
    405        1.1       mrg 	int mode;
    406        1.1       mrg 	struct proc *p;
    407        1.1       mrg {
    408        1.1       mrg 	struct tty *tp;
    409        1.1       mrg 	struct cd18xx_softc *sc;
    410        1.1       mrg 	struct cdtty_port *port;
    411        1.1       mrg 	int channel, instance, s, error;
    412        1.1       mrg 
    413        1.1       mrg 	channel = CD18XX_CHANNEL(dev);
    414        1.1       mrg 	instance = CD18XX_INSTANCE(dev);
    415        1.1       mrg 
    416        1.1       mrg 	/* ensure instance is valid */
    417        1.1       mrg 	if (instance >= clcd_cd.cd_ndevs)
    418        1.1       mrg 		return (ENXIO);
    419        1.1       mrg 
    420        1.1       mrg 	/* get softc and port */
    421        1.1       mrg 	sc = clcd_cd.cd_devs[instance];
    422        1.1       mrg 	if (sc == NULL)
    423        1.1       mrg 		return (ENXIO);
    424        1.1       mrg 	port = &sc->sc_ports[channel];
    425        1.1       mrg 	if (port == NULL || port->p_rbuf == NULL)
    426        1.1       mrg 		return (ENXIO);
    427        1.1       mrg 
    428        1.1       mrg 	/* kgdb support?  maybe later... */
    429        1.1       mrg 
    430        1.1       mrg 	tp = port->p_tty;
    431        1.1       mrg 
    432        1.1       mrg 	/* enforce exclude */
    433        1.1       mrg 	if (tp == NULL ||
    434        1.1       mrg 	    (ISSET(tp->t_state, TS_ISOPEN) &&
    435       1.11    kleink 	     ISSET(tp->t_state, TS_XCLUDE) &&
    436  1.13.10.2      elad 	     kauth_authorize_generic(p->p_cred, KAUTH_GENERIC_ISSUSER,
    437  1.13.10.1      elad 			       &p->p_acflag) != 0))
    438        1.1       mrg 		return (EBUSY);
    439        1.1       mrg 
    440        1.1       mrg 	s = spltty();
    441        1.1       mrg 
    442        1.1       mrg 	/*
    443        1.1       mrg 	 * Do the following iff this is a first open.
    444        1.1       mrg 	 */
    445        1.1       mrg 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    446        1.1       mrg 		struct termios t;
    447        1.1       mrg 
    448        1.1       mrg 		/* set up things in tp as necessary */
    449        1.1       mrg 		tp->t_dev = dev;
    450        1.1       mrg 
    451        1.1       mrg 		/*
    452        1.1       mrg 		 * Initialize the termios status to the defaults.  Add in the
    453        1.1       mrg 		 * sticky bits from TIOCSFLAGS.
    454        1.1       mrg 		 */
    455        1.1       mrg 		t.c_ispeed = 0;
    456        1.1       mrg 		t.c_ospeed = TTYDEF_SPEED;
    457        1.1       mrg 		t.c_cflag = TTYDEF_CFLAG;
    458        1.1       mrg 
    459        1.1       mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CLOCAL))
    460        1.1       mrg 			SET(t.c_cflag, CLOCAL);
    461        1.1       mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CRTSCTS))
    462        1.1       mrg 			SET(t.c_cflag, CRTSCTS);
    463        1.1       mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CDTRCTS))
    464        1.1       mrg 			SET(t.c_cflag, CDTRCTS);
    465        1.1       mrg 		if (ISSET(port->p_swflags, TIOCFLAG_MDMBUF))
    466        1.1       mrg 			SET(t.c_cflag, MDMBUF);
    467        1.1       mrg 
    468        1.1       mrg 		/* Make sure param will see changes. */
    469        1.6       mrg 		tp->t_ospeed = 0;	/* XXX set above ignored? */
    470        1.1       mrg 		(void)cdttyparam(tp, &t);
    471        1.1       mrg 
    472        1.1       mrg 		tp->t_iflag = TTYDEF_IFLAG;
    473        1.1       mrg 		tp->t_oflag = TTYDEF_OFLAG;
    474        1.1       mrg 		tp->t_lflag = TTYDEF_LFLAG;
    475        1.1       mrg 		ttychars(tp);
    476        1.1       mrg 		ttsetwater(tp);
    477        1.1       mrg 
    478        1.1       mrg 		(void)splserial();
    479        1.1       mrg 
    480        1.1       mrg 		/* turn on rx and modem interrupts */
    481        1.1       mrg 		cd18xx_set_car(sc, CD18XX_CHANNEL(dev));
    482        1.1       mrg 		SET(port->p_srer, CD18xx_SRER_Rx |
    483        1.1       mrg 				  CD18xx_SRER_RxSC |
    484        1.1       mrg 				  CD18xx_SRER_CD);
    485        1.1       mrg 		cd18xx_write(sc, CD18xx_SRER, port->p_srer);
    486        1.1       mrg 
    487        1.1       mrg 		/* always turn on DTR when open */
    488        1.1       mrg 		cdtty_modem(sc, port, 1);
    489        1.1       mrg 
    490        1.1       mrg 		/* initialise ring buffer */
    491        1.1       mrg 		port->p_rbget = port->p_rbput = port->p_rbuf;
    492        1.1       mrg 		port->p_rbavail = cdtty_rbuf_size;
    493        1.1       mrg 		CLR(port->p_rx_flags, RX_ANY_BLOCK);
    494        1.1       mrg 		cdtty_hwiflow(sc, port);
    495        1.1       mrg 	}
    496        1.1       mrg 
    497        1.1       mrg 	/* drop spl back before going into the line open */
    498        1.1       mrg 	splx(s);
    499        1.1       mrg 
    500        1.1       mrg 	error = ttyopen(tp, CD18XX_DIALOUT(dev), ISSET(flag, O_NONBLOCK));
    501        1.1       mrg 	if (error == 0)
    502        1.1       mrg 		error = (*tp->t_linesw->l_open)(dev, tp);
    503        1.1       mrg 
    504        1.1       mrg 	return (error);
    505        1.1       mrg }
    506        1.1       mrg 
    507        1.1       mrg /*
    508        1.1       mrg  * cdttyclose:  close syscall for cdtty terminals..
    509        1.1       mrg  */
    510        1.1       mrg int
    511        1.1       mrg cdttyclose(dev, flag, mode, p)
    512        1.1       mrg 	dev_t dev;
    513        1.1       mrg 	int flag;
    514        1.1       mrg 	int mode;
    515        1.1       mrg 	struct proc *p;
    516        1.1       mrg {
    517        1.1       mrg 	struct cd18xx_softc *sc;
    518        1.1       mrg 	struct cdtty_port *port;
    519        1.1       mrg 	struct tty *tp;
    520        1.1       mrg 	int channel, instance;
    521        1.1       mrg 
    522        1.1       mrg 	channel = CD18XX_CHANNEL(dev);
    523        1.1       mrg 	instance = CD18XX_INSTANCE(dev);
    524        1.1       mrg 
    525        1.1       mrg 	/* ensure instance is valid */
    526        1.1       mrg 	if (instance >= clcd_cd.cd_ndevs)
    527        1.1       mrg 		return (ENXIO);
    528        1.1       mrg 
    529        1.1       mrg 	/* get softc and port */
    530        1.1       mrg 	sc = clcd_cd.cd_devs[instance];
    531        1.1       mrg 	if (sc == NULL)
    532        1.1       mrg 		return (ENXIO);
    533        1.1       mrg 	port = &sc->sc_ports[channel];
    534        1.1       mrg 
    535        1.1       mrg 	tp = port->p_tty;
    536        1.1       mrg 
    537        1.1       mrg 	(*tp->t_linesw->l_close)(tp, flag);
    538        1.1       mrg 	ttyclose(tp);
    539        1.1       mrg 
    540        1.1       mrg 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    541        1.1       mrg 		/*
    542        1.1       mrg 		 * Although we got a last close, the device may still be in
    543        1.1       mrg 		 * use; e.g. if this was the dialout node, and there are still
    544        1.1       mrg 		 * processes waiting for carrier on the non-dialout node.
    545        1.1       mrg 		 */
    546        1.1       mrg 		cdtty_shutdown(sc, port);
    547        1.1       mrg 	}
    548        1.1       mrg 
    549        1.1       mrg 	return (0);
    550        1.1       mrg }
    551        1.1       mrg 
    552        1.1       mrg /*
    553        1.1       mrg  * cdttyread:  read syscall for cdtty terminals..
    554        1.1       mrg  */
    555        1.1       mrg int
    556        1.1       mrg cdttyread(dev, uio, flag)
    557        1.1       mrg 	dev_t dev;
    558        1.1       mrg 	struct uio *uio;
    559        1.1       mrg 	int flag;
    560        1.1       mrg {
    561        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    562        1.1       mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    563        1.1       mrg 	struct tty *tp = port->p_tty;
    564        1.1       mrg 
    565        1.1       mrg 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    566        1.1       mrg }
    567        1.1       mrg 
    568        1.1       mrg /*
    569        1.1       mrg  * cdttywrite:  write syscall for cdtty terminals..
    570        1.1       mrg  */
    571        1.1       mrg int
    572        1.1       mrg cdttywrite(dev, uio, flag)
    573        1.1       mrg 	dev_t dev;
    574        1.1       mrg 	struct uio *uio;
    575        1.1       mrg 	int flag;
    576        1.1       mrg {
    577        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    578        1.1       mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    579        1.1       mrg 	struct tty *tp = port->p_tty;
    580        1.1       mrg 
    581        1.1       mrg 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    582        1.1       mrg }
    583        1.1       mrg 
    584        1.1       mrg int
    585        1.1       mrg cdttypoll(dev, events, p)
    586        1.1       mrg 	dev_t dev;
    587        1.1       mrg 	int events;
    588        1.1       mrg 	struct proc *p;
    589        1.1       mrg {
    590        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    591        1.1       mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    592        1.1       mrg 	struct tty *tp = port->p_tty;
    593        1.1       mrg 
    594        1.1       mrg 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    595        1.1       mrg }
    596        1.1       mrg 
    597        1.1       mrg /*
    598        1.1       mrg  * cdttytty:  return a pointer to our (cdtty) tp.
    599        1.1       mrg  */
    600        1.1       mrg struct tty *
    601        1.1       mrg cdttytty(dev)
    602        1.1       mrg 	dev_t dev;
    603        1.1       mrg {
    604        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    605        1.1       mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    606        1.1       mrg 
    607        1.1       mrg 	return (port->p_tty);
    608        1.1       mrg }
    609        1.1       mrg 
    610        1.1       mrg /*
    611        1.1       mrg  * cdttyioctl:  ioctl syscall for cdtty terminals..
    612        1.1       mrg  */
    613        1.1       mrg int
    614        1.1       mrg cdttyioctl(dev, cmd, data, flag, p)
    615        1.1       mrg 	dev_t dev;
    616        1.1       mrg 	u_long cmd;
    617        1.1       mrg 	caddr_t data;
    618        1.1       mrg 	int flag;
    619        1.1       mrg 	struct proc *p;
    620        1.1       mrg {
    621        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    622        1.1       mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    623        1.1       mrg 	struct tty *tp = port->p_tty;
    624        1.1       mrg 	int error, s;
    625        1.1       mrg 
    626        1.1       mrg 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    627        1.3    atatat 	if (error != EPASSTHROUGH)
    628        1.1       mrg 		return (error);
    629        1.1       mrg 
    630        1.1       mrg 	error = ttioctl(tp, cmd, data, flag, p);
    631        1.3    atatat 	if (error != EPASSTHROUGH)
    632        1.1       mrg 		return (error);
    633        1.1       mrg 
    634        1.1       mrg 	s = splserial();
    635        1.1       mrg 
    636        1.1       mrg 	switch (cmd) {
    637        1.1       mrg 	case TIOCSBRK:
    638        1.1       mrg 		cdtty_break(sc, port, 1);
    639        1.1       mrg 		break;
    640        1.1       mrg 
    641        1.1       mrg 	case TIOCCBRK:
    642        1.1       mrg 		cdtty_break(sc, port, 0);
    643        1.1       mrg 		break;
    644        1.1       mrg 
    645        1.1       mrg 	case TIOCSDTR:
    646        1.1       mrg 		cdtty_modem(sc, port, 1);
    647        1.1       mrg 		break;
    648        1.1       mrg 
    649        1.1       mrg 	case TIOCCDTR:
    650        1.1       mrg 		cdtty_modem(sc, port, 0);
    651        1.1       mrg 		break;
    652        1.1       mrg 
    653        1.1       mrg 	case TIOCGFLAGS:
    654        1.1       mrg 		*(int *)data = port->p_swflags;
    655        1.1       mrg 		break;
    656        1.1       mrg 
    657        1.1       mrg 	case TIOCSFLAGS:
    658  1.13.10.2      elad 		error = kauth_authorize_generic(p->p_cred, KAUTH_GENERIC_ISSUSER,
    659  1.13.10.1      elad 					  &p->p_acflag);
    660        1.1       mrg 		if (error)
    661        1.1       mrg 			return (error);
    662        1.1       mrg 		port->p_swflags = *(int *)data;
    663        1.1       mrg 		break;
    664        1.1       mrg 
    665        1.1       mrg 	case TIOCMSET:
    666        1.1       mrg 	case TIOCMBIS:
    667        1.1       mrg 	case TIOCMBIC:
    668        1.1       mrg 	case TIOCMGET:
    669        1.1       mrg 	default:
    670        1.3    atatat 		return (EPASSTHROUGH);
    671        1.1       mrg 	}
    672        1.1       mrg 
    673        1.1       mrg 	splx(s);
    674        1.1       mrg 	return (0);
    675        1.1       mrg }
    676        1.1       mrg 
    677        1.1       mrg /*
    678        1.1       mrg  * Start or restart transmission.
    679        1.1       mrg  */
    680        1.1       mrg static void
    681        1.1       mrg cdttystart(tp)
    682        1.1       mrg 	struct tty *tp;
    683        1.1       mrg {
    684        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    685        1.1       mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    686        1.1       mrg 	int s;
    687        1.1       mrg 
    688        1.1       mrg 	s = spltty();
    689        1.1       mrg 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    690        1.1       mrg 		goto out;
    691        1.1       mrg 	if (p->p_tx_stopped)
    692        1.1       mrg 		goto out;
    693        1.1       mrg 
    694        1.1       mrg 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    695        1.1       mrg 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    696        1.1       mrg 			CLR(tp->t_state, TS_ASLEEP);
    697        1.1       mrg 			wakeup((caddr_t)&tp->t_outq);
    698        1.1       mrg 		}
    699        1.1       mrg 		selwakeup(&tp->t_wsel);
    700        1.1       mrg 		if (tp->t_outq.c_cc == 0)
    701        1.1       mrg 			goto out;
    702        1.1       mrg 	}
    703        1.1       mrg 
    704        1.1       mrg 	/* Grab the first contiguous region of buffer space. */
    705        1.1       mrg 	{
    706        1.1       mrg 		u_char *tba;
    707        1.1       mrg 		int tbc;
    708        1.1       mrg 
    709        1.1       mrg 		tba = tp->t_outq.c_cf;
    710        1.1       mrg 		tbc = ndqb(&tp->t_outq, 0);
    711       1.10     perry 
    712        1.1       mrg 		(void)splserial();
    713        1.1       mrg 
    714        1.1       mrg 		p->p_tba = tba;
    715        1.1       mrg 		p->p_tbc = tbc;
    716        1.1       mrg 	}
    717        1.1       mrg 
    718        1.1       mrg 	SET(tp->t_state, TS_BUSY);
    719        1.1       mrg 	p->p_tx_busy = 1;
    720        1.1       mrg 
    721        1.1       mrg 	/* turn on tx interrupts */
    722        1.1       mrg 	if ((p->p_srer & CD18xx_SRER_Tx) == 0) {
    723        1.1       mrg 		cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev));
    724        1.1       mrg 		SET(p->p_srer, CD18xx_SRER_Tx);
    725        1.1       mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    726        1.1       mrg 	}
    727        1.1       mrg 
    728        1.1       mrg 	/*
    729        1.1       mrg 	 * Now bail; we can't actually transmit bytes until we're in a
    730        1.1       mrg 	 * transmit interrupt service routine.
    731        1.1       mrg 	 */
    732        1.1       mrg out:
    733        1.1       mrg 	splx(s);
    734        1.1       mrg 	return;
    735        1.1       mrg }
    736        1.1       mrg 
    737        1.1       mrg /*
    738        1.1       mrg  * cdttystop:  handing ^S or other stop signals, for a cdtty
    739        1.1       mrg  */
    740        1.1       mrg void
    741        1.1       mrg cdttystop(tp, flag)
    742        1.1       mrg 	struct tty *tp;
    743        1.1       mrg 	int flag;
    744        1.1       mrg {
    745        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    746        1.1       mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    747        1.1       mrg 	int s;
    748        1.1       mrg 
    749        1.1       mrg 	s = splserial();
    750        1.1       mrg 	if (ISSET(tp->t_state, TS_BUSY)) {
    751        1.1       mrg 		/* Stop transmitting at the next chunk. */
    752        1.1       mrg 		p->p_tbc = 0;
    753        1.1       mrg 		p->p_heldtbc = 0;
    754        1.1       mrg 		if (!ISSET(tp->t_state, TS_TTSTOP))
    755        1.1       mrg 			SET(tp->t_state, TS_FLUSH);
    756        1.1       mrg 	}
    757        1.1       mrg 	splx(s);
    758        1.1       mrg }
    759        1.1       mrg 
    760        1.1       mrg /*
    761        1.1       mrg  * load a channel's registers.
    762        1.1       mrg  */
    763        1.1       mrg void
    764        1.1       mrg cdtty_loadchannelregs(sc, p)
    765        1.1       mrg 	struct cd18xx_softc *sc;
    766        1.1       mrg 	struct cdtty_port *p;
    767        1.1       mrg {
    768        1.1       mrg 
    769        1.1       mrg 	cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev));
    770        1.1       mrg 	cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    771        1.1       mrg 	cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active = p->p_msvr);
    772        1.1       mrg 	cd18xx_write(sc, CD18xx_COR1, p->p_cor1);
    773        1.1       mrg 	cd18xx_write(sc, CD18xx_COR2, p->p_cor2);
    774        1.1       mrg 	cd18xx_write(sc, CD18xx_COR3, p->p_cor3);
    775        1.1       mrg 	/*
    776       1.10     perry 	 * COR2 and COR3 change commands are not required here for
    777        1.1       mrg 	 * the CL-CD1865 but we do them anyway for simplicity.
    778        1.1       mrg 	 */
    779        1.1       mrg 	cd18xx_write(sc, CD18xx_CCR, CD18xx_CCR_CORCHG |
    780        1.1       mrg 				     CD18xx_CCR_CORCHG_COR1 |
    781        1.1       mrg 				     CD18xx_CCR_CORCHG_COR2 |
    782        1.1       mrg 				     CD18xx_CCR_CORCHG_COR3);
    783        1.1       mrg 	cd18xx_write(sc, CD18xx_RBPRH, p->p_rbprh);
    784        1.1       mrg 	cd18xx_write(sc, CD18xx_RBPRL, p->p_rbprl);
    785        1.1       mrg 	cd18xx_write(sc, CD18xx_TBPRH, p->p_tbprh);
    786        1.1       mrg 	cd18xx_write(sc, CD18xx_TBPRL, p->p_tbprl);
    787        1.1       mrg 	if (cd18xx_wait_ccr(sc)) {
    788        1.1       mrg 		DPRINTF(CDD_INFO,
    789        1.1       mrg 		    ("%s: cdtty_loadchannelregs ccr wait timed out\n",
    790        1.1       mrg 		    sc->sc_dev.dv_xname));
    791        1.1       mrg 	}
    792        1.1       mrg 	cd18xx_write(sc, CD18xx_CCR, p->p_chanctl);
    793        1.1       mrg }
    794        1.1       mrg 
    795        1.1       mrg /*
    796        1.1       mrg  * Set tty parameters from termios.
    797        1.1       mrg  * XXX - Should just copy the whole termios after
    798        1.1       mrg  * making sure all the changes could be done.
    799        1.1       mrg  */
    800        1.1       mrg static int
    801        1.1       mrg cdttyparam(tp, t)
    802        1.1       mrg 	struct tty *tp;
    803        1.1       mrg 	struct termios *t;
    804        1.1       mrg {
    805        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    806        1.1       mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    807        1.1       mrg 	int s;
    808        1.1       mrg 
    809        1.1       mrg 	/* Check requested parameters. */
    810        1.1       mrg 	if (t->c_ospeed < 0)
    811        1.1       mrg 		return (EINVAL);
    812        1.1       mrg 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    813        1.1       mrg 		return (EINVAL);
    814        1.1       mrg 
    815        1.1       mrg 	/*
    816        1.1       mrg 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    817        1.1       mrg 	 * is always active.
    818        1.1       mrg 	 */
    819        1.1       mrg 	if (ISSET(p->p_swflags, TIOCFLAG_SOFTCAR)) {
    820        1.1       mrg 		SET(t->c_cflag, CLOCAL);
    821        1.1       mrg 		CLR(t->c_cflag, HUPCL);
    822        1.1       mrg 	}
    823        1.1       mrg 
    824        1.1       mrg 	/*
    825        1.1       mrg 	 * If there were no changes, don't do anything.  This avoids dropping
    826        1.1       mrg 	 * input and improves performance when all we did was frob things like
    827        1.1       mrg 	 * VMIN and VTIME.
    828        1.1       mrg 	 */
    829        1.1       mrg 	if (tp->t_ospeed == t->c_ospeed &&
    830        1.1       mrg 	    tp->t_cflag == t->c_cflag)
    831        1.1       mrg 		return (0);
    832        1.1       mrg 
    833        1.1       mrg 	/*
    834        1.1       mrg 	 * Block interrupts so that state will not
    835        1.1       mrg 	 * be altered until we are done setting it up.
    836        1.1       mrg 	 */
    837        1.1       mrg 	s = splserial();
    838        1.1       mrg 
    839        1.1       mrg 	/*
    840        1.1       mrg 	 * Copy across the size, parity and stop bit info.
    841        1.1       mrg 	 */
    842        1.1       mrg 	switch (t->c_cflag & CSIZE) {
    843        1.1       mrg 	case CS5:
    844        1.1       mrg 		p->p_cor1 = CD18xx_COR1_CS5;
    845        1.1       mrg 		break;
    846        1.1       mrg 	case CS6:
    847        1.1       mrg 		p->p_cor1 = CD18xx_COR1_CS6;
    848        1.1       mrg 		break;
    849        1.1       mrg 	case CS7:
    850        1.1       mrg 		p->p_cor1 = CD18xx_COR1_CS7;
    851        1.1       mrg 		break;
    852        1.1       mrg 	default:
    853        1.1       mrg 		p->p_cor1 = CD18xx_COR1_CS8;
    854        1.1       mrg 		break;
    855        1.1       mrg 	}
    856        1.1       mrg 	if (ISSET(t->c_cflag, PARENB)) {
    857        1.1       mrg 		SET(p->p_cor1, CD18xx_COR1_PARITY_NORMAL);
    858        1.1       mrg 		if (ISSET(t->c_cflag, PARODD))
    859        1.1       mrg 			SET(p->p_cor1, CD18xx_COR1_PARITY_ODD);
    860        1.1       mrg 	}
    861        1.1       mrg 	if (!ISSET(t->c_iflag, INPCK))
    862        1.1       mrg 		SET(p->p_cor1, CD18xx_COR1_IGNORE);
    863        1.1       mrg 	if (ISSET(t->c_cflag, CSTOPB))
    864        1.1       mrg 		SET(p->p_cor1, CD18xx_COR1_STOPBIT_2);
    865        1.1       mrg 
    866        1.1       mrg 	/*
    867        1.1       mrg 	 * If we're not in a mode that assumes a connection is present, then
    868        1.1       mrg 	 * ignore carrier changes.
    869        1.1       mrg 	 */
    870        1.1       mrg 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
    871        1.1       mrg 		p->p_msvr_dcd = 0;
    872        1.1       mrg 	else
    873        1.1       mrg 		p->p_msvr_dcd = CD18xx_MSVR_CD;
    874        1.1       mrg 
    875        1.1       mrg 	/*
    876        1.1       mrg 	 * Set the flow control pins depending on the current flow control
    877        1.1       mrg 	 * mode.
    878        1.1       mrg 	 */
    879        1.1       mrg 	if (ISSET(t->c_cflag, CRTSCTS)) {
    880        1.1       mrg 		p->p_mcor1_dtr = CD18xx_MCOR1_DTR;
    881        1.1       mrg 		p->p_msvr_rts = CD18xx_MSVR_RTS;
    882        1.1       mrg 		p->p_msvr_cts = CD18xx_MSVR_CTS;
    883        1.1       mrg 		p->p_cor2 = CD18xx_COR2_RTSAOE|CD18xx_COR2_CTSAE;
    884        1.1       mrg 	} else if (ISSET(t->c_cflag, MDMBUF)) {
    885        1.1       mrg 		/*
    886        1.1       mrg 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
    887        1.1       mrg 		 * carrier detection.
    888        1.1       mrg 		 */
    889        1.1       mrg 		p->p_mcor1_dtr = 0;
    890        1.1       mrg 		p->p_msvr_rts = CD18xx_MSVR_DTR;
    891        1.1       mrg 		p->p_msvr_cts = CD18xx_MSVR_CD;
    892        1.1       mrg 		p->p_cor2 = 0;
    893        1.1       mrg 	} else {
    894        1.1       mrg 		/*
    895        1.1       mrg 		 * If no flow control, then always set RTS.  This will make
    896        1.1       mrg 		 * the other side happy if it mistakenly thinks we're doing
    897        1.1       mrg 		 * RTS/CTS flow control.
    898        1.1       mrg 		 */
    899        1.1       mrg 		p->p_mcor1_dtr = CD18xx_MSVR_DTR;
    900        1.1       mrg 		p->p_msvr_rts = 0;
    901        1.1       mrg 		p->p_msvr_cts = 0;
    902        1.1       mrg 		p->p_cor2 = 0;
    903        1.1       mrg 	}
    904        1.1       mrg 	p->p_msvr_mask = p->p_msvr_cts | p->p_msvr_dcd;
    905        1.1       mrg 
    906        1.1       mrg 	/*
    907        1.1       mrg 	 * Set the FIFO threshold based on the receive speed.
    908        1.1       mrg 	 *
    909        1.1       mrg 	 *  * If it's a low speed, it's probably a mouse or some other
    910        1.1       mrg 	 *    interactive device, so set the threshold low.
    911        1.1       mrg 	 *  * If it's a high speed, trim the trigger level down to prevent
    912        1.1       mrg 	 *    overflows.
    913        1.1       mrg 	 *  * Otherwise set it a bit higher.
    914        1.1       mrg 	 */
    915        1.1       mrg 	p->p_cor3 = (t->c_ospeed <= 1200 ? 1 :
    916        1.1       mrg 			 t->c_ospeed <= 38400 ? 8 : 4);
    917        1.1       mrg 
    918        1.1       mrg #define PORT_RATE(o, s)	\
    919        1.1       mrg 	(((((o) + (s)/2) / (s)) + CD18xx_xBRPR_TPC/2) / CD18xx_xBRPR_TPC)
    920        1.1       mrg 	/* Compute BPS for the requested speeds */
    921        1.1       mrg 	if (t->c_ospeed) {
    922        1.1       mrg 		u_int32_t tbpr = PORT_RATE(sc->sc_osc, t->c_ospeed);
    923        1.1       mrg 
    924        1.1       mrg 		if (tbpr == 0 || tbpr > 0xffff)
    925        1.1       mrg 			return (EINVAL);
    926        1.1       mrg 
    927        1.1       mrg 		p->p_tbprh = tbpr >> 8;
    928        1.1       mrg 		p->p_tbprl = tbpr & 0xff;
    929        1.1       mrg 	}
    930        1.1       mrg 
    931        1.1       mrg 	if (t->c_ispeed) {
    932        1.1       mrg 		u_int32_t rbpr = PORT_RATE(sc->sc_osc, t->c_ispeed);
    933        1.1       mrg 
    934        1.1       mrg 		if (rbpr == 0 || rbpr > 0xffff)
    935        1.1       mrg 			return (EINVAL);
    936        1.1       mrg 
    937        1.1       mrg 		p->p_rbprh = rbpr >> 8;
    938        1.1       mrg 		p->p_rbprl = rbpr & 0xff;
    939        1.1       mrg 	}
    940        1.1       mrg 
    941        1.1       mrg 	/* And copy to tty. */
    942        1.1       mrg 	tp->t_ispeed = 0;
    943        1.1       mrg 	tp->t_ospeed = t->c_ospeed;
    944        1.1       mrg 	tp->t_cflag = t->c_cflag;
    945        1.1       mrg 
    946        1.1       mrg 	if (!p->p_heldchange) {
    947        1.1       mrg 		if (p->p_tx_busy) {
    948        1.1       mrg 			p->p_heldtbc = p->p_tbc;
    949        1.1       mrg 			p->p_tbc = 0;
    950        1.1       mrg 			p->p_heldchange = 1;
    951        1.1       mrg 		} else
    952        1.1       mrg 			cdtty_loadchannelregs(sc, p);
    953        1.1       mrg 	}
    954        1.1       mrg 
    955        1.1       mrg 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    956        1.1       mrg 		/* Disable the high water mark. */
    957        1.1       mrg 		p->p_r_hiwat = 0;
    958        1.1       mrg 		p->p_r_lowat = 0;
    959        1.1       mrg 		if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
    960        1.1       mrg 			CLR(p->p_rx_flags, RX_TTY_OVERFLOWED);
    961        1.1       mrg 			softintr_schedule(sc->sc_si);
    962        1.1       mrg 		}
    963        1.1       mrg 		if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
    964        1.1       mrg 			CLR(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
    965        1.1       mrg 			cdtty_hwiflow(sc, p);
    966        1.1       mrg 		}
    967        1.1       mrg 	} else {
    968        1.1       mrg 		p->p_r_hiwat = cdtty_rbuf_hiwat;
    969        1.1       mrg 		p->p_r_lowat = cdtty_rbuf_lowat;
    970        1.1       mrg 	}
    971        1.1       mrg 
    972        1.1       mrg 	splx(s);
    973        1.1       mrg 
    974        1.1       mrg 	/*
    975        1.1       mrg 	 * Update the tty layer's idea of the carrier bit, in case we changed
    976        1.1       mrg 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
    977        1.1       mrg 	 * explicit request.
    978        1.1       mrg 	 */
    979        1.1       mrg 	(void) (*tp->t_linesw->l_modem)(tp, ISSET(p->p_msvr, CD18xx_MSVR_CD));
    980        1.1       mrg 
    981        1.1       mrg 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    982        1.1       mrg 		if (p->p_tx_stopped) {
    983        1.1       mrg 			p->p_tx_stopped = 0;
    984        1.1       mrg 			cdttystart(tp);
    985        1.1       mrg 		}
    986        1.1       mrg 	}
    987        1.1       mrg 
    988        1.1       mrg 	return (0);
    989        1.1       mrg }
    990        1.1       mrg 
    991        1.1       mrg static void
    992        1.1       mrg cdtty_break(sc, p, onoff)
    993        1.1       mrg 	struct cd18xx_softc *sc;
    994        1.1       mrg 	struct cdtty_port *p;
    995        1.1       mrg 	int onoff;
    996        1.1       mrg {
    997        1.1       mrg 
    998        1.1       mrg 	/* tell tx intr handler we need a break */
    999        1.1       mrg 	p->p_needbreak = !!onoff;
   1000        1.1       mrg 
   1001        1.1       mrg 	/* turn on tx interrupts if break has changed */
   1002        1.1       mrg 	if (p->p_needbreak != p->p_break)
   1003        1.1       mrg 		SET(p->p_srer, CD18xx_SRER_Tx);
   1004        1.1       mrg 
   1005        1.1       mrg 	if (!p->p_heldchange) {
   1006        1.1       mrg 		if (p->p_tx_busy) {
   1007        1.1       mrg 			p->p_heldtbc = p->p_tbc;
   1008        1.1       mrg 			p->p_tbc = 0;
   1009        1.1       mrg 			p->p_heldchange = 1;
   1010        1.1       mrg 		} else
   1011        1.1       mrg 			cdtty_loadchannelregs(sc, p);
   1012        1.1       mrg 	}
   1013        1.1       mrg }
   1014        1.1       mrg 
   1015        1.1       mrg /*
   1016        1.1       mrg  * Raise or lower modem control (DTR/RTS) signals.  If a character is
   1017        1.1       mrg  * in transmission, the change is deferred.
   1018        1.1       mrg  */
   1019        1.1       mrg static void
   1020        1.1       mrg cdtty_modem(sc, p, onoff)
   1021        1.1       mrg 	struct cd18xx_softc *sc;
   1022        1.1       mrg 	struct cdtty_port *p;
   1023        1.1       mrg 	int onoff;
   1024        1.1       mrg {
   1025        1.1       mrg 
   1026        1.1       mrg 	if (p->p_mcor1_dtr == 0)
   1027        1.1       mrg 		return;
   1028        1.1       mrg 
   1029        1.1       mrg 	if (onoff)
   1030        1.1       mrg 		CLR(p->p_mcor1, p->p_mcor1_dtr);
   1031        1.1       mrg 	else
   1032        1.1       mrg 		SET(p->p_mcor1, p->p_mcor1_dtr);
   1033        1.1       mrg 
   1034        1.1       mrg 	if (!p->p_heldchange) {
   1035        1.1       mrg 		if (p->p_tx_busy) {
   1036        1.1       mrg 			p->p_heldtbc = p->p_tbc;
   1037        1.1       mrg 			p->p_tbc = 0;
   1038        1.1       mrg 			p->p_heldchange = 1;
   1039        1.1       mrg 		} else
   1040        1.1       mrg 			cdtty_loadchannelregs(sc, p);
   1041        1.1       mrg 	}
   1042        1.1       mrg }
   1043        1.1       mrg 
   1044        1.1       mrg /*
   1045        1.1       mrg  * Try to block or unblock input using hardware flow-control.
   1046        1.1       mrg  * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
   1047        1.1       mrg  * if this function returns non-zero, the TS_TBLOCK flag will
   1048        1.1       mrg  * be set or cleared according to the "block" arg passed.
   1049        1.1       mrg  */
   1050        1.1       mrg int
   1051        1.1       mrg cdttyhwiflow(tp, block)
   1052        1.1       mrg 	struct tty *tp;
   1053        1.1       mrg 	int block;
   1054        1.1       mrg {
   1055        1.1       mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
   1056        1.1       mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
   1057        1.1       mrg 	int s;
   1058        1.1       mrg 
   1059        1.1       mrg 	if (p->p_msvr_rts == 0)
   1060        1.1       mrg 		return (0);
   1061        1.1       mrg 
   1062        1.1       mrg 	s = splserial();
   1063        1.1       mrg 	if (block) {
   1064        1.1       mrg 		if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1065        1.1       mrg 			SET(p->p_rx_flags, RX_TTY_BLOCKED);
   1066        1.1       mrg 			cdtty_hwiflow(sc, p);
   1067        1.1       mrg 		}
   1068        1.1       mrg 	} else {
   1069        1.1       mrg 		if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
   1070        1.1       mrg 			CLR(p->p_rx_flags, RX_TTY_OVERFLOWED);
   1071        1.1       mrg 			softintr_schedule(sc->sc_si);
   1072        1.1       mrg 		}
   1073        1.1       mrg 		if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1074        1.1       mrg 			CLR(p->p_rx_flags, RX_TTY_BLOCKED);
   1075        1.1       mrg 			cdtty_hwiflow(sc, p);
   1076        1.1       mrg 		}
   1077        1.1       mrg 	}
   1078        1.1       mrg 	splx(s);
   1079        1.1       mrg 	return (1);
   1080        1.1       mrg }
   1081        1.1       mrg 
   1082        1.1       mrg /*
   1083        1.1       mrg  * Internal version of cdttyhwiflow, called at cdtty's priority.
   1084        1.1       mrg  */
   1085        1.1       mrg static void
   1086        1.1       mrg cdtty_hwiflow(sc, p)
   1087        1.1       mrg 	struct cd18xx_softc *sc;
   1088        1.1       mrg 	struct cdtty_port *p;
   1089        1.1       mrg {
   1090        1.1       mrg 
   1091        1.1       mrg 	if (p->p_msvr_rts == 0)
   1092        1.1       mrg 		return;
   1093        1.1       mrg 
   1094        1.1       mrg 	if (ISSET(p->p_rx_flags, RX_ANY_BLOCK)) {
   1095        1.1       mrg 		CLR(p->p_msvr, p->p_msvr_rts);
   1096        1.1       mrg 		CLR(p->p_msvr_active, p->p_msvr_rts);
   1097        1.1       mrg 	} else {
   1098        1.1       mrg 		SET(p->p_msvr, p->p_msvr_rts);
   1099        1.1       mrg 		SET(p->p_msvr_active, p->p_msvr_rts);
   1100        1.1       mrg 	}
   1101        1.1       mrg 	cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev));
   1102        1.1       mrg 	cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active);
   1103        1.1       mrg }
   1104        1.1       mrg 
   1105        1.1       mrg /*
   1106        1.1       mrg  * indiviual interrupt routines.
   1107        1.1       mrg  */
   1108        1.1       mrg 
   1109        1.1       mrg /*
   1110        1.1       mrg  * this is the number of interrupts allowed, total.  set it to 0
   1111        1.1       mrg  * to allow unlimited interrpts
   1112        1.1       mrg  */
   1113        1.1       mrg #define INTR_MAX_ALLOWED	0
   1114        1.1       mrg 
   1115        1.1       mrg #if INTR_MAX_ALLOWED == 0
   1116        1.1       mrg #define GOTINTR(sc, p)	/* nothing */
   1117        1.1       mrg #else
   1118        1.1       mrg int intrcount;
   1119        1.1       mrg #define GOTINTR(sc, p)	\
   1120        1.1       mrg do { \
   1121        1.1       mrg 	if (intrcount++ == INTR_MAX_ALLOWED) { \
   1122        1.1       mrg 		CLR(p->p_srer, CD18xx_SRER_Tx); \
   1123        1.1       mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer); \
   1124        1.1       mrg 	} \
   1125        1.1       mrg 	DPRINTF(CDD_INTR, (", intrcount %d srer %x", intrcount, p->p_srer)); \
   1126        1.1       mrg } while (0)
   1127        1.1       mrg #endif
   1128        1.1       mrg 
   1129        1.1       mrg /* receiver interrupt */
   1130       1.13     perry static inline void
   1131        1.1       mrg cd18xx_rint(sc, ns)
   1132        1.1       mrg 	struct cd18xx_softc *sc;
   1133        1.1       mrg 	int *ns;
   1134        1.1       mrg {
   1135        1.1       mrg 	struct cdtty_port *p;
   1136        1.1       mrg 	u_int channel, count;
   1137        1.1       mrg 	u_char *put, *end;
   1138        1.1       mrg 	u_int cc;
   1139        1.1       mrg 
   1140        1.1       mrg 	/* work out the channel and softc */
   1141        1.1       mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1142        1.1       mrg 	p = &sc->sc_ports[channel];
   1143        1.1       mrg 	DPRINTF(CDD_INTR, ("%s: rint: channel %d", sc->sc_dev.dv_xname, channel));
   1144        1.1       mrg 	GOTINTR(sc, p);
   1145        1.1       mrg 
   1146        1.1       mrg 	end = p->p_ebuf;
   1147        1.1       mrg 	put = p->p_rbput;
   1148        1.1       mrg 	cc = p->p_rbavail;
   1149        1.1       mrg 
   1150        1.1       mrg 	/* read as many bytes as necessary */
   1151        1.1       mrg 	count = cd18xx_read(sc, CD18xx_RDCR);
   1152        1.1       mrg 	DPRINTF(CDD_INTR, (", %d bytes available: ", count));
   1153        1.1       mrg 
   1154        1.1       mrg 	while (cc > 0 && count > 0) {
   1155        1.1       mrg 		u_char rcsr = cd18xx_read(sc, CD18xx_RCSR);
   1156        1.1       mrg 
   1157        1.1       mrg 		put[0] = cd18xx_read(sc, CD18xx_RDR);
   1158        1.1       mrg 		put[1] = rcsr;
   1159        1.1       mrg 
   1160        1.1       mrg 		if (rcsr)
   1161        1.1       mrg 			*ns = 1;
   1162        1.1       mrg 
   1163        1.1       mrg 		put += 2;
   1164        1.1       mrg 		if (put >= end)
   1165        1.1       mrg 			put = p->p_rbuf;
   1166        1.1       mrg 
   1167        1.1       mrg 		DPRINTF(CDD_INTR, ("."));
   1168        1.1       mrg 		cc--;
   1169        1.1       mrg 		count--;
   1170        1.1       mrg 	}
   1171        1.1       mrg 
   1172        1.1       mrg 	DPRINTF(CDD_INTR, (" finished reading"));
   1173        1.1       mrg 
   1174        1.1       mrg 	/*
   1175        1.1       mrg 	 * Current string of incoming characters ended because
   1176        1.1       mrg 	 * no more data was available or we ran out of space.
   1177        1.1       mrg 	 * If we're out of space, turn off receive interrupts.
   1178        1.1       mrg 	 */
   1179        1.1       mrg 	p->p_rbput = put;
   1180        1.1       mrg 	p->p_rbavail = cc;
   1181        1.1       mrg 	if (!ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
   1182        1.1       mrg 		p->p_rx_ready = 1;
   1183        1.1       mrg 	}
   1184        1.1       mrg 
   1185        1.1       mrg 	/*
   1186        1.1       mrg 	 * If we're out of space, disable receive interrupts
   1187        1.1       mrg 	 * until the queue has drained a bit.
   1188        1.1       mrg 	 */
   1189        1.1       mrg 	if (!cc) {
   1190        1.1       mrg 		SET(p->p_rx_flags, RX_IBUF_OVERFLOWED);
   1191        1.1       mrg 		CLR(p->p_srer, CD18xx_SRER_Rx |
   1192        1.1       mrg 			       CD18xx_SRER_RxSC |
   1193        1.1       mrg 			       CD18xx_SRER_CD);
   1194        1.1       mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1195        1.1       mrg 	}
   1196        1.1       mrg 
   1197        1.1       mrg 	/* finish the interrupt transaction with the IC */
   1198        1.1       mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1199        1.1       mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1200        1.1       mrg }
   1201        1.1       mrg 
   1202        1.1       mrg /*
   1203        1.1       mrg  * transmitter interrupt
   1204        1.1       mrg  *
   1205        1.1       mrg  * note this relys on the fact that we allow the transmitter FIFO to
   1206        1.1       mrg  * drain completely
   1207        1.1       mrg  */
   1208       1.13     perry static inline void
   1209        1.1       mrg cd18xx_tint(sc, ns)
   1210        1.1       mrg 	struct cd18xx_softc *sc;
   1211        1.1       mrg 	int *ns;
   1212        1.1       mrg {
   1213        1.1       mrg 	struct cdtty_port *p;
   1214        1.1       mrg 	u_int channel;
   1215        1.1       mrg 
   1216        1.1       mrg 	/* work out the channel and softc */
   1217        1.1       mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1218        1.1       mrg 	p = &sc->sc_ports[channel];
   1219        1.1       mrg 	DPRINTF(CDD_INTR, ("%s: tint: channel %d", sc->sc_dev.dv_xname,
   1220        1.1       mrg 	    channel));
   1221        1.1       mrg 	GOTINTR(sc, p);
   1222        1.1       mrg 
   1223        1.1       mrg 	/* if the current break condition is wrong, fix it */
   1224        1.1       mrg 	if (p->p_break != p->p_needbreak) {
   1225        1.1       mrg 		u_char buf[2];
   1226       1.10     perry 
   1227        1.1       mrg 		DPRINTF(CDD_INTR, (", changing break to %d", p->p_needbreak));
   1228        1.1       mrg 
   1229        1.1       mrg 		/* turn on ETC processing */
   1230        1.1       mrg 		cd18xx_write(sc, CD18xx_COR2, p->p_cor2 | CD18xx_COR2_ETC);
   1231        1.1       mrg 
   1232        1.1       mrg 		buf[0] = CD18xx_TDR_ETC_BYTE;
   1233        1.1       mrg 		buf[1] = p->p_needbreak ? CD18xx_TDR_BREAK_BYTE :
   1234        1.1       mrg 					    CD18xx_TDR_NOBREAK_BYTE;
   1235        1.1       mrg 		cd18xx_write_multi(sc, CD18xx_TDR, buf, 2);
   1236        1.1       mrg 
   1237        1.1       mrg 		p->p_break = p->p_needbreak;
   1238        1.1       mrg 
   1239        1.1       mrg 		/* turn off ETC processing */
   1240        1.1       mrg 		cd18xx_write(sc, CD18xx_COR2, p->p_cor2);
   1241        1.1       mrg 	}
   1242        1.1       mrg 
   1243        1.1       mrg 	/*
   1244        1.1       mrg 	 * If we've delayed a parameter change, do it now, and restart
   1245        1.1       mrg 	 * output.
   1246        1.1       mrg 	 */
   1247        1.1       mrg 	if (p->p_heldchange) {
   1248        1.1       mrg 		cdtty_loadchannelregs(sc, p);
   1249        1.1       mrg 		p->p_heldchange = 0;
   1250        1.1       mrg 		p->p_tbc = p->p_heldtbc;
   1251        1.1       mrg 		p->p_heldtbc = 0;
   1252        1.1       mrg 	}
   1253        1.1       mrg 
   1254        1.1       mrg 	/* Output the next chunk of the contiguous buffer, if any. */
   1255        1.1       mrg 	if (p->p_tbc > 0) {
   1256        1.1       mrg 		int n;
   1257        1.1       mrg 
   1258        1.1       mrg 		n = p->p_tbc;
   1259        1.1       mrg 		if (n > 8) /* write up to 8 entries */
   1260        1.1       mrg 			n = 8;
   1261        1.1       mrg 		DPRINTF(CDD_INTR, (", writing %d bytes to TDR", n));
   1262        1.1       mrg 		cd18xx_write_multi(sc, CD18xx_TDR, p->p_tba, n);
   1263        1.1       mrg 		p->p_tbc -= n;
   1264        1.1       mrg 		p->p_tba += n;
   1265        1.1       mrg 	}
   1266        1.1       mrg 
   1267        1.1       mrg 	/* Disable transmit completion interrupts if we ran out of bytes. */
   1268        1.1       mrg 	if (p->p_tbc == 0) {
   1269        1.8       wiz 		/* Note that Tx interrupts should already be enabled */
   1270        1.1       mrg 		if (ISSET(p->p_srer, CD18xx_SRER_Tx)) {
   1271        1.1       mrg 			DPRINTF(CDD_INTR, (", disabling tx interrupts"));
   1272        1.1       mrg 			CLR(p->p_srer, CD18xx_SRER_Tx);
   1273        1.1       mrg 			cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1274        1.1       mrg 		}
   1275        1.1       mrg 		if (p->p_tx_busy) {
   1276        1.1       mrg 			p->p_tx_busy = 0;
   1277        1.1       mrg 			p->p_tx_done = 1;
   1278        1.1       mrg 		}
   1279        1.1       mrg 	}
   1280        1.1       mrg 	*ns = 1;
   1281        1.1       mrg 
   1282        1.1       mrg 	/* finish the interrupt transaction with the IC */
   1283        1.1       mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1284        1.1       mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1285        1.1       mrg }
   1286        1.1       mrg 
   1287        1.1       mrg /* modem signal change interrupt */
   1288       1.13     perry static inline void
   1289        1.1       mrg cd18xx_mint(sc, ns)
   1290        1.1       mrg 	struct cd18xx_softc *sc;
   1291        1.1       mrg 	int *ns;
   1292        1.1       mrg {
   1293        1.1       mrg 	struct cdtty_port *p;
   1294        1.1       mrg 	u_int channel;
   1295        1.1       mrg 	u_char msvr, delta;
   1296        1.1       mrg 
   1297        1.1       mrg 	/* work out the channel and softc */
   1298        1.1       mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1299        1.1       mrg 	p = &sc->sc_ports[channel];
   1300        1.1       mrg 	DPRINTF(CDD_INTR, ("%s: mint: channel %d", sc->sc_dev.dv_xname, channel));
   1301        1.1       mrg 	GOTINTR(sc, p);
   1302        1.1       mrg 
   1303        1.1       mrg 	/*
   1304        1.1       mrg 	 * We ignore the MCR register, and handle detecting deltas
   1305        1.1       mrg 	 * via software, like many other serial drivers.
   1306        1.1       mrg 	 */
   1307        1.1       mrg 	msvr = cd18xx_read(sc, CD18xx_MSVR);
   1308        1.1       mrg 	delta = msvr ^ p->p_msvr;
   1309        1.1       mrg 	DPRINTF(CDD_INTR, (", msvr %d", msvr));
   1310        1.1       mrg 
   1311        1.1       mrg 	/*
   1312        1.1       mrg 	 * Process normal status changes
   1313        1.1       mrg 	 */
   1314        1.1       mrg 	if (ISSET(delta, p->p_msvr_mask)) {
   1315        1.1       mrg 		SET(p->p_msvr_delta, delta);
   1316        1.1       mrg 
   1317        1.1       mrg 		DPRINTF(CDD_INTR, (", status changed delta %d", delta));
   1318        1.1       mrg 		/*
   1319        1.1       mrg 		 * Stop output immediately if we lose the output
   1320        1.1       mrg 		 * flow control signal or carrier detect.
   1321        1.1       mrg 		 */
   1322        1.1       mrg 		if (ISSET(~msvr, p->p_msvr_mask)) {
   1323        1.1       mrg 			p->p_tbc = 0;
   1324        1.1       mrg 			p->p_heldtbc = 0;
   1325        1.1       mrg 			/* Stop modem interrupt processing */
   1326        1.1       mrg 		}
   1327        1.1       mrg 		p->p_st_check = 1;
   1328        1.1       mrg 		*ns = 1;
   1329        1.1       mrg 	}
   1330        1.1       mrg 
   1331        1.1       mrg 	/* reset the modem signal register */
   1332        1.1       mrg 	cd18xx_write(sc, CD18xx_MCR, 0);
   1333        1.1       mrg 
   1334        1.1       mrg 	/* finish the interrupt transaction with the IC */
   1335        1.1       mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1336        1.1       mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1337        1.1       mrg }
   1338        1.1       mrg 
   1339        1.1       mrg /*
   1340        1.1       mrg  * hardware interrupt routine.  call the relevant interrupt routines until
   1341        1.1       mrg  * no interrupts are pending.
   1342        1.1       mrg  *
   1343        1.1       mrg  * note:  we do receive interrupts before all others (as we'd rather lose
   1344        1.1       mrg  * a chance to transmit, than lose a character).  and we do transmit
   1345        1.1       mrg  * interrupts before modem interrupts.
   1346        1.1       mrg  *
   1347        1.1       mrg  * we have to traverse all of the cd18xx's attached, unfortunately.
   1348        1.1       mrg  */
   1349        1.1       mrg int
   1350        1.1       mrg cd18xx_hardintr(v)
   1351        1.1       mrg 	void *v;
   1352        1.1       mrg {
   1353        1.1       mrg 	int i, rv = 0;
   1354        1.1       mrg 	u_char ack;
   1355        1.1       mrg 
   1356        1.1       mrg 	DPRINTF(CDD_INTR, ("cd18xx_hardintr (ndevs %d):\n", clcd_cd.cd_ndevs));
   1357        1.1       mrg 	for (i = 0; i < clcd_cd.cd_ndevs; i++)
   1358        1.1       mrg 	{
   1359        1.1       mrg 		struct cd18xx_softc *sc = clcd_cd.cd_devs[i];
   1360        1.1       mrg 		int status, ns = 0;
   1361        1.1       mrg 		int count = 1;	/* process only 1 interrupts at a time for now */
   1362        1.1       mrg 
   1363        1.1       mrg 		if (sc == NULL)
   1364        1.1       mrg 			continue;
   1365        1.1       mrg 
   1366        1.1       mrg 		DPRINTF(CDD_INTR, ("%s:", sc->sc_dev.dv_xname));
   1367        1.1       mrg 		while (count-- &&
   1368        1.1       mrg 		    (status = (cd18xx_read(sc, CD18xx_SRSR) &
   1369        1.1       mrg 		     CD18xx_SRSR_PENDING))) {
   1370        1.1       mrg 			rv = 1;
   1371        1.1       mrg 
   1372        1.1       mrg 			DPRINTF(CDD_INTR, (" status %x:", status));
   1373        1.1       mrg 			if (ISSET(status, CD18xx_SRSR_RxPEND)) {
   1374        1.1       mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1375        1.1       mrg 				    CD18xx_INTRACK_RxINT);
   1376        1.1       mrg 				DPRINTF(CDD_INTR, (" rx: ack1 %x\n", ack));
   1377        1.1       mrg 				cd18xx_rint(sc, &ns);
   1378        1.1       mrg 			}
   1379        1.1       mrg 			if (ISSET(status, CD18xx_SRSR_TxPEND)) {
   1380        1.1       mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1381        1.1       mrg 				    CD18xx_INTRACK_TxINT);
   1382        1.1       mrg 				DPRINTF(CDD_INTR, (" tx: ack1 %x\n", ack));
   1383        1.1       mrg 				cd18xx_tint(sc, &ns);
   1384        1.1       mrg 
   1385        1.1       mrg 			}
   1386        1.1       mrg 			if (ISSET(status, CD18xx_SRSR_MxPEND)) {
   1387        1.1       mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1388        1.1       mrg 				    CD18xx_INTRACK_MxINT);
   1389        1.1       mrg 				DPRINTF(CDD_INTR, (" mx: ack1 %x\n", ack));
   1390        1.1       mrg 				cd18xx_mint(sc, &ns);
   1391        1.1       mrg 			}
   1392        1.1       mrg 		}
   1393        1.1       mrg 		if (ns)
   1394        1.1       mrg 			softintr_schedule(sc->sc_si);
   1395        1.1       mrg 	}
   1396        1.1       mrg 
   1397        1.1       mrg 	return (rv);
   1398        1.1       mrg }
   1399        1.1       mrg 
   1400        1.1       mrg /*
   1401        1.1       mrg  * software interrupt
   1402        1.1       mrg  */
   1403        1.1       mrg 
   1404        1.1       mrg void
   1405        1.1       mrg cdtty_rxsoft(sc, p, tp)
   1406        1.1       mrg 	struct cd18xx_softc *sc;
   1407        1.1       mrg 	struct cdtty_port *p;
   1408        1.1       mrg 	struct tty *tp;
   1409        1.1       mrg {
   1410        1.1       mrg 	u_char *get, *end;
   1411        1.1       mrg 	u_int cc, scc;
   1412        1.1       mrg 	u_char rcsr;
   1413        1.1       mrg 	int code;
   1414        1.1       mrg 	int s;
   1415        1.1       mrg 
   1416        1.1       mrg 	end = p->p_ebuf;
   1417        1.1       mrg 	get = p->p_rbget;
   1418        1.1       mrg 	scc = cc = cdtty_rbuf_size - p->p_rbavail;
   1419        1.1       mrg 
   1420        1.1       mrg 	if (cc == cdtty_rbuf_size) {
   1421        1.1       mrg 		p->p_floods++;
   1422        1.1       mrg #if 0
   1423        1.1       mrg 		if (p->p_errors++ == 0)
   1424        1.1       mrg 			callout_reset(&p->p_diag_callout, 60 * hz,
   1425        1.1       mrg 			    cdttydiag, p);
   1426        1.1       mrg #endif
   1427        1.1       mrg 	}
   1428        1.1       mrg 
   1429        1.1       mrg 	while (cc) {
   1430        1.1       mrg 		code = get[0];
   1431        1.1       mrg 		rcsr = get[1];
   1432        1.1       mrg 		if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR | CD18xx_RCSR_BREAK |
   1433        1.1       mrg 				CD18xx_RCSR_FRAMERR | CD18xx_RCSR_PARITYERR)) {
   1434        1.1       mrg 			if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR)) {
   1435        1.1       mrg 				p->p_overflows++;
   1436        1.1       mrg #if 0
   1437        1.1       mrg 				if (p->p_errors++ == 0)
   1438        1.1       mrg 					callout_reset(&p->p_diag_callout,
   1439        1.1       mrg 					    60 * hz, cdttydiag, p);
   1440        1.1       mrg #endif
   1441        1.1       mrg 			}
   1442        1.1       mrg 			if (ISSET(rcsr, CD18xx_RCSR_BREAK|CD18xx_RCSR_FRAMERR))
   1443        1.1       mrg 				SET(code, TTY_FE);
   1444        1.1       mrg 			if (ISSET(rcsr, CD18xx_RCSR_PARITYERR))
   1445        1.1       mrg 				SET(code, TTY_PE);
   1446        1.1       mrg 		}
   1447        1.1       mrg 		if ((*tp->t_linesw->l_rint)(code, tp) == -1) {
   1448        1.1       mrg 			/*
   1449        1.1       mrg 			 * The line discipline's buffer is out of space.
   1450        1.1       mrg 			 */
   1451        1.1       mrg 			if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1452        1.1       mrg 				/*
   1453        1.1       mrg 				 * We're either not using flow control, or the
   1454        1.1       mrg 				 * line discipline didn't tell us to block for
   1455        1.1       mrg 				 * some reason.  Either way, we have no way to
   1456        1.1       mrg 				 * know when there's more space available, so
   1457        1.1       mrg 				 * just drop the rest of the data.
   1458        1.1       mrg 				 */
   1459        1.1       mrg 				get += cc << 1;
   1460        1.1       mrg 				if (get >= end)
   1461        1.1       mrg 					get -= cdtty_rbuf_size << 1;
   1462        1.1       mrg 				cc = 0;
   1463        1.1       mrg 			} else {
   1464        1.1       mrg 				/*
   1465        1.1       mrg 				 * Don't schedule any more receive processing
   1466        1.1       mrg 				 * until the line discipline tells us there's
   1467        1.1       mrg 				 * space available (through cdttyhwiflow()).
   1468        1.1       mrg 				 * Leave the rest of the data in the input
   1469        1.1       mrg 				 * buffer.
   1470        1.1       mrg 				 */
   1471        1.1       mrg 				SET(p->p_rx_flags, RX_TTY_OVERFLOWED);
   1472        1.1       mrg 			}
   1473        1.1       mrg 			break;
   1474        1.1       mrg 		}
   1475        1.1       mrg 		get += 2;
   1476        1.1       mrg 		if (get >= end)
   1477        1.1       mrg 			get = p->p_rbuf;
   1478        1.1       mrg 		cc--;
   1479        1.1       mrg 	}
   1480        1.1       mrg 
   1481        1.1       mrg 	if (cc != scc) {
   1482        1.1       mrg 		p->p_rbget = get;
   1483        1.1       mrg 		s = splserial();
   1484       1.10     perry 
   1485        1.1       mrg 		cc = p->p_rbavail += scc - cc;
   1486        1.1       mrg 		/* Buffers should be ok again, release possible block. */
   1487        1.1       mrg 		if (cc >= p->p_r_lowat) {
   1488        1.1       mrg 			if (ISSET(p->p_rx_flags, RX_IBUF_OVERFLOWED)) {
   1489        1.1       mrg 				CLR(p->p_rx_flags, RX_IBUF_OVERFLOWED);
   1490        1.1       mrg 				cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev));
   1491        1.1       mrg 				SET(p->p_srer, CD18xx_SRER_Rx |
   1492        1.1       mrg 					       CD18xx_SRER_RxSC |
   1493        1.1       mrg 					       CD18xx_SRER_CD);
   1494        1.1       mrg 				cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1495        1.1       mrg 			}
   1496        1.1       mrg 			if (ISSET(p->p_rx_flags, RX_IBUF_BLOCKED)) {
   1497        1.1       mrg 				CLR(p->p_rx_flags, RX_IBUF_BLOCKED);
   1498        1.1       mrg 				cdtty_hwiflow(sc, p);
   1499        1.1       mrg 			}
   1500        1.1       mrg 		}
   1501        1.1       mrg 		splx(s);
   1502        1.1       mrg 	}
   1503        1.1       mrg }
   1504        1.1       mrg 
   1505        1.1       mrg void
   1506        1.1       mrg cdtty_txsoft(sc, p, tp)
   1507        1.1       mrg 	struct cd18xx_softc *sc;
   1508        1.1       mrg 	struct cdtty_port *p;
   1509        1.1       mrg 	struct tty *tp;
   1510        1.1       mrg {
   1511        1.1       mrg 
   1512        1.1       mrg 	CLR(tp->t_state, TS_BUSY);
   1513        1.1       mrg 	if (ISSET(tp->t_state, TS_FLUSH))
   1514        1.1       mrg 		CLR(tp->t_state, TS_FLUSH);
   1515        1.1       mrg 	else
   1516        1.1       mrg 		ndflush(&tp->t_outq, (int)(p->p_tba - tp->t_outq.c_cf));
   1517        1.1       mrg 	(*tp->t_linesw->l_start)(tp);
   1518        1.1       mrg }
   1519        1.1       mrg 
   1520        1.1       mrg void
   1521        1.1       mrg cdtty_stsoft(sc, p, tp)
   1522        1.1       mrg 	struct cd18xx_softc *sc;
   1523        1.1       mrg 	struct cdtty_port *p;
   1524        1.1       mrg 	struct tty *tp;
   1525        1.1       mrg {
   1526        1.1       mrg 	u_char msvr, delta;
   1527        1.1       mrg 	int s;
   1528        1.1       mrg 
   1529        1.1       mrg 	s = splserial();
   1530        1.1       mrg 	msvr = p->p_msvr;
   1531        1.1       mrg 	delta = p->p_msvr_delta;
   1532        1.1       mrg 	p->p_msvr_delta = 0;
   1533        1.1       mrg 	splx(s);
   1534        1.1       mrg 
   1535        1.1       mrg 	if (ISSET(delta, p->p_msvr_dcd)) {
   1536        1.1       mrg 		/*
   1537        1.1       mrg 		 * Inform the tty layer that carrier detect changed.
   1538        1.1       mrg 		 */
   1539        1.1       mrg 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msvr, CD18xx_MSVR_CD));
   1540        1.1       mrg 	}
   1541        1.1       mrg 
   1542        1.1       mrg 	if (ISSET(delta, p->p_msvr_cts)) {
   1543        1.1       mrg 		/* Block or unblock output according to flow control. */
   1544        1.1       mrg 		if (ISSET(msvr, p->p_msvr_cts)) {
   1545        1.1       mrg 			p->p_tx_stopped = 0;
   1546        1.1       mrg 			(*tp->t_linesw->l_start)(tp);
   1547        1.1       mrg 		} else {
   1548        1.1       mrg 			p->p_tx_stopped = 1;
   1549        1.1       mrg 		}
   1550        1.1       mrg 	}
   1551        1.1       mrg }
   1552        1.1       mrg 
   1553        1.1       mrg void
   1554        1.1       mrg cd18xx_softintr(v)
   1555        1.1       mrg 	void *v;
   1556        1.1       mrg {
   1557        1.1       mrg 	struct cd18xx_softc *sc = v;
   1558        1.1       mrg 	struct cdtty_port *p;
   1559        1.1       mrg 	struct tty *tp;
   1560        1.1       mrg 	int i;
   1561        1.1       mrg 
   1562        1.1       mrg 	for (i = 0; i < 8; i++) {
   1563        1.1       mrg 		p = &sc->sc_ports[i];
   1564        1.1       mrg 
   1565        1.1       mrg 		tp = p->p_tty;
   1566        1.1       mrg 		if (tp == NULL)
   1567        1.1       mrg 			continue;
   1568        1.1       mrg 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1569        1.1       mrg 			continue;
   1570        1.1       mrg 
   1571        1.1       mrg 		if (p->p_rx_ready) {
   1572        1.1       mrg 			p->p_rx_ready = 0;
   1573        1.1       mrg 			cdtty_rxsoft(sc, p, tp);
   1574        1.1       mrg 		}
   1575        1.1       mrg 
   1576        1.1       mrg 		if (p->p_st_check) {
   1577        1.1       mrg 			p->p_st_check = 0;
   1578        1.1       mrg 			cdtty_stsoft(sc, p, tp);
   1579        1.1       mrg 		}
   1580        1.1       mrg 
   1581        1.1       mrg 		if (p->p_tx_done) {
   1582        1.1       mrg 			p->p_tx_done = 0;
   1583        1.1       mrg 			cdtty_txsoft(sc, p, tp);
   1584        1.1       mrg 		}
   1585        1.1       mrg 	}
   1586        1.1       mrg }
   1587