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cd18xx.c revision 1.2
      1  1.2  lukem /*	$NetBSD: cd18xx.c,v 1.2 2001/11/13 13:14:35 lukem Exp $	*/
      2  1.1    mrg 
      3  1.1    mrg /*
      4  1.1    mrg  * Copyright (c) 1998, 2001 Matthew R. Green
      5  1.1    mrg  * All rights reserved.
      6  1.1    mrg  *
      7  1.1    mrg  * Redistribution and use in source and binary forms, with or without
      8  1.1    mrg  * modification, are permitted provided that the following conditions
      9  1.1    mrg  * are met:
     10  1.1    mrg  * 1. Redistributions of source code must retain the above copyright
     11  1.1    mrg  *    notice, this list of conditions and the following disclaimer.
     12  1.1    mrg  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1    mrg  *    notice, this list of conditions and the following disclaimer in the
     14  1.1    mrg  *    documentation and/or other materials provided with the distribution.
     15  1.1    mrg  * 3. The name of the author may not be used to endorse or promote products
     16  1.1    mrg  *    derived from this software without specific prior written permission.
     17  1.1    mrg  *
     18  1.1    mrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  1.1    mrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  1.1    mrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.1    mrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  1.1    mrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23  1.1    mrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24  1.1    mrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25  1.1    mrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26  1.1    mrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  1.1    mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  1.1    mrg  * SUCH DAMAGE.
     29  1.1    mrg  */
     30  1.1    mrg 
     31  1.1    mrg /*-
     32  1.1    mrg  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     33  1.1    mrg  * All rights reserved.
     34  1.1    mrg  *
     35  1.1    mrg  * This code is derived from software contributed to The NetBSD Foundation
     36  1.1    mrg  * by Charles M. Hannum.
     37  1.1    mrg  *
     38  1.1    mrg  * Redistribution and use in source and binary forms, with or without
     39  1.1    mrg  * modification, are permitted provided that the following conditions
     40  1.1    mrg  * are met:
     41  1.1    mrg  * 1. Redistributions of source code must retain the above copyright
     42  1.1    mrg  *    notice, this list of conditions and the following disclaimer.
     43  1.1    mrg  * 2. Redistributions in binary form must reproduce the above copyright
     44  1.1    mrg  *    notice, this list of conditions and the following disclaimer in the
     45  1.1    mrg  *    documentation and/or other materials provided with the distribution.
     46  1.1    mrg  * 3. All advertising materials mentioning features or use of this software
     47  1.1    mrg  *    must display the following acknowledgement:
     48  1.1    mrg  *        This product includes software developed by the NetBSD
     49  1.1    mrg  *        Foundation, Inc. and its contributors.
     50  1.1    mrg  * 4. Neither the name of The NetBSD Foundation nor the names of its
     51  1.1    mrg  *    contributors may be used to endorse or promote products derived
     52  1.1    mrg  *    from this software without specific prior written permission.
     53  1.1    mrg  *
     54  1.1    mrg  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     55  1.1    mrg  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     56  1.1    mrg  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     57  1.1    mrg  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     58  1.1    mrg  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     59  1.1    mrg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     60  1.1    mrg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     61  1.1    mrg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     62  1.1    mrg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     63  1.1    mrg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     64  1.1    mrg  * POSSIBILITY OF SUCH DAMAGE.
     65  1.1    mrg  */
     66  1.1    mrg 
     67  1.1    mrg /*
     68  1.1    mrg  * Copyright (c) 1991 The Regents of the University of California.
     69  1.1    mrg  * All rights reserved.
     70  1.1    mrg  *
     71  1.1    mrg  * Redistribution and use in source and binary forms, with or without
     72  1.1    mrg  * modification, are permitted provided that the following conditions
     73  1.1    mrg  * are met:
     74  1.1    mrg  * 1. Redistributions of source code must retain the above copyright
     75  1.1    mrg  *    notice, this list of conditions and the following disclaimer.
     76  1.1    mrg  * 2. Redistributions in binary form must reproduce the above copyright
     77  1.1    mrg  *    notice, this list of conditions and the following disclaimer in the
     78  1.1    mrg  *    documentation and/or other materials provided with the distribution.
     79  1.1    mrg  * 3. All advertising materials mentioning features or use of this software
     80  1.1    mrg  *    must display the following acknowledgement:
     81  1.1    mrg  *	This product includes software developed by the University of
     82  1.1    mrg  *	California, Berkeley and its contributors.
     83  1.1    mrg  * 4. Neither the name of the University nor the names of its contributors
     84  1.1    mrg  *    may be used to endorse or promote products derived from this software
     85  1.1    mrg  *    without specific prior written permission.
     86  1.1    mrg  *
     87  1.1    mrg  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     88  1.1    mrg  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     89  1.1    mrg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     90  1.1    mrg  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     91  1.1    mrg  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     92  1.1    mrg  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     93  1.1    mrg  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     94  1.1    mrg  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     95  1.1    mrg  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     96  1.1    mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     97  1.1    mrg  * SUCH DAMAGE.
     98  1.1    mrg  *
     99  1.1    mrg  *	@(#)com.c	7.5 (Berkeley) 5/16/91
    100  1.1    mrg  */
    101  1.1    mrg 
    102  1.1    mrg /*
    103  1.1    mrg  * cirrus logic CL-CD180/CD1864/CD1865 driver, based in (large) parts on
    104  1.1    mrg  * the com and z8530 drivers.  thanks charles.
    105  1.1    mrg  */
    106  1.2  lukem 
    107  1.2  lukem #include <sys/cdefs.h>
    108  1.2  lukem __KERNEL_RCSID(0, "$NetBSD: cd18xx.c,v 1.2 2001/11/13 13:14:35 lukem Exp $");
    109  1.1    mrg 
    110  1.1    mrg #include <sys/param.h>
    111  1.1    mrg #include <sys/conf.h>
    112  1.1    mrg #include <sys/device.h>
    113  1.1    mrg #include <sys/systm.h>
    114  1.1    mrg #include <sys/malloc.h>
    115  1.1    mrg #include <sys/proc.h>
    116  1.1    mrg #include <sys/kernel.h>
    117  1.1    mrg #include <sys/tty.h>
    118  1.1    mrg #include <sys/fcntl.h>
    119  1.1    mrg 
    120  1.1    mrg #include <machine/bus.h>
    121  1.1    mrg 
    122  1.1    mrg #include <dev/ic/cd18xxvar.h>
    123  1.1    mrg #include <dev/ic/cd18xxreg.h>
    124  1.1    mrg 
    125  1.1    mrg #include "ioconf.h"
    126  1.1    mrg 
    127  1.1    mrg /*
    128  1.1    mrg  * some helpers
    129  1.1    mrg  */
    130  1.1    mrg 
    131  1.1    mrg /* macros to clear/set/test flags. */
    132  1.1    mrg #define SET(t, f)	(t) |= (f)
    133  1.1    mrg #define CLR(t, f)	(t) &= ~(f)
    134  1.1    mrg #define ISSET(t, f)	((t) & (f))
    135  1.1    mrg 
    136  1.1    mrg static void	cdtty_attach(struct cd18xx_softc *, int);
    137  1.1    mrg 
    138  1.1    mrg static __inline void cd18xx_rint(struct cd18xx_softc *, int *);
    139  1.1    mrg static __inline void cd18xx_tint(struct cd18xx_softc *, int *);
    140  1.1    mrg static __inline void cd18xx_mint(struct cd18xx_softc *, int *);
    141  1.1    mrg 
    142  1.1    mrg void cdtty_rxsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    143  1.1    mrg void cdtty_txsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    144  1.1    mrg void cdtty_stsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *);
    145  1.1    mrg void cd18xx_softintr(void *);
    146  1.1    mrg 
    147  1.1    mrg cdev_decl(cdtty);
    148  1.1    mrg 
    149  1.1    mrg static void	cdtty_shutdown(struct cd18xx_softc *, struct cdtty_port*);
    150  1.1    mrg static void	cdttystart(struct tty *);
    151  1.1    mrg static int	cdttyparam(struct tty *, struct termios *);
    152  1.1    mrg static void	cdtty_break(struct cd18xx_softc *, struct cdtty_port *, int);
    153  1.1    mrg static void	cdtty_modem(struct cd18xx_softc *, struct cdtty_port *, int);
    154  1.1    mrg static int	cdttyhwiflow(struct tty *, int);
    155  1.1    mrg static void	cdtty_hwiflow(struct cd18xx_softc *, struct cdtty_port *);
    156  1.1    mrg 
    157  1.1    mrg static void	cdtty_loadchannelregs(struct cd18xx_softc *,
    158  1.1    mrg 					   struct cdtty_port *);
    159  1.1    mrg 
    160  1.1    mrg /* default read buffer size */
    161  1.1    mrg u_int cdtty_rbuf_size = CDTTY_RING_SIZE;
    162  1.1    mrg 
    163  1.1    mrg /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    164  1.1    mrg u_int cdtty_rbuf_hiwat = (CDTTY_RING_SIZE * 1) / 4;
    165  1.1    mrg u_int cdtty_rbuf_lowat = (CDTTY_RING_SIZE * 3) / 4;
    166  1.1    mrg 
    167  1.1    mrg #define CD18XXDEBUG
    168  1.1    mrg #ifdef CD18XXDEBUG
    169  1.1    mrg #define CDD_INFO	0x0001
    170  1.1    mrg #define CDD_INTR	0x0002
    171  1.1    mrg int cd18xx_debug = CDD_INTR|CDD_INFO;
    172  1.1    mrg # define DPRINTF(l, x)	if (cd18xx_debug & l) printf x
    173  1.1    mrg #else
    174  1.1    mrg # define DPRINTF(l, x)	/* nothing */
    175  1.1    mrg #endif
    176  1.1    mrg 
    177  1.1    mrg /* Known supported revisions. */
    178  1.1    mrg struct cd18xx_revs {
    179  1.1    mrg 	u_char	revision;
    180  1.1    mrg 	u_char	onehundred_pin;
    181  1.1    mrg 	char	*name;
    182  1.1    mrg } cd18xx_revs[] = {
    183  1.1    mrg 	{ CD180_GFRCR_REV_B,		0, "CL-CD180 rev. B" },
    184  1.1    mrg 	{ CD180_GFRCR_REV_C,		0, "CL-CD180 rev. C" },
    185  1.1    mrg 	{ CD1864_GFRCR_REVISION_A,	1, "CL-CD1864 rev. A" },
    186  1.1    mrg 	{ CD1865_GFRCR_REVISION_A,	1, "CL-CD1865 rev. A" },
    187  1.1    mrg 	{ CD1865_GFRCR_REVISION_B,	1, "CL-CD1865 rev. B" },
    188  1.1    mrg 	{ CD1865_GFRCR_REVISION_C,	1, "CL-CD1865 rev. C" },
    189  1.1    mrg 	{ 0, 0, 0 }
    190  1.1    mrg };
    191  1.1    mrg 
    192  1.1    mrg /* wait for the CCR to go to zero */
    193  1.1    mrg static __inline int cd18xx_wait_ccr(struct cd18xx_softc *);
    194  1.1    mrg static __inline int
    195  1.1    mrg cd18xx_wait_ccr(sc)
    196  1.1    mrg 	struct cd18xx_softc *sc;
    197  1.1    mrg {
    198  1.1    mrg 	int i = 100000;
    199  1.1    mrg 
    200  1.1    mrg 	while (--i &&
    201  1.1    mrg 	    bus_space_read_1(sc->sc_tag, sc->sc_handle, CD18xx_CCR) == 0)
    202  1.1    mrg 		break;
    203  1.1    mrg 	return (i == 0);
    204  1.1    mrg }
    205  1.1    mrg 
    206  1.1    mrg /*
    207  1.1    mrg  * device attach routine, high-end portion
    208  1.1    mrg  */
    209  1.1    mrg void
    210  1.1    mrg cd18xx_attach(sc)
    211  1.1    mrg 	struct cd18xx_softc *sc;
    212  1.1    mrg {
    213  1.1    mrg 	static int chip_id_next = 1;
    214  1.1    mrg 	int onehundred_pin, revision, i, port;
    215  1.1    mrg 
    216  1.1    mrg 	/* read and print the revision */
    217  1.1    mrg 	revision = cd18xx_read(sc, CD18xx_GFRCR);
    218  1.1    mrg 	onehundred_pin = ISSET(cd18xx_read(sc, CD18xx_SRCR),CD18xx_SRCR_PKGTYP);
    219  1.1    mrg 	for (i = 0; cd18xx_revs[i].name; i++)
    220  1.1    mrg 		if (revision == cd18xx_revs[i].revision ||
    221  1.1    mrg 		    onehundred_pin == cd18xx_revs[i].onehundred_pin) {
    222  1.1    mrg 			printf(": %s", cd18xx_revs[i].name);
    223  1.1    mrg 			break;
    224  1.1    mrg 		}
    225  1.1    mrg 
    226  1.1    mrg 	if (cd18xx_revs[i].name == NULL) {
    227  1.1    mrg 		printf("%s: unknown revision, bailing.\n", sc->sc_dev.dv_xname);
    228  1.1    mrg 		return;
    229  1.1    mrg 	}
    230  1.1    mrg 
    231  1.1    mrg 	/* prepare for reset */
    232  1.1    mrg 	cd18xx_set_car(sc, 0);
    233  1.1    mrg 	cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_CLEAR);
    234  1.1    mrg 
    235  1.1    mrg 	/* wait for CCR to go to zero */
    236  1.1    mrg 	if (cd18xx_wait_ccr(sc)) {
    237  1.1    mrg 		printf("cd18xx_attach: reset change command timed out\n");
    238  1.1    mrg 		return;
    239  1.1    mrg 	}
    240  1.1    mrg 
    241  1.1    mrg 	/* full reset of all channels */
    242  1.1    mrg 	cd18xx_write(sc, CD18xx_CCR,
    243  1.1    mrg 	    CD18xx_CCR_RESET|CD18xx_CCR_RESET_HARD);
    244  1.1    mrg 
    245  1.1    mrg 	/* loop until the GSVR is ready */
    246  1.1    mrg 	i = 100000;
    247  1.1    mrg 	while (--i && cd18xx_read(sc, CD18xx_GSVR) == CD18xx_GSVR_READY)
    248  1.1    mrg 		;
    249  1.1    mrg 	if (i == 0) {
    250  1.1    mrg 		printf("\n%s: did not reset!\n", sc->sc_dev.dv_xname);
    251  1.1    mrg 		return;
    252  1.1    mrg 	}
    253  1.1    mrg 
    254  1.1    mrg 	/* write the chip_id */
    255  1.1    mrg 	sc->sc_chip_id = chip_id_next++;
    256  1.1    mrg #ifdef DIAGNOSTIC
    257  1.1    mrg 	if (sc->sc_chip_id > 31)
    258  1.1    mrg 		panic("more than 31 cd18xx's?  help.");
    259  1.1    mrg #endif
    260  1.1    mrg 	cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_SETID(sc));
    261  1.1    mrg 
    262  1.1    mrg 	/* rx/tx/modem service match vectors, initalised by higher level */
    263  1.1    mrg 	cd18xx_write(sc, CD18xx_MSMR, sc->sc_msmr | 0x80);
    264  1.1    mrg 	cd18xx_write(sc, CD18xx_TSMR, sc->sc_tsmr | 0x80);
    265  1.1    mrg 	cd18xx_write(sc, CD18xx_RSMR, sc->sc_rsmr | 0x80);
    266  1.1    mrg 
    267  1.1    mrg 	printf(", gsvr %x msmr %x tsmr %x rsmr %x",
    268  1.1    mrg 	    cd18xx_read(sc, CD18xx_GSVR),
    269  1.1    mrg 	    cd18xx_read(sc, CD18xx_MSMR),
    270  1.1    mrg 	    cd18xx_read(sc, CD18xx_TSMR),
    271  1.1    mrg 	    cd18xx_read(sc, CD18xx_RSMR));
    272  1.1    mrg 
    273  1.1    mrg 	/* prescale registers */
    274  1.1    mrg 	sc->sc_pprh = 0xf0;
    275  1.1    mrg 	sc->sc_pprl = 0;
    276  1.1    mrg 	cd18xx_write(sc, CD18xx_PPRH, sc->sc_pprh);
    277  1.1    mrg 	cd18xx_write(sc, CD18xx_PPRL, sc->sc_pprl);
    278  1.1    mrg 
    279  1.1    mrg 	/* establish our soft interrupt. */
    280  1.1    mrg 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, cd18xx_softintr, sc);
    281  1.1    mrg 
    282  1.1    mrg 	printf(", 8 ports ready (chip id %d)\n", sc->sc_chip_id);
    283  1.1    mrg 
    284  1.1    mrg 	/*
    285  1.1    mrg 	 * finally, we loop over all 8 channels initialising them
    286  1.1    mrg 	 */
    287  1.1    mrg 	for (port = 0; port < 8; port++)
    288  1.1    mrg 		cdtty_attach(sc, port);
    289  1.1    mrg }
    290  1.1    mrg 
    291  1.1    mrg /* tty portion of the code */
    292  1.1    mrg 
    293  1.1    mrg /*
    294  1.1    mrg  * tty portion attach routine
    295  1.1    mrg  */
    296  1.1    mrg void
    297  1.1    mrg cdtty_attach(sc, port)
    298  1.1    mrg 	struct	cd18xx_softc *sc;
    299  1.1    mrg 	int port;
    300  1.1    mrg {
    301  1.1    mrg 	struct cdtty_port *p = &sc->sc_ports[port];
    302  1.1    mrg 	int i;
    303  1.1    mrg 
    304  1.1    mrg 	/* load CAR with channel number */
    305  1.1    mrg 	cd18xx_set_car(sc, port);
    306  1.1    mrg 
    307  1.1    mrg 	/* wait for CCR to go to zero */
    308  1.1    mrg 	if (cd18xx_wait_ccr(sc)) {
    309  1.1    mrg 		printf("cd18xx_attach: change command timed out setting "
    310  1.1    mrg 		       "CAR for port %d\n", i);
    311  1.1    mrg 		return;
    312  1.1    mrg 	}
    313  1.1    mrg 
    314  1.1    mrg 	/* set the RPTR to (arbitrary) 8 */
    315  1.1    mrg 	cd18xx_write(sc, CD18xx_RTPR, 8);
    316  1.1    mrg 
    317  1.1    mrg 	/* reset the modem signal value register */
    318  1.1    mrg 	sc->sc_ports[port].p_msvr = CD18xx_MSVR_RESET;
    319  1.1    mrg 
    320  1.1    mrg 	/* zero the service request enable register */
    321  1.1    mrg 	cd18xx_write(sc, CD18xx_SRER, 0);
    322  1.1    mrg 
    323  1.1    mrg 	/* enable the transmitter & receiver */
    324  1.1    mrg 	SET(p->p_chanctl, CD18xx_CCR_CHANCTL |
    325  1.1    mrg 		          CD18xx_CCR_CHANCTL_TxEN |
    326  1.1    mrg 		          CD18xx_CCR_CHANCTL_RxEN);
    327  1.1    mrg 
    328  1.1    mrg 	/* XXX no console or kgdb support yet! */
    329  1.1    mrg 
    330  1.1    mrg 	/* get a tty structure */
    331  1.1    mrg 	p->p_tty = ttymalloc();
    332  1.1    mrg 	p->p_tty->t_oproc = cdttystart;
    333  1.1    mrg 	p->p_tty->t_param = cdttyparam;
    334  1.1    mrg 	p->p_tty->t_hwiflow = cdttyhwiflow;
    335  1.1    mrg 
    336  1.1    mrg 	p->p_rbuf = malloc(cdtty_rbuf_size << 1, M_DEVBUF, M_WAITOK);
    337  1.1    mrg 	p->p_rbput = p->p_rbget = p->p_rbuf;
    338  1.1    mrg 	p->p_rbavail = cdtty_rbuf_size;
    339  1.1    mrg 	if (p->p_rbuf == NULL) {
    340  1.1    mrg 		printf("%s: unable to allocate ring buffer for tty %d\n",
    341  1.1    mrg 		    sc->sc_dev.dv_xname, port);
    342  1.1    mrg 		return;
    343  1.1    mrg 	}
    344  1.1    mrg 	p->p_ebuf = p->p_rbuf + (cdtty_rbuf_size << 1);
    345  1.1    mrg 
    346  1.1    mrg 	tty_attach(p->p_tty);
    347  1.1    mrg }
    348  1.1    mrg 
    349  1.1    mrg /*
    350  1.1    mrg  * below here are the tty portion device routines.
    351  1.1    mrg  */
    352  1.1    mrg void
    353  1.1    mrg cdtty_shutdown(sc, p)
    354  1.1    mrg 	struct cd18xx_softc *sc;
    355  1.1    mrg 	struct cdtty_port *p;
    356  1.1    mrg {
    357  1.1    mrg 	struct tty *tp = p->p_tty;
    358  1.1    mrg 	int s;
    359  1.1    mrg 
    360  1.1    mrg 	s = splserial();
    361  1.1    mrg 
    362  1.1    mrg 	/* If we were asserting flow control, then deassert it. */
    363  1.1    mrg 	SET(p->p_rx_flags, RX_IBUF_BLOCKED);
    364  1.1    mrg 	cdtty_hwiflow(sc, p);
    365  1.1    mrg 
    366  1.1    mrg 	/* Clear any break condition set with TIOCSBRK. */
    367  1.1    mrg 	cdtty_break(sc, p, 0);
    368  1.1    mrg 
    369  1.1    mrg 	/*
    370  1.1    mrg 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    371  1.1    mrg 	 * notice even if we immediately open the port again.
    372  1.1    mrg 	 * Avoid tsleeping above splhigh().
    373  1.1    mrg 	 */
    374  1.1    mrg 	if (ISSET(tp->t_cflag, HUPCL)) {
    375  1.1    mrg 		cdtty_modem(sc, p, 0);
    376  1.1    mrg 		splx(s);
    377  1.1    mrg 		/* XXX tsleep will only timeout */
    378  1.1    mrg 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    379  1.1    mrg 		s = splserial();
    380  1.1    mrg 	}
    381  1.1    mrg 
    382  1.1    mrg 	/* Turn off interrupts. */
    383  1.1    mrg 	p->p_srer = 0;
    384  1.1    mrg 	cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    385  1.1    mrg 
    386  1.1    mrg 	splx(s);
    387  1.1    mrg }
    388  1.1    mrg 
    389  1.1    mrg /*
    390  1.1    mrg  * cdttyopen:  open syscall for cdtty terminals..
    391  1.1    mrg  */
    392  1.1    mrg int
    393  1.1    mrg cdttyopen(dev, flag, mode, p)
    394  1.1    mrg 	dev_t dev;
    395  1.1    mrg 	int flag;
    396  1.1    mrg 	int mode;
    397  1.1    mrg 	struct proc *p;
    398  1.1    mrg {
    399  1.1    mrg 	struct tty *tp;
    400  1.1    mrg 	struct cd18xx_softc *sc;
    401  1.1    mrg 	struct cdtty_port *port;
    402  1.1    mrg 	int channel, instance, s, error;
    403  1.1    mrg 
    404  1.1    mrg 	channel = CD18XX_CHANNEL(dev);
    405  1.1    mrg 	instance = CD18XX_INSTANCE(dev);
    406  1.1    mrg 
    407  1.1    mrg 	/* ensure instance is valid */
    408  1.1    mrg 	if (instance >= clcd_cd.cd_ndevs)
    409  1.1    mrg 		return (ENXIO);
    410  1.1    mrg 
    411  1.1    mrg 	/* get softc and port */
    412  1.1    mrg 	sc = clcd_cd.cd_devs[instance];
    413  1.1    mrg 	if (sc == NULL)
    414  1.1    mrg 		return (ENXIO);
    415  1.1    mrg 	port = &sc->sc_ports[channel];
    416  1.1    mrg 	if (port == NULL || port->p_rbuf == NULL)
    417  1.1    mrg 		return (ENXIO);
    418  1.1    mrg 
    419  1.1    mrg 	/* kgdb support?  maybe later... */
    420  1.1    mrg 
    421  1.1    mrg 	tp = port->p_tty;
    422  1.1    mrg 
    423  1.1    mrg 	/* enforce exclude */
    424  1.1    mrg 	if (tp == NULL ||
    425  1.1    mrg 	    (ISSET(tp->t_state, TS_ISOPEN) &&
    426  1.1    mrg 	    ISSET(tp->t_state, TS_XCLUDE) &&
    427  1.1    mrg 	    (p->p_ucred->cr_uid != 0)))
    428  1.1    mrg 		return (EBUSY);
    429  1.1    mrg 
    430  1.1    mrg 	s = spltty();
    431  1.1    mrg 
    432  1.1    mrg 	/*
    433  1.1    mrg 	 * Do the following iff this is a first open.
    434  1.1    mrg 	 */
    435  1.1    mrg 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    436  1.1    mrg 		struct termios t;
    437  1.1    mrg 
    438  1.1    mrg 		/* set up things in tp as necessary */
    439  1.1    mrg 		tp->t_dev = dev;
    440  1.1    mrg 
    441  1.1    mrg 		/*
    442  1.1    mrg 		 * Initialize the termios status to the defaults.  Add in the
    443  1.1    mrg 		 * sticky bits from TIOCSFLAGS.
    444  1.1    mrg 		 */
    445  1.1    mrg 		t.c_ispeed = 0;
    446  1.1    mrg 		t.c_ospeed = TTYDEF_SPEED;
    447  1.1    mrg 		t.c_cflag = TTYDEF_CFLAG;
    448  1.1    mrg 
    449  1.1    mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CLOCAL))
    450  1.1    mrg 			SET(t.c_cflag, CLOCAL);
    451  1.1    mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CRTSCTS))
    452  1.1    mrg 			SET(t.c_cflag, CRTSCTS);
    453  1.1    mrg 		if (ISSET(port->p_swflags, TIOCFLAG_CDTRCTS))
    454  1.1    mrg 			SET(t.c_cflag, CDTRCTS);
    455  1.1    mrg 		if (ISSET(port->p_swflags, TIOCFLAG_MDMBUF))
    456  1.1    mrg 			SET(t.c_cflag, MDMBUF);
    457  1.1    mrg 
    458  1.1    mrg 		/* Make sure param will see changes. */
    459  1.1    mrg 		tp->t_ospeed = 0;
    460  1.1    mrg 		(void)cdttyparam(tp, &t);
    461  1.1    mrg 
    462  1.1    mrg 		tp->t_iflag = TTYDEF_IFLAG;
    463  1.1    mrg 		tp->t_oflag = TTYDEF_OFLAG;
    464  1.1    mrg 		tp->t_lflag = TTYDEF_LFLAG;
    465  1.1    mrg 		ttychars(tp);
    466  1.1    mrg 		ttsetwater(tp);
    467  1.1    mrg 
    468  1.1    mrg 		(void)splserial();
    469  1.1    mrg 
    470  1.1    mrg 		/* turn on rx and modem interrupts */
    471  1.1    mrg 		cd18xx_set_car(sc, CD18XX_CHANNEL(dev));
    472  1.1    mrg 		SET(port->p_srer, CD18xx_SRER_Rx |
    473  1.1    mrg 				  CD18xx_SRER_RxSC |
    474  1.1    mrg 				  CD18xx_SRER_CD);
    475  1.1    mrg 		cd18xx_write(sc, CD18xx_SRER, port->p_srer);
    476  1.1    mrg 
    477  1.1    mrg 		/* always turn on DTR when open */
    478  1.1    mrg 		cdtty_modem(sc, port, 1);
    479  1.1    mrg 
    480  1.1    mrg 		/* initialise ring buffer */
    481  1.1    mrg 		port->p_rbget = port->p_rbput = port->p_rbuf;
    482  1.1    mrg 		port->p_rbavail = cdtty_rbuf_size;
    483  1.1    mrg 		CLR(port->p_rx_flags, RX_ANY_BLOCK);
    484  1.1    mrg 		cdtty_hwiflow(sc, port);
    485  1.1    mrg 	}
    486  1.1    mrg 
    487  1.1    mrg 	/* drop spl back before going into the line open */
    488  1.1    mrg 	splx(s);
    489  1.1    mrg 
    490  1.1    mrg 	error = ttyopen(tp, CD18XX_DIALOUT(dev), ISSET(flag, O_NONBLOCK));
    491  1.1    mrg 	if (error == 0)
    492  1.1    mrg 		error = (*tp->t_linesw->l_open)(dev, tp);
    493  1.1    mrg 
    494  1.1    mrg 	return (error);
    495  1.1    mrg }
    496  1.1    mrg 
    497  1.1    mrg /*
    498  1.1    mrg  * cdttyclose:  close syscall for cdtty terminals..
    499  1.1    mrg  */
    500  1.1    mrg int
    501  1.1    mrg cdttyclose(dev, flag, mode, p)
    502  1.1    mrg 	dev_t dev;
    503  1.1    mrg 	int flag;
    504  1.1    mrg 	int mode;
    505  1.1    mrg 	struct proc *p;
    506  1.1    mrg {
    507  1.1    mrg 	struct cd18xx_softc *sc;
    508  1.1    mrg 	struct cdtty_port *port;
    509  1.1    mrg 	struct tty *tp;
    510  1.1    mrg 	int channel, instance;
    511  1.1    mrg 
    512  1.1    mrg 	channel = CD18XX_CHANNEL(dev);
    513  1.1    mrg 	instance = CD18XX_INSTANCE(dev);
    514  1.1    mrg 
    515  1.1    mrg 	/* ensure instance is valid */
    516  1.1    mrg 	if (instance >= clcd_cd.cd_ndevs)
    517  1.1    mrg 		return (ENXIO);
    518  1.1    mrg 
    519  1.1    mrg 	/* get softc and port */
    520  1.1    mrg 	sc = clcd_cd.cd_devs[instance];
    521  1.1    mrg 	if (sc == NULL)
    522  1.1    mrg 		return (ENXIO);
    523  1.1    mrg 	port = &sc->sc_ports[channel];
    524  1.1    mrg 
    525  1.1    mrg 	tp = port->p_tty;
    526  1.1    mrg 
    527  1.1    mrg 	(*tp->t_linesw->l_close)(tp, flag);
    528  1.1    mrg 	ttyclose(tp);
    529  1.1    mrg 
    530  1.1    mrg 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    531  1.1    mrg 		/*
    532  1.1    mrg 		 * Although we got a last close, the device may still be in
    533  1.1    mrg 		 * use; e.g. if this was the dialout node, and there are still
    534  1.1    mrg 		 * processes waiting for carrier on the non-dialout node.
    535  1.1    mrg 		 */
    536  1.1    mrg 		cdtty_shutdown(sc, port);
    537  1.1    mrg 	}
    538  1.1    mrg 
    539  1.1    mrg 	return (0);
    540  1.1    mrg }
    541  1.1    mrg 
    542  1.1    mrg /*
    543  1.1    mrg  * cdttyread:  read syscall for cdtty terminals..
    544  1.1    mrg  */
    545  1.1    mrg int
    546  1.1    mrg cdttyread(dev, uio, flag)
    547  1.1    mrg 	dev_t dev;
    548  1.1    mrg 	struct uio *uio;
    549  1.1    mrg 	int flag;
    550  1.1    mrg {
    551  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    552  1.1    mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    553  1.1    mrg 	struct tty *tp = port->p_tty;
    554  1.1    mrg 
    555  1.1    mrg 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    556  1.1    mrg }
    557  1.1    mrg 
    558  1.1    mrg /*
    559  1.1    mrg  * cdttywrite:  write syscall for cdtty terminals..
    560  1.1    mrg  */
    561  1.1    mrg int
    562  1.1    mrg cdttywrite(dev, uio, flag)
    563  1.1    mrg 	dev_t dev;
    564  1.1    mrg 	struct uio *uio;
    565  1.1    mrg 	int flag;
    566  1.1    mrg {
    567  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    568  1.1    mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    569  1.1    mrg 	struct tty *tp = port->p_tty;
    570  1.1    mrg 
    571  1.1    mrg 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    572  1.1    mrg }
    573  1.1    mrg 
    574  1.1    mrg int
    575  1.1    mrg cdttypoll(dev, events, p)
    576  1.1    mrg 	dev_t dev;
    577  1.1    mrg 	int events;
    578  1.1    mrg 	struct proc *p;
    579  1.1    mrg {
    580  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    581  1.1    mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    582  1.1    mrg 	struct tty *tp = port->p_tty;
    583  1.1    mrg 
    584  1.1    mrg 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    585  1.1    mrg }
    586  1.1    mrg 
    587  1.1    mrg /*
    588  1.1    mrg  * cdttytty:  return a pointer to our (cdtty) tp.
    589  1.1    mrg  */
    590  1.1    mrg struct tty *
    591  1.1    mrg cdttytty(dev)
    592  1.1    mrg 	dev_t dev;
    593  1.1    mrg {
    594  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    595  1.1    mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    596  1.1    mrg 
    597  1.1    mrg 	return (port->p_tty);
    598  1.1    mrg }
    599  1.1    mrg 
    600  1.1    mrg /*
    601  1.1    mrg  * cdttyioctl:  ioctl syscall for cdtty terminals..
    602  1.1    mrg  */
    603  1.1    mrg int
    604  1.1    mrg cdttyioctl(dev, cmd, data, flag, p)
    605  1.1    mrg 	dev_t dev;
    606  1.1    mrg 	u_long cmd;
    607  1.1    mrg 	caddr_t data;
    608  1.1    mrg 	int flag;
    609  1.1    mrg 	struct proc *p;
    610  1.1    mrg {
    611  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)];
    612  1.1    mrg 	struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)];
    613  1.1    mrg 	struct tty *tp = port->p_tty;
    614  1.1    mrg 	int error, s;
    615  1.1    mrg 
    616  1.1    mrg 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    617  1.1    mrg 	if (error >= 0)
    618  1.1    mrg 		return (error);
    619  1.1    mrg 
    620  1.1    mrg 	error = ttioctl(tp, cmd, data, flag, p);
    621  1.1    mrg 	if (error >= 0)
    622  1.1    mrg 		return (error);
    623  1.1    mrg 
    624  1.1    mrg 	s = splserial();
    625  1.1    mrg 
    626  1.1    mrg 	switch (cmd) {
    627  1.1    mrg 	case TIOCSBRK:
    628  1.1    mrg 		cdtty_break(sc, port, 1);
    629  1.1    mrg 		break;
    630  1.1    mrg 
    631  1.1    mrg 	case TIOCCBRK:
    632  1.1    mrg 		cdtty_break(sc, port, 0);
    633  1.1    mrg 		break;
    634  1.1    mrg 
    635  1.1    mrg 	case TIOCSDTR:
    636  1.1    mrg 		cdtty_modem(sc, port, 1);
    637  1.1    mrg 		break;
    638  1.1    mrg 
    639  1.1    mrg 	case TIOCCDTR:
    640  1.1    mrg 		cdtty_modem(sc, port, 0);
    641  1.1    mrg 		break;
    642  1.1    mrg 
    643  1.1    mrg 	case TIOCGFLAGS:
    644  1.1    mrg 		*(int *)data = port->p_swflags;
    645  1.1    mrg 		break;
    646  1.1    mrg 
    647  1.1    mrg 	case TIOCSFLAGS:
    648  1.1    mrg 		error = suser(p->p_ucred, &p->p_acflag);
    649  1.1    mrg 		if (error)
    650  1.1    mrg 			return (error);
    651  1.1    mrg 		port->p_swflags = *(int *)data;
    652  1.1    mrg 		break;
    653  1.1    mrg 
    654  1.1    mrg 	case TIOCMSET:
    655  1.1    mrg 	case TIOCMBIS:
    656  1.1    mrg 	case TIOCMBIC:
    657  1.1    mrg 	case TIOCMGET:
    658  1.1    mrg 	default:
    659  1.1    mrg 		return (ENOTTY);
    660  1.1    mrg 	}
    661  1.1    mrg 
    662  1.1    mrg 	splx(s);
    663  1.1    mrg 	return (0);
    664  1.1    mrg }
    665  1.1    mrg 
    666  1.1    mrg /*
    667  1.1    mrg  * Start or restart transmission.
    668  1.1    mrg  */
    669  1.1    mrg static void
    670  1.1    mrg cdttystart(tp)
    671  1.1    mrg 	struct tty *tp;
    672  1.1    mrg {
    673  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    674  1.1    mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    675  1.1    mrg 	int s;
    676  1.1    mrg 
    677  1.1    mrg 	s = spltty();
    678  1.1    mrg 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    679  1.1    mrg 		goto out;
    680  1.1    mrg 	if (p->p_tx_stopped)
    681  1.1    mrg 		goto out;
    682  1.1    mrg 
    683  1.1    mrg 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    684  1.1    mrg 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    685  1.1    mrg 			CLR(tp->t_state, TS_ASLEEP);
    686  1.1    mrg 			wakeup((caddr_t)&tp->t_outq);
    687  1.1    mrg 		}
    688  1.1    mrg 		selwakeup(&tp->t_wsel);
    689  1.1    mrg 		if (tp->t_outq.c_cc == 0)
    690  1.1    mrg 			goto out;
    691  1.1    mrg 	}
    692  1.1    mrg 
    693  1.1    mrg 	/* Grab the first contiguous region of buffer space. */
    694  1.1    mrg 	{
    695  1.1    mrg 		u_char *tba;
    696  1.1    mrg 		int tbc;
    697  1.1    mrg 
    698  1.1    mrg 		tba = tp->t_outq.c_cf;
    699  1.1    mrg 		tbc = ndqb(&tp->t_outq, 0);
    700  1.1    mrg 
    701  1.1    mrg 		(void)splserial();
    702  1.1    mrg 
    703  1.1    mrg 		p->p_tba = tba;
    704  1.1    mrg 		p->p_tbc = tbc;
    705  1.1    mrg 	}
    706  1.1    mrg 
    707  1.1    mrg 	SET(tp->t_state, TS_BUSY);
    708  1.1    mrg 	p->p_tx_busy = 1;
    709  1.1    mrg 
    710  1.1    mrg 	/* turn on tx interrupts */
    711  1.1    mrg 	if ((p->p_srer & CD18xx_SRER_Tx) == 0) {
    712  1.1    mrg 		cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev));
    713  1.1    mrg 		SET(p->p_srer, CD18xx_SRER_Tx);
    714  1.1    mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    715  1.1    mrg 	}
    716  1.1    mrg 
    717  1.1    mrg 	/*
    718  1.1    mrg 	 * Now bail; we can't actually transmit bytes until we're in a
    719  1.1    mrg 	 * transmit interrupt service routine.
    720  1.1    mrg 	 */
    721  1.1    mrg out:
    722  1.1    mrg 	splx(s);
    723  1.1    mrg 	return;
    724  1.1    mrg }
    725  1.1    mrg 
    726  1.1    mrg /*
    727  1.1    mrg  * cdttystop:  handing ^S or other stop signals, for a cdtty
    728  1.1    mrg  */
    729  1.1    mrg void
    730  1.1    mrg cdttystop(tp, flag)
    731  1.1    mrg 	struct tty *tp;
    732  1.1    mrg 	int flag;
    733  1.1    mrg {
    734  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    735  1.1    mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    736  1.1    mrg 	int s;
    737  1.1    mrg 
    738  1.1    mrg 	s = splserial();
    739  1.1    mrg 	if (ISSET(tp->t_state, TS_BUSY)) {
    740  1.1    mrg 		/* Stop transmitting at the next chunk. */
    741  1.1    mrg 		p->p_tbc = 0;
    742  1.1    mrg 		p->p_heldtbc = 0;
    743  1.1    mrg 		if (!ISSET(tp->t_state, TS_TTSTOP))
    744  1.1    mrg 			SET(tp->t_state, TS_FLUSH);
    745  1.1    mrg 	}
    746  1.1    mrg 	splx(s);
    747  1.1    mrg }
    748  1.1    mrg 
    749  1.1    mrg /*
    750  1.1    mrg  * load a channel's registers.
    751  1.1    mrg  */
    752  1.1    mrg void
    753  1.1    mrg cdtty_loadchannelregs(sc, p)
    754  1.1    mrg 	struct cd18xx_softc *sc;
    755  1.1    mrg 	struct cdtty_port *p;
    756  1.1    mrg {
    757  1.1    mrg 
    758  1.1    mrg 	cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev));
    759  1.1    mrg 	cd18xx_write(sc, CD18xx_SRER, p->p_srer);
    760  1.1    mrg 	cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active = p->p_msvr);
    761  1.1    mrg 	cd18xx_write(sc, CD18xx_COR1, p->p_cor1);
    762  1.1    mrg 	cd18xx_write(sc, CD18xx_COR2, p->p_cor2);
    763  1.1    mrg 	cd18xx_write(sc, CD18xx_COR3, p->p_cor3);
    764  1.1    mrg 	/*
    765  1.1    mrg 	 * COR2 and COR3 change commands are not required here for
    766  1.1    mrg 	 * the CL-CD1865 but we do them anyway for simplicity.
    767  1.1    mrg 	 */
    768  1.1    mrg 	cd18xx_write(sc, CD18xx_CCR, CD18xx_CCR_CORCHG |
    769  1.1    mrg 				     CD18xx_CCR_CORCHG_COR1 |
    770  1.1    mrg 				     CD18xx_CCR_CORCHG_COR2 |
    771  1.1    mrg 				     CD18xx_CCR_CORCHG_COR3);
    772  1.1    mrg 	cd18xx_write(sc, CD18xx_RBPRH, p->p_rbprh);
    773  1.1    mrg 	cd18xx_write(sc, CD18xx_RBPRL, p->p_rbprl);
    774  1.1    mrg 	cd18xx_write(sc, CD18xx_TBPRH, p->p_tbprh);
    775  1.1    mrg 	cd18xx_write(sc, CD18xx_TBPRL, p->p_tbprl);
    776  1.1    mrg 	if (cd18xx_wait_ccr(sc)) {
    777  1.1    mrg 		DPRINTF(CDD_INFO,
    778  1.1    mrg 		    ("%s: cdtty_loadchannelregs ccr wait timed out\n",
    779  1.1    mrg 		    sc->sc_dev.dv_xname));
    780  1.1    mrg 	}
    781  1.1    mrg 	cd18xx_write(sc, CD18xx_CCR, p->p_chanctl);
    782  1.1    mrg }
    783  1.1    mrg 
    784  1.1    mrg /*
    785  1.1    mrg  * Set tty parameters from termios.
    786  1.1    mrg  * XXX - Should just copy the whole termios after
    787  1.1    mrg  * making sure all the changes could be done.
    788  1.1    mrg  */
    789  1.1    mrg static int
    790  1.1    mrg cdttyparam(tp, t)
    791  1.1    mrg 	struct tty *tp;
    792  1.1    mrg 	struct termios *t;
    793  1.1    mrg {
    794  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
    795  1.1    mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
    796  1.1    mrg 	int s;
    797  1.1    mrg 
    798  1.1    mrg 	/* Check requested parameters. */
    799  1.1    mrg 	if (t->c_ospeed < 0)
    800  1.1    mrg 		return (EINVAL);
    801  1.1    mrg 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    802  1.1    mrg 		return (EINVAL);
    803  1.1    mrg 
    804  1.1    mrg 	/*
    805  1.1    mrg 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    806  1.1    mrg 	 * is always active.
    807  1.1    mrg 	 */
    808  1.1    mrg 	if (ISSET(p->p_swflags, TIOCFLAG_SOFTCAR)) {
    809  1.1    mrg 		SET(t->c_cflag, CLOCAL);
    810  1.1    mrg 		CLR(t->c_cflag, HUPCL);
    811  1.1    mrg 	}
    812  1.1    mrg 
    813  1.1    mrg 	/*
    814  1.1    mrg 	 * If there were no changes, don't do anything.  This avoids dropping
    815  1.1    mrg 	 * input and improves performance when all we did was frob things like
    816  1.1    mrg 	 * VMIN and VTIME.
    817  1.1    mrg 	 */
    818  1.1    mrg 	if (tp->t_ospeed == t->c_ospeed &&
    819  1.1    mrg 	    tp->t_cflag == t->c_cflag)
    820  1.1    mrg 		return (0);
    821  1.1    mrg 
    822  1.1    mrg 	/*
    823  1.1    mrg 	 * Block interrupts so that state will not
    824  1.1    mrg 	 * be altered until we are done setting it up.
    825  1.1    mrg 	 */
    826  1.1    mrg 	s = splserial();
    827  1.1    mrg 
    828  1.1    mrg 	/*
    829  1.1    mrg 	 * Copy across the size, parity and stop bit info.
    830  1.1    mrg 	 */
    831  1.1    mrg 	switch (t->c_cflag & CSIZE) {
    832  1.1    mrg 	case CS5:
    833  1.1    mrg 		p->p_cor1 = CD18xx_COR1_CS5;
    834  1.1    mrg 		break;
    835  1.1    mrg 	case CS6:
    836  1.1    mrg 		p->p_cor1 = CD18xx_COR1_CS6;
    837  1.1    mrg 		break;
    838  1.1    mrg 	case CS7:
    839  1.1    mrg 		p->p_cor1 = CD18xx_COR1_CS7;
    840  1.1    mrg 		break;
    841  1.1    mrg 	default:
    842  1.1    mrg 		p->p_cor1 = CD18xx_COR1_CS8;
    843  1.1    mrg 		break;
    844  1.1    mrg 	}
    845  1.1    mrg 	if (ISSET(t->c_cflag, PARENB)) {
    846  1.1    mrg 		SET(p->p_cor1, CD18xx_COR1_PARITY_NORMAL);
    847  1.1    mrg 		if (ISSET(t->c_cflag, PARODD))
    848  1.1    mrg 			SET(p->p_cor1, CD18xx_COR1_PARITY_ODD);
    849  1.1    mrg 	}
    850  1.1    mrg 	if (!ISSET(t->c_iflag, INPCK))
    851  1.1    mrg 		SET(p->p_cor1, CD18xx_COR1_IGNORE);
    852  1.1    mrg 	if (ISSET(t->c_cflag, CSTOPB))
    853  1.1    mrg 		SET(p->p_cor1, CD18xx_COR1_STOPBIT_2);
    854  1.1    mrg 
    855  1.1    mrg 	/*
    856  1.1    mrg 	 * If we're not in a mode that assumes a connection is present, then
    857  1.1    mrg 	 * ignore carrier changes.
    858  1.1    mrg 	 */
    859  1.1    mrg 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
    860  1.1    mrg 		p->p_msvr_dcd = 0;
    861  1.1    mrg 	else
    862  1.1    mrg 		p->p_msvr_dcd = CD18xx_MSVR_CD;
    863  1.1    mrg 
    864  1.1    mrg 	/*
    865  1.1    mrg 	 * Set the flow control pins depending on the current flow control
    866  1.1    mrg 	 * mode.
    867  1.1    mrg 	 */
    868  1.1    mrg 	if (ISSET(t->c_cflag, CRTSCTS)) {
    869  1.1    mrg 		p->p_mcor1_dtr = CD18xx_MCOR1_DTR;
    870  1.1    mrg 		p->p_msvr_rts = CD18xx_MSVR_RTS;
    871  1.1    mrg 		p->p_msvr_cts = CD18xx_MSVR_CTS;
    872  1.1    mrg 		p->p_cor2 = CD18xx_COR2_RTSAOE|CD18xx_COR2_CTSAE;
    873  1.1    mrg 	} else if (ISSET(t->c_cflag, MDMBUF)) {
    874  1.1    mrg 		/*
    875  1.1    mrg 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
    876  1.1    mrg 		 * carrier detection.
    877  1.1    mrg 		 */
    878  1.1    mrg 		p->p_mcor1_dtr = 0;
    879  1.1    mrg 		p->p_msvr_rts = CD18xx_MSVR_DTR;
    880  1.1    mrg 		p->p_msvr_cts = CD18xx_MSVR_CD;
    881  1.1    mrg 		p->p_cor2 = 0;
    882  1.1    mrg 	} else {
    883  1.1    mrg 		/*
    884  1.1    mrg 		 * If no flow control, then always set RTS.  This will make
    885  1.1    mrg 		 * the other side happy if it mistakenly thinks we're doing
    886  1.1    mrg 		 * RTS/CTS flow control.
    887  1.1    mrg 		 */
    888  1.1    mrg 		p->p_mcor1_dtr = CD18xx_MSVR_DTR;
    889  1.1    mrg 		p->p_msvr_rts = 0;
    890  1.1    mrg 		p->p_msvr_cts = 0;
    891  1.1    mrg 		p->p_cor2 = 0;
    892  1.1    mrg 	}
    893  1.1    mrg 	p->p_msvr_mask = p->p_msvr_cts | p->p_msvr_dcd;
    894  1.1    mrg 
    895  1.1    mrg 	/*
    896  1.1    mrg 	 * Set the FIFO threshold based on the receive speed.
    897  1.1    mrg 	 *
    898  1.1    mrg 	 *  * If it's a low speed, it's probably a mouse or some other
    899  1.1    mrg 	 *    interactive device, so set the threshold low.
    900  1.1    mrg 	 *  * If it's a high speed, trim the trigger level down to prevent
    901  1.1    mrg 	 *    overflows.
    902  1.1    mrg 	 *  * Otherwise set it a bit higher.
    903  1.1    mrg 	 */
    904  1.1    mrg 	p->p_cor3 = (t->c_ospeed <= 1200 ? 1 :
    905  1.1    mrg 			 t->c_ospeed <= 38400 ? 8 : 4);
    906  1.1    mrg 
    907  1.1    mrg #define PORT_RATE(o, s)	\
    908  1.1    mrg 	(((((o) + (s)/2) / (s)) + CD18xx_xBRPR_TPC/2) / CD18xx_xBRPR_TPC)
    909  1.1    mrg 	/* Compute BPS for the requested speeds */
    910  1.1    mrg 	if (t->c_ospeed) {
    911  1.1    mrg 		u_int32_t tbpr = PORT_RATE(sc->sc_osc, t->c_ospeed);
    912  1.1    mrg 
    913  1.1    mrg 		if (tbpr == 0 || tbpr > 0xffff)
    914  1.1    mrg 			return (EINVAL);
    915  1.1    mrg 
    916  1.1    mrg 		p->p_tbprh = tbpr >> 8;
    917  1.1    mrg 		p->p_tbprl = tbpr & 0xff;
    918  1.1    mrg 	}
    919  1.1    mrg 
    920  1.1    mrg 	if (t->c_ispeed) {
    921  1.1    mrg 		u_int32_t rbpr = PORT_RATE(sc->sc_osc, t->c_ispeed);
    922  1.1    mrg 
    923  1.1    mrg 		if (rbpr == 0 || rbpr > 0xffff)
    924  1.1    mrg 			return (EINVAL);
    925  1.1    mrg 
    926  1.1    mrg 		p->p_rbprh = rbpr >> 8;
    927  1.1    mrg 		p->p_rbprl = rbpr & 0xff;
    928  1.1    mrg 	}
    929  1.1    mrg 
    930  1.1    mrg 	/* And copy to tty. */
    931  1.1    mrg 	tp->t_ispeed = 0;
    932  1.1    mrg 	tp->t_ospeed = t->c_ospeed;
    933  1.1    mrg 	tp->t_cflag = t->c_cflag;
    934  1.1    mrg 
    935  1.1    mrg 	if (!p->p_heldchange) {
    936  1.1    mrg 		if (p->p_tx_busy) {
    937  1.1    mrg 			p->p_heldtbc = p->p_tbc;
    938  1.1    mrg 			p->p_tbc = 0;
    939  1.1    mrg 			p->p_heldchange = 1;
    940  1.1    mrg 		} else
    941  1.1    mrg 			cdtty_loadchannelregs(sc, p);
    942  1.1    mrg 	}
    943  1.1    mrg 
    944  1.1    mrg 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    945  1.1    mrg 		/* Disable the high water mark. */
    946  1.1    mrg 		p->p_r_hiwat = 0;
    947  1.1    mrg 		p->p_r_lowat = 0;
    948  1.1    mrg 		if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
    949  1.1    mrg 			CLR(p->p_rx_flags, RX_TTY_OVERFLOWED);
    950  1.1    mrg 			softintr_schedule(sc->sc_si);
    951  1.1    mrg 		}
    952  1.1    mrg 		if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
    953  1.1    mrg 			CLR(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
    954  1.1    mrg 			cdtty_hwiflow(sc, p);
    955  1.1    mrg 		}
    956  1.1    mrg 	} else {
    957  1.1    mrg 		p->p_r_hiwat = cdtty_rbuf_hiwat;
    958  1.1    mrg 		p->p_r_lowat = cdtty_rbuf_lowat;
    959  1.1    mrg 	}
    960  1.1    mrg 
    961  1.1    mrg 	splx(s);
    962  1.1    mrg 
    963  1.1    mrg 	/*
    964  1.1    mrg 	 * Update the tty layer's idea of the carrier bit, in case we changed
    965  1.1    mrg 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
    966  1.1    mrg 	 * explicit request.
    967  1.1    mrg 	 */
    968  1.1    mrg 	(void) (*tp->t_linesw->l_modem)(tp, ISSET(p->p_msvr, CD18xx_MSVR_CD));
    969  1.1    mrg 
    970  1.1    mrg 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    971  1.1    mrg 		if (p->p_tx_stopped) {
    972  1.1    mrg 			p->p_tx_stopped = 0;
    973  1.1    mrg 			cdttystart(tp);
    974  1.1    mrg 		}
    975  1.1    mrg 	}
    976  1.1    mrg 
    977  1.1    mrg 	return (0);
    978  1.1    mrg }
    979  1.1    mrg 
    980  1.1    mrg static void
    981  1.1    mrg cdtty_break(sc, p, onoff)
    982  1.1    mrg 	struct cd18xx_softc *sc;
    983  1.1    mrg 	struct cdtty_port *p;
    984  1.1    mrg 	int onoff;
    985  1.1    mrg {
    986  1.1    mrg 
    987  1.1    mrg 	/* tell tx intr handler we need a break */
    988  1.1    mrg 	p->p_needbreak = !!onoff;
    989  1.1    mrg 
    990  1.1    mrg 	/* turn on tx interrupts if break has changed */
    991  1.1    mrg 	if (p->p_needbreak != p->p_break)
    992  1.1    mrg 		SET(p->p_srer, CD18xx_SRER_Tx);
    993  1.1    mrg 
    994  1.1    mrg 	if (!p->p_heldchange) {
    995  1.1    mrg 		if (p->p_tx_busy) {
    996  1.1    mrg 			p->p_heldtbc = p->p_tbc;
    997  1.1    mrg 			p->p_tbc = 0;
    998  1.1    mrg 			p->p_heldchange = 1;
    999  1.1    mrg 		} else
   1000  1.1    mrg 			cdtty_loadchannelregs(sc, p);
   1001  1.1    mrg 	}
   1002  1.1    mrg }
   1003  1.1    mrg 
   1004  1.1    mrg /*
   1005  1.1    mrg  * Raise or lower modem control (DTR/RTS) signals.  If a character is
   1006  1.1    mrg  * in transmission, the change is deferred.
   1007  1.1    mrg  */
   1008  1.1    mrg static void
   1009  1.1    mrg cdtty_modem(sc, p, onoff)
   1010  1.1    mrg 	struct cd18xx_softc *sc;
   1011  1.1    mrg 	struct cdtty_port *p;
   1012  1.1    mrg 	int onoff;
   1013  1.1    mrg {
   1014  1.1    mrg 
   1015  1.1    mrg 	if (p->p_mcor1_dtr == 0)
   1016  1.1    mrg 		return;
   1017  1.1    mrg 
   1018  1.1    mrg 	if (onoff)
   1019  1.1    mrg 		CLR(p->p_mcor1, p->p_mcor1_dtr);
   1020  1.1    mrg 	else
   1021  1.1    mrg 		SET(p->p_mcor1, p->p_mcor1_dtr);
   1022  1.1    mrg 
   1023  1.1    mrg 	if (!p->p_heldchange) {
   1024  1.1    mrg 		if (p->p_tx_busy) {
   1025  1.1    mrg 			p->p_heldtbc = p->p_tbc;
   1026  1.1    mrg 			p->p_tbc = 0;
   1027  1.1    mrg 			p->p_heldchange = 1;
   1028  1.1    mrg 		} else
   1029  1.1    mrg 			cdtty_loadchannelregs(sc, p);
   1030  1.1    mrg 	}
   1031  1.1    mrg }
   1032  1.1    mrg 
   1033  1.1    mrg /*
   1034  1.1    mrg  * Try to block or unblock input using hardware flow-control.
   1035  1.1    mrg  * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
   1036  1.1    mrg  * if this function returns non-zero, the TS_TBLOCK flag will
   1037  1.1    mrg  * be set or cleared according to the "block" arg passed.
   1038  1.1    mrg  */
   1039  1.1    mrg int
   1040  1.1    mrg cdttyhwiflow(tp, block)
   1041  1.1    mrg 	struct tty *tp;
   1042  1.1    mrg 	int block;
   1043  1.1    mrg {
   1044  1.1    mrg 	struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)];
   1045  1.1    mrg 	struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)];
   1046  1.1    mrg 	int s;
   1047  1.1    mrg 
   1048  1.1    mrg 	if (p->p_msvr_rts == 0)
   1049  1.1    mrg 		return (0);
   1050  1.1    mrg 
   1051  1.1    mrg 	s = splserial();
   1052  1.1    mrg 	if (block) {
   1053  1.1    mrg 		if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1054  1.1    mrg 			SET(p->p_rx_flags, RX_TTY_BLOCKED);
   1055  1.1    mrg 			cdtty_hwiflow(sc, p);
   1056  1.1    mrg 		}
   1057  1.1    mrg 	} else {
   1058  1.1    mrg 		if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
   1059  1.1    mrg 			CLR(p->p_rx_flags, RX_TTY_OVERFLOWED);
   1060  1.1    mrg 			softintr_schedule(sc->sc_si);
   1061  1.1    mrg 		}
   1062  1.1    mrg 		if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1063  1.1    mrg 			CLR(p->p_rx_flags, RX_TTY_BLOCKED);
   1064  1.1    mrg 			cdtty_hwiflow(sc, p);
   1065  1.1    mrg 		}
   1066  1.1    mrg 	}
   1067  1.1    mrg 	splx(s);
   1068  1.1    mrg 	return (1);
   1069  1.1    mrg }
   1070  1.1    mrg 
   1071  1.1    mrg /*
   1072  1.1    mrg  * Internal version of cdttyhwiflow, called at cdtty's priority.
   1073  1.1    mrg  */
   1074  1.1    mrg static void
   1075  1.1    mrg cdtty_hwiflow(sc, p)
   1076  1.1    mrg 	struct cd18xx_softc *sc;
   1077  1.1    mrg 	struct cdtty_port *p;
   1078  1.1    mrg {
   1079  1.1    mrg 
   1080  1.1    mrg 	if (p->p_msvr_rts == 0)
   1081  1.1    mrg 		return;
   1082  1.1    mrg 
   1083  1.1    mrg 	if (ISSET(p->p_rx_flags, RX_ANY_BLOCK)) {
   1084  1.1    mrg 		CLR(p->p_msvr, p->p_msvr_rts);
   1085  1.1    mrg 		CLR(p->p_msvr_active, p->p_msvr_rts);
   1086  1.1    mrg 	} else {
   1087  1.1    mrg 		SET(p->p_msvr, p->p_msvr_rts);
   1088  1.1    mrg 		SET(p->p_msvr_active, p->p_msvr_rts);
   1089  1.1    mrg 	}
   1090  1.1    mrg 	cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev));
   1091  1.1    mrg 	cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active);
   1092  1.1    mrg }
   1093  1.1    mrg 
   1094  1.1    mrg /*
   1095  1.1    mrg  * indiviual interrupt routines.
   1096  1.1    mrg  */
   1097  1.1    mrg 
   1098  1.1    mrg /*
   1099  1.1    mrg  * this is the number of interrupts allowed, total.  set it to 0
   1100  1.1    mrg  * to allow unlimited interrpts
   1101  1.1    mrg  */
   1102  1.1    mrg #define INTR_MAX_ALLOWED	0
   1103  1.1    mrg 
   1104  1.1    mrg #if INTR_MAX_ALLOWED == 0
   1105  1.1    mrg #define GOTINTR(sc, p)	/* nothing */
   1106  1.1    mrg #else
   1107  1.1    mrg int intrcount;
   1108  1.1    mrg #define GOTINTR(sc, p)	\
   1109  1.1    mrg do { \
   1110  1.1    mrg 	if (intrcount++ == INTR_MAX_ALLOWED) { \
   1111  1.1    mrg 		CLR(p->p_srer, CD18xx_SRER_Tx); \
   1112  1.1    mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer); \
   1113  1.1    mrg 	} \
   1114  1.1    mrg 	DPRINTF(CDD_INTR, (", intrcount %d srer %x", intrcount, p->p_srer)); \
   1115  1.1    mrg } while (0)
   1116  1.1    mrg #endif
   1117  1.1    mrg 
   1118  1.1    mrg /* receiver interrupt */
   1119  1.1    mrg static __inline void
   1120  1.1    mrg cd18xx_rint(sc, ns)
   1121  1.1    mrg 	struct cd18xx_softc *sc;
   1122  1.1    mrg 	int *ns;
   1123  1.1    mrg {
   1124  1.1    mrg 	struct cdtty_port *p;
   1125  1.1    mrg 	u_int channel, count;
   1126  1.1    mrg 	u_char *put, *end;
   1127  1.1    mrg 	u_int cc;
   1128  1.1    mrg 
   1129  1.1    mrg 	/* work out the channel and softc */
   1130  1.1    mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1131  1.1    mrg 	p = &sc->sc_ports[channel];
   1132  1.1    mrg 	DPRINTF(CDD_INTR, ("%s: rint: channel %d", sc->sc_dev.dv_xname, channel));
   1133  1.1    mrg 	GOTINTR(sc, p);
   1134  1.1    mrg 
   1135  1.1    mrg 	end = p->p_ebuf;
   1136  1.1    mrg 	put = p->p_rbput;
   1137  1.1    mrg 	cc = p->p_rbavail;
   1138  1.1    mrg 
   1139  1.1    mrg 	/* read as many bytes as necessary */
   1140  1.1    mrg 	count = cd18xx_read(sc, CD18xx_RDCR);
   1141  1.1    mrg 	DPRINTF(CDD_INTR, (", %d bytes available: ", count));
   1142  1.1    mrg 
   1143  1.1    mrg 	while (cc > 0 && count > 0) {
   1144  1.1    mrg 		u_char rcsr = cd18xx_read(sc, CD18xx_RCSR);
   1145  1.1    mrg 
   1146  1.1    mrg 		put[0] = cd18xx_read(sc, CD18xx_RDR);
   1147  1.1    mrg 		put[1] = rcsr;
   1148  1.1    mrg 
   1149  1.1    mrg 		if (rcsr)
   1150  1.1    mrg 			*ns = 1;
   1151  1.1    mrg 
   1152  1.1    mrg 		put += 2;
   1153  1.1    mrg 		if (put >= end)
   1154  1.1    mrg 			put = p->p_rbuf;
   1155  1.1    mrg 
   1156  1.1    mrg 		DPRINTF(CDD_INTR, ("."));
   1157  1.1    mrg 		cc--;
   1158  1.1    mrg 		count--;
   1159  1.1    mrg 	}
   1160  1.1    mrg 
   1161  1.1    mrg 	DPRINTF(CDD_INTR, (" finished reading"));
   1162  1.1    mrg 
   1163  1.1    mrg 	/*
   1164  1.1    mrg 	 * Current string of incoming characters ended because
   1165  1.1    mrg 	 * no more data was available or we ran out of space.
   1166  1.1    mrg 	 * If we're out of space, turn off receive interrupts.
   1167  1.1    mrg 	 */
   1168  1.1    mrg 	p->p_rbput = put;
   1169  1.1    mrg 	p->p_rbavail = cc;
   1170  1.1    mrg 	if (!ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) {
   1171  1.1    mrg 		p->p_rx_ready = 1;
   1172  1.1    mrg 	}
   1173  1.1    mrg 
   1174  1.1    mrg 	/*
   1175  1.1    mrg 	 * If we're out of space, disable receive interrupts
   1176  1.1    mrg 	 * until the queue has drained a bit.
   1177  1.1    mrg 	 */
   1178  1.1    mrg 	if (!cc) {
   1179  1.1    mrg 		SET(p->p_rx_flags, RX_IBUF_OVERFLOWED);
   1180  1.1    mrg 		CLR(p->p_srer, CD18xx_SRER_Rx |
   1181  1.1    mrg 			       CD18xx_SRER_RxSC |
   1182  1.1    mrg 			       CD18xx_SRER_CD);
   1183  1.1    mrg 		cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1184  1.1    mrg 	}
   1185  1.1    mrg 
   1186  1.1    mrg 	/* finish the interrupt transaction with the IC */
   1187  1.1    mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1188  1.1    mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1189  1.1    mrg }
   1190  1.1    mrg 
   1191  1.1    mrg /*
   1192  1.1    mrg  * transmitter interrupt
   1193  1.1    mrg  *
   1194  1.1    mrg  * note this relys on the fact that we allow the transmitter FIFO to
   1195  1.1    mrg  * drain completely
   1196  1.1    mrg  */
   1197  1.1    mrg static __inline void
   1198  1.1    mrg cd18xx_tint(sc, ns)
   1199  1.1    mrg 	struct cd18xx_softc *sc;
   1200  1.1    mrg 	int *ns;
   1201  1.1    mrg {
   1202  1.1    mrg 	struct cdtty_port *p;
   1203  1.1    mrg 	u_int channel;
   1204  1.1    mrg 
   1205  1.1    mrg 	/* work out the channel and softc */
   1206  1.1    mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1207  1.1    mrg 	p = &sc->sc_ports[channel];
   1208  1.1    mrg 	DPRINTF(CDD_INTR, ("%s: tint: channel %d", sc->sc_dev.dv_xname,
   1209  1.1    mrg 	    channel));
   1210  1.1    mrg 	GOTINTR(sc, p);
   1211  1.1    mrg 
   1212  1.1    mrg 	/* if the current break condition is wrong, fix it */
   1213  1.1    mrg 	if (p->p_break != p->p_needbreak) {
   1214  1.1    mrg 		u_char buf[2];
   1215  1.1    mrg 
   1216  1.1    mrg 		DPRINTF(CDD_INTR, (", changing break to %d", p->p_needbreak));
   1217  1.1    mrg 
   1218  1.1    mrg 		/* turn on ETC processing */
   1219  1.1    mrg 		cd18xx_write(sc, CD18xx_COR2, p->p_cor2 | CD18xx_COR2_ETC);
   1220  1.1    mrg 
   1221  1.1    mrg 		buf[0] = CD18xx_TDR_ETC_BYTE;
   1222  1.1    mrg 		buf[1] = p->p_needbreak ? CD18xx_TDR_BREAK_BYTE :
   1223  1.1    mrg 					    CD18xx_TDR_NOBREAK_BYTE;
   1224  1.1    mrg 		cd18xx_write_multi(sc, CD18xx_TDR, buf, 2);
   1225  1.1    mrg 
   1226  1.1    mrg 		p->p_break = p->p_needbreak;
   1227  1.1    mrg 
   1228  1.1    mrg 		/* turn off ETC processing */
   1229  1.1    mrg 		cd18xx_write(sc, CD18xx_COR2, p->p_cor2);
   1230  1.1    mrg 	}
   1231  1.1    mrg 
   1232  1.1    mrg 	/*
   1233  1.1    mrg 	 * If we've delayed a parameter change, do it now, and restart
   1234  1.1    mrg 	 * output.
   1235  1.1    mrg 	 */
   1236  1.1    mrg 	if (p->p_heldchange) {
   1237  1.1    mrg 		cdtty_loadchannelregs(sc, p);
   1238  1.1    mrg 		p->p_heldchange = 0;
   1239  1.1    mrg 		p->p_tbc = p->p_heldtbc;
   1240  1.1    mrg 		p->p_heldtbc = 0;
   1241  1.1    mrg 	}
   1242  1.1    mrg 
   1243  1.1    mrg 	/* Output the next chunk of the contiguous buffer, if any. */
   1244  1.1    mrg 	if (p->p_tbc > 0) {
   1245  1.1    mrg 		int n;
   1246  1.1    mrg 
   1247  1.1    mrg 		n = p->p_tbc;
   1248  1.1    mrg 		if (n > 8) /* write up to 8 entries */
   1249  1.1    mrg 			n = 8;
   1250  1.1    mrg 		DPRINTF(CDD_INTR, (", writing %d bytes to TDR", n));
   1251  1.1    mrg 		cd18xx_write_multi(sc, CD18xx_TDR, p->p_tba, n);
   1252  1.1    mrg 		p->p_tbc -= n;
   1253  1.1    mrg 		p->p_tba += n;
   1254  1.1    mrg 	}
   1255  1.1    mrg 
   1256  1.1    mrg 	/* Disable transmit completion interrupts if we ran out of bytes. */
   1257  1.1    mrg 	if (p->p_tbc == 0) {
   1258  1.1    mrg 		/* Note that Tx interupts should already be enabled */
   1259  1.1    mrg 		if (ISSET(p->p_srer, CD18xx_SRER_Tx)) {
   1260  1.1    mrg 			DPRINTF(CDD_INTR, (", disabling tx interrupts"));
   1261  1.1    mrg 			CLR(p->p_srer, CD18xx_SRER_Tx);
   1262  1.1    mrg 			cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1263  1.1    mrg 		}
   1264  1.1    mrg 		if (p->p_tx_busy) {
   1265  1.1    mrg 			p->p_tx_busy = 0;
   1266  1.1    mrg 			p->p_tx_done = 1;
   1267  1.1    mrg 		}
   1268  1.1    mrg 	}
   1269  1.1    mrg 	*ns = 1;
   1270  1.1    mrg 
   1271  1.1    mrg 	/* finish the interrupt transaction with the IC */
   1272  1.1    mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1273  1.1    mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1274  1.1    mrg }
   1275  1.1    mrg 
   1276  1.1    mrg /* modem signal change interrupt */
   1277  1.1    mrg static __inline void
   1278  1.1    mrg cd18xx_mint(sc, ns)
   1279  1.1    mrg 	struct cd18xx_softc *sc;
   1280  1.1    mrg 	int *ns;
   1281  1.1    mrg {
   1282  1.1    mrg 	struct cdtty_port *p;
   1283  1.1    mrg 	u_int channel;
   1284  1.1    mrg 	u_char msvr, delta;
   1285  1.1    mrg 
   1286  1.1    mrg 	/* work out the channel and softc */
   1287  1.1    mrg 	channel = cd18xx_get_gscr1_channel(sc);
   1288  1.1    mrg 	p = &sc->sc_ports[channel];
   1289  1.1    mrg 	DPRINTF(CDD_INTR, ("%s: mint: channel %d", sc->sc_dev.dv_xname, channel));
   1290  1.1    mrg 	GOTINTR(sc, p);
   1291  1.1    mrg 
   1292  1.1    mrg 	/*
   1293  1.1    mrg 	 * We ignore the MCR register, and handle detecting deltas
   1294  1.1    mrg 	 * via software, like many other serial drivers.
   1295  1.1    mrg 	 */
   1296  1.1    mrg 	msvr = cd18xx_read(sc, CD18xx_MSVR);
   1297  1.1    mrg 	delta = msvr ^ p->p_msvr;
   1298  1.1    mrg 	DPRINTF(CDD_INTR, (", msvr %d", msvr));
   1299  1.1    mrg 
   1300  1.1    mrg 	/*
   1301  1.1    mrg 	 * Process normal status changes
   1302  1.1    mrg 	 */
   1303  1.1    mrg 	if (ISSET(delta, p->p_msvr_mask)) {
   1304  1.1    mrg 		SET(p->p_msvr_delta, delta);
   1305  1.1    mrg 
   1306  1.1    mrg 		DPRINTF(CDD_INTR, (", status changed delta %d", delta));
   1307  1.1    mrg 		/*
   1308  1.1    mrg 		 * Stop output immediately if we lose the output
   1309  1.1    mrg 		 * flow control signal or carrier detect.
   1310  1.1    mrg 		 */
   1311  1.1    mrg 		if (ISSET(~msvr, p->p_msvr_mask)) {
   1312  1.1    mrg 			p->p_tbc = 0;
   1313  1.1    mrg 			p->p_heldtbc = 0;
   1314  1.1    mrg 			/* Stop modem interrupt processing */
   1315  1.1    mrg 		}
   1316  1.1    mrg 		p->p_st_check = 1;
   1317  1.1    mrg 		*ns = 1;
   1318  1.1    mrg 	}
   1319  1.1    mrg 
   1320  1.1    mrg 	/* reset the modem signal register */
   1321  1.1    mrg 	cd18xx_write(sc, CD18xx_MCR, 0);
   1322  1.1    mrg 
   1323  1.1    mrg 	/* finish the interrupt transaction with the IC */
   1324  1.1    mrg 	cd18xx_write(sc, CD18xx_EOSRR, 0);
   1325  1.1    mrg 	DPRINTF(CDD_INTR, (", done\n"));
   1326  1.1    mrg }
   1327  1.1    mrg 
   1328  1.1    mrg /*
   1329  1.1    mrg  * hardware interrupt routine.  call the relevant interrupt routines until
   1330  1.1    mrg  * no interrupts are pending.
   1331  1.1    mrg  *
   1332  1.1    mrg  * note:  we do receive interrupts before all others (as we'd rather lose
   1333  1.1    mrg  * a chance to transmit, than lose a character).  and we do transmit
   1334  1.1    mrg  * interrupts before modem interrupts.
   1335  1.1    mrg  *
   1336  1.1    mrg  * we have to traverse all of the cd18xx's attached, unfortunately.
   1337  1.1    mrg  */
   1338  1.1    mrg int
   1339  1.1    mrg cd18xx_hardintr(v)
   1340  1.1    mrg 	void *v;
   1341  1.1    mrg {
   1342  1.1    mrg 	int i, rv = 0;
   1343  1.1    mrg 	u_char ack;
   1344  1.1    mrg 
   1345  1.1    mrg 	DPRINTF(CDD_INTR, ("cd18xx_hardintr (ndevs %d):\n", clcd_cd.cd_ndevs));
   1346  1.1    mrg 	for (i = 0; i < clcd_cd.cd_ndevs; i++)
   1347  1.1    mrg 	{
   1348  1.1    mrg 		struct cd18xx_softc *sc = clcd_cd.cd_devs[i];
   1349  1.1    mrg 		int status, ns = 0;
   1350  1.1    mrg 		int count = 1;	/* process only 1 interrupts at a time for now */
   1351  1.1    mrg 
   1352  1.1    mrg 		if (sc == NULL)
   1353  1.1    mrg 			continue;
   1354  1.1    mrg 
   1355  1.1    mrg 		DPRINTF(CDD_INTR, ("%s:", sc->sc_dev.dv_xname));
   1356  1.1    mrg 		while (count-- &&
   1357  1.1    mrg 		    (status = (cd18xx_read(sc, CD18xx_SRSR) &
   1358  1.1    mrg 		     CD18xx_SRSR_PENDING))) {
   1359  1.1    mrg 			rv = 1;
   1360  1.1    mrg 
   1361  1.1    mrg 			DPRINTF(CDD_INTR, (" status %x:", status));
   1362  1.1    mrg 			if (ISSET(status, CD18xx_SRSR_RxPEND)) {
   1363  1.1    mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1364  1.1    mrg 				    CD18xx_INTRACK_RxINT);
   1365  1.1    mrg 				DPRINTF(CDD_INTR, (" rx: ack1 %x\n", ack));
   1366  1.1    mrg 				cd18xx_rint(sc, &ns);
   1367  1.1    mrg 			}
   1368  1.1    mrg 			if (ISSET(status, CD18xx_SRSR_TxPEND)) {
   1369  1.1    mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1370  1.1    mrg 				    CD18xx_INTRACK_TxINT);
   1371  1.1    mrg 				DPRINTF(CDD_INTR, (" tx: ack1 %x\n", ack));
   1372  1.1    mrg 				cd18xx_tint(sc, &ns);
   1373  1.1    mrg 
   1374  1.1    mrg 			}
   1375  1.1    mrg 			if (ISSET(status, CD18xx_SRSR_MxPEND)) {
   1376  1.1    mrg 				ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg,
   1377  1.1    mrg 				    CD18xx_INTRACK_MxINT);
   1378  1.1    mrg 				DPRINTF(CDD_INTR, (" mx: ack1 %x\n", ack));
   1379  1.1    mrg 				cd18xx_mint(sc, &ns);
   1380  1.1    mrg 			}
   1381  1.1    mrg 		}
   1382  1.1    mrg 		if (ns)
   1383  1.1    mrg 			softintr_schedule(sc->sc_si);
   1384  1.1    mrg 	}
   1385  1.1    mrg 
   1386  1.1    mrg 	return (rv);
   1387  1.1    mrg }
   1388  1.1    mrg 
   1389  1.1    mrg /*
   1390  1.1    mrg  * software interrupt
   1391  1.1    mrg  */
   1392  1.1    mrg 
   1393  1.1    mrg void
   1394  1.1    mrg cdtty_rxsoft(sc, p, tp)
   1395  1.1    mrg 	struct cd18xx_softc *sc;
   1396  1.1    mrg 	struct cdtty_port *p;
   1397  1.1    mrg 	struct tty *tp;
   1398  1.1    mrg {
   1399  1.1    mrg 	u_char *get, *end;
   1400  1.1    mrg 	u_int cc, scc;
   1401  1.1    mrg 	u_char rcsr;
   1402  1.1    mrg 	int code;
   1403  1.1    mrg 	int s;
   1404  1.1    mrg 
   1405  1.1    mrg 	end = p->p_ebuf;
   1406  1.1    mrg 	get = p->p_rbget;
   1407  1.1    mrg 	scc = cc = cdtty_rbuf_size - p->p_rbavail;
   1408  1.1    mrg 
   1409  1.1    mrg 	if (cc == cdtty_rbuf_size) {
   1410  1.1    mrg 		p->p_floods++;
   1411  1.1    mrg #if 0
   1412  1.1    mrg 		if (p->p_errors++ == 0)
   1413  1.1    mrg 			callout_reset(&p->p_diag_callout, 60 * hz,
   1414  1.1    mrg 			    cdttydiag, p);
   1415  1.1    mrg #endif
   1416  1.1    mrg 	}
   1417  1.1    mrg 
   1418  1.1    mrg 	while (cc) {
   1419  1.1    mrg 		code = get[0];
   1420  1.1    mrg 		rcsr = get[1];
   1421  1.1    mrg 		if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR | CD18xx_RCSR_BREAK |
   1422  1.1    mrg 				CD18xx_RCSR_FRAMERR | CD18xx_RCSR_PARITYERR)) {
   1423  1.1    mrg 			if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR)) {
   1424  1.1    mrg 				p->p_overflows++;
   1425  1.1    mrg #if 0
   1426  1.1    mrg 				if (p->p_errors++ == 0)
   1427  1.1    mrg 					callout_reset(&p->p_diag_callout,
   1428  1.1    mrg 					    60 * hz, cdttydiag, p);
   1429  1.1    mrg #endif
   1430  1.1    mrg 			}
   1431  1.1    mrg 			if (ISSET(rcsr, CD18xx_RCSR_BREAK|CD18xx_RCSR_FRAMERR))
   1432  1.1    mrg 				SET(code, TTY_FE);
   1433  1.1    mrg 			if (ISSET(rcsr, CD18xx_RCSR_PARITYERR))
   1434  1.1    mrg 				SET(code, TTY_PE);
   1435  1.1    mrg 		}
   1436  1.1    mrg 		if ((*tp->t_linesw->l_rint)(code, tp) == -1) {
   1437  1.1    mrg 			/*
   1438  1.1    mrg 			 * The line discipline's buffer is out of space.
   1439  1.1    mrg 			 */
   1440  1.1    mrg 			if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) {
   1441  1.1    mrg 				/*
   1442  1.1    mrg 				 * We're either not using flow control, or the
   1443  1.1    mrg 				 * line discipline didn't tell us to block for
   1444  1.1    mrg 				 * some reason.  Either way, we have no way to
   1445  1.1    mrg 				 * know when there's more space available, so
   1446  1.1    mrg 				 * just drop the rest of the data.
   1447  1.1    mrg 				 */
   1448  1.1    mrg 				get += cc << 1;
   1449  1.1    mrg 				if (get >= end)
   1450  1.1    mrg 					get -= cdtty_rbuf_size << 1;
   1451  1.1    mrg 				cc = 0;
   1452  1.1    mrg 			} else {
   1453  1.1    mrg 				/*
   1454  1.1    mrg 				 * Don't schedule any more receive processing
   1455  1.1    mrg 				 * until the line discipline tells us there's
   1456  1.1    mrg 				 * space available (through cdttyhwiflow()).
   1457  1.1    mrg 				 * Leave the rest of the data in the input
   1458  1.1    mrg 				 * buffer.
   1459  1.1    mrg 				 */
   1460  1.1    mrg 				SET(p->p_rx_flags, RX_TTY_OVERFLOWED);
   1461  1.1    mrg 			}
   1462  1.1    mrg 			break;
   1463  1.1    mrg 		}
   1464  1.1    mrg 		get += 2;
   1465  1.1    mrg 		if (get >= end)
   1466  1.1    mrg 			get = p->p_rbuf;
   1467  1.1    mrg 		cc--;
   1468  1.1    mrg 	}
   1469  1.1    mrg 
   1470  1.1    mrg 	if (cc != scc) {
   1471  1.1    mrg 		p->p_rbget = get;
   1472  1.1    mrg 		s = splserial();
   1473  1.1    mrg 
   1474  1.1    mrg 		cc = p->p_rbavail += scc - cc;
   1475  1.1    mrg 		/* Buffers should be ok again, release possible block. */
   1476  1.1    mrg 		if (cc >= p->p_r_lowat) {
   1477  1.1    mrg 			if (ISSET(p->p_rx_flags, RX_IBUF_OVERFLOWED)) {
   1478  1.1    mrg 				CLR(p->p_rx_flags, RX_IBUF_OVERFLOWED);
   1479  1.1    mrg 				cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev));
   1480  1.1    mrg 				SET(p->p_srer, CD18xx_SRER_Rx |
   1481  1.1    mrg 					       CD18xx_SRER_RxSC |
   1482  1.1    mrg 					       CD18xx_SRER_CD);
   1483  1.1    mrg 				cd18xx_write(sc, CD18xx_SRER, p->p_srer);
   1484  1.1    mrg 			}
   1485  1.1    mrg 			if (ISSET(p->p_rx_flags, RX_IBUF_BLOCKED)) {
   1486  1.1    mrg 				CLR(p->p_rx_flags, RX_IBUF_BLOCKED);
   1487  1.1    mrg 				cdtty_hwiflow(sc, p);
   1488  1.1    mrg 			}
   1489  1.1    mrg 		}
   1490  1.1    mrg 		splx(s);
   1491  1.1    mrg 	}
   1492  1.1    mrg }
   1493  1.1    mrg 
   1494  1.1    mrg void
   1495  1.1    mrg cdtty_txsoft(sc, p, tp)
   1496  1.1    mrg 	struct cd18xx_softc *sc;
   1497  1.1    mrg 	struct cdtty_port *p;
   1498  1.1    mrg 	struct tty *tp;
   1499  1.1    mrg {
   1500  1.1    mrg 
   1501  1.1    mrg 	CLR(tp->t_state, TS_BUSY);
   1502  1.1    mrg 	if (ISSET(tp->t_state, TS_FLUSH))
   1503  1.1    mrg 		CLR(tp->t_state, TS_FLUSH);
   1504  1.1    mrg 	else
   1505  1.1    mrg 		ndflush(&tp->t_outq, (int)(p->p_tba - tp->t_outq.c_cf));
   1506  1.1    mrg 	(*tp->t_linesw->l_start)(tp);
   1507  1.1    mrg }
   1508  1.1    mrg 
   1509  1.1    mrg void
   1510  1.1    mrg cdtty_stsoft(sc, p, tp)
   1511  1.1    mrg 	struct cd18xx_softc *sc;
   1512  1.1    mrg 	struct cdtty_port *p;
   1513  1.1    mrg 	struct tty *tp;
   1514  1.1    mrg {
   1515  1.1    mrg 	u_char msvr, delta;
   1516  1.1    mrg 	int s;
   1517  1.1    mrg 
   1518  1.1    mrg 	s = splserial();
   1519  1.1    mrg 	msvr = p->p_msvr;
   1520  1.1    mrg 	delta = p->p_msvr_delta;
   1521  1.1    mrg 	p->p_msvr_delta = 0;
   1522  1.1    mrg 	splx(s);
   1523  1.1    mrg 
   1524  1.1    mrg 	if (ISSET(delta, p->p_msvr_dcd)) {
   1525  1.1    mrg 		/*
   1526  1.1    mrg 		 * Inform the tty layer that carrier detect changed.
   1527  1.1    mrg 		 */
   1528  1.1    mrg 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msvr, CD18xx_MSVR_CD));
   1529  1.1    mrg 	}
   1530  1.1    mrg 
   1531  1.1    mrg 	if (ISSET(delta, p->p_msvr_cts)) {
   1532  1.1    mrg 		/* Block or unblock output according to flow control. */
   1533  1.1    mrg 		if (ISSET(msvr, p->p_msvr_cts)) {
   1534  1.1    mrg 			p->p_tx_stopped = 0;
   1535  1.1    mrg 			(*tp->t_linesw->l_start)(tp);
   1536  1.1    mrg 		} else {
   1537  1.1    mrg 			p->p_tx_stopped = 1;
   1538  1.1    mrg 		}
   1539  1.1    mrg 	}
   1540  1.1    mrg }
   1541  1.1    mrg 
   1542  1.1    mrg void
   1543  1.1    mrg cd18xx_softintr(v)
   1544  1.1    mrg 	void *v;
   1545  1.1    mrg {
   1546  1.1    mrg 	struct cd18xx_softc *sc = v;
   1547  1.1    mrg 	struct cdtty_port *p;
   1548  1.1    mrg 	struct tty *tp;
   1549  1.1    mrg 	int i;
   1550  1.1    mrg 
   1551  1.1    mrg 	for (i = 0; i < 8; i++) {
   1552  1.1    mrg 		p = &sc->sc_ports[i];
   1553  1.1    mrg 
   1554  1.1    mrg 		tp = p->p_tty;
   1555  1.1    mrg 		if (tp == NULL)
   1556  1.1    mrg 			continue;
   1557  1.1    mrg 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1558  1.1    mrg 			continue;
   1559  1.1    mrg 
   1560  1.1    mrg 		if (p->p_rx_ready) {
   1561  1.1    mrg 			p->p_rx_ready = 0;
   1562  1.1    mrg 			cdtty_rxsoft(sc, p, tp);
   1563  1.1    mrg 		}
   1564  1.1    mrg 
   1565  1.1    mrg 		if (p->p_st_check) {
   1566  1.1    mrg 			p->p_st_check = 0;
   1567  1.1    mrg 			cdtty_stsoft(sc, p, tp);
   1568  1.1    mrg 		}
   1569  1.1    mrg 
   1570  1.1    mrg 		if (p->p_tx_done) {
   1571  1.1    mrg 			p->p_tx_done = 0;
   1572  1.1    mrg 			cdtty_txsoft(sc, p, tp);
   1573  1.1    mrg 		}
   1574  1.1    mrg 	}
   1575  1.1    mrg }
   1576