cd18xx.c revision 1.1
1 /* $NetBSD: cd18xx.c,v 1.1 2001/10/03 04:25:30 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /*- 32 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Charles M. Hannum. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the NetBSD 49 * Foundation, Inc. and its contributors. 50 * 4. Neither the name of The NetBSD Foundation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1991 The Regents of the University of California. 69 * All rights reserved. 70 * 71 * Redistribution and use in source and binary forms, with or without 72 * modification, are permitted provided that the following conditions 73 * are met: 74 * 1. Redistributions of source code must retain the above copyright 75 * notice, this list of conditions and the following disclaimer. 76 * 2. Redistributions in binary form must reproduce the above copyright 77 * notice, this list of conditions and the following disclaimer in the 78 * documentation and/or other materials provided with the distribution. 79 * 3. All advertising materials mentioning features or use of this software 80 * must display the following acknowledgement: 81 * This product includes software developed by the University of 82 * California, Berkeley and its contributors. 83 * 4. Neither the name of the University nor the names of its contributors 84 * may be used to endorse or promote products derived from this software 85 * without specific prior written permission. 86 * 87 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 88 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 89 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 90 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 91 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 92 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 93 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 94 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 95 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 96 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 97 * SUCH DAMAGE. 98 * 99 * @(#)com.c 7.5 (Berkeley) 5/16/91 100 */ 101 102 /* 103 * cirrus logic CL-CD180/CD1864/CD1865 driver, based in (large) parts on 104 * the com and z8530 drivers. thanks charles. 105 */ 106 107 #include <sys/param.h> 108 #include <sys/conf.h> 109 #include <sys/device.h> 110 #include <sys/systm.h> 111 #include <sys/malloc.h> 112 #include <sys/proc.h> 113 #include <sys/kernel.h> 114 #include <sys/tty.h> 115 #include <sys/fcntl.h> 116 117 #include <machine/bus.h> 118 119 #include <dev/ic/cd18xxvar.h> 120 #include <dev/ic/cd18xxreg.h> 121 122 #include "ioconf.h" 123 124 /* 125 * some helpers 126 */ 127 128 /* macros to clear/set/test flags. */ 129 #define SET(t, f) (t) |= (f) 130 #define CLR(t, f) (t) &= ~(f) 131 #define ISSET(t, f) ((t) & (f)) 132 133 static void cdtty_attach(struct cd18xx_softc *, int); 134 135 static __inline void cd18xx_rint(struct cd18xx_softc *, int *); 136 static __inline void cd18xx_tint(struct cd18xx_softc *, int *); 137 static __inline void cd18xx_mint(struct cd18xx_softc *, int *); 138 139 void cdtty_rxsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *); 140 void cdtty_txsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *); 141 void cdtty_stsoft(struct cd18xx_softc *, struct cdtty_port *, struct tty *); 142 void cd18xx_softintr(void *); 143 144 cdev_decl(cdtty); 145 146 static void cdtty_shutdown(struct cd18xx_softc *, struct cdtty_port*); 147 static void cdttystart(struct tty *); 148 static int cdttyparam(struct tty *, struct termios *); 149 static void cdtty_break(struct cd18xx_softc *, struct cdtty_port *, int); 150 static void cdtty_modem(struct cd18xx_softc *, struct cdtty_port *, int); 151 static int cdttyhwiflow(struct tty *, int); 152 static void cdtty_hwiflow(struct cd18xx_softc *, struct cdtty_port *); 153 154 static void cdtty_loadchannelregs(struct cd18xx_softc *, 155 struct cdtty_port *); 156 157 /* default read buffer size */ 158 u_int cdtty_rbuf_size = CDTTY_RING_SIZE; 159 160 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 161 u_int cdtty_rbuf_hiwat = (CDTTY_RING_SIZE * 1) / 4; 162 u_int cdtty_rbuf_lowat = (CDTTY_RING_SIZE * 3) / 4; 163 164 #define CD18XXDEBUG 165 #ifdef CD18XXDEBUG 166 #define CDD_INFO 0x0001 167 #define CDD_INTR 0x0002 168 int cd18xx_debug = CDD_INTR|CDD_INFO; 169 # define DPRINTF(l, x) if (cd18xx_debug & l) printf x 170 #else 171 # define DPRINTF(l, x) /* nothing */ 172 #endif 173 174 /* Known supported revisions. */ 175 struct cd18xx_revs { 176 u_char revision; 177 u_char onehundred_pin; 178 char *name; 179 } cd18xx_revs[] = { 180 { CD180_GFRCR_REV_B, 0, "CL-CD180 rev. B" }, 181 { CD180_GFRCR_REV_C, 0, "CL-CD180 rev. C" }, 182 { CD1864_GFRCR_REVISION_A, 1, "CL-CD1864 rev. A" }, 183 { CD1865_GFRCR_REVISION_A, 1, "CL-CD1865 rev. A" }, 184 { CD1865_GFRCR_REVISION_B, 1, "CL-CD1865 rev. B" }, 185 { CD1865_GFRCR_REVISION_C, 1, "CL-CD1865 rev. C" }, 186 { 0, 0, 0 } 187 }; 188 189 /* wait for the CCR to go to zero */ 190 static __inline int cd18xx_wait_ccr(struct cd18xx_softc *); 191 static __inline int 192 cd18xx_wait_ccr(sc) 193 struct cd18xx_softc *sc; 194 { 195 int i = 100000; 196 197 while (--i && 198 bus_space_read_1(sc->sc_tag, sc->sc_handle, CD18xx_CCR) == 0) 199 break; 200 return (i == 0); 201 } 202 203 /* 204 * device attach routine, high-end portion 205 */ 206 void 207 cd18xx_attach(sc) 208 struct cd18xx_softc *sc; 209 { 210 static int chip_id_next = 1; 211 int onehundred_pin, revision, i, port; 212 213 /* read and print the revision */ 214 revision = cd18xx_read(sc, CD18xx_GFRCR); 215 onehundred_pin = ISSET(cd18xx_read(sc, CD18xx_SRCR),CD18xx_SRCR_PKGTYP); 216 for (i = 0; cd18xx_revs[i].name; i++) 217 if (revision == cd18xx_revs[i].revision || 218 onehundred_pin == cd18xx_revs[i].onehundred_pin) { 219 printf(": %s", cd18xx_revs[i].name); 220 break; 221 } 222 223 if (cd18xx_revs[i].name == NULL) { 224 printf("%s: unknown revision, bailing.\n", sc->sc_dev.dv_xname); 225 return; 226 } 227 228 /* prepare for reset */ 229 cd18xx_set_car(sc, 0); 230 cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_CLEAR); 231 232 /* wait for CCR to go to zero */ 233 if (cd18xx_wait_ccr(sc)) { 234 printf("cd18xx_attach: reset change command timed out\n"); 235 return; 236 } 237 238 /* full reset of all channels */ 239 cd18xx_write(sc, CD18xx_CCR, 240 CD18xx_CCR_RESET|CD18xx_CCR_RESET_HARD); 241 242 /* loop until the GSVR is ready */ 243 i = 100000; 244 while (--i && cd18xx_read(sc, CD18xx_GSVR) == CD18xx_GSVR_READY) 245 ; 246 if (i == 0) { 247 printf("\n%s: did not reset!\n", sc->sc_dev.dv_xname); 248 return; 249 } 250 251 /* write the chip_id */ 252 sc->sc_chip_id = chip_id_next++; 253 #ifdef DIAGNOSTIC 254 if (sc->sc_chip_id > 31) 255 panic("more than 31 cd18xx's? help."); 256 #endif 257 cd18xx_write(sc, CD18xx_GSVR, CD18xx_GSVR_SETID(sc)); 258 259 /* rx/tx/modem service match vectors, initalised by higher level */ 260 cd18xx_write(sc, CD18xx_MSMR, sc->sc_msmr | 0x80); 261 cd18xx_write(sc, CD18xx_TSMR, sc->sc_tsmr | 0x80); 262 cd18xx_write(sc, CD18xx_RSMR, sc->sc_rsmr | 0x80); 263 264 printf(", gsvr %x msmr %x tsmr %x rsmr %x", 265 cd18xx_read(sc, CD18xx_GSVR), 266 cd18xx_read(sc, CD18xx_MSMR), 267 cd18xx_read(sc, CD18xx_TSMR), 268 cd18xx_read(sc, CD18xx_RSMR)); 269 270 /* prescale registers */ 271 sc->sc_pprh = 0xf0; 272 sc->sc_pprl = 0; 273 cd18xx_write(sc, CD18xx_PPRH, sc->sc_pprh); 274 cd18xx_write(sc, CD18xx_PPRL, sc->sc_pprl); 275 276 /* establish our soft interrupt. */ 277 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, cd18xx_softintr, sc); 278 279 printf(", 8 ports ready (chip id %d)\n", sc->sc_chip_id); 280 281 /* 282 * finally, we loop over all 8 channels initialising them 283 */ 284 for (port = 0; port < 8; port++) 285 cdtty_attach(sc, port); 286 } 287 288 /* tty portion of the code */ 289 290 /* 291 * tty portion attach routine 292 */ 293 void 294 cdtty_attach(sc, port) 295 struct cd18xx_softc *sc; 296 int port; 297 { 298 struct cdtty_port *p = &sc->sc_ports[port]; 299 int i; 300 301 /* load CAR with channel number */ 302 cd18xx_set_car(sc, port); 303 304 /* wait for CCR to go to zero */ 305 if (cd18xx_wait_ccr(sc)) { 306 printf("cd18xx_attach: change command timed out setting " 307 "CAR for port %d\n", i); 308 return; 309 } 310 311 /* set the RPTR to (arbitrary) 8 */ 312 cd18xx_write(sc, CD18xx_RTPR, 8); 313 314 /* reset the modem signal value register */ 315 sc->sc_ports[port].p_msvr = CD18xx_MSVR_RESET; 316 317 /* zero the service request enable register */ 318 cd18xx_write(sc, CD18xx_SRER, 0); 319 320 /* enable the transmitter & receiver */ 321 SET(p->p_chanctl, CD18xx_CCR_CHANCTL | 322 CD18xx_CCR_CHANCTL_TxEN | 323 CD18xx_CCR_CHANCTL_RxEN); 324 325 /* XXX no console or kgdb support yet! */ 326 327 /* get a tty structure */ 328 p->p_tty = ttymalloc(); 329 p->p_tty->t_oproc = cdttystart; 330 p->p_tty->t_param = cdttyparam; 331 p->p_tty->t_hwiflow = cdttyhwiflow; 332 333 p->p_rbuf = malloc(cdtty_rbuf_size << 1, M_DEVBUF, M_WAITOK); 334 p->p_rbput = p->p_rbget = p->p_rbuf; 335 p->p_rbavail = cdtty_rbuf_size; 336 if (p->p_rbuf == NULL) { 337 printf("%s: unable to allocate ring buffer for tty %d\n", 338 sc->sc_dev.dv_xname, port); 339 return; 340 } 341 p->p_ebuf = p->p_rbuf + (cdtty_rbuf_size << 1); 342 343 tty_attach(p->p_tty); 344 } 345 346 /* 347 * below here are the tty portion device routines. 348 */ 349 void 350 cdtty_shutdown(sc, p) 351 struct cd18xx_softc *sc; 352 struct cdtty_port *p; 353 { 354 struct tty *tp = p->p_tty; 355 int s; 356 357 s = splserial(); 358 359 /* If we were asserting flow control, then deassert it. */ 360 SET(p->p_rx_flags, RX_IBUF_BLOCKED); 361 cdtty_hwiflow(sc, p); 362 363 /* Clear any break condition set with TIOCSBRK. */ 364 cdtty_break(sc, p, 0); 365 366 /* 367 * Hang up if necessary. Wait a bit, so the other side has time to 368 * notice even if we immediately open the port again. 369 * Avoid tsleeping above splhigh(). 370 */ 371 if (ISSET(tp->t_cflag, HUPCL)) { 372 cdtty_modem(sc, p, 0); 373 splx(s); 374 /* XXX tsleep will only timeout */ 375 (void) tsleep(sc, TTIPRI, ttclos, hz); 376 s = splserial(); 377 } 378 379 /* Turn off interrupts. */ 380 p->p_srer = 0; 381 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 382 383 splx(s); 384 } 385 386 /* 387 * cdttyopen: open syscall for cdtty terminals.. 388 */ 389 int 390 cdttyopen(dev, flag, mode, p) 391 dev_t dev; 392 int flag; 393 int mode; 394 struct proc *p; 395 { 396 struct tty *tp; 397 struct cd18xx_softc *sc; 398 struct cdtty_port *port; 399 int channel, instance, s, error; 400 401 channel = CD18XX_CHANNEL(dev); 402 instance = CD18XX_INSTANCE(dev); 403 404 /* ensure instance is valid */ 405 if (instance >= clcd_cd.cd_ndevs) 406 return (ENXIO); 407 408 /* get softc and port */ 409 sc = clcd_cd.cd_devs[instance]; 410 if (sc == NULL) 411 return (ENXIO); 412 port = &sc->sc_ports[channel]; 413 if (port == NULL || port->p_rbuf == NULL) 414 return (ENXIO); 415 416 /* kgdb support? maybe later... */ 417 418 tp = port->p_tty; 419 420 /* enforce exclude */ 421 if (tp == NULL || 422 (ISSET(tp->t_state, TS_ISOPEN) && 423 ISSET(tp->t_state, TS_XCLUDE) && 424 (p->p_ucred->cr_uid != 0))) 425 return (EBUSY); 426 427 s = spltty(); 428 429 /* 430 * Do the following iff this is a first open. 431 */ 432 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 433 struct termios t; 434 435 /* set up things in tp as necessary */ 436 tp->t_dev = dev; 437 438 /* 439 * Initialize the termios status to the defaults. Add in the 440 * sticky bits from TIOCSFLAGS. 441 */ 442 t.c_ispeed = 0; 443 t.c_ospeed = TTYDEF_SPEED; 444 t.c_cflag = TTYDEF_CFLAG; 445 446 if (ISSET(port->p_swflags, TIOCFLAG_CLOCAL)) 447 SET(t.c_cflag, CLOCAL); 448 if (ISSET(port->p_swflags, TIOCFLAG_CRTSCTS)) 449 SET(t.c_cflag, CRTSCTS); 450 if (ISSET(port->p_swflags, TIOCFLAG_CDTRCTS)) 451 SET(t.c_cflag, CDTRCTS); 452 if (ISSET(port->p_swflags, TIOCFLAG_MDMBUF)) 453 SET(t.c_cflag, MDMBUF); 454 455 /* Make sure param will see changes. */ 456 tp->t_ospeed = 0; 457 (void)cdttyparam(tp, &t); 458 459 tp->t_iflag = TTYDEF_IFLAG; 460 tp->t_oflag = TTYDEF_OFLAG; 461 tp->t_lflag = TTYDEF_LFLAG; 462 ttychars(tp); 463 ttsetwater(tp); 464 465 (void)splserial(); 466 467 /* turn on rx and modem interrupts */ 468 cd18xx_set_car(sc, CD18XX_CHANNEL(dev)); 469 SET(port->p_srer, CD18xx_SRER_Rx | 470 CD18xx_SRER_RxSC | 471 CD18xx_SRER_CD); 472 cd18xx_write(sc, CD18xx_SRER, port->p_srer); 473 474 /* always turn on DTR when open */ 475 cdtty_modem(sc, port, 1); 476 477 /* initialise ring buffer */ 478 port->p_rbget = port->p_rbput = port->p_rbuf; 479 port->p_rbavail = cdtty_rbuf_size; 480 CLR(port->p_rx_flags, RX_ANY_BLOCK); 481 cdtty_hwiflow(sc, port); 482 } 483 484 /* drop spl back before going into the line open */ 485 splx(s); 486 487 error = ttyopen(tp, CD18XX_DIALOUT(dev), ISSET(flag, O_NONBLOCK)); 488 if (error == 0) 489 error = (*tp->t_linesw->l_open)(dev, tp); 490 491 return (error); 492 } 493 494 /* 495 * cdttyclose: close syscall for cdtty terminals.. 496 */ 497 int 498 cdttyclose(dev, flag, mode, p) 499 dev_t dev; 500 int flag; 501 int mode; 502 struct proc *p; 503 { 504 struct cd18xx_softc *sc; 505 struct cdtty_port *port; 506 struct tty *tp; 507 int channel, instance; 508 509 channel = CD18XX_CHANNEL(dev); 510 instance = CD18XX_INSTANCE(dev); 511 512 /* ensure instance is valid */ 513 if (instance >= clcd_cd.cd_ndevs) 514 return (ENXIO); 515 516 /* get softc and port */ 517 sc = clcd_cd.cd_devs[instance]; 518 if (sc == NULL) 519 return (ENXIO); 520 port = &sc->sc_ports[channel]; 521 522 tp = port->p_tty; 523 524 (*tp->t_linesw->l_close)(tp, flag); 525 ttyclose(tp); 526 527 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 528 /* 529 * Although we got a last close, the device may still be in 530 * use; e.g. if this was the dialout node, and there are still 531 * processes waiting for carrier on the non-dialout node. 532 */ 533 cdtty_shutdown(sc, port); 534 } 535 536 return (0); 537 } 538 539 /* 540 * cdttyread: read syscall for cdtty terminals.. 541 */ 542 int 543 cdttyread(dev, uio, flag) 544 dev_t dev; 545 struct uio *uio; 546 int flag; 547 { 548 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)]; 549 struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)]; 550 struct tty *tp = port->p_tty; 551 552 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 553 } 554 555 /* 556 * cdttywrite: write syscall for cdtty terminals.. 557 */ 558 int 559 cdttywrite(dev, uio, flag) 560 dev_t dev; 561 struct uio *uio; 562 int flag; 563 { 564 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)]; 565 struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)]; 566 struct tty *tp = port->p_tty; 567 568 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 569 } 570 571 int 572 cdttypoll(dev, events, p) 573 dev_t dev; 574 int events; 575 struct proc *p; 576 { 577 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)]; 578 struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)]; 579 struct tty *tp = port->p_tty; 580 581 return ((*tp->t_linesw->l_poll)(tp, events, p)); 582 } 583 584 /* 585 * cdttytty: return a pointer to our (cdtty) tp. 586 */ 587 struct tty * 588 cdttytty(dev) 589 dev_t dev; 590 { 591 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)]; 592 struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)]; 593 594 return (port->p_tty); 595 } 596 597 /* 598 * cdttyioctl: ioctl syscall for cdtty terminals.. 599 */ 600 int 601 cdttyioctl(dev, cmd, data, flag, p) 602 dev_t dev; 603 u_long cmd; 604 caddr_t data; 605 int flag; 606 struct proc *p; 607 { 608 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(dev)]; 609 struct cdtty_port *port = &sc->sc_ports[CD18XX_CHANNEL(dev)]; 610 struct tty *tp = port->p_tty; 611 int error, s; 612 613 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 614 if (error >= 0) 615 return (error); 616 617 error = ttioctl(tp, cmd, data, flag, p); 618 if (error >= 0) 619 return (error); 620 621 s = splserial(); 622 623 switch (cmd) { 624 case TIOCSBRK: 625 cdtty_break(sc, port, 1); 626 break; 627 628 case TIOCCBRK: 629 cdtty_break(sc, port, 0); 630 break; 631 632 case TIOCSDTR: 633 cdtty_modem(sc, port, 1); 634 break; 635 636 case TIOCCDTR: 637 cdtty_modem(sc, port, 0); 638 break; 639 640 case TIOCGFLAGS: 641 *(int *)data = port->p_swflags; 642 break; 643 644 case TIOCSFLAGS: 645 error = suser(p->p_ucred, &p->p_acflag); 646 if (error) 647 return (error); 648 port->p_swflags = *(int *)data; 649 break; 650 651 case TIOCMSET: 652 case TIOCMBIS: 653 case TIOCMBIC: 654 case TIOCMGET: 655 default: 656 return (ENOTTY); 657 } 658 659 splx(s); 660 return (0); 661 } 662 663 /* 664 * Start or restart transmission. 665 */ 666 static void 667 cdttystart(tp) 668 struct tty *tp; 669 { 670 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)]; 671 struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)]; 672 int s; 673 674 s = spltty(); 675 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 676 goto out; 677 if (p->p_tx_stopped) 678 goto out; 679 680 if (tp->t_outq.c_cc <= tp->t_lowat) { 681 if (ISSET(tp->t_state, TS_ASLEEP)) { 682 CLR(tp->t_state, TS_ASLEEP); 683 wakeup((caddr_t)&tp->t_outq); 684 } 685 selwakeup(&tp->t_wsel); 686 if (tp->t_outq.c_cc == 0) 687 goto out; 688 } 689 690 /* Grab the first contiguous region of buffer space. */ 691 { 692 u_char *tba; 693 int tbc; 694 695 tba = tp->t_outq.c_cf; 696 tbc = ndqb(&tp->t_outq, 0); 697 698 (void)splserial(); 699 700 p->p_tba = tba; 701 p->p_tbc = tbc; 702 } 703 704 SET(tp->t_state, TS_BUSY); 705 p->p_tx_busy = 1; 706 707 /* turn on tx interrupts */ 708 if ((p->p_srer & CD18xx_SRER_Tx) == 0) { 709 cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev)); 710 SET(p->p_srer, CD18xx_SRER_Tx); 711 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 712 } 713 714 /* 715 * Now bail; we can't actually transmit bytes until we're in a 716 * transmit interrupt service routine. 717 */ 718 out: 719 splx(s); 720 return; 721 } 722 723 /* 724 * cdttystop: handing ^S or other stop signals, for a cdtty 725 */ 726 void 727 cdttystop(tp, flag) 728 struct tty *tp; 729 int flag; 730 { 731 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)]; 732 struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)]; 733 int s; 734 735 s = splserial(); 736 if (ISSET(tp->t_state, TS_BUSY)) { 737 /* Stop transmitting at the next chunk. */ 738 p->p_tbc = 0; 739 p->p_heldtbc = 0; 740 if (!ISSET(tp->t_state, TS_TTSTOP)) 741 SET(tp->t_state, TS_FLUSH); 742 } 743 splx(s); 744 } 745 746 /* 747 * load a channel's registers. 748 */ 749 void 750 cdtty_loadchannelregs(sc, p) 751 struct cd18xx_softc *sc; 752 struct cdtty_port *p; 753 { 754 755 cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev)); 756 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 757 cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active = p->p_msvr); 758 cd18xx_write(sc, CD18xx_COR1, p->p_cor1); 759 cd18xx_write(sc, CD18xx_COR2, p->p_cor2); 760 cd18xx_write(sc, CD18xx_COR3, p->p_cor3); 761 /* 762 * COR2 and COR3 change commands are not required here for 763 * the CL-CD1865 but we do them anyway for simplicity. 764 */ 765 cd18xx_write(sc, CD18xx_CCR, CD18xx_CCR_CORCHG | 766 CD18xx_CCR_CORCHG_COR1 | 767 CD18xx_CCR_CORCHG_COR2 | 768 CD18xx_CCR_CORCHG_COR3); 769 cd18xx_write(sc, CD18xx_RBPRH, p->p_rbprh); 770 cd18xx_write(sc, CD18xx_RBPRL, p->p_rbprl); 771 cd18xx_write(sc, CD18xx_TBPRH, p->p_tbprh); 772 cd18xx_write(sc, CD18xx_TBPRL, p->p_tbprl); 773 if (cd18xx_wait_ccr(sc)) { 774 DPRINTF(CDD_INFO, 775 ("%s: cdtty_loadchannelregs ccr wait timed out\n", 776 sc->sc_dev.dv_xname)); 777 } 778 cd18xx_write(sc, CD18xx_CCR, p->p_chanctl); 779 } 780 781 /* 782 * Set tty parameters from termios. 783 * XXX - Should just copy the whole termios after 784 * making sure all the changes could be done. 785 */ 786 static int 787 cdttyparam(tp, t) 788 struct tty *tp; 789 struct termios *t; 790 { 791 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)]; 792 struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)]; 793 int s; 794 795 /* Check requested parameters. */ 796 if (t->c_ospeed < 0) 797 return (EINVAL); 798 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 799 return (EINVAL); 800 801 /* 802 * For the console, always force CLOCAL and !HUPCL, so that the port 803 * is always active. 804 */ 805 if (ISSET(p->p_swflags, TIOCFLAG_SOFTCAR)) { 806 SET(t->c_cflag, CLOCAL); 807 CLR(t->c_cflag, HUPCL); 808 } 809 810 /* 811 * If there were no changes, don't do anything. This avoids dropping 812 * input and improves performance when all we did was frob things like 813 * VMIN and VTIME. 814 */ 815 if (tp->t_ospeed == t->c_ospeed && 816 tp->t_cflag == t->c_cflag) 817 return (0); 818 819 /* 820 * Block interrupts so that state will not 821 * be altered until we are done setting it up. 822 */ 823 s = splserial(); 824 825 /* 826 * Copy across the size, parity and stop bit info. 827 */ 828 switch (t->c_cflag & CSIZE) { 829 case CS5: 830 p->p_cor1 = CD18xx_COR1_CS5; 831 break; 832 case CS6: 833 p->p_cor1 = CD18xx_COR1_CS6; 834 break; 835 case CS7: 836 p->p_cor1 = CD18xx_COR1_CS7; 837 break; 838 default: 839 p->p_cor1 = CD18xx_COR1_CS8; 840 break; 841 } 842 if (ISSET(t->c_cflag, PARENB)) { 843 SET(p->p_cor1, CD18xx_COR1_PARITY_NORMAL); 844 if (ISSET(t->c_cflag, PARODD)) 845 SET(p->p_cor1, CD18xx_COR1_PARITY_ODD); 846 } 847 if (!ISSET(t->c_iflag, INPCK)) 848 SET(p->p_cor1, CD18xx_COR1_IGNORE); 849 if (ISSET(t->c_cflag, CSTOPB)) 850 SET(p->p_cor1, CD18xx_COR1_STOPBIT_2); 851 852 /* 853 * If we're not in a mode that assumes a connection is present, then 854 * ignore carrier changes. 855 */ 856 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 857 p->p_msvr_dcd = 0; 858 else 859 p->p_msvr_dcd = CD18xx_MSVR_CD; 860 861 /* 862 * Set the flow control pins depending on the current flow control 863 * mode. 864 */ 865 if (ISSET(t->c_cflag, CRTSCTS)) { 866 p->p_mcor1_dtr = CD18xx_MCOR1_DTR; 867 p->p_msvr_rts = CD18xx_MSVR_RTS; 868 p->p_msvr_cts = CD18xx_MSVR_CTS; 869 p->p_cor2 = CD18xx_COR2_RTSAOE|CD18xx_COR2_CTSAE; 870 } else if (ISSET(t->c_cflag, MDMBUF)) { 871 /* 872 * For DTR/DCD flow control, make sure we don't toggle DTR for 873 * carrier detection. 874 */ 875 p->p_mcor1_dtr = 0; 876 p->p_msvr_rts = CD18xx_MSVR_DTR; 877 p->p_msvr_cts = CD18xx_MSVR_CD; 878 p->p_cor2 = 0; 879 } else { 880 /* 881 * If no flow control, then always set RTS. This will make 882 * the other side happy if it mistakenly thinks we're doing 883 * RTS/CTS flow control. 884 */ 885 p->p_mcor1_dtr = CD18xx_MSVR_DTR; 886 p->p_msvr_rts = 0; 887 p->p_msvr_cts = 0; 888 p->p_cor2 = 0; 889 } 890 p->p_msvr_mask = p->p_msvr_cts | p->p_msvr_dcd; 891 892 /* 893 * Set the FIFO threshold based on the receive speed. 894 * 895 * * If it's a low speed, it's probably a mouse or some other 896 * interactive device, so set the threshold low. 897 * * If it's a high speed, trim the trigger level down to prevent 898 * overflows. 899 * * Otherwise set it a bit higher. 900 */ 901 p->p_cor3 = (t->c_ospeed <= 1200 ? 1 : 902 t->c_ospeed <= 38400 ? 8 : 4); 903 904 #define PORT_RATE(o, s) \ 905 (((((o) + (s)/2) / (s)) + CD18xx_xBRPR_TPC/2) / CD18xx_xBRPR_TPC) 906 /* Compute BPS for the requested speeds */ 907 if (t->c_ospeed) { 908 u_int32_t tbpr = PORT_RATE(sc->sc_osc, t->c_ospeed); 909 910 if (tbpr == 0 || tbpr > 0xffff) 911 return (EINVAL); 912 913 p->p_tbprh = tbpr >> 8; 914 p->p_tbprl = tbpr & 0xff; 915 } 916 917 if (t->c_ispeed) { 918 u_int32_t rbpr = PORT_RATE(sc->sc_osc, t->c_ispeed); 919 920 if (rbpr == 0 || rbpr > 0xffff) 921 return (EINVAL); 922 923 p->p_rbprh = rbpr >> 8; 924 p->p_rbprl = rbpr & 0xff; 925 } 926 927 /* And copy to tty. */ 928 tp->t_ispeed = 0; 929 tp->t_ospeed = t->c_ospeed; 930 tp->t_cflag = t->c_cflag; 931 932 if (!p->p_heldchange) { 933 if (p->p_tx_busy) { 934 p->p_heldtbc = p->p_tbc; 935 p->p_tbc = 0; 936 p->p_heldchange = 1; 937 } else 938 cdtty_loadchannelregs(sc, p); 939 } 940 941 if (!ISSET(t->c_cflag, CHWFLOW)) { 942 /* Disable the high water mark. */ 943 p->p_r_hiwat = 0; 944 p->p_r_lowat = 0; 945 if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) { 946 CLR(p->p_rx_flags, RX_TTY_OVERFLOWED); 947 softintr_schedule(sc->sc_si); 948 } 949 if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 950 CLR(p->p_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 951 cdtty_hwiflow(sc, p); 952 } 953 } else { 954 p->p_r_hiwat = cdtty_rbuf_hiwat; 955 p->p_r_lowat = cdtty_rbuf_lowat; 956 } 957 958 splx(s); 959 960 /* 961 * Update the tty layer's idea of the carrier bit, in case we changed 962 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 963 * explicit request. 964 */ 965 (void) (*tp->t_linesw->l_modem)(tp, ISSET(p->p_msvr, CD18xx_MSVR_CD)); 966 967 if (!ISSET(t->c_cflag, CHWFLOW)) { 968 if (p->p_tx_stopped) { 969 p->p_tx_stopped = 0; 970 cdttystart(tp); 971 } 972 } 973 974 return (0); 975 } 976 977 static void 978 cdtty_break(sc, p, onoff) 979 struct cd18xx_softc *sc; 980 struct cdtty_port *p; 981 int onoff; 982 { 983 984 /* tell tx intr handler we need a break */ 985 p->p_needbreak = !!onoff; 986 987 /* turn on tx interrupts if break has changed */ 988 if (p->p_needbreak != p->p_break) 989 SET(p->p_srer, CD18xx_SRER_Tx); 990 991 if (!p->p_heldchange) { 992 if (p->p_tx_busy) { 993 p->p_heldtbc = p->p_tbc; 994 p->p_tbc = 0; 995 p->p_heldchange = 1; 996 } else 997 cdtty_loadchannelregs(sc, p); 998 } 999 } 1000 1001 /* 1002 * Raise or lower modem control (DTR/RTS) signals. If a character is 1003 * in transmission, the change is deferred. 1004 */ 1005 static void 1006 cdtty_modem(sc, p, onoff) 1007 struct cd18xx_softc *sc; 1008 struct cdtty_port *p; 1009 int onoff; 1010 { 1011 1012 if (p->p_mcor1_dtr == 0) 1013 return; 1014 1015 if (onoff) 1016 CLR(p->p_mcor1, p->p_mcor1_dtr); 1017 else 1018 SET(p->p_mcor1, p->p_mcor1_dtr); 1019 1020 if (!p->p_heldchange) { 1021 if (p->p_tx_busy) { 1022 p->p_heldtbc = p->p_tbc; 1023 p->p_tbc = 0; 1024 p->p_heldchange = 1; 1025 } else 1026 cdtty_loadchannelregs(sc, p); 1027 } 1028 } 1029 1030 /* 1031 * Try to block or unblock input using hardware flow-control. 1032 * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and 1033 * if this function returns non-zero, the TS_TBLOCK flag will 1034 * be set or cleared according to the "block" arg passed. 1035 */ 1036 int 1037 cdttyhwiflow(tp, block) 1038 struct tty *tp; 1039 int block; 1040 { 1041 struct cd18xx_softc *sc = clcd_cd.cd_devs[CD18XX_INSTANCE(tp->t_dev)]; 1042 struct cdtty_port *p = &sc->sc_ports[CD18XX_CHANNEL(tp->t_dev)]; 1043 int s; 1044 1045 if (p->p_msvr_rts == 0) 1046 return (0); 1047 1048 s = splserial(); 1049 if (block) { 1050 if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) { 1051 SET(p->p_rx_flags, RX_TTY_BLOCKED); 1052 cdtty_hwiflow(sc, p); 1053 } 1054 } else { 1055 if (ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) { 1056 CLR(p->p_rx_flags, RX_TTY_OVERFLOWED); 1057 softintr_schedule(sc->sc_si); 1058 } 1059 if (ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) { 1060 CLR(p->p_rx_flags, RX_TTY_BLOCKED); 1061 cdtty_hwiflow(sc, p); 1062 } 1063 } 1064 splx(s); 1065 return (1); 1066 } 1067 1068 /* 1069 * Internal version of cdttyhwiflow, called at cdtty's priority. 1070 */ 1071 static void 1072 cdtty_hwiflow(sc, p) 1073 struct cd18xx_softc *sc; 1074 struct cdtty_port *p; 1075 { 1076 1077 if (p->p_msvr_rts == 0) 1078 return; 1079 1080 if (ISSET(p->p_rx_flags, RX_ANY_BLOCK)) { 1081 CLR(p->p_msvr, p->p_msvr_rts); 1082 CLR(p->p_msvr_active, p->p_msvr_rts); 1083 } else { 1084 SET(p->p_msvr, p->p_msvr_rts); 1085 SET(p->p_msvr_active, p->p_msvr_rts); 1086 } 1087 cd18xx_set_car(sc, CD18XX_CHANNEL(p->p_tty->t_dev)); 1088 cd18xx_write(sc, CD18xx_MSVR, p->p_msvr_active); 1089 } 1090 1091 /* 1092 * indiviual interrupt routines. 1093 */ 1094 1095 /* 1096 * this is the number of interrupts allowed, total. set it to 0 1097 * to allow unlimited interrpts 1098 */ 1099 #define INTR_MAX_ALLOWED 0 1100 1101 #if INTR_MAX_ALLOWED == 0 1102 #define GOTINTR(sc, p) /* nothing */ 1103 #else 1104 int intrcount; 1105 #define GOTINTR(sc, p) \ 1106 do { \ 1107 if (intrcount++ == INTR_MAX_ALLOWED) { \ 1108 CLR(p->p_srer, CD18xx_SRER_Tx); \ 1109 cd18xx_write(sc, CD18xx_SRER, p->p_srer); \ 1110 } \ 1111 DPRINTF(CDD_INTR, (", intrcount %d srer %x", intrcount, p->p_srer)); \ 1112 } while (0) 1113 #endif 1114 1115 /* receiver interrupt */ 1116 static __inline void 1117 cd18xx_rint(sc, ns) 1118 struct cd18xx_softc *sc; 1119 int *ns; 1120 { 1121 struct cdtty_port *p; 1122 u_int channel, count; 1123 u_char *put, *end; 1124 u_int cc; 1125 1126 /* work out the channel and softc */ 1127 channel = cd18xx_get_gscr1_channel(sc); 1128 p = &sc->sc_ports[channel]; 1129 DPRINTF(CDD_INTR, ("%s: rint: channel %d", sc->sc_dev.dv_xname, channel)); 1130 GOTINTR(sc, p); 1131 1132 end = p->p_ebuf; 1133 put = p->p_rbput; 1134 cc = p->p_rbavail; 1135 1136 /* read as many bytes as necessary */ 1137 count = cd18xx_read(sc, CD18xx_RDCR); 1138 DPRINTF(CDD_INTR, (", %d bytes available: ", count)); 1139 1140 while (cc > 0 && count > 0) { 1141 u_char rcsr = cd18xx_read(sc, CD18xx_RCSR); 1142 1143 put[0] = cd18xx_read(sc, CD18xx_RDR); 1144 put[1] = rcsr; 1145 1146 if (rcsr) 1147 *ns = 1; 1148 1149 put += 2; 1150 if (put >= end) 1151 put = p->p_rbuf; 1152 1153 DPRINTF(CDD_INTR, (".")); 1154 cc--; 1155 count--; 1156 } 1157 1158 DPRINTF(CDD_INTR, (" finished reading")); 1159 1160 /* 1161 * Current string of incoming characters ended because 1162 * no more data was available or we ran out of space. 1163 * If we're out of space, turn off receive interrupts. 1164 */ 1165 p->p_rbput = put; 1166 p->p_rbavail = cc; 1167 if (!ISSET(p->p_rx_flags, RX_TTY_OVERFLOWED)) { 1168 p->p_rx_ready = 1; 1169 } 1170 1171 /* 1172 * If we're out of space, disable receive interrupts 1173 * until the queue has drained a bit. 1174 */ 1175 if (!cc) { 1176 SET(p->p_rx_flags, RX_IBUF_OVERFLOWED); 1177 CLR(p->p_srer, CD18xx_SRER_Rx | 1178 CD18xx_SRER_RxSC | 1179 CD18xx_SRER_CD); 1180 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 1181 } 1182 1183 /* finish the interrupt transaction with the IC */ 1184 cd18xx_write(sc, CD18xx_EOSRR, 0); 1185 DPRINTF(CDD_INTR, (", done\n")); 1186 } 1187 1188 /* 1189 * transmitter interrupt 1190 * 1191 * note this relys on the fact that we allow the transmitter FIFO to 1192 * drain completely 1193 */ 1194 static __inline void 1195 cd18xx_tint(sc, ns) 1196 struct cd18xx_softc *sc; 1197 int *ns; 1198 { 1199 struct cdtty_port *p; 1200 u_int channel; 1201 1202 /* work out the channel and softc */ 1203 channel = cd18xx_get_gscr1_channel(sc); 1204 p = &sc->sc_ports[channel]; 1205 DPRINTF(CDD_INTR, ("%s: tint: channel %d", sc->sc_dev.dv_xname, 1206 channel)); 1207 GOTINTR(sc, p); 1208 1209 /* if the current break condition is wrong, fix it */ 1210 if (p->p_break != p->p_needbreak) { 1211 u_char buf[2]; 1212 1213 DPRINTF(CDD_INTR, (", changing break to %d", p->p_needbreak)); 1214 1215 /* turn on ETC processing */ 1216 cd18xx_write(sc, CD18xx_COR2, p->p_cor2 | CD18xx_COR2_ETC); 1217 1218 buf[0] = CD18xx_TDR_ETC_BYTE; 1219 buf[1] = p->p_needbreak ? CD18xx_TDR_BREAK_BYTE : 1220 CD18xx_TDR_NOBREAK_BYTE; 1221 cd18xx_write_multi(sc, CD18xx_TDR, buf, 2); 1222 1223 p->p_break = p->p_needbreak; 1224 1225 /* turn off ETC processing */ 1226 cd18xx_write(sc, CD18xx_COR2, p->p_cor2); 1227 } 1228 1229 /* 1230 * If we've delayed a parameter change, do it now, and restart 1231 * output. 1232 */ 1233 if (p->p_heldchange) { 1234 cdtty_loadchannelregs(sc, p); 1235 p->p_heldchange = 0; 1236 p->p_tbc = p->p_heldtbc; 1237 p->p_heldtbc = 0; 1238 } 1239 1240 /* Output the next chunk of the contiguous buffer, if any. */ 1241 if (p->p_tbc > 0) { 1242 int n; 1243 1244 n = p->p_tbc; 1245 if (n > 8) /* write up to 8 entries */ 1246 n = 8; 1247 DPRINTF(CDD_INTR, (", writing %d bytes to TDR", n)); 1248 cd18xx_write_multi(sc, CD18xx_TDR, p->p_tba, n); 1249 p->p_tbc -= n; 1250 p->p_tba += n; 1251 } 1252 1253 /* Disable transmit completion interrupts if we ran out of bytes. */ 1254 if (p->p_tbc == 0) { 1255 /* Note that Tx interupts should already be enabled */ 1256 if (ISSET(p->p_srer, CD18xx_SRER_Tx)) { 1257 DPRINTF(CDD_INTR, (", disabling tx interrupts")); 1258 CLR(p->p_srer, CD18xx_SRER_Tx); 1259 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 1260 } 1261 if (p->p_tx_busy) { 1262 p->p_tx_busy = 0; 1263 p->p_tx_done = 1; 1264 } 1265 } 1266 *ns = 1; 1267 1268 /* finish the interrupt transaction with the IC */ 1269 cd18xx_write(sc, CD18xx_EOSRR, 0); 1270 DPRINTF(CDD_INTR, (", done\n")); 1271 } 1272 1273 /* modem signal change interrupt */ 1274 static __inline void 1275 cd18xx_mint(sc, ns) 1276 struct cd18xx_softc *sc; 1277 int *ns; 1278 { 1279 struct cdtty_port *p; 1280 u_int channel; 1281 u_char msvr, delta; 1282 1283 /* work out the channel and softc */ 1284 channel = cd18xx_get_gscr1_channel(sc); 1285 p = &sc->sc_ports[channel]; 1286 DPRINTF(CDD_INTR, ("%s: mint: channel %d", sc->sc_dev.dv_xname, channel)); 1287 GOTINTR(sc, p); 1288 1289 /* 1290 * We ignore the MCR register, and handle detecting deltas 1291 * via software, like many other serial drivers. 1292 */ 1293 msvr = cd18xx_read(sc, CD18xx_MSVR); 1294 delta = msvr ^ p->p_msvr; 1295 DPRINTF(CDD_INTR, (", msvr %d", msvr)); 1296 1297 /* 1298 * Process normal status changes 1299 */ 1300 if (ISSET(delta, p->p_msvr_mask)) { 1301 SET(p->p_msvr_delta, delta); 1302 1303 DPRINTF(CDD_INTR, (", status changed delta %d", delta)); 1304 /* 1305 * Stop output immediately if we lose the output 1306 * flow control signal or carrier detect. 1307 */ 1308 if (ISSET(~msvr, p->p_msvr_mask)) { 1309 p->p_tbc = 0; 1310 p->p_heldtbc = 0; 1311 /* Stop modem interrupt processing */ 1312 } 1313 p->p_st_check = 1; 1314 *ns = 1; 1315 } 1316 1317 /* reset the modem signal register */ 1318 cd18xx_write(sc, CD18xx_MCR, 0); 1319 1320 /* finish the interrupt transaction with the IC */ 1321 cd18xx_write(sc, CD18xx_EOSRR, 0); 1322 DPRINTF(CDD_INTR, (", done\n")); 1323 } 1324 1325 /* 1326 * hardware interrupt routine. call the relevant interrupt routines until 1327 * no interrupts are pending. 1328 * 1329 * note: we do receive interrupts before all others (as we'd rather lose 1330 * a chance to transmit, than lose a character). and we do transmit 1331 * interrupts before modem interrupts. 1332 * 1333 * we have to traverse all of the cd18xx's attached, unfortunately. 1334 */ 1335 int 1336 cd18xx_hardintr(v) 1337 void *v; 1338 { 1339 int i, rv = 0; 1340 u_char ack; 1341 1342 DPRINTF(CDD_INTR, ("cd18xx_hardintr (ndevs %d):\n", clcd_cd.cd_ndevs)); 1343 for (i = 0; i < clcd_cd.cd_ndevs; i++) 1344 { 1345 struct cd18xx_softc *sc = clcd_cd.cd_devs[i]; 1346 int status, ns = 0; 1347 int count = 1; /* process only 1 interrupts at a time for now */ 1348 1349 if (sc == NULL) 1350 continue; 1351 1352 DPRINTF(CDD_INTR, ("%s:", sc->sc_dev.dv_xname)); 1353 while (count-- && 1354 (status = (cd18xx_read(sc, CD18xx_SRSR) & 1355 CD18xx_SRSR_PENDING))) { 1356 rv = 1; 1357 1358 DPRINTF(CDD_INTR, (" status %x:", status)); 1359 if (ISSET(status, CD18xx_SRSR_RxPEND)) { 1360 ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg, 1361 CD18xx_INTRACK_RxINT); 1362 DPRINTF(CDD_INTR, (" rx: ack1 %x\n", ack)); 1363 cd18xx_rint(sc, &ns); 1364 } 1365 if (ISSET(status, CD18xx_SRSR_TxPEND)) { 1366 ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg, 1367 CD18xx_INTRACK_TxINT); 1368 DPRINTF(CDD_INTR, (" tx: ack1 %x\n", ack)); 1369 cd18xx_tint(sc, &ns); 1370 1371 } 1372 if (ISSET(status, CD18xx_SRSR_MxPEND)) { 1373 ack = (*sc->sc_ackfunc)(sc->sc_ackfunc_arg, 1374 CD18xx_INTRACK_MxINT); 1375 DPRINTF(CDD_INTR, (" mx: ack1 %x\n", ack)); 1376 cd18xx_mint(sc, &ns); 1377 } 1378 } 1379 if (ns) 1380 softintr_schedule(sc->sc_si); 1381 } 1382 1383 return (rv); 1384 } 1385 1386 /* 1387 * software interrupt 1388 */ 1389 1390 void 1391 cdtty_rxsoft(sc, p, tp) 1392 struct cd18xx_softc *sc; 1393 struct cdtty_port *p; 1394 struct tty *tp; 1395 { 1396 u_char *get, *end; 1397 u_int cc, scc; 1398 u_char rcsr; 1399 int code; 1400 int s; 1401 1402 end = p->p_ebuf; 1403 get = p->p_rbget; 1404 scc = cc = cdtty_rbuf_size - p->p_rbavail; 1405 1406 if (cc == cdtty_rbuf_size) { 1407 p->p_floods++; 1408 #if 0 1409 if (p->p_errors++ == 0) 1410 callout_reset(&p->p_diag_callout, 60 * hz, 1411 cdttydiag, p); 1412 #endif 1413 } 1414 1415 while (cc) { 1416 code = get[0]; 1417 rcsr = get[1]; 1418 if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR | CD18xx_RCSR_BREAK | 1419 CD18xx_RCSR_FRAMERR | CD18xx_RCSR_PARITYERR)) { 1420 if (ISSET(rcsr, CD18xx_RCSR_OVERRUNERR)) { 1421 p->p_overflows++; 1422 #if 0 1423 if (p->p_errors++ == 0) 1424 callout_reset(&p->p_diag_callout, 1425 60 * hz, cdttydiag, p); 1426 #endif 1427 } 1428 if (ISSET(rcsr, CD18xx_RCSR_BREAK|CD18xx_RCSR_FRAMERR)) 1429 SET(code, TTY_FE); 1430 if (ISSET(rcsr, CD18xx_RCSR_PARITYERR)) 1431 SET(code, TTY_PE); 1432 } 1433 if ((*tp->t_linesw->l_rint)(code, tp) == -1) { 1434 /* 1435 * The line discipline's buffer is out of space. 1436 */ 1437 if (!ISSET(p->p_rx_flags, RX_TTY_BLOCKED)) { 1438 /* 1439 * We're either not using flow control, or the 1440 * line discipline didn't tell us to block for 1441 * some reason. Either way, we have no way to 1442 * know when there's more space available, so 1443 * just drop the rest of the data. 1444 */ 1445 get += cc << 1; 1446 if (get >= end) 1447 get -= cdtty_rbuf_size << 1; 1448 cc = 0; 1449 } else { 1450 /* 1451 * Don't schedule any more receive processing 1452 * until the line discipline tells us there's 1453 * space available (through cdttyhwiflow()). 1454 * Leave the rest of the data in the input 1455 * buffer. 1456 */ 1457 SET(p->p_rx_flags, RX_TTY_OVERFLOWED); 1458 } 1459 break; 1460 } 1461 get += 2; 1462 if (get >= end) 1463 get = p->p_rbuf; 1464 cc--; 1465 } 1466 1467 if (cc != scc) { 1468 p->p_rbget = get; 1469 s = splserial(); 1470 1471 cc = p->p_rbavail += scc - cc; 1472 /* Buffers should be ok again, release possible block. */ 1473 if (cc >= p->p_r_lowat) { 1474 if (ISSET(p->p_rx_flags, RX_IBUF_OVERFLOWED)) { 1475 CLR(p->p_rx_flags, RX_IBUF_OVERFLOWED); 1476 cd18xx_set_car(sc, CD18XX_CHANNEL(tp->t_dev)); 1477 SET(p->p_srer, CD18xx_SRER_Rx | 1478 CD18xx_SRER_RxSC | 1479 CD18xx_SRER_CD); 1480 cd18xx_write(sc, CD18xx_SRER, p->p_srer); 1481 } 1482 if (ISSET(p->p_rx_flags, RX_IBUF_BLOCKED)) { 1483 CLR(p->p_rx_flags, RX_IBUF_BLOCKED); 1484 cdtty_hwiflow(sc, p); 1485 } 1486 } 1487 splx(s); 1488 } 1489 } 1490 1491 void 1492 cdtty_txsoft(sc, p, tp) 1493 struct cd18xx_softc *sc; 1494 struct cdtty_port *p; 1495 struct tty *tp; 1496 { 1497 1498 CLR(tp->t_state, TS_BUSY); 1499 if (ISSET(tp->t_state, TS_FLUSH)) 1500 CLR(tp->t_state, TS_FLUSH); 1501 else 1502 ndflush(&tp->t_outq, (int)(p->p_tba - tp->t_outq.c_cf)); 1503 (*tp->t_linesw->l_start)(tp); 1504 } 1505 1506 void 1507 cdtty_stsoft(sc, p, tp) 1508 struct cd18xx_softc *sc; 1509 struct cdtty_port *p; 1510 struct tty *tp; 1511 { 1512 u_char msvr, delta; 1513 int s; 1514 1515 s = splserial(); 1516 msvr = p->p_msvr; 1517 delta = p->p_msvr_delta; 1518 p->p_msvr_delta = 0; 1519 splx(s); 1520 1521 if (ISSET(delta, p->p_msvr_dcd)) { 1522 /* 1523 * Inform the tty layer that carrier detect changed. 1524 */ 1525 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msvr, CD18xx_MSVR_CD)); 1526 } 1527 1528 if (ISSET(delta, p->p_msvr_cts)) { 1529 /* Block or unblock output according to flow control. */ 1530 if (ISSET(msvr, p->p_msvr_cts)) { 1531 p->p_tx_stopped = 0; 1532 (*tp->t_linesw->l_start)(tp); 1533 } else { 1534 p->p_tx_stopped = 1; 1535 } 1536 } 1537 } 1538 1539 void 1540 cd18xx_softintr(v) 1541 void *v; 1542 { 1543 struct cd18xx_softc *sc = v; 1544 struct cdtty_port *p; 1545 struct tty *tp; 1546 int i; 1547 1548 for (i = 0; i < 8; i++) { 1549 p = &sc->sc_ports[i]; 1550 1551 tp = p->p_tty; 1552 if (tp == NULL) 1553 continue; 1554 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1555 continue; 1556 1557 if (p->p_rx_ready) { 1558 p->p_rx_ready = 0; 1559 cdtty_rxsoft(sc, p, tp); 1560 } 1561 1562 if (p->p_st_check) { 1563 p->p_st_check = 0; 1564 cdtty_stsoft(sc, p, tp); 1565 } 1566 1567 if (p->p_tx_done) { 1568 p->p_tx_done = 0; 1569 cdtty_txsoft(sc, p, tp); 1570 } 1571 } 1572 } 1573
Indexes created Mon Sep 29 15:09:53 GMT 2025