cd18xxvar.h revision 1.3.12.1 1 1.3.12.1 tls /* $NetBSD: cd18xxvar.h,v 1.3.12.1 2012/11/20 03:02:03 tls Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.1 mrg * Copyright (c) 1998, 2001 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg *
16 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 mrg * SUCH DAMAGE.
27 1.1 mrg */
28 1.1 mrg
29 1.1 mrg /*
30 1.1 mrg * cd18xxvar.h: header file for cirrus-logic CL-CD180/CD1864/CD1865 8
31 1.1 mrg * port serial chip.
32 1.1 mrg */
33 1.1 mrg
34 1.1 mrg #include <sys/tty.h>
35 1.1 mrg
36 1.1 mrg /* allocated per-serial port */
37 1.1 mrg struct cdtty_port {
38 1.1 mrg struct tty *p_tty;
39 1.1 mrg
40 1.1 mrg int p_swflags; /* TIOCFLAG_SOFTCAR, etc. */
41 1.1 mrg int p_defspeed; /* default speed */
42 1.1 mrg int p_defcflag; /* default termios cflag */
43 1.1 mrg
44 1.1 mrg u_int p_r_hiwat; /* high water mark */
45 1.1 mrg u_int p_r_lowat; /* low water mark */
46 1.1 mrg u_char *volatile p_rbget; /* ring buffer get ptr */
47 1.1 mrg u_char *volatile p_rbput; /* ring buffer put ptr */
48 1.1 mrg volatile u_int p_rbavail; /* size available */
49 1.1 mrg u_char *p_rbuf; /* ring buffer */
50 1.1 mrg u_char *p_ebuf; /* end of ring buffer */
51 1.1 mrg
52 1.1 mrg u_char * p_tba; /* transmit buffer address */
53 1.1 mrg u_int p_tbc, /* transmit byte count */
54 1.1 mrg p_heldtbc; /* held tbc; waiting for tx */
55 1.1 mrg #define CDTTY_RING_SIZE 2048
56 1.1 mrg
57 1.1 mrg u_int p_parityerr, /* number of parity errors */
58 1.1 mrg p_frameerr, /* number of framing errors */
59 1.1 mrg p_overflows, /* number of overruns */
60 1.1 mrg p_floods; /* number of rbuf floods */
61 1.1 mrg
62 1.1 mrg volatile u_char p_break, /* current break status */
63 1.1 mrg p_needbreak, /* need to generate a break */
64 1.1 mrg p_rx_flags, /* software state */
65 1.1 mrg #define RX_TTY_BLOCKED 0x01
66 1.1 mrg #define RX_TTY_OVERFLOWED 0x02
67 1.1 mrg #define RX_IBUF_BLOCKED 0x04
68 1.1 mrg #define RX_IBUF_OVERFLOWED 0x08
69 1.1 mrg #define RX_ANY_BLOCK 0x0f
70 1.1 mrg p_rx_ready, /* soft rx interrupt ready */
71 1.1 mrg p_rx_busy,
72 1.1 mrg p_tx_done, /* soft tx interrupt ready */
73 1.1 mrg p_tx_busy,
74 1.1 mrg p_tx_stopped,
75 1.1 mrg p_st_check, /* soft modem interrupt ready */
76 1.1 mrg p_heldchange; /* waiting to update regs */
77 1.1 mrg
78 1.1 mrg /*
79 1.1 mrg * cd18xx channel registers we keep a copy of, for writing in
80 1.1 mrg * loadchannelregs().
81 1.1 mrg */
82 1.1 mrg u_char p_srer, /* service request enable */
83 1.1 mrg p_msvr, /* modem signal value */
84 1.1 mrg p_msvr_cts, p_msvr_rts, p_msvr_dcd,
85 1.1 mrg p_msvr_mask, p_msvr_active, p_msvr_delta,
86 1.1 mrg p_cor1, /* channel option reg 1 */
87 1.1 mrg p_cor2, /* channel option reg 2 */
88 1.1 mrg p_cor3, /* channel option reg 3 */
89 1.1 mrg p_mcor1, /* modem option reg 1 */
90 1.1 mrg p_mcor1_dtr,
91 1.1 mrg p_rbprh, /* recv bps high */
92 1.1 mrg p_rbprl, /* recv bps low */
93 1.1 mrg p_tbprh, /* xmit bps high */
94 1.1 mrg p_tbprl, /* xmit bps low */
95 1.1 mrg p_chanctl; /* chanctl command */
96 1.1 mrg };
97 1.1 mrg
98 1.1 mrg /* softc allocated per-cd18xx */
99 1.1 mrg struct cd18xx_softc {
100 1.3.12.1 tls device_t sc_dev;
101 1.3.12.1 tls
102 1.1 mrg /* tag and handle for our registers (128 bytes) */
103 1.1 mrg bus_space_tag_t sc_tag;
104 1.1 mrg bus_space_handle_t sc_handle;
105 1.1 mrg
106 1.1 mrg /*
107 1.1 mrg * cd18xx has weird interrupt acknowledgement and configuration,
108 1.1 mrg * so we have to defer this to our parent. this function must
109 1.1 mrg * do whatever is required to genereate *iack signals that are
110 1.1 mrg * required for the cd180. this probably also depends on the
111 1.1 mrg * values of the sc_rsmr, sc_tsmr and sc_msmr variables. the
112 1.1 mrg * function is called with the provided argument, and with any
113 1.1 mrg * of the 4 #defines below, depending on the ack needing to be
114 1.1 mrg * generated.
115 1.1 mrg */
116 1.1 mrg u_char (*sc_ackfunc)(void *, int);
117 1.1 mrg #define CD18xx_INTRACK_MxINT 0x01 /* modem interrupt */
118 1.1 mrg #define CD18xx_INTRACK_TxINT 0x02 /* tx interrupt */
119 1.1 mrg #define CD18xx_INTRACK_RxINT 0x04 /* rx (good data) interrupt */
120 1.1 mrg #define CD18xx_INTRACK_REINT 0x08 /* rx (exception) interrupt */
121 1.1 mrg void *sc_ackfunc_arg;
122 1.1 mrg
123 1.1 mrg u_char sc_rsmr;
124 1.1 mrg u_char sc_tsmr;
125 1.1 mrg u_char sc_msmr;
126 1.1 mrg
127 1.1 mrg u_int sc_osc;
128 1.1 mrg
129 1.1 mrg /*
130 1.1 mrg * everything above here needs to be setup by our caller, and
131 1.1 mrg * everything below here is setup by the generic cd18xx code.
132 1.1 mrg */
133 1.1 mrg u_int sc_chip_id; /* unique per-cd18xx value */
134 1.1 mrg void *sc_si; /* softintr(9) cookie */
135 1.1 mrg
136 1.1 mrg struct cdtty_port sc_ports[8];
137 1.1 mrg
138 1.1 mrg u_char sc_pprh;
139 1.1 mrg u_char sc_pprl;
140 1.1 mrg };
141 1.1 mrg
142 1.1 mrg /* hard interrupt, to be configured by our caller */
143 1.1 mrg int cd18xx_hardintr(void *);
144 1.1 mrg
145 1.1 mrg /* main attach routine called by the high level driver */
146 1.1 mrg void cd18xx_attach(struct cd18xx_softc *);
147 1.1 mrg
148 1.1 mrg /*
149 1.1 mrg * device minor layout has bit 19 for dialout and bits 0..18 for the unit.
150 1.1 mrg * the first 3 bits of the unit are the channel number inside a single
151 1.1 mrg * cd18xx instance, and the remaining bits indicate the instance number.
152 1.1 mrg */
153 1.1 mrg #define CD18XX_TTY(x) (minor(x) & 0x7ffff)
154 1.1 mrg #define CD18XX_CHANNEL(x) (minor(x) & 7)
155 1.1 mrg #define CD18XX_INSTANCE(x) ((minor(x) >> 3) & 0xffff)
156 1.1 mrg #define CD18XX_DIALOUT(x) ((minor(x) & 0x80000) != 0)
157 1.1 mrg
158 1.1 mrg /* short helpers for read/write */
159 1.1 mrg #define cd18xx_read(sc, o) \
160 1.1 mrg bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, o)
161 1.1 mrg #define cd18xx_read_multi(sc, o, b, c) \
162 1.1 mrg bus_space_read_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
163 1.1 mrg
164 1.1 mrg #define cd18xx_write(sc, o, v) \
165 1.1 mrg bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, o, v)
166 1.1 mrg #define cd18xx_write_multi(sc, o, b, c) \
167 1.1 mrg bus_space_write_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
168 1.1 mrg
169 1.1 mrg /* set the current channel */
170 1.1 mrg #define cd18xx_set_car(sc, c) \
171 1.1 mrg do { \
172 1.1 mrg bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_CAR, c); \
173 1.1 mrg delay(1); \
174 1.1 mrg } while (0)
175 1.1 mrg
176 1.1 mrg /* get the current channel */
177 1.1 mrg #define cd18xx_get_gscr1_channel(sc) \
178 1.1 mrg ((bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_GSCR1) >> 2)&7)
179