Home | History | Annotate | Line # | Download | only in ic
ciss.c revision 1.1.6.2
      1  1.1.6.2  riz /*	$NetBSD: ciss.c,v 1.1.6.2 2006/04/11 01:15:22 riz Exp $	*/
      2  1.1.6.2  riz /*	$OpenBSD: ciss.c,v 1.13 2006/02/02 22:13:04 brad Exp $	*/
      3  1.1.6.2  riz 
      4  1.1.6.2  riz /*
      5  1.1.6.2  riz  * Copyright (c) 2005 Michael Shalayeff
      6  1.1.6.2  riz  * All rights reserved.
      7  1.1.6.2  riz  *
      8  1.1.6.2  riz  * Permission to use, copy, modify, and distribute this software for any
      9  1.1.6.2  riz  * purpose with or without fee is hereby granted, provided that the above
     10  1.1.6.2  riz  * copyright notice and this permission notice appear in all copies.
     11  1.1.6.2  riz  *
     12  1.1.6.2  riz  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     13  1.1.6.2  riz  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     14  1.1.6.2  riz  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     15  1.1.6.2  riz  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     16  1.1.6.2  riz  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
     17  1.1.6.2  riz  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
     18  1.1.6.2  riz  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     19  1.1.6.2  riz  */
     20  1.1.6.2  riz 
     21  1.1.6.2  riz #include <sys/cdefs.h>
     22  1.1.6.2  riz __KERNEL_RCSID(0, "$NetBSD: ciss.c,v 1.1.6.2 2006/04/11 01:15:22 riz Exp $");
     23  1.1.6.2  riz 
     24  1.1.6.2  riz /* #define CISS_DEBUG */
     25  1.1.6.2  riz 
     26  1.1.6.2  riz #include <sys/param.h>
     27  1.1.6.2  riz #include <sys/systm.h>
     28  1.1.6.2  riz #include <sys/buf.h>
     29  1.1.6.2  riz #include <sys/ioctl.h>
     30  1.1.6.2  riz #include <sys/device.h>
     31  1.1.6.2  riz #include <sys/kernel.h>
     32  1.1.6.2  riz #include <sys/malloc.h>
     33  1.1.6.2  riz #include <sys/proc.h>
     34  1.1.6.2  riz #include <sys/kthread.h>
     35  1.1.6.2  riz 
     36  1.1.6.2  riz #include <uvm/uvm_extern.h>
     37  1.1.6.2  riz 
     38  1.1.6.2  riz #include <machine/bus.h>
     39  1.1.6.2  riz 
     40  1.1.6.2  riz #include <dev/scsipi/scsi_all.h>
     41  1.1.6.2  riz #include <dev/scsipi/scsi_disk.h>
     42  1.1.6.2  riz #include <dev/scsipi/scsipi_all.h>
     43  1.1.6.2  riz #include <dev/scsipi/scsiconf.h>
     44  1.1.6.2  riz 
     45  1.1.6.2  riz #include <dev/ic/cissreg.h>
     46  1.1.6.2  riz #include <dev/ic/cissvar.h>
     47  1.1.6.2  riz 
     48  1.1.6.2  riz #ifdef CISS_DEBUG
     49  1.1.6.2  riz #define	CISS_DPRINTF(m,a)	if (ciss_debug & (m)) printf a
     50  1.1.6.2  riz #define	CISS_D_CMD	0x0001
     51  1.1.6.2  riz #define	CISS_D_INTR	0x0002
     52  1.1.6.2  riz #define	CISS_D_MISC	0x0004
     53  1.1.6.2  riz #define	CISS_D_DMA	0x0008
     54  1.1.6.2  riz #define	CISS_D_IOCTL	0x0010
     55  1.1.6.2  riz #define	CISS_D_ERR	0x0020
     56  1.1.6.2  riz int ciss_debug = 0
     57  1.1.6.2  riz 	| CISS_D_CMD
     58  1.1.6.2  riz 	| CISS_D_INTR
     59  1.1.6.2  riz 	| CISS_D_MISC
     60  1.1.6.2  riz 	| CISS_D_DMA
     61  1.1.6.2  riz 	| CISS_D_IOCTL
     62  1.1.6.2  riz 	| CISS_D_ERR
     63  1.1.6.2  riz 	;
     64  1.1.6.2  riz #else
     65  1.1.6.2  riz #define	CISS_DPRINTF(m,a)	/* m, a */
     66  1.1.6.2  riz #endif
     67  1.1.6.2  riz 
     68  1.1.6.2  riz /*
     69  1.1.6.2  riz  * Portability for older SCSIPI infrastructure, as found on netbsd-2.
     70  1.1.6.2  riz  */
     71  1.1.6.2  riz #ifndef SSD_RCODE_CURRENT
     72  1.1.6.2  riz #define SSD_RCODE_CURRENT	0x70
     73  1.1.6.2  riz #define SSD_RCODE_VALID		SSD_ERRCODE_VALID
     74  1.1.6.2  riz #define response_code	error_code
     75  1.1.6.2  riz #define asc		add_sense_code
     76  1.1.6.2  riz #define ascq		add_sense_code_qual
     77  1.1.6.2  riz #endif /* SSD_RCODE_CURRENT */
     78  1.1.6.2  riz 
     79  1.1.6.2  riz static void	ciss_scsi_cmd(struct scsipi_channel *chan,
     80  1.1.6.2  riz 			scsipi_adapter_req_t req, void *arg);
     81  1.1.6.2  riz static int	ciss_scsi_ioctl(struct scsipi_channel *chan, u_long cmd,
     82  1.1.6.2  riz 	    caddr_t addr, int flag, struct proc *p);
     83  1.1.6.2  riz static void	cissminphys(struct buf *bp);
     84  1.1.6.2  riz 
     85  1.1.6.2  riz #if 0
     86  1.1.6.2  riz static void	ciss_scsi_raw_cmd(struct scsipi_channel *chan,
     87  1.1.6.2  riz 			scsipi_adapter_req_t req, void *arg);
     88  1.1.6.2  riz #endif
     89  1.1.6.2  riz 
     90  1.1.6.2  riz #if NBIO > 0
     91  1.1.6.2  riz static int	ciss_ioctl(struct device *, u_long, caddr_t);
     92  1.1.6.2  riz #endif
     93  1.1.6.2  riz static int	ciss_sync(struct ciss_softc *sc);
     94  1.1.6.2  riz static void	ciss_heartbeat(void *v);
     95  1.1.6.2  riz static void	ciss_shutdown(void *v);
     96  1.1.6.2  riz #if 0
     97  1.1.6.2  riz static void	ciss_kthread(void *v);
     98  1.1.6.2  riz #endif
     99  1.1.6.2  riz 
    100  1.1.6.2  riz static struct ciss_ccb *ciss_get_ccb(struct ciss_softc *sc);
    101  1.1.6.2  riz static void	ciss_put_ccb(struct ciss_ccb *ccb);
    102  1.1.6.2  riz static int	ciss_cmd(struct ciss_ccb *ccb, int flags, int wait);
    103  1.1.6.2  riz static int	ciss_done(struct ciss_ccb *ccb);
    104  1.1.6.2  riz static int	ciss_error(struct ciss_ccb *ccb);
    105  1.1.6.2  riz static int	ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq);
    106  1.1.6.2  riz static int	ciss_ldmap(struct ciss_softc *sc);
    107  1.1.6.2  riz 
    108  1.1.6.2  riz static struct ciss_ccb *
    109  1.1.6.2  riz ciss_get_ccb(struct ciss_softc *sc)
    110  1.1.6.2  riz {
    111  1.1.6.2  riz 	struct ciss_ccb *ccb;
    112  1.1.6.2  riz 
    113  1.1.6.2  riz 	if ((ccb = TAILQ_LAST(&sc->sc_free_ccb, ciss_queue_head))) {
    114  1.1.6.2  riz 		TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ccb_link);
    115  1.1.6.2  riz 		ccb->ccb_state = CISS_CCB_READY;
    116  1.1.6.2  riz 	}
    117  1.1.6.2  riz 	return ccb;
    118  1.1.6.2  riz }
    119  1.1.6.2  riz 
    120  1.1.6.2  riz static void
    121  1.1.6.2  riz ciss_put_ccb(struct ciss_ccb *ccb)
    122  1.1.6.2  riz {
    123  1.1.6.2  riz 	struct ciss_softc *sc = ccb->ccb_sc;
    124  1.1.6.2  riz 
    125  1.1.6.2  riz 	ccb->ccb_state = CISS_CCB_FREE;
    126  1.1.6.2  riz 	TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
    127  1.1.6.2  riz }
    128  1.1.6.2  riz 
    129  1.1.6.2  riz int
    130  1.1.6.2  riz ciss_attach(struct ciss_softc *sc)
    131  1.1.6.2  riz {
    132  1.1.6.2  riz 	struct ciss_ccb *ccb;
    133  1.1.6.2  riz 	struct ciss_cmd *cmd;
    134  1.1.6.2  riz 	struct ciss_inquiry *inq;
    135  1.1.6.2  riz 	bus_dma_segment_t seg[1];
    136  1.1.6.2  riz 	int error, i, total, rseg, maxfer;
    137  1.1.6.2  riz 	ciss_lock_t lock;
    138  1.1.6.2  riz 	paddr_t pa;
    139  1.1.6.2  riz 
    140  1.1.6.2  riz 	bus_space_read_region_4(sc->sc_iot, sc->cfg_ioh, sc->cfgoff,
    141  1.1.6.2  riz 	    (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
    142  1.1.6.2  riz 
    143  1.1.6.2  riz 	if (sc->cfg.signature != CISS_SIGNATURE) {
    144  1.1.6.2  riz 		printf(": bad sign 0x%08x\n", sc->cfg.signature);
    145  1.1.6.2  riz 		return -1;
    146  1.1.6.2  riz 	}
    147  1.1.6.2  riz 
    148  1.1.6.2  riz 	if (!(sc->cfg.methods & CISS_METH_SIMPL)) {
    149  1.1.6.2  riz 		printf(": not simple 0x%08x\n", sc->cfg.methods);
    150  1.1.6.2  riz 		return -1;
    151  1.1.6.2  riz 	}
    152  1.1.6.2  riz 
    153  1.1.6.2  riz 	sc->cfg.rmethod = CISS_METH_SIMPL;
    154  1.1.6.2  riz 	sc->cfg.paddr_lim = 0;			/* 32bit addrs */
    155  1.1.6.2  riz 	sc->cfg.int_delay = 0;			/* disable coalescing */
    156  1.1.6.2  riz 	sc->cfg.int_count = 0;
    157  1.1.6.2  riz 	strlcpy(sc->cfg.hostname, "HUMPPA", sizeof(sc->cfg.hostname));
    158  1.1.6.2  riz 	sc->cfg.driverf |= CISS_DRV_PRF;	/* enable prefetch */
    159  1.1.6.2  riz 	if (!sc->cfg.maxsg)
    160  1.1.6.2  riz 		sc->cfg.maxsg = MAXPHYS / PAGE_SIZE + 1;
    161  1.1.6.2  riz 
    162  1.1.6.2  riz 	bus_space_write_region_4(sc->sc_iot, sc->cfg_ioh, sc->cfgoff,
    163  1.1.6.2  riz 	    (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
    164  1.1.6.2  riz 	bus_space_barrier(sc->sc_iot, sc->cfg_ioh, sc->cfgoff, sizeof(sc->cfg),
    165  1.1.6.2  riz 	    BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
    166  1.1.6.2  riz 
    167  1.1.6.2  riz 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_IDB, CISS_IDB_CFG);
    168  1.1.6.2  riz 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, CISS_IDB, 4,
    169  1.1.6.2  riz 	    BUS_SPACE_BARRIER_WRITE);
    170  1.1.6.2  riz 	for (i = 1000; i--; DELAY(1000)) {
    171  1.1.6.2  riz 		/* XXX maybe IDB is really 64bit? - hp dl380 needs this */
    172  1.1.6.2  riz 		(void)bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IDB + 4);
    173  1.1.6.2  riz 		if (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IDB) & CISS_IDB_CFG))
    174  1.1.6.2  riz 			break;
    175  1.1.6.2  riz 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, CISS_IDB, 4,
    176  1.1.6.2  riz 		    BUS_SPACE_BARRIER_READ);
    177  1.1.6.2  riz 	}
    178  1.1.6.2  riz 
    179  1.1.6.2  riz 	if (bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IDB) & CISS_IDB_CFG) {
    180  1.1.6.2  riz 		printf(": cannot set config\n");
    181  1.1.6.2  riz 		return -1;
    182  1.1.6.2  riz 	}
    183  1.1.6.2  riz 
    184  1.1.6.2  riz 	bus_space_read_region_4(sc->sc_iot, sc->cfg_ioh, sc->cfgoff,
    185  1.1.6.2  riz 	    (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
    186  1.1.6.2  riz 
    187  1.1.6.2  riz 	if (!(sc->cfg.amethod & CISS_METH_SIMPL)) {
    188  1.1.6.2  riz 		printf(": cannot simplify 0x%08x\n", sc->cfg.amethod);
    189  1.1.6.2  riz 		return -1;
    190  1.1.6.2  riz 	}
    191  1.1.6.2  riz 
    192  1.1.6.2  riz 	/* i'm ready for you and i hope you're ready for me */
    193  1.1.6.2  riz 	for (i = 30000; i--; DELAY(1000)) {
    194  1.1.6.2  riz 		if (bus_space_read_4(sc->sc_iot, sc->cfg_ioh, sc->cfgoff +
    195  1.1.6.2  riz 		    offsetof(struct ciss_config, amethod)) & CISS_METH_READY)
    196  1.1.6.2  riz 			break;
    197  1.1.6.2  riz 		bus_space_barrier(sc->sc_iot, sc->cfg_ioh, sc->cfgoff +
    198  1.1.6.2  riz 		    offsetof(struct ciss_config, amethod), 4,
    199  1.1.6.2  riz 		    BUS_SPACE_BARRIER_READ);
    200  1.1.6.2  riz 	}
    201  1.1.6.2  riz 
    202  1.1.6.2  riz 	if (!(bus_space_read_4(sc->sc_iot, sc->cfg_ioh, sc->cfgoff +
    203  1.1.6.2  riz 	    offsetof(struct ciss_config, amethod)) & CISS_METH_READY)) {
    204  1.1.6.2  riz 		printf(": she never came ready for me 0x%08x\n",
    205  1.1.6.2  riz 		    sc->cfg.amethod);
    206  1.1.6.2  riz 		return -1;
    207  1.1.6.2  riz 	}
    208  1.1.6.2  riz 
    209  1.1.6.2  riz 	sc->maxcmd = sc->cfg.maxcmd;
    210  1.1.6.2  riz 	sc->maxsg = sc->cfg.maxsg;
    211  1.1.6.2  riz 	if (sc->maxsg > MAXPHYS / PAGE_SIZE + 1)
    212  1.1.6.2  riz 		sc->maxsg = MAXPHYS / PAGE_SIZE + 1;
    213  1.1.6.2  riz 	i = sizeof(struct ciss_ccb) +
    214  1.1.6.2  riz 	    sizeof(ccb->ccb_cmd.sgl[0]) * (sc->maxsg - 1);
    215  1.1.6.2  riz 	for (sc->ccblen = 0x10; sc->ccblen < i; sc->ccblen <<= 1);
    216  1.1.6.2  riz 
    217  1.1.6.2  riz 	total = sc->ccblen * sc->maxcmd;
    218  1.1.6.2  riz 	if ((error = bus_dmamem_alloc(sc->sc_dmat, total, PAGE_SIZE, 0,
    219  1.1.6.2  riz 	    sc->cmdseg, 1, &rseg, BUS_DMA_NOWAIT))) {
    220  1.1.6.2  riz 		printf(": cannot allocate CCBs (%d)\n", error);
    221  1.1.6.2  riz 		return -1;
    222  1.1.6.2  riz 	}
    223  1.1.6.2  riz 
    224  1.1.6.2  riz 	if ((error = bus_dmamem_map(sc->sc_dmat, sc->cmdseg, rseg, total,
    225  1.1.6.2  riz 	    (caddr_t *)&sc->ccbs, BUS_DMA_NOWAIT))) {
    226  1.1.6.2  riz 		printf(": cannot map CCBs (%d)\n", error);
    227  1.1.6.2  riz 		return -1;
    228  1.1.6.2  riz 	}
    229  1.1.6.2  riz 	bzero(sc->ccbs, total);
    230  1.1.6.2  riz 
    231  1.1.6.2  riz 	if ((error = bus_dmamap_create(sc->sc_dmat, total, 1,
    232  1.1.6.2  riz 	    total, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->cmdmap))) {
    233  1.1.6.2  riz 		printf(": cannot create CCBs dmamap (%d)\n", error);
    234  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    235  1.1.6.2  riz 		return -1;
    236  1.1.6.2  riz 	}
    237  1.1.6.2  riz 
    238  1.1.6.2  riz 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->cmdmap, sc->ccbs, total,
    239  1.1.6.2  riz 	    NULL, BUS_DMA_NOWAIT))) {
    240  1.1.6.2  riz 		printf(": cannot load CCBs dmamap (%d)\n", error);
    241  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    242  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    243  1.1.6.2  riz 		return -1;
    244  1.1.6.2  riz 	}
    245  1.1.6.2  riz 
    246  1.1.6.2  riz 	TAILQ_INIT(&sc->sc_ccbq);
    247  1.1.6.2  riz 	TAILQ_INIT(&sc->sc_ccbdone);
    248  1.1.6.2  riz 	TAILQ_INIT(&sc->sc_free_ccb);
    249  1.1.6.2  riz 
    250  1.1.6.2  riz 	maxfer = sc->maxsg * PAGE_SIZE;
    251  1.1.6.2  riz 	for (i = 0; total > 0 && i < sc->maxcmd; i++, total -= sc->ccblen) {
    252  1.1.6.2  riz 		ccb = (struct ciss_ccb *) (sc->ccbs + i * sc->ccblen);
    253  1.1.6.2  riz 		cmd = &ccb->ccb_cmd;
    254  1.1.6.2  riz 		pa = sc->cmdseg[0].ds_addr + i * sc->ccblen;
    255  1.1.6.2  riz 
    256  1.1.6.2  riz 		ccb->ccb_sc = sc;
    257  1.1.6.2  riz 		ccb->ccb_cmdpa = pa + offsetof(struct ciss_ccb, ccb_cmd);
    258  1.1.6.2  riz 		ccb->ccb_state = CISS_CCB_FREE;
    259  1.1.6.2  riz 
    260  1.1.6.2  riz 		cmd->id = htole32(i << 2);
    261  1.1.6.2  riz 		cmd->id_hi = htole32(0);
    262  1.1.6.2  riz 		cmd->sgin = sc->maxsg;
    263  1.1.6.2  riz 		cmd->sglen = htole16((u_int16_t)cmd->sgin);
    264  1.1.6.2  riz 		cmd->err_len = htole32(sizeof(ccb->ccb_err));
    265  1.1.6.2  riz 		pa += offsetof(struct ciss_ccb, ccb_err);
    266  1.1.6.2  riz 		cmd->err_pa = htole64((u_int64_t)pa);
    267  1.1.6.2  riz 
    268  1.1.6.2  riz 		if ((error = bus_dmamap_create(sc->sc_dmat, maxfer, sc->maxsg,
    269  1.1.6.2  riz 		    maxfer, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
    270  1.1.6.2  riz 		    &ccb->ccb_dmamap)))
    271  1.1.6.2  riz 			break;
    272  1.1.6.2  riz 
    273  1.1.6.2  riz 		TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
    274  1.1.6.2  riz 	}
    275  1.1.6.2  riz 
    276  1.1.6.2  riz 	if (i < sc->maxcmd) {
    277  1.1.6.2  riz 		printf(": cannot create ccb#%d dmamap (%d)\n", i, error);
    278  1.1.6.2  riz 		if (i == 0) {
    279  1.1.6.2  riz 			/* TODO leaking cmd's dmamaps and shitz */
    280  1.1.6.2  riz 			bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    281  1.1.6.2  riz 			bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    282  1.1.6.2  riz 			return -1;
    283  1.1.6.2  riz 		}
    284  1.1.6.2  riz 	}
    285  1.1.6.2  riz 
    286  1.1.6.2  riz 	if ((error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0,
    287  1.1.6.2  riz 	    seg, 1, &rseg, BUS_DMA_NOWAIT))) {
    288  1.1.6.2  riz 		printf(": cannot allocate scratch buffer (%d)\n", error);
    289  1.1.6.2  riz 		return -1;
    290  1.1.6.2  riz 	}
    291  1.1.6.2  riz 
    292  1.1.6.2  riz 	if ((error = bus_dmamem_map(sc->sc_dmat, seg, rseg, PAGE_SIZE,
    293  1.1.6.2  riz 	    (caddr_t *)&sc->scratch, BUS_DMA_NOWAIT))) {
    294  1.1.6.2  riz 		printf(": cannot map scratch buffer (%d)\n", error);
    295  1.1.6.2  riz 		return -1;
    296  1.1.6.2  riz 	}
    297  1.1.6.2  riz 	bzero(sc->scratch, PAGE_SIZE);
    298  1.1.6.2  riz 
    299  1.1.6.2  riz 	lock = CISS_LOCK_SCRATCH(sc);
    300  1.1.6.2  riz 	inq = sc->scratch;
    301  1.1.6.2  riz 	if (ciss_inq(sc, inq)) {
    302  1.1.6.2  riz 		printf(": adapter inquiry failed\n");
    303  1.1.6.2  riz 		CISS_UNLOCK_SCRATCH(sc, lock);
    304  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    305  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    306  1.1.6.2  riz 		return -1;
    307  1.1.6.2  riz 	}
    308  1.1.6.2  riz 
    309  1.1.6.2  riz 	if (!(inq->flags & CISS_INQ_BIGMAP)) {
    310  1.1.6.2  riz 		printf(": big map is not supported, flags=0x%x\n",
    311  1.1.6.2  riz 		    inq->flags);
    312  1.1.6.2  riz 		CISS_UNLOCK_SCRATCH(sc, lock);
    313  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    314  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    315  1.1.6.2  riz 		return -1;
    316  1.1.6.2  riz 	}
    317  1.1.6.2  riz 
    318  1.1.6.2  riz 	sc->maxunits = inq->numld;
    319  1.1.6.2  riz 	sc->nbus = inq->nscsi_bus;
    320  1.1.6.2  riz 	sc->ndrives = inq->buswidth;
    321  1.1.6.2  riz 	printf(": %d LD%s, HW rev %d, FW %4.4s/%4.4s\n",
    322  1.1.6.2  riz 	    inq->numld, inq->numld == 1? "" : "s",
    323  1.1.6.2  riz 	    inq->hw_rev, inq->fw_running, inq->fw_stored);
    324  1.1.6.2  riz 
    325  1.1.6.2  riz 	CISS_UNLOCK_SCRATCH(sc, lock);
    326  1.1.6.2  riz 
    327  1.1.6.2  riz 	callout_init(&sc->sc_hb);
    328  1.1.6.2  riz 	callout_setfunc(&sc->sc_hb, ciss_heartbeat, sc);
    329  1.1.6.2  riz 	callout_schedule(&sc->sc_hb, hz * 3);
    330  1.1.6.2  riz 
    331  1.1.6.2  riz 	/* map LDs */
    332  1.1.6.2  riz 	if (ciss_ldmap(sc)) {
    333  1.1.6.2  riz 		printf("%s: adapter LD map failed\n", sc->sc_dev.dv_xname);
    334  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    335  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    336  1.1.6.2  riz 		return -1;
    337  1.1.6.2  riz 	}
    338  1.1.6.2  riz 
    339  1.1.6.2  riz /* TODO scan all physdev */
    340  1.1.6.2  riz /* TODO scan all logdev */
    341  1.1.6.2  riz 
    342  1.1.6.2  riz 	sc->sc_flush = CISS_FLUSH_ENABLE;
    343  1.1.6.2  riz 	if (!(sc->sc_sh = shutdownhook_establish(ciss_shutdown, sc))) {
    344  1.1.6.2  riz 		printf(": unable to establish shutdown hook\n");
    345  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    346  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    347  1.1.6.2  riz 		return -1;
    348  1.1.6.2  riz 	}
    349  1.1.6.2  riz 
    350  1.1.6.2  riz #if 0
    351  1.1.6.2  riz 	if (kthread_create(ciss_kthread, sc, NULL, "%s", sc->sc_dev.dv_xname)) {
    352  1.1.6.2  riz 		printf(": unable to create kernel thread\n");
    353  1.1.6.2  riz 		shutdownhook_disestablish(sc->sc_sh);
    354  1.1.6.2  riz 		bus_dmamem_free(sc->sc_dmat, sc->cmdseg, 1);
    355  1.1.6.2  riz 		bus_dmamap_destroy(sc->sc_dmat, sc->cmdmap);
    356  1.1.6.2  riz 		return -1;
    357  1.1.6.2  riz 	}
    358  1.1.6.2  riz #endif
    359  1.1.6.2  riz 
    360  1.1.6.2  riz 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
    361  1.1.6.2  riz 	sc->sc_channel.chan_bustype = &scsi_bustype;
    362  1.1.6.2  riz 	sc->sc_channel.chan_channel = 0;
    363  1.1.6.2  riz 	sc->sc_channel.chan_ntargets = sc->maxunits;
    364  1.1.6.2  riz 	sc->sc_channel.chan_nluns = 8;
    365  1.1.6.2  riz 	sc->sc_channel.chan_openings = sc->maxcmd / (sc->maxunits? sc->maxunits : 1);
    366  1.1.6.2  riz 	sc->sc_channel.chan_flags = 0;
    367  1.1.6.2  riz 	sc->sc_channel.chan_id = sc->maxunits;
    368  1.1.6.2  riz 
    369  1.1.6.2  riz 	sc->sc_adapter.adapt_dev = (struct device *) sc;
    370  1.1.6.2  riz 	sc->sc_adapter.adapt_openings = sc->maxcmd / (sc->maxunits? sc->maxunits : 1);
    371  1.1.6.2  riz 	sc->sc_adapter.adapt_max_periph = sc->maxunits;
    372  1.1.6.2  riz 	sc->sc_adapter.adapt_request = ciss_scsi_cmd;
    373  1.1.6.2  riz 	sc->sc_adapter.adapt_minphys = cissminphys;
    374  1.1.6.2  riz 	sc->sc_adapter.adapt_ioctl = ciss_scsi_ioctl;
    375  1.1.6.2  riz 	sc->sc_adapter.adapt_nchannels = 1;
    376  1.1.6.2  riz 	config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
    377  1.1.6.2  riz 
    378  1.1.6.2  riz #if 0
    379  1.1.6.2  riz 	sc->sc_link_raw.adapter_softc = sc;
    380  1.1.6.2  riz 	sc->sc_link.openings = sc->maxcmd / (sc->maxunits? sc->maxunits : 1);
    381  1.1.6.2  riz 	sc->sc_link_raw.adapter = &ciss_raw_switch;
    382  1.1.6.2  riz 	sc->sc_link_raw.adapter_target = sc->ndrives;
    383  1.1.6.2  riz 	sc->sc_link_raw.adapter_buswidth = sc->ndrives;
    384  1.1.6.2  riz 	config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
    385  1.1.6.2  riz #endif
    386  1.1.6.2  riz 
    387  1.1.6.2  riz #if NBIO1 > 0
    388  1.1.6.2  riz 	if (bio_register(&sc->sc_dev, ciss_ioctl) != 0)
    389  1.1.6.2  riz 		printf("%s: controller registration failed",
    390  1.1.6.2  riz 		    sc->sc_dev.dv_xname);
    391  1.1.6.2  riz #endif
    392  1.1.6.2  riz 
    393  1.1.6.2  riz 	return 0;
    394  1.1.6.2  riz }
    395  1.1.6.2  riz 
    396  1.1.6.2  riz static void
    397  1.1.6.2  riz ciss_shutdown(void *v)
    398  1.1.6.2  riz {
    399  1.1.6.2  riz 	struct ciss_softc *sc = v;
    400  1.1.6.2  riz 
    401  1.1.6.2  riz 	sc->sc_flush = CISS_FLUSH_DISABLE;
    402  1.1.6.2  riz 	/* timeout_del(&sc->sc_hb); */
    403  1.1.6.2  riz 	ciss_sync(sc);
    404  1.1.6.2  riz }
    405  1.1.6.2  riz 
    406  1.1.6.2  riz static void
    407  1.1.6.2  riz cissminphys(struct buf *bp)
    408  1.1.6.2  riz {
    409  1.1.6.2  riz #if 0	/* TOSO */
    410  1.1.6.2  riz #define	CISS_MAXFER	(PAGE_SIZE * (sc->maxsg + 1))
    411  1.1.6.2  riz 	if (bp->b_bcount > CISS_MAXFER)
    412  1.1.6.2  riz 		bp->b_bcount = CISS_MAXFER;
    413  1.1.6.2  riz #endif
    414  1.1.6.2  riz 	minphys(bp);
    415  1.1.6.2  riz }
    416  1.1.6.2  riz 
    417  1.1.6.2  riz /*
    418  1.1.6.2  riz  * submit a command and optionally wait for completition.
    419  1.1.6.2  riz  * wait arg abuses XS_CTL_POLL|XS_CTL_NOSLEEP flags to request
    420  1.1.6.2  riz  * to wait (XS_CTL_POLL) and to allow tsleep() (!XS_CTL_NOSLEEP)
    421  1.1.6.2  riz  * instead of busy loop waiting
    422  1.1.6.2  riz  */
    423  1.1.6.2  riz static int
    424  1.1.6.2  riz ciss_cmd(struct ciss_ccb *ccb, int flags, int wait)
    425  1.1.6.2  riz {
    426  1.1.6.2  riz 	struct ciss_softc *sc = ccb->ccb_sc;
    427  1.1.6.2  riz 	struct ciss_cmd *cmd = &ccb->ccb_cmd;
    428  1.1.6.2  riz 	struct ciss_ccb *ccb1;
    429  1.1.6.2  riz 	bus_dmamap_t dmap = ccb->ccb_dmamap;
    430  1.1.6.2  riz 	u_int32_t id;
    431  1.1.6.2  riz 	int i, tohz, error = 0;
    432  1.1.6.2  riz 
    433  1.1.6.2  riz 	if (ccb->ccb_state != CISS_CCB_READY) {
    434  1.1.6.2  riz 		printf("%s: ccb %d not ready state=0x%x\n", sc->sc_dev.dv_xname,
    435  1.1.6.2  riz 		    cmd->id, ccb->ccb_state);
    436  1.1.6.2  riz 		return (EINVAL);
    437  1.1.6.2  riz 	}
    438  1.1.6.2  riz 
    439  1.1.6.2  riz 	if (ccb->ccb_data) {
    440  1.1.6.2  riz 		bus_dma_segment_t *sgd;
    441  1.1.6.2  riz 
    442  1.1.6.2  riz 		if ((error = bus_dmamap_load(sc->sc_dmat, dmap, ccb->ccb_data,
    443  1.1.6.2  riz 		    ccb->ccb_len, NULL, flags))) {
    444  1.1.6.2  riz 			if (error == EFBIG)
    445  1.1.6.2  riz 				printf("more than %d dma segs\n", sc->maxsg);
    446  1.1.6.2  riz 			else
    447  1.1.6.2  riz 				printf("error %d loading dma map\n", error);
    448  1.1.6.2  riz 			ciss_put_ccb(ccb);
    449  1.1.6.2  riz 			return (error);
    450  1.1.6.2  riz 		}
    451  1.1.6.2  riz 		cmd->sgin = dmap->dm_nsegs;
    452  1.1.6.2  riz 
    453  1.1.6.2  riz 		sgd = dmap->dm_segs;
    454  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_DMA, ("data=%p/%u<0x%lx/%lu",
    455  1.1.6.2  riz 		    ccb->ccb_data, ccb->ccb_len, sgd->ds_addr, sgd->ds_len));
    456  1.1.6.2  riz 
    457  1.1.6.2  riz 		for (i = 0; i < dmap->dm_nsegs; sgd++, i++) {
    458  1.1.6.2  riz 			cmd->sgl[i].addr_lo = htole32(sgd->ds_addr);
    459  1.1.6.2  riz 			cmd->sgl[i].addr_hi =
    460  1.1.6.2  riz 			    htole32((u_int64_t)sgd->ds_addr >> 32);
    461  1.1.6.2  riz 			cmd->sgl[i].len = htole32(sgd->ds_len);
    462  1.1.6.2  riz 			cmd->sgl[i].flags = htole32(0);
    463  1.1.6.2  riz 			if (i)
    464  1.1.6.2  riz 				CISS_DPRINTF(CISS_D_DMA,
    465  1.1.6.2  riz 				    (",0x%lx/%lu", sgd->ds_addr, sgd->ds_len));
    466  1.1.6.2  riz 		}
    467  1.1.6.2  riz 
    468  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_DMA, ("> "));
    469  1.1.6.2  riz 
    470  1.1.6.2  riz 		bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
    471  1.1.6.2  riz 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    472  1.1.6.2  riz 	} else
    473  1.1.6.2  riz 		cmd->sgin = 0;
    474  1.1.6.2  riz 	cmd->sglen = htole16((u_int16_t)cmd->sgin);
    475  1.1.6.2  riz 	bzero(&ccb->ccb_err, sizeof(ccb->ccb_err));
    476  1.1.6.2  riz 
    477  1.1.6.2  riz 	bus_dmamap_sync(sc->sc_dmat, sc->cmdmap, 0, sc->cmdmap->dm_mapsize,
    478  1.1.6.2  riz 	    BUS_DMASYNC_PREWRITE);
    479  1.1.6.2  riz 
    480  1.1.6.2  riz 	if ((wait & (XS_CTL_POLL|XS_CTL_NOSLEEP)) == (XS_CTL_POLL|XS_CTL_NOSLEEP))
    481  1.1.6.2  riz 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_IMR,
    482  1.1.6.2  riz 		    bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IMR) | sc->iem);
    483  1.1.6.2  riz 
    484  1.1.6.2  riz 	TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ccb_link);
    485  1.1.6.2  riz 	ccb->ccb_state = CISS_CCB_ONQ;
    486  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_CMD, ("submit=0x%x ", cmd->id));
    487  1.1.6.2  riz 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_INQ, ccb->ccb_cmdpa);
    488  1.1.6.2  riz 
    489  1.1.6.2  riz 	if (wait & XS_CTL_POLL) {
    490  1.1.6.2  riz 		int etick;
    491  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, ("waiting "));
    492  1.1.6.2  riz 
    493  1.1.6.2  riz 		i = ccb->ccb_xs? ccb->ccb_xs->timeout : 60000;
    494  1.1.6.2  riz 		tohz = (i / 1000) * hz + (i % 1000) * (hz / 1000);
    495  1.1.6.2  riz 		if (tohz == 0)
    496  1.1.6.2  riz 			tohz = 1;
    497  1.1.6.2  riz 		for (i *= 100, etick = tick + tohz; i--; ) {
    498  1.1.6.2  riz 			if (!(wait & XS_CTL_NOSLEEP)) {
    499  1.1.6.2  riz 				ccb->ccb_state = CISS_CCB_POLL;
    500  1.1.6.2  riz 				CISS_DPRINTF(CISS_D_CMD, ("tsleep(%d) ", tohz));
    501  1.1.6.2  riz 				if (tsleep(ccb, PRIBIO + 1, "ciss_cmd",
    502  1.1.6.2  riz 				    tohz) == EWOULDBLOCK) {
    503  1.1.6.2  riz 					break;
    504  1.1.6.2  riz 				}
    505  1.1.6.2  riz 				if (ccb->ccb_state != CISS_CCB_ONQ) {
    506  1.1.6.2  riz 					tohz = etick - tick;
    507  1.1.6.2  riz 					if (tohz <= 0)
    508  1.1.6.2  riz 						break;
    509  1.1.6.2  riz 					CISS_DPRINTF(CISS_D_CMD, ("T"));
    510  1.1.6.2  riz 					continue;
    511  1.1.6.2  riz 				}
    512  1.1.6.2  riz 				ccb1 = ccb;
    513  1.1.6.2  riz 			} else {
    514  1.1.6.2  riz 				DELAY(10);
    515  1.1.6.2  riz 
    516  1.1.6.2  riz 				if (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    517  1.1.6.2  riz 				    CISS_ISR) & sc->iem)) {
    518  1.1.6.2  riz 					CISS_DPRINTF(CISS_D_CMD, ("N"));
    519  1.1.6.2  riz 					continue;
    520  1.1.6.2  riz 				}
    521  1.1.6.2  riz 
    522  1.1.6.2  riz 				if ((id = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    523  1.1.6.2  riz 				    CISS_OUTQ)) == 0xffffffff) {
    524  1.1.6.2  riz 					CISS_DPRINTF(CISS_D_CMD, ("Q"));
    525  1.1.6.2  riz 					continue;
    526  1.1.6.2  riz 				}
    527  1.1.6.2  riz 
    528  1.1.6.2  riz 				CISS_DPRINTF(CISS_D_CMD, ("got=0x%x ", id));
    529  1.1.6.2  riz 				ccb1 = (struct ciss_ccb *)
    530  1.1.6.2  riz 					(sc->ccbs + (id >> 2) * sc->ccblen);
    531  1.1.6.2  riz 				ccb1->ccb_cmd.id = htole32(id);
    532  1.1.6.2  riz 			}
    533  1.1.6.2  riz 
    534  1.1.6.2  riz 			error = ciss_done(ccb1);
    535  1.1.6.2  riz 			if (ccb1 == ccb)
    536  1.1.6.2  riz 				break;
    537  1.1.6.2  riz 		}
    538  1.1.6.2  riz 
    539  1.1.6.2  riz 		/* if never got a chance to be done above... */
    540  1.1.6.2  riz 		if (ccb->ccb_state != CISS_CCB_FREE) {
    541  1.1.6.2  riz 			ccb->ccb_err.cmd_stat = CISS_ERR_TMO;
    542  1.1.6.2  riz 			error = ciss_done(ccb);
    543  1.1.6.2  riz 		}
    544  1.1.6.2  riz 
    545  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, ("done %d:%d",
    546  1.1.6.2  riz 		    ccb->ccb_err.cmd_stat, ccb->ccb_err.scsi_stat));
    547  1.1.6.2  riz 	}
    548  1.1.6.2  riz 
    549  1.1.6.2  riz 	if ((wait & (XS_CTL_POLL|XS_CTL_NOSLEEP)) == (XS_CTL_POLL|XS_CTL_NOSLEEP))
    550  1.1.6.2  riz 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_IMR,
    551  1.1.6.2  riz 		    bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IMR) & ~sc->iem);
    552  1.1.6.2  riz 
    553  1.1.6.2  riz 	return (error);
    554  1.1.6.2  riz }
    555  1.1.6.2  riz 
    556  1.1.6.2  riz static int
    557  1.1.6.2  riz ciss_done(struct ciss_ccb *ccb)
    558  1.1.6.2  riz {
    559  1.1.6.2  riz 	struct ciss_softc *sc = ccb->ccb_sc;
    560  1.1.6.2  riz 	struct scsipi_xfer *xs = ccb->ccb_xs;
    561  1.1.6.2  riz 	ciss_lock_t lock;
    562  1.1.6.2  riz 	int error = 0;
    563  1.1.6.2  riz 
    564  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_CMD, ("ciss_done(%p) ", ccb));
    565  1.1.6.2  riz 
    566  1.1.6.2  riz 	if (ccb->ccb_state != CISS_CCB_ONQ) {
    567  1.1.6.2  riz 		printf("%s: unqueued ccb %p ready, state=0x%x\n",
    568  1.1.6.2  riz 		    sc->sc_dev.dv_xname, ccb, ccb->ccb_state);
    569  1.1.6.2  riz 		return 1;
    570  1.1.6.2  riz 	}
    571  1.1.6.2  riz 
    572  1.1.6.2  riz 	lock = CISS_LOCK(sc);
    573  1.1.6.2  riz 	ccb->ccb_state = CISS_CCB_READY;
    574  1.1.6.2  riz 	TAILQ_REMOVE(&sc->sc_ccbq, ccb, ccb_link);
    575  1.1.6.2  riz 
    576  1.1.6.2  riz 	if (ccb->ccb_cmd.id & CISS_CMD_ERR)
    577  1.1.6.2  riz 		error = ciss_error(ccb);
    578  1.1.6.2  riz 
    579  1.1.6.2  riz 	if (ccb->ccb_data) {
    580  1.1.6.2  riz 		bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
    581  1.1.6.2  riz 		    ccb->ccb_dmamap->dm_mapsize,
    582  1.1.6.2  riz 		    (xs  && xs->xs_control & XS_CTL_DATA_IN) ?
    583  1.1.6.2  riz 		     BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
    584  1.1.6.2  riz 		bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
    585  1.1.6.2  riz 		ccb->ccb_xs = NULL;
    586  1.1.6.2  riz 		ccb->ccb_data = NULL;
    587  1.1.6.2  riz 	}
    588  1.1.6.2  riz 
    589  1.1.6.2  riz 	ciss_put_ccb(ccb);
    590  1.1.6.2  riz 
    591  1.1.6.2  riz 	if (xs) {
    592  1.1.6.2  riz 		xs->resid = 0;
    593  1.1.6.2  riz 		xs->xs_status |= XS_STS_DONE;
    594  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, ("scsipi_done(%p) ", xs));
    595  1.1.6.2  riz 		scsipi_done(xs);
    596  1.1.6.2  riz 	}
    597  1.1.6.2  riz 	CISS_UNLOCK(sc, lock);
    598  1.1.6.2  riz 
    599  1.1.6.2  riz 	return error;
    600  1.1.6.2  riz }
    601  1.1.6.2  riz 
    602  1.1.6.2  riz static int
    603  1.1.6.2  riz ciss_error(struct ciss_ccb *ccb)
    604  1.1.6.2  riz {
    605  1.1.6.2  riz 	struct ciss_softc *sc = ccb->ccb_sc;
    606  1.1.6.2  riz 	struct ciss_error *err = &ccb->ccb_err;
    607  1.1.6.2  riz 	struct scsipi_xfer *xs = ccb->ccb_xs;
    608  1.1.6.2  riz 	int rv;
    609  1.1.6.2  riz 
    610  1.1.6.2  riz 	switch ((rv = le16toh(err->cmd_stat))) {
    611  1.1.6.2  riz 	case CISS_ERR_OK:
    612  1.1.6.2  riz 		break;
    613  1.1.6.2  riz 
    614  1.1.6.2  riz 	case CISS_ERR_INVCMD:
    615  1.1.6.2  riz 		printf("%s: invalid cmd 0x%x: 0x%x is not valid @ 0x%x[%d]\n",
    616  1.1.6.2  riz 		    sc->sc_dev.dv_xname, ccb->ccb_cmd.id,
    617  1.1.6.2  riz 		    err->err_info, err->err_type[3], err->err_type[2]);
    618  1.1.6.2  riz 		if (xs) {
    619  1.1.6.2  riz 			bzero(&xs->sense, sizeof(xs->sense));
    620  1.1.6.2  riz 			xs->sense.scsi_sense.response_code =
    621  1.1.6.2  riz 				SSD_RCODE_CURRENT | SSD_RCODE_VALID;
    622  1.1.6.2  riz 			xs->sense.scsi_sense.flags = SKEY_ILLEGAL_REQUEST;
    623  1.1.6.2  riz 			xs->sense.scsi_sense.asc = 0x24; /* ill field */
    624  1.1.6.2  riz 			xs->sense.scsi_sense.ascq = 0x0;
    625  1.1.6.2  riz 			xs->error = XS_SENSE;
    626  1.1.6.2  riz 		}
    627  1.1.6.2  riz 		break;
    628  1.1.6.2  riz 
    629  1.1.6.2  riz 	case CISS_ERR_TMO:
    630  1.1.6.2  riz 		xs->error = XS_TIMEOUT;
    631  1.1.6.2  riz 		break;
    632  1.1.6.2  riz 
    633  1.1.6.2  riz 	case CISS_ERR_UNRUN:
    634  1.1.6.2  riz 		/* Underrun */
    635  1.1.6.2  riz 		xs->resid = le32toh(err->resid);
    636  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, (" underrun resid=0x%x ",
    637  1.1.6.2  riz 					  xs->resid));
    638  1.1.6.2  riz 		break;
    639  1.1.6.2  riz 	default:
    640  1.1.6.2  riz 		if (xs) {
    641  1.1.6.2  riz 			CISS_DPRINTF(CISS_D_CMD, ("scsi_stat=%x ", err->scsi_stat));
    642  1.1.6.2  riz 			switch (err->scsi_stat) {
    643  1.1.6.2  riz 			case SCSI_CHECK:
    644  1.1.6.2  riz 				xs->error = XS_SENSE;
    645  1.1.6.2  riz 				bcopy(&err->sense[0], &xs->sense,
    646  1.1.6.2  riz 				    sizeof(xs->sense));
    647  1.1.6.2  riz 				CISS_DPRINTF(CISS_D_CMD, (" sense=%02x %02x %02x %02x ",
    648  1.1.6.2  riz 					     err->sense[0], err->sense[1], err->sense[2], err->sense[3]));
    649  1.1.6.2  riz 				break;
    650  1.1.6.2  riz 
    651  1.1.6.2  riz 			case XS_BUSY:
    652  1.1.6.2  riz 				xs->error = XS_BUSY;
    653  1.1.6.2  riz 				break;
    654  1.1.6.2  riz 
    655  1.1.6.2  riz 			default:
    656  1.1.6.2  riz 				CISS_DPRINTF(CISS_D_ERR, ("%s: "
    657  1.1.6.2  riz 				    "cmd_stat=%x scsi_stat=0x%x resid=0x%x\n",
    658  1.1.6.2  riz 				    sc->sc_dev.dv_xname, rv, err->scsi_stat,
    659  1.1.6.2  riz 				    le32toh(err->resid)));
    660  1.1.6.2  riz 				printf("ciss driver stuffup in %s:%d: %s()\n",
    661  1.1.6.2  riz 				       __FILE__, __LINE__, __FUNCTION__);
    662  1.1.6.2  riz 				xs->error = XS_DRIVER_STUFFUP;
    663  1.1.6.2  riz 				break;
    664  1.1.6.2  riz 			}
    665  1.1.6.2  riz 			xs->resid = le32toh(err->resid);
    666  1.1.6.2  riz 		}
    667  1.1.6.2  riz 	}
    668  1.1.6.2  riz 	ccb->ccb_cmd.id &= htole32(~3);
    669  1.1.6.2  riz 
    670  1.1.6.2  riz 	return rv;
    671  1.1.6.2  riz }
    672  1.1.6.2  riz 
    673  1.1.6.2  riz static int
    674  1.1.6.2  riz ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq)
    675  1.1.6.2  riz {
    676  1.1.6.2  riz 	struct ciss_ccb *ccb;
    677  1.1.6.2  riz 	struct ciss_cmd *cmd;
    678  1.1.6.2  riz 
    679  1.1.6.2  riz 	ccb = ciss_get_ccb(sc);
    680  1.1.6.2  riz 	ccb->ccb_len = sizeof(*inq);
    681  1.1.6.2  riz 	ccb->ccb_data = inq;
    682  1.1.6.2  riz 	cmd = &ccb->ccb_cmd;
    683  1.1.6.2  riz 	cmd->tgt = htole32(CISS_CMD_MODE_PERIPH);
    684  1.1.6.2  riz 	cmd->tgt2 = 0;
    685  1.1.6.2  riz 	cmd->cdblen = 10;
    686  1.1.6.2  riz 	cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_IN;
    687  1.1.6.2  riz 	cmd->tmo = htole16(0);
    688  1.1.6.2  riz 	bzero(&cmd->cdb[0], sizeof(cmd->cdb));
    689  1.1.6.2  riz 	cmd->cdb[0] = CISS_CMD_CTRL_GET;
    690  1.1.6.2  riz 	cmd->cdb[6] = CISS_CMS_CTRL_CTRL;
    691  1.1.6.2  riz 	cmd->cdb[7] = sizeof(*inq) >> 8;	/* biiiig endian */
    692  1.1.6.2  riz 	cmd->cdb[8] = sizeof(*inq) & 0xff;
    693  1.1.6.2  riz 
    694  1.1.6.2  riz 	return ciss_cmd(ccb, BUS_DMA_NOWAIT, XS_CTL_POLL|XS_CTL_NOSLEEP);
    695  1.1.6.2  riz }
    696  1.1.6.2  riz 
    697  1.1.6.2  riz static int
    698  1.1.6.2  riz ciss_ldmap(struct ciss_softc *sc)
    699  1.1.6.2  riz {
    700  1.1.6.2  riz 	struct ciss_ccb *ccb;
    701  1.1.6.2  riz 	struct ciss_cmd *cmd;
    702  1.1.6.2  riz 	struct ciss_ldmap *lmap;
    703  1.1.6.2  riz 	ciss_lock_t lock;
    704  1.1.6.2  riz 	int total, rv;
    705  1.1.6.2  riz 
    706  1.1.6.2  riz 	lock = CISS_LOCK_SCRATCH(sc);
    707  1.1.6.2  riz 	lmap = sc->scratch;
    708  1.1.6.2  riz 	lmap->size = htobe32(sc->maxunits * sizeof(lmap->map));
    709  1.1.6.2  riz 	total = sizeof(*lmap) + (sc->maxunits - 1) * sizeof(lmap->map);
    710  1.1.6.2  riz 
    711  1.1.6.2  riz 	ccb = ciss_get_ccb(sc);
    712  1.1.6.2  riz 	ccb->ccb_len = total;
    713  1.1.6.2  riz 	ccb->ccb_data = lmap;
    714  1.1.6.2  riz 	cmd = &ccb->ccb_cmd;
    715  1.1.6.2  riz 	cmd->tgt = CISS_CMD_MODE_PERIPH;
    716  1.1.6.2  riz 	cmd->tgt2 = 0;
    717  1.1.6.2  riz 	cmd->cdblen = 12;
    718  1.1.6.2  riz 	cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_IN;
    719  1.1.6.2  riz 	cmd->tmo = htole16(30);
    720  1.1.6.2  riz 	bzero(&cmd->cdb[0], sizeof(cmd->cdb));
    721  1.1.6.2  riz 	cmd->cdb[0] = CISS_CMD_LDMAP;
    722  1.1.6.2  riz 	cmd->cdb[8] = total >> 8;	/* biiiig endian */
    723  1.1.6.2  riz 	cmd->cdb[9] = total & 0xff;
    724  1.1.6.2  riz 
    725  1.1.6.2  riz 	rv = ciss_cmd(ccb, BUS_DMA_NOWAIT, XS_CTL_POLL|XS_CTL_NOSLEEP);
    726  1.1.6.2  riz 	CISS_UNLOCK_SCRATCH(sc, lock);
    727  1.1.6.2  riz 
    728  1.1.6.2  riz 	if (rv)
    729  1.1.6.2  riz 		return rv;
    730  1.1.6.2  riz 
    731  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_MISC, ("lmap %x:%x\n",
    732  1.1.6.2  riz 	    lmap->map[0].tgt, lmap->map[0].tgt2));
    733  1.1.6.2  riz 
    734  1.1.6.2  riz 	return 0;
    735  1.1.6.2  riz }
    736  1.1.6.2  riz 
    737  1.1.6.2  riz static int
    738  1.1.6.2  riz ciss_sync(struct ciss_softc *sc)
    739  1.1.6.2  riz {
    740  1.1.6.2  riz 	struct ciss_ccb *ccb;
    741  1.1.6.2  riz 	struct ciss_cmd *cmd;
    742  1.1.6.2  riz 	struct ciss_flush *flush;
    743  1.1.6.2  riz 	ciss_lock_t lock;
    744  1.1.6.2  riz 	int rv;
    745  1.1.6.2  riz 
    746  1.1.6.2  riz 	lock = CISS_LOCK_SCRATCH(sc);
    747  1.1.6.2  riz 	flush = sc->scratch;
    748  1.1.6.2  riz 	bzero(flush, sizeof(*flush));
    749  1.1.6.2  riz 	flush->flush = sc->sc_flush;
    750  1.1.6.2  riz 
    751  1.1.6.2  riz 	ccb = ciss_get_ccb(sc);
    752  1.1.6.2  riz 	ccb->ccb_len = sizeof(*flush);
    753  1.1.6.2  riz 	ccb->ccb_data = flush;
    754  1.1.6.2  riz 	cmd = &ccb->ccb_cmd;
    755  1.1.6.2  riz 	cmd->tgt = CISS_CMD_MODE_PERIPH;
    756  1.1.6.2  riz 	cmd->tgt2 = 0;
    757  1.1.6.2  riz 	cmd->cdblen = 10;
    758  1.1.6.2  riz 	cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL | CISS_CDB_OUT;
    759  1.1.6.2  riz 	cmd->tmo = 0;
    760  1.1.6.2  riz 	bzero(&cmd->cdb[0], sizeof(cmd->cdb));
    761  1.1.6.2  riz 	cmd->cdb[0] = CISS_CMD_CTRL_SET;
    762  1.1.6.2  riz 	cmd->cdb[6] = CISS_CMS_CTRL_FLUSH;
    763  1.1.6.2  riz 	cmd->cdb[7] = sizeof(*flush) >> 8;	/* biiiig endian */
    764  1.1.6.2  riz 	cmd->cdb[8] = sizeof(*flush) & 0xff;
    765  1.1.6.2  riz 
    766  1.1.6.2  riz 	rv = ciss_cmd(ccb, BUS_DMA_NOWAIT, XS_CTL_POLL|XS_CTL_NOSLEEP);
    767  1.1.6.2  riz 	CISS_UNLOCK_SCRATCH(sc, lock);
    768  1.1.6.2  riz 
    769  1.1.6.2  riz 	return rv;
    770  1.1.6.2  riz }
    771  1.1.6.2  riz 
    772  1.1.6.2  riz #if 0
    773  1.1.6.2  riz static void
    774  1.1.6.2  riz ciss_scsi_raw_cmd(struct scsipi_channel *chan, scsipi_adapter_req_t req,
    775  1.1.6.2  riz 	void *arg)				/* TODO */
    776  1.1.6.2  riz {
    777  1.1.6.2  riz 	struct scsipi_xfer *xs = (struct scsipi_xfer *) arg;
    778  1.1.6.2  riz 	struct ciss_rawsoftc *rsc =
    779  1.1.6.2  riz 		(struct ciss_rawsoftc *) chan->chan_adapter->adapt_dev;
    780  1.1.6.2  riz 	struct ciss_softc *sc = rsc->sc_softc;
    781  1.1.6.2  riz 	struct ciss_ccb *ccb;
    782  1.1.6.2  riz 	struct ciss_cmd *cmd;
    783  1.1.6.2  riz 	ciss_lock_t lock;
    784  1.1.6.2  riz 	int error;
    785  1.1.6.2  riz 
    786  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_CMD, ("ciss_scsi_raw_cmd "));
    787  1.1.6.2  riz 
    788  1.1.6.2  riz 	switch (req)
    789  1.1.6.2  riz 	{
    790  1.1.6.2  riz 	case ADAPTER_REQ_RUN_XFER:
    791  1.1.6.2  riz 		if (xs->cmdlen > CISS_MAX_CDB) {
    792  1.1.6.2  riz 			CISS_DPRINTF(CISS_D_CMD, ("CDB too big %p ", xs));
    793  1.1.6.2  riz 			bzero(&xs->sense, sizeof(xs->sense));
    794  1.1.6.2  riz 			printf("ciss driver stuffup in %s:%d: %s()\n",
    795  1.1.6.2  riz 			       __FILE__, __LINE__, __FUNCTION__);
    796  1.1.6.2  riz 			xs->error = XS_DRIVER_STUFFUP;
    797  1.1.6.2  riz 			scsipi_done(xs);
    798  1.1.6.2  riz 			break;
    799  1.1.6.2  riz 		}
    800  1.1.6.2  riz 
    801  1.1.6.2  riz 		lock = CISS_LOCK(sc);
    802  1.1.6.2  riz 		error = 0;
    803  1.1.6.2  riz 		xs->error = XS_NOERROR;
    804  1.1.6.2  riz 
    805  1.1.6.2  riz 		/* TODO check this target has not yet employed w/ any volume */
    806  1.1.6.2  riz 
    807  1.1.6.2  riz 		ccb = ciss_get_ccb(sc);
    808  1.1.6.2  riz 		cmd = &ccb->ccb_cmd;
    809  1.1.6.2  riz 		ccb->ccb_len = xs->datalen;
    810  1.1.6.2  riz 		ccb->ccb_data = xs->data;
    811  1.1.6.2  riz 		ccb->ccb_xs = xs;
    812  1.1.6.2  riz 
    813  1.1.6.2  riz 		cmd->cdblen = xs->cmdlen;
    814  1.1.6.2  riz 		cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL;
    815  1.1.6.2  riz 		if (xs->xs_control & XS_CTL_DATA_IN)
    816  1.1.6.2  riz 			cmd->flags |= CISS_CDB_IN;
    817  1.1.6.2  riz 		else if (xs->xs_control & XS_CTL_DATA_OUT)
    818  1.1.6.2  riz 			cmd->flags |= CISS_CDB_OUT;
    819  1.1.6.2  riz 		cmd->tmo = xs->timeout < 1000? 1 : xs->timeout / 1000;
    820  1.1.6.2  riz 		bzero(&cmd->cdb[0], sizeof(cmd->cdb));
    821  1.1.6.2  riz 		bcopy(xs->cmd, &cmd->cdb[0], CISS_MAX_CDB);
    822  1.1.6.2  riz 
    823  1.1.6.2  riz 		if (ciss_cmd(ccb, BUS_DMA_WAITOK,
    824  1.1.6.2  riz 		    xs->xs_control & (XS_CTL_POLL|XS_CTL_NOSLEEP))) {
    825  1.1.6.2  riz 			printf("ciss driver stuffup in %s:%d: %s()\n",
    826  1.1.6.2  riz 			       __FILE__, __LINE__, __FUNCTION__);
    827  1.1.6.2  riz 			xs->error = XS_DRIVER_STUFFUP;
    828  1.1.6.2  riz 			scsipi_done(xs);
    829  1.1.6.2  riz 			CISS_UNLOCK(sc, lock);
    830  1.1.6.2  riz 			break;
    831  1.1.6.2  riz 		}
    832  1.1.6.2  riz 
    833  1.1.6.2  riz 		CISS_UNLOCK(sc, lock);
    834  1.1.6.2  riz 		break;
    835  1.1.6.2  riz 
    836  1.1.6.2  riz 	case ADAPTER_REQ_GROW_RESOURCES:
    837  1.1.6.2  riz 		/*
    838  1.1.6.2  riz 		 * Not supported.
    839  1.1.6.2  riz 		 */
    840  1.1.6.2  riz 		break;
    841  1.1.6.2  riz 
    842  1.1.6.2  riz 	case ADAPTER_REQ_SET_XFER_MODE:
    843  1.1.6.2  riz 		/*
    844  1.1.6.2  riz 		 * We can't change the transfer mode, but at least let
    845  1.1.6.2  riz 		 * scsipi know what the adapter has negociated.
    846  1.1.6.2  riz 		 */
    847  1.1.6.2  riz 		 /* Get xfer mode and return it */
    848  1.1.6.2  riz 		break;
    849  1.1.6.2  riz 	}
    850  1.1.6.2  riz }
    851  1.1.6.2  riz #endif
    852  1.1.6.2  riz 
    853  1.1.6.2  riz static void
    854  1.1.6.2  riz ciss_scsi_cmd(struct scsipi_channel *chan, scsipi_adapter_req_t req,
    855  1.1.6.2  riz 	void *arg)
    856  1.1.6.2  riz {
    857  1.1.6.2  riz 	struct scsipi_xfer *xs = (struct scsipi_xfer *) arg;
    858  1.1.6.2  riz 	struct ciss_softc *sc =
    859  1.1.6.2  riz 		(struct ciss_softc *) chan->chan_adapter->adapt_dev;
    860  1.1.6.2  riz 	u_int8_t target;
    861  1.1.6.2  riz 	struct ciss_ccb *ccb;
    862  1.1.6.2  riz 	struct ciss_cmd *cmd;
    863  1.1.6.2  riz 	int error;
    864  1.1.6.2  riz 	ciss_lock_t lock;
    865  1.1.6.2  riz 
    866  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_CMD, ("ciss_scsi_cmd "));
    867  1.1.6.2  riz 
    868  1.1.6.2  riz 	switch (req)
    869  1.1.6.2  riz 	{
    870  1.1.6.2  riz 	case ADAPTER_REQ_RUN_XFER:
    871  1.1.6.2  riz 		target = xs->xs_periph->periph_target;
    872  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, ("targ=%d ", target));
    873  1.1.6.2  riz 		if (xs->cmdlen > CISS_MAX_CDB) {
    874  1.1.6.2  riz 			CISS_DPRINTF(CISS_D_CMD, ("CDB too big %p ", xs));
    875  1.1.6.2  riz 			bzero(&xs->sense, sizeof(xs->sense));
    876  1.1.6.2  riz 			printf("ciss driver stuffup in %s:%d: %s()\n",
    877  1.1.6.2  riz 			       __FILE__, __LINE__, __FUNCTION__);
    878  1.1.6.2  riz 			xs->error = XS_DRIVER_STUFFUP;
    879  1.1.6.2  riz 			scsipi_done(xs);
    880  1.1.6.2  riz 			break;
    881  1.1.6.2  riz 		}
    882  1.1.6.2  riz 
    883  1.1.6.2  riz 		lock = CISS_LOCK(sc);
    884  1.1.6.2  riz 		error = 0;
    885  1.1.6.2  riz 		xs->error = XS_NOERROR;
    886  1.1.6.2  riz 
    887  1.1.6.2  riz 		/* XXX emulate SYNCHRONIZE_CACHE ??? */
    888  1.1.6.2  riz 
    889  1.1.6.2  riz 		ccb = ciss_get_ccb(sc);
    890  1.1.6.2  riz 		cmd = &ccb->ccb_cmd;
    891  1.1.6.2  riz 		ccb->ccb_len = xs->datalen;
    892  1.1.6.2  riz 		ccb->ccb_data = xs->data;
    893  1.1.6.2  riz 		ccb->ccb_xs = xs;
    894  1.1.6.2  riz 		cmd->tgt = CISS_CMD_MODE_LD | target;
    895  1.1.6.2  riz 		cmd->tgt2 = 0;
    896  1.1.6.2  riz 		cmd->cdblen = xs->cmdlen;
    897  1.1.6.2  riz 		cmd->flags = CISS_CDB_CMD | CISS_CDB_SIMPL;
    898  1.1.6.2  riz 		if (xs->xs_control & XS_CTL_DATA_IN)
    899  1.1.6.2  riz 			cmd->flags |= CISS_CDB_IN;
    900  1.1.6.2  riz 		else if (xs->xs_control & XS_CTL_DATA_OUT)
    901  1.1.6.2  riz 			cmd->flags |= CISS_CDB_OUT;
    902  1.1.6.2  riz 		cmd->tmo = xs->timeout < 1000? 1 : xs->timeout / 1000;
    903  1.1.6.2  riz 		bzero(&cmd->cdb[0], sizeof(cmd->cdb));
    904  1.1.6.2  riz 		bcopy(xs->cmd, &cmd->cdb[0], CISS_MAX_CDB);
    905  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_CMD, ("cmd=%02x %02x %02x %02x %02x %02x ",
    906  1.1.6.2  riz 			     cmd->cdb[0], cmd->cdb[1], cmd->cdb[2],
    907  1.1.6.2  riz 			     cmd->cdb[3], cmd->cdb[4], cmd->cdb[5]));
    908  1.1.6.2  riz 
    909  1.1.6.2  riz 		if (ciss_cmd(ccb, BUS_DMA_WAITOK,
    910  1.1.6.2  riz 		    xs->xs_control & (XS_CTL_POLL|XS_CTL_NOSLEEP))) {
    911  1.1.6.2  riz 			printf("ciss driver stuffup in %s:%d: %s()\n",
    912  1.1.6.2  riz 			       __FILE__, __LINE__, __FUNCTION__);
    913  1.1.6.2  riz 			xs->error = XS_DRIVER_STUFFUP;
    914  1.1.6.2  riz 			scsipi_done(xs);
    915  1.1.6.2  riz 			CISS_UNLOCK(sc, lock);
    916  1.1.6.2  riz 			return;
    917  1.1.6.2  riz 		}
    918  1.1.6.2  riz 
    919  1.1.6.2  riz 		CISS_UNLOCK(sc, lock);
    920  1.1.6.2  riz 		break;
    921  1.1.6.2  riz 	case ADAPTER_REQ_GROW_RESOURCES:
    922  1.1.6.2  riz 		/*
    923  1.1.6.2  riz 		 * Not supported.
    924  1.1.6.2  riz 		 */
    925  1.1.6.2  riz 		break;
    926  1.1.6.2  riz 	case ADAPTER_REQ_SET_XFER_MODE:
    927  1.1.6.2  riz 		/*
    928  1.1.6.2  riz 		 * We can't change the transfer mode, but at least let
    929  1.1.6.2  riz 		 * scsipi know what the adapter has negociated.
    930  1.1.6.2  riz 		 */
    931  1.1.6.2  riz 		/* FIXME: get xfer mode and write it into arg */
    932  1.1.6.2  riz 		break;
    933  1.1.6.2  riz 	}
    934  1.1.6.2  riz }
    935  1.1.6.2  riz 
    936  1.1.6.2  riz int
    937  1.1.6.2  riz ciss_intr(void *v)
    938  1.1.6.2  riz {
    939  1.1.6.2  riz 	struct ciss_softc *sc = v;
    940  1.1.6.2  riz 	struct ciss_ccb *ccb;
    941  1.1.6.2  riz 	ciss_lock_t lock;
    942  1.1.6.2  riz 	u_int32_t id;
    943  1.1.6.2  riz 	int hit = 0;
    944  1.1.6.2  riz 
    945  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_INTR, ("intr "));
    946  1.1.6.2  riz 
    947  1.1.6.2  riz 	if (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_ISR) & sc->iem))
    948  1.1.6.2  riz 		return 0;
    949  1.1.6.2  riz 
    950  1.1.6.2  riz 	lock = CISS_LOCK(sc);
    951  1.1.6.2  riz 	while ((id = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_OUTQ)) !=
    952  1.1.6.2  riz 	    0xffffffff) {
    953  1.1.6.2  riz 
    954  1.1.6.2  riz 		ccb = (struct ciss_ccb *) (sc->ccbs + (id >> 2) * sc->ccblen);
    955  1.1.6.2  riz 		ccb->ccb_cmd.id = htole32(id);
    956  1.1.6.2  riz 		if (ccb->ccb_state == CISS_CCB_POLL) {
    957  1.1.6.2  riz 			ccb->ccb_state = CISS_CCB_ONQ;
    958  1.1.6.2  riz 			wakeup(ccb);
    959  1.1.6.2  riz 		} else
    960  1.1.6.2  riz 			ciss_done(ccb);
    961  1.1.6.2  riz 
    962  1.1.6.2  riz 		hit = 1;
    963  1.1.6.2  riz 	}
    964  1.1.6.2  riz 	CISS_UNLOCK(sc, lock);
    965  1.1.6.2  riz 
    966  1.1.6.2  riz 	CISS_DPRINTF(CISS_D_INTR, ("exit\n"));
    967  1.1.6.2  riz 	return hit;
    968  1.1.6.2  riz }
    969  1.1.6.2  riz 
    970  1.1.6.2  riz static void
    971  1.1.6.2  riz ciss_heartbeat(void *v)
    972  1.1.6.2  riz {
    973  1.1.6.2  riz 	struct ciss_softc *sc = v;
    974  1.1.6.2  riz 	u_int32_t hb;
    975  1.1.6.2  riz 
    976  1.1.6.2  riz 	hb = bus_space_read_4(sc->sc_iot, sc->cfg_ioh,
    977  1.1.6.2  riz 	    sc->cfgoff + offsetof(struct ciss_config, heartbeat));
    978  1.1.6.2  riz 	if (hb == sc->heartbeat)
    979  1.1.6.2  riz 		panic("ciss: dead");	/* XX reset! */
    980  1.1.6.2  riz 	else
    981  1.1.6.2  riz 		sc->heartbeat = hb;
    982  1.1.6.2  riz 
    983  1.1.6.2  riz 	callout_schedule(&sc->sc_hb, hz * 3);
    984  1.1.6.2  riz }
    985  1.1.6.2  riz 
    986  1.1.6.2  riz #if 0
    987  1.1.6.2  riz static void
    988  1.1.6.2  riz ciss_kthread(void *v)
    989  1.1.6.2  riz {
    990  1.1.6.2  riz 	struct ciss_softc *sc = v;
    991  1.1.6.2  riz 	ciss_lock_t lock;
    992  1.1.6.2  riz 
    993  1.1.6.2  riz 	for (;;) {
    994  1.1.6.2  riz 		tsleep(sc, PRIBIO, sc->sc_dev.dv_xname, 0);
    995  1.1.6.2  riz 
    996  1.1.6.2  riz 		lock = CISS_LOCK(sc);
    997  1.1.6.2  riz 
    998  1.1.6.2  riz 
    999  1.1.6.2  riz 
   1000  1.1.6.2  riz 		CISS_UNLOCK(sc, lock);
   1001  1.1.6.2  riz 	}
   1002  1.1.6.2  riz }
   1003  1.1.6.2  riz #endif
   1004  1.1.6.2  riz 
   1005  1.1.6.2  riz static int
   1006  1.1.6.2  riz ciss_scsi_ioctl(struct scsipi_channel *chan, u_long cmd,
   1007  1.1.6.2  riz     caddr_t addr, int flag, struct proc *p)
   1008  1.1.6.2  riz {
   1009  1.1.6.2  riz #if NBIO > 0
   1010  1.1.6.2  riz 	return ciss_ioctl(chan->chan_adapter->adapt_dev, cmd, addr);
   1011  1.1.6.2  riz #else
   1012  1.1.6.2  riz 	return ENOTTY;
   1013  1.1.6.2  riz #endif
   1014  1.1.6.2  riz }
   1015  1.1.6.2  riz 
   1016  1.1.6.2  riz #if NBIO > 0
   1017  1.1.6.2  riz static int
   1018  1.1.6.2  riz ciss_ioctl(struct device *dev, u_long cmd, caddr_t addr)	/* TODO */
   1019  1.1.6.2  riz {
   1020  1.1.6.2  riz 	/* struct ciss_softc *sc = (struct ciss_softc *)dev; */
   1021  1.1.6.2  riz 	ciss_lock_t lock;
   1022  1.1.6.2  riz 	int error;
   1023  1.1.6.2  riz 
   1024  1.1.6.2  riz 	lock = CISS_LOCK(sc);
   1025  1.1.6.2  riz 	switch (cmd) {
   1026  1.1.6.2  riz 	case BIOCINQ:
   1027  1.1.6.2  riz 	case BIOCVOL:
   1028  1.1.6.2  riz 	case BIOCDISK:
   1029  1.1.6.2  riz 	case BIOCALARM:
   1030  1.1.6.2  riz 	case BIOCBLINK:
   1031  1.1.6.2  riz 	case BIOCSETSTATE:
   1032  1.1.6.2  riz 	default:
   1033  1.1.6.2  riz 		CISS_DPRINTF(CISS_D_IOCTL, ("%s: invalid ioctl\n",
   1034  1.1.6.2  riz 		    sc->sc_dev.dv_xname));
   1035  1.1.6.2  riz 		error = ENOTTY;
   1036  1.1.6.2  riz 	}
   1037  1.1.6.2  riz 	CISS_UNLOCK(sc, lock);
   1038  1.1.6.2  riz 
   1039  1.1.6.2  riz 	return error;
   1040  1.1.6.2  riz }
   1041  1.1.6.2  riz #endif
   1042