com.c revision 1.300 1 1.300 rmind /* $NetBSD: com.c,v 1.300 2011/04/24 16:26:59 rmind Exp $ */
2 1.38 cgd
3 1.1 cgd /*-
4 1.269 ad * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
5 1.146 mycroft * All rights reserved.
6 1.99 mycroft *
7 1.146 mycroft * This code is derived from software contributed to The NetBSD Foundation
8 1.146 mycroft * by Charles M. Hannum.
9 1.99 mycroft *
10 1.99 mycroft * Redistribution and use in source and binary forms, with or without
11 1.99 mycroft * modification, are permitted provided that the following conditions
12 1.99 mycroft * are met:
13 1.99 mycroft * 1. Redistributions of source code must retain the above copyright
14 1.99 mycroft * notice, this list of conditions and the following disclaimer.
15 1.99 mycroft * 2. Redistributions in binary form must reproduce the above copyright
16 1.99 mycroft * notice, this list of conditions and the following disclaimer in the
17 1.99 mycroft * documentation and/or other materials provided with the distribution.
18 1.99 mycroft *
19 1.146 mycroft * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.146 mycroft * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.146 mycroft * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.146 mycroft * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.146 mycroft * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.146 mycroft * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.146 mycroft * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.146 mycroft * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.146 mycroft * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.146 mycroft * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.146 mycroft * POSSIBILITY OF SUCH DAMAGE.
30 1.99 mycroft */
31 1.99 mycroft
32 1.99 mycroft /*
33 1.1 cgd * Copyright (c) 1991 The Regents of the University of California.
34 1.1 cgd * All rights reserved.
35 1.1 cgd *
36 1.1 cgd * Redistribution and use in source and binary forms, with or without
37 1.1 cgd * modification, are permitted provided that the following conditions
38 1.1 cgd * are met:
39 1.1 cgd * 1. Redistributions of source code must retain the above copyright
40 1.1 cgd * notice, this list of conditions and the following disclaimer.
41 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
42 1.1 cgd * notice, this list of conditions and the following disclaimer in the
43 1.1 cgd * documentation and/or other materials provided with the distribution.
44 1.217 agc * 3. Neither the name of the University nor the names of its contributors
45 1.1 cgd * may be used to endorse or promote products derived from this software
46 1.1 cgd * without specific prior written permission.
47 1.1 cgd *
48 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
49 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
52 1.1 cgd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 1.1 cgd * SUCH DAMAGE.
59 1.1 cgd *
60 1.38 cgd * @(#)com.c 7.5 (Berkeley) 5/16/91
61 1.1 cgd */
62 1.1 cgd
63 1.1 cgd /*
64 1.99 mycroft * COM driver, uses National Semiconductor NS16450/NS16550AF UART
65 1.116 fvdl * Supports automatic hardware flow control on StarTech ST16C650A UART
66 1.1 cgd */
67 1.191 lukem
68 1.191 lukem #include <sys/cdefs.h>
69 1.300 rmind __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.300 2011/04/24 16:26:59 rmind Exp $");
70 1.145 jonathan
71 1.185 lukem #include "opt_com.h"
72 1.145 jonathan #include "opt_ddb.h"
73 1.185 lukem #include "opt_kgdb.h"
74 1.213 martin #include "opt_lockdebug.h"
75 1.213 martin #include "opt_multiprocessor.h"
76 1.224 simonb #include "opt_ntp.h"
77 1.115 explorer
78 1.115 explorer #include "rnd.h"
79 1.115 explorer #if NRND > 0 && defined(RND_COM)
80 1.115 explorer #include <sys/rnd.h>
81 1.115 explorer #endif
82 1.115 explorer
83 1.227 thorpej /* The COM16650 option was renamed to COM_16650. */
84 1.227 thorpej #ifdef COM16650
85 1.227 thorpej #error Obsolete COM16650 option; use COM_16650 instead.
86 1.227 thorpej #endif
87 1.227 thorpej
88 1.186 uwe /*
89 1.186 uwe * Override cnmagic(9) macro before including <sys/systm.h>.
90 1.186 uwe * We need to know if cn_check_magic triggered debugger, so set a flag.
91 1.186 uwe * Callers of cn_check_magic must declare int cn_trapped = 0;
92 1.186 uwe * XXX: this is *ugly*!
93 1.186 uwe */
94 1.186 uwe #define cn_trap() \
95 1.186 uwe do { \
96 1.186 uwe console_debugger(); \
97 1.186 uwe cn_trapped = 1; \
98 1.186 uwe } while (/* CONSTCOND */ 0)
99 1.186 uwe
100 1.14 mycroft #include <sys/param.h>
101 1.14 mycroft #include <sys/systm.h>
102 1.14 mycroft #include <sys/ioctl.h>
103 1.14 mycroft #include <sys/select.h>
104 1.234 ws #include <sys/poll.h>
105 1.14 mycroft #include <sys/tty.h>
106 1.14 mycroft #include <sys/proc.h>
107 1.14 mycroft #include <sys/conf.h>
108 1.14 mycroft #include <sys/file.h>
109 1.14 mycroft #include <sys/uio.h>
110 1.14 mycroft #include <sys/kernel.h>
111 1.14 mycroft #include <sys/syslog.h>
112 1.21 mycroft #include <sys/device.h>
113 1.127 mycroft #include <sys/malloc.h>
114 1.144 jonathan #include <sys/timepps.h>
115 1.149 thorpej #include <sys/vnode.h>
116 1.243 elad #include <sys/kauth.h>
117 1.263 ad #include <sys/intr.h>
118 1.14 mycroft
119 1.265 ad #include <sys/bus.h>
120 1.14 mycroft
121 1.113 thorpej #include <dev/ic/comreg.h>
122 1.113 thorpej #include <dev/ic/comvar.h>
123 1.60 cgd #include <dev/ic/ns16550reg.h>
124 1.116 fvdl #include <dev/ic/st16650reg.h>
125 1.65 christos #ifdef COM_HAYESP
126 1.65 christos #include <dev/ic/hayespreg.h>
127 1.65 christos #endif
128 1.62 mycroft #define com_lcr com_cfcr
129 1.106 drochner #include <dev/cons.h>
130 1.14 mycroft
131 1.247 gdamore #ifdef COM_REGMAP
132 1.247 gdamore #define CSR_WRITE_1(r, o, v) \
133 1.247 gdamore bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
134 1.247 gdamore #define CSR_READ_1(r, o) \
135 1.247 gdamore bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
136 1.247 gdamore #define CSR_WRITE_2(r, o, v) \
137 1.247 gdamore bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
138 1.247 gdamore #define CSR_READ_2(r, o) \
139 1.247 gdamore bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
140 1.247 gdamore #define CSR_WRITE_MULTI(r, o, p, n) \
141 1.247 gdamore bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n)
142 1.247 gdamore #else
143 1.247 gdamore #define CSR_WRITE_1(r, o, v) \
144 1.247 gdamore bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v)
145 1.247 gdamore #define CSR_READ_1(r, o) \
146 1.247 gdamore bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o)
147 1.247 gdamore #define CSR_WRITE_2(r, o, v) \
148 1.247 gdamore bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v)
149 1.247 gdamore #define CSR_READ_2(r, o) \
150 1.247 gdamore bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o)
151 1.247 gdamore #define CSR_WRITE_MULTI(r, o, p, n) \
152 1.247 gdamore bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n)
153 1.65 christos #endif
154 1.102 thorpej
155 1.247 gdamore
156 1.197 simonb static void com_enable_debugport(struct com_softc *);
157 1.186 uwe
158 1.197 simonb void com_config(struct com_softc *);
159 1.197 simonb void com_shutdown(struct com_softc *);
160 1.210 thorpej int comspeed(long, long, int);
161 1.197 simonb static u_char cflag2lcr(tcflag_t);
162 1.197 simonb int comparam(struct tty *, struct termios *);
163 1.197 simonb void comstart(struct tty *);
164 1.197 simonb int comhwiflow(struct tty *, int);
165 1.197 simonb
166 1.197 simonb void com_loadchannelregs(struct com_softc *);
167 1.197 simonb void com_hwiflow(struct com_softc *);
168 1.197 simonb void com_break(struct com_softc *, int);
169 1.197 simonb void com_modem(struct com_softc *, int);
170 1.197 simonb void tiocm_to_com(struct com_softc *, u_long, int);
171 1.197 simonb int com_to_tiocm(struct com_softc *);
172 1.197 simonb void com_iflush(struct com_softc *);
173 1.80 christos
174 1.247 gdamore int com_common_getc(dev_t, struct com_regs *);
175 1.289 dyoung static void com_common_putc(dev_t, struct com_regs *, int);
176 1.102 thorpej
177 1.247 gdamore int cominit(struct com_regs *, int, int, int, tcflag_t);
178 1.187 simonb
179 1.289 dyoung static int comcnreattach(void);
180 1.289 dyoung
181 1.197 simonb int comcngetc(dev_t);
182 1.197 simonb void comcnputc(dev_t, int);
183 1.197 simonb void comcnpollc(dev_t, int);
184 1.80 christos
185 1.99 mycroft #define integrate static inline
186 1.197 simonb void comsoft(void *);
187 1.197 simonb integrate void com_rxsoft(struct com_softc *, struct tty *);
188 1.197 simonb integrate void com_txsoft(struct com_softc *, struct tty *);
189 1.197 simonb integrate void com_stsoft(struct com_softc *, struct tty *);
190 1.197 simonb integrate void com_schedrx(struct com_softc *);
191 1.197 simonb void comdiag(void *);
192 1.127 mycroft
193 1.130 thorpej extern struct cfdriver com_cd;
194 1.76 thorpej
195 1.199 gehenna dev_type_open(comopen);
196 1.199 gehenna dev_type_close(comclose);
197 1.199 gehenna dev_type_read(comread);
198 1.199 gehenna dev_type_write(comwrite);
199 1.199 gehenna dev_type_ioctl(comioctl);
200 1.199 gehenna dev_type_stop(comstop);
201 1.199 gehenna dev_type_tty(comtty);
202 1.199 gehenna dev_type_poll(compoll);
203 1.199 gehenna
204 1.289 dyoung static struct comcons_info comcons_info;
205 1.289 dyoung
206 1.289 dyoung /*
207 1.289 dyoung * Following are all routines needed for COM to act as console
208 1.289 dyoung */
209 1.289 dyoung static struct consdev comcons = {
210 1.289 dyoung NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL,
211 1.289 dyoung NODEV, CN_NORMAL
212 1.289 dyoung };
213 1.289 dyoung
214 1.289 dyoung
215 1.199 gehenna const struct cdevsw com_cdevsw = {
216 1.199 gehenna comopen, comclose, comread, comwrite, comioctl,
217 1.200 jdolecek comstop, comtty, compoll, nommap, ttykqfilter, D_TTY
218 1.199 gehenna };
219 1.199 gehenna
220 1.127 mycroft /*
221 1.127 mycroft * Make this an option variable one can patch.
222 1.127 mycroft * But be warned: this must be a power of 2!
223 1.127 mycroft */
224 1.127 mycroft u_int com_rbuf_size = COM_RING_SIZE;
225 1.127 mycroft
226 1.127 mycroft /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
227 1.127 mycroft u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4;
228 1.127 mycroft u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4;
229 1.127 mycroft
230 1.247 gdamore static int comconsattached;
231 1.186 uwe static struct cnm_state com_cnm_state;
232 1.99 mycroft
233 1.1 cgd #ifdef KGDB
234 1.102 thorpej #include <sys/kgdb.h>
235 1.106 drochner
236 1.247 gdamore static struct com_regs comkgdbregs;
237 1.106 drochner static int com_kgdb_attached;
238 1.102 thorpej
239 1.197 simonb int com_kgdb_getc(void *);
240 1.197 simonb void com_kgdb_putc(void *, int);
241 1.102 thorpej #endif /* KGDB */
242 1.1 cgd
243 1.247 gdamore #ifdef COM_REGMAP
244 1.247 gdamore /* initializer for typical 16550-ish hardware */
245 1.247 gdamore #define COM_REG_16550 { \
246 1.247 gdamore com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \
247 1.247 gdamore com_efr, com_lcr, com_mcr, com_lsr, com_msr }
248 1.247 gdamore
249 1.247 gdamore const bus_size_t com_std_map[16] = COM_REG_16550;
250 1.247 gdamore #endif /* COM_REGMAP */
251 1.247 gdamore
252 1.149 thorpej #define COMUNIT_MASK 0x7ffff
253 1.149 thorpej #define COMDIALOUT_MASK 0x80000
254 1.149 thorpej
255 1.149 thorpej #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
256 1.149 thorpej #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
257 1.149 thorpej
258 1.149 thorpej #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
259 1.276 cube device_is_active((sc)->sc_dev))
260 1.1 cgd
261 1.160 thorpej #define BR BUS_SPACE_BARRIER_READ
262 1.160 thorpej #define BW BUS_SPACE_BARRIER_WRITE
263 1.247 gdamore #define COM_BARRIER(r, f) \
264 1.247 gdamore bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f))
265 1.160 thorpej
266 1.210 thorpej /*ARGSUSED*/
267 1.21 mycroft int
268 1.256 christos comspeed(long speed, long frequency, int type)
269 1.1 cgd {
270 1.21 mycroft #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
271 1.21 mycroft
272 1.21 mycroft int x, err;
273 1.281 matt int divisor = 16;
274 1.281 matt
275 1.281 matt if ((type == COM_TYPE_OMAP) && (speed > 230400)) {
276 1.281 matt divisor = 13;
277 1.281 matt }
278 1.21 mycroft
279 1.99 mycroft #if 0
280 1.21 mycroft if (speed == 0)
281 1.99 mycroft return (0);
282 1.99 mycroft #endif
283 1.99 mycroft if (speed <= 0)
284 1.99 mycroft return (-1);
285 1.281 matt x = divrnd(frequency / divisor, speed);
286 1.21 mycroft if (x <= 0)
287 1.99 mycroft return (-1);
288 1.281 matt err = divrnd(((quad_t)frequency) * 1000 / divisor, speed * x) - 1000;
289 1.21 mycroft if (err < 0)
290 1.21 mycroft err = -err;
291 1.21 mycroft if (err > COM_TOLERANCE)
292 1.99 mycroft return (-1);
293 1.99 mycroft return (x);
294 1.21 mycroft
295 1.172 thorpej #undef divrnd
296 1.21 mycroft }
297 1.21 mycroft
298 1.99 mycroft #ifdef COM_DEBUG
299 1.101 mycroft int com_debug = 0;
300 1.101 mycroft
301 1.235 kleink void comstatus(struct com_softc *, const char *);
302 1.99 mycroft void
303 1.235 kleink comstatus(struct com_softc *sc, const char *str)
304 1.99 mycroft {
305 1.99 mycroft struct tty *tp = sc->sc_tty;
306 1.99 mycroft
307 1.277 cube aprint_normal_dev(sc->sc_dev,
308 1.277 cube "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n",
309 1.277 cube str,
310 1.218 christos ISSET(tp->t_cflag, CLOCAL) ? '+' : '-',
311 1.218 christos ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-',
312 1.218 christos ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-',
313 1.218 christos ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-',
314 1.218 christos sc->sc_tx_stopped ? '+' : '-');
315 1.99 mycroft
316 1.277 cube aprint_normal_dev(sc->sc_dev,
317 1.277 cube "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n",
318 1.277 cube str,
319 1.218 christos ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-',
320 1.218 christos ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-',
321 1.218 christos ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-',
322 1.218 christos ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-',
323 1.101 mycroft sc->sc_rx_flags);
324 1.99 mycroft }
325 1.99 mycroft #endif
326 1.99 mycroft
327 1.21 mycroft int
328 1.247 gdamore com_probe_subr(struct com_regs *regs)
329 1.21 mycroft {
330 1.21 mycroft
331 1.1 cgd /* force access to id reg */
332 1.247 gdamore CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS);
333 1.247 gdamore CSR_WRITE_1(regs, COM_REG_IIR, 0);
334 1.247 gdamore if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) ||
335 1.247 gdamore (CSR_READ_1(regs, COM_REG_IIR) & 0x38))
336 1.99 mycroft return (0);
337 1.21 mycroft
338 1.99 mycroft return (1);
339 1.1 cgd }
340 1.1 cgd
341 1.65 christos int
342 1.247 gdamore comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
343 1.64 christos {
344 1.247 gdamore struct com_regs regs;
345 1.64 christos
346 1.247 gdamore regs.cr_iot = iot;
347 1.247 gdamore regs.cr_ioh = ioh;
348 1.247 gdamore #ifdef COM_REGMAP
349 1.287 yamt memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
350 1.247 gdamore #endif
351 1.64 christos
352 1.247 gdamore return com_probe_subr(®s);
353 1.64 christos }
354 1.64 christos
355 1.264 ad /*
356 1.264 ad * No locking in this routine; it is only called during attach,
357 1.264 ad * or with the port already locked.
358 1.264 ad */
359 1.104 drochner static void
360 1.197 simonb com_enable_debugport(struct com_softc *sc)
361 1.104 drochner {
362 1.263 ad
363 1.104 drochner /* Turn on line break interrupt, set carrier. */
364 1.104 drochner sc->sc_ier = IER_ERXRDY;
365 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
366 1.208 scw sc->sc_ier |= IER_EUART | IER_ERXTOUT;
367 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
368 1.104 drochner SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
369 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr);
370 1.104 drochner }
371 1.1 cgd
372 1.29 mycroft void
373 1.197 simonb com_attach_subr(struct com_softc *sc)
374 1.29 mycroft {
375 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
376 1.127 mycroft struct tty *tp;
377 1.227 thorpej #ifdef COM_16650
378 1.116 fvdl u_int8_t lcr;
379 1.118 fvdl #endif
380 1.208 scw const char *fifo_msg = NULL;
381 1.117 mycroft
382 1.257 uwe aprint_naive("\n");
383 1.257 uwe
384 1.260 ad callout_init(&sc->sc_diag_callout, 0);
385 1.267 ad mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
386 1.170 thorpej
387 1.117 mycroft /* Disable interrupts before configuring the device. */
388 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
389 1.208 scw sc->sc_ier = IER_EUART;
390 1.208 scw else
391 1.208 scw sc->sc_ier = 0;
392 1.1 cgd
393 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
394 1.247 gdamore
395 1.297 dyoung if (bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
396 1.289 dyoung regsp->cr_iobase == comcons_info.regs.cr_iobase) {
397 1.105 drochner comconsattached = 1;
398 1.105 drochner
399 1.289 dyoung if (cn_tab == NULL && comcnreattach() != 0) {
400 1.294 tsutsui printf("can't re-init serial console @%lx\n",
401 1.294 tsutsui (u_long)comcons_info.regs.cr_iobase);
402 1.289 dyoung }
403 1.289 dyoung
404 1.96 mycroft /* Make sure the console is always "hardwired". */
405 1.226 thorpej delay(10000); /* wait for output to finish */
406 1.75 cgd SET(sc->sc_hwflags, COM_HW_CONSOLE);
407 1.99 mycroft SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
408 1.75 cgd }
409 1.26 cgd
410 1.247 gdamore /* Probe for FIFO */
411 1.247 gdamore switch (sc->sc_type) {
412 1.247 gdamore case COM_TYPE_HAYESP:
413 1.247 gdamore goto fifodone;
414 1.247 gdamore
415 1.247 gdamore case COM_TYPE_AU1x00:
416 1.247 gdamore sc->sc_fifolen = 16;
417 1.247 gdamore fifo_msg = "Au1X00 UART, working fifo";
418 1.247 gdamore SET(sc->sc_hwflags, COM_HW_FIFO);
419 1.247 gdamore goto fifodelay;
420 1.281 matt
421 1.286 matt case COM_TYPE_16550_NOERS:
422 1.286 matt sc->sc_fifolen = 16;
423 1.286 matt fifo_msg = "ns16650, no ERS, working fifo";
424 1.286 matt SET(sc->sc_hwflags, COM_HW_FIFO);
425 1.286 matt goto fifodelay;
426 1.286 matt
427 1.281 matt case COM_TYPE_OMAP:
428 1.281 matt sc->sc_fifolen = 64;
429 1.281 matt fifo_msg = "OMAP UART, working fifo";
430 1.281 matt SET(sc->sc_hwflags, COM_HW_FIFO);
431 1.281 matt goto fifodelay;
432 1.281 matt }
433 1.99 mycroft
434 1.99 mycroft sc->sc_fifolen = 1;
435 1.1 cgd /* look for a NS 16550AF UART with FIFOs */
436 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_FIFO,
437 1.21 mycroft FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
438 1.20 mycroft delay(100);
439 1.247 gdamore if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK)
440 1.99 mycroft == IIR_FIFO_MASK)
441 1.247 gdamore if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14)
442 1.99 mycroft == FIFO_TRIGGER_14) {
443 1.62 mycroft SET(sc->sc_hwflags, COM_HW_FIFO);
444 1.116 fvdl
445 1.227 thorpej #ifdef COM_16650
446 1.116 fvdl /*
447 1.116 fvdl * IIR changes into the EFR if LCR is set to LCR_EERS
448 1.116 fvdl * on 16650s. We also know IIR != 0 at this point.
449 1.116 fvdl * Write 0 into the EFR, and read it. If the result
450 1.116 fvdl * is 0, we have a 16650.
451 1.116 fvdl *
452 1.116 fvdl * Older 16650s were broken; the test to detect them
453 1.116 fvdl * is taken from the Linux driver. Apparently
454 1.116 fvdl * setting DLAB enable gives access to the EFR on
455 1.116 fvdl * these chips.
456 1.116 fvdl */
457 1.286 matt lcr = CSR_READ_1(regsp, COM_REG_LCR);
458 1.286 matt CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
459 1.286 matt CSR_WRITE_1(regsp, COM_REG_EFR, 0);
460 1.286 matt if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
461 1.286 matt CSR_WRITE_1(regsp, COM_REG_LCR,
462 1.286 matt lcr | LCR_DLAB);
463 1.247 gdamore if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
464 1.286 matt CLR(sc->sc_hwflags, COM_HW_FIFO);
465 1.286 matt sc->sc_fifolen = 0;
466 1.286 matt } else {
467 1.286 matt SET(sc->sc_hwflags, COM_HW_FLOW);
468 1.286 matt sc->sc_fifolen = 32;
469 1.286 matt }
470 1.118 fvdl } else
471 1.118 fvdl #endif
472 1.116 fvdl sc->sc_fifolen = 16;
473 1.116 fvdl
474 1.227 thorpej #ifdef COM_16650
475 1.286 matt CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
476 1.119 drochner if (sc->sc_fifolen == 0)
477 1.208 scw fifo_msg = "st16650, broken fifo";
478 1.119 drochner else if (sc->sc_fifolen == 32)
479 1.208 scw fifo_msg = "st16650a, working fifo";
480 1.119 drochner else
481 1.118 fvdl #endif
482 1.208 scw fifo_msg = "ns16550a, working fifo";
483 1.21 mycroft } else
484 1.208 scw fifo_msg = "ns16550, broken fifo";
485 1.21 mycroft else
486 1.208 scw fifo_msg = "ns8250 or ns16450, no fifo";
487 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
488 1.247 gdamore fifodelay:
489 1.208 scw /*
490 1.208 scw * Some chips will clear down both Tx and Rx FIFOs when zero is
491 1.208 scw * written to com_fifo. If this chip is the console, writing zero
492 1.208 scw * results in some of the chip/FIFO description being lost, so delay
493 1.208 scw * printing it until now.
494 1.208 scw */
495 1.208 scw delay(10);
496 1.208 scw aprint_normal(": %s\n", fifo_msg);
497 1.166 soda if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) {
498 1.166 soda sc->sc_fifolen = 1;
499 1.276 cube aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
500 1.166 soda }
501 1.247 gdamore
502 1.247 gdamore fifodone:
503 1.21 mycroft
504 1.300 rmind tp = tty_alloc();
505 1.127 mycroft tp->t_oproc = comstart;
506 1.127 mycroft tp->t_param = comparam;
507 1.127 mycroft tp->t_hwiflow = comhwiflow;
508 1.127 mycroft
509 1.127 mycroft sc->sc_tty = tp;
510 1.147 thorpej sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
511 1.182 sommerfe sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
512 1.182 sommerfe sc->sc_rbavail = com_rbuf_size;
513 1.147 thorpej if (sc->sc_rbuf == NULL) {
514 1.276 cube aprint_error_dev(sc->sc_dev,
515 1.276 cube "unable to allocate ring buffer\n");
516 1.147 thorpej return;
517 1.147 thorpej }
518 1.127 mycroft sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1);
519 1.147 thorpej
520 1.147 thorpej tty_attach(tp);
521 1.147 thorpej
522 1.99 mycroft if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
523 1.99 mycroft SET(sc->sc_mcr, MCR_IENABLE);
524 1.30 mycroft
525 1.96 mycroft if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
526 1.106 drochner int maj;
527 1.106 drochner
528 1.106 drochner /* locate the major number */
529 1.199 gehenna maj = cdevsw_lookup_major(&com_cdevsw);
530 1.106 drochner
531 1.242 thorpej tp->t_dev = cn_tab->cn_dev = makedev(maj,
532 1.276 cube device_unit(sc->sc_dev));
533 1.131 marc
534 1.276 cube aprint_normal_dev(sc->sc_dev, "console\n");
535 1.96 mycroft }
536 1.96 mycroft
537 1.1 cgd #ifdef KGDB
538 1.102 thorpej /*
539 1.102 thorpej * Allow kgdb to "take over" this port. If this is
540 1.206 briggs * not the console and is the kgdb device, it has
541 1.206 briggs * exclusive use. If it's the console _and_ the
542 1.206 briggs * kgdb device, it doesn't.
543 1.102 thorpej */
544 1.297 dyoung if (bus_space_is_equal(regsp->cr_iot, comkgdbregs.cr_iot) &&
545 1.247 gdamore regsp->cr_iobase == comkgdbregs.cr_iobase) {
546 1.206 briggs if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
547 1.206 briggs com_kgdb_attached = 1;
548 1.106 drochner
549 1.206 briggs SET(sc->sc_hwflags, COM_HW_KGDB);
550 1.206 briggs }
551 1.276 cube aprint_normal_dev(sc->sc_dev, "kgdb\n");
552 1.103 drochner }
553 1.99 mycroft #endif
554 1.99 mycroft
555 1.263 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc);
556 1.115 explorer
557 1.115 explorer #if NRND > 0 && defined(RND_COM)
558 1.277 cube rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
559 1.155 explorer RND_TYPE_TTY, 0);
560 1.115 explorer #endif
561 1.131 marc
562 1.131 marc /* if there are no enable/disable functions, assume the device
563 1.131 marc is always enabled */
564 1.131 marc if (!sc->enable)
565 1.131 marc sc->enabled = 1;
566 1.131 marc
567 1.131 marc com_config(sc);
568 1.132 cgd
569 1.132 cgd SET(sc->sc_hwflags, COM_HW_DEV_OK);
570 1.131 marc }
571 1.131 marc
572 1.131 marc void
573 1.197 simonb com_config(struct com_softc *sc)
574 1.131 marc {
575 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
576 1.131 marc
577 1.131 marc /* Disable interrupts before configuring the device. */
578 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
579 1.208 scw sc->sc_ier = IER_EUART;
580 1.208 scw else
581 1.208 scw sc->sc_ier = 0;
582 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
583 1.247 gdamore (void) CSR_READ_1(regsp, COM_REG_IIR);
584 1.131 marc
585 1.131 marc #ifdef COM_HAYESP
586 1.131 marc /* Look for a Hayes ESP board. */
587 1.209 thorpej if (sc->sc_type == COM_TYPE_HAYESP) {
588 1.131 marc
589 1.131 marc /* Set 16550 compatibility mode */
590 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
591 1.131 marc HAYESP_SETMODE);
592 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
593 1.131 marc HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
594 1.131 marc HAYESP_MODE_SCALE);
595 1.131 marc
596 1.131 marc /* Set RTS/CTS flow control */
597 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
598 1.131 marc HAYESP_SETFLOWTYPE);
599 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
600 1.131 marc HAYESP_FLOW_RTS);
601 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
602 1.131 marc HAYESP_FLOW_CTS);
603 1.131 marc
604 1.131 marc /* Set flow control levels */
605 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
606 1.131 marc HAYESP_SETRXFLOW);
607 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
608 1.131 marc HAYESP_HIBYTE(HAYESP_RXHIWMARK));
609 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
610 1.131 marc HAYESP_LOBYTE(HAYESP_RXHIWMARK));
611 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
612 1.131 marc HAYESP_HIBYTE(HAYESP_RXLOWMARK));
613 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
614 1.131 marc HAYESP_LOBYTE(HAYESP_RXLOWMARK));
615 1.131 marc }
616 1.131 marc #endif
617 1.131 marc
618 1.186 uwe if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB))
619 1.131 marc com_enable_debugport(sc);
620 1.1 cgd }
621 1.1 cgd
622 1.292 dyoung #if 0
623 1.292 dyoung static int
624 1.292 dyoung comcngetc_detached(dev_t dev)
625 1.292 dyoung {
626 1.292 dyoung return 0;
627 1.292 dyoung }
628 1.292 dyoung
629 1.292 dyoung static void
630 1.292 dyoung comcnputc_detached(dev_t dev, int c)
631 1.292 dyoung {
632 1.292 dyoung }
633 1.292 dyoung #endif
634 1.292 dyoung
635 1.149 thorpej int
636 1.274 dyoung com_detach(device_t self, int flags)
637 1.149 thorpej {
638 1.274 dyoung struct com_softc *sc = device_private(self);
639 1.149 thorpej int maj, mn;
640 1.149 thorpej
641 1.289 dyoung if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
642 1.289 dyoung return EBUSY;
643 1.289 dyoung
644 1.289 dyoung if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) &&
645 1.289 dyoung (flags & DETACH_SHUTDOWN) != 0)
646 1.272 dyoung return EBUSY;
647 1.272 dyoung
648 1.289 dyoung if (sc->disable != NULL && sc->enabled != 0) {
649 1.289 dyoung (*sc->disable)(sc);
650 1.289 dyoung sc->enabled = 0;
651 1.289 dyoung }
652 1.289 dyoung
653 1.289 dyoung if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
654 1.289 dyoung comconsattached = 0;
655 1.289 dyoung cn_tab = NULL;
656 1.289 dyoung }
657 1.289 dyoung
658 1.149 thorpej /* locate the major number */
659 1.199 gehenna maj = cdevsw_lookup_major(&com_cdevsw);
660 1.149 thorpej
661 1.149 thorpej /* Nuke the vnodes for any open instances. */
662 1.242 thorpej mn = device_unit(self);
663 1.149 thorpej vdevgone(maj, mn, mn, VCHR);
664 1.149 thorpej
665 1.149 thorpej mn |= COMDIALOUT_MASK;
666 1.149 thorpej vdevgone(maj, mn, mn, VCHR);
667 1.149 thorpej
668 1.196 christos if (sc->sc_rbuf == NULL) {
669 1.196 christos /*
670 1.196 christos * Ring buffer allocation failed in the com_attach_subr,
671 1.196 christos * only the tty is allocated, and nothing else.
672 1.196 christos */
673 1.300 rmind tty_free(sc->sc_tty);
674 1.196 christos return 0;
675 1.196 christos }
676 1.232 perry
677 1.149 thorpej /* Free the receive buffer. */
678 1.149 thorpej free(sc->sc_rbuf, M_DEVBUF);
679 1.149 thorpej
680 1.149 thorpej /* Detach and free the tty. */
681 1.149 thorpej tty_detach(sc->sc_tty);
682 1.300 rmind tty_free(sc->sc_tty);
683 1.149 thorpej
684 1.149 thorpej /* Unhook the soft interrupt handler. */
685 1.263 ad softint_disestablish(sc->sc_si);
686 1.149 thorpej
687 1.149 thorpej #if NRND > 0 && defined(RND_COM)
688 1.149 thorpej /* Unhook the entropy source. */
689 1.149 thorpej rnd_detach_source(&sc->rnd_source);
690 1.149 thorpej #endif
691 1.273 dyoung callout_destroy(&sc->sc_diag_callout);
692 1.149 thorpej
693 1.271 ad /* Destroy the lock. */
694 1.271 ad mutex_destroy(&sc->sc_lock);
695 1.271 ad
696 1.149 thorpej return (0);
697 1.149 thorpej }
698 1.149 thorpej
699 1.141 mycroft void
700 1.197 simonb com_shutdown(struct com_softc *sc)
701 1.141 mycroft {
702 1.141 mycroft struct tty *tp = sc->sc_tty;
703 1.141 mycroft
704 1.263 ad mutex_spin_enter(&sc->sc_lock);
705 1.141 mycroft
706 1.141 mycroft /* If we were asserting flow control, then deassert it. */
707 1.141 mycroft SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
708 1.141 mycroft com_hwiflow(sc);
709 1.141 mycroft
710 1.141 mycroft /* Clear any break condition set with TIOCSBRK. */
711 1.141 mycroft com_break(sc, 0);
712 1.141 mycroft
713 1.141 mycroft /*
714 1.141 mycroft * Hang up if necessary. Wait a bit, so the other side has time to
715 1.141 mycroft * notice even if we immediately open the port again.
716 1.175 sommerfe * Avoid tsleeping above splhigh().
717 1.141 mycroft */
718 1.141 mycroft if (ISSET(tp->t_cflag, HUPCL)) {
719 1.141 mycroft com_modem(sc, 0);
720 1.263 ad mutex_spin_exit(&sc->sc_lock);
721 1.263 ad /* XXX will only timeout */
722 1.263 ad (void) kpause(ttclos, false, hz, NULL);
723 1.263 ad mutex_spin_enter(&sc->sc_lock);
724 1.141 mycroft }
725 1.141 mycroft
726 1.141 mycroft /* Turn off interrupts. */
727 1.208 scw if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
728 1.141 mycroft sc->sc_ier = IER_ERXRDY; /* interrupt on break */
729 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
730 1.208 scw sc->sc_ier |= IER_ERXTOUT;
731 1.208 scw } else
732 1.141 mycroft sc->sc_ier = 0;
733 1.208 scw
734 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
735 1.208 scw sc->sc_ier |= IER_EUART;
736 1.208 scw
737 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
738 1.141 mycroft
739 1.269 ad mutex_spin_exit(&sc->sc_lock);
740 1.269 ad
741 1.141 mycroft if (sc->disable) {
742 1.141 mycroft #ifdef DIAGNOSTIC
743 1.141 mycroft if (!sc->enabled)
744 1.141 mycroft panic("com_shutdown: not enabled?");
745 1.141 mycroft #endif
746 1.141 mycroft (*sc->disable)(sc);
747 1.141 mycroft sc->enabled = 0;
748 1.141 mycroft }
749 1.141 mycroft }
750 1.141 mycroft
751 1.21 mycroft int
752 1.256 christos comopen(dev_t dev, int flag, int mode, struct lwp *l)
753 1.1 cgd {
754 1.21 mycroft struct com_softc *sc;
755 1.21 mycroft struct tty *tp;
756 1.263 ad int s;
757 1.142 mycroft int error;
758 1.173 thorpej
759 1.276 cube sc = device_lookup_private(&com_cd, COMUNIT(dev));
760 1.173 thorpej if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
761 1.177 eeh sc->sc_rbuf == NULL)
762 1.99 mycroft return (ENXIO);
763 1.21 mycroft
764 1.276 cube if (!device_is_active(sc->sc_dev))
765 1.149 thorpej return (ENXIO);
766 1.149 thorpej
767 1.102 thorpej #ifdef KGDB
768 1.102 thorpej /*
769 1.102 thorpej * If this is the kgdb port, no other use is permitted.
770 1.102 thorpej */
771 1.102 thorpej if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
772 1.102 thorpej return (EBUSY);
773 1.102 thorpej #endif
774 1.102 thorpej
775 1.120 mycroft tp = sc->sc_tty;
776 1.21 mycroft
777 1.253 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
778 1.99 mycroft return (EBUSY);
779 1.99 mycroft
780 1.99 mycroft s = spltty();
781 1.99 mycroft
782 1.99 mycroft /*
783 1.99 mycroft * Do the following iff this is a first open.
784 1.99 mycroft */
785 1.141 mycroft if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
786 1.99 mycroft struct termios t;
787 1.99 mycroft
788 1.127 mycroft tp->t_dev = dev;
789 1.127 mycroft
790 1.120 mycroft
791 1.131 marc if (sc->enable) {
792 1.131 marc if ((*sc->enable)(sc)) {
793 1.134 enami splx(s);
794 1.276 cube aprint_error_dev(sc->sc_dev,
795 1.276 cube "device enable failed\n");
796 1.131 marc return (EIO);
797 1.131 marc }
798 1.269 ad mutex_spin_enter(&sc->sc_lock);
799 1.131 marc sc->enabled = 1;
800 1.131 marc com_config(sc);
801 1.269 ad } else {
802 1.269 ad mutex_spin_enter(&sc->sc_lock);
803 1.131 marc }
804 1.131 marc
805 1.99 mycroft /* Turn on interrupts. */
806 1.99 mycroft sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
807 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
808 1.208 scw sc->sc_ier |= IER_EUART | IER_ERXTOUT;
809 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
810 1.99 mycroft
811 1.99 mycroft /* Fetch the current modem control status, needed later. */
812 1.247 gdamore sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR);
813 1.99 mycroft
814 1.144 jonathan /* Clear PPS capture state on first open. */
815 1.279 ad mutex_spin_enter(&timecounter_lock);
816 1.244 kardel memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state));
817 1.244 kardel sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
818 1.244 kardel pps_init(&sc->sc_pps_state);
819 1.279 ad mutex_spin_exit(&timecounter_lock);
820 1.144 jonathan
821 1.263 ad mutex_spin_exit(&sc->sc_lock);
822 1.99 mycroft
823 1.99 mycroft /*
824 1.99 mycroft * Initialize the termios status to the defaults. Add in the
825 1.99 mycroft * sticky bits from TIOCSFLAGS.
826 1.99 mycroft */
827 1.98 mycroft if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
828 1.289 dyoung t.c_ospeed = comcons_info.rate;
829 1.289 dyoung t.c_cflag = comcons_info.cflag;
830 1.98 mycroft } else {
831 1.99 mycroft t.c_ospeed = TTYDEF_SPEED;
832 1.99 mycroft t.c_cflag = TTYDEF_CFLAG;
833 1.98 mycroft }
834 1.237 dsl t.c_ispeed = t.c_ospeed;
835 1.99 mycroft if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
836 1.99 mycroft SET(t.c_cflag, CLOCAL);
837 1.99 mycroft if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
838 1.99 mycroft SET(t.c_cflag, CRTSCTS);
839 1.99 mycroft if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
840 1.99 mycroft SET(t.c_cflag, MDMBUF);
841 1.129 mycroft /* Make sure comparam() will do something. */
842 1.129 mycroft tp->t_ospeed = 0;
843 1.120 mycroft (void) comparam(tp, &t);
844 1.99 mycroft tp->t_iflag = TTYDEF_IFLAG;
845 1.99 mycroft tp->t_oflag = TTYDEF_OFLAG;
846 1.16 ws tp->t_lflag = TTYDEF_LFLAG;
847 1.99 mycroft ttychars(tp);
848 1.1 cgd ttsetwater(tp);
849 1.21 mycroft
850 1.263 ad mutex_spin_enter(&sc->sc_lock);
851 1.136 mycroft
852 1.99 mycroft /*
853 1.99 mycroft * Turn on DTR. We must always do this, even if carrier is not
854 1.99 mycroft * present, because otherwise we'd have to use TIOCSDTR
855 1.121 mycroft * immediately after setting CLOCAL, which applications do not
856 1.121 mycroft * expect. We always assert DTR while the device is open
857 1.121 mycroft * unless explicitly requested to deassert it.
858 1.99 mycroft */
859 1.99 mycroft com_modem(sc, 1);
860 1.65 christos
861 1.99 mycroft /* Clear the input ring, and unblock. */
862 1.127 mycroft sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
863 1.127 mycroft sc->sc_rbavail = com_rbuf_size;
864 1.99 mycroft com_iflush(sc);
865 1.101 mycroft CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
866 1.101 mycroft com_hwiflow(sc);
867 1.65 christos
868 1.99 mycroft #ifdef COM_DEBUG
869 1.101 mycroft if (com_debug)
870 1.101 mycroft comstatus(sc, "comopen ");
871 1.65 christos #endif
872 1.21 mycroft
873 1.263 ad mutex_spin_exit(&sc->sc_lock);
874 1.99 mycroft }
875 1.232 perry
876 1.143 mycroft splx(s);
877 1.21 mycroft
878 1.143 mycroft error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
879 1.143 mycroft if (error)
880 1.143 mycroft goto bad;
881 1.141 mycroft
882 1.181 eeh error = (*tp->t_linesw->l_open)(dev, tp);
883 1.139 enami if (error)
884 1.141 mycroft goto bad;
885 1.139 enami
886 1.141 mycroft return (0);
887 1.139 enami
888 1.141 mycroft bad:
889 1.141 mycroft if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
890 1.141 mycroft /*
891 1.141 mycroft * We failed to open the device, and nobody else had it opened.
892 1.141 mycroft * Clean up the state as appropriate.
893 1.141 mycroft */
894 1.141 mycroft com_shutdown(sc);
895 1.141 mycroft }
896 1.139 enami
897 1.99 mycroft return (error);
898 1.1 cgd }
899 1.232 perry
900 1.21 mycroft int
901 1.256 christos comclose(dev_t dev, int flag, int mode, struct lwp *l)
902 1.1 cgd {
903 1.276 cube struct com_softc *sc =
904 1.276 cube device_lookup_private(&com_cd, COMUNIT(dev));
905 1.50 mycroft struct tty *tp = sc->sc_tty;
906 1.57 mycroft
907 1.57 mycroft /* XXX This is for cons.c. */
908 1.62 mycroft if (!ISSET(tp->t_state, TS_ISOPEN))
909 1.99 mycroft return (0);
910 1.21 mycroft
911 1.181 eeh (*tp->t_linesw->l_close)(tp, flag);
912 1.1 cgd ttyclose(tp);
913 1.99 mycroft
914 1.149 thorpej if (COM_ISALIVE(sc) == 0)
915 1.149 thorpej return (0);
916 1.149 thorpej
917 1.143 mycroft if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
918 1.143 mycroft /*
919 1.143 mycroft * Although we got a last close, the device may still be in
920 1.143 mycroft * use; e.g. if this was the dialout node, and there are still
921 1.143 mycroft * processes waiting for carrier on the non-dialout node.
922 1.143 mycroft */
923 1.143 mycroft com_shutdown(sc);
924 1.143 mycroft }
925 1.120 mycroft
926 1.99 mycroft return (0);
927 1.1 cgd }
928 1.232 perry
929 1.21 mycroft int
930 1.197 simonb comread(dev_t dev, struct uio *uio, int flag)
931 1.1 cgd {
932 1.276 cube struct com_softc *sc =
933 1.276 cube device_lookup_private(&com_cd, COMUNIT(dev));
934 1.52 mycroft struct tty *tp = sc->sc_tty;
935 1.149 thorpej
936 1.149 thorpej if (COM_ISALIVE(sc) == 0)
937 1.149 thorpej return (EIO);
938 1.232 perry
939 1.181 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
940 1.1 cgd }
941 1.232 perry
942 1.21 mycroft int
943 1.197 simonb comwrite(dev_t dev, struct uio *uio, int flag)
944 1.1 cgd {
945 1.276 cube struct com_softc *sc =
946 1.276 cube device_lookup_private(&com_cd, COMUNIT(dev));
947 1.52 mycroft struct tty *tp = sc->sc_tty;
948 1.149 thorpej
949 1.149 thorpej if (COM_ISALIVE(sc) == 0)
950 1.149 thorpej return (EIO);
951 1.232 perry
952 1.181 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
953 1.184 scw }
954 1.184 scw
955 1.184 scw int
956 1.238 christos compoll(dev_t dev, int events, struct lwp *l)
957 1.184 scw {
958 1.276 cube struct com_softc *sc =
959 1.276 cube device_lookup_private(&com_cd, COMUNIT(dev));
960 1.184 scw struct tty *tp = sc->sc_tty;
961 1.184 scw
962 1.184 scw if (COM_ISALIVE(sc) == 0)
963 1.234 ws return (POLLHUP);
964 1.232 perry
965 1.238 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
966 1.1 cgd }
967 1.50 mycroft
968 1.50 mycroft struct tty *
969 1.197 simonb comtty(dev_t dev)
970 1.50 mycroft {
971 1.276 cube struct com_softc *sc =
972 1.276 cube device_lookup_private(&com_cd, COMUNIT(dev));
973 1.52 mycroft struct tty *tp = sc->sc_tty;
974 1.50 mycroft
975 1.52 mycroft return (tp);
976 1.50 mycroft }
977 1.111 christos
978 1.21 mycroft int
979 1.259 christos comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
980 1.1 cgd {
981 1.273 dyoung struct com_softc *sc;
982 1.273 dyoung struct tty *tp;
983 1.21 mycroft int error;
984 1.21 mycroft
985 1.276 cube sc = device_lookup_private(&com_cd, COMUNIT(dev));
986 1.273 dyoung if (sc == NULL)
987 1.273 dyoung return ENXIO;
988 1.149 thorpej if (COM_ISALIVE(sc) == 0)
989 1.149 thorpej return (EIO);
990 1.149 thorpej
991 1.273 dyoung tp = sc->sc_tty;
992 1.273 dyoung
993 1.238 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
994 1.194 atatat if (error != EPASSTHROUGH)
995 1.99 mycroft return (error);
996 1.99 mycroft
997 1.238 christos error = ttioctl(tp, cmd, data, flag, l);
998 1.194 atatat if (error != EPASSTHROUGH)
999 1.99 mycroft return (error);
1000 1.138 mycroft
1001 1.138 mycroft error = 0;
1002 1.249 elad switch (cmd) {
1003 1.249 elad case TIOCSFLAGS:
1004 1.254 elad error = kauth_authorize_device_tty(l->l_cred,
1005 1.254 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
1006 1.249 elad break;
1007 1.249 elad default:
1008 1.249 elad /* nothing */
1009 1.249 elad break;
1010 1.249 elad }
1011 1.249 elad if (error) {
1012 1.249 elad return error;
1013 1.249 elad }
1014 1.1 cgd
1015 1.263 ad mutex_spin_enter(&sc->sc_lock);
1016 1.136 mycroft
1017 1.1 cgd switch (cmd) {
1018 1.1 cgd case TIOCSBRK:
1019 1.99 mycroft com_break(sc, 1);
1020 1.1 cgd break;
1021 1.99 mycroft
1022 1.1 cgd case TIOCCBRK:
1023 1.99 mycroft com_break(sc, 0);
1024 1.1 cgd break;
1025 1.99 mycroft
1026 1.1 cgd case TIOCSDTR:
1027 1.99 mycroft com_modem(sc, 1);
1028 1.1 cgd break;
1029 1.99 mycroft
1030 1.1 cgd case TIOCCDTR:
1031 1.99 mycroft com_modem(sc, 0);
1032 1.1 cgd break;
1033 1.99 mycroft
1034 1.99 mycroft case TIOCGFLAGS:
1035 1.99 mycroft *(int *)data = sc->sc_swflags;
1036 1.99 mycroft break;
1037 1.99 mycroft
1038 1.99 mycroft case TIOCSFLAGS:
1039 1.99 mycroft sc->sc_swflags = *(int *)data;
1040 1.99 mycroft break;
1041 1.99 mycroft
1042 1.1 cgd case TIOCMSET:
1043 1.1 cgd case TIOCMBIS:
1044 1.1 cgd case TIOCMBIC:
1045 1.153 mycroft tiocm_to_com(sc, cmd, *(int *)data);
1046 1.111 christos break;
1047 1.111 christos
1048 1.153 mycroft case TIOCMGET:
1049 1.153 mycroft *(int *)data = com_to_tiocm(sc);
1050 1.111 christos break;
1051 1.144 jonathan
1052 1.244 kardel case PPS_IOC_CREATE:
1053 1.244 kardel case PPS_IOC_DESTROY:
1054 1.244 kardel case PPS_IOC_GETPARAMS:
1055 1.244 kardel case PPS_IOC_SETPARAMS:
1056 1.244 kardel case PPS_IOC_GETCAP:
1057 1.244 kardel case PPS_IOC_FETCH:
1058 1.244 kardel #ifdef PPS_SYNC
1059 1.244 kardel case PPS_IOC_KCBIND:
1060 1.244 kardel #endif
1061 1.279 ad mutex_spin_enter(&timecounter_lock);
1062 1.244 kardel error = pps_ioctl(cmd, data, &sc->sc_pps_state);
1063 1.279 ad mutex_spin_exit(&timecounter_lock);
1064 1.244 kardel break;
1065 1.224 simonb
1066 1.144 jonathan case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
1067 1.279 ad mutex_spin_enter(&timecounter_lock);
1068 1.244 kardel #ifndef PPS_TRAILING_EDGE
1069 1.244 kardel TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1070 1.244 kardel &sc->sc_pps_state.ppsinfo.assert_timestamp);
1071 1.244 kardel #else
1072 1.244 kardel TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1073 1.244 kardel &sc->sc_pps_state.ppsinfo.clear_timestamp);
1074 1.244 kardel #endif
1075 1.279 ad mutex_spin_exit(&timecounter_lock);
1076 1.144 jonathan break;
1077 1.144 jonathan
1078 1.99 mycroft default:
1079 1.194 atatat error = EPASSTHROUGH;
1080 1.136 mycroft break;
1081 1.21 mycroft }
1082 1.22 cgd
1083 1.263 ad mutex_spin_exit(&sc->sc_lock);
1084 1.136 mycroft
1085 1.99 mycroft #ifdef COM_DEBUG
1086 1.101 mycroft if (com_debug)
1087 1.99 mycroft comstatus(sc, "comioctl ");
1088 1.99 mycroft #endif
1089 1.99 mycroft
1090 1.136 mycroft return (error);
1091 1.99 mycroft }
1092 1.99 mycroft
1093 1.101 mycroft integrate void
1094 1.197 simonb com_schedrx(struct com_softc *sc)
1095 1.101 mycroft {
1096 1.101 mycroft
1097 1.101 mycroft sc->sc_rx_ready = 1;
1098 1.101 mycroft
1099 1.101 mycroft /* Wake up the poller. */
1100 1.263 ad softint_schedule(sc->sc_si);
1101 1.101 mycroft }
1102 1.101 mycroft
1103 1.99 mycroft void
1104 1.197 simonb com_break(struct com_softc *sc, int onoff)
1105 1.99 mycroft {
1106 1.99 mycroft
1107 1.99 mycroft if (onoff)
1108 1.99 mycroft SET(sc->sc_lcr, LCR_SBREAK);
1109 1.99 mycroft else
1110 1.99 mycroft CLR(sc->sc_lcr, LCR_SBREAK);
1111 1.22 cgd
1112 1.99 mycroft if (!sc->sc_heldchange) {
1113 1.99 mycroft if (sc->sc_tx_busy) {
1114 1.99 mycroft sc->sc_heldtbc = sc->sc_tbc;
1115 1.99 mycroft sc->sc_tbc = 0;
1116 1.99 mycroft sc->sc_heldchange = 1;
1117 1.99 mycroft } else
1118 1.99 mycroft com_loadchannelregs(sc);
1119 1.22 cgd }
1120 1.99 mycroft }
1121 1.22 cgd
1122 1.99 mycroft void
1123 1.197 simonb com_modem(struct com_softc *sc, int onoff)
1124 1.99 mycroft {
1125 1.22 cgd
1126 1.153 mycroft if (sc->sc_mcr_dtr == 0)
1127 1.153 mycroft return;
1128 1.153 mycroft
1129 1.99 mycroft if (onoff)
1130 1.99 mycroft SET(sc->sc_mcr, sc->sc_mcr_dtr);
1131 1.99 mycroft else
1132 1.99 mycroft CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1133 1.22 cgd
1134 1.99 mycroft if (!sc->sc_heldchange) {
1135 1.99 mycroft if (sc->sc_tx_busy) {
1136 1.99 mycroft sc->sc_heldtbc = sc->sc_tbc;
1137 1.99 mycroft sc->sc_tbc = 0;
1138 1.99 mycroft sc->sc_heldchange = 1;
1139 1.99 mycroft } else
1140 1.99 mycroft com_loadchannelregs(sc);
1141 1.22 cgd }
1142 1.153 mycroft }
1143 1.153 mycroft
1144 1.153 mycroft void
1145 1.197 simonb tiocm_to_com(struct com_softc *sc, u_long how, int ttybits)
1146 1.153 mycroft {
1147 1.153 mycroft u_char combits;
1148 1.153 mycroft
1149 1.153 mycroft combits = 0;
1150 1.153 mycroft if (ISSET(ttybits, TIOCM_DTR))
1151 1.153 mycroft SET(combits, MCR_DTR);
1152 1.153 mycroft if (ISSET(ttybits, TIOCM_RTS))
1153 1.153 mycroft SET(combits, MCR_RTS);
1154 1.232 perry
1155 1.153 mycroft switch (how) {
1156 1.153 mycroft case TIOCMBIC:
1157 1.153 mycroft CLR(sc->sc_mcr, combits);
1158 1.153 mycroft break;
1159 1.153 mycroft
1160 1.153 mycroft case TIOCMBIS:
1161 1.153 mycroft SET(sc->sc_mcr, combits);
1162 1.153 mycroft break;
1163 1.153 mycroft
1164 1.153 mycroft case TIOCMSET:
1165 1.153 mycroft CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
1166 1.153 mycroft SET(sc->sc_mcr, combits);
1167 1.153 mycroft break;
1168 1.153 mycroft }
1169 1.153 mycroft
1170 1.153 mycroft if (!sc->sc_heldchange) {
1171 1.153 mycroft if (sc->sc_tx_busy) {
1172 1.153 mycroft sc->sc_heldtbc = sc->sc_tbc;
1173 1.153 mycroft sc->sc_tbc = 0;
1174 1.153 mycroft sc->sc_heldchange = 1;
1175 1.153 mycroft } else
1176 1.153 mycroft com_loadchannelregs(sc);
1177 1.153 mycroft }
1178 1.153 mycroft }
1179 1.153 mycroft
1180 1.153 mycroft int
1181 1.197 simonb com_to_tiocm(struct com_softc *sc)
1182 1.153 mycroft {
1183 1.153 mycroft u_char combits;
1184 1.153 mycroft int ttybits = 0;
1185 1.153 mycroft
1186 1.153 mycroft combits = sc->sc_mcr;
1187 1.153 mycroft if (ISSET(combits, MCR_DTR))
1188 1.153 mycroft SET(ttybits, TIOCM_DTR);
1189 1.153 mycroft if (ISSET(combits, MCR_RTS))
1190 1.153 mycroft SET(ttybits, TIOCM_RTS);
1191 1.153 mycroft
1192 1.153 mycroft combits = sc->sc_msr;
1193 1.153 mycroft if (ISSET(combits, MSR_DCD))
1194 1.153 mycroft SET(ttybits, TIOCM_CD);
1195 1.153 mycroft if (ISSET(combits, MSR_CTS))
1196 1.153 mycroft SET(ttybits, TIOCM_CTS);
1197 1.153 mycroft if (ISSET(combits, MSR_DSR))
1198 1.153 mycroft SET(ttybits, TIOCM_DSR);
1199 1.153 mycroft if (ISSET(combits, MSR_RI | MSR_TERI))
1200 1.153 mycroft SET(ttybits, TIOCM_RI);
1201 1.153 mycroft
1202 1.228 mycroft if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC))
1203 1.153 mycroft SET(ttybits, TIOCM_LE);
1204 1.153 mycroft
1205 1.153 mycroft return (ttybits);
1206 1.1 cgd }
1207 1.1 cgd
1208 1.106 drochner static u_char
1209 1.197 simonb cflag2lcr(tcflag_t cflag)
1210 1.106 drochner {
1211 1.106 drochner u_char lcr = 0;
1212 1.106 drochner
1213 1.106 drochner switch (ISSET(cflag, CSIZE)) {
1214 1.127 mycroft case CS5:
1215 1.106 drochner SET(lcr, LCR_5BITS);
1216 1.106 drochner break;
1217 1.127 mycroft case CS6:
1218 1.106 drochner SET(lcr, LCR_6BITS);
1219 1.106 drochner break;
1220 1.127 mycroft case CS7:
1221 1.106 drochner SET(lcr, LCR_7BITS);
1222 1.106 drochner break;
1223 1.127 mycroft case CS8:
1224 1.106 drochner SET(lcr, LCR_8BITS);
1225 1.106 drochner break;
1226 1.106 drochner }
1227 1.106 drochner if (ISSET(cflag, PARENB)) {
1228 1.106 drochner SET(lcr, LCR_PENAB);
1229 1.106 drochner if (!ISSET(cflag, PARODD))
1230 1.106 drochner SET(lcr, LCR_PEVEN);
1231 1.106 drochner }
1232 1.106 drochner if (ISSET(cflag, CSTOPB))
1233 1.106 drochner SET(lcr, LCR_STOPB);
1234 1.106 drochner
1235 1.110 enami return (lcr);
1236 1.106 drochner }
1237 1.106 drochner
1238 1.21 mycroft int
1239 1.197 simonb comparam(struct tty *tp, struct termios *t)
1240 1.1 cgd {
1241 1.276 cube struct com_softc *sc =
1242 1.276 cube device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1243 1.188 enami int ospeed;
1244 1.62 mycroft u_char lcr;
1245 1.21 mycroft
1246 1.149 thorpej if (COM_ISALIVE(sc) == 0)
1247 1.149 thorpej return (EIO);
1248 1.149 thorpej
1249 1.188 enami #ifdef COM_HAYESP
1250 1.209 thorpej if (sc->sc_type == COM_TYPE_HAYESP) {
1251 1.188 enami int prescaler, speed;
1252 1.188 enami
1253 1.188 enami /*
1254 1.188 enami * Calculate UART clock prescaler. It should be in
1255 1.188 enami * range of 0 .. 3.
1256 1.188 enami */
1257 1.188 enami for (prescaler = 0, speed = t->c_ospeed; prescaler < 4;
1258 1.188 enami prescaler++, speed /= 2)
1259 1.210 thorpej if ((ospeed = comspeed(speed, sc->sc_frequency,
1260 1.210 thorpej sc->sc_type)) > 0)
1261 1.188 enami break;
1262 1.188 enami
1263 1.188 enami if (prescaler == 4)
1264 1.188 enami return (EINVAL);
1265 1.188 enami sc->sc_prescaler = prescaler;
1266 1.188 enami } else
1267 1.188 enami #endif
1268 1.210 thorpej ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type);
1269 1.188 enami
1270 1.127 mycroft /* Check requested parameters. */
1271 1.99 mycroft if (ospeed < 0)
1272 1.99 mycroft return (EINVAL);
1273 1.99 mycroft if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1274 1.99 mycroft return (EINVAL);
1275 1.21 mycroft
1276 1.99 mycroft /*
1277 1.99 mycroft * For the console, always force CLOCAL and !HUPCL, so that the port
1278 1.99 mycroft * is always active.
1279 1.99 mycroft */
1280 1.99 mycroft if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1281 1.99 mycroft ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1282 1.99 mycroft SET(t->c_cflag, CLOCAL);
1283 1.99 mycroft CLR(t->c_cflag, HUPCL);
1284 1.62 mycroft }
1285 1.129 mycroft
1286 1.129 mycroft /*
1287 1.129 mycroft * If there were no changes, don't do anything. This avoids dropping
1288 1.129 mycroft * input and improves performance when all we did was frob things like
1289 1.129 mycroft * VMIN and VTIME.
1290 1.129 mycroft */
1291 1.129 mycroft if (tp->t_ospeed == t->c_ospeed &&
1292 1.129 mycroft tp->t_cflag == t->c_cflag)
1293 1.129 mycroft return (0);
1294 1.126 mycroft
1295 1.126 mycroft lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
1296 1.126 mycroft
1297 1.263 ad mutex_spin_enter(&sc->sc_lock);
1298 1.126 mycroft
1299 1.126 mycroft sc->sc_lcr = lcr;
1300 1.36 mycroft
1301 1.36 mycroft /*
1302 1.99 mycroft * If we're not in a mode that assumes a connection is present, then
1303 1.99 mycroft * ignore carrier changes.
1304 1.36 mycroft */
1305 1.99 mycroft if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1306 1.99 mycroft sc->sc_msr_dcd = 0;
1307 1.99 mycroft else
1308 1.99 mycroft sc->sc_msr_dcd = MSR_DCD;
1309 1.99 mycroft /*
1310 1.99 mycroft * Set the flow control pins depending on the current flow control
1311 1.99 mycroft * mode.
1312 1.99 mycroft */
1313 1.99 mycroft if (ISSET(t->c_cflag, CRTSCTS)) {
1314 1.99 mycroft sc->sc_mcr_dtr = MCR_DTR;
1315 1.99 mycroft sc->sc_mcr_rts = MCR_RTS;
1316 1.99 mycroft sc->sc_msr_cts = MSR_CTS;
1317 1.116 fvdl sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
1318 1.99 mycroft } else if (ISSET(t->c_cflag, MDMBUF)) {
1319 1.99 mycroft /*
1320 1.99 mycroft * For DTR/DCD flow control, make sure we don't toggle DTR for
1321 1.99 mycroft * carrier detection.
1322 1.99 mycroft */
1323 1.99 mycroft sc->sc_mcr_dtr = 0;
1324 1.99 mycroft sc->sc_mcr_rts = MCR_DTR;
1325 1.99 mycroft sc->sc_msr_cts = MSR_DCD;
1326 1.116 fvdl sc->sc_efr = 0;
1327 1.99 mycroft } else {
1328 1.99 mycroft /*
1329 1.99 mycroft * If no flow control, then always set RTS. This will make
1330 1.99 mycroft * the other side happy if it mistakenly thinks we're doing
1331 1.99 mycroft * RTS/CTS flow control.
1332 1.99 mycroft */
1333 1.99 mycroft sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
1334 1.99 mycroft sc->sc_mcr_rts = 0;
1335 1.99 mycroft sc->sc_msr_cts = 0;
1336 1.116 fvdl sc->sc_efr = 0;
1337 1.99 mycroft if (ISSET(sc->sc_mcr, MCR_DTR))
1338 1.99 mycroft SET(sc->sc_mcr, MCR_RTS);
1339 1.99 mycroft else
1340 1.99 mycroft CLR(sc->sc_mcr, MCR_RTS);
1341 1.99 mycroft }
1342 1.99 mycroft sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1343 1.99 mycroft
1344 1.95 mycroft #if 0
1345 1.99 mycroft if (ospeed == 0)
1346 1.99 mycroft CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1347 1.99 mycroft else
1348 1.99 mycroft SET(sc->sc_mcr, sc->sc_mcr_dtr);
1349 1.66 mycroft #endif
1350 1.66 mycroft
1351 1.99 mycroft sc->sc_dlbl = ospeed;
1352 1.99 mycroft sc->sc_dlbh = ospeed >> 8;
1353 1.66 mycroft
1354 1.99 mycroft /*
1355 1.99 mycroft * Set the FIFO threshold based on the receive speed.
1356 1.99 mycroft *
1357 1.99 mycroft * * If it's a low speed, it's probably a mouse or some other
1358 1.99 mycroft * interactive device, so set the threshold low.
1359 1.99 mycroft * * If it's a high speed, trim the trigger level down to prevent
1360 1.99 mycroft * overflows.
1361 1.99 mycroft * * Otherwise set it a bit higher.
1362 1.99 mycroft */
1363 1.209 thorpej if (sc->sc_type == COM_TYPE_HAYESP)
1364 1.99 mycroft sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
1365 1.278 tsutsui else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
1366 1.278 tsutsui if (t->c_ospeed <= 1200)
1367 1.278 tsutsui sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1;
1368 1.278 tsutsui else if (t->c_ospeed <= 38400)
1369 1.278 tsutsui sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8;
1370 1.278 tsutsui else
1371 1.278 tsutsui sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4;
1372 1.278 tsutsui } else
1373 1.99 mycroft sc->sc_fifo = 0;
1374 1.21 mycroft
1375 1.127 mycroft /* And copy to tty. */
1376 1.240 dsl tp->t_ispeed = t->c_ospeed;
1377 1.57 mycroft tp->t_ospeed = t->c_ospeed;
1378 1.57 mycroft tp->t_cflag = t->c_cflag;
1379 1.25 cgd
1380 1.99 mycroft if (!sc->sc_heldchange) {
1381 1.99 mycroft if (sc->sc_tx_busy) {
1382 1.99 mycroft sc->sc_heldtbc = sc->sc_tbc;
1383 1.99 mycroft sc->sc_tbc = 0;
1384 1.99 mycroft sc->sc_heldchange = 1;
1385 1.99 mycroft } else
1386 1.99 mycroft com_loadchannelregs(sc);
1387 1.99 mycroft }
1388 1.99 mycroft
1389 1.124 mycroft if (!ISSET(t->c_cflag, CHWFLOW)) {
1390 1.125 mycroft /* Disable the high water mark. */
1391 1.125 mycroft sc->sc_r_hiwat = 0;
1392 1.125 mycroft sc->sc_r_lowat = 0;
1393 1.124 mycroft if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1394 1.124 mycroft CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1395 1.124 mycroft com_schedrx(sc);
1396 1.124 mycroft }
1397 1.124 mycroft if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1398 1.124 mycroft CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1399 1.124 mycroft com_hwiflow(sc);
1400 1.124 mycroft }
1401 1.125 mycroft } else {
1402 1.127 mycroft sc->sc_r_hiwat = com_rbuf_hiwat;
1403 1.127 mycroft sc->sc_r_lowat = com_rbuf_lowat;
1404 1.124 mycroft }
1405 1.124 mycroft
1406 1.263 ad mutex_spin_exit(&sc->sc_lock);
1407 1.99 mycroft
1408 1.25 cgd /*
1409 1.99 mycroft * Update the tty layer's idea of the carrier bit, in case we changed
1410 1.124 mycroft * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1411 1.124 mycroft * explicit request.
1412 1.25 cgd */
1413 1.181 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
1414 1.99 mycroft
1415 1.99 mycroft #ifdef COM_DEBUG
1416 1.101 mycroft if (com_debug)
1417 1.101 mycroft comstatus(sc, "comparam ");
1418 1.99 mycroft #endif
1419 1.99 mycroft
1420 1.99 mycroft if (!ISSET(t->c_cflag, CHWFLOW)) {
1421 1.99 mycroft if (sc->sc_tx_stopped) {
1422 1.99 mycroft sc->sc_tx_stopped = 0;
1423 1.99 mycroft comstart(tp);
1424 1.99 mycroft }
1425 1.21 mycroft }
1426 1.1 cgd
1427 1.99 mycroft return (0);
1428 1.99 mycroft }
1429 1.99 mycroft
1430 1.99 mycroft void
1431 1.197 simonb com_iflush(struct com_softc *sc)
1432 1.99 mycroft {
1433 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
1434 1.131 marc #ifdef DIAGNOSTIC
1435 1.131 marc int reg;
1436 1.131 marc #endif
1437 1.131 marc int timo;
1438 1.99 mycroft
1439 1.131 marc #ifdef DIAGNOSTIC
1440 1.131 marc reg = 0xffff;
1441 1.131 marc #endif
1442 1.131 marc timo = 50000;
1443 1.99 mycroft /* flush any pending I/O */
1444 1.247 gdamore while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)
1445 1.131 marc && --timo)
1446 1.131 marc #ifdef DIAGNOSTIC
1447 1.131 marc reg =
1448 1.131 marc #else
1449 1.131 marc (void)
1450 1.131 marc #endif
1451 1.247 gdamore CSR_READ_1(regsp, COM_REG_RXDATA);
1452 1.131 marc #ifdef DIAGNOSTIC
1453 1.131 marc if (!timo)
1454 1.276 cube aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg);
1455 1.131 marc #endif
1456 1.99 mycroft }
1457 1.99 mycroft
1458 1.99 mycroft void
1459 1.197 simonb com_loadchannelregs(struct com_softc *sc)
1460 1.99 mycroft {
1461 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
1462 1.99 mycroft
1463 1.99 mycroft /* XXXXX necessary? */
1464 1.99 mycroft com_iflush(sc);
1465 1.99 mycroft
1466 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
1467 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
1468 1.208 scw else
1469 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, 0);
1470 1.99 mycroft
1471 1.281 matt if (sc->sc_type == COM_TYPE_OMAP) {
1472 1.281 matt /* disable before changing settings */
1473 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
1474 1.281 matt }
1475 1.281 matt
1476 1.116 fvdl if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) {
1477 1.286 matt KASSERT(sc->sc_type != COM_TYPE_AU1x00);
1478 1.286 matt KASSERT(sc->sc_type != COM_TYPE_16550_NOERS);
1479 1.286 matt /* no EFR on alchemy */
1480 1.298 jklos CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
1481 1.286 matt CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
1482 1.116 fvdl }
1483 1.247 gdamore if (sc->sc_type == COM_TYPE_AU1x00) {
1484 1.247 gdamore /* alchemy has single separate 16-bit clock divisor register */
1485 1.247 gdamore CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl +
1486 1.247 gdamore (sc->sc_dlbh << 8));
1487 1.247 gdamore } else {
1488 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
1489 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
1490 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
1491 1.247 gdamore }
1492 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
1493 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr);
1494 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo);
1495 1.188 enami #ifdef COM_HAYESP
1496 1.209 thorpej if (sc->sc_type == COM_TYPE_HAYESP) {
1497 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
1498 1.188 enami HAYESP_SETPRESCALER);
1499 1.258 cube bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1500 1.188 enami sc->sc_prescaler);
1501 1.188 enami }
1502 1.188 enami #endif
1503 1.281 matt if (sc->sc_type == COM_TYPE_OMAP) {
1504 1.281 matt /* setup the fifos. the FCR value is not used as long
1505 1.281 matt as SCR[6] and SCR[7] are 0, which they are at reset
1506 1.281 matt and we never touch the SCR register */
1507 1.281 matt uint8_t rx_fifo_trig = 40;
1508 1.281 matt uint8_t tx_fifo_trig = 60;
1509 1.281 matt uint8_t rx_start = 8;
1510 1.281 matt uint8_t rx_halt = 60;
1511 1.281 matt uint8_t tlr_value = ((rx_fifo_trig>>2) << 4) | (tx_fifo_trig>>2);
1512 1.281 matt uint8_t tcr_value = ((rx_start>>2) << 4) | (rx_halt>>2);
1513 1.281 matt
1514 1.281 matt /* enable access to TCR & TLR */
1515 1.281 matt CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr | MCR_TCR_TLR);
1516 1.281 matt
1517 1.281 matt /* write tcr and tlr values */
1518 1.281 matt CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
1519 1.281 matt CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
1520 1.281 matt
1521 1.281 matt /* disable access to TCR & TLR */
1522 1.281 matt CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr);
1523 1.281 matt
1524 1.281 matt /* enable again, but mode is based on speed */
1525 1.281 matt if (sc->sc_tty->t_termios.c_ospeed > 230400) {
1526 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
1527 1.281 matt } else {
1528 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
1529 1.281 matt }
1530 1.281 matt }
1531 1.99 mycroft
1532 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1533 1.99 mycroft }
1534 1.99 mycroft
1535 1.99 mycroft int
1536 1.197 simonb comhwiflow(struct tty *tp, int block)
1537 1.99 mycroft {
1538 1.276 cube struct com_softc *sc =
1539 1.276 cube device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1540 1.99 mycroft
1541 1.149 thorpej if (COM_ISALIVE(sc) == 0)
1542 1.149 thorpej return (0);
1543 1.149 thorpej
1544 1.99 mycroft if (sc->sc_mcr_rts == 0)
1545 1.99 mycroft return (0);
1546 1.99 mycroft
1547 1.263 ad mutex_spin_enter(&sc->sc_lock);
1548 1.232 perry
1549 1.99 mycroft if (block) {
1550 1.101 mycroft if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1551 1.101 mycroft SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1552 1.101 mycroft com_hwiflow(sc);
1553 1.101 mycroft }
1554 1.99 mycroft } else {
1555 1.101 mycroft if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1556 1.101 mycroft CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1557 1.101 mycroft com_schedrx(sc);
1558 1.101 mycroft }
1559 1.101 mycroft if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1560 1.101 mycroft CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1561 1.101 mycroft com_hwiflow(sc);
1562 1.101 mycroft }
1563 1.99 mycroft }
1564 1.179 sommerfe
1565 1.263 ad mutex_spin_exit(&sc->sc_lock);
1566 1.99 mycroft return (1);
1567 1.99 mycroft }
1568 1.232 perry
1569 1.99 mycroft /*
1570 1.99 mycroft * (un)block input via hw flowcontrol
1571 1.99 mycroft */
1572 1.99 mycroft void
1573 1.197 simonb com_hwiflow(struct com_softc *sc)
1574 1.99 mycroft {
1575 1.247 gdamore struct com_regs *regsp= &sc->sc_regs;
1576 1.99 mycroft
1577 1.99 mycroft if (sc->sc_mcr_rts == 0)
1578 1.99 mycroft return;
1579 1.99 mycroft
1580 1.101 mycroft if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1581 1.99 mycroft CLR(sc->sc_mcr, sc->sc_mcr_rts);
1582 1.99 mycroft CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1583 1.99 mycroft } else {
1584 1.99 mycroft SET(sc->sc_mcr, sc->sc_mcr_rts);
1585 1.99 mycroft SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1586 1.99 mycroft }
1587 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active);
1588 1.1 cgd }
1589 1.21 mycroft
1590 1.99 mycroft
1591 1.12 deraadt void
1592 1.197 simonb comstart(struct tty *tp)
1593 1.1 cgd {
1594 1.276 cube struct com_softc *sc =
1595 1.276 cube device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1596 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
1597 1.21 mycroft int s;
1598 1.21 mycroft
1599 1.149 thorpej if (COM_ISALIVE(sc) == 0)
1600 1.149 thorpej return;
1601 1.149 thorpej
1602 1.1 cgd s = spltty();
1603 1.178 eeh if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1604 1.70 mycroft goto out;
1605 1.178 eeh if (sc->sc_tx_stopped)
1606 1.127 mycroft goto out;
1607 1.266 ad if (!ttypull(tp))
1608 1.266 ad goto out;
1609 1.99 mycroft
1610 1.99 mycroft /* Grab the first contiguous region of buffer space. */
1611 1.99 mycroft {
1612 1.99 mycroft u_char *tba;
1613 1.99 mycroft int tbc;
1614 1.99 mycroft
1615 1.99 mycroft tba = tp->t_outq.c_cf;
1616 1.99 mycroft tbc = ndqb(&tp->t_outq, 0);
1617 1.99 mycroft
1618 1.263 ad mutex_spin_enter(&sc->sc_lock);
1619 1.99 mycroft
1620 1.99 mycroft sc->sc_tba = tba;
1621 1.99 mycroft sc->sc_tbc = tbc;
1622 1.99 mycroft }
1623 1.99 mycroft
1624 1.62 mycroft SET(tp->t_state, TS_BUSY);
1625 1.99 mycroft sc->sc_tx_busy = 1;
1626 1.64 christos
1627 1.99 mycroft /* Enable transmit completion interrupts if necessary. */
1628 1.70 mycroft if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
1629 1.70 mycroft SET(sc->sc_ier, IER_ETXRDY);
1630 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1631 1.70 mycroft }
1632 1.99 mycroft
1633 1.99 mycroft /* Output the first chunk of the contiguous buffer. */
1634 1.195 thorpej if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) {
1635 1.201 thorpej u_int n;
1636 1.99 mycroft
1637 1.127 mycroft n = sc->sc_tbc;
1638 1.127 mycroft if (n > sc->sc_fifolen)
1639 1.127 mycroft n = sc->sc_fifolen;
1640 1.247 gdamore CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n);
1641 1.99 mycroft sc->sc_tbc -= n;
1642 1.99 mycroft sc->sc_tba += n;
1643 1.64 christos }
1644 1.233 tls
1645 1.263 ad mutex_spin_exit(&sc->sc_lock);
1646 1.99 mycroft out:
1647 1.1 cgd splx(s);
1648 1.99 mycroft return;
1649 1.1 cgd }
1650 1.21 mycroft
1651 1.1 cgd /*
1652 1.1 cgd * Stop output on a line.
1653 1.1 cgd */
1654 1.85 mycroft void
1655 1.256 christos comstop(struct tty *tp, int flag)
1656 1.1 cgd {
1657 1.276 cube struct com_softc *sc =
1658 1.276 cube device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1659 1.1 cgd
1660 1.263 ad mutex_spin_enter(&sc->sc_lock);
1661 1.99 mycroft if (ISSET(tp->t_state, TS_BUSY)) {
1662 1.99 mycroft /* Stop transmitting at the next chunk. */
1663 1.99 mycroft sc->sc_tbc = 0;
1664 1.99 mycroft sc->sc_heldtbc = 0;
1665 1.62 mycroft if (!ISSET(tp->t_state, TS_TTSTOP))
1666 1.62 mycroft SET(tp->t_state, TS_FLUSH);
1667 1.99 mycroft }
1668 1.263 ad mutex_spin_exit(&sc->sc_lock);
1669 1.1 cgd }
1670 1.1 cgd
1671 1.33 mycroft void
1672 1.197 simonb comdiag(void *arg)
1673 1.33 mycroft {
1674 1.33 mycroft struct com_softc *sc = arg;
1675 1.99 mycroft int overflows, floods;
1676 1.33 mycroft
1677 1.263 ad mutex_spin_enter(&sc->sc_lock);
1678 1.33 mycroft overflows = sc->sc_overflows;
1679 1.33 mycroft sc->sc_overflows = 0;
1680 1.57 mycroft floods = sc->sc_floods;
1681 1.57 mycroft sc->sc_floods = 0;
1682 1.99 mycroft sc->sc_errors = 0;
1683 1.263 ad mutex_spin_exit(&sc->sc_lock);
1684 1.57 mycroft
1685 1.127 mycroft log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1686 1.276 cube device_xname(sc->sc_dev),
1687 1.57 mycroft overflows, overflows == 1 ? "" : "s",
1688 1.99 mycroft floods, floods == 1 ? "" : "s");
1689 1.57 mycroft }
1690 1.57 mycroft
1691 1.99 mycroft integrate void
1692 1.197 simonb com_rxsoft(struct com_softc *sc, struct tty *tp)
1693 1.99 mycroft {
1694 1.198 simonb int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1695 1.127 mycroft u_char *get, *end;
1696 1.127 mycroft u_int cc, scc;
1697 1.127 mycroft u_char lsr;
1698 1.127 mycroft int code;
1699 1.57 mycroft
1700 1.127 mycroft end = sc->sc_ebuf;
1701 1.99 mycroft get = sc->sc_rbget;
1702 1.127 mycroft scc = cc = com_rbuf_size - sc->sc_rbavail;
1703 1.99 mycroft
1704 1.127 mycroft if (cc == com_rbuf_size) {
1705 1.99 mycroft sc->sc_floods++;
1706 1.99 mycroft if (sc->sc_errors++ == 0)
1707 1.170 thorpej callout_reset(&sc->sc_diag_callout, 60 * hz,
1708 1.170 thorpej comdiag, sc);
1709 1.99 mycroft }
1710 1.99 mycroft
1711 1.205 gson /* If not yet open, drop the entire buffer content here */
1712 1.205 gson if (!ISSET(tp->t_state, TS_ISOPEN)) {
1713 1.205 gson get += cc << 1;
1714 1.205 gson if (get >= end)
1715 1.205 gson get -= com_rbuf_size << 1;
1716 1.205 gson cc = 0;
1717 1.205 gson }
1718 1.101 mycroft while (cc) {
1719 1.128 mycroft code = get[0];
1720 1.127 mycroft lsr = get[1];
1721 1.128 mycroft if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) {
1722 1.128 mycroft if (ISSET(lsr, LSR_OE)) {
1723 1.128 mycroft sc->sc_overflows++;
1724 1.128 mycroft if (sc->sc_errors++ == 0)
1725 1.170 thorpej callout_reset(&sc->sc_diag_callout,
1726 1.170 thorpej 60 * hz, comdiag, sc);
1727 1.128 mycroft }
1728 1.127 mycroft if (ISSET(lsr, LSR_BI | LSR_FE))
1729 1.127 mycroft SET(code, TTY_FE);
1730 1.127 mycroft if (ISSET(lsr, LSR_PE))
1731 1.127 mycroft SET(code, TTY_PE);
1732 1.127 mycroft }
1733 1.127 mycroft if ((*rint)(code, tp) == -1) {
1734 1.101 mycroft /*
1735 1.101 mycroft * The line discipline's buffer is out of space.
1736 1.101 mycroft */
1737 1.101 mycroft if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1738 1.101 mycroft /*
1739 1.101 mycroft * We're either not using flow control, or the
1740 1.101 mycroft * line discipline didn't tell us to block for
1741 1.101 mycroft * some reason. Either way, we have no way to
1742 1.101 mycroft * know when there's more space available, so
1743 1.101 mycroft * just drop the rest of the data.
1744 1.101 mycroft */
1745 1.127 mycroft get += cc << 1;
1746 1.127 mycroft if (get >= end)
1747 1.127 mycroft get -= com_rbuf_size << 1;
1748 1.101 mycroft cc = 0;
1749 1.101 mycroft } else {
1750 1.101 mycroft /*
1751 1.101 mycroft * Don't schedule any more receive processing
1752 1.101 mycroft * until the line discipline tells us there's
1753 1.101 mycroft * space available (through comhwiflow()).
1754 1.101 mycroft * Leave the rest of the data in the input
1755 1.101 mycroft * buffer.
1756 1.101 mycroft */
1757 1.101 mycroft SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1758 1.101 mycroft }
1759 1.101 mycroft break;
1760 1.101 mycroft }
1761 1.127 mycroft get += 2;
1762 1.127 mycroft if (get >= end)
1763 1.127 mycroft get = sc->sc_rbuf;
1764 1.101 mycroft cc--;
1765 1.99 mycroft }
1766 1.99 mycroft
1767 1.101 mycroft if (cc != scc) {
1768 1.101 mycroft sc->sc_rbget = get;
1769 1.263 ad mutex_spin_enter(&sc->sc_lock);
1770 1.232 perry
1771 1.101 mycroft cc = sc->sc_rbavail += scc - cc;
1772 1.101 mycroft /* Buffers should be ok again, release possible block. */
1773 1.101 mycroft if (cc >= sc->sc_r_lowat) {
1774 1.101 mycroft if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1775 1.101 mycroft CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1776 1.101 mycroft SET(sc->sc_ier, IER_ERXRDY);
1777 1.208 scw #ifdef COM_PXA2X0
1778 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
1779 1.208 scw SET(sc->sc_ier, IER_ERXTOUT);
1780 1.208 scw #endif
1781 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
1782 1.101 mycroft }
1783 1.101 mycroft if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1784 1.101 mycroft CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1785 1.101 mycroft com_hwiflow(sc);
1786 1.101 mycroft }
1787 1.101 mycroft }
1788 1.263 ad mutex_spin_exit(&sc->sc_lock);
1789 1.57 mycroft }
1790 1.99 mycroft }
1791 1.99 mycroft
1792 1.99 mycroft integrate void
1793 1.197 simonb com_txsoft(struct com_softc *sc, struct tty *tp)
1794 1.99 mycroft {
1795 1.33 mycroft
1796 1.99 mycroft CLR(tp->t_state, TS_BUSY);
1797 1.99 mycroft if (ISSET(tp->t_state, TS_FLUSH))
1798 1.99 mycroft CLR(tp->t_state, TS_FLUSH);
1799 1.99 mycroft else
1800 1.99 mycroft ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1801 1.181 eeh (*tp->t_linesw->l_start)(tp);
1802 1.99 mycroft }
1803 1.57 mycroft
1804 1.99 mycroft integrate void
1805 1.197 simonb com_stsoft(struct com_softc *sc, struct tty *tp)
1806 1.99 mycroft {
1807 1.99 mycroft u_char msr, delta;
1808 1.57 mycroft
1809 1.263 ad mutex_spin_enter(&sc->sc_lock);
1810 1.99 mycroft msr = sc->sc_msr;
1811 1.99 mycroft delta = sc->sc_msr_delta;
1812 1.99 mycroft sc->sc_msr_delta = 0;
1813 1.263 ad mutex_spin_exit(&sc->sc_lock);
1814 1.57 mycroft
1815 1.99 mycroft if (ISSET(delta, sc->sc_msr_dcd)) {
1816 1.99 mycroft /*
1817 1.99 mycroft * Inform the tty layer that carrier detect changed.
1818 1.99 mycroft */
1819 1.181 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1820 1.99 mycroft }
1821 1.61 mycroft
1822 1.99 mycroft if (ISSET(delta, sc->sc_msr_cts)) {
1823 1.99 mycroft /* Block or unblock output according to flow control. */
1824 1.99 mycroft if (ISSET(msr, sc->sc_msr_cts)) {
1825 1.99 mycroft sc->sc_tx_stopped = 0;
1826 1.181 eeh (*tp->t_linesw->l_start)(tp);
1827 1.99 mycroft } else {
1828 1.99 mycroft sc->sc_tx_stopped = 1;
1829 1.61 mycroft }
1830 1.99 mycroft }
1831 1.99 mycroft
1832 1.99 mycroft #ifdef COM_DEBUG
1833 1.101 mycroft if (com_debug)
1834 1.127 mycroft comstatus(sc, "com_stsoft");
1835 1.99 mycroft #endif
1836 1.99 mycroft }
1837 1.99 mycroft
1838 1.99 mycroft void
1839 1.197 simonb comsoft(void *arg)
1840 1.99 mycroft {
1841 1.99 mycroft struct com_softc *sc = arg;
1842 1.99 mycroft struct tty *tp;
1843 1.99 mycroft
1844 1.149 thorpej if (COM_ISALIVE(sc) == 0)
1845 1.131 marc return;
1846 1.131 marc
1847 1.261 ad tp = sc->sc_tty;
1848 1.99 mycroft
1849 1.261 ad if (sc->sc_rx_ready) {
1850 1.261 ad sc->sc_rx_ready = 0;
1851 1.261 ad com_rxsoft(sc, tp);
1852 1.261 ad }
1853 1.57 mycroft
1854 1.261 ad if (sc->sc_st_check) {
1855 1.261 ad sc->sc_st_check = 0;
1856 1.261 ad com_stsoft(sc, tp);
1857 1.261 ad }
1858 1.57 mycroft
1859 1.261 ad if (sc->sc_tx_done) {
1860 1.261 ad sc->sc_tx_done = 0;
1861 1.261 ad com_txsoft(sc, tp);
1862 1.57 mycroft }
1863 1.21 mycroft }
1864 1.140 ross
1865 1.21 mycroft int
1866 1.197 simonb comintr(void *arg)
1867 1.21 mycroft {
1868 1.49 cgd struct com_softc *sc = arg;
1869 1.247 gdamore struct com_regs *regsp = &sc->sc_regs;
1870 1.247 gdamore
1871 1.127 mycroft u_char *put, *end;
1872 1.127 mycroft u_int cc;
1873 1.127 mycroft u_char lsr, iir;
1874 1.55 mycroft
1875 1.149 thorpej if (COM_ISALIVE(sc) == 0)
1876 1.131 marc return (0);
1877 1.131 marc
1878 1.288 cegger KASSERT(regsp != NULL);
1879 1.288 cegger
1880 1.263 ad mutex_spin_enter(&sc->sc_lock);
1881 1.247 gdamore iir = CSR_READ_1(regsp, COM_REG_IIR);
1882 1.179 sommerfe if (ISSET(iir, IIR_NOPEND)) {
1883 1.263 ad mutex_spin_exit(&sc->sc_lock);
1884 1.55 mycroft return (0);
1885 1.179 sommerfe }
1886 1.21 mycroft
1887 1.127 mycroft end = sc->sc_ebuf;
1888 1.99 mycroft put = sc->sc_rbput;
1889 1.99 mycroft cc = sc->sc_rbavail;
1890 1.99 mycroft
1891 1.189 briggs again: do {
1892 1.168 jonathan u_char msr, delta;
1893 1.21 mycroft
1894 1.247 gdamore lsr = CSR_READ_1(regsp, COM_REG_LSR);
1895 1.103 drochner if (ISSET(lsr, LSR_BI)) {
1896 1.186 uwe int cn_trapped = 0;
1897 1.207 fvdl
1898 1.186 uwe cn_check_magic(sc->sc_tty->t_dev,
1899 1.186 uwe CNC_BREAK, com_cnm_state);
1900 1.186 uwe if (cn_trapped)
1901 1.103 drochner continue;
1902 1.206 briggs #if defined(KGDB) && !defined(DDB)
1903 1.103 drochner if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
1904 1.103 drochner kgdb_connect(1);
1905 1.103 drochner continue;
1906 1.103 drochner }
1907 1.103 drochner #endif
1908 1.102 thorpej }
1909 1.102 thorpej
1910 1.101 mycroft if (ISSET(lsr, LSR_RCV_MASK) &&
1911 1.101 mycroft !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1912 1.127 mycroft while (cc > 0) {
1913 1.186 uwe int cn_trapped = 0;
1914 1.247 gdamore put[0] = CSR_READ_1(regsp, COM_REG_RXDATA);
1915 1.127 mycroft put[1] = lsr;
1916 1.186 uwe cn_check_magic(sc->sc_tty->t_dev,
1917 1.186 uwe put[0], com_cnm_state);
1918 1.229 mycroft if (cn_trapped)
1919 1.229 mycroft goto next;
1920 1.127 mycroft put += 2;
1921 1.127 mycroft if (put >= end)
1922 1.127 mycroft put = sc->sc_rbuf;
1923 1.127 mycroft cc--;
1924 1.229 mycroft next:
1925 1.247 gdamore lsr = CSR_READ_1(regsp, COM_REG_LSR);
1926 1.127 mycroft if (!ISSET(lsr, LSR_RCV_MASK))
1927 1.127 mycroft break;
1928 1.99 mycroft }
1929 1.127 mycroft
1930 1.99 mycroft /*
1931 1.99 mycroft * Current string of incoming characters ended because
1932 1.127 mycroft * no more data was available or we ran out of space.
1933 1.127 mycroft * Schedule a receive event if any data was received.
1934 1.127 mycroft * If we're out of space, turn off receive interrupts.
1935 1.99 mycroft */
1936 1.99 mycroft sc->sc_rbput = put;
1937 1.99 mycroft sc->sc_rbavail = cc;
1938 1.101 mycroft if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1939 1.101 mycroft sc->sc_rx_ready = 1;
1940 1.127 mycroft
1941 1.99 mycroft /*
1942 1.99 mycroft * See if we are in danger of overflowing a buffer. If
1943 1.99 mycroft * so, use hardware flow control to ease the pressure.
1944 1.99 mycroft */
1945 1.101 mycroft if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1946 1.99 mycroft cc < sc->sc_r_hiwat) {
1947 1.101 mycroft SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1948 1.101 mycroft com_hwiflow(sc);
1949 1.99 mycroft }
1950 1.127 mycroft
1951 1.99 mycroft /*
1952 1.101 mycroft * If we're out of space, disable receive interrupts
1953 1.101 mycroft * until the queue has drained a bit.
1954 1.99 mycroft */
1955 1.99 mycroft if (!cc) {
1956 1.101 mycroft SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1957 1.208 scw #ifdef COM_PXA2X0
1958 1.209 thorpej if (sc->sc_type == COM_TYPE_PXA2x0)
1959 1.229 mycroft CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT);
1960 1.229 mycroft else
1961 1.208 scw #endif
1962 1.229 mycroft CLR(sc->sc_ier, IER_ERXRDY);
1963 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1964 1.99 mycroft }
1965 1.88 mycroft } else {
1966 1.228 mycroft if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) {
1967 1.247 gdamore (void) CSR_READ_1(regsp, COM_REG_RXDATA);
1968 1.88 mycroft continue;
1969 1.88 mycroft }
1970 1.88 mycroft }
1971 1.55 mycroft
1972 1.247 gdamore msr = CSR_READ_1(regsp, COM_REG_MSR);
1973 1.99 mycroft delta = msr ^ sc->sc_msr;
1974 1.99 mycroft sc->sc_msr = msr;
1975 1.244 kardel if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) &&
1976 1.244 kardel (delta & MSR_DCD)) {
1977 1.279 ad mutex_spin_enter(&timecounter_lock);
1978 1.244 kardel pps_capture(&sc->sc_pps_state);
1979 1.244 kardel pps_event(&sc->sc_pps_state,
1980 1.244 kardel (msr & MSR_DCD) ?
1981 1.244 kardel PPS_CAPTUREASSERT :
1982 1.244 kardel PPS_CAPTURECLEAR);
1983 1.279 ad mutex_spin_exit(&timecounter_lock);
1984 1.244 kardel }
1985 1.168 jonathan
1986 1.167 jonathan /*
1987 1.167 jonathan * Process normal status changes
1988 1.167 jonathan */
1989 1.167 jonathan if (ISSET(delta, sc->sc_msr_mask)) {
1990 1.167 jonathan SET(sc->sc_msr_delta, delta);
1991 1.99 mycroft
1992 1.99 mycroft /*
1993 1.99 mycroft * Stop output immediately if we lose the output
1994 1.99 mycroft * flow control signal or carrier detect.
1995 1.99 mycroft */
1996 1.99 mycroft if (ISSET(~msr, sc->sc_msr_mask)) {
1997 1.99 mycroft sc->sc_tbc = 0;
1998 1.99 mycroft sc->sc_heldtbc = 0;
1999 1.69 mycroft #ifdef COM_DEBUG
2000 1.101 mycroft if (com_debug)
2001 1.101 mycroft comstatus(sc, "comintr ");
2002 1.69 mycroft #endif
2003 1.99 mycroft }
2004 1.55 mycroft
2005 1.99 mycroft sc->sc_st_check = 1;
2006 1.55 mycroft }
2007 1.225 enami } while (!ISSET((iir =
2008 1.247 gdamore CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) &&
2009 1.225 enami /*
2010 1.225 enami * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY
2011 1.225 enami * by IIR read, so we can't do this way: `process all interrupts,
2012 1.225 enami * then do TX if possble'.
2013 1.225 enami */
2014 1.225 enami (iir & IIR_IMASK) != IIR_TXRDY);
2015 1.55 mycroft
2016 1.99 mycroft /*
2017 1.225 enami * Read LSR again, since there may be an interrupt between
2018 1.225 enami * the last LSR read and IIR read above.
2019 1.225 enami */
2020 1.247 gdamore lsr = CSR_READ_1(regsp, COM_REG_LSR);
2021 1.225 enami
2022 1.225 enami /*
2023 1.225 enami * See if data can be transmitted as well.
2024 1.225 enami * Schedule tx done event if no data left
2025 1.99 mycroft * and tty was marked busy.
2026 1.99 mycroft */
2027 1.99 mycroft if (ISSET(lsr, LSR_TXRDY)) {
2028 1.99 mycroft /*
2029 1.99 mycroft * If we've delayed a parameter change, do it now, and restart
2030 1.99 mycroft * output.
2031 1.99 mycroft */
2032 1.99 mycroft if (sc->sc_heldchange) {
2033 1.99 mycroft com_loadchannelregs(sc);
2034 1.99 mycroft sc->sc_heldchange = 0;
2035 1.99 mycroft sc->sc_tbc = sc->sc_heldtbc;
2036 1.99 mycroft sc->sc_heldtbc = 0;
2037 1.99 mycroft }
2038 1.127 mycroft
2039 1.99 mycroft /* Output the next chunk of the contiguous buffer, if any. */
2040 1.99 mycroft if (sc->sc_tbc > 0) {
2041 1.201 thorpej u_int n;
2042 1.99 mycroft
2043 1.127 mycroft n = sc->sc_tbc;
2044 1.127 mycroft if (n > sc->sc_fifolen)
2045 1.127 mycroft n = sc->sc_fifolen;
2046 1.247 gdamore CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n);
2047 1.99 mycroft sc->sc_tbc -= n;
2048 1.99 mycroft sc->sc_tba += n;
2049 1.127 mycroft } else {
2050 1.127 mycroft /* Disable transmit completion interrupts if necessary. */
2051 1.127 mycroft if (ISSET(sc->sc_ier, IER_ETXRDY)) {
2052 1.127 mycroft CLR(sc->sc_ier, IER_ETXRDY);
2053 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
2054 1.127 mycroft }
2055 1.127 mycroft if (sc->sc_tx_busy) {
2056 1.127 mycroft sc->sc_tx_busy = 0;
2057 1.127 mycroft sc->sc_tx_done = 1;
2058 1.127 mycroft }
2059 1.62 mycroft }
2060 1.99 mycroft }
2061 1.189 briggs
2062 1.247 gdamore if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND))
2063 1.189 briggs goto again;
2064 1.189 briggs
2065 1.263 ad mutex_spin_exit(&sc->sc_lock);
2066 1.62 mycroft
2067 1.99 mycroft /* Wake up the poller. */
2068 1.263 ad softint_schedule(sc->sc_si);
2069 1.115 explorer
2070 1.115 explorer #if NRND > 0 && defined(RND_COM)
2071 1.115 explorer rnd_add_uint32(&sc->rnd_source, iir | lsr);
2072 1.115 explorer #endif
2073 1.115 explorer
2074 1.88 mycroft return (1);
2075 1.1 cgd }
2076 1.1 cgd
2077 1.1 cgd /*
2078 1.102 thorpej * The following functions are polled getc and putc routines, shared
2079 1.102 thorpej * by the console and kgdb glue.
2080 1.232 perry *
2081 1.186 uwe * The read-ahead code is so that you can detect pending in-band
2082 1.186 uwe * cn_magic in polled mode while doing output rather than having to
2083 1.186 uwe * wait until the kernel decides it needs input.
2084 1.102 thorpej */
2085 1.102 thorpej
2086 1.186 uwe #define MAX_READAHEAD 20
2087 1.186 uwe static int com_readahead[MAX_READAHEAD];
2088 1.186 uwe static int com_readaheadcount = 0;
2089 1.174 jeffs
2090 1.102 thorpej int
2091 1.247 gdamore com_common_getc(dev_t dev, struct com_regs *regsp)
2092 1.102 thorpej {
2093 1.102 thorpej int s = splserial();
2094 1.102 thorpej u_char stat, c;
2095 1.102 thorpej
2096 1.174 jeffs /* got a character from reading things earlier */
2097 1.186 uwe if (com_readaheadcount > 0) {
2098 1.174 jeffs int i;
2099 1.174 jeffs
2100 1.186 uwe c = com_readahead[0];
2101 1.186 uwe for (i = 1; i < com_readaheadcount; i++) {
2102 1.186 uwe com_readahead[i-1] = com_readahead[i];
2103 1.174 jeffs }
2104 1.186 uwe com_readaheadcount--;
2105 1.174 jeffs splx(s);
2106 1.174 jeffs return (c);
2107 1.174 jeffs }
2108 1.174 jeffs
2109 1.135 thorpej /* block until a character becomes available */
2110 1.247 gdamore while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY))
2111 1.102 thorpej ;
2112 1.135 thorpej
2113 1.247 gdamore c = CSR_READ_1(regsp, COM_REG_RXDATA);
2114 1.247 gdamore stat = CSR_READ_1(regsp, COM_REG_IIR);
2115 1.186 uwe {
2116 1.186 uwe int cn_trapped = 0; /* unused */
2117 1.186 uwe #ifdef DDB
2118 1.174 jeffs extern int db_active;
2119 1.186 uwe if (!db_active)
2120 1.186 uwe #endif
2121 1.186 uwe cn_check_magic(dev, c, com_cnm_state);
2122 1.174 jeffs }
2123 1.102 thorpej splx(s);
2124 1.102 thorpej return (c);
2125 1.102 thorpej }
2126 1.102 thorpej
2127 1.289 dyoung static void
2128 1.247 gdamore com_common_putc(dev_t dev, struct com_regs *regsp, int c)
2129 1.102 thorpej {
2130 1.102 thorpej int s = splserial();
2131 1.204 simonb int cin, stat, timo;
2132 1.174 jeffs
2133 1.232 perry if (com_readaheadcount < MAX_READAHEAD
2134 1.247 gdamore && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) {
2135 1.186 uwe int cn_trapped = 0;
2136 1.247 gdamore cin = CSR_READ_1(regsp, COM_REG_RXDATA);
2137 1.247 gdamore stat = CSR_READ_1(regsp, COM_REG_IIR);
2138 1.186 uwe cn_check_magic(dev, cin, com_cnm_state);
2139 1.186 uwe com_readahead[com_readaheadcount++] = cin;
2140 1.174 jeffs }
2141 1.102 thorpej
2142 1.102 thorpej /* wait for any pending transmission to finish */
2143 1.161 ross timo = 150000;
2144 1.247 gdamore while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo)
2145 1.161 ross continue;
2146 1.135 thorpej
2147 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_TXDATA, c);
2148 1.247 gdamore COM_BARRIER(regsp, BR | BW);
2149 1.160 thorpej
2150 1.157 mycroft splx(s);
2151 1.102 thorpej }
2152 1.102 thorpej
2153 1.102 thorpej /*
2154 1.165 drochner * Initialize UART for use as console or KGDB line.
2155 1.99 mycroft */
2156 1.106 drochner int
2157 1.247 gdamore cominit(struct com_regs *regsp, int rate, int frequency, int type,
2158 1.247 gdamore tcflag_t cflag)
2159 1.1 cgd {
2160 1.106 drochner
2161 1.247 gdamore if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0,
2162 1.247 gdamore ®sp->cr_ioh))
2163 1.110 enami return (ENOMEM); /* ??? */
2164 1.1 cgd
2165 1.281 matt if (type == COM_TYPE_OMAP) {
2166 1.281 matt /* disable before changing settings */
2167 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
2168 1.281 matt }
2169 1.281 matt
2170 1.210 thorpej rate = comspeed(rate, frequency, type);
2171 1.247 gdamore if (type != COM_TYPE_AU1x00) {
2172 1.283 matt /* no EFR on alchemy */
2173 1.283 matt if (type != COM_TYPE_16550_NOERS) {
2174 1.283 matt CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
2175 1.283 matt CSR_WRITE_1(regsp, COM_REG_EFR, 0);
2176 1.283 matt }
2177 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB);
2178 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff);
2179 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8);
2180 1.247 gdamore } else {
2181 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_DLBL, rate);
2182 1.247 gdamore }
2183 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag));
2184 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
2185 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_FIFO,
2186 1.87 mycroft FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
2187 1.281 matt
2188 1.281 matt if (type == COM_TYPE_OMAP) {
2189 1.281 matt /* setup the fifos. the FCR value is not used as long
2190 1.281 matt as SCR[6] and SCR[7] are 0, which they are at reset
2191 1.281 matt and we never touch the SCR register */
2192 1.281 matt uint8_t rx_fifo_trig = 40;
2193 1.281 matt uint8_t tx_fifo_trig = 60;
2194 1.281 matt uint8_t rx_start = 8;
2195 1.281 matt uint8_t rx_halt = 60;
2196 1.281 matt uint8_t tlr_value = ((rx_fifo_trig>>2) << 4) | (tx_fifo_trig>>2);
2197 1.281 matt uint8_t tcr_value = ((rx_start>>2) << 4) | (rx_halt>>2);
2198 1.281 matt
2199 1.281 matt /* enable access to TCR & TLR */
2200 1.281 matt CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS | MCR_TCR_TLR);
2201 1.281 matt
2202 1.281 matt /* write tcr and tlr values */
2203 1.281 matt CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
2204 1.281 matt CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
2205 1.281 matt
2206 1.281 matt /* disable access to TCR & TLR */
2207 1.281 matt CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
2208 1.281 matt
2209 1.281 matt /* enable again, but mode is based on speed */
2210 1.281 matt if (rate > 230400) {
2211 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
2212 1.281 matt } else {
2213 1.281 matt CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
2214 1.281 matt }
2215 1.281 matt }
2216 1.281 matt
2217 1.212 bsh #ifdef COM_PXA2X0
2218 1.223 simonb if (type == COM_TYPE_PXA2x0)
2219 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
2220 1.221 simonb else
2221 1.212 bsh #endif
2222 1.247 gdamore CSR_WRITE_1(regsp, COM_REG_IER, 0);
2223 1.106 drochner
2224 1.110 enami return (0);
2225 1.99 mycroft }
2226 1.99 mycroft
2227 1.106 drochner int
2228 1.247 gdamore comcnattach1(struct com_regs *regsp, int rate, int frequency, int type,
2229 1.247 gdamore tcflag_t cflag)
2230 1.99 mycroft {
2231 1.106 drochner int res;
2232 1.106 drochner
2233 1.289 dyoung comcons_info.regs = *regsp;
2234 1.247 gdamore
2235 1.289 dyoung res = cominit(&comcons_info.regs, rate, frequency, type, cflag);
2236 1.110 enami if (res)
2237 1.110 enami return (res);
2238 1.106 drochner
2239 1.106 drochner cn_tab = &comcons;
2240 1.186 uwe cn_init_magic(&com_cnm_state);
2241 1.186 uwe cn_set_magic("\047\001"); /* default magic is BREAK */
2242 1.106 drochner
2243 1.289 dyoung comcons_info.frequency = frequency;
2244 1.289 dyoung comcons_info.type = type;
2245 1.289 dyoung comcons_info.rate = rate;
2246 1.289 dyoung comcons_info.cflag = cflag;
2247 1.99 mycroft
2248 1.110 enami return (0);
2249 1.1 cgd }
2250 1.1 cgd
2251 1.80 christos int
2252 1.247 gdamore comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency,
2253 1.247 gdamore int type, tcflag_t cflag)
2254 1.247 gdamore {
2255 1.247 gdamore struct com_regs regs;
2256 1.247 gdamore
2257 1.251 mrg memset(®s, 0, sizeof regs);
2258 1.247 gdamore regs.cr_iot = iot;
2259 1.247 gdamore regs.cr_iobase = iobase;
2260 1.247 gdamore regs.cr_nports = COM_NPORTS;
2261 1.247 gdamore #ifdef COM_REGMAP
2262 1.247 gdamore memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
2263 1.247 gdamore #endif
2264 1.247 gdamore
2265 1.247 gdamore return comcnattach1(®s, rate, frequency, type, cflag);
2266 1.247 gdamore }
2267 1.247 gdamore
2268 1.289 dyoung static int
2269 1.289 dyoung comcnreattach(void)
2270 1.289 dyoung {
2271 1.289 dyoung return comcnattach1(&comcons_info.regs, comcons_info.rate,
2272 1.289 dyoung comcons_info.frequency, comcons_info.type, comcons_info.cflag);
2273 1.289 dyoung }
2274 1.289 dyoung
2275 1.247 gdamore int
2276 1.197 simonb comcngetc(dev_t dev)
2277 1.1 cgd {
2278 1.197 simonb
2279 1.289 dyoung return (com_common_getc(dev, &comcons_info.regs));
2280 1.1 cgd }
2281 1.1 cgd
2282 1.1 cgd /*
2283 1.1 cgd * Console kernel output character routine.
2284 1.1 cgd */
2285 1.48 mycroft void
2286 1.197 simonb comcnputc(dev_t dev, int c)
2287 1.1 cgd {
2288 1.197 simonb
2289 1.289 dyoung com_common_putc(dev, &comcons_info.regs, c);
2290 1.37 mycroft }
2291 1.37 mycroft
2292 1.37 mycroft void
2293 1.256 christos comcnpollc(dev_t dev, int on)
2294 1.37 mycroft {
2295 1.37 mycroft
2296 1.106 drochner }
2297 1.106 drochner
2298 1.106 drochner #ifdef KGDB
2299 1.106 drochner int
2300 1.247 gdamore com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type,
2301 1.247 gdamore tcflag_t cflag)
2302 1.106 drochner {
2303 1.106 drochner int res;
2304 1.107 drochner
2305 1.297 dyoung if (bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
2306 1.289 dyoung regsp->cr_iobase == comcons_info.regs.cr_iobase) {
2307 1.206 briggs #if !defined(DDB)
2308 1.110 enami return (EBUSY); /* cannot share with console */
2309 1.206 briggs #else
2310 1.247 gdamore comkgdbregs = *regsp;
2311 1.289 dyoung comkgdbregs.cr_ioh = comcons_info.regs.cr_ioh;
2312 1.206 briggs #endif
2313 1.206 briggs } else {
2314 1.247 gdamore comkgdbregs = *regsp;
2315 1.247 gdamore res = cominit(&comkgdbregs, rate, frequency, type, cflag);
2316 1.206 briggs if (res)
2317 1.206 briggs return (res);
2318 1.190 fvdl
2319 1.206 briggs /*
2320 1.206 briggs * XXXfvdl this shouldn't be needed, but the cn_magic goo
2321 1.206 briggs * expects this to be initialized
2322 1.206 briggs */
2323 1.206 briggs cn_init_magic(&com_cnm_state);
2324 1.206 briggs cn_set_magic("\047\001");
2325 1.206 briggs }
2326 1.106 drochner
2327 1.106 drochner kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL);
2328 1.106 drochner kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2329 1.106 drochner
2330 1.247 gdamore return (0);
2331 1.247 gdamore }
2332 1.247 gdamore
2333 1.247 gdamore int
2334 1.247 gdamore com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate,
2335 1.247 gdamore int frequency, int type, tcflag_t cflag)
2336 1.247 gdamore {
2337 1.247 gdamore struct com_regs regs;
2338 1.247 gdamore
2339 1.247 gdamore regs.cr_iot = iot;
2340 1.247 gdamore regs.cr_nports = COM_NPORTS;
2341 1.247 gdamore regs.cr_iobase = iobase;
2342 1.247 gdamore #ifdef COM_REGMAP
2343 1.247 gdamore memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
2344 1.247 gdamore #endif
2345 1.106 drochner
2346 1.247 gdamore return com_kgdb_attach1(®s, rate, frequency, type, cflag);
2347 1.106 drochner }
2348 1.106 drochner
2349 1.106 drochner /* ARGSUSED */
2350 1.106 drochner int
2351 1.256 christos com_kgdb_getc(void *arg)
2352 1.106 drochner {
2353 1.197 simonb
2354 1.247 gdamore return (com_common_getc(NODEV, &comkgdbregs));
2355 1.106 drochner }
2356 1.106 drochner
2357 1.106 drochner /* ARGSUSED */
2358 1.106 drochner void
2359 1.256 christos com_kgdb_putc(void *arg, int c)
2360 1.106 drochner {
2361 1.197 simonb
2362 1.247 gdamore com_common_putc(NODEV, &comkgdbregs, c);
2363 1.106 drochner }
2364 1.106 drochner #endif /* KGDB */
2365 1.106 drochner
2366 1.106 drochner /* helper function to identify the com ports used by
2367 1.106 drochner console or KGDB (and not yet autoconf attached) */
2368 1.106 drochner int
2369 1.197 simonb com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh)
2370 1.106 drochner {
2371 1.106 drochner bus_space_handle_t help;
2372 1.106 drochner
2373 1.110 enami if (!comconsattached &&
2374 1.297 dyoung bus_space_is_equal(iot, comcons_info.regs.cr_iot) &&
2375 1.289 dyoung iobase == comcons_info.regs.cr_iobase)
2376 1.289 dyoung help = comcons_info.regs.cr_ioh;
2377 1.106 drochner #ifdef KGDB
2378 1.110 enami else if (!com_kgdb_attached &&
2379 1.297 dyoung bus_space_is_equal(iot, comkgdbregs.cr_iot) &&
2380 1.297 dyoung iobase == comkgdbregs.cr_iobase)
2381 1.247 gdamore help = comkgdbregs.cr_ioh;
2382 1.106 drochner #endif
2383 1.106 drochner else
2384 1.110 enami return (0);
2385 1.106 drochner
2386 1.110 enami if (ioh)
2387 1.110 enami *ioh = help;
2388 1.110 enami return (1);
2389 1.2 cgd }
2390 1.245 perry
2391 1.247 gdamore /*
2392 1.247 gdamore * this routine exists to serve as a shutdown hook for systems that
2393 1.247 gdamore * have firmware which doesn't interact properly with a com device in
2394 1.247 gdamore * FIFO mode.
2395 1.247 gdamore */
2396 1.273 dyoung bool
2397 1.273 dyoung com_cleanup(device_t self, int how)
2398 1.247 gdamore {
2399 1.273 dyoung struct com_softc *sc = device_private(self);
2400 1.247 gdamore
2401 1.247 gdamore if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
2402 1.247 gdamore CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0);
2403 1.273 dyoung
2404 1.273 dyoung return true;
2405 1.273 dyoung }
2406 1.273 dyoung
2407 1.273 dyoung bool
2408 1.295 dyoung com_suspend(device_t self, const pmf_qual_t *qual)
2409 1.273 dyoung {
2410 1.273 dyoung struct com_softc *sc = device_private(self);
2411 1.273 dyoung
2412 1.292 dyoung #if 0
2413 1.292 dyoung if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && cn_tab == &comcons)
2414 1.292 dyoung cn_tab = &comcons_suspend;
2415 1.292 dyoung #endif
2416 1.292 dyoung
2417 1.273 dyoung CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0);
2418 1.273 dyoung (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR);
2419 1.273 dyoung
2420 1.273 dyoung return true;
2421 1.247 gdamore }
2422 1.247 gdamore
2423 1.268 dyoung bool
2424 1.295 dyoung com_resume(device_t self, const pmf_qual_t *qual)
2425 1.245 perry {
2426 1.273 dyoung struct com_softc *sc = device_private(self);
2427 1.245 perry
2428 1.263 ad mutex_spin_enter(&sc->sc_lock);
2429 1.268 dyoung com_loadchannelregs(sc);
2430 1.263 ad mutex_spin_exit(&sc->sc_lock);
2431 1.268 dyoung
2432 1.268 dyoung return true;
2433 1.245 perry }
2434