com.c revision 1.101 1 /* $NetBSD: com.c,v 1.101 1997/06/15 11:18:59 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 1993, 1994, 1995, 1996, 1997
5 * Charles M. Hannum. All rights reserved.
6 *
7 * Interrupt processing and hardware flow control partly based on code from
8 * Onno van der Linden and Gordon Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Charles M. Hannum.
21 * 4. The name of the author may not be used to endorse or promote products
22 * derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 /*
37 * Copyright (c) 1991 The Regents of the University of California.
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. All advertising materials mentioning features or use of this software
49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
51 * California, Berkeley and its contributors.
52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * SUCH DAMAGE.
67 *
68 * @(#)com.c 7.5 (Berkeley) 5/16/91
69 */
70
71 /*
72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART
73 */
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/ioctl.h>
77 #include <sys/select.h>
78 #include <sys/tty.h>
79 #include <sys/proc.h>
80 #include <sys/user.h>
81 #include <sys/conf.h>
82 #include <sys/file.h>
83 #include <sys/uio.h>
84 #include <sys/kernel.h>
85 #include <sys/syslog.h>
86 #include <sys/types.h>
87 #include <sys/device.h>
88
89 #include <machine/intr.h>
90 #include <machine/bus.h>
91
92 #include <dev/isa/comreg.h>
93 #include <dev/isa/comvar.h>
94 #include <dev/ic/ns16550reg.h>
95 #ifdef COM_HAYESP
96 #include <dev/ic/hayespreg.h>
97 #endif
98 #define com_lcr com_cfcr
99
100 #include "com.h"
101
102 #ifdef COM_HAYESP
103 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
104 #endif
105 #ifdef KGDB
106 void com_kgdb_attach __P((struct com_softc *, bus_space_tag_t,
107 bus_space_handle_t));
108 #endif
109 void com_attach_subr __P((struct com_softc *sc));
110 void comdiag __P((void *));
111 int comspeed __P((long));
112 int comparam __P((struct tty *, struct termios *));
113 void comstart __P((struct tty *));
114 void comstop __P((struct tty *, int));
115 #ifdef __GENERIC_SOFT_INTERRUPTS
116 void comsoft __P((void *));
117 #else
118 #ifndef alpha
119 void comsoft __P((void));
120 #else
121 void comsoft __P((void *));
122 #endif
123 #endif
124 int comhwiflow __P((struct tty *, int));
125
126 void com_loadchannelregs __P((struct com_softc *));
127 void com_hwiflow __P((struct com_softc *));
128 void com_break __P((struct com_softc *, int));
129 void com_modem __P((struct com_softc *, int));
130 void com_iflush __P((struct com_softc *));
131
132 /* XXX: These belong elsewhere */
133 cdev_decl(com);
134 bdev_decl(com);
135
136 struct consdev;
137 void comcnprobe __P((struct consdev *));
138 void comcninit __P((struct consdev *));
139 int comcngetc __P((dev_t));
140 void comcnputc __P((dev_t, int));
141 void comcnpollc __P((dev_t, int));
142
143 #define integrate static inline
144 integrate void comrxint __P((struct com_softc *, struct tty *));
145 integrate void comtxint __P((struct com_softc *, struct tty *));
146 integrate void commsrint __P((struct com_softc *, struct tty *));
147 integrate void com_schedrx __P((struct com_softc *));
148
149 struct cfdriver com_cd = {
150 NULL, "com", DV_TTY
151 };
152
153 void cominitcons __P((bus_space_tag_t, bus_space_handle_t, int));
154
155 #ifdef CONSPEED
156 int comconsrate = CONSPEED;
157 #else
158 int comconsrate = TTYDEF_SPEED;
159 #endif
160 int comconsaddr;
161 int comconsattached;
162 bus_space_tag_t comconstag;
163 bus_space_handle_t comconsioh;
164 tcflag_t comconscflag = TTYDEF_CFLAG;
165
166 int commajor;
167
168 #ifndef __GENERIC_SOFT_INTERRUPTS
169 #ifdef alpha
170 volatile int com_softintr_scheduled;
171 #endif
172 #endif
173
174 #ifdef KGDB
175 #include <machine/remote-sl.h>
176 extern int kgdb_dev;
177 extern int kgdb_rate;
178 extern int kgdb_debug_init;
179 #endif
180
181 #define COMUNIT(x) (minor(x))
182
183 int
184 comspeed(speed)
185 long speed;
186 {
187 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
188
189 int x, err;
190
191 #if 0
192 if (speed == 0)
193 return (0);
194 #endif
195 if (speed <= 0)
196 return (-1);
197 x = divrnd((COM_FREQ / 16), speed);
198 if (x <= 0)
199 return (-1);
200 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
201 if (err < 0)
202 err = -err;
203 if (err > COM_TOLERANCE)
204 return (-1);
205 return (x);
206
207 #undef divrnd(n, q)
208 }
209
210 #ifdef COM_DEBUG
211 int com_debug = 0;
212
213 void comstatus __P((struct com_softc *, char *));
214 void
215 comstatus(sc, str)
216 struct com_softc *sc;
217 char *str;
218 {
219 struct tty *tp = sc->sc_tty;
220
221 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
222 sc->sc_dev.dv_xname, str,
223 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
224 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-",
225 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
226 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
227 sc->sc_tx_stopped ? "+" : "-");
228
229 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n",
230 sc->sc_dev.dv_xname, str,
231 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
232 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-",
233 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
234 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
235 sc->sc_rx_flags);
236 }
237 #endif
238
239 int
240 comprobe1(iot, ioh, iobase)
241 bus_space_tag_t iot;
242 bus_space_handle_t ioh;
243 int iobase;
244 {
245
246 /* force access to id reg */
247 bus_space_write_1(iot, ioh, com_lcr, 0);
248 bus_space_write_1(iot, ioh, com_iir, 0);
249 if (bus_space_read_1(iot, ioh, com_iir) & 0x38)
250 return (0);
251
252 return (1);
253 }
254
255 #ifdef COM_HAYESP
256 int
257 comprobeHAYESP(hayespioh, sc)
258 bus_space_handle_t hayespioh;
259 struct com_softc *sc;
260 {
261 char val, dips;
262 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
263 bus_space_tag_t iot = sc->sc_iot;
264
265 /*
266 * Hayes ESP cards have two iobases. One is for compatibility with
267 * 16550 serial chips, and at the same ISA PC base addresses. The
268 * other is for ESP-specific enhanced features, and lies at a
269 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300).
270 */
271
272 /* Test for ESP signature */
273 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
274 return (0);
275
276 /*
277 * ESP is present at ESP enhanced base address; unknown com port
278 */
279
280 /* Get the dip-switch configurations */
281 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
282 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
283
284 /* Determine which com port this ESP card services: bits 0,1 of */
285 /* dips is the port # (0-3); combaselist[val] is the com_iobase */
286 if (sc->sc_iobase != combaselist[dips & 0x03])
287 return (0);
288
289 printf(": ESP");
290
291 /* Check ESP Self Test bits. */
292 /* Check for ESP version 2.0: bits 4,5,6 == 010 */
293 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
294 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */
295 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
296 if ((val & 0x70) < 0x20) {
297 printf("-old (%o)", val & 0x70);
298 /* we do not support the necessary features */
299 return (0);
300 }
301
302 /* Check for ability to emulate 16550: bit 8 == 1 */
303 if ((dips & 0x80) == 0) {
304 printf(" slave");
305 /* XXX Does slave really mean no 16550 support?? */
306 return (0);
307 }
308
309 /*
310 * If we made it this far, we are a full-featured ESP v2.0 (or
311 * better), at the correct com port address.
312 */
313
314 SET(sc->sc_hwflags, COM_HW_HAYESP);
315 printf(", 1024 byte fifo\n");
316 return (1);
317 }
318 #endif
319
320 #ifdef KGDB
321 void
322 com_kgdb_attach(sc, iot, ioh)
323 struct com_softc *sc;
324 bus_space_tag_t iot;
325 bus_space_handle_t ioh;
326 {
327
328 if (kgdb_dev == makedev(commajor, unit)) {
329 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
330 kgdb_dev = -1; /* can't debug over console port */
331 else {
332 cominitcons(iot, ioh, kgdb_rate);
333 if (kgdb_debug_init) {
334 /*
335 * Print prefix of device name,
336 * let kgdb_connect print the rest.
337 */
338 printf("%s: ", sc->sc_dev.dv_xname);
339 kgdb_connect(1);
340 } else
341 printf("%s: kgdb enabled\n",
342 sc->sc_dev.dv_xname);
343 }
344 }
345 }
346 #endif
347
348
349 void
350 com_attach_subr(sc)
351 struct com_softc *sc;
352 {
353 int iobase = sc->sc_iobase;
354 bus_space_tag_t iot = sc->sc_iot;
355 bus_space_handle_t ioh = sc->sc_ioh;
356 #ifdef COM_HAYESP
357 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
358 int *hayespp;
359 #endif
360
361 if (iobase == comconsaddr) {
362 comconsattached = 1;
363
364 /* Make sure the console is always "hardwired". */
365 delay(1000); /* wait for output to finish */
366 SET(sc->sc_hwflags, COM_HW_CONSOLE);
367 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
368 }
369
370 #ifdef COM_HAYESP
371 /* Look for a Hayes ESP board. */
372 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
373 bus_space_handle_t hayespioh;
374
375 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */
376 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh))
377 continue;
378 if (comprobeHAYESP(hayespioh, sc)) {
379 sc->sc_hayespioh = hayespioh;
380 sc->sc_fifolen = 1024;
381
382 /* Set 16550 compatibility mode */
383 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
384 bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
385 HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
386 HAYESP_MODE_SCALE);
387
388 /* Set RTS/CTS flow control */
389 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
390 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
391 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
392
393 /* Set flow control levels */
394 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
396 HAYESP_HIBYTE(HAYESP_RXHIWMARK));
397 bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
398 HAYESP_LOBYTE(HAYESP_RXHIWMARK));
399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
400 HAYESP_HIBYTE(HAYESP_RXLOWMARK));
401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
402 HAYESP_LOBYTE(HAYESP_RXLOWMARK));
403
404 break;
405 }
406 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
407 }
408 /* No ESP; look for other things. */
409 if (*hayespp == 0) {
410 #endif
411
412 sc->sc_fifolen = 1;
413 /* look for a NS 16550AF UART with FIFOs */
414 bus_space_write_1(iot, ioh, com_fifo,
415 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
416 delay(100);
417 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK)
418 == IIR_FIFO_MASK)
419 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14)
420 == FIFO_TRIGGER_14) {
421 SET(sc->sc_hwflags, COM_HW_FIFO);
422 printf(": ns16550a, working fifo\n");
423 sc->sc_fifolen = 16;
424 } else
425 printf(": ns16550, broken fifo\n");
426 else
427 printf(": ns8250 or ns16450, no fifo\n");
428 bus_space_write_1(iot, ioh, com_fifo, 0);
429 #ifdef COM_HAYESP
430 }
431 #endif
432
433 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
434 SET(sc->sc_mcr, MCR_IENABLE);
435
436 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
437 cominit(iot, ioh, comconsrate);
438 printf("%s: console\n", sc->sc_dev.dv_xname);
439 }
440
441 #ifdef KGDB
442 com_kgdb_attach(sc, iot, ioh);
443 #endif
444
445 #ifdef __GENERIC_SOFT_INTERRUPTS
446 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc);
447 #endif
448 }
449
450 int
451 comopen(dev, flag, mode, p)
452 dev_t dev;
453 int flag, mode;
454 struct proc *p;
455 {
456 int unit = COMUNIT(dev);
457 struct com_softc *sc;
458 struct tty *tp;
459 int s, s2;
460 int error = 0;
461
462 if (unit >= com_cd.cd_ndevs)
463 return (ENXIO);
464 sc = com_cd.cd_devs[unit];
465 if (!sc)
466 return (ENXIO);
467
468 if (!sc->sc_tty) {
469 tp = sc->sc_tty = ttymalloc();
470 tty_attach(tp);
471 } else
472 tp = sc->sc_tty;
473
474 if (ISSET(tp->t_state, TS_ISOPEN) &&
475 ISSET(tp->t_state, TS_XCLUDE) &&
476 p->p_ucred->cr_uid != 0)
477 return (EBUSY);
478
479 s = spltty();
480
481 /* We need to set this early for the benefit of comsoft(). */
482 SET(tp->t_state, TS_WOPEN);
483
484 /*
485 * Do the following iff this is a first open.
486 */
487 if (!ISSET(tp->t_state, TS_ISOPEN)) {
488 struct termios t;
489
490 /* Turn on interrupts. */
491 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
492 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
493
494 /* Fetch the current modem control status, needed later. */
495 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr);
496
497 /* Add some entry points needed by the tty layer. */
498 tp->t_oproc = comstart;
499 tp->t_param = comparam;
500 tp->t_hwiflow = comhwiflow;
501 tp->t_dev = dev;
502
503 /*
504 * Initialize the termios status to the defaults. Add in the
505 * sticky bits from TIOCSFLAGS.
506 */
507 t.c_ispeed = 0;
508 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
509 t.c_ospeed = comconsrate;
510 t.c_cflag = comconscflag;
511 } else {
512 t.c_ospeed = TTYDEF_SPEED;
513 t.c_cflag = TTYDEF_CFLAG;
514 }
515 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
516 SET(t.c_cflag, CLOCAL);
517 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
518 SET(t.c_cflag, CRTSCTS);
519 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
520 SET(t.c_cflag, MDMBUF);
521 tp->t_iflag = TTYDEF_IFLAG;
522 tp->t_oflag = TTYDEF_OFLAG;
523 tp->t_lflag = TTYDEF_LFLAG;
524 ttychars(tp);
525 (void) comparam(tp, &t);
526 ttsetwater(tp);
527
528 s2 = splserial();
529
530 /*
531 * Turn on DTR. We must always do this, even if carrier is not
532 * present, because otherwise we'd have to use TIOCSDTR
533 * immediately after setting CLOCAL. We will drop DTR only on
534 * the next high-low transition of DCD, or by explicit request.
535 */
536 com_modem(sc, 1);
537
538 /* Clear the input ring, and unblock. */
539 sc->sc_rbput = sc->sc_rbget = 0;
540 sc->sc_rbavail = RXBUFSIZE;
541 com_iflush(sc);
542 CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
543 com_hwiflow(sc);
544
545 #ifdef COM_DEBUG
546 if (com_debug)
547 comstatus(sc, "comopen ");
548 #endif
549
550 splx(s2);
551 }
552 error = 0;
553
554 /* If we're doing a blocking open... */
555 if (!ISSET(flag, O_NONBLOCK))
556 /* ...then wait for carrier. */
557 while (!ISSET(tp->t_state, TS_CARR_ON) &&
558 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) {
559 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
560 ttopen, 0);
561 if (error) {
562 /*
563 * If the open was interrupted and nobody
564 * else has the device open, then hang up.
565 */
566 if (!ISSET(tp->t_state, TS_ISOPEN)) {
567 com_modem(sc, 0);
568 CLR(tp->t_state, TS_WOPEN);
569 ttwakeup(tp);
570 }
571 break;
572 }
573 SET(tp->t_state, TS_WOPEN);
574 }
575
576 splx(s);
577 if (error == 0)
578 error = (*linesw[tp->t_line].l_open)(dev, tp);
579 return (error);
580 }
581
582 int
583 comclose(dev, flag, mode, p)
584 dev_t dev;
585 int flag, mode;
586 struct proc *p;
587 {
588 int unit = COMUNIT(dev);
589 struct com_softc *sc = com_cd.cd_devs[unit];
590 struct tty *tp = sc->sc_tty;
591 int s;
592
593 /* XXX This is for cons.c. */
594 if (!ISSET(tp->t_state, TS_ISOPEN))
595 return (0);
596
597 (*linesw[tp->t_line].l_close)(tp, flag);
598 ttyclose(tp);
599
600 /* If we were asserting flow control, then deassert it. */
601 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
602 com_hwiflow(sc);
603 /* Clear any break condition set with TIOCSBRK. */
604 com_break(sc, 0);
605 /*
606 * Hang up if necessary. Wait a bit, so the other side has time to
607 * notice even if we immediately open the port again.
608 */
609 if (ISSET(tp->t_cflag, HUPCL)) {
610 com_modem(sc, 0);
611 (void) tsleep(sc, TTIPRI, ttclos, hz);
612 }
613
614 s = splserial();
615 /* Turn off interrupts. */
616 sc->sc_ier = 0;
617 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
618 splx(s);
619
620 return (0);
621 }
622
623 int
624 comread(dev, uio, flag)
625 dev_t dev;
626 struct uio *uio;
627 int flag;
628 {
629 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
630 struct tty *tp = sc->sc_tty;
631
632 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
633 }
634
635 int
636 comwrite(dev, uio, flag)
637 dev_t dev;
638 struct uio *uio;
639 int flag;
640 {
641 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
642 struct tty *tp = sc->sc_tty;
643
644 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
645 }
646
647 struct tty *
648 comtty(dev)
649 dev_t dev;
650 {
651 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
652 struct tty *tp = sc->sc_tty;
653
654 return (tp);
655 }
656
657 int
658 comioctl(dev, cmd, data, flag, p)
659 dev_t dev;
660 u_long cmd;
661 caddr_t data;
662 int flag;
663 struct proc *p;
664 {
665 int unit = COMUNIT(dev);
666 struct com_softc *sc = com_cd.cd_devs[unit];
667 struct tty *tp = sc->sc_tty;
668 int error;
669
670 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
671 if (error >= 0)
672 return (error);
673
674 error = ttioctl(tp, cmd, data, flag, p);
675 if (error >= 0)
676 return (error);
677
678 switch (cmd) {
679 case TIOCSBRK:
680 com_break(sc, 1);
681 break;
682
683 case TIOCCBRK:
684 com_break(sc, 0);
685 break;
686
687 case TIOCSDTR:
688 com_modem(sc, 1);
689 break;
690
691 case TIOCCDTR:
692 com_modem(sc, 0);
693 break;
694
695 case TIOCGFLAGS:
696 *(int *)data = sc->sc_swflags;
697 break;
698
699 case TIOCSFLAGS:
700 error = suser(p->p_ucred, &p->p_acflag);
701 if (error)
702 return (error);
703 sc->sc_swflags = *(int *)data;
704 break;
705
706 case TIOCMSET:
707 case TIOCMBIS:
708 case TIOCMBIC:
709 case TIOCMGET:
710 default:
711 return (ENOTTY);
712 }
713
714 #ifdef COM_DEBUG
715 if (com_debug)
716 comstatus(sc, "comioctl ");
717 #endif
718
719 return (0);
720 }
721
722 integrate void
723 com_schedrx(sc)
724 struct com_softc *sc;
725 {
726
727 sc->sc_rx_ready = 1;
728
729 /* Wake up the poller. */
730 #ifdef __GENERIC_SOFT_INTERRUPTS
731 softintr_schedule(sc->sc_si);
732 #else
733 #ifndef alpha
734 setsoftserial();
735 #else
736 if (!com_softintr_scheduled) {
737 com_softintr_scheduled = 1;
738 timeout(comsoft, NULL, 1);
739 }
740 #endif
741 #endif
742 }
743
744 void
745 com_break(sc, onoff)
746 struct com_softc *sc;
747 int onoff;
748 {
749 int s;
750
751 s = splserial();
752 if (onoff)
753 SET(sc->sc_lcr, LCR_SBREAK);
754 else
755 CLR(sc->sc_lcr, LCR_SBREAK);
756
757 if (!sc->sc_heldchange) {
758 if (sc->sc_tx_busy) {
759 sc->sc_heldtbc = sc->sc_tbc;
760 sc->sc_tbc = 0;
761 sc->sc_heldchange = 1;
762 } else
763 com_loadchannelregs(sc);
764 }
765 splx(s);
766 }
767
768 void
769 com_modem(sc, onoff)
770 struct com_softc *sc;
771 int onoff;
772 {
773 int s;
774
775 s = splserial();
776 if (onoff)
777 SET(sc->sc_mcr, sc->sc_mcr_dtr);
778 else
779 CLR(sc->sc_mcr, sc->sc_mcr_dtr);
780
781 if (!sc->sc_heldchange) {
782 if (sc->sc_tx_busy) {
783 sc->sc_heldtbc = sc->sc_tbc;
784 sc->sc_tbc = 0;
785 sc->sc_heldchange = 1;
786 } else
787 com_loadchannelregs(sc);
788 }
789 splx(s);
790 }
791
792 int
793 comparam(tp, t)
794 struct tty *tp;
795 struct termios *t;
796 {
797 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
798 int ospeed = comspeed(t->c_ospeed);
799 u_char lcr;
800 int s;
801
802 /* check requested parameters */
803 if (ospeed < 0)
804 return (EINVAL);
805 if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
806 return (EINVAL);
807
808 lcr = ISSET(sc->sc_lcr, LCR_SBREAK);
809
810 switch (ISSET(t->c_cflag, CSIZE)) {
811 case CS5:
812 SET(lcr, LCR_5BITS);
813 break;
814 case CS6:
815 SET(lcr, LCR_6BITS);
816 break;
817 case CS7:
818 SET(lcr, LCR_7BITS);
819 break;
820 case CS8:
821 SET(lcr, LCR_8BITS);
822 break;
823 }
824 if (ISSET(t->c_cflag, PARENB)) {
825 SET(lcr, LCR_PENAB);
826 if (!ISSET(t->c_cflag, PARODD))
827 SET(lcr, LCR_PEVEN);
828 }
829 if (ISSET(t->c_cflag, CSTOPB))
830 SET(lcr, LCR_STOPB);
831
832 s = splserial();
833
834 sc->sc_lcr = lcr;
835
836 /*
837 * For the console, always force CLOCAL and !HUPCL, so that the port
838 * is always active.
839 */
840 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
841 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
842 SET(t->c_cflag, CLOCAL);
843 CLR(t->c_cflag, HUPCL);
844 }
845
846 /*
847 * If we're not in a mode that assumes a connection is present, then
848 * ignore carrier changes.
849 */
850 if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
851 sc->sc_msr_dcd = 0;
852 else
853 sc->sc_msr_dcd = MSR_DCD;
854 /*
855 * Set the flow control pins depending on the current flow control
856 * mode.
857 */
858 if (ISSET(t->c_cflag, CRTSCTS)) {
859 sc->sc_mcr_dtr = MCR_DTR;
860 sc->sc_mcr_rts = MCR_RTS;
861 sc->sc_msr_cts = MSR_CTS;
862 sc->sc_r_hiwat = RXHIWAT;
863 sc->sc_r_lowat = RXLOWAT;
864 } else if (ISSET(t->c_cflag, MDMBUF)) {
865 /*
866 * For DTR/DCD flow control, make sure we don't toggle DTR for
867 * carrier detection.
868 */
869 sc->sc_mcr_dtr = 0;
870 sc->sc_mcr_rts = MCR_DTR;
871 sc->sc_msr_cts = MSR_DCD;
872 sc->sc_r_hiwat = RXHIWAT;
873 sc->sc_r_lowat = RXLOWAT;
874 } else {
875 /*
876 * If no flow control, then always set RTS. This will make
877 * the other side happy if it mistakenly thinks we're doing
878 * RTS/CTS flow control.
879 */
880 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
881 sc->sc_mcr_rts = 0;
882 sc->sc_msr_cts = 0;
883 sc->sc_r_hiwat = 0;
884 sc->sc_r_lowat = 0;
885 if (ISSET(sc->sc_mcr, MCR_DTR))
886 SET(sc->sc_mcr, MCR_RTS);
887 else
888 CLR(sc->sc_mcr, MCR_RTS);
889 }
890 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
891
892 #if 0
893 if (ospeed == 0)
894 CLR(sc->sc_mcr, sc->sc_mcr_dtr);
895 else
896 SET(sc->sc_mcr, sc->sc_mcr_dtr);
897 #endif
898
899 sc->sc_dlbl = ospeed;
900 sc->sc_dlbh = ospeed >> 8;
901
902 /*
903 * Set the FIFO threshold based on the receive speed.
904 *
905 * * If it's a low speed, it's probably a mouse or some other
906 * interactive device, so set the threshold low.
907 * * If it's a high speed, trim the trigger level down to prevent
908 * overflows.
909 * * Otherwise set it a bit higher.
910 */
911 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP))
912 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
913 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
914 sc->sc_fifo = FIFO_ENABLE |
915 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
916 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
917 else
918 sc->sc_fifo = 0;
919
920 /* and copy to tty */
921 tp->t_ispeed = 0;
922 tp->t_ospeed = t->c_ospeed;
923 tp->t_cflag = t->c_cflag;
924
925 if (!sc->sc_heldchange) {
926 if (sc->sc_tx_busy) {
927 sc->sc_heldtbc = sc->sc_tbc;
928 sc->sc_tbc = 0;
929 sc->sc_heldchange = 1;
930 } else
931 com_loadchannelregs(sc);
932 }
933
934 splx(s);
935
936 /*
937 * Update the tty layer's idea of the carrier bit, in case we changed
938 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we
939 * lose carrier while carrier detection is on.
940 */
941 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
942
943 #ifdef COM_DEBUG
944 if (com_debug)
945 comstatus(sc, "comparam ");
946 #endif
947
948 /* Block or unblock as needed. */
949 if (!ISSET(t->c_cflag, CHWFLOW)) {
950 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
951 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
952 com_schedrx(sc);
953 }
954 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
955 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
956 com_hwiflow(sc);
957 }
958 if (sc->sc_tx_stopped) {
959 sc->sc_tx_stopped = 0;
960 comstart(tp);
961 }
962 } else {
963 /* XXXXX FIX ME */
964 #if 0
965 commsrint(sc, tp);
966 #endif
967 }
968
969 return (0);
970 }
971
972 void
973 com_iflush(sc)
974 struct com_softc *sc;
975 {
976 bus_space_tag_t iot = sc->sc_iot;
977 bus_space_handle_t ioh = sc->sc_ioh;
978
979 /* flush any pending I/O */
980 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
981 (void) bus_space_read_1(iot, ioh, com_data);
982 }
983
984 void
985 com_loadchannelregs(sc)
986 struct com_softc *sc;
987 {
988 bus_space_tag_t iot = sc->sc_iot;
989 bus_space_handle_t ioh = sc->sc_ioh;
990
991 /* XXXXX necessary? */
992 com_iflush(sc);
993
994 bus_space_write_1(iot, ioh, com_ier, 0);
995
996 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB);
997 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl);
998 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh);
999 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
1000 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr);
1001 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo);
1002
1003 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1004 }
1005
1006 int
1007 comhwiflow(tp, block)
1008 struct tty *tp;
1009 int block;
1010 {
1011 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1012 int s;
1013
1014 if (sc->sc_mcr_rts == 0)
1015 return (0);
1016
1017 s = splserial();
1018 if (block) {
1019 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1020 SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1021 com_hwiflow(sc);
1022 }
1023 } else {
1024 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1025 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1026 com_schedrx(sc);
1027 }
1028 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1029 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1030 com_hwiflow(sc);
1031 }
1032 }
1033 splx(s);
1034 return (1);
1035 }
1036
1037 /*
1038 * (un)block input via hw flowcontrol
1039 */
1040 void
1041 com_hwiflow(sc)
1042 struct com_softc *sc;
1043 {
1044 bus_space_tag_t iot = sc->sc_iot;
1045 bus_space_handle_t ioh = sc->sc_ioh;
1046
1047 if (sc->sc_mcr_rts == 0)
1048 return;
1049
1050 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1051 CLR(sc->sc_mcr, sc->sc_mcr_rts);
1052 CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1053 } else {
1054 SET(sc->sc_mcr, sc->sc_mcr_rts);
1055 SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1056 }
1057 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active);
1058 }
1059
1060
1061 void
1062 comstart(tp)
1063 struct tty *tp;
1064 {
1065 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1066 bus_space_tag_t iot = sc->sc_iot;
1067 bus_space_handle_t ioh = sc->sc_ioh;
1068 int s;
1069
1070 s = spltty();
1071 if (ISSET(tp->t_state, TS_BUSY))
1072 goto out;
1073 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP))
1074 goto stopped;
1075
1076 if (sc->sc_tx_stopped)
1077 goto stopped;
1078
1079 if (tp->t_outq.c_cc <= tp->t_lowat) {
1080 if (ISSET(tp->t_state, TS_ASLEEP)) {
1081 CLR(tp->t_state, TS_ASLEEP);
1082 wakeup(&tp->t_outq);
1083 }
1084 selwakeup(&tp->t_wsel);
1085 if (tp->t_outq.c_cc == 0)
1086 goto stopped;
1087 }
1088
1089 /* Grab the first contiguous region of buffer space. */
1090 {
1091 u_char *tba;
1092 int tbc;
1093
1094 tba = tp->t_outq.c_cf;
1095 tbc = ndqb(&tp->t_outq, 0);
1096
1097 (void)splserial();
1098
1099 sc->sc_tba = tba;
1100 sc->sc_tbc = tbc;
1101 }
1102
1103 SET(tp->t_state, TS_BUSY);
1104 sc->sc_tx_busy = 1;
1105
1106 /* Enable transmit completion interrupts if necessary. */
1107 if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
1108 SET(sc->sc_ier, IER_ETXRDY);
1109 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1110 }
1111
1112 /* Output the first chunk of the contiguous buffer. */
1113 {
1114 int n;
1115
1116 n = sc->sc_fifolen;
1117 if (n > sc->sc_tbc)
1118 n = sc->sc_tbc;
1119 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
1120 sc->sc_tbc -= n;
1121 sc->sc_tba += n;
1122 }
1123 splx(s);
1124 return;
1125
1126 stopped:
1127 /* Disable transmit completion interrupts if necessary. */
1128 if (ISSET(sc->sc_ier, IER_ETXRDY)) {
1129 CLR(sc->sc_ier, IER_ETXRDY);
1130 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1131 }
1132 out:
1133 splx(s);
1134 return;
1135 }
1136
1137 /*
1138 * Stop output on a line.
1139 */
1140 void
1141 comstop(tp, flag)
1142 struct tty *tp;
1143 int flag;
1144 {
1145 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1146 int s;
1147
1148 s = splserial();
1149 if (ISSET(tp->t_state, TS_BUSY)) {
1150 /* Stop transmitting at the next chunk. */
1151 sc->sc_tbc = 0;
1152 sc->sc_heldtbc = 0;
1153 if (!ISSET(tp->t_state, TS_TTSTOP))
1154 SET(tp->t_state, TS_FLUSH);
1155 }
1156 splx(s);
1157 }
1158
1159 void
1160 comdiag(arg)
1161 void *arg;
1162 {
1163 struct com_softc *sc = arg;
1164 int overflows, floods;
1165 int s;
1166
1167 s = splserial();
1168 overflows = sc->sc_overflows;
1169 sc->sc_overflows = 0;
1170 floods = sc->sc_floods;
1171 sc->sc_floods = 0;
1172 sc->sc_errors = 0;
1173 splx(s);
1174
1175 log(LOG_WARNING,
1176 "%s: %d silo overflow%s, %d ibuf flood%s\n",
1177 sc->sc_dev.dv_xname,
1178 overflows, overflows == 1 ? "" : "s",
1179 floods, floods == 1 ? "" : "s");
1180 }
1181
1182 integrate void
1183 comrxint(sc, tp)
1184 struct com_softc *sc;
1185 struct tty *tp;
1186 {
1187 u_int get, cc, scc;
1188 int code;
1189 u_char lsr;
1190 int s;
1191 static int lsrmap[8] = {
1192 0, TTY_PE,
1193 TTY_FE, TTY_PE|TTY_FE,
1194 TTY_FE, TTY_PE|TTY_FE,
1195 TTY_FE, TTY_PE|TTY_FE
1196 };
1197
1198 get = sc->sc_rbget;
1199 scc = cc = RXBUFSIZE - sc->sc_rbavail;
1200
1201 if (cc == RXBUFSIZE) {
1202 sc->sc_floods++;
1203 if (sc->sc_errors++ == 0)
1204 timeout(comdiag, sc, 60 * hz);
1205 }
1206
1207 while (cc) {
1208 lsr = sc->sc_lbuf[get];
1209 if (ISSET(lsr, LSR_BI)) {
1210 #ifdef DDB
1211 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
1212 Debugger();
1213 #endif
1214 }
1215 else if (ISSET(lsr, LSR_OE)) {
1216 sc->sc_overflows++;
1217 if (sc->sc_errors++ == 0)
1218 timeout(comdiag, sc, 60 * hz);
1219 }
1220 code = sc->sc_rbuf[get] |
1221 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2];
1222 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) {
1223 /*
1224 * The line discipline's buffer is out of space.
1225 */
1226 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1227 /*
1228 * We're either not using flow control, or the
1229 * line discipline didn't tell us to block for
1230 * some reason. Either way, we have no way to
1231 * know when there's more space available, so
1232 * just drop the rest of the data.
1233 */
1234 get = (get + cc) & RXBUFMASK;
1235 cc = 0;
1236 } else {
1237 /*
1238 * Don't schedule any more receive processing
1239 * until the line discipline tells us there's
1240 * space available (through comhwiflow()).
1241 * Leave the rest of the data in the input
1242 * buffer.
1243 */
1244 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1245 }
1246 break;
1247 }
1248 get = (get + 1) & RXBUFMASK;
1249 cc--;
1250 }
1251
1252 if (cc != scc) {
1253 sc->sc_rbget = get;
1254 s = splserial();
1255 cc = sc->sc_rbavail += scc - cc;
1256 /* Buffers should be ok again, release possible block. */
1257 if (cc >= sc->sc_r_lowat) {
1258 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1259 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1260 SET(sc->sc_ier, IER_ERXRDY);
1261 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
1262 }
1263 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1264 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1265 com_hwiflow(sc);
1266 }
1267 }
1268 splx(s);
1269 }
1270 }
1271
1272 integrate void
1273 comtxint(sc, tp)
1274 struct com_softc *sc;
1275 struct tty *tp;
1276 {
1277
1278 CLR(tp->t_state, TS_BUSY);
1279 if (ISSET(tp->t_state, TS_FLUSH))
1280 CLR(tp->t_state, TS_FLUSH);
1281 else
1282 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1283 (*linesw[tp->t_line].l_start)(tp);
1284 }
1285
1286 integrate void
1287 commsrint(sc, tp)
1288 struct com_softc *sc;
1289 struct tty *tp;
1290 {
1291 u_char msr, delta;
1292 int s;
1293
1294 s = splserial();
1295 msr = sc->sc_msr;
1296 delta = sc->sc_msr_delta;
1297 sc->sc_msr_delta = 0;
1298 splx(s);
1299
1300 if (ISSET(delta, sc->sc_msr_dcd)) {
1301 /*
1302 * Inform the tty layer that carrier detect changed.
1303 */
1304 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD));
1305 }
1306
1307 if (ISSET(delta, sc->sc_msr_cts)) {
1308 /* Block or unblock output according to flow control. */
1309 if (ISSET(msr, sc->sc_msr_cts)) {
1310 sc->sc_tx_stopped = 0;
1311 (*linesw[tp->t_line].l_start)(tp);
1312 } else {
1313 sc->sc_tx_stopped = 1;
1314 }
1315 }
1316
1317 #ifdef COM_DEBUG
1318 if (com_debug)
1319 comstatus(sc, "commsrint");
1320 #endif
1321 }
1322
1323 #ifdef __GENERIC_SOFT_INTERRUPTS
1324 void
1325 comsoft(arg)
1326 void *arg;
1327 {
1328 struct com_softc *sc = arg;
1329 struct tty *tp;
1330
1331 {
1332 #else
1333 void
1334 #ifndef alpha
1335 comsoft()
1336 #else
1337 comsoft(arg)
1338 void *arg;
1339 #endif
1340 {
1341 struct com_softc *sc;
1342 struct tty *tp;
1343 int unit;
1344 #ifdef alpha
1345 int s;
1346
1347 s = splsoftserial();
1348 com_softintr_scheduled = 0;
1349 #endif
1350
1351 for (unit = 0; unit < com_cd.cd_ndevs; unit++) {
1352 sc = com_cd.cd_devs[unit];
1353 if (sc == NULL)
1354 continue;
1355 #endif
1356
1357 tp = sc->sc_tty;
1358 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN))
1359 continue;
1360
1361 if (sc->sc_rx_ready) {
1362 sc->sc_rx_ready = 0;
1363 comrxint(sc, tp);
1364 }
1365
1366 if (sc->sc_st_check) {
1367 sc->sc_st_check = 0;
1368 commsrint(sc, tp);
1369 }
1370
1371 if (sc->sc_tx_done) {
1372 sc->sc_tx_done = 0;
1373 comtxint(sc, tp);
1374 }
1375 }
1376
1377 #ifndef __GENERIC_SOFT_INTERRUPTS
1378 #ifdef alpha
1379 splx(s);
1380 #endif
1381 #endif
1382 }
1383
1384 int
1385 comintr(arg)
1386 void *arg;
1387 {
1388 struct com_softc *sc = arg;
1389 bus_space_tag_t iot = sc->sc_iot;
1390 bus_space_handle_t ioh = sc->sc_ioh;
1391 u_char lsr, iir;
1392 u_int put, cc;
1393
1394 iir = bus_space_read_1(iot, ioh, com_iir);
1395 if (ISSET(iir, IIR_NOPEND))
1396 return (0);
1397
1398 put = sc->sc_rbput;
1399 cc = sc->sc_rbavail;
1400
1401 do {
1402 u_char msr, delta;
1403
1404 lsr = bus_space_read_1(iot, ioh, com_lsr);
1405 if (ISSET(lsr, LSR_RCV_MASK) &&
1406 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1407 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) {
1408 sc->sc_rbuf[put] =
1409 bus_space_read_1(iot, ioh, com_data);
1410 sc->sc_lbuf[put] = lsr;
1411 put = (put + 1) & RXBUFMASK;
1412 lsr = bus_space_read_1(iot, ioh, com_lsr);
1413 }
1414 /*
1415 * Current string of incoming characters ended because
1416 * no more data was available. Schedule a receive event
1417 * if any data was received. Drop any characters that
1418 * we couldn't handle.
1419 */
1420 sc->sc_rbput = put;
1421 sc->sc_rbavail = cc;
1422 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1423 sc->sc_rx_ready = 1;
1424 /*
1425 * See if we are in danger of overflowing a buffer. If
1426 * so, use hardware flow control to ease the pressure.
1427 */
1428 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1429 cc < sc->sc_r_hiwat) {
1430 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1431 com_hwiflow(sc);
1432 }
1433 /*
1434 * If we're out of space, disable receive interrupts
1435 * until the queue has drained a bit.
1436 */
1437 if (!cc) {
1438 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1439 CLR(sc->sc_ier, IER_ERXRDY);
1440 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1441 }
1442 } else {
1443 if ((iir & IIR_IMASK) == IIR_RXRDY) {
1444 bus_space_write_1(iot, ioh, com_ier, 0);
1445 delay(10);
1446 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier);
1447 iir = IIR_NOPEND;
1448 continue;
1449 }
1450 }
1451
1452 msr = bus_space_read_1(iot, ioh, com_msr);
1453 delta = msr ^ sc->sc_msr;
1454 sc->sc_msr = msr;
1455 if (ISSET(delta, sc->sc_msr_mask)) {
1456 sc->sc_msr_delta |= delta;
1457
1458 /*
1459 * Stop output immediately if we lose the output
1460 * flow control signal or carrier detect.
1461 */
1462 if (ISSET(~msr, sc->sc_msr_mask)) {
1463 sc->sc_tbc = 0;
1464 sc->sc_heldtbc = 0;
1465 #ifdef COM_DEBUG
1466 if (com_debug)
1467 comstatus(sc, "comintr ");
1468 #endif
1469 }
1470
1471 sc->sc_st_check = 1;
1472 }
1473 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND));
1474
1475 /*
1476 * Done handling any receive interrupts. See if data can be
1477 * transmitted as well. Schedule tx done event if no data left
1478 * and tty was marked busy.
1479 */
1480 if (ISSET(lsr, LSR_TXRDY)) {
1481 /*
1482 * If we've delayed a parameter change, do it now, and restart
1483 * output.
1484 */
1485 if (sc->sc_heldchange) {
1486 com_loadchannelregs(sc);
1487 sc->sc_heldchange = 0;
1488 sc->sc_tbc = sc->sc_heldtbc;
1489 sc->sc_heldtbc = 0;
1490 }
1491 /* Output the next chunk of the contiguous buffer, if any. */
1492 if (sc->sc_tbc > 0) {
1493 int n;
1494
1495 n = sc->sc_fifolen;
1496 if (n > sc->sc_tbc)
1497 n = sc->sc_tbc;
1498 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
1499 sc->sc_tbc -= n;
1500 sc->sc_tba += n;
1501 } else if (sc->sc_tx_busy) {
1502 sc->sc_tx_busy = 0;
1503 sc->sc_tx_done = 1;
1504 }
1505 }
1506
1507 /* Wake up the poller. */
1508 #ifdef __GENERIC_SOFT_INTERRUPTS
1509 softintr_schedule(sc->sc_si);
1510 #else
1511 #ifndef alpha
1512 setsoftserial();
1513 #else
1514 if (!com_softintr_scheduled) {
1515 com_softintr_scheduled = 1;
1516 timeout(comsoft, NULL, 1);
1517 }
1518 #endif
1519 #endif
1520 return (1);
1521 }
1522
1523 /*
1524 * Following are all routines needed for COM to act as console
1525 */
1526 #include <dev/cons.h>
1527
1528 void
1529 comcnprobe(cp)
1530 struct consdev *cp;
1531 {
1532 /* XXX NEEDS TO BE FIXED XXX */
1533 bus_space_tag_t iot = 0;
1534 bus_space_handle_t ioh;
1535 int found;
1536
1537 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) {
1538 cp->cn_pri = CN_DEAD;
1539 return;
1540 }
1541 found = comprobe1(iot, ioh, CONADDR);
1542 bus_space_unmap(iot, ioh, COM_NPORTS);
1543 if (!found) {
1544 cp->cn_pri = CN_DEAD;
1545 return;
1546 }
1547
1548 /* locate the major number */
1549 for (commajor = 0; commajor < nchrdev; commajor++)
1550 if (cdevsw[commajor].d_open == comopen)
1551 break;
1552
1553 /* initialize required fields */
1554 cp->cn_dev = makedev(commajor, CONUNIT);
1555 #ifdef COMCONSOLE
1556 cp->cn_pri = CN_REMOTE; /* Force a serial port console */
1557 #else
1558 cp->cn_pri = CN_NORMAL;
1559 #endif
1560 }
1561
1562 void
1563 comcninit(cp)
1564 struct consdev *cp;
1565 {
1566
1567 #if 0
1568 XXX NEEDS TO BE FIXED XXX
1569 comconstag = ???;
1570 #endif
1571 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsioh))
1572 panic("comcninit: mapping failed");
1573
1574 cominitcons(comconstag, comconsioh, comconsrate);
1575 comconsaddr = CONADDR;
1576 }
1577
1578 /*
1579 * Initialize UART to known state.
1580 */
1581 void
1582 cominit(iot, ioh, rate)
1583 bus_space_tag_t iot;
1584 bus_space_handle_t ioh;
1585 int rate;
1586 {
1587
1588 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
1589 rate = comspeed(rate);
1590 bus_space_write_1(iot, ioh, com_dlbl, rate);
1591 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
1592 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
1593 bus_space_write_1(iot, ioh, com_mcr, 0);
1594 bus_space_write_1(iot, ioh, com_fifo,
1595 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
1596 bus_space_write_1(iot, ioh, com_ier, 0);
1597 }
1598
1599 /*
1600 * Set UART for console use. Do normal init, then enable interrupts.
1601 */
1602 void
1603 cominitcons(iot, ioh, rate)
1604 bus_space_tag_t iot;
1605 bus_space_handle_t ioh;
1606 int rate;
1607 {
1608 int s = splserial();
1609 u_char stat;
1610
1611 cominit(iot, ioh, rate);
1612 bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
1613 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS);
1614 DELAY(100);
1615 stat = bus_space_read_1(iot, ioh, com_iir);
1616 splx(s);
1617 }
1618
1619 int
1620 comcngetc(dev)
1621 dev_t dev;
1622 {
1623 int s = splserial();
1624 bus_space_tag_t iot = comconstag;
1625 bus_space_handle_t ioh = comconsioh;
1626 u_char stat, c;
1627
1628 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
1629 ;
1630 c = bus_space_read_1(iot, ioh, com_data);
1631 stat = bus_space_read_1(iot, ioh, com_iir);
1632 splx(s);
1633 return (c);
1634 }
1635
1636 /*
1637 * Console kernel output character routine.
1638 */
1639 void
1640 comcnputc(dev, c)
1641 dev_t dev;
1642 int c;
1643 {
1644 int s = splserial();
1645 bus_space_tag_t iot = comconstag;
1646 bus_space_handle_t ioh = comconsioh;
1647 u_char stat;
1648 register int timo;
1649
1650 /* wait for any pending transmission to finish */
1651 timo = 50000;
1652 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
1653 ;
1654 bus_space_write_1(iot, ioh, com_data, c);
1655 /* wait for this transmission to complete */
1656 timo = 1500000;
1657 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
1658 ;
1659 /* clear any interrupts generated by this transmission */
1660 stat = bus_space_read_1(iot, ioh, com_iir);
1661 splx(s);
1662 }
1663
1664 void
1665 comcnpollc(dev, on)
1666 dev_t dev;
1667 int on;
1668 {
1669
1670 }
1671