com.c revision 1.103
1 /* $NetBSD: com.c,v 1.103 1997/08/12 17:25:43 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 */ 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/ioctl.h> 77 #include <sys/select.h> 78 #include <sys/tty.h> 79 #include <sys/proc.h> 80 #include <sys/user.h> 81 #include <sys/conf.h> 82 #include <sys/file.h> 83 #include <sys/uio.h> 84 #include <sys/kernel.h> 85 #include <sys/syslog.h> 86 #include <sys/types.h> 87 #include <sys/device.h> 88 89 #include <machine/intr.h> 90 #include <machine/bus.h> 91 92 #include <dev/isa/comreg.h> 93 #include <dev/isa/comvar.h> 94 #include <dev/ic/ns16550reg.h> 95 #ifdef COM_HAYESP 96 #include <dev/ic/hayespreg.h> 97 #endif 98 #define com_lcr com_cfcr 99 100 #include "com.h" 101 102 #ifdef COM_HAYESP 103 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 104 #endif 105 106 void com_attach_subr __P((struct com_softc *sc)); 107 void comdiag __P((void *)); 108 int comspeed __P((long)); 109 int comparam __P((struct tty *, struct termios *)); 110 void comstart __P((struct tty *)); 111 void comstop __P((struct tty *, int)); 112 #ifdef __GENERIC_SOFT_INTERRUPTS 113 void comsoft __P((void *)); 114 #else 115 #ifndef alpha 116 void comsoft __P((void)); 117 #else 118 void comsoft __P((void *)); 119 #endif 120 #endif 121 int comhwiflow __P((struct tty *, int)); 122 123 void com_loadchannelregs __P((struct com_softc *)); 124 void com_hwiflow __P((struct com_softc *)); 125 void com_break __P((struct com_softc *, int)); 126 void com_modem __P((struct com_softc *, int)); 127 void com_iflush __P((struct com_softc *)); 128 129 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 130 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 131 132 /* XXX: These belong elsewhere */ 133 cdev_decl(com); 134 bdev_decl(com); 135 136 struct consdev; 137 void comcnprobe __P((struct consdev *)); 138 void comcninit __P((struct consdev *)); 139 int comcngetc __P((dev_t)); 140 void comcnputc __P((dev_t, int)); 141 void comcnpollc __P((dev_t, int)); 142 143 #define integrate static inline 144 integrate void comrxint __P((struct com_softc *, struct tty *)); 145 integrate void comtxint __P((struct com_softc *, struct tty *)); 146 integrate void commsrint __P((struct com_softc *, struct tty *)); 147 integrate void com_schedrx __P((struct com_softc *)); 148 149 struct cfdriver com_cd = { 150 NULL, "com", DV_TTY 151 }; 152 153 void cominitcons __P((bus_space_tag_t, bus_space_handle_t, int)); 154 155 #ifdef CONSPEED 156 int comconsrate = CONSPEED; 157 #else 158 int comconsrate = TTYDEF_SPEED; 159 #endif 160 int comconsaddr; 161 bus_space_tag_t comconstag; 162 bus_space_handle_t comconsioh; 163 tcflag_t comconscflag = TTYDEF_CFLAG; 164 165 int commajor; 166 167 #ifndef __GENERIC_SOFT_INTERRUPTS 168 #ifdef alpha 169 volatile int com_softintr_scheduled; 170 #endif 171 #endif 172 173 #ifdef KGDB 174 #include <sys/kgdb.h> 175 extern int kgdb_dev; 176 extern int kgdb_rate; 177 extern int kgdb_debug_init; 178 179 int com_kgdb_addr; 180 bus_space_tag_t com_kgdb_iot; 181 bus_space_handle_t com_kgdb_ioh; 182 183 void com_kgdb_attach __P((struct com_softc *, bus_space_tag_t, 184 bus_space_handle_t)); 185 int com_kgdb_getc __P((void *)); 186 void com_kgdb_putc __P((void *, int)); 187 #endif /* KGDB */ 188 189 #define COMUNIT(x) (minor(x)) 190 191 int 192 comspeed(speed) 193 long speed; 194 { 195 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 196 197 int x, err; 198 199 #if 0 200 if (speed == 0) 201 return (0); 202 #endif 203 if (speed <= 0) 204 return (-1); 205 x = divrnd((COM_FREQ / 16), speed); 206 if (x <= 0) 207 return (-1); 208 err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000; 209 if (err < 0) 210 err = -err; 211 if (err > COM_TOLERANCE) 212 return (-1); 213 return (x); 214 215 #undef divrnd(n, q) 216 } 217 218 #ifdef COM_DEBUG 219 int com_debug = 0; 220 221 void comstatus __P((struct com_softc *, char *)); 222 void 223 comstatus(sc, str) 224 struct com_softc *sc; 225 char *str; 226 { 227 struct tty *tp = sc->sc_tty; 228 229 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 230 sc->sc_dev.dv_xname, str, 231 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 232 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 233 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 234 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 235 sc->sc_tx_stopped ? "+" : "-"); 236 237 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 238 sc->sc_dev.dv_xname, str, 239 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 240 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 241 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 242 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 243 sc->sc_rx_flags); 244 } 245 #endif 246 247 int 248 comprobe1(iot, ioh, iobase) 249 bus_space_tag_t iot; 250 bus_space_handle_t ioh; 251 int iobase; 252 { 253 254 /* force access to id reg */ 255 bus_space_write_1(iot, ioh, com_lcr, 0); 256 bus_space_write_1(iot, ioh, com_iir, 0); 257 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 258 return (0); 259 260 return (1); 261 } 262 263 #ifdef COM_HAYESP 264 int 265 comprobeHAYESP(hayespioh, sc) 266 bus_space_handle_t hayespioh; 267 struct com_softc *sc; 268 { 269 char val, dips; 270 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 271 bus_space_tag_t iot = sc->sc_iot; 272 273 /* 274 * Hayes ESP cards have two iobases. One is for compatibility with 275 * 16550 serial chips, and at the same ISA PC base addresses. The 276 * other is for ESP-specific enhanced features, and lies at a 277 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 278 */ 279 280 /* Test for ESP signature */ 281 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 282 return (0); 283 284 /* 285 * ESP is present at ESP enhanced base address; unknown com port 286 */ 287 288 /* Get the dip-switch configurations */ 289 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 290 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 291 292 /* Determine which com port this ESP card services: bits 0,1 of */ 293 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 294 if (sc->sc_iobase != combaselist[dips & 0x03]) 295 return (0); 296 297 printf(": ESP"); 298 299 /* Check ESP Self Test bits. */ 300 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 301 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 302 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 304 if ((val & 0x70) < 0x20) { 305 printf("-old (%o)", val & 0x70); 306 /* we do not support the necessary features */ 307 return (0); 308 } 309 310 /* Check for ability to emulate 16550: bit 8 == 1 */ 311 if ((dips & 0x80) == 0) { 312 printf(" slave"); 313 /* XXX Does slave really mean no 16550 support?? */ 314 return (0); 315 } 316 317 /* 318 * If we made it this far, we are a full-featured ESP v2.0 (or 319 * better), at the correct com port address. 320 */ 321 322 SET(sc->sc_hwflags, COM_HW_HAYESP); 323 printf(", 1024 byte fifo\n"); 324 return (1); 325 } 326 #endif 327 328 #ifdef KGDB 329 void 330 com_kgdb_attach(sc, iot, ioh) 331 struct com_softc *sc; 332 bus_space_tag_t iot; 333 bus_space_handle_t ioh; 334 { 335 int s; 336 u_char stat; 337 338 SET(sc->sc_hwflags, COM_HW_KGDB); 339 340 /* Turn on interrupts. */ 341 s = splserial(); 342 sc->sc_ier = IER_ERXRDY; 343 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 344 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS | MCR_IENABLE); 345 DELAY(100); 346 stat = bus_space_read_1(iot, ioh, com_iir); 347 splx(s); 348 } 349 350 /* ARGSUSED */ 351 int 352 com_kgdb_getc(arg) 353 void *arg; 354 { 355 356 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 357 } 358 359 /* ARGSUSED */ 360 void 361 com_kgdb_putc(arg, c) 362 void *arg; 363 int c; 364 { 365 366 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 367 } 368 #endif /* KGDB */ 369 370 371 void 372 com_attach_subr(sc) 373 struct com_softc *sc; 374 { 375 int iobase = sc->sc_iobase; 376 bus_space_tag_t iot = sc->sc_iot; 377 bus_space_handle_t ioh = sc->sc_ioh; 378 #ifdef COM_HAYESP 379 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 380 int *hayespp; 381 #endif 382 383 if (iobase == comconsaddr) { 384 /* Make sure the console is always "hardwired". */ 385 delay(1000); /* wait for output to finish */ 386 SET(sc->sc_hwflags, COM_HW_CONSOLE); 387 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 388 } 389 390 #ifdef COM_HAYESP 391 /* Look for a Hayes ESP board. */ 392 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 393 bus_space_handle_t hayespioh; 394 395 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 396 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 397 continue; 398 if (comprobeHAYESP(hayespioh, sc)) { 399 sc->sc_hayespioh = hayespioh; 400 sc->sc_fifolen = 1024; 401 402 /* Set 16550 compatibility mode */ 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 404 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 405 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 406 HAYESP_MODE_SCALE); 407 408 /* Set RTS/CTS flow control */ 409 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 410 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 411 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 412 413 /* Set flow control levels */ 414 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 415 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 416 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 417 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 418 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 419 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 420 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 421 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 422 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 423 424 break; 425 } 426 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 427 } 428 /* No ESP; look for other things. */ 429 if (*hayespp == 0) { 430 #endif 431 432 sc->sc_fifolen = 1; 433 /* look for a NS 16550AF UART with FIFOs */ 434 bus_space_write_1(iot, ioh, com_fifo, 435 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 436 delay(100); 437 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 438 == IIR_FIFO_MASK) 439 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 440 == FIFO_TRIGGER_14) { 441 SET(sc->sc_hwflags, COM_HW_FIFO); 442 printf(": ns16550a, working fifo\n"); 443 sc->sc_fifolen = 16; 444 } else 445 printf(": ns16550, broken fifo\n"); 446 else 447 printf(": ns8250 or ns16450, no fifo\n"); 448 bus_space_write_1(iot, ioh, com_fifo, 0); 449 #ifdef COM_HAYESP 450 } 451 #endif 452 453 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 454 SET(sc->sc_mcr, MCR_IENABLE); 455 456 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 457 cominit(iot, ioh, comconsrate); 458 printf("%s: console\n", sc->sc_dev.dv_xname); 459 } 460 461 #ifdef KGDB 462 /* 463 * Allow kgdb to "take over" this port. If this is 464 * the kgdb device, it has exclusive use. 465 */ 466 if (iobase == com_kgdb_addr 467 && !ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 468 com_kgdb_attach(sc, iot, ioh); 469 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 470 } 471 #endif 472 473 #ifdef __GENERIC_SOFT_INTERRUPTS 474 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 475 #endif 476 } 477 478 int 479 comopen(dev, flag, mode, p) 480 dev_t dev; 481 int flag, mode; 482 struct proc *p; 483 { 484 int unit = COMUNIT(dev); 485 struct com_softc *sc; 486 struct tty *tp; 487 int s, s2; 488 int error = 0; 489 490 if (unit >= com_cd.cd_ndevs) 491 return (ENXIO); 492 sc = com_cd.cd_devs[unit]; 493 if (!sc) 494 return (ENXIO); 495 496 #ifdef KGDB 497 /* 498 * If this is the kgdb port, no other use is permitted. 499 */ 500 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 501 return (EBUSY); 502 #endif 503 504 if (!sc->sc_tty) { 505 tp = sc->sc_tty = ttymalloc(); 506 tty_attach(tp); 507 } else 508 tp = sc->sc_tty; 509 510 if (ISSET(tp->t_state, TS_ISOPEN) && 511 ISSET(tp->t_state, TS_XCLUDE) && 512 p->p_ucred->cr_uid != 0) 513 return (EBUSY); 514 515 s = spltty(); 516 517 /* We need to set this early for the benefit of comsoft(). */ 518 SET(tp->t_state, TS_WOPEN); 519 520 /* 521 * Do the following iff this is a first open. 522 */ 523 if (!ISSET(tp->t_state, TS_ISOPEN)) { 524 struct termios t; 525 526 /* Turn on interrupts. */ 527 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 528 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 529 530 /* Fetch the current modem control status, needed later. */ 531 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 532 533 /* Add some entry points needed by the tty layer. */ 534 tp->t_oproc = comstart; 535 tp->t_param = comparam; 536 tp->t_hwiflow = comhwiflow; 537 tp->t_dev = dev; 538 539 /* 540 * Initialize the termios status to the defaults. Add in the 541 * sticky bits from TIOCSFLAGS. 542 */ 543 t.c_ispeed = 0; 544 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 545 t.c_ospeed = comconsrate; 546 t.c_cflag = comconscflag; 547 } else { 548 t.c_ospeed = TTYDEF_SPEED; 549 t.c_cflag = TTYDEF_CFLAG; 550 } 551 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 552 SET(t.c_cflag, CLOCAL); 553 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 554 SET(t.c_cflag, CRTSCTS); 555 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 556 SET(t.c_cflag, MDMBUF); 557 tp->t_iflag = TTYDEF_IFLAG; 558 tp->t_oflag = TTYDEF_OFLAG; 559 tp->t_lflag = TTYDEF_LFLAG; 560 ttychars(tp); 561 (void) comparam(tp, &t); 562 ttsetwater(tp); 563 564 s2 = splserial(); 565 566 /* 567 * Turn on DTR. We must always do this, even if carrier is not 568 * present, because otherwise we'd have to use TIOCSDTR 569 * immediately after setting CLOCAL. We will drop DTR only on 570 * the next high-low transition of DCD, or by explicit request. 571 */ 572 com_modem(sc, 1); 573 574 /* Clear the input ring, and unblock. */ 575 sc->sc_rbput = sc->sc_rbget = 0; 576 sc->sc_rbavail = RXBUFSIZE; 577 com_iflush(sc); 578 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 579 com_hwiflow(sc); 580 581 #ifdef COM_DEBUG 582 if (com_debug) 583 comstatus(sc, "comopen "); 584 #endif 585 586 splx(s2); 587 } 588 error = 0; 589 590 /* If we're doing a blocking open... */ 591 if (!ISSET(flag, O_NONBLOCK)) 592 /* ...then wait for carrier. */ 593 while (!ISSET(tp->t_state, TS_CARR_ON) && 594 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 595 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 596 ttopen, 0); 597 if (error) { 598 /* 599 * If the open was interrupted and nobody 600 * else has the device open, then hang up. 601 */ 602 if (!ISSET(tp->t_state, TS_ISOPEN)) { 603 com_modem(sc, 0); 604 CLR(tp->t_state, TS_WOPEN); 605 ttwakeup(tp); 606 } 607 break; 608 } 609 SET(tp->t_state, TS_WOPEN); 610 } 611 612 splx(s); 613 if (error == 0) 614 error = (*linesw[tp->t_line].l_open)(dev, tp); 615 return (error); 616 } 617 618 int 619 comclose(dev, flag, mode, p) 620 dev_t dev; 621 int flag, mode; 622 struct proc *p; 623 { 624 int unit = COMUNIT(dev); 625 struct com_softc *sc = com_cd.cd_devs[unit]; 626 struct tty *tp = sc->sc_tty; 627 int s; 628 629 /* XXX This is for cons.c. */ 630 if (!ISSET(tp->t_state, TS_ISOPEN)) 631 return (0); 632 633 (*linesw[tp->t_line].l_close)(tp, flag); 634 ttyclose(tp); 635 636 /* If we were asserting flow control, then deassert it. */ 637 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 638 com_hwiflow(sc); 639 /* Clear any break condition set with TIOCSBRK. */ 640 com_break(sc, 0); 641 /* 642 * Hang up if necessary. Wait a bit, so the other side has time to 643 * notice even if we immediately open the port again. 644 */ 645 if (ISSET(tp->t_cflag, HUPCL)) { 646 com_modem(sc, 0); 647 (void) tsleep(sc, TTIPRI, ttclos, hz); 648 } 649 650 s = splserial(); 651 /* Turn off interrupts. */ 652 sc->sc_ier = 0; 653 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 654 splx(s); 655 656 return (0); 657 } 658 659 int 660 comread(dev, uio, flag) 661 dev_t dev; 662 struct uio *uio; 663 int flag; 664 { 665 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 666 struct tty *tp = sc->sc_tty; 667 668 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 669 } 670 671 int 672 comwrite(dev, uio, flag) 673 dev_t dev; 674 struct uio *uio; 675 int flag; 676 { 677 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 678 struct tty *tp = sc->sc_tty; 679 680 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 681 } 682 683 struct tty * 684 comtty(dev) 685 dev_t dev; 686 { 687 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 688 struct tty *tp = sc->sc_tty; 689 690 return (tp); 691 } 692 693 int 694 comioctl(dev, cmd, data, flag, p) 695 dev_t dev; 696 u_long cmd; 697 caddr_t data; 698 int flag; 699 struct proc *p; 700 { 701 int unit = COMUNIT(dev); 702 struct com_softc *sc = com_cd.cd_devs[unit]; 703 struct tty *tp = sc->sc_tty; 704 int error; 705 706 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 707 if (error >= 0) 708 return (error); 709 710 error = ttioctl(tp, cmd, data, flag, p); 711 if (error >= 0) 712 return (error); 713 714 switch (cmd) { 715 case TIOCSBRK: 716 com_break(sc, 1); 717 break; 718 719 case TIOCCBRK: 720 com_break(sc, 0); 721 break; 722 723 case TIOCSDTR: 724 com_modem(sc, 1); 725 break; 726 727 case TIOCCDTR: 728 com_modem(sc, 0); 729 break; 730 731 case TIOCGFLAGS: 732 *(int *)data = sc->sc_swflags; 733 break; 734 735 case TIOCSFLAGS: 736 error = suser(p->p_ucred, &p->p_acflag); 737 if (error) 738 return (error); 739 sc->sc_swflags = *(int *)data; 740 break; 741 742 case TIOCMSET: 743 case TIOCMBIS: 744 case TIOCMBIC: 745 case TIOCMGET: 746 default: 747 return (ENOTTY); 748 } 749 750 #ifdef COM_DEBUG 751 if (com_debug) 752 comstatus(sc, "comioctl "); 753 #endif 754 755 return (0); 756 } 757 758 integrate void 759 com_schedrx(sc) 760 struct com_softc *sc; 761 { 762 763 sc->sc_rx_ready = 1; 764 765 /* Wake up the poller. */ 766 #ifdef __GENERIC_SOFT_INTERRUPTS 767 softintr_schedule(sc->sc_si); 768 #else 769 #ifndef alpha 770 setsoftserial(); 771 #else 772 if (!com_softintr_scheduled) { 773 com_softintr_scheduled = 1; 774 timeout(comsoft, NULL, 1); 775 } 776 #endif 777 #endif 778 } 779 780 void 781 com_break(sc, onoff) 782 struct com_softc *sc; 783 int onoff; 784 { 785 int s; 786 787 s = splserial(); 788 if (onoff) 789 SET(sc->sc_lcr, LCR_SBREAK); 790 else 791 CLR(sc->sc_lcr, LCR_SBREAK); 792 793 if (!sc->sc_heldchange) { 794 if (sc->sc_tx_busy) { 795 sc->sc_heldtbc = sc->sc_tbc; 796 sc->sc_tbc = 0; 797 sc->sc_heldchange = 1; 798 } else 799 com_loadchannelregs(sc); 800 } 801 splx(s); 802 } 803 804 void 805 com_modem(sc, onoff) 806 struct com_softc *sc; 807 int onoff; 808 { 809 int s; 810 811 s = splserial(); 812 if (onoff) 813 SET(sc->sc_mcr, sc->sc_mcr_dtr); 814 else 815 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 816 817 if (!sc->sc_heldchange) { 818 if (sc->sc_tx_busy) { 819 sc->sc_heldtbc = sc->sc_tbc; 820 sc->sc_tbc = 0; 821 sc->sc_heldchange = 1; 822 } else 823 com_loadchannelregs(sc); 824 } 825 splx(s); 826 } 827 828 int 829 comparam(tp, t) 830 struct tty *tp; 831 struct termios *t; 832 { 833 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 834 int ospeed = comspeed(t->c_ospeed); 835 u_char lcr; 836 int s; 837 838 /* check requested parameters */ 839 if (ospeed < 0) 840 return (EINVAL); 841 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 842 return (EINVAL); 843 844 lcr = ISSET(sc->sc_lcr, LCR_SBREAK); 845 846 switch (ISSET(t->c_cflag, CSIZE)) { 847 case CS5: 848 SET(lcr, LCR_5BITS); 849 break; 850 case CS6: 851 SET(lcr, LCR_6BITS); 852 break; 853 case CS7: 854 SET(lcr, LCR_7BITS); 855 break; 856 case CS8: 857 SET(lcr, LCR_8BITS); 858 break; 859 } 860 if (ISSET(t->c_cflag, PARENB)) { 861 SET(lcr, LCR_PENAB); 862 if (!ISSET(t->c_cflag, PARODD)) 863 SET(lcr, LCR_PEVEN); 864 } 865 if (ISSET(t->c_cflag, CSTOPB)) 866 SET(lcr, LCR_STOPB); 867 868 s = splserial(); 869 870 sc->sc_lcr = lcr; 871 872 /* 873 * For the console, always force CLOCAL and !HUPCL, so that the port 874 * is always active. 875 */ 876 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 877 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 878 SET(t->c_cflag, CLOCAL); 879 CLR(t->c_cflag, HUPCL); 880 } 881 882 /* 883 * If we're not in a mode that assumes a connection is present, then 884 * ignore carrier changes. 885 */ 886 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 887 sc->sc_msr_dcd = 0; 888 else 889 sc->sc_msr_dcd = MSR_DCD; 890 /* 891 * Set the flow control pins depending on the current flow control 892 * mode. 893 */ 894 if (ISSET(t->c_cflag, CRTSCTS)) { 895 sc->sc_mcr_dtr = MCR_DTR; 896 sc->sc_mcr_rts = MCR_RTS; 897 sc->sc_msr_cts = MSR_CTS; 898 sc->sc_r_hiwat = RXHIWAT; 899 sc->sc_r_lowat = RXLOWAT; 900 } else if (ISSET(t->c_cflag, MDMBUF)) { 901 /* 902 * For DTR/DCD flow control, make sure we don't toggle DTR for 903 * carrier detection. 904 */ 905 sc->sc_mcr_dtr = 0; 906 sc->sc_mcr_rts = MCR_DTR; 907 sc->sc_msr_cts = MSR_DCD; 908 sc->sc_r_hiwat = RXHIWAT; 909 sc->sc_r_lowat = RXLOWAT; 910 } else { 911 /* 912 * If no flow control, then always set RTS. This will make 913 * the other side happy if it mistakenly thinks we're doing 914 * RTS/CTS flow control. 915 */ 916 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 917 sc->sc_mcr_rts = 0; 918 sc->sc_msr_cts = 0; 919 sc->sc_r_hiwat = 0; 920 sc->sc_r_lowat = 0; 921 if (ISSET(sc->sc_mcr, MCR_DTR)) 922 SET(sc->sc_mcr, MCR_RTS); 923 else 924 CLR(sc->sc_mcr, MCR_RTS); 925 } 926 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 927 928 #if 0 929 if (ospeed == 0) 930 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 931 else 932 SET(sc->sc_mcr, sc->sc_mcr_dtr); 933 #endif 934 935 sc->sc_dlbl = ospeed; 936 sc->sc_dlbh = ospeed >> 8; 937 938 /* 939 * Set the FIFO threshold based on the receive speed. 940 * 941 * * If it's a low speed, it's probably a mouse or some other 942 * interactive device, so set the threshold low. 943 * * If it's a high speed, trim the trigger level down to prevent 944 * overflows. 945 * * Otherwise set it a bit higher. 946 */ 947 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 948 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 949 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 950 sc->sc_fifo = FIFO_ENABLE | 951 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 952 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 953 else 954 sc->sc_fifo = 0; 955 956 /* and copy to tty */ 957 tp->t_ispeed = 0; 958 tp->t_ospeed = t->c_ospeed; 959 tp->t_cflag = t->c_cflag; 960 961 if (!sc->sc_heldchange) { 962 if (sc->sc_tx_busy) { 963 sc->sc_heldtbc = sc->sc_tbc; 964 sc->sc_tbc = 0; 965 sc->sc_heldchange = 1; 966 } else 967 com_loadchannelregs(sc); 968 } 969 970 splx(s); 971 972 /* 973 * Update the tty layer's idea of the carrier bit, in case we changed 974 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 975 * lose carrier while carrier detection is on. 976 */ 977 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 978 979 #ifdef COM_DEBUG 980 if (com_debug) 981 comstatus(sc, "comparam "); 982 #endif 983 984 /* Block or unblock as needed. */ 985 if (!ISSET(t->c_cflag, CHWFLOW)) { 986 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 987 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 988 com_schedrx(sc); 989 } 990 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 991 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 992 com_hwiflow(sc); 993 } 994 if (sc->sc_tx_stopped) { 995 sc->sc_tx_stopped = 0; 996 comstart(tp); 997 } 998 } else { 999 /* XXXXX FIX ME */ 1000 #if 0 1001 commsrint(sc, tp); 1002 #endif 1003 } 1004 1005 return (0); 1006 } 1007 1008 void 1009 com_iflush(sc) 1010 struct com_softc *sc; 1011 { 1012 bus_space_tag_t iot = sc->sc_iot; 1013 bus_space_handle_t ioh = sc->sc_ioh; 1014 1015 /* flush any pending I/O */ 1016 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1017 (void) bus_space_read_1(iot, ioh, com_data); 1018 } 1019 1020 void 1021 com_loadchannelregs(sc) 1022 struct com_softc *sc; 1023 { 1024 bus_space_tag_t iot = sc->sc_iot; 1025 bus_space_handle_t ioh = sc->sc_ioh; 1026 1027 /* XXXXX necessary? */ 1028 com_iflush(sc); 1029 1030 bus_space_write_1(iot, ioh, com_ier, 0); 1031 1032 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1033 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1034 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1035 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1036 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1037 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1038 1039 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1040 } 1041 1042 int 1043 comhwiflow(tp, block) 1044 struct tty *tp; 1045 int block; 1046 { 1047 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1048 int s; 1049 1050 if (sc->sc_mcr_rts == 0) 1051 return (0); 1052 1053 s = splserial(); 1054 if (block) { 1055 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1056 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1057 com_hwiflow(sc); 1058 } 1059 } else { 1060 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1061 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1062 com_schedrx(sc); 1063 } 1064 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1065 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1066 com_hwiflow(sc); 1067 } 1068 } 1069 splx(s); 1070 return (1); 1071 } 1072 1073 /* 1074 * (un)block input via hw flowcontrol 1075 */ 1076 void 1077 com_hwiflow(sc) 1078 struct com_softc *sc; 1079 { 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->sc_mcr_rts == 0) 1084 return; 1085 1086 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1087 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1088 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1089 } else { 1090 SET(sc->sc_mcr, sc->sc_mcr_rts); 1091 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1092 } 1093 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1094 } 1095 1096 1097 void 1098 comstart(tp) 1099 struct tty *tp; 1100 { 1101 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1102 bus_space_tag_t iot = sc->sc_iot; 1103 bus_space_handle_t ioh = sc->sc_ioh; 1104 int s; 1105 1106 s = spltty(); 1107 if (ISSET(tp->t_state, TS_BUSY)) 1108 goto out; 1109 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1110 goto stopped; 1111 1112 if (sc->sc_tx_stopped) 1113 goto stopped; 1114 1115 if (tp->t_outq.c_cc <= tp->t_lowat) { 1116 if (ISSET(tp->t_state, TS_ASLEEP)) { 1117 CLR(tp->t_state, TS_ASLEEP); 1118 wakeup(&tp->t_outq); 1119 } 1120 selwakeup(&tp->t_wsel); 1121 if (tp->t_outq.c_cc == 0) 1122 goto stopped; 1123 } 1124 1125 /* Grab the first contiguous region of buffer space. */ 1126 { 1127 u_char *tba; 1128 int tbc; 1129 1130 tba = tp->t_outq.c_cf; 1131 tbc = ndqb(&tp->t_outq, 0); 1132 1133 (void)splserial(); 1134 1135 sc->sc_tba = tba; 1136 sc->sc_tbc = tbc; 1137 } 1138 1139 SET(tp->t_state, TS_BUSY); 1140 sc->sc_tx_busy = 1; 1141 1142 /* Enable transmit completion interrupts if necessary. */ 1143 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1144 SET(sc->sc_ier, IER_ETXRDY); 1145 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1146 } 1147 1148 /* Output the first chunk of the contiguous buffer. */ 1149 { 1150 int n; 1151 1152 n = sc->sc_fifolen; 1153 if (n > sc->sc_tbc) 1154 n = sc->sc_tbc; 1155 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1156 sc->sc_tbc -= n; 1157 sc->sc_tba += n; 1158 } 1159 splx(s); 1160 return; 1161 1162 stopped: 1163 /* Disable transmit completion interrupts if necessary. */ 1164 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1165 CLR(sc->sc_ier, IER_ETXRDY); 1166 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1167 } 1168 out: 1169 splx(s); 1170 return; 1171 } 1172 1173 /* 1174 * Stop output on a line. 1175 */ 1176 void 1177 comstop(tp, flag) 1178 struct tty *tp; 1179 int flag; 1180 { 1181 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1182 int s; 1183 1184 s = splserial(); 1185 if (ISSET(tp->t_state, TS_BUSY)) { 1186 /* Stop transmitting at the next chunk. */ 1187 sc->sc_tbc = 0; 1188 sc->sc_heldtbc = 0; 1189 if (!ISSET(tp->t_state, TS_TTSTOP)) 1190 SET(tp->t_state, TS_FLUSH); 1191 } 1192 splx(s); 1193 } 1194 1195 void 1196 comdiag(arg) 1197 void *arg; 1198 { 1199 struct com_softc *sc = arg; 1200 int overflows, floods; 1201 int s; 1202 1203 s = splserial(); 1204 overflows = sc->sc_overflows; 1205 sc->sc_overflows = 0; 1206 floods = sc->sc_floods; 1207 sc->sc_floods = 0; 1208 sc->sc_errors = 0; 1209 splx(s); 1210 1211 log(LOG_WARNING, 1212 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1213 sc->sc_dev.dv_xname, 1214 overflows, overflows == 1 ? "" : "s", 1215 floods, floods == 1 ? "" : "s"); 1216 } 1217 1218 integrate void 1219 comrxint(sc, tp) 1220 struct com_softc *sc; 1221 struct tty *tp; 1222 { 1223 u_int get, cc, scc; 1224 int code; 1225 u_char lsr; 1226 int s; 1227 static int lsrmap[8] = { 1228 0, TTY_PE, 1229 TTY_FE, TTY_PE|TTY_FE, 1230 TTY_FE, TTY_PE|TTY_FE, 1231 TTY_FE, TTY_PE|TTY_FE 1232 }; 1233 1234 get = sc->sc_rbget; 1235 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1236 1237 if (cc == RXBUFSIZE) { 1238 sc->sc_floods++; 1239 if (sc->sc_errors++ == 0) 1240 timeout(comdiag, sc, 60 * hz); 1241 } 1242 1243 while (cc) { 1244 lsr = sc->sc_lbuf[get]; 1245 if (ISSET(lsr, LSR_OE)) { 1246 sc->sc_overflows++; 1247 if (sc->sc_errors++ == 0) 1248 timeout(comdiag, sc, 60 * hz); 1249 } 1250 code = sc->sc_rbuf[get] | 1251 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1252 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1253 /* 1254 * The line discipline's buffer is out of space. 1255 */ 1256 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1257 /* 1258 * We're either not using flow control, or the 1259 * line discipline didn't tell us to block for 1260 * some reason. Either way, we have no way to 1261 * know when there's more space available, so 1262 * just drop the rest of the data. 1263 */ 1264 get = (get + cc) & RXBUFMASK; 1265 cc = 0; 1266 } else { 1267 /* 1268 * Don't schedule any more receive processing 1269 * until the line discipline tells us there's 1270 * space available (through comhwiflow()). 1271 * Leave the rest of the data in the input 1272 * buffer. 1273 */ 1274 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1275 } 1276 break; 1277 } 1278 get = (get + 1) & RXBUFMASK; 1279 cc--; 1280 } 1281 1282 if (cc != scc) { 1283 sc->sc_rbget = get; 1284 s = splserial(); 1285 cc = sc->sc_rbavail += scc - cc; 1286 /* Buffers should be ok again, release possible block. */ 1287 if (cc >= sc->sc_r_lowat) { 1288 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1289 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1290 SET(sc->sc_ier, IER_ERXRDY); 1291 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1292 } 1293 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1294 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1295 com_hwiflow(sc); 1296 } 1297 } 1298 splx(s); 1299 } 1300 } 1301 1302 integrate void 1303 comtxint(sc, tp) 1304 struct com_softc *sc; 1305 struct tty *tp; 1306 { 1307 1308 CLR(tp->t_state, TS_BUSY); 1309 if (ISSET(tp->t_state, TS_FLUSH)) 1310 CLR(tp->t_state, TS_FLUSH); 1311 else 1312 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1313 (*linesw[tp->t_line].l_start)(tp); 1314 } 1315 1316 integrate void 1317 commsrint(sc, tp) 1318 struct com_softc *sc; 1319 struct tty *tp; 1320 { 1321 u_char msr, delta; 1322 int s; 1323 1324 s = splserial(); 1325 msr = sc->sc_msr; 1326 delta = sc->sc_msr_delta; 1327 sc->sc_msr_delta = 0; 1328 splx(s); 1329 1330 if (ISSET(delta, sc->sc_msr_dcd)) { 1331 /* 1332 * Inform the tty layer that carrier detect changed. 1333 */ 1334 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1335 } 1336 1337 if (ISSET(delta, sc->sc_msr_cts)) { 1338 /* Block or unblock output according to flow control. */ 1339 if (ISSET(msr, sc->sc_msr_cts)) { 1340 sc->sc_tx_stopped = 0; 1341 (*linesw[tp->t_line].l_start)(tp); 1342 } else { 1343 sc->sc_tx_stopped = 1; 1344 } 1345 } 1346 1347 #ifdef COM_DEBUG 1348 if (com_debug) 1349 comstatus(sc, "commsrint"); 1350 #endif 1351 } 1352 1353 #ifdef __GENERIC_SOFT_INTERRUPTS 1354 void 1355 comsoft(arg) 1356 void *arg; 1357 { 1358 struct com_softc *sc = arg; 1359 struct tty *tp; 1360 1361 { 1362 #else 1363 void 1364 #ifndef alpha 1365 comsoft() 1366 #else 1367 comsoft(arg) 1368 void *arg; 1369 #endif 1370 { 1371 struct com_softc *sc; 1372 struct tty *tp; 1373 int unit; 1374 #ifdef alpha 1375 int s; 1376 1377 s = splsoftserial(); 1378 com_softintr_scheduled = 0; 1379 #endif 1380 1381 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1382 sc = com_cd.cd_devs[unit]; 1383 if (sc == NULL) 1384 continue; 1385 #endif 1386 1387 tp = sc->sc_tty; 1388 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1389 continue; 1390 1391 if (sc->sc_rx_ready) { 1392 sc->sc_rx_ready = 0; 1393 comrxint(sc, tp); 1394 } 1395 1396 if (sc->sc_st_check) { 1397 sc->sc_st_check = 0; 1398 commsrint(sc, tp); 1399 } 1400 1401 if (sc->sc_tx_done) { 1402 sc->sc_tx_done = 0; 1403 comtxint(sc, tp); 1404 } 1405 } 1406 1407 #ifndef __GENERIC_SOFT_INTERRUPTS 1408 #ifdef alpha 1409 splx(s); 1410 #endif 1411 #endif 1412 } 1413 1414 int 1415 comintr(arg) 1416 void *arg; 1417 { 1418 struct com_softc *sc = arg; 1419 bus_space_tag_t iot = sc->sc_iot; 1420 bus_space_handle_t ioh = sc->sc_ioh; 1421 u_char lsr, iir; 1422 u_int put, cc; 1423 1424 iir = bus_space_read_1(iot, ioh, com_iir); 1425 if (ISSET(iir, IIR_NOPEND)) 1426 return (0); 1427 1428 put = sc->sc_rbput; 1429 cc = sc->sc_rbavail; 1430 1431 do { 1432 u_char msr, delta; 1433 1434 lsr = bus_space_read_1(iot, ioh, com_lsr); 1435 #if defined(DDB) || defined(KGDB) 1436 if (ISSET(lsr, LSR_BI)) { 1437 #ifdef DDB 1438 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1439 Debugger(); 1440 continue; 1441 } 1442 #endif 1443 #ifdef KGDB 1444 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1445 kgdb_connect(1); 1446 continue; 1447 } 1448 #endif 1449 } 1450 #endif /* DDB || KGDB */ 1451 1452 if (ISSET(lsr, LSR_RCV_MASK) && 1453 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1454 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1455 sc->sc_rbuf[put] = 1456 bus_space_read_1(iot, ioh, com_data); 1457 sc->sc_lbuf[put] = lsr; 1458 put = (put + 1) & RXBUFMASK; 1459 lsr = bus_space_read_1(iot, ioh, com_lsr); 1460 } 1461 /* 1462 * Current string of incoming characters ended because 1463 * no more data was available. Schedule a receive event 1464 * if any data was received. Drop any characters that 1465 * we couldn't handle. 1466 */ 1467 sc->sc_rbput = put; 1468 sc->sc_rbavail = cc; 1469 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1470 sc->sc_rx_ready = 1; 1471 /* 1472 * See if we are in danger of overflowing a buffer. If 1473 * so, use hardware flow control to ease the pressure. 1474 */ 1475 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1476 cc < sc->sc_r_hiwat) { 1477 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1478 com_hwiflow(sc); 1479 } 1480 /* 1481 * If we're out of space, disable receive interrupts 1482 * until the queue has drained a bit. 1483 */ 1484 if (!cc) { 1485 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1486 CLR(sc->sc_ier, IER_ERXRDY); 1487 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1488 } 1489 } else { 1490 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1491 bus_space_write_1(iot, ioh, com_ier, 0); 1492 delay(10); 1493 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1494 iir = IIR_NOPEND; 1495 continue; 1496 } 1497 } 1498 1499 msr = bus_space_read_1(iot, ioh, com_msr); 1500 delta = msr ^ sc->sc_msr; 1501 sc->sc_msr = msr; 1502 if (ISSET(delta, sc->sc_msr_mask)) { 1503 sc->sc_msr_delta |= delta; 1504 1505 /* 1506 * Stop output immediately if we lose the output 1507 * flow control signal or carrier detect. 1508 */ 1509 if (ISSET(~msr, sc->sc_msr_mask)) { 1510 sc->sc_tbc = 0; 1511 sc->sc_heldtbc = 0; 1512 #ifdef COM_DEBUG 1513 if (com_debug) 1514 comstatus(sc, "comintr "); 1515 #endif 1516 } 1517 1518 sc->sc_st_check = 1; 1519 } 1520 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1521 1522 /* 1523 * Done handling any receive interrupts. See if data can be 1524 * transmitted as well. Schedule tx done event if no data left 1525 * and tty was marked busy. 1526 */ 1527 if (ISSET(lsr, LSR_TXRDY)) { 1528 /* 1529 * If we've delayed a parameter change, do it now, and restart 1530 * output. 1531 */ 1532 if (sc->sc_heldchange) { 1533 com_loadchannelregs(sc); 1534 sc->sc_heldchange = 0; 1535 sc->sc_tbc = sc->sc_heldtbc; 1536 sc->sc_heldtbc = 0; 1537 } 1538 /* Output the next chunk of the contiguous buffer, if any. */ 1539 if (sc->sc_tbc > 0) { 1540 int n; 1541 1542 n = sc->sc_fifolen; 1543 if (n > sc->sc_tbc) 1544 n = sc->sc_tbc; 1545 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1546 sc->sc_tbc -= n; 1547 sc->sc_tba += n; 1548 } else if (sc->sc_tx_busy) { 1549 sc->sc_tx_busy = 0; 1550 sc->sc_tx_done = 1; 1551 } 1552 } 1553 1554 /* Wake up the poller. */ 1555 #ifdef __GENERIC_SOFT_INTERRUPTS 1556 softintr_schedule(sc->sc_si); 1557 #else 1558 #ifndef alpha 1559 setsoftserial(); 1560 #else 1561 if (!com_softintr_scheduled) { 1562 com_softintr_scheduled = 1; 1563 timeout(comsoft, NULL, 1); 1564 } 1565 #endif 1566 #endif 1567 return (1); 1568 } 1569 1570 /* 1571 * The following functions are polled getc and putc routines, shared 1572 * by the console and kgdb glue. 1573 */ 1574 1575 int 1576 com_common_getc(iot, ioh) 1577 bus_space_tag_t iot; 1578 bus_space_handle_t ioh; 1579 { 1580 int s = splserial(); 1581 u_char stat, c; 1582 1583 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1584 ; 1585 c = bus_space_read_1(iot, ioh, com_data); 1586 stat = bus_space_read_1(iot, ioh, com_iir); 1587 splx(s); 1588 return (c); 1589 } 1590 1591 void 1592 com_common_putc(iot, ioh, c) 1593 bus_space_tag_t iot; 1594 bus_space_handle_t ioh; 1595 int c; 1596 { 1597 int s = splserial(); 1598 u_char stat; 1599 register int timo; 1600 1601 /* wait for any pending transmission to finish */ 1602 timo = 50000; 1603 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1604 && --timo) 1605 ; 1606 bus_space_write_1(iot, ioh, com_data, c); 1607 /* wait for this transmission to complete */ 1608 timo = 1500000; 1609 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1610 && --timo) 1611 ; 1612 /* clear any interrupts generated by this transmission */ 1613 stat = bus_space_read_1(iot, ioh, com_iir); 1614 splx(s); 1615 } 1616 1617 /* 1618 * Following are all routines needed for COM to act as console 1619 */ 1620 #include <dev/cons.h> 1621 1622 void 1623 comcnprobe(cp) 1624 struct consdev *cp; 1625 { 1626 /* XXX NEEDS TO BE FIXED XXX */ 1627 bus_space_tag_t iot = 0; 1628 bus_space_handle_t ioh; 1629 int found; 1630 1631 if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) { 1632 cp->cn_pri = CN_DEAD; 1633 return; 1634 } 1635 found = comprobe1(iot, ioh, CONADDR); 1636 bus_space_unmap(iot, ioh, COM_NPORTS); 1637 if (!found) { 1638 cp->cn_pri = CN_DEAD; 1639 return; 1640 } 1641 1642 /* locate the major number */ 1643 for (commajor = 0; commajor < nchrdev; commajor++) 1644 if (cdevsw[commajor].d_open == comopen) 1645 break; 1646 1647 /* initialize required fields */ 1648 cp->cn_dev = makedev(commajor, CONUNIT); 1649 #ifdef COMCONSOLE 1650 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 1651 #else 1652 cp->cn_pri = CN_NORMAL; 1653 #endif 1654 } 1655 1656 void 1657 comcninit(cp) 1658 struct consdev *cp; 1659 { 1660 1661 #if 0 1662 XXX NEEDS TO BE FIXED XXX 1663 comconstag = ???; 1664 #endif 1665 if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsioh)) 1666 panic("comcninit: mapping failed"); 1667 1668 cominitcons(comconstag, comconsioh, comconsrate); 1669 comconsaddr = CONADDR; 1670 } 1671 1672 /* 1673 * Initialize UART to known state. 1674 */ 1675 void 1676 cominit(iot, ioh, rate) 1677 bus_space_tag_t iot; 1678 bus_space_handle_t ioh; 1679 int rate; 1680 { 1681 1682 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1683 rate = comspeed(rate); 1684 bus_space_write_1(iot, ioh, com_dlbl, rate); 1685 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1686 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 1687 bus_space_write_1(iot, ioh, com_mcr, 0); 1688 bus_space_write_1(iot, ioh, com_fifo, 1689 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1690 bus_space_write_1(iot, ioh, com_ier, 0); 1691 } 1692 1693 /* 1694 * Set UART for console use. Do normal init, then enable interrupts. 1695 */ 1696 void 1697 cominitcons(iot, ioh, rate) 1698 bus_space_tag_t iot; 1699 bus_space_handle_t ioh; 1700 int rate; 1701 { 1702 int s = splserial(); 1703 u_char stat; 1704 1705 cominit(iot, ioh, rate); 1706 bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); 1707 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 1708 DELAY(100); 1709 stat = bus_space_read_1(iot, ioh, com_iir); 1710 splx(s); 1711 } 1712 1713 int 1714 comcngetc(dev) 1715 dev_t dev; 1716 { 1717 1718 return (com_common_getc(comconstag, comconsioh)); 1719 } 1720 1721 /* 1722 * Console kernel output character routine. 1723 */ 1724 void 1725 comcnputc(dev, c) 1726 dev_t dev; 1727 int c; 1728 { 1729 1730 com_common_putc(comconstag, comconsioh, c); 1731 } 1732 1733 void 1734 comcnpollc(dev, on) 1735 dev_t dev; 1736 int on; 1737 { 1738 1739 } 1740
Indexes created Mon Sep 22 13:09:51 GMT 2025