com.c revision 1.115
1 /* $NetBSD: com.c,v 1.115 1997/10/19 11:45:33 explorer Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 */ 74 75 #include "rnd.h" 76 #if NRND > 0 && defined(RND_COM) 77 #include <sys/rnd.h> 78 #endif 79 80 #include <sys/param.h> 81 #include <sys/systm.h> 82 #include <sys/ioctl.h> 83 #include <sys/select.h> 84 #include <sys/tty.h> 85 #include <sys/proc.h> 86 #include <sys/user.h> 87 #include <sys/conf.h> 88 #include <sys/file.h> 89 #include <sys/uio.h> 90 #include <sys/kernel.h> 91 #include <sys/syslog.h> 92 #include <sys/types.h> 93 #include <sys/device.h> 94 95 #include <machine/intr.h> 96 #include <machine/bus.h> 97 98 #include <dev/ic/comreg.h> 99 #include <dev/ic/comvar.h> 100 #include <dev/ic/ns16550reg.h> 101 #ifdef COM_HAYESP 102 #include <dev/ic/hayespreg.h> 103 #endif 104 #define com_lcr com_cfcr 105 #include <dev/cons.h> 106 107 #include "com.h" 108 109 #ifdef COM_HAYESP 110 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 111 #endif 112 113 #if defined(DDB) || defined(KGDB) 114 static void com_enable_debugport __P((struct com_softc *)); 115 #endif 116 void com_attach_subr __P((struct com_softc *sc)); 117 void comdiag __P((void *)); 118 int comspeed __P((long, long)); 119 static u_char cflag2lcr __P((tcflag_t)); 120 int comparam __P((struct tty *, struct termios *)); 121 void comstart __P((struct tty *)); 122 void comstop __P((struct tty *, int)); 123 #ifdef __GENERIC_SOFT_INTERRUPTS 124 void comsoft __P((void *)); 125 #else 126 #ifndef alpha 127 void comsoft __P((void)); 128 #else 129 void comsoft __P((void *)); 130 #endif 131 #endif 132 int comhwiflow __P((struct tty *, int)); 133 134 void com_loadchannelregs __P((struct com_softc *)); 135 void com_hwiflow __P((struct com_softc *)); 136 void com_break __P((struct com_softc *, int)); 137 void com_modem __P((struct com_softc *, int)); 138 void com_iflush __P((struct com_softc *)); 139 140 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 141 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 142 143 /* XXX: These belong elsewhere */ 144 cdev_decl(com); 145 bdev_decl(com); 146 147 int comcngetc __P((dev_t)); 148 void comcnputc __P((dev_t, int)); 149 void comcnpollc __P((dev_t, int)); 150 151 #define integrate static inline 152 integrate void comrxint __P((struct com_softc *, struct tty *)); 153 integrate void comtxint __P((struct com_softc *, struct tty *)); 154 integrate void commsrint __P((struct com_softc *, struct tty *)); 155 integrate void com_schedrx __P((struct com_softc *)); 156 157 struct cfdriver com_cd = { 158 NULL, "com", DV_TTY 159 }; 160 161 static int comconsaddr; 162 static bus_space_tag_t comconstag; 163 static bus_space_handle_t comconsioh; 164 static int comconsattached; 165 static int comconsrate; 166 static tcflag_t comconscflag; 167 168 static u_char tiocm_xxx2mcr __P((int)); 169 170 #ifndef __GENERIC_SOFT_INTERRUPTS 171 #ifdef alpha 172 volatile int com_softintr_scheduled; 173 #endif 174 #endif 175 176 #ifdef KGDB 177 #include <sys/kgdb.h> 178 179 static int com_kgdb_addr; 180 static bus_space_tag_t com_kgdb_iot; 181 static bus_space_handle_t com_kgdb_ioh; 182 static int com_kgdb_attached; 183 184 int com_kgdb_getc __P((void *)); 185 void com_kgdb_putc __P((void *, int)); 186 #endif /* KGDB */ 187 188 #define COMUNIT(x) (minor(x)) 189 190 int 191 comspeed(speed, frequency) 192 long speed, frequency; 193 { 194 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 195 196 int x, err; 197 198 #if 0 199 if (speed == 0) 200 return (0); 201 #endif 202 if (speed <= 0) 203 return (-1); 204 x = divrnd(frequency / 16, speed); 205 if (x <= 0) 206 return (-1); 207 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 208 if (err < 0) 209 err = -err; 210 if (err > COM_TOLERANCE) 211 return (-1); 212 return (x); 213 214 #undef divrnd(n, q) 215 } 216 217 #ifdef COM_DEBUG 218 int com_debug = 0; 219 220 void comstatus __P((struct com_softc *, char *)); 221 void 222 comstatus(sc, str) 223 struct com_softc *sc; 224 char *str; 225 { 226 struct tty *tp = sc->sc_tty; 227 228 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 229 sc->sc_dev.dv_xname, str, 230 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 231 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 232 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 233 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 234 sc->sc_tx_stopped ? "+" : "-"); 235 236 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 237 sc->sc_dev.dv_xname, str, 238 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 239 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 240 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 241 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 242 sc->sc_rx_flags); 243 } 244 #endif 245 246 int 247 comprobe1(iot, ioh, iobase) 248 bus_space_tag_t iot; 249 bus_space_handle_t ioh; 250 int iobase; 251 { 252 253 /* force access to id reg */ 254 bus_space_write_1(iot, ioh, com_lcr, 0); 255 bus_space_write_1(iot, ioh, com_iir, 0); 256 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 257 return (0); 258 259 return (1); 260 } 261 262 #ifdef COM_HAYESP 263 int 264 comprobeHAYESP(hayespioh, sc) 265 bus_space_handle_t hayespioh; 266 struct com_softc *sc; 267 { 268 char val, dips; 269 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 270 bus_space_tag_t iot = sc->sc_iot; 271 272 /* 273 * Hayes ESP cards have two iobases. One is for compatibility with 274 * 16550 serial chips, and at the same ISA PC base addresses. The 275 * other is for ESP-specific enhanced features, and lies at a 276 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 277 */ 278 279 /* Test for ESP signature */ 280 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 281 return (0); 282 283 /* 284 * ESP is present at ESP enhanced base address; unknown com port 285 */ 286 287 /* Get the dip-switch configurations */ 288 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 289 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 290 291 /* Determine which com port this ESP card services: bits 0,1 of */ 292 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 293 if (sc->sc_iobase != combaselist[dips & 0x03]) 294 return (0); 295 296 printf(": ESP"); 297 298 /* Check ESP Self Test bits. */ 299 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 300 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 301 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 302 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 303 if ((val & 0x70) < 0x20) { 304 printf("-old (%o)", val & 0x70); 305 /* we do not support the necessary features */ 306 return (0); 307 } 308 309 /* Check for ability to emulate 16550: bit 8 == 1 */ 310 if ((dips & 0x80) == 0) { 311 printf(" slave"); 312 /* XXX Does slave really mean no 16550 support?? */ 313 return (0); 314 } 315 316 /* 317 * If we made it this far, we are a full-featured ESP v2.0 (or 318 * better), at the correct com port address. 319 */ 320 321 SET(sc->sc_hwflags, COM_HW_HAYESP); 322 printf(", 1024 byte fifo\n"); 323 return (1); 324 } 325 #endif 326 327 #if defined(DDB) || defined(KGDB) 328 static void 329 com_enable_debugport(sc) 330 struct com_softc *sc; 331 { 332 int s; 333 334 /* Turn on line break interrupt, set carrier. */ 335 s = splserial(); 336 sc->sc_ier = IER_ERXRDY; 337 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 338 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 340 splx(s); 341 } 342 #endif 343 344 void 345 com_attach_subr(sc) 346 struct com_softc *sc; 347 { 348 int iobase = sc->sc_iobase; 349 bus_space_tag_t iot = sc->sc_iot; 350 bus_space_handle_t ioh = sc->sc_ioh; 351 #ifdef COM_HAYESP 352 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 353 int *hayespp; 354 #endif 355 356 if (iot == comconstag && iobase == comconsaddr) { 357 comconsattached = 1; 358 359 /* Make sure the console is always "hardwired". */ 360 delay(1000); /* wait for output to finish */ 361 SET(sc->sc_hwflags, COM_HW_CONSOLE); 362 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 363 } 364 365 #ifdef COM_HAYESP 366 /* Look for a Hayes ESP board. */ 367 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 368 bus_space_handle_t hayespioh; 369 370 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 371 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 372 continue; 373 if (comprobeHAYESP(hayespioh, sc)) { 374 sc->sc_hayespioh = hayespioh; 375 sc->sc_fifolen = 1024; 376 377 /* Set 16550 compatibility mode */ 378 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 379 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 380 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 381 HAYESP_MODE_SCALE); 382 383 /* Set RTS/CTS flow control */ 384 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 385 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 386 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 387 388 /* Set flow control levels */ 389 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 390 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 391 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 392 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 393 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 394 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 395 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 396 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 397 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 398 399 break; 400 } 401 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 402 } 403 /* No ESP; look for other things. */ 404 if (*hayespp == 0) { 405 #endif 406 407 sc->sc_fifolen = 1; 408 /* look for a NS 16550AF UART with FIFOs */ 409 bus_space_write_1(iot, ioh, com_fifo, 410 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 411 delay(100); 412 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 413 == IIR_FIFO_MASK) 414 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 415 == FIFO_TRIGGER_14) { 416 SET(sc->sc_hwflags, COM_HW_FIFO); 417 printf(": ns16550a, working fifo\n"); 418 sc->sc_fifolen = 16; 419 } else 420 printf(": ns16550, broken fifo\n"); 421 else 422 printf(": ns8250 or ns16450, no fifo\n"); 423 bus_space_write_1(iot, ioh, com_fifo, 0); 424 #ifdef COM_HAYESP 425 } 426 #endif 427 428 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 429 SET(sc->sc_mcr, MCR_IENABLE); 430 431 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 432 int maj; 433 434 /* locate the major number */ 435 for (maj = 0; maj < nchrdev; maj++) 436 if (cdevsw[maj].d_open == comopen) 437 break; 438 439 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 440 #ifdef DDB 441 com_enable_debugport(sc); 442 #endif 443 printf("%s: console\n", sc->sc_dev.dv_xname); 444 } 445 446 #ifdef KGDB 447 /* 448 * Allow kgdb to "take over" this port. If this is 449 * the kgdb device, it has exclusive use. 450 */ 451 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 452 com_kgdb_attached = 1; 453 454 SET(sc->sc_hwflags, COM_HW_KGDB); 455 com_enable_debugport(sc); 456 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 457 } 458 #endif 459 460 #ifdef __GENERIC_SOFT_INTERRUPTS 461 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 462 #endif 463 464 #if NRND > 0 && defined(RND_COM) 465 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 466 RND_TYPE_TTY); 467 #endif 468 } 469 470 int 471 comopen(dev, flag, mode, p) 472 dev_t dev; 473 int flag, mode; 474 struct proc *p; 475 { 476 int unit = COMUNIT(dev); 477 struct com_softc *sc; 478 struct tty *tp; 479 int s, s2; 480 int error = 0; 481 482 if (unit >= com_cd.cd_ndevs) 483 return (ENXIO); 484 sc = com_cd.cd_devs[unit]; 485 if (!sc) 486 return (ENXIO); 487 488 #ifdef KGDB 489 /* 490 * If this is the kgdb port, no other use is permitted. 491 */ 492 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 493 return (EBUSY); 494 #endif 495 496 if (!sc->sc_tty) { 497 tp = sc->sc_tty = ttymalloc(); 498 tty_attach(tp); 499 } else 500 tp = sc->sc_tty; 501 502 if (ISSET(tp->t_state, TS_ISOPEN) && 503 ISSET(tp->t_state, TS_XCLUDE) && 504 p->p_ucred->cr_uid != 0) 505 return (EBUSY); 506 507 s = spltty(); 508 509 /* We need to set this early for the benefit of comsoft(). */ 510 SET(tp->t_state, TS_WOPEN); 511 512 /* 513 * Do the following iff this is a first open. 514 */ 515 if (!ISSET(tp->t_state, TS_ISOPEN)) { 516 struct termios t; 517 518 /* Turn on interrupts. */ 519 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 520 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 521 522 /* Fetch the current modem control status, needed later. */ 523 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 524 525 /* Add some entry points needed by the tty layer. */ 526 tp->t_oproc = comstart; 527 tp->t_param = comparam; 528 tp->t_hwiflow = comhwiflow; 529 tp->t_dev = dev; 530 531 /* 532 * Initialize the termios status to the defaults. Add in the 533 * sticky bits from TIOCSFLAGS. 534 */ 535 t.c_ispeed = 0; 536 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 537 t.c_ospeed = comconsrate; 538 t.c_cflag = comconscflag; 539 } else { 540 t.c_ospeed = TTYDEF_SPEED; 541 t.c_cflag = TTYDEF_CFLAG; 542 } 543 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 544 SET(t.c_cflag, CLOCAL); 545 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 546 SET(t.c_cflag, CRTSCTS); 547 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 548 SET(t.c_cflag, MDMBUF); 549 tp->t_iflag = TTYDEF_IFLAG; 550 tp->t_oflag = TTYDEF_OFLAG; 551 tp->t_lflag = TTYDEF_LFLAG; 552 ttychars(tp); 553 (void) comparam(tp, &t); 554 ttsetwater(tp); 555 556 s2 = splserial(); 557 558 /* 559 * Turn on DTR. We must always do this, even if carrier is not 560 * present, because otherwise we'd have to use TIOCSDTR 561 * immediately after setting CLOCAL. We will drop DTR only on 562 * the next high-low transition of DCD, or by explicit request. 563 */ 564 com_modem(sc, 1); 565 566 /* Clear the input ring, and unblock. */ 567 sc->sc_rbput = sc->sc_rbget = 0; 568 sc->sc_rbavail = RXBUFSIZE; 569 com_iflush(sc); 570 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 571 com_hwiflow(sc); 572 573 #ifdef COM_DEBUG 574 if (com_debug) 575 comstatus(sc, "comopen "); 576 #endif 577 578 splx(s2); 579 } 580 error = 0; 581 582 /* If we're doing a blocking open... */ 583 if (!ISSET(flag, O_NONBLOCK)) 584 /* ...then wait for carrier. */ 585 while (!ISSET(tp->t_state, TS_CARR_ON) && 586 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 587 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 588 ttopen, 0); 589 if (error) { 590 /* 591 * If the open was interrupted and nobody 592 * else has the device open, then hang up. 593 */ 594 if (!ISSET(tp->t_state, TS_ISOPEN)) { 595 com_modem(sc, 0); 596 CLR(tp->t_state, TS_WOPEN); 597 ttwakeup(tp); 598 } 599 break; 600 } 601 SET(tp->t_state, TS_WOPEN); 602 } 603 604 splx(s); 605 if (error == 0) 606 error = (*linesw[tp->t_line].l_open)(dev, tp); 607 return (error); 608 } 609 610 int 611 comclose(dev, flag, mode, p) 612 dev_t dev; 613 int flag, mode; 614 struct proc *p; 615 { 616 int unit = COMUNIT(dev); 617 struct com_softc *sc = com_cd.cd_devs[unit]; 618 struct tty *tp = sc->sc_tty; 619 int s; 620 621 /* XXX This is for cons.c. */ 622 if (!ISSET(tp->t_state, TS_ISOPEN)) 623 return (0); 624 625 (*linesw[tp->t_line].l_close)(tp, flag); 626 ttyclose(tp); 627 628 /* If we were asserting flow control, then deassert it. */ 629 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 630 com_hwiflow(sc); 631 /* Clear any break condition set with TIOCSBRK. */ 632 com_break(sc, 0); 633 /* 634 * Hang up if necessary. Wait a bit, so the other side has time to 635 * notice even if we immediately open the port again. 636 */ 637 if (ISSET(tp->t_cflag, HUPCL)) { 638 com_modem(sc, 0); 639 (void) tsleep(sc, TTIPRI, ttclos, hz); 640 } 641 642 s = splserial(); 643 /* Turn off interrupts. */ 644 #ifdef DDB 645 if(ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 646 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 647 else 648 #else 649 sc->sc_ier = 0; 650 #endif 651 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 652 splx(s); 653 654 return (0); 655 } 656 657 int 658 comread(dev, uio, flag) 659 dev_t dev; 660 struct uio *uio; 661 int flag; 662 { 663 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 664 struct tty *tp = sc->sc_tty; 665 666 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 667 } 668 669 int 670 comwrite(dev, uio, flag) 671 dev_t dev; 672 struct uio *uio; 673 int flag; 674 { 675 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 676 struct tty *tp = sc->sc_tty; 677 678 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 679 } 680 681 struct tty * 682 comtty(dev) 683 dev_t dev; 684 { 685 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 686 struct tty *tp = sc->sc_tty; 687 688 return (tp); 689 } 690 691 static u_char 692 tiocm_xxx2mcr(data) 693 int data; 694 { 695 u_char m = 0; 696 697 if (ISSET(data, TIOCM_DTR)) 698 SET(m, MCR_DTR); 699 if (ISSET(data, TIOCM_RTS)) 700 SET(m, MCR_RTS); 701 return m; 702 } 703 704 int 705 comioctl(dev, cmd, data, flag, p) 706 dev_t dev; 707 u_long cmd; 708 caddr_t data; 709 int flag; 710 struct proc *p; 711 { 712 int unit = COMUNIT(dev); 713 struct com_softc *sc = com_cd.cd_devs[unit]; 714 struct tty *tp = sc->sc_tty; 715 int error; 716 717 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 718 if (error >= 0) 719 return (error); 720 721 error = ttioctl(tp, cmd, data, flag, p); 722 if (error >= 0) 723 return (error); 724 725 switch (cmd) { 726 case TIOCSBRK: 727 com_break(sc, 1); 728 break; 729 730 case TIOCCBRK: 731 com_break(sc, 0); 732 break; 733 734 case TIOCSDTR: 735 com_modem(sc, 1); 736 break; 737 738 case TIOCCDTR: 739 com_modem(sc, 0); 740 break; 741 742 case TIOCGFLAGS: 743 *(int *)data = sc->sc_swflags; 744 break; 745 746 case TIOCSFLAGS: 747 error = suser(p->p_ucred, &p->p_acflag); 748 if (error) 749 return (error); 750 sc->sc_swflags = *(int *)data; 751 break; 752 753 case TIOCMSET: 754 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 755 /*FALLTHROUGH*/ 756 757 case TIOCMBIS: 758 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 759 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 760 break; 761 762 case TIOCMBIC: 763 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 764 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 765 break; 766 767 case TIOCMGET: { 768 u_char m; 769 int bits = 0; 770 771 m = sc->sc_mcr; 772 if (ISSET(m, MCR_DTR)) 773 SET(bits, TIOCM_DTR); 774 if (ISSET(m, MCR_RTS)) 775 SET(bits, TIOCM_RTS); 776 m = sc->sc_msr; 777 if (ISSET(m, MSR_DCD)) 778 SET(bits, TIOCM_CD); 779 if (ISSET(m, MSR_CTS)) 780 SET(bits, TIOCM_CTS); 781 if (ISSET(m, MSR_DSR)) 782 SET(bits, TIOCM_DSR); 783 if (ISSET(m, MSR_RI | MSR_TERI)) 784 SET(bits, TIOCM_RI); 785 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 786 SET(bits, TIOCM_LE); 787 *(int *)data = bits; 788 break; 789 } 790 default: 791 return (ENOTTY); 792 } 793 794 #ifdef COM_DEBUG 795 if (com_debug) 796 comstatus(sc, "comioctl "); 797 #endif 798 799 return (0); 800 } 801 802 integrate void 803 com_schedrx(sc) 804 struct com_softc *sc; 805 { 806 807 sc->sc_rx_ready = 1; 808 809 /* Wake up the poller. */ 810 #ifdef __GENERIC_SOFT_INTERRUPTS 811 softintr_schedule(sc->sc_si); 812 #else 813 #ifndef alpha 814 setsoftserial(); 815 #else 816 if (!com_softintr_scheduled) { 817 com_softintr_scheduled = 1; 818 timeout(comsoft, NULL, 1); 819 } 820 #endif 821 #endif 822 } 823 824 void 825 com_break(sc, onoff) 826 struct com_softc *sc; 827 int onoff; 828 { 829 int s; 830 831 s = splserial(); 832 if (onoff) 833 SET(sc->sc_lcr, LCR_SBREAK); 834 else 835 CLR(sc->sc_lcr, LCR_SBREAK); 836 837 if (!sc->sc_heldchange) { 838 if (sc->sc_tx_busy) { 839 sc->sc_heldtbc = sc->sc_tbc; 840 sc->sc_tbc = 0; 841 sc->sc_heldchange = 1; 842 } else 843 com_loadchannelregs(sc); 844 } 845 splx(s); 846 } 847 848 void 849 com_modem(sc, onoff) 850 struct com_softc *sc; 851 int onoff; 852 { 853 int s; 854 855 s = splserial(); 856 if (onoff) 857 SET(sc->sc_mcr, sc->sc_mcr_dtr); 858 else 859 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 860 861 if (!sc->sc_heldchange) { 862 if (sc->sc_tx_busy) { 863 sc->sc_heldtbc = sc->sc_tbc; 864 sc->sc_tbc = 0; 865 sc->sc_heldchange = 1; 866 } else 867 com_loadchannelregs(sc); 868 } 869 splx(s); 870 } 871 872 static u_char 873 cflag2lcr(cflag) 874 tcflag_t cflag; 875 { 876 u_char lcr = 0; 877 878 switch (ISSET(cflag, CSIZE)) { 879 case CS5: 880 SET(lcr, LCR_5BITS); 881 break; 882 case CS6: 883 SET(lcr, LCR_6BITS); 884 break; 885 case CS7: 886 SET(lcr, LCR_7BITS); 887 break; 888 case CS8: 889 SET(lcr, LCR_8BITS); 890 break; 891 } 892 if (ISSET(cflag, PARENB)) { 893 SET(lcr, LCR_PENAB); 894 if (!ISSET(cflag, PARODD)) 895 SET(lcr, LCR_PEVEN); 896 } 897 if (ISSET(cflag, CSTOPB)) 898 SET(lcr, LCR_STOPB); 899 900 return (lcr); 901 } 902 903 int 904 comparam(tp, t) 905 struct tty *tp; 906 struct termios *t; 907 { 908 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 909 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 910 u_char lcr; 911 int s; 912 913 /* check requested parameters */ 914 if (ospeed < 0) 915 return (EINVAL); 916 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 917 return (EINVAL); 918 919 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 920 921 s = splserial(); 922 923 sc->sc_lcr = lcr; 924 925 /* 926 * For the console, always force CLOCAL and !HUPCL, so that the port 927 * is always active. 928 */ 929 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 930 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 931 SET(t->c_cflag, CLOCAL); 932 CLR(t->c_cflag, HUPCL); 933 } 934 935 /* 936 * If we're not in a mode that assumes a connection is present, then 937 * ignore carrier changes. 938 */ 939 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 940 sc->sc_msr_dcd = 0; 941 else 942 sc->sc_msr_dcd = MSR_DCD; 943 /* 944 * Set the flow control pins depending on the current flow control 945 * mode. 946 */ 947 if (ISSET(t->c_cflag, CRTSCTS)) { 948 sc->sc_mcr_dtr = MCR_DTR; 949 sc->sc_mcr_rts = MCR_RTS; 950 sc->sc_msr_cts = MSR_CTS; 951 sc->sc_r_hiwat = RXHIWAT; 952 sc->sc_r_lowat = RXLOWAT; 953 } else if (ISSET(t->c_cflag, MDMBUF)) { 954 /* 955 * For DTR/DCD flow control, make sure we don't toggle DTR for 956 * carrier detection. 957 */ 958 sc->sc_mcr_dtr = 0; 959 sc->sc_mcr_rts = MCR_DTR; 960 sc->sc_msr_cts = MSR_DCD; 961 sc->sc_r_hiwat = RXHIWAT; 962 sc->sc_r_lowat = RXLOWAT; 963 } else { 964 /* 965 * If no flow control, then always set RTS. This will make 966 * the other side happy if it mistakenly thinks we're doing 967 * RTS/CTS flow control. 968 */ 969 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 970 sc->sc_mcr_rts = 0; 971 sc->sc_msr_cts = 0; 972 sc->sc_r_hiwat = 0; 973 sc->sc_r_lowat = 0; 974 if (ISSET(sc->sc_mcr, MCR_DTR)) 975 SET(sc->sc_mcr, MCR_RTS); 976 else 977 CLR(sc->sc_mcr, MCR_RTS); 978 } 979 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 980 981 #if 0 982 if (ospeed == 0) 983 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 984 else 985 SET(sc->sc_mcr, sc->sc_mcr_dtr); 986 #endif 987 988 sc->sc_dlbl = ospeed; 989 sc->sc_dlbh = ospeed >> 8; 990 991 /* 992 * Set the FIFO threshold based on the receive speed. 993 * 994 * * If it's a low speed, it's probably a mouse or some other 995 * interactive device, so set the threshold low. 996 * * If it's a high speed, trim the trigger level down to prevent 997 * overflows. 998 * * Otherwise set it a bit higher. 999 */ 1000 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1001 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1002 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1003 sc->sc_fifo = FIFO_ENABLE | 1004 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1005 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1006 else 1007 sc->sc_fifo = 0; 1008 1009 /* and copy to tty */ 1010 tp->t_ispeed = 0; 1011 tp->t_ospeed = t->c_ospeed; 1012 tp->t_cflag = t->c_cflag; 1013 1014 if (!sc->sc_heldchange) { 1015 if (sc->sc_tx_busy) { 1016 sc->sc_heldtbc = sc->sc_tbc; 1017 sc->sc_tbc = 0; 1018 sc->sc_heldchange = 1; 1019 } else 1020 com_loadchannelregs(sc); 1021 } 1022 1023 splx(s); 1024 1025 /* 1026 * Update the tty layer's idea of the carrier bit, in case we changed 1027 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1028 * lose carrier while carrier detection is on. 1029 */ 1030 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1031 1032 #ifdef COM_DEBUG 1033 if (com_debug) 1034 comstatus(sc, "comparam "); 1035 #endif 1036 1037 /* Block or unblock as needed. */ 1038 if (!ISSET(t->c_cflag, CHWFLOW)) { 1039 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1040 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1041 com_schedrx(sc); 1042 } 1043 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1044 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1045 com_hwiflow(sc); 1046 } 1047 if (sc->sc_tx_stopped) { 1048 sc->sc_tx_stopped = 0; 1049 comstart(tp); 1050 } 1051 } else { 1052 /* XXXXX FIX ME */ 1053 #if 0 1054 commsrint(sc, tp); 1055 #endif 1056 } 1057 1058 return (0); 1059 } 1060 1061 void 1062 com_iflush(sc) 1063 struct com_softc *sc; 1064 { 1065 bus_space_tag_t iot = sc->sc_iot; 1066 bus_space_handle_t ioh = sc->sc_ioh; 1067 1068 /* flush any pending I/O */ 1069 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1070 (void) bus_space_read_1(iot, ioh, com_data); 1071 } 1072 1073 void 1074 com_loadchannelregs(sc) 1075 struct com_softc *sc; 1076 { 1077 bus_space_tag_t iot = sc->sc_iot; 1078 bus_space_handle_t ioh = sc->sc_ioh; 1079 1080 /* XXXXX necessary? */ 1081 com_iflush(sc); 1082 1083 bus_space_write_1(iot, ioh, com_ier, 0); 1084 1085 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1086 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1087 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1088 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1089 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1090 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1091 1092 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1093 } 1094 1095 int 1096 comhwiflow(tp, block) 1097 struct tty *tp; 1098 int block; 1099 { 1100 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1101 int s; 1102 1103 if (sc->sc_mcr_rts == 0) 1104 return (0); 1105 1106 s = splserial(); 1107 if (block) { 1108 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1109 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1110 com_hwiflow(sc); 1111 } 1112 } else { 1113 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1114 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1115 com_schedrx(sc); 1116 } 1117 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1118 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1119 com_hwiflow(sc); 1120 } 1121 } 1122 splx(s); 1123 return (1); 1124 } 1125 1126 /* 1127 * (un)block input via hw flowcontrol 1128 */ 1129 void 1130 com_hwiflow(sc) 1131 struct com_softc *sc; 1132 { 1133 bus_space_tag_t iot = sc->sc_iot; 1134 bus_space_handle_t ioh = sc->sc_ioh; 1135 1136 if (sc->sc_mcr_rts == 0) 1137 return; 1138 1139 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1140 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1141 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1142 } else { 1143 SET(sc->sc_mcr, sc->sc_mcr_rts); 1144 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1145 } 1146 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1147 } 1148 1149 1150 void 1151 comstart(tp) 1152 struct tty *tp; 1153 { 1154 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1155 bus_space_tag_t iot = sc->sc_iot; 1156 bus_space_handle_t ioh = sc->sc_ioh; 1157 int s; 1158 1159 s = spltty(); 1160 if (ISSET(tp->t_state, TS_BUSY)) 1161 goto out; 1162 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1163 goto stopped; 1164 1165 if (sc->sc_tx_stopped) 1166 goto stopped; 1167 1168 if (tp->t_outq.c_cc <= tp->t_lowat) { 1169 if (ISSET(tp->t_state, TS_ASLEEP)) { 1170 CLR(tp->t_state, TS_ASLEEP); 1171 wakeup(&tp->t_outq); 1172 } 1173 selwakeup(&tp->t_wsel); 1174 if (tp->t_outq.c_cc == 0) 1175 goto stopped; 1176 } 1177 1178 /* Grab the first contiguous region of buffer space. */ 1179 { 1180 u_char *tba; 1181 int tbc; 1182 1183 tba = tp->t_outq.c_cf; 1184 tbc = ndqb(&tp->t_outq, 0); 1185 1186 (void)splserial(); 1187 1188 sc->sc_tba = tba; 1189 sc->sc_tbc = tbc; 1190 } 1191 1192 SET(tp->t_state, TS_BUSY); 1193 sc->sc_tx_busy = 1; 1194 1195 /* Enable transmit completion interrupts if necessary. */ 1196 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1197 SET(sc->sc_ier, IER_ETXRDY); 1198 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1199 } 1200 1201 /* Output the first chunk of the contiguous buffer. */ 1202 { 1203 int n; 1204 1205 n = sc->sc_fifolen; 1206 if (n > sc->sc_tbc) 1207 n = sc->sc_tbc; 1208 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1209 sc->sc_tbc -= n; 1210 sc->sc_tba += n; 1211 } 1212 splx(s); 1213 return; 1214 1215 stopped: 1216 /* Disable transmit completion interrupts if necessary. */ 1217 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1218 CLR(sc->sc_ier, IER_ETXRDY); 1219 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1220 } 1221 out: 1222 splx(s); 1223 return; 1224 } 1225 1226 /* 1227 * Stop output on a line. 1228 */ 1229 void 1230 comstop(tp, flag) 1231 struct tty *tp; 1232 int flag; 1233 { 1234 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1235 int s; 1236 1237 s = splserial(); 1238 if (ISSET(tp->t_state, TS_BUSY)) { 1239 /* Stop transmitting at the next chunk. */ 1240 sc->sc_tbc = 0; 1241 sc->sc_heldtbc = 0; 1242 if (!ISSET(tp->t_state, TS_TTSTOP)) 1243 SET(tp->t_state, TS_FLUSH); 1244 } 1245 splx(s); 1246 } 1247 1248 void 1249 comdiag(arg) 1250 void *arg; 1251 { 1252 struct com_softc *sc = arg; 1253 int overflows, floods; 1254 int s; 1255 1256 s = splserial(); 1257 overflows = sc->sc_overflows; 1258 sc->sc_overflows = 0; 1259 floods = sc->sc_floods; 1260 sc->sc_floods = 0; 1261 sc->sc_errors = 0; 1262 splx(s); 1263 1264 log(LOG_WARNING, 1265 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1266 sc->sc_dev.dv_xname, 1267 overflows, overflows == 1 ? "" : "s", 1268 floods, floods == 1 ? "" : "s"); 1269 } 1270 1271 integrate void 1272 comrxint(sc, tp) 1273 struct com_softc *sc; 1274 struct tty *tp; 1275 { 1276 u_int get, cc, scc; 1277 int code; 1278 u_char lsr; 1279 int s; 1280 static int lsrmap[8] = { 1281 0, TTY_PE, 1282 TTY_FE, TTY_PE|TTY_FE, 1283 TTY_FE, TTY_PE|TTY_FE, 1284 TTY_FE, TTY_PE|TTY_FE 1285 }; 1286 1287 get = sc->sc_rbget; 1288 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1289 1290 if (cc == RXBUFSIZE) { 1291 sc->sc_floods++; 1292 if (sc->sc_errors++ == 0) 1293 timeout(comdiag, sc, 60 * hz); 1294 } 1295 1296 while (cc) { 1297 lsr = sc->sc_lbuf[get]; 1298 if (ISSET(lsr, LSR_OE)) { 1299 sc->sc_overflows++; 1300 if (sc->sc_errors++ == 0) 1301 timeout(comdiag, sc, 60 * hz); 1302 } 1303 code = sc->sc_rbuf[get] | 1304 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1305 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1306 /* 1307 * The line discipline's buffer is out of space. 1308 */ 1309 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1310 /* 1311 * We're either not using flow control, or the 1312 * line discipline didn't tell us to block for 1313 * some reason. Either way, we have no way to 1314 * know when there's more space available, so 1315 * just drop the rest of the data. 1316 */ 1317 get = (get + cc) & RXBUFMASK; 1318 cc = 0; 1319 } else { 1320 /* 1321 * Don't schedule any more receive processing 1322 * until the line discipline tells us there's 1323 * space available (through comhwiflow()). 1324 * Leave the rest of the data in the input 1325 * buffer. 1326 */ 1327 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1328 } 1329 break; 1330 } 1331 get = (get + 1) & RXBUFMASK; 1332 cc--; 1333 } 1334 1335 if (cc != scc) { 1336 sc->sc_rbget = get; 1337 s = splserial(); 1338 cc = sc->sc_rbavail += scc - cc; 1339 /* Buffers should be ok again, release possible block. */ 1340 if (cc >= sc->sc_r_lowat) { 1341 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1342 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1343 SET(sc->sc_ier, IER_ERXRDY); 1344 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1345 } 1346 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1347 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1348 com_hwiflow(sc); 1349 } 1350 } 1351 splx(s); 1352 } 1353 } 1354 1355 integrate void 1356 comtxint(sc, tp) 1357 struct com_softc *sc; 1358 struct tty *tp; 1359 { 1360 1361 CLR(tp->t_state, TS_BUSY); 1362 if (ISSET(tp->t_state, TS_FLUSH)) 1363 CLR(tp->t_state, TS_FLUSH); 1364 else 1365 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1366 (*linesw[tp->t_line].l_start)(tp); 1367 } 1368 1369 integrate void 1370 commsrint(sc, tp) 1371 struct com_softc *sc; 1372 struct tty *tp; 1373 { 1374 u_char msr, delta; 1375 int s; 1376 1377 s = splserial(); 1378 msr = sc->sc_msr; 1379 delta = sc->sc_msr_delta; 1380 sc->sc_msr_delta = 0; 1381 splx(s); 1382 1383 if (ISSET(delta, sc->sc_msr_dcd)) { 1384 /* 1385 * Inform the tty layer that carrier detect changed. 1386 */ 1387 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1388 } 1389 1390 if (ISSET(delta, sc->sc_msr_cts)) { 1391 /* Block or unblock output according to flow control. */ 1392 if (ISSET(msr, sc->sc_msr_cts)) { 1393 sc->sc_tx_stopped = 0; 1394 (*linesw[tp->t_line].l_start)(tp); 1395 } else { 1396 sc->sc_tx_stopped = 1; 1397 } 1398 } 1399 1400 #ifdef COM_DEBUG 1401 if (com_debug) 1402 comstatus(sc, "commsrint"); 1403 #endif 1404 } 1405 1406 #ifdef __GENERIC_SOFT_INTERRUPTS 1407 void 1408 comsoft(arg) 1409 void *arg; 1410 { 1411 struct com_softc *sc = arg; 1412 struct tty *tp; 1413 1414 { 1415 #else 1416 void 1417 #ifndef alpha 1418 comsoft() 1419 #else 1420 comsoft(arg) 1421 void *arg; 1422 #endif 1423 { 1424 struct com_softc *sc; 1425 struct tty *tp; 1426 int unit; 1427 #ifdef alpha 1428 int s; 1429 1430 s = splsoftserial(); 1431 com_softintr_scheduled = 0; 1432 #endif 1433 1434 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1435 sc = com_cd.cd_devs[unit]; 1436 if (sc == NULL) 1437 continue; 1438 1439 tp = sc->sc_tty; 1440 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1441 continue; 1442 #endif 1443 tp = sc->sc_tty; 1444 1445 if (sc->sc_rx_ready) { 1446 sc->sc_rx_ready = 0; 1447 comrxint(sc, tp); 1448 } 1449 1450 if (sc->sc_st_check) { 1451 sc->sc_st_check = 0; 1452 commsrint(sc, tp); 1453 } 1454 1455 if (sc->sc_tx_done) { 1456 sc->sc_tx_done = 0; 1457 comtxint(sc, tp); 1458 } 1459 } 1460 1461 #ifndef __GENERIC_SOFT_INTERRUPTS 1462 #ifdef alpha 1463 splx(s); 1464 #endif 1465 #endif 1466 } 1467 1468 int 1469 comintr(arg) 1470 void *arg; 1471 { 1472 struct com_softc *sc = arg; 1473 bus_space_tag_t iot = sc->sc_iot; 1474 bus_space_handle_t ioh = sc->sc_ioh; 1475 u_char lsr, iir; 1476 u_int put, cc; 1477 1478 iir = bus_space_read_1(iot, ioh, com_iir); 1479 if (ISSET(iir, IIR_NOPEND)) 1480 return (0); 1481 1482 put = sc->sc_rbput; 1483 cc = sc->sc_rbavail; 1484 1485 do { 1486 u_char msr, delta; 1487 1488 lsr = bus_space_read_1(iot, ioh, com_lsr); 1489 #if defined(DDB) || defined(KGDB) 1490 if (ISSET(lsr, LSR_BI)) { 1491 #ifdef DDB 1492 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1493 Debugger(); 1494 continue; 1495 } 1496 #endif 1497 #ifdef KGDB 1498 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1499 kgdb_connect(1); 1500 continue; 1501 } 1502 #endif 1503 } 1504 #endif /* DDB || KGDB */ 1505 1506 if (ISSET(lsr, LSR_RCV_MASK) && 1507 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1508 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1509 sc->sc_rbuf[put] = 1510 bus_space_read_1(iot, ioh, com_data); 1511 sc->sc_lbuf[put] = lsr; 1512 put = (put + 1) & RXBUFMASK; 1513 lsr = bus_space_read_1(iot, ioh, com_lsr); 1514 } 1515 /* 1516 * Current string of incoming characters ended because 1517 * no more data was available. Schedule a receive event 1518 * if any data was received. Drop any characters that 1519 * we couldn't handle. 1520 */ 1521 sc->sc_rbput = put; 1522 sc->sc_rbavail = cc; 1523 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1524 sc->sc_rx_ready = 1; 1525 /* 1526 * See if we are in danger of overflowing a buffer. If 1527 * so, use hardware flow control to ease the pressure. 1528 */ 1529 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1530 cc < sc->sc_r_hiwat) { 1531 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1532 com_hwiflow(sc); 1533 } 1534 /* 1535 * If we're out of space, disable receive interrupts 1536 * until the queue has drained a bit. 1537 */ 1538 if (!cc) { 1539 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1540 CLR(sc->sc_ier, IER_ERXRDY); 1541 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1542 } 1543 } else { 1544 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1545 bus_space_write_1(iot, ioh, com_ier, 0); 1546 delay(10); 1547 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1548 iir = IIR_NOPEND; 1549 continue; 1550 } 1551 } 1552 1553 msr = bus_space_read_1(iot, ioh, com_msr); 1554 delta = msr ^ sc->sc_msr; 1555 sc->sc_msr = msr; 1556 if (ISSET(delta, sc->sc_msr_mask)) { 1557 sc->sc_msr_delta |= delta; 1558 1559 /* 1560 * Stop output immediately if we lose the output 1561 * flow control signal or carrier detect. 1562 */ 1563 if (ISSET(~msr, sc->sc_msr_mask)) { 1564 sc->sc_tbc = 0; 1565 sc->sc_heldtbc = 0; 1566 #ifdef COM_DEBUG 1567 if (com_debug) 1568 comstatus(sc, "comintr "); 1569 #endif 1570 } 1571 1572 sc->sc_st_check = 1; 1573 } 1574 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1575 1576 /* 1577 * Done handling any receive interrupts. See if data can be 1578 * transmitted as well. Schedule tx done event if no data left 1579 * and tty was marked busy. 1580 */ 1581 if (ISSET(lsr, LSR_TXRDY)) { 1582 /* 1583 * If we've delayed a parameter change, do it now, and restart 1584 * output. 1585 */ 1586 if (sc->sc_heldchange) { 1587 com_loadchannelregs(sc); 1588 sc->sc_heldchange = 0; 1589 sc->sc_tbc = sc->sc_heldtbc; 1590 sc->sc_heldtbc = 0; 1591 } 1592 /* Output the next chunk of the contiguous buffer, if any. */ 1593 if (sc->sc_tbc > 0) { 1594 int n; 1595 1596 n = sc->sc_fifolen; 1597 if (n > sc->sc_tbc) 1598 n = sc->sc_tbc; 1599 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1600 sc->sc_tbc -= n; 1601 sc->sc_tba += n; 1602 } else if (sc->sc_tx_busy) { 1603 sc->sc_tx_busy = 0; 1604 sc->sc_tx_done = 1; 1605 } 1606 } 1607 1608 /* Wake up the poller. */ 1609 #ifdef __GENERIC_SOFT_INTERRUPTS 1610 softintr_schedule(sc->sc_si); 1611 #else 1612 #ifndef alpha 1613 setsoftserial(); 1614 #else 1615 if (!com_softintr_scheduled) { 1616 com_softintr_scheduled = 1; 1617 timeout(comsoft, NULL, 1); 1618 } 1619 #endif 1620 #endif 1621 1622 #if NRND > 0 && defined(RND_COM) 1623 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1624 #endif 1625 1626 return (1); 1627 } 1628 1629 /* 1630 * The following functions are polled getc and putc routines, shared 1631 * by the console and kgdb glue. 1632 */ 1633 1634 int 1635 com_common_getc(iot, ioh) 1636 bus_space_tag_t iot; 1637 bus_space_handle_t ioh; 1638 { 1639 int s = splserial(); 1640 u_char stat, c; 1641 1642 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1643 ; 1644 c = bus_space_read_1(iot, ioh, com_data); 1645 stat = bus_space_read_1(iot, ioh, com_iir); 1646 splx(s); 1647 return (c); 1648 } 1649 1650 void 1651 com_common_putc(iot, ioh, c) 1652 bus_space_tag_t iot; 1653 bus_space_handle_t ioh; 1654 int c; 1655 { 1656 int s = splserial(); 1657 u_char stat; 1658 register int timo; 1659 1660 /* wait for any pending transmission to finish */ 1661 timo = 50000; 1662 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1663 && --timo) 1664 ; 1665 bus_space_write_1(iot, ioh, com_data, c); 1666 /* wait for this transmission to complete */ 1667 timo = 1500000; 1668 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1669 && --timo) 1670 ; 1671 /* clear any interrupts generated by this transmission */ 1672 stat = bus_space_read_1(iot, ioh, com_iir); 1673 splx(s); 1674 } 1675 1676 /* 1677 * Initialize UART to known state. 1678 */ 1679 int 1680 cominit(iot, iobase, rate, frequency, cflag, iohp) 1681 bus_space_tag_t iot; 1682 int iobase; 1683 int rate, frequency; 1684 tcflag_t cflag; 1685 bus_space_handle_t *iohp; 1686 { 1687 bus_space_handle_t ioh; 1688 1689 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1690 return (ENOMEM); /* ??? */ 1691 1692 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1693 rate = comspeed(rate, frequency); 1694 bus_space_write_1(iot, ioh, com_dlbl, rate); 1695 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1696 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1697 bus_space_write_1(iot, ioh, com_mcr, 0); 1698 bus_space_write_1(iot, ioh, com_fifo, 1699 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1700 bus_space_write_1(iot, ioh, com_ier, 0); 1701 1702 *iohp = ioh; 1703 return (0); 1704 } 1705 1706 /* 1707 * Following are all routines needed for COM to act as console 1708 */ 1709 1710 int 1711 comcnattach(iot, iobase, rate, frequency, cflag) 1712 bus_space_tag_t iot; 1713 int iobase; 1714 int rate, frequency; 1715 tcflag_t cflag; 1716 { 1717 int res; 1718 static struct consdev comcons = { NULL, NULL, 1719 comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL}; 1720 1721 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1722 if (res) 1723 return (res); 1724 1725 cn_tab = &comcons; 1726 1727 comconstag = iot; 1728 comconsaddr = iobase; 1729 comconsrate = rate; 1730 comconscflag = cflag; 1731 1732 return (0); 1733 } 1734 1735 int 1736 comcngetc(dev) 1737 dev_t dev; 1738 { 1739 1740 return (com_common_getc(comconstag, comconsioh)); 1741 } 1742 1743 /* 1744 * Console kernel output character routine. 1745 */ 1746 void 1747 comcnputc(dev, c) 1748 dev_t dev; 1749 int c; 1750 { 1751 1752 com_common_putc(comconstag, comconsioh, c); 1753 } 1754 1755 void 1756 comcnpollc(dev, on) 1757 dev_t dev; 1758 int on; 1759 { 1760 1761 } 1762 1763 #ifdef KGDB 1764 int 1765 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1766 bus_space_tag_t iot; 1767 int iobase; 1768 int rate, frequency; 1769 tcflag_t cflag; 1770 { 1771 int res; 1772 1773 if (iot == comconstag && iobase == comconsaddr) 1774 return (EBUSY); /* cannot share with console */ 1775 1776 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1777 if (res) 1778 return (res); 1779 1780 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1781 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1782 1783 com_kgdb_iot = iot; 1784 com_kgdb_addr = iobase; 1785 1786 return (0); 1787 } 1788 1789 /* ARGSUSED */ 1790 int 1791 com_kgdb_getc(arg) 1792 void *arg; 1793 { 1794 1795 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1796 } 1797 1798 /* ARGSUSED */ 1799 void 1800 com_kgdb_putc(arg, c) 1801 void *arg; 1802 int c; 1803 { 1804 1805 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1806 } 1807 #endif /* KGDB */ 1808 1809 /* helper function to identify the com ports used by 1810 console or KGDB (and not yet autoconf attached) */ 1811 int 1812 com_is_console(iot, iobase, ioh) 1813 bus_space_tag_t iot; 1814 int iobase; 1815 bus_space_handle_t *ioh; 1816 { 1817 bus_space_handle_t help; 1818 1819 if (!comconsattached && 1820 iot == comconstag && iobase == comconsaddr) 1821 help = comconsioh; 1822 #ifdef KGDB 1823 else if (!com_kgdb_attached && 1824 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1825 help = com_kgdb_ioh; 1826 #endif 1827 else 1828 return (0); 1829 1830 if (ioh) 1831 *ioh = help; 1832 return (1); 1833 } 1834
Indexes created Thu Oct 23 22:10:10 GMT 2025