com.c revision 1.116
1 /* $NetBSD: com.c,v 1.116 1997/10/19 14:26:16 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 u_int8_t lcr; 354 #ifdef COM_HAYESP 355 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 356 int *hayespp; 357 #endif 358 359 if (iot == comconstag && iobase == comconsaddr) { 360 comconsattached = 1; 361 362 /* Make sure the console is always "hardwired". */ 363 delay(1000); /* wait for output to finish */ 364 SET(sc->sc_hwflags, COM_HW_CONSOLE); 365 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 366 } 367 368 #ifdef COM_HAYESP 369 /* Look for a Hayes ESP board. */ 370 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 371 bus_space_handle_t hayespioh; 372 373 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 374 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 375 continue; 376 if (comprobeHAYESP(hayespioh, sc)) { 377 sc->sc_hayespioh = hayespioh; 378 sc->sc_fifolen = 1024; 379 380 /* Set 16550 compatibility mode */ 381 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 382 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 383 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 384 HAYESP_MODE_SCALE); 385 386 /* Set RTS/CTS flow control */ 387 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 388 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 389 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 390 391 /* Set flow control levels */ 392 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 394 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 396 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 397 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 398 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 401 402 break; 403 } 404 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 405 } 406 /* No ESP; look for other things. */ 407 if (*hayespp == 0) { 408 #endif 409 sc->sc_fifolen = 1; 410 /* look for a NS 16550AF UART with FIFOs */ 411 bus_space_write_1(iot, ioh, com_fifo, 412 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 413 delay(100); 414 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 415 == IIR_FIFO_MASK) 416 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 417 == FIFO_TRIGGER_14) { 418 SET(sc->sc_hwflags, COM_HW_FIFO); 419 420 /* 421 * IIR changes into the EFR if LCR is set to LCR_EERS 422 * on 16650s. We also know IIR != 0 at this point. 423 * Write 0 into the EFR, and read it. If the result 424 * is 0, we have a 16650. 425 * 426 * Older 16650s were broken; the test to detect them 427 * is taken from the Linux driver. Apparently 428 * setting DLAB enable gives access to the EFR on 429 * these chips. 430 */ 431 lcr = bus_space_read_1(iot, ioh, com_lcr); 432 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 433 bus_space_write_1(iot, ioh, com_efr, 0); 434 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 435 bus_space_write_1(iot, ioh, com_lcr, 436 lcr | LCR_DLAB); 437 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 438 CLR(sc->sc_hwflags, COM_HW_FIFO); 439 sc->sc_fifolen = 0; 440 printf(": st16650, broken fifo\n"); 441 } else { 442 SET(sc->sc_hwflags, COM_HW_FLOW); 443 printf(": st16650a, working fifo\n"); 444 sc->sc_fifolen = 32; 445 } 446 } else { 447 printf(": ns16550a, working fifo\n"); 448 sc->sc_fifolen = 16; 449 } 450 451 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 452 } else 453 printf(": ns16550, broken fifo\n"); 454 else 455 printf(": ns8250 or ns16450, no fifo\n"); 456 bus_space_write_1(iot, ioh, com_fifo, 0); 457 #ifdef COM_HAYESP 458 } 459 #endif 460 461 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 462 SET(sc->sc_mcr, MCR_IENABLE); 463 464 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 465 int maj; 466 467 /* locate the major number */ 468 for (maj = 0; maj < nchrdev; maj++) 469 if (cdevsw[maj].d_open == comopen) 470 break; 471 472 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 473 #ifdef DDB 474 com_enable_debugport(sc); 475 #endif 476 printf("%s: console\n", sc->sc_dev.dv_xname); 477 } 478 479 #ifdef KGDB 480 /* 481 * Allow kgdb to "take over" this port. If this is 482 * the kgdb device, it has exclusive use. 483 */ 484 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 485 com_kgdb_attached = 1; 486 487 SET(sc->sc_hwflags, COM_HW_KGDB); 488 com_enable_debugport(sc); 489 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 490 } 491 #endif 492 493 #ifdef __GENERIC_SOFT_INTERRUPTS 494 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 495 #endif 496 497 #if NRND > 0 && defined(RND_COM) 498 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 499 RND_TYPE_TTY); 500 #endif 501 } 502 503 int 504 comopen(dev, flag, mode, p) 505 dev_t dev; 506 int flag, mode; 507 struct proc *p; 508 { 509 int unit = COMUNIT(dev); 510 struct com_softc *sc; 511 struct tty *tp; 512 int s, s2; 513 int error = 0; 514 515 if (unit >= com_cd.cd_ndevs) 516 return (ENXIO); 517 sc = com_cd.cd_devs[unit]; 518 if (!sc) 519 return (ENXIO); 520 521 #ifdef KGDB 522 /* 523 * If this is the kgdb port, no other use is permitted. 524 */ 525 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 526 return (EBUSY); 527 #endif 528 529 if (!sc->sc_tty) { 530 tp = sc->sc_tty = ttymalloc(); 531 tty_attach(tp); 532 } else 533 tp = sc->sc_tty; 534 535 if (ISSET(tp->t_state, TS_ISOPEN) && 536 ISSET(tp->t_state, TS_XCLUDE) && 537 p->p_ucred->cr_uid != 0) 538 return (EBUSY); 539 540 s = spltty(); 541 542 /* We need to set this early for the benefit of comsoft(). */ 543 SET(tp->t_state, TS_WOPEN); 544 545 /* 546 * Do the following iff this is a first open. 547 */ 548 if (!ISSET(tp->t_state, TS_ISOPEN)) { 549 struct termios t; 550 551 /* Turn on interrupts. */ 552 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 553 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 554 555 /* Fetch the current modem control status, needed later. */ 556 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 557 558 /* Add some entry points needed by the tty layer. */ 559 tp->t_oproc = comstart; 560 tp->t_param = comparam; 561 tp->t_hwiflow = comhwiflow; 562 tp->t_dev = dev; 563 564 /* 565 * Initialize the termios status to the defaults. Add in the 566 * sticky bits from TIOCSFLAGS. 567 */ 568 t.c_ispeed = 0; 569 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 570 t.c_ospeed = comconsrate; 571 t.c_cflag = comconscflag; 572 } else { 573 t.c_ospeed = TTYDEF_SPEED; 574 t.c_cflag = TTYDEF_CFLAG; 575 } 576 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 577 SET(t.c_cflag, CLOCAL); 578 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 579 SET(t.c_cflag, CRTSCTS); 580 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 581 SET(t.c_cflag, MDMBUF); 582 tp->t_iflag = TTYDEF_IFLAG; 583 tp->t_oflag = TTYDEF_OFLAG; 584 tp->t_lflag = TTYDEF_LFLAG; 585 ttychars(tp); 586 (void) comparam(tp, &t); 587 ttsetwater(tp); 588 589 s2 = splserial(); 590 591 /* 592 * Turn on DTR. We must always do this, even if carrier is not 593 * present, because otherwise we'd have to use TIOCSDTR 594 * immediately after setting CLOCAL. We will drop DTR only on 595 * the next high-low transition of DCD, or by explicit request. 596 */ 597 com_modem(sc, 1); 598 599 /* Clear the input ring, and unblock. */ 600 sc->sc_rbput = sc->sc_rbget = 0; 601 sc->sc_rbavail = RXBUFSIZE; 602 com_iflush(sc); 603 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 604 com_hwiflow(sc); 605 606 #ifdef COM_DEBUG 607 if (com_debug) 608 comstatus(sc, "comopen "); 609 #endif 610 611 splx(s2); 612 } 613 error = 0; 614 615 /* If we're doing a blocking open... */ 616 if (!ISSET(flag, O_NONBLOCK)) 617 /* ...then wait for carrier. */ 618 while (!ISSET(tp->t_state, TS_CARR_ON) && 619 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 620 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 621 ttopen, 0); 622 if (error) { 623 /* 624 * If the open was interrupted and nobody 625 * else has the device open, then hang up. 626 */ 627 if (!ISSET(tp->t_state, TS_ISOPEN)) { 628 com_modem(sc, 0); 629 CLR(tp->t_state, TS_WOPEN); 630 ttwakeup(tp); 631 } 632 break; 633 } 634 SET(tp->t_state, TS_WOPEN); 635 } 636 637 splx(s); 638 if (error == 0) 639 error = (*linesw[tp->t_line].l_open)(dev, tp); 640 return (error); 641 } 642 643 int 644 comclose(dev, flag, mode, p) 645 dev_t dev; 646 int flag, mode; 647 struct proc *p; 648 { 649 int unit = COMUNIT(dev); 650 struct com_softc *sc = com_cd.cd_devs[unit]; 651 struct tty *tp = sc->sc_tty; 652 int s; 653 654 /* XXX This is for cons.c. */ 655 if (!ISSET(tp->t_state, TS_ISOPEN)) 656 return (0); 657 658 (*linesw[tp->t_line].l_close)(tp, flag); 659 ttyclose(tp); 660 661 /* If we were asserting flow control, then deassert it. */ 662 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 663 com_hwiflow(sc); 664 /* Clear any break condition set with TIOCSBRK. */ 665 com_break(sc, 0); 666 /* 667 * Hang up if necessary. Wait a bit, so the other side has time to 668 * notice even if we immediately open the port again. 669 */ 670 if (ISSET(tp->t_cflag, HUPCL)) { 671 com_modem(sc, 0); 672 (void) tsleep(sc, TTIPRI, ttclos, hz); 673 } 674 675 s = splserial(); 676 /* Turn off interrupts. */ 677 #ifdef DDB 678 if(ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 679 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 680 else 681 #else 682 sc->sc_ier = 0; 683 #endif 684 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 685 splx(s); 686 687 return (0); 688 } 689 690 int 691 comread(dev, uio, flag) 692 dev_t dev; 693 struct uio *uio; 694 int flag; 695 { 696 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 697 struct tty *tp = sc->sc_tty; 698 699 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 700 } 701 702 int 703 comwrite(dev, uio, flag) 704 dev_t dev; 705 struct uio *uio; 706 int flag; 707 { 708 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 709 struct tty *tp = sc->sc_tty; 710 711 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 712 } 713 714 struct tty * 715 comtty(dev) 716 dev_t dev; 717 { 718 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 719 struct tty *tp = sc->sc_tty; 720 721 return (tp); 722 } 723 724 static u_char 725 tiocm_xxx2mcr(data) 726 int data; 727 { 728 u_char m = 0; 729 730 if (ISSET(data, TIOCM_DTR)) 731 SET(m, MCR_DTR); 732 if (ISSET(data, TIOCM_RTS)) 733 SET(m, MCR_RTS); 734 return m; 735 } 736 737 int 738 comioctl(dev, cmd, data, flag, p) 739 dev_t dev; 740 u_long cmd; 741 caddr_t data; 742 int flag; 743 struct proc *p; 744 { 745 int unit = COMUNIT(dev); 746 struct com_softc *sc = com_cd.cd_devs[unit]; 747 struct tty *tp = sc->sc_tty; 748 int error; 749 750 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 751 if (error >= 0) 752 return (error); 753 754 error = ttioctl(tp, cmd, data, flag, p); 755 if (error >= 0) 756 return (error); 757 758 switch (cmd) { 759 case TIOCSBRK: 760 com_break(sc, 1); 761 break; 762 763 case TIOCCBRK: 764 com_break(sc, 0); 765 break; 766 767 case TIOCSDTR: 768 com_modem(sc, 1); 769 break; 770 771 case TIOCCDTR: 772 com_modem(sc, 0); 773 break; 774 775 case TIOCGFLAGS: 776 *(int *)data = sc->sc_swflags; 777 break; 778 779 case TIOCSFLAGS: 780 error = suser(p->p_ucred, &p->p_acflag); 781 if (error) 782 return (error); 783 sc->sc_swflags = *(int *)data; 784 break; 785 786 case TIOCMSET: 787 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 788 /*FALLTHROUGH*/ 789 790 case TIOCMBIS: 791 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 792 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 793 break; 794 795 case TIOCMBIC: 796 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 797 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 798 break; 799 800 case TIOCMGET: { 801 u_char m; 802 int bits = 0; 803 804 m = sc->sc_mcr; 805 if (ISSET(m, MCR_DTR)) 806 SET(bits, TIOCM_DTR); 807 if (ISSET(m, MCR_RTS)) 808 SET(bits, TIOCM_RTS); 809 m = sc->sc_msr; 810 if (ISSET(m, MSR_DCD)) 811 SET(bits, TIOCM_CD); 812 if (ISSET(m, MSR_CTS)) 813 SET(bits, TIOCM_CTS); 814 if (ISSET(m, MSR_DSR)) 815 SET(bits, TIOCM_DSR); 816 if (ISSET(m, MSR_RI | MSR_TERI)) 817 SET(bits, TIOCM_RI); 818 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 819 SET(bits, TIOCM_LE); 820 *(int *)data = bits; 821 break; 822 } 823 default: 824 return (ENOTTY); 825 } 826 827 #ifdef COM_DEBUG 828 if (com_debug) 829 comstatus(sc, "comioctl "); 830 #endif 831 832 return (0); 833 } 834 835 integrate void 836 com_schedrx(sc) 837 struct com_softc *sc; 838 { 839 840 sc->sc_rx_ready = 1; 841 842 /* Wake up the poller. */ 843 #ifdef __GENERIC_SOFT_INTERRUPTS 844 softintr_schedule(sc->sc_si); 845 #else 846 #ifndef alpha 847 setsoftserial(); 848 #else 849 if (!com_softintr_scheduled) { 850 com_softintr_scheduled = 1; 851 timeout(comsoft, NULL, 1); 852 } 853 #endif 854 #endif 855 } 856 857 void 858 com_break(sc, onoff) 859 struct com_softc *sc; 860 int onoff; 861 { 862 int s; 863 864 s = splserial(); 865 if (onoff) 866 SET(sc->sc_lcr, LCR_SBREAK); 867 else 868 CLR(sc->sc_lcr, LCR_SBREAK); 869 870 if (!sc->sc_heldchange) { 871 if (sc->sc_tx_busy) { 872 sc->sc_heldtbc = sc->sc_tbc; 873 sc->sc_tbc = 0; 874 sc->sc_heldchange = 1; 875 } else 876 com_loadchannelregs(sc); 877 } 878 splx(s); 879 } 880 881 void 882 com_modem(sc, onoff) 883 struct com_softc *sc; 884 int onoff; 885 { 886 int s; 887 888 s = splserial(); 889 if (onoff) 890 SET(sc->sc_mcr, sc->sc_mcr_dtr); 891 else 892 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 893 894 if (!sc->sc_heldchange) { 895 if (sc->sc_tx_busy) { 896 sc->sc_heldtbc = sc->sc_tbc; 897 sc->sc_tbc = 0; 898 sc->sc_heldchange = 1; 899 } else 900 com_loadchannelregs(sc); 901 } 902 splx(s); 903 } 904 905 static u_char 906 cflag2lcr(cflag) 907 tcflag_t cflag; 908 { 909 u_char lcr = 0; 910 911 switch (ISSET(cflag, CSIZE)) { 912 case CS5: 913 SET(lcr, LCR_5BITS); 914 break; 915 case CS6: 916 SET(lcr, LCR_6BITS); 917 break; 918 case CS7: 919 SET(lcr, LCR_7BITS); 920 break; 921 case CS8: 922 SET(lcr, LCR_8BITS); 923 break; 924 } 925 if (ISSET(cflag, PARENB)) { 926 SET(lcr, LCR_PENAB); 927 if (!ISSET(cflag, PARODD)) 928 SET(lcr, LCR_PEVEN); 929 } 930 if (ISSET(cflag, CSTOPB)) 931 SET(lcr, LCR_STOPB); 932 933 return (lcr); 934 } 935 936 int 937 comparam(tp, t) 938 struct tty *tp; 939 struct termios *t; 940 { 941 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 942 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 943 u_char lcr; 944 int s; 945 946 /* check requested parameters */ 947 if (ospeed < 0) 948 return (EINVAL); 949 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 950 return (EINVAL); 951 952 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 953 954 s = splserial(); 955 956 sc->sc_lcr = lcr; 957 958 /* 959 * For the console, always force CLOCAL and !HUPCL, so that the port 960 * is always active. 961 */ 962 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 963 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 964 SET(t->c_cflag, CLOCAL); 965 CLR(t->c_cflag, HUPCL); 966 } 967 968 /* 969 * If we're not in a mode that assumes a connection is present, then 970 * ignore carrier changes. 971 */ 972 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 973 sc->sc_msr_dcd = 0; 974 else 975 sc->sc_msr_dcd = MSR_DCD; 976 /* 977 * Set the flow control pins depending on the current flow control 978 * mode. 979 */ 980 if (ISSET(t->c_cflag, CRTSCTS)) { 981 sc->sc_mcr_dtr = MCR_DTR; 982 sc->sc_mcr_rts = MCR_RTS; 983 sc->sc_msr_cts = MSR_CTS; 984 sc->sc_r_hiwat = RXHIWAT; 985 sc->sc_r_lowat = RXLOWAT; 986 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 987 } else if (ISSET(t->c_cflag, MDMBUF)) { 988 /* 989 * For DTR/DCD flow control, make sure we don't toggle DTR for 990 * carrier detection. 991 */ 992 sc->sc_mcr_dtr = 0; 993 sc->sc_mcr_rts = MCR_DTR; 994 sc->sc_msr_cts = MSR_DCD; 995 sc->sc_r_hiwat = RXHIWAT; 996 sc->sc_r_lowat = RXLOWAT; 997 sc->sc_efr = 0; 998 } else { 999 /* 1000 * If no flow control, then always set RTS. This will make 1001 * the other side happy if it mistakenly thinks we're doing 1002 * RTS/CTS flow control. 1003 */ 1004 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1005 sc->sc_mcr_rts = 0; 1006 sc->sc_msr_cts = 0; 1007 sc->sc_r_hiwat = 0; 1008 sc->sc_r_lowat = 0; 1009 sc->sc_efr = 0; 1010 if (ISSET(sc->sc_mcr, MCR_DTR)) 1011 SET(sc->sc_mcr, MCR_RTS); 1012 else 1013 CLR(sc->sc_mcr, MCR_RTS); 1014 } 1015 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1016 1017 #if 0 1018 if (ospeed == 0) 1019 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1020 else 1021 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1022 #endif 1023 1024 sc->sc_dlbl = ospeed; 1025 sc->sc_dlbh = ospeed >> 8; 1026 1027 /* 1028 * Set the FIFO threshold based on the receive speed. 1029 * 1030 * * If it's a low speed, it's probably a mouse or some other 1031 * interactive device, so set the threshold low. 1032 * * If it's a high speed, trim the trigger level down to prevent 1033 * overflows. 1034 * * Otherwise set it a bit higher. 1035 */ 1036 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1037 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1038 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1039 sc->sc_fifo = FIFO_ENABLE | 1040 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1041 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1042 else 1043 sc->sc_fifo = 0; 1044 1045 /* and copy to tty */ 1046 tp->t_ispeed = 0; 1047 tp->t_ospeed = t->c_ospeed; 1048 tp->t_cflag = t->c_cflag; 1049 1050 if (!sc->sc_heldchange) { 1051 if (sc->sc_tx_busy) { 1052 sc->sc_heldtbc = sc->sc_tbc; 1053 sc->sc_tbc = 0; 1054 sc->sc_heldchange = 1; 1055 } else 1056 com_loadchannelregs(sc); 1057 } 1058 1059 splx(s); 1060 1061 /* 1062 * Update the tty layer's idea of the carrier bit, in case we changed 1063 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1064 * lose carrier while carrier detection is on. 1065 */ 1066 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1067 1068 #ifdef COM_DEBUG 1069 if (com_debug) 1070 comstatus(sc, "comparam "); 1071 #endif 1072 1073 /* Block or unblock as needed. */ 1074 if (!ISSET(t->c_cflag, CHWFLOW)) { 1075 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1076 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1077 com_schedrx(sc); 1078 } 1079 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1080 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1081 com_hwiflow(sc); 1082 } 1083 if (sc->sc_tx_stopped) { 1084 sc->sc_tx_stopped = 0; 1085 comstart(tp); 1086 } 1087 } else { 1088 /* XXXXX FIX ME */ 1089 #if 0 1090 commsrint(sc, tp); 1091 #endif 1092 } 1093 1094 return (0); 1095 } 1096 1097 void 1098 com_iflush(sc) 1099 struct com_softc *sc; 1100 { 1101 bus_space_tag_t iot = sc->sc_iot; 1102 bus_space_handle_t ioh = sc->sc_ioh; 1103 1104 /* flush any pending I/O */ 1105 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1106 (void) bus_space_read_1(iot, ioh, com_data); 1107 } 1108 1109 void 1110 com_loadchannelregs(sc) 1111 struct com_softc *sc; 1112 { 1113 bus_space_tag_t iot = sc->sc_iot; 1114 bus_space_handle_t ioh = sc->sc_ioh; 1115 1116 /* XXXXX necessary? */ 1117 com_iflush(sc); 1118 1119 bus_space_write_1(iot, ioh, com_ier, 0); 1120 1121 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1122 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1123 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1124 } 1125 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1126 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1127 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1128 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1129 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1130 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1131 1132 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1133 } 1134 1135 int 1136 comhwiflow(tp, block) 1137 struct tty *tp; 1138 int block; 1139 { 1140 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1141 int s; 1142 1143 if (sc->sc_mcr_rts == 0) 1144 return (0); 1145 1146 s = splserial(); 1147 if (block) { 1148 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1149 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1150 com_hwiflow(sc); 1151 } 1152 } else { 1153 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1154 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1155 com_schedrx(sc); 1156 } 1157 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1158 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1159 com_hwiflow(sc); 1160 } 1161 } 1162 splx(s); 1163 return (1); 1164 } 1165 1166 /* 1167 * (un)block input via hw flowcontrol 1168 */ 1169 void 1170 com_hwiflow(sc) 1171 struct com_softc *sc; 1172 { 1173 bus_space_tag_t iot = sc->sc_iot; 1174 bus_space_handle_t ioh = sc->sc_ioh; 1175 1176 if (sc->sc_mcr_rts == 0) 1177 return; 1178 1179 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1180 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1181 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1182 } else { 1183 SET(sc->sc_mcr, sc->sc_mcr_rts); 1184 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1185 } 1186 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1187 } 1188 1189 1190 void 1191 comstart(tp) 1192 struct tty *tp; 1193 { 1194 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1195 bus_space_tag_t iot = sc->sc_iot; 1196 bus_space_handle_t ioh = sc->sc_ioh; 1197 int s; 1198 1199 s = spltty(); 1200 if (ISSET(tp->t_state, TS_BUSY)) 1201 goto out; 1202 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1203 goto stopped; 1204 1205 if (sc->sc_tx_stopped) 1206 goto stopped; 1207 1208 if (tp->t_outq.c_cc <= tp->t_lowat) { 1209 if (ISSET(tp->t_state, TS_ASLEEP)) { 1210 CLR(tp->t_state, TS_ASLEEP); 1211 wakeup(&tp->t_outq); 1212 } 1213 selwakeup(&tp->t_wsel); 1214 if (tp->t_outq.c_cc == 0) 1215 goto stopped; 1216 } 1217 1218 /* Grab the first contiguous region of buffer space. */ 1219 { 1220 u_char *tba; 1221 int tbc; 1222 1223 tba = tp->t_outq.c_cf; 1224 tbc = ndqb(&tp->t_outq, 0); 1225 1226 (void)splserial(); 1227 1228 sc->sc_tba = tba; 1229 sc->sc_tbc = tbc; 1230 } 1231 1232 SET(tp->t_state, TS_BUSY); 1233 sc->sc_tx_busy = 1; 1234 1235 /* Enable transmit completion interrupts if necessary. */ 1236 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1237 SET(sc->sc_ier, IER_ETXRDY); 1238 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1239 } 1240 1241 /* Output the first chunk of the contiguous buffer. */ 1242 { 1243 int n; 1244 1245 n = sc->sc_fifolen; 1246 if (n > sc->sc_tbc) 1247 n = sc->sc_tbc; 1248 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1249 sc->sc_tbc -= n; 1250 sc->sc_tba += n; 1251 } 1252 splx(s); 1253 return; 1254 1255 stopped: 1256 /* Disable transmit completion interrupts if necessary. */ 1257 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1258 CLR(sc->sc_ier, IER_ETXRDY); 1259 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1260 } 1261 out: 1262 splx(s); 1263 return; 1264 } 1265 1266 /* 1267 * Stop output on a line. 1268 */ 1269 void 1270 comstop(tp, flag) 1271 struct tty *tp; 1272 int flag; 1273 { 1274 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1275 int s; 1276 1277 s = splserial(); 1278 if (ISSET(tp->t_state, TS_BUSY)) { 1279 /* Stop transmitting at the next chunk. */ 1280 sc->sc_tbc = 0; 1281 sc->sc_heldtbc = 0; 1282 if (!ISSET(tp->t_state, TS_TTSTOP)) 1283 SET(tp->t_state, TS_FLUSH); 1284 } 1285 splx(s); 1286 } 1287 1288 void 1289 comdiag(arg) 1290 void *arg; 1291 { 1292 struct com_softc *sc = arg; 1293 int overflows, floods; 1294 int s; 1295 1296 s = splserial(); 1297 overflows = sc->sc_overflows; 1298 sc->sc_overflows = 0; 1299 floods = sc->sc_floods; 1300 sc->sc_floods = 0; 1301 sc->sc_errors = 0; 1302 splx(s); 1303 1304 log(LOG_WARNING, 1305 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1306 sc->sc_dev.dv_xname, 1307 overflows, overflows == 1 ? "" : "s", 1308 floods, floods == 1 ? "" : "s"); 1309 } 1310 1311 integrate void 1312 comrxint(sc, tp) 1313 struct com_softc *sc; 1314 struct tty *tp; 1315 { 1316 u_int get, cc, scc; 1317 int code; 1318 u_char lsr; 1319 int s; 1320 static int lsrmap[8] = { 1321 0, TTY_PE, 1322 TTY_FE, TTY_PE|TTY_FE, 1323 TTY_FE, TTY_PE|TTY_FE, 1324 TTY_FE, TTY_PE|TTY_FE 1325 }; 1326 1327 get = sc->sc_rbget; 1328 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1329 1330 if (cc == RXBUFSIZE) { 1331 sc->sc_floods++; 1332 if (sc->sc_errors++ == 0) 1333 timeout(comdiag, sc, 60 * hz); 1334 } 1335 1336 while (cc) { 1337 lsr = sc->sc_lbuf[get]; 1338 if (ISSET(lsr, LSR_OE)) { 1339 sc->sc_overflows++; 1340 if (sc->sc_errors++ == 0) 1341 timeout(comdiag, sc, 60 * hz); 1342 } 1343 code = sc->sc_rbuf[get] | 1344 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1345 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1346 /* 1347 * The line discipline's buffer is out of space. 1348 */ 1349 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1350 /* 1351 * We're either not using flow control, or the 1352 * line discipline didn't tell us to block for 1353 * some reason. Either way, we have no way to 1354 * know when there's more space available, so 1355 * just drop the rest of the data. 1356 */ 1357 get = (get + cc) & RXBUFMASK; 1358 cc = 0; 1359 } else { 1360 /* 1361 * Don't schedule any more receive processing 1362 * until the line discipline tells us there's 1363 * space available (through comhwiflow()). 1364 * Leave the rest of the data in the input 1365 * buffer. 1366 */ 1367 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1368 } 1369 break; 1370 } 1371 get = (get + 1) & RXBUFMASK; 1372 cc--; 1373 } 1374 1375 if (cc != scc) { 1376 sc->sc_rbget = get; 1377 s = splserial(); 1378 cc = sc->sc_rbavail += scc - cc; 1379 /* Buffers should be ok again, release possible block. */ 1380 if (cc >= sc->sc_r_lowat) { 1381 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1382 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1383 SET(sc->sc_ier, IER_ERXRDY); 1384 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1385 } 1386 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1387 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1388 com_hwiflow(sc); 1389 } 1390 } 1391 splx(s); 1392 } 1393 } 1394 1395 integrate void 1396 comtxint(sc, tp) 1397 struct com_softc *sc; 1398 struct tty *tp; 1399 { 1400 1401 CLR(tp->t_state, TS_BUSY); 1402 if (ISSET(tp->t_state, TS_FLUSH)) 1403 CLR(tp->t_state, TS_FLUSH); 1404 else 1405 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1406 (*linesw[tp->t_line].l_start)(tp); 1407 } 1408 1409 integrate void 1410 commsrint(sc, tp) 1411 struct com_softc *sc; 1412 struct tty *tp; 1413 { 1414 u_char msr, delta; 1415 int s; 1416 1417 s = splserial(); 1418 msr = sc->sc_msr; 1419 delta = sc->sc_msr_delta; 1420 sc->sc_msr_delta = 0; 1421 splx(s); 1422 1423 if (ISSET(delta, sc->sc_msr_dcd)) { 1424 /* 1425 * Inform the tty layer that carrier detect changed. 1426 */ 1427 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1428 } 1429 1430 if (ISSET(delta, sc->sc_msr_cts)) { 1431 /* Block or unblock output according to flow control. */ 1432 if (ISSET(msr, sc->sc_msr_cts)) { 1433 sc->sc_tx_stopped = 0; 1434 (*linesw[tp->t_line].l_start)(tp); 1435 } else { 1436 sc->sc_tx_stopped = 1; 1437 } 1438 } 1439 1440 #ifdef COM_DEBUG 1441 if (com_debug) 1442 comstatus(sc, "commsrint"); 1443 #endif 1444 } 1445 1446 #ifdef __GENERIC_SOFT_INTERRUPTS 1447 void 1448 comsoft(arg) 1449 void *arg; 1450 { 1451 struct com_softc *sc = arg; 1452 struct tty *tp; 1453 1454 { 1455 #else 1456 void 1457 #ifndef alpha 1458 comsoft() 1459 #else 1460 comsoft(arg) 1461 void *arg; 1462 #endif 1463 { 1464 struct com_softc *sc; 1465 struct tty *tp; 1466 int unit; 1467 #ifdef alpha 1468 int s; 1469 1470 s = splsoftserial(); 1471 com_softintr_scheduled = 0; 1472 #endif 1473 1474 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1475 sc = com_cd.cd_devs[unit]; 1476 if (sc == NULL) 1477 continue; 1478 1479 tp = sc->sc_tty; 1480 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1481 continue; 1482 #endif 1483 tp = sc->sc_tty; 1484 1485 if (sc->sc_rx_ready) { 1486 sc->sc_rx_ready = 0; 1487 comrxint(sc, tp); 1488 } 1489 1490 if (sc->sc_st_check) { 1491 sc->sc_st_check = 0; 1492 commsrint(sc, tp); 1493 } 1494 1495 if (sc->sc_tx_done) { 1496 sc->sc_tx_done = 0; 1497 comtxint(sc, tp); 1498 } 1499 } 1500 1501 #ifndef __GENERIC_SOFT_INTERRUPTS 1502 #ifdef alpha 1503 splx(s); 1504 #endif 1505 #endif 1506 } 1507 1508 int 1509 comintr(arg) 1510 void *arg; 1511 { 1512 struct com_softc *sc = arg; 1513 bus_space_tag_t iot = sc->sc_iot; 1514 bus_space_handle_t ioh = sc->sc_ioh; 1515 u_char lsr, iir; 1516 u_int put, cc; 1517 1518 iir = bus_space_read_1(iot, ioh, com_iir); 1519 if (ISSET(iir, IIR_NOPEND)) 1520 return (0); 1521 1522 put = sc->sc_rbput; 1523 cc = sc->sc_rbavail; 1524 1525 do { 1526 u_char msr, delta; 1527 1528 lsr = bus_space_read_1(iot, ioh, com_lsr); 1529 #if defined(DDB) || defined(KGDB) 1530 if (ISSET(lsr, LSR_BI)) { 1531 #ifdef DDB 1532 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1533 Debugger(); 1534 continue; 1535 } 1536 #endif 1537 #ifdef KGDB 1538 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1539 kgdb_connect(1); 1540 continue; 1541 } 1542 #endif 1543 } 1544 #endif /* DDB || KGDB */ 1545 1546 if (ISSET(lsr, LSR_RCV_MASK) && 1547 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1548 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1549 sc->sc_rbuf[put] = 1550 bus_space_read_1(iot, ioh, com_data); 1551 sc->sc_lbuf[put] = lsr; 1552 put = (put + 1) & RXBUFMASK; 1553 lsr = bus_space_read_1(iot, ioh, com_lsr); 1554 } 1555 /* 1556 * Current string of incoming characters ended because 1557 * no more data was available. Schedule a receive event 1558 * if any data was received. Drop any characters that 1559 * we couldn't handle. 1560 */ 1561 sc->sc_rbput = put; 1562 sc->sc_rbavail = cc; 1563 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1564 sc->sc_rx_ready = 1; 1565 /* 1566 * See if we are in danger of overflowing a buffer. If 1567 * so, use hardware flow control to ease the pressure. 1568 */ 1569 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1570 cc < sc->sc_r_hiwat) { 1571 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1572 com_hwiflow(sc); 1573 } 1574 /* 1575 * If we're out of space, disable receive interrupts 1576 * until the queue has drained a bit. 1577 */ 1578 if (!cc) { 1579 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1580 CLR(sc->sc_ier, IER_ERXRDY); 1581 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1582 } 1583 } else { 1584 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1585 bus_space_write_1(iot, ioh, com_ier, 0); 1586 delay(10); 1587 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1588 iir = IIR_NOPEND; 1589 continue; 1590 } 1591 } 1592 1593 msr = bus_space_read_1(iot, ioh, com_msr); 1594 delta = msr ^ sc->sc_msr; 1595 sc->sc_msr = msr; 1596 if (ISSET(delta, sc->sc_msr_mask)) { 1597 sc->sc_msr_delta |= delta; 1598 1599 /* 1600 * Stop output immediately if we lose the output 1601 * flow control signal or carrier detect. 1602 */ 1603 if (ISSET(~msr, sc->sc_msr_mask)) { 1604 sc->sc_tbc = 0; 1605 sc->sc_heldtbc = 0; 1606 #ifdef COM_DEBUG 1607 if (com_debug) 1608 comstatus(sc, "comintr "); 1609 #endif 1610 } 1611 1612 sc->sc_st_check = 1; 1613 } 1614 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1615 1616 /* 1617 * Done handling any receive interrupts. See if data can be 1618 * transmitted as well. Schedule tx done event if no data left 1619 * and tty was marked busy. 1620 */ 1621 if (ISSET(lsr, LSR_TXRDY)) { 1622 /* 1623 * If we've delayed a parameter change, do it now, and restart 1624 * output. 1625 */ 1626 if (sc->sc_heldchange) { 1627 com_loadchannelregs(sc); 1628 sc->sc_heldchange = 0; 1629 sc->sc_tbc = sc->sc_heldtbc; 1630 sc->sc_heldtbc = 0; 1631 } 1632 /* Output the next chunk of the contiguous buffer, if any. */ 1633 if (sc->sc_tbc > 0) { 1634 int n; 1635 1636 n = sc->sc_fifolen; 1637 if (n > sc->sc_tbc) 1638 n = sc->sc_tbc; 1639 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1640 sc->sc_tbc -= n; 1641 sc->sc_tba += n; 1642 } else if (sc->sc_tx_busy) { 1643 sc->sc_tx_busy = 0; 1644 sc->sc_tx_done = 1; 1645 } 1646 } 1647 1648 /* Wake up the poller. */ 1649 #ifdef __GENERIC_SOFT_INTERRUPTS 1650 softintr_schedule(sc->sc_si); 1651 #else 1652 #ifndef alpha 1653 setsoftserial(); 1654 #else 1655 if (!com_softintr_scheduled) { 1656 com_softintr_scheduled = 1; 1657 timeout(comsoft, NULL, 1); 1658 } 1659 #endif 1660 #endif 1661 1662 #if NRND > 0 && defined(RND_COM) 1663 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1664 #endif 1665 1666 return (1); 1667 } 1668 1669 /* 1670 * The following functions are polled getc and putc routines, shared 1671 * by the console and kgdb glue. 1672 */ 1673 1674 int 1675 com_common_getc(iot, ioh) 1676 bus_space_tag_t iot; 1677 bus_space_handle_t ioh; 1678 { 1679 int s = splserial(); 1680 u_char stat, c; 1681 1682 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1683 ; 1684 c = bus_space_read_1(iot, ioh, com_data); 1685 stat = bus_space_read_1(iot, ioh, com_iir); 1686 splx(s); 1687 return (c); 1688 } 1689 1690 void 1691 com_common_putc(iot, ioh, c) 1692 bus_space_tag_t iot; 1693 bus_space_handle_t ioh; 1694 int c; 1695 { 1696 int s = splserial(); 1697 u_char stat; 1698 register int timo; 1699 1700 /* wait for any pending transmission to finish */ 1701 timo = 50000; 1702 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1703 && --timo) 1704 ; 1705 bus_space_write_1(iot, ioh, com_data, c); 1706 /* wait for this transmission to complete */ 1707 timo = 1500000; 1708 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1709 && --timo) 1710 ; 1711 /* clear any interrupts generated by this transmission */ 1712 stat = bus_space_read_1(iot, ioh, com_iir); 1713 splx(s); 1714 } 1715 1716 /* 1717 * Initialize UART to known state. 1718 */ 1719 int 1720 cominit(iot, iobase, rate, frequency, cflag, iohp) 1721 bus_space_tag_t iot; 1722 int iobase; 1723 int rate, frequency; 1724 tcflag_t cflag; 1725 bus_space_handle_t *iohp; 1726 { 1727 bus_space_handle_t ioh; 1728 1729 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1730 return (ENOMEM); /* ??? */ 1731 1732 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1733 bus_space_write_1(iot, ioh, com_efr, 0); 1734 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1735 rate = comspeed(rate, frequency); 1736 bus_space_write_1(iot, ioh, com_dlbl, rate); 1737 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1738 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1739 bus_space_write_1(iot, ioh, com_mcr, 0); 1740 bus_space_write_1(iot, ioh, com_fifo, 1741 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1742 bus_space_write_1(iot, ioh, com_ier, 0); 1743 1744 *iohp = ioh; 1745 return (0); 1746 } 1747 1748 /* 1749 * Following are all routines needed for COM to act as console 1750 */ 1751 1752 int 1753 comcnattach(iot, iobase, rate, frequency, cflag) 1754 bus_space_tag_t iot; 1755 int iobase; 1756 int rate, frequency; 1757 tcflag_t cflag; 1758 { 1759 int res; 1760 static struct consdev comcons = { NULL, NULL, 1761 comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL}; 1762 1763 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1764 if (res) 1765 return (res); 1766 1767 cn_tab = &comcons; 1768 1769 comconstag = iot; 1770 comconsaddr = iobase; 1771 comconsrate = rate; 1772 comconscflag = cflag; 1773 1774 return (0); 1775 } 1776 1777 int 1778 comcngetc(dev) 1779 dev_t dev; 1780 { 1781 1782 return (com_common_getc(comconstag, comconsioh)); 1783 } 1784 1785 /* 1786 * Console kernel output character routine. 1787 */ 1788 void 1789 comcnputc(dev, c) 1790 dev_t dev; 1791 int c; 1792 { 1793 1794 com_common_putc(comconstag, comconsioh, c); 1795 } 1796 1797 void 1798 comcnpollc(dev, on) 1799 dev_t dev; 1800 int on; 1801 { 1802 1803 } 1804 1805 #ifdef KGDB 1806 int 1807 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1808 bus_space_tag_t iot; 1809 int iobase; 1810 int rate, frequency; 1811 tcflag_t cflag; 1812 { 1813 int res; 1814 1815 if (iot == comconstag && iobase == comconsaddr) 1816 return (EBUSY); /* cannot share with console */ 1817 1818 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1819 if (res) 1820 return (res); 1821 1822 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1823 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1824 1825 com_kgdb_iot = iot; 1826 com_kgdb_addr = iobase; 1827 1828 return (0); 1829 } 1830 1831 /* ARGSUSED */ 1832 int 1833 com_kgdb_getc(arg) 1834 void *arg; 1835 { 1836 1837 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1838 } 1839 1840 /* ARGSUSED */ 1841 void 1842 com_kgdb_putc(arg, c) 1843 void *arg; 1844 int c; 1845 { 1846 1847 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1848 } 1849 #endif /* KGDB */ 1850 1851 /* helper function to identify the com ports used by 1852 console or KGDB (and not yet autoconf attached) */ 1853 int 1854 com_is_console(iot, iobase, ioh) 1855 bus_space_tag_t iot; 1856 int iobase; 1857 bus_space_handle_t *ioh; 1858 { 1859 bus_space_handle_t help; 1860 1861 if (!comconsattached && 1862 iot == comconstag && iobase == comconsaddr) 1863 help = comconsioh; 1864 #ifdef KGDB 1865 else if (!com_kgdb_attached && 1866 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1867 help = com_kgdb_ioh; 1868 #endif 1869 else 1870 return (0); 1871 1872 if (ioh) 1873 *ioh = help; 1874 return (1); 1875 } 1876
Indexes created Sun Sep 28 07:09:56 GMT 2025