com.c revision 1.117
1 /* $NetBSD: com.c,v 1.117 1997/10/19 20:01:08 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 u_int8_t lcr; 354 #ifdef COM_HAYESP 355 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 356 int *hayespp; 357 #endif 358 359 /* Disable interrupts before configuring the device. */ 360 sc->sc_ier = 0; 361 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 362 363 if (iot == comconstag && iobase == comconsaddr) { 364 comconsattached = 1; 365 366 /* Make sure the console is always "hardwired". */ 367 delay(1000); /* wait for output to finish */ 368 SET(sc->sc_hwflags, COM_HW_CONSOLE); 369 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 370 } 371 372 #ifdef COM_HAYESP 373 /* Look for a Hayes ESP board. */ 374 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 375 bus_space_handle_t hayespioh; 376 377 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 378 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 379 continue; 380 if (comprobeHAYESP(hayespioh, sc)) { 381 sc->sc_hayespioh = hayespioh; 382 sc->sc_fifolen = 1024; 383 384 /* Set 16550 compatibility mode */ 385 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 386 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 387 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 388 HAYESP_MODE_SCALE); 389 390 /* Set RTS/CTS flow control */ 391 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 392 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 394 395 /* Set flow control levels */ 396 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 397 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 398 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 404 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 405 406 break; 407 } 408 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 409 } 410 /* No ESP; look for other things. */ 411 if (*hayespp == 0) { 412 #endif 413 sc->sc_fifolen = 1; 414 /* look for a NS 16550AF UART with FIFOs */ 415 bus_space_write_1(iot, ioh, com_fifo, 416 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 417 delay(100); 418 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 419 == IIR_FIFO_MASK) 420 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 421 == FIFO_TRIGGER_14) { 422 SET(sc->sc_hwflags, COM_HW_FIFO); 423 424 /* 425 * IIR changes into the EFR if LCR is set to LCR_EERS 426 * on 16650s. We also know IIR != 0 at this point. 427 * Write 0 into the EFR, and read it. If the result 428 * is 0, we have a 16650. 429 * 430 * Older 16650s were broken; the test to detect them 431 * is taken from the Linux driver. Apparently 432 * setting DLAB enable gives access to the EFR on 433 * these chips. 434 */ 435 lcr = bus_space_read_1(iot, ioh, com_lcr); 436 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 437 bus_space_write_1(iot, ioh, com_efr, 0); 438 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 439 bus_space_write_1(iot, ioh, com_lcr, 440 lcr | LCR_DLAB); 441 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 442 CLR(sc->sc_hwflags, COM_HW_FIFO); 443 sc->sc_fifolen = 0; 444 printf(": st16650, broken fifo\n"); 445 } else { 446 SET(sc->sc_hwflags, COM_HW_FLOW); 447 printf(": st16650a, working fifo\n"); 448 sc->sc_fifolen = 32; 449 } 450 } else { 451 printf(": ns16550a, working fifo\n"); 452 sc->sc_fifolen = 16; 453 } 454 455 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 456 } else 457 printf(": ns16550, broken fifo\n"); 458 else 459 printf(": ns8250 or ns16450, no fifo\n"); 460 bus_space_write_1(iot, ioh, com_fifo, 0); 461 #ifdef COM_HAYESP 462 } 463 #endif 464 465 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 466 SET(sc->sc_mcr, MCR_IENABLE); 467 468 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 469 int maj; 470 471 /* locate the major number */ 472 for (maj = 0; maj < nchrdev; maj++) 473 if (cdevsw[maj].d_open == comopen) 474 break; 475 476 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 477 #ifdef DDB 478 com_enable_debugport(sc); 479 #endif 480 printf("%s: console\n", sc->sc_dev.dv_xname); 481 } 482 483 #ifdef KGDB 484 /* 485 * Allow kgdb to "take over" this port. If this is 486 * the kgdb device, it has exclusive use. 487 */ 488 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 489 com_kgdb_attached = 1; 490 491 SET(sc->sc_hwflags, COM_HW_KGDB); 492 com_enable_debugport(sc); 493 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 494 } 495 #endif 496 497 #ifdef __GENERIC_SOFT_INTERRUPTS 498 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 499 #endif 500 501 #if NRND > 0 && defined(RND_COM) 502 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 503 RND_TYPE_TTY); 504 #endif 505 } 506 507 int 508 comopen(dev, flag, mode, p) 509 dev_t dev; 510 int flag, mode; 511 struct proc *p; 512 { 513 int unit = COMUNIT(dev); 514 struct com_softc *sc; 515 struct tty *tp; 516 int s, s2; 517 int error = 0; 518 519 if (unit >= com_cd.cd_ndevs) 520 return (ENXIO); 521 sc = com_cd.cd_devs[unit]; 522 if (!sc) 523 return (ENXIO); 524 525 #ifdef KGDB 526 /* 527 * If this is the kgdb port, no other use is permitted. 528 */ 529 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 530 return (EBUSY); 531 #endif 532 533 if (!sc->sc_tty) { 534 tp = sc->sc_tty = ttymalloc(); 535 tty_attach(tp); 536 } else 537 tp = sc->sc_tty; 538 539 if (ISSET(tp->t_state, TS_ISOPEN) && 540 ISSET(tp->t_state, TS_XCLUDE) && 541 p->p_ucred->cr_uid != 0) 542 return (EBUSY); 543 544 s = spltty(); 545 546 /* We need to set this early for the benefit of comsoft(). */ 547 SET(tp->t_state, TS_WOPEN); 548 549 /* 550 * Do the following iff this is a first open. 551 */ 552 if (!ISSET(tp->t_state, TS_ISOPEN)) { 553 struct termios t; 554 555 /* Turn on interrupts. */ 556 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 557 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 558 559 /* Fetch the current modem control status, needed later. */ 560 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 561 562 /* Add some entry points needed by the tty layer. */ 563 tp->t_oproc = comstart; 564 tp->t_param = comparam; 565 tp->t_hwiflow = comhwiflow; 566 tp->t_dev = dev; 567 568 /* 569 * Initialize the termios status to the defaults. Add in the 570 * sticky bits from TIOCSFLAGS. 571 */ 572 t.c_ispeed = 0; 573 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 574 t.c_ospeed = comconsrate; 575 t.c_cflag = comconscflag; 576 } else { 577 t.c_ospeed = TTYDEF_SPEED; 578 t.c_cflag = TTYDEF_CFLAG; 579 } 580 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 581 SET(t.c_cflag, CLOCAL); 582 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 583 SET(t.c_cflag, CRTSCTS); 584 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 585 SET(t.c_cflag, MDMBUF); 586 tp->t_iflag = TTYDEF_IFLAG; 587 tp->t_oflag = TTYDEF_OFLAG; 588 tp->t_lflag = TTYDEF_LFLAG; 589 ttychars(tp); 590 (void) comparam(tp, &t); 591 ttsetwater(tp); 592 593 s2 = splserial(); 594 595 /* 596 * Turn on DTR. We must always do this, even if carrier is not 597 * present, because otherwise we'd have to use TIOCSDTR 598 * immediately after setting CLOCAL. We will drop DTR only on 599 * the next high-low transition of DCD, or by explicit request. 600 */ 601 com_modem(sc, 1); 602 603 /* Clear the input ring, and unblock. */ 604 sc->sc_rbput = sc->sc_rbget = 0; 605 sc->sc_rbavail = RXBUFSIZE; 606 com_iflush(sc); 607 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 608 com_hwiflow(sc); 609 610 #ifdef COM_DEBUG 611 if (com_debug) 612 comstatus(sc, "comopen "); 613 #endif 614 615 splx(s2); 616 } 617 error = 0; 618 619 /* If we're doing a blocking open... */ 620 if (!ISSET(flag, O_NONBLOCK)) 621 /* ...then wait for carrier. */ 622 while (!ISSET(tp->t_state, TS_CARR_ON) && 623 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 624 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 625 ttopen, 0); 626 if (error) { 627 /* 628 * If the open was interrupted and nobody 629 * else has the device open, then hang up. 630 */ 631 if (!ISSET(tp->t_state, TS_ISOPEN)) { 632 com_modem(sc, 0); 633 CLR(tp->t_state, TS_WOPEN); 634 ttwakeup(tp); 635 } 636 break; 637 } 638 SET(tp->t_state, TS_WOPEN); 639 } 640 641 splx(s); 642 if (error == 0) 643 error = (*linesw[tp->t_line].l_open)(dev, tp); 644 return (error); 645 } 646 647 int 648 comclose(dev, flag, mode, p) 649 dev_t dev; 650 int flag, mode; 651 struct proc *p; 652 { 653 int unit = COMUNIT(dev); 654 struct com_softc *sc = com_cd.cd_devs[unit]; 655 struct tty *tp = sc->sc_tty; 656 int s; 657 658 /* XXX This is for cons.c. */ 659 if (!ISSET(tp->t_state, TS_ISOPEN)) 660 return (0); 661 662 (*linesw[tp->t_line].l_close)(tp, flag); 663 ttyclose(tp); 664 665 /* If we were asserting flow control, then deassert it. */ 666 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 667 com_hwiflow(sc); 668 /* Clear any break condition set with TIOCSBRK. */ 669 com_break(sc, 0); 670 /* 671 * Hang up if necessary. Wait a bit, so the other side has time to 672 * notice even if we immediately open the port again. 673 */ 674 if (ISSET(tp->t_cflag, HUPCL)) { 675 com_modem(sc, 0); 676 (void) tsleep(sc, TTIPRI, ttclos, hz); 677 } 678 679 s = splserial(); 680 /* Turn off interrupts. */ 681 #ifdef DDB 682 if(ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 683 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 684 else 685 #else 686 sc->sc_ier = 0; 687 #endif 688 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 689 splx(s); 690 691 return (0); 692 } 693 694 int 695 comread(dev, uio, flag) 696 dev_t dev; 697 struct uio *uio; 698 int flag; 699 { 700 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 701 struct tty *tp = sc->sc_tty; 702 703 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 704 } 705 706 int 707 comwrite(dev, uio, flag) 708 dev_t dev; 709 struct uio *uio; 710 int flag; 711 { 712 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 713 struct tty *tp = sc->sc_tty; 714 715 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 716 } 717 718 struct tty * 719 comtty(dev) 720 dev_t dev; 721 { 722 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 723 struct tty *tp = sc->sc_tty; 724 725 return (tp); 726 } 727 728 static u_char 729 tiocm_xxx2mcr(data) 730 int data; 731 { 732 u_char m = 0; 733 734 if (ISSET(data, TIOCM_DTR)) 735 SET(m, MCR_DTR); 736 if (ISSET(data, TIOCM_RTS)) 737 SET(m, MCR_RTS); 738 return m; 739 } 740 741 int 742 comioctl(dev, cmd, data, flag, p) 743 dev_t dev; 744 u_long cmd; 745 caddr_t data; 746 int flag; 747 struct proc *p; 748 { 749 int unit = COMUNIT(dev); 750 struct com_softc *sc = com_cd.cd_devs[unit]; 751 struct tty *tp = sc->sc_tty; 752 int error; 753 754 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 755 if (error >= 0) 756 return (error); 757 758 error = ttioctl(tp, cmd, data, flag, p); 759 if (error >= 0) 760 return (error); 761 762 switch (cmd) { 763 case TIOCSBRK: 764 com_break(sc, 1); 765 break; 766 767 case TIOCCBRK: 768 com_break(sc, 0); 769 break; 770 771 case TIOCSDTR: 772 com_modem(sc, 1); 773 break; 774 775 case TIOCCDTR: 776 com_modem(sc, 0); 777 break; 778 779 case TIOCGFLAGS: 780 *(int *)data = sc->sc_swflags; 781 break; 782 783 case TIOCSFLAGS: 784 error = suser(p->p_ucred, &p->p_acflag); 785 if (error) 786 return (error); 787 sc->sc_swflags = *(int *)data; 788 break; 789 790 case TIOCMSET: 791 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 792 /*FALLTHROUGH*/ 793 794 case TIOCMBIS: 795 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 796 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 797 break; 798 799 case TIOCMBIC: 800 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 801 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 802 break; 803 804 case TIOCMGET: { 805 u_char m; 806 int bits = 0; 807 808 m = sc->sc_mcr; 809 if (ISSET(m, MCR_DTR)) 810 SET(bits, TIOCM_DTR); 811 if (ISSET(m, MCR_RTS)) 812 SET(bits, TIOCM_RTS); 813 m = sc->sc_msr; 814 if (ISSET(m, MSR_DCD)) 815 SET(bits, TIOCM_CD); 816 if (ISSET(m, MSR_CTS)) 817 SET(bits, TIOCM_CTS); 818 if (ISSET(m, MSR_DSR)) 819 SET(bits, TIOCM_DSR); 820 if (ISSET(m, MSR_RI | MSR_TERI)) 821 SET(bits, TIOCM_RI); 822 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 823 SET(bits, TIOCM_LE); 824 *(int *)data = bits; 825 break; 826 } 827 default: 828 return (ENOTTY); 829 } 830 831 #ifdef COM_DEBUG 832 if (com_debug) 833 comstatus(sc, "comioctl "); 834 #endif 835 836 return (0); 837 } 838 839 integrate void 840 com_schedrx(sc) 841 struct com_softc *sc; 842 { 843 844 sc->sc_rx_ready = 1; 845 846 /* Wake up the poller. */ 847 #ifdef __GENERIC_SOFT_INTERRUPTS 848 softintr_schedule(sc->sc_si); 849 #else 850 #ifndef alpha 851 setsoftserial(); 852 #else 853 if (!com_softintr_scheduled) { 854 com_softintr_scheduled = 1; 855 timeout(comsoft, NULL, 1); 856 } 857 #endif 858 #endif 859 } 860 861 void 862 com_break(sc, onoff) 863 struct com_softc *sc; 864 int onoff; 865 { 866 int s; 867 868 s = splserial(); 869 if (onoff) 870 SET(sc->sc_lcr, LCR_SBREAK); 871 else 872 CLR(sc->sc_lcr, LCR_SBREAK); 873 874 if (!sc->sc_heldchange) { 875 if (sc->sc_tx_busy) { 876 sc->sc_heldtbc = sc->sc_tbc; 877 sc->sc_tbc = 0; 878 sc->sc_heldchange = 1; 879 } else 880 com_loadchannelregs(sc); 881 } 882 splx(s); 883 } 884 885 void 886 com_modem(sc, onoff) 887 struct com_softc *sc; 888 int onoff; 889 { 890 int s; 891 892 s = splserial(); 893 if (onoff) 894 SET(sc->sc_mcr, sc->sc_mcr_dtr); 895 else 896 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 897 898 if (!sc->sc_heldchange) { 899 if (sc->sc_tx_busy) { 900 sc->sc_heldtbc = sc->sc_tbc; 901 sc->sc_tbc = 0; 902 sc->sc_heldchange = 1; 903 } else 904 com_loadchannelregs(sc); 905 } 906 splx(s); 907 } 908 909 static u_char 910 cflag2lcr(cflag) 911 tcflag_t cflag; 912 { 913 u_char lcr = 0; 914 915 switch (ISSET(cflag, CSIZE)) { 916 case CS5: 917 SET(lcr, LCR_5BITS); 918 break; 919 case CS6: 920 SET(lcr, LCR_6BITS); 921 break; 922 case CS7: 923 SET(lcr, LCR_7BITS); 924 break; 925 case CS8: 926 SET(lcr, LCR_8BITS); 927 break; 928 } 929 if (ISSET(cflag, PARENB)) { 930 SET(lcr, LCR_PENAB); 931 if (!ISSET(cflag, PARODD)) 932 SET(lcr, LCR_PEVEN); 933 } 934 if (ISSET(cflag, CSTOPB)) 935 SET(lcr, LCR_STOPB); 936 937 return (lcr); 938 } 939 940 int 941 comparam(tp, t) 942 struct tty *tp; 943 struct termios *t; 944 { 945 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 946 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 947 u_char lcr; 948 int s; 949 950 /* check requested parameters */ 951 if (ospeed < 0) 952 return (EINVAL); 953 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 954 return (EINVAL); 955 956 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 957 958 s = splserial(); 959 960 sc->sc_lcr = lcr; 961 962 /* 963 * For the console, always force CLOCAL and !HUPCL, so that the port 964 * is always active. 965 */ 966 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 967 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 968 SET(t->c_cflag, CLOCAL); 969 CLR(t->c_cflag, HUPCL); 970 } 971 972 /* 973 * If we're not in a mode that assumes a connection is present, then 974 * ignore carrier changes. 975 */ 976 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 977 sc->sc_msr_dcd = 0; 978 else 979 sc->sc_msr_dcd = MSR_DCD; 980 /* 981 * Set the flow control pins depending on the current flow control 982 * mode. 983 */ 984 if (ISSET(t->c_cflag, CRTSCTS)) { 985 sc->sc_mcr_dtr = MCR_DTR; 986 sc->sc_mcr_rts = MCR_RTS; 987 sc->sc_msr_cts = MSR_CTS; 988 sc->sc_r_hiwat = RXHIWAT; 989 sc->sc_r_lowat = RXLOWAT; 990 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 991 } else if (ISSET(t->c_cflag, MDMBUF)) { 992 /* 993 * For DTR/DCD flow control, make sure we don't toggle DTR for 994 * carrier detection. 995 */ 996 sc->sc_mcr_dtr = 0; 997 sc->sc_mcr_rts = MCR_DTR; 998 sc->sc_msr_cts = MSR_DCD; 999 sc->sc_r_hiwat = RXHIWAT; 1000 sc->sc_r_lowat = RXLOWAT; 1001 sc->sc_efr = 0; 1002 } else { 1003 /* 1004 * If no flow control, then always set RTS. This will make 1005 * the other side happy if it mistakenly thinks we're doing 1006 * RTS/CTS flow control. 1007 */ 1008 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1009 sc->sc_mcr_rts = 0; 1010 sc->sc_msr_cts = 0; 1011 sc->sc_r_hiwat = 0; 1012 sc->sc_r_lowat = 0; 1013 sc->sc_efr = 0; 1014 if (ISSET(sc->sc_mcr, MCR_DTR)) 1015 SET(sc->sc_mcr, MCR_RTS); 1016 else 1017 CLR(sc->sc_mcr, MCR_RTS); 1018 } 1019 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1020 1021 #if 0 1022 if (ospeed == 0) 1023 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1024 else 1025 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1026 #endif 1027 1028 sc->sc_dlbl = ospeed; 1029 sc->sc_dlbh = ospeed >> 8; 1030 1031 /* 1032 * Set the FIFO threshold based on the receive speed. 1033 * 1034 * * If it's a low speed, it's probably a mouse or some other 1035 * interactive device, so set the threshold low. 1036 * * If it's a high speed, trim the trigger level down to prevent 1037 * overflows. 1038 * * Otherwise set it a bit higher. 1039 */ 1040 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1041 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1042 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1043 sc->sc_fifo = FIFO_ENABLE | 1044 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1045 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1046 else 1047 sc->sc_fifo = 0; 1048 1049 /* and copy to tty */ 1050 tp->t_ispeed = 0; 1051 tp->t_ospeed = t->c_ospeed; 1052 tp->t_cflag = t->c_cflag; 1053 1054 if (!sc->sc_heldchange) { 1055 if (sc->sc_tx_busy) { 1056 sc->sc_heldtbc = sc->sc_tbc; 1057 sc->sc_tbc = 0; 1058 sc->sc_heldchange = 1; 1059 } else 1060 com_loadchannelregs(sc); 1061 } 1062 1063 splx(s); 1064 1065 /* 1066 * Update the tty layer's idea of the carrier bit, in case we changed 1067 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1068 * lose carrier while carrier detection is on. 1069 */ 1070 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1071 1072 #ifdef COM_DEBUG 1073 if (com_debug) 1074 comstatus(sc, "comparam "); 1075 #endif 1076 1077 /* Block or unblock as needed. */ 1078 if (!ISSET(t->c_cflag, CHWFLOW)) { 1079 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1080 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1081 com_schedrx(sc); 1082 } 1083 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1084 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1085 com_hwiflow(sc); 1086 } 1087 if (sc->sc_tx_stopped) { 1088 sc->sc_tx_stopped = 0; 1089 comstart(tp); 1090 } 1091 } else { 1092 /* XXXXX FIX ME */ 1093 #if 0 1094 commsrint(sc, tp); 1095 #endif 1096 } 1097 1098 return (0); 1099 } 1100 1101 void 1102 com_iflush(sc) 1103 struct com_softc *sc; 1104 { 1105 bus_space_tag_t iot = sc->sc_iot; 1106 bus_space_handle_t ioh = sc->sc_ioh; 1107 1108 /* flush any pending I/O */ 1109 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1110 (void) bus_space_read_1(iot, ioh, com_data); 1111 } 1112 1113 void 1114 com_loadchannelregs(sc) 1115 struct com_softc *sc; 1116 { 1117 bus_space_tag_t iot = sc->sc_iot; 1118 bus_space_handle_t ioh = sc->sc_ioh; 1119 1120 /* XXXXX necessary? */ 1121 com_iflush(sc); 1122 1123 bus_space_write_1(iot, ioh, com_ier, 0); 1124 1125 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1126 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1127 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1128 } 1129 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1130 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1131 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1132 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1133 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1134 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1135 1136 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1137 } 1138 1139 int 1140 comhwiflow(tp, block) 1141 struct tty *tp; 1142 int block; 1143 { 1144 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1145 int s; 1146 1147 if (sc->sc_mcr_rts == 0) 1148 return (0); 1149 1150 s = splserial(); 1151 if (block) { 1152 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1153 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1154 com_hwiflow(sc); 1155 } 1156 } else { 1157 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1158 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1159 com_schedrx(sc); 1160 } 1161 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1162 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1163 com_hwiflow(sc); 1164 } 1165 } 1166 splx(s); 1167 return (1); 1168 } 1169 1170 /* 1171 * (un)block input via hw flowcontrol 1172 */ 1173 void 1174 com_hwiflow(sc) 1175 struct com_softc *sc; 1176 { 1177 bus_space_tag_t iot = sc->sc_iot; 1178 bus_space_handle_t ioh = sc->sc_ioh; 1179 1180 if (sc->sc_mcr_rts == 0) 1181 return; 1182 1183 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1184 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1185 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1186 } else { 1187 SET(sc->sc_mcr, sc->sc_mcr_rts); 1188 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1189 } 1190 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1191 } 1192 1193 1194 void 1195 comstart(tp) 1196 struct tty *tp; 1197 { 1198 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1199 bus_space_tag_t iot = sc->sc_iot; 1200 bus_space_handle_t ioh = sc->sc_ioh; 1201 int s; 1202 1203 s = spltty(); 1204 if (ISSET(tp->t_state, TS_BUSY)) 1205 goto out; 1206 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1207 goto stopped; 1208 1209 if (sc->sc_tx_stopped) 1210 goto stopped; 1211 1212 if (tp->t_outq.c_cc <= tp->t_lowat) { 1213 if (ISSET(tp->t_state, TS_ASLEEP)) { 1214 CLR(tp->t_state, TS_ASLEEP); 1215 wakeup(&tp->t_outq); 1216 } 1217 selwakeup(&tp->t_wsel); 1218 if (tp->t_outq.c_cc == 0) 1219 goto stopped; 1220 } 1221 1222 /* Grab the first contiguous region of buffer space. */ 1223 { 1224 u_char *tba; 1225 int tbc; 1226 1227 tba = tp->t_outq.c_cf; 1228 tbc = ndqb(&tp->t_outq, 0); 1229 1230 (void)splserial(); 1231 1232 sc->sc_tba = tba; 1233 sc->sc_tbc = tbc; 1234 } 1235 1236 SET(tp->t_state, TS_BUSY); 1237 sc->sc_tx_busy = 1; 1238 1239 /* Enable transmit completion interrupts if necessary. */ 1240 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1241 SET(sc->sc_ier, IER_ETXRDY); 1242 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1243 } 1244 1245 /* Output the first chunk of the contiguous buffer. */ 1246 { 1247 int n; 1248 1249 n = sc->sc_fifolen; 1250 if (n > sc->sc_tbc) 1251 n = sc->sc_tbc; 1252 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1253 sc->sc_tbc -= n; 1254 sc->sc_tba += n; 1255 } 1256 splx(s); 1257 return; 1258 1259 stopped: 1260 /* Disable transmit completion interrupts if necessary. */ 1261 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1262 CLR(sc->sc_ier, IER_ETXRDY); 1263 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1264 } 1265 out: 1266 splx(s); 1267 return; 1268 } 1269 1270 /* 1271 * Stop output on a line. 1272 */ 1273 void 1274 comstop(tp, flag) 1275 struct tty *tp; 1276 int flag; 1277 { 1278 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1279 int s; 1280 1281 s = splserial(); 1282 if (ISSET(tp->t_state, TS_BUSY)) { 1283 /* Stop transmitting at the next chunk. */ 1284 sc->sc_tbc = 0; 1285 sc->sc_heldtbc = 0; 1286 if (!ISSET(tp->t_state, TS_TTSTOP)) 1287 SET(tp->t_state, TS_FLUSH); 1288 } 1289 splx(s); 1290 } 1291 1292 void 1293 comdiag(arg) 1294 void *arg; 1295 { 1296 struct com_softc *sc = arg; 1297 int overflows, floods; 1298 int s; 1299 1300 s = splserial(); 1301 overflows = sc->sc_overflows; 1302 sc->sc_overflows = 0; 1303 floods = sc->sc_floods; 1304 sc->sc_floods = 0; 1305 sc->sc_errors = 0; 1306 splx(s); 1307 1308 log(LOG_WARNING, 1309 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1310 sc->sc_dev.dv_xname, 1311 overflows, overflows == 1 ? "" : "s", 1312 floods, floods == 1 ? "" : "s"); 1313 } 1314 1315 integrate void 1316 comrxint(sc, tp) 1317 struct com_softc *sc; 1318 struct tty *tp; 1319 { 1320 u_int get, cc, scc; 1321 int code; 1322 u_char lsr; 1323 int s; 1324 static int lsrmap[8] = { 1325 0, TTY_PE, 1326 TTY_FE, TTY_PE|TTY_FE, 1327 TTY_FE, TTY_PE|TTY_FE, 1328 TTY_FE, TTY_PE|TTY_FE 1329 }; 1330 1331 get = sc->sc_rbget; 1332 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1333 1334 if (cc == RXBUFSIZE) { 1335 sc->sc_floods++; 1336 if (sc->sc_errors++ == 0) 1337 timeout(comdiag, sc, 60 * hz); 1338 } 1339 1340 while (cc) { 1341 lsr = sc->sc_lbuf[get]; 1342 if (ISSET(lsr, LSR_OE)) { 1343 sc->sc_overflows++; 1344 if (sc->sc_errors++ == 0) 1345 timeout(comdiag, sc, 60 * hz); 1346 } 1347 code = sc->sc_rbuf[get] | 1348 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1349 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1350 /* 1351 * The line discipline's buffer is out of space. 1352 */ 1353 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1354 /* 1355 * We're either not using flow control, or the 1356 * line discipline didn't tell us to block for 1357 * some reason. Either way, we have no way to 1358 * know when there's more space available, so 1359 * just drop the rest of the data. 1360 */ 1361 get = (get + cc) & RXBUFMASK; 1362 cc = 0; 1363 } else { 1364 /* 1365 * Don't schedule any more receive processing 1366 * until the line discipline tells us there's 1367 * space available (through comhwiflow()). 1368 * Leave the rest of the data in the input 1369 * buffer. 1370 */ 1371 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1372 } 1373 break; 1374 } 1375 get = (get + 1) & RXBUFMASK; 1376 cc--; 1377 } 1378 1379 if (cc != scc) { 1380 sc->sc_rbget = get; 1381 s = splserial(); 1382 cc = sc->sc_rbavail += scc - cc; 1383 /* Buffers should be ok again, release possible block. */ 1384 if (cc >= sc->sc_r_lowat) { 1385 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1386 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1387 SET(sc->sc_ier, IER_ERXRDY); 1388 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1389 } 1390 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1391 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1392 com_hwiflow(sc); 1393 } 1394 } 1395 splx(s); 1396 } 1397 } 1398 1399 integrate void 1400 comtxint(sc, tp) 1401 struct com_softc *sc; 1402 struct tty *tp; 1403 { 1404 1405 CLR(tp->t_state, TS_BUSY); 1406 if (ISSET(tp->t_state, TS_FLUSH)) 1407 CLR(tp->t_state, TS_FLUSH); 1408 else 1409 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1410 (*linesw[tp->t_line].l_start)(tp); 1411 } 1412 1413 integrate void 1414 commsrint(sc, tp) 1415 struct com_softc *sc; 1416 struct tty *tp; 1417 { 1418 u_char msr, delta; 1419 int s; 1420 1421 s = splserial(); 1422 msr = sc->sc_msr; 1423 delta = sc->sc_msr_delta; 1424 sc->sc_msr_delta = 0; 1425 splx(s); 1426 1427 if (ISSET(delta, sc->sc_msr_dcd)) { 1428 /* 1429 * Inform the tty layer that carrier detect changed. 1430 */ 1431 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1432 } 1433 1434 if (ISSET(delta, sc->sc_msr_cts)) { 1435 /* Block or unblock output according to flow control. */ 1436 if (ISSET(msr, sc->sc_msr_cts)) { 1437 sc->sc_tx_stopped = 0; 1438 (*linesw[tp->t_line].l_start)(tp); 1439 } else { 1440 sc->sc_tx_stopped = 1; 1441 } 1442 } 1443 1444 #ifdef COM_DEBUG 1445 if (com_debug) 1446 comstatus(sc, "commsrint"); 1447 #endif 1448 } 1449 1450 #ifdef __GENERIC_SOFT_INTERRUPTS 1451 void 1452 comsoft(arg) 1453 void *arg; 1454 { 1455 struct com_softc *sc = arg; 1456 struct tty *tp; 1457 1458 { 1459 #else 1460 void 1461 #ifndef alpha 1462 comsoft() 1463 #else 1464 comsoft(arg) 1465 void *arg; 1466 #endif 1467 { 1468 struct com_softc *sc; 1469 struct tty *tp; 1470 int unit; 1471 #ifdef alpha 1472 int s; 1473 1474 s = splsoftserial(); 1475 com_softintr_scheduled = 0; 1476 #endif 1477 1478 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1479 sc = com_cd.cd_devs[unit]; 1480 if (sc == NULL) 1481 continue; 1482 1483 tp = sc->sc_tty; 1484 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1485 continue; 1486 #endif 1487 tp = sc->sc_tty; 1488 1489 if (sc->sc_rx_ready) { 1490 sc->sc_rx_ready = 0; 1491 comrxint(sc, tp); 1492 } 1493 1494 if (sc->sc_st_check) { 1495 sc->sc_st_check = 0; 1496 commsrint(sc, tp); 1497 } 1498 1499 if (sc->sc_tx_done) { 1500 sc->sc_tx_done = 0; 1501 comtxint(sc, tp); 1502 } 1503 } 1504 1505 #ifndef __GENERIC_SOFT_INTERRUPTS 1506 #ifdef alpha 1507 splx(s); 1508 #endif 1509 #endif 1510 } 1511 1512 int 1513 comintr(arg) 1514 void *arg; 1515 { 1516 struct com_softc *sc = arg; 1517 bus_space_tag_t iot = sc->sc_iot; 1518 bus_space_handle_t ioh = sc->sc_ioh; 1519 u_char lsr, iir; 1520 u_int put, cc; 1521 1522 iir = bus_space_read_1(iot, ioh, com_iir); 1523 if (ISSET(iir, IIR_NOPEND)) 1524 return (0); 1525 1526 put = sc->sc_rbput; 1527 cc = sc->sc_rbavail; 1528 1529 do { 1530 u_char msr, delta; 1531 1532 lsr = bus_space_read_1(iot, ioh, com_lsr); 1533 #if defined(DDB) || defined(KGDB) 1534 if (ISSET(lsr, LSR_BI)) { 1535 #ifdef DDB 1536 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1537 Debugger(); 1538 continue; 1539 } 1540 #endif 1541 #ifdef KGDB 1542 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1543 kgdb_connect(1); 1544 continue; 1545 } 1546 #endif 1547 } 1548 #endif /* DDB || KGDB */ 1549 1550 if (ISSET(lsr, LSR_RCV_MASK) && 1551 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1552 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1553 sc->sc_rbuf[put] = 1554 bus_space_read_1(iot, ioh, com_data); 1555 sc->sc_lbuf[put] = lsr; 1556 put = (put + 1) & RXBUFMASK; 1557 lsr = bus_space_read_1(iot, ioh, com_lsr); 1558 } 1559 /* 1560 * Current string of incoming characters ended because 1561 * no more data was available. Schedule a receive event 1562 * if any data was received. Drop any characters that 1563 * we couldn't handle. 1564 */ 1565 sc->sc_rbput = put; 1566 sc->sc_rbavail = cc; 1567 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1568 sc->sc_rx_ready = 1; 1569 /* 1570 * See if we are in danger of overflowing a buffer. If 1571 * so, use hardware flow control to ease the pressure. 1572 */ 1573 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1574 cc < sc->sc_r_hiwat) { 1575 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1576 com_hwiflow(sc); 1577 } 1578 /* 1579 * If we're out of space, disable receive interrupts 1580 * until the queue has drained a bit. 1581 */ 1582 if (!cc) { 1583 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1584 CLR(sc->sc_ier, IER_ERXRDY); 1585 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1586 } 1587 } else { 1588 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1589 bus_space_write_1(iot, ioh, com_ier, 0); 1590 delay(10); 1591 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1592 iir = IIR_NOPEND; 1593 continue; 1594 } 1595 } 1596 1597 msr = bus_space_read_1(iot, ioh, com_msr); 1598 delta = msr ^ sc->sc_msr; 1599 sc->sc_msr = msr; 1600 if (ISSET(delta, sc->sc_msr_mask)) { 1601 sc->sc_msr_delta |= delta; 1602 1603 /* 1604 * Stop output immediately if we lose the output 1605 * flow control signal or carrier detect. 1606 */ 1607 if (ISSET(~msr, sc->sc_msr_mask)) { 1608 sc->sc_tbc = 0; 1609 sc->sc_heldtbc = 0; 1610 #ifdef COM_DEBUG 1611 if (com_debug) 1612 comstatus(sc, "comintr "); 1613 #endif 1614 } 1615 1616 sc->sc_st_check = 1; 1617 } 1618 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1619 1620 /* 1621 * Done handling any receive interrupts. See if data can be 1622 * transmitted as well. Schedule tx done event if no data left 1623 * and tty was marked busy. 1624 */ 1625 if (ISSET(lsr, LSR_TXRDY)) { 1626 /* 1627 * If we've delayed a parameter change, do it now, and restart 1628 * output. 1629 */ 1630 if (sc->sc_heldchange) { 1631 com_loadchannelregs(sc); 1632 sc->sc_heldchange = 0; 1633 sc->sc_tbc = sc->sc_heldtbc; 1634 sc->sc_heldtbc = 0; 1635 } 1636 /* Output the next chunk of the contiguous buffer, if any. */ 1637 if (sc->sc_tbc > 0) { 1638 int n; 1639 1640 n = sc->sc_fifolen; 1641 if (n > sc->sc_tbc) 1642 n = sc->sc_tbc; 1643 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1644 sc->sc_tbc -= n; 1645 sc->sc_tba += n; 1646 } else if (sc->sc_tx_busy) { 1647 sc->sc_tx_busy = 0; 1648 sc->sc_tx_done = 1; 1649 } 1650 } 1651 1652 /* Wake up the poller. */ 1653 #ifdef __GENERIC_SOFT_INTERRUPTS 1654 softintr_schedule(sc->sc_si); 1655 #else 1656 #ifndef alpha 1657 setsoftserial(); 1658 #else 1659 if (!com_softintr_scheduled) { 1660 com_softintr_scheduled = 1; 1661 timeout(comsoft, NULL, 1); 1662 } 1663 #endif 1664 #endif 1665 1666 #if NRND > 0 && defined(RND_COM) 1667 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1668 #endif 1669 1670 return (1); 1671 } 1672 1673 /* 1674 * The following functions are polled getc and putc routines, shared 1675 * by the console and kgdb glue. 1676 */ 1677 1678 int 1679 com_common_getc(iot, ioh) 1680 bus_space_tag_t iot; 1681 bus_space_handle_t ioh; 1682 { 1683 int s = splserial(); 1684 u_char stat, c; 1685 1686 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1687 ; 1688 c = bus_space_read_1(iot, ioh, com_data); 1689 stat = bus_space_read_1(iot, ioh, com_iir); 1690 splx(s); 1691 return (c); 1692 } 1693 1694 void 1695 com_common_putc(iot, ioh, c) 1696 bus_space_tag_t iot; 1697 bus_space_handle_t ioh; 1698 int c; 1699 { 1700 int s = splserial(); 1701 u_char stat; 1702 register int timo; 1703 1704 /* wait for any pending transmission to finish */ 1705 timo = 50000; 1706 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1707 && --timo) 1708 ; 1709 bus_space_write_1(iot, ioh, com_data, c); 1710 /* wait for this transmission to complete */ 1711 timo = 1500000; 1712 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1713 && --timo) 1714 ; 1715 /* clear any interrupts generated by this transmission */ 1716 stat = bus_space_read_1(iot, ioh, com_iir); 1717 splx(s); 1718 } 1719 1720 /* 1721 * Initialize UART to known state. 1722 */ 1723 int 1724 cominit(iot, iobase, rate, frequency, cflag, iohp) 1725 bus_space_tag_t iot; 1726 int iobase; 1727 int rate, frequency; 1728 tcflag_t cflag; 1729 bus_space_handle_t *iohp; 1730 { 1731 bus_space_handle_t ioh; 1732 1733 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1734 return (ENOMEM); /* ??? */ 1735 1736 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1737 bus_space_write_1(iot, ioh, com_efr, 0); 1738 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1739 rate = comspeed(rate, frequency); 1740 bus_space_write_1(iot, ioh, com_dlbl, rate); 1741 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1742 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1743 bus_space_write_1(iot, ioh, com_mcr, 0); 1744 bus_space_write_1(iot, ioh, com_fifo, 1745 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1746 bus_space_write_1(iot, ioh, com_ier, 0); 1747 1748 *iohp = ioh; 1749 return (0); 1750 } 1751 1752 /* 1753 * Following are all routines needed for COM to act as console 1754 */ 1755 1756 int 1757 comcnattach(iot, iobase, rate, frequency, cflag) 1758 bus_space_tag_t iot; 1759 int iobase; 1760 int rate, frequency; 1761 tcflag_t cflag; 1762 { 1763 int res; 1764 static struct consdev comcons = { NULL, NULL, 1765 comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL}; 1766 1767 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1768 if (res) 1769 return (res); 1770 1771 cn_tab = &comcons; 1772 1773 comconstag = iot; 1774 comconsaddr = iobase; 1775 comconsrate = rate; 1776 comconscflag = cflag; 1777 1778 return (0); 1779 } 1780 1781 int 1782 comcngetc(dev) 1783 dev_t dev; 1784 { 1785 1786 return (com_common_getc(comconstag, comconsioh)); 1787 } 1788 1789 /* 1790 * Console kernel output character routine. 1791 */ 1792 void 1793 comcnputc(dev, c) 1794 dev_t dev; 1795 int c; 1796 { 1797 1798 com_common_putc(comconstag, comconsioh, c); 1799 } 1800 1801 void 1802 comcnpollc(dev, on) 1803 dev_t dev; 1804 int on; 1805 { 1806 1807 } 1808 1809 #ifdef KGDB 1810 int 1811 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1812 bus_space_tag_t iot; 1813 int iobase; 1814 int rate, frequency; 1815 tcflag_t cflag; 1816 { 1817 int res; 1818 1819 if (iot == comconstag && iobase == comconsaddr) 1820 return (EBUSY); /* cannot share with console */ 1821 1822 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1823 if (res) 1824 return (res); 1825 1826 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1827 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1828 1829 com_kgdb_iot = iot; 1830 com_kgdb_addr = iobase; 1831 1832 return (0); 1833 } 1834 1835 /* ARGSUSED */ 1836 int 1837 com_kgdb_getc(arg) 1838 void *arg; 1839 { 1840 1841 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1842 } 1843 1844 /* ARGSUSED */ 1845 void 1846 com_kgdb_putc(arg, c) 1847 void *arg; 1848 int c; 1849 { 1850 1851 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1852 } 1853 #endif /* KGDB */ 1854 1855 /* helper function to identify the com ports used by 1856 console or KGDB (and not yet autoconf attached) */ 1857 int 1858 com_is_console(iot, iobase, ioh) 1859 bus_space_tag_t iot; 1860 int iobase; 1861 bus_space_handle_t *ioh; 1862 { 1863 bus_space_handle_t help; 1864 1865 if (!comconsattached && 1866 iot == comconstag && iobase == comconsaddr) 1867 help = comconsioh; 1868 #ifdef KGDB 1869 else if (!com_kgdb_attached && 1870 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1871 help = com_kgdb_ioh; 1872 #endif 1873 else 1874 return (0); 1875 1876 if (ioh) 1877 *ioh = help; 1878 return (1); 1879 } 1880
Indexes created Sun Sep 21 20:09:37 GMT 2025