com.c revision 1.119
1 /* $NetBSD: com.c,v 1.119 1997/10/29 18:28:07 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 #ifdef COM16650 354 u_int8_t lcr; 355 #endif 356 #ifdef COM_HAYESP 357 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 358 int *hayespp; 359 #endif 360 361 /* Disable interrupts before configuring the device. */ 362 sc->sc_ier = 0; 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 364 365 if (iot == comconstag && iobase == comconsaddr) { 366 comconsattached = 1; 367 368 /* Make sure the console is always "hardwired". */ 369 delay(1000); /* wait for output to finish */ 370 SET(sc->sc_hwflags, COM_HW_CONSOLE); 371 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 372 } 373 374 #ifdef COM_HAYESP 375 /* Look for a Hayes ESP board. */ 376 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 377 bus_space_handle_t hayespioh; 378 379 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 380 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 381 continue; 382 if (comprobeHAYESP(hayespioh, sc)) { 383 sc->sc_hayespioh = hayespioh; 384 sc->sc_fifolen = 1024; 385 386 /* Set 16550 compatibility mode */ 387 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 388 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 389 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 390 HAYESP_MODE_SCALE); 391 392 /* Set RTS/CTS flow control */ 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 394 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 396 397 /* Set flow control levels */ 398 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 404 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 405 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 406 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 407 408 break; 409 } 410 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 411 } 412 /* No ESP; look for other things. */ 413 if (*hayespp == 0) { 414 #endif 415 sc->sc_fifolen = 1; 416 /* look for a NS 16550AF UART with FIFOs */ 417 bus_space_write_1(iot, ioh, com_fifo, 418 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 419 delay(100); 420 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 421 == IIR_FIFO_MASK) 422 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 423 == FIFO_TRIGGER_14) { 424 SET(sc->sc_hwflags, COM_HW_FIFO); 425 426 #ifdef COM16650 427 /* 428 * IIR changes into the EFR if LCR is set to LCR_EERS 429 * on 16650s. We also know IIR != 0 at this point. 430 * Write 0 into the EFR, and read it. If the result 431 * is 0, we have a 16650. 432 * 433 * Older 16650s were broken; the test to detect them 434 * is taken from the Linux driver. Apparently 435 * setting DLAB enable gives access to the EFR on 436 * these chips. 437 */ 438 lcr = bus_space_read_1(iot, ioh, com_lcr); 439 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 440 bus_space_write_1(iot, ioh, com_efr, 0); 441 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 442 bus_space_write_1(iot, ioh, com_lcr, 443 lcr | LCR_DLAB); 444 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 445 CLR(sc->sc_hwflags, COM_HW_FIFO); 446 sc->sc_fifolen = 0; 447 } else { 448 SET(sc->sc_hwflags, COM_HW_FLOW); 449 sc->sc_fifolen = 32; 450 } 451 } else 452 #endif 453 sc->sc_fifolen = 16; 454 455 #ifdef COM16650 456 bus_space_write_1(iot, ioh, com_lcr, lcr); 457 if (sc->sc_fifolen == 0) 458 printf(": st16650, broken fifo\n"); 459 else if (sc->sc_fifolen == 32) 460 printf(": st16650a, working fifo\n"); 461 else 462 #endif 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 474 SET(sc->sc_mcr, MCR_IENABLE); 475 476 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 477 int maj; 478 479 /* locate the major number */ 480 for (maj = 0; maj < nchrdev; maj++) 481 if (cdevsw[maj].d_open == comopen) 482 break; 483 484 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 485 #ifdef DDB 486 com_enable_debugport(sc); 487 #endif 488 printf("%s: console\n", sc->sc_dev.dv_xname); 489 } 490 491 #ifdef KGDB 492 /* 493 * Allow kgdb to "take over" this port. If this is 494 * the kgdb device, it has exclusive use. 495 */ 496 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 497 com_kgdb_attached = 1; 498 499 SET(sc->sc_hwflags, COM_HW_KGDB); 500 com_enable_debugport(sc); 501 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 502 } 503 #endif 504 505 #ifdef __GENERIC_SOFT_INTERRUPTS 506 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 507 #endif 508 509 #if NRND > 0 && defined(RND_COM) 510 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 511 RND_TYPE_TTY); 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 struct tty *tp; 524 int s, s2; 525 int error = 0; 526 527 if (unit >= com_cd.cd_ndevs) 528 return (ENXIO); 529 sc = com_cd.cd_devs[unit]; 530 if (!sc) 531 return (ENXIO); 532 533 #ifdef KGDB 534 /* 535 * If this is the kgdb port, no other use is permitted. 536 */ 537 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 538 return (EBUSY); 539 #endif 540 541 if (!sc->sc_tty) { 542 tp = sc->sc_tty = ttymalloc(); 543 tty_attach(tp); 544 } else 545 tp = sc->sc_tty; 546 547 if (ISSET(tp->t_state, TS_ISOPEN) && 548 ISSET(tp->t_state, TS_XCLUDE) && 549 p->p_ucred->cr_uid != 0) 550 return (EBUSY); 551 552 s = spltty(); 553 554 /* We need to set this early for the benefit of comsoft(). */ 555 SET(tp->t_state, TS_WOPEN); 556 557 /* 558 * Do the following iff this is a first open. 559 */ 560 if (!ISSET(tp->t_state, TS_ISOPEN)) { 561 struct termios t; 562 563 /* Turn on interrupts. */ 564 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 565 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 566 567 /* Fetch the current modem control status, needed later. */ 568 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 569 570 /* Add some entry points needed by the tty layer. */ 571 tp->t_oproc = comstart; 572 tp->t_param = comparam; 573 tp->t_hwiflow = comhwiflow; 574 tp->t_dev = dev; 575 576 /* 577 * Initialize the termios status to the defaults. Add in the 578 * sticky bits from TIOCSFLAGS. 579 */ 580 t.c_ispeed = 0; 581 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 582 t.c_ospeed = comconsrate; 583 t.c_cflag = comconscflag; 584 } else { 585 t.c_ospeed = TTYDEF_SPEED; 586 t.c_cflag = TTYDEF_CFLAG; 587 } 588 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 589 SET(t.c_cflag, CLOCAL); 590 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 591 SET(t.c_cflag, CRTSCTS); 592 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 593 SET(t.c_cflag, MDMBUF); 594 tp->t_iflag = TTYDEF_IFLAG; 595 tp->t_oflag = TTYDEF_OFLAG; 596 tp->t_lflag = TTYDEF_LFLAG; 597 ttychars(tp); 598 (void) comparam(tp, &t); 599 ttsetwater(tp); 600 601 s2 = splserial(); 602 603 /* 604 * Turn on DTR. We must always do this, even if carrier is not 605 * present, because otherwise we'd have to use TIOCSDTR 606 * immediately after setting CLOCAL. We will drop DTR only on 607 * the next high-low transition of DCD, or by explicit request. 608 */ 609 com_modem(sc, 1); 610 611 /* Clear the input ring, and unblock. */ 612 sc->sc_rbput = sc->sc_rbget = 0; 613 sc->sc_rbavail = RXBUFSIZE; 614 com_iflush(sc); 615 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 616 com_hwiflow(sc); 617 618 #ifdef COM_DEBUG 619 if (com_debug) 620 comstatus(sc, "comopen "); 621 #endif 622 623 splx(s2); 624 } 625 error = 0; 626 627 /* If we're doing a blocking open... */ 628 if (!ISSET(flag, O_NONBLOCK)) 629 /* ...then wait for carrier. */ 630 while (!ISSET(tp->t_state, TS_CARR_ON) && 631 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 632 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 633 ttopen, 0); 634 if (error) { 635 /* 636 * If the open was interrupted and nobody 637 * else has the device open, then hang up. 638 */ 639 if (!ISSET(tp->t_state, TS_ISOPEN)) { 640 com_modem(sc, 0); 641 CLR(tp->t_state, TS_WOPEN); 642 ttwakeup(tp); 643 } 644 break; 645 } 646 SET(tp->t_state, TS_WOPEN); 647 } 648 649 splx(s); 650 if (error == 0) 651 error = (*linesw[tp->t_line].l_open)(dev, tp); 652 return (error); 653 } 654 655 int 656 comclose(dev, flag, mode, p) 657 dev_t dev; 658 int flag, mode; 659 struct proc *p; 660 { 661 int unit = COMUNIT(dev); 662 struct com_softc *sc = com_cd.cd_devs[unit]; 663 struct tty *tp = sc->sc_tty; 664 int s; 665 666 /* XXX This is for cons.c. */ 667 if (!ISSET(tp->t_state, TS_ISOPEN)) 668 return (0); 669 670 (*linesw[tp->t_line].l_close)(tp, flag); 671 ttyclose(tp); 672 673 /* If we were asserting flow control, then deassert it. */ 674 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 675 com_hwiflow(sc); 676 /* Clear any break condition set with TIOCSBRK. */ 677 com_break(sc, 0); 678 /* 679 * Hang up if necessary. Wait a bit, so the other side has time to 680 * notice even if we immediately open the port again. 681 */ 682 if (ISSET(tp->t_cflag, HUPCL)) { 683 com_modem(sc, 0); 684 (void) tsleep(sc, TTIPRI, ttclos, hz); 685 } 686 687 s = splserial(); 688 /* Turn off interrupts. */ 689 #ifdef DDB 690 if(ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 691 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 692 else 693 #else 694 sc->sc_ier = 0; 695 #endif 696 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 697 splx(s); 698 699 return (0); 700 } 701 702 int 703 comread(dev, uio, flag) 704 dev_t dev; 705 struct uio *uio; 706 int flag; 707 { 708 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 709 struct tty *tp = sc->sc_tty; 710 711 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 712 } 713 714 int 715 comwrite(dev, uio, flag) 716 dev_t dev; 717 struct uio *uio; 718 int flag; 719 { 720 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 721 struct tty *tp = sc->sc_tty; 722 723 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 724 } 725 726 struct tty * 727 comtty(dev) 728 dev_t dev; 729 { 730 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 731 struct tty *tp = sc->sc_tty; 732 733 return (tp); 734 } 735 736 static u_char 737 tiocm_xxx2mcr(data) 738 int data; 739 { 740 u_char m = 0; 741 742 if (ISSET(data, TIOCM_DTR)) 743 SET(m, MCR_DTR); 744 if (ISSET(data, TIOCM_RTS)) 745 SET(m, MCR_RTS); 746 return m; 747 } 748 749 int 750 comioctl(dev, cmd, data, flag, p) 751 dev_t dev; 752 u_long cmd; 753 caddr_t data; 754 int flag; 755 struct proc *p; 756 { 757 int unit = COMUNIT(dev); 758 struct com_softc *sc = com_cd.cd_devs[unit]; 759 struct tty *tp = sc->sc_tty; 760 int error; 761 762 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 763 if (error >= 0) 764 return (error); 765 766 error = ttioctl(tp, cmd, data, flag, p); 767 if (error >= 0) 768 return (error); 769 770 switch (cmd) { 771 case TIOCSBRK: 772 com_break(sc, 1); 773 break; 774 775 case TIOCCBRK: 776 com_break(sc, 0); 777 break; 778 779 case TIOCSDTR: 780 com_modem(sc, 1); 781 break; 782 783 case TIOCCDTR: 784 com_modem(sc, 0); 785 break; 786 787 case TIOCGFLAGS: 788 *(int *)data = sc->sc_swflags; 789 break; 790 791 case TIOCSFLAGS: 792 error = suser(p->p_ucred, &p->p_acflag); 793 if (error) 794 return (error); 795 sc->sc_swflags = *(int *)data; 796 break; 797 798 case TIOCMSET: 799 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 800 /*FALLTHROUGH*/ 801 802 case TIOCMBIS: 803 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 804 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 805 break; 806 807 case TIOCMBIC: 808 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 809 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 810 break; 811 812 case TIOCMGET: { 813 u_char m; 814 int bits = 0; 815 816 m = sc->sc_mcr; 817 if (ISSET(m, MCR_DTR)) 818 SET(bits, TIOCM_DTR); 819 if (ISSET(m, MCR_RTS)) 820 SET(bits, TIOCM_RTS); 821 m = sc->sc_msr; 822 if (ISSET(m, MSR_DCD)) 823 SET(bits, TIOCM_CD); 824 if (ISSET(m, MSR_CTS)) 825 SET(bits, TIOCM_CTS); 826 if (ISSET(m, MSR_DSR)) 827 SET(bits, TIOCM_DSR); 828 if (ISSET(m, MSR_RI | MSR_TERI)) 829 SET(bits, TIOCM_RI); 830 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 831 SET(bits, TIOCM_LE); 832 *(int *)data = bits; 833 break; 834 } 835 default: 836 return (ENOTTY); 837 } 838 839 #ifdef COM_DEBUG 840 if (com_debug) 841 comstatus(sc, "comioctl "); 842 #endif 843 844 return (0); 845 } 846 847 integrate void 848 com_schedrx(sc) 849 struct com_softc *sc; 850 { 851 852 sc->sc_rx_ready = 1; 853 854 /* Wake up the poller. */ 855 #ifdef __GENERIC_SOFT_INTERRUPTS 856 softintr_schedule(sc->sc_si); 857 #else 858 #ifndef alpha 859 setsoftserial(); 860 #else 861 if (!com_softintr_scheduled) { 862 com_softintr_scheduled = 1; 863 timeout(comsoft, NULL, 1); 864 } 865 #endif 866 #endif 867 } 868 869 void 870 com_break(sc, onoff) 871 struct com_softc *sc; 872 int onoff; 873 { 874 int s; 875 876 s = splserial(); 877 if (onoff) 878 SET(sc->sc_lcr, LCR_SBREAK); 879 else 880 CLR(sc->sc_lcr, LCR_SBREAK); 881 882 if (!sc->sc_heldchange) { 883 if (sc->sc_tx_busy) { 884 sc->sc_heldtbc = sc->sc_tbc; 885 sc->sc_tbc = 0; 886 sc->sc_heldchange = 1; 887 } else 888 com_loadchannelregs(sc); 889 } 890 splx(s); 891 } 892 893 void 894 com_modem(sc, onoff) 895 struct com_softc *sc; 896 int onoff; 897 { 898 int s; 899 900 s = splserial(); 901 if (onoff) 902 SET(sc->sc_mcr, sc->sc_mcr_dtr); 903 else 904 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 905 906 if (!sc->sc_heldchange) { 907 if (sc->sc_tx_busy) { 908 sc->sc_heldtbc = sc->sc_tbc; 909 sc->sc_tbc = 0; 910 sc->sc_heldchange = 1; 911 } else 912 com_loadchannelregs(sc); 913 } 914 splx(s); 915 } 916 917 static u_char 918 cflag2lcr(cflag) 919 tcflag_t cflag; 920 { 921 u_char lcr = 0; 922 923 switch (ISSET(cflag, CSIZE)) { 924 case CS5: 925 SET(lcr, LCR_5BITS); 926 break; 927 case CS6: 928 SET(lcr, LCR_6BITS); 929 break; 930 case CS7: 931 SET(lcr, LCR_7BITS); 932 break; 933 case CS8: 934 SET(lcr, LCR_8BITS); 935 break; 936 } 937 if (ISSET(cflag, PARENB)) { 938 SET(lcr, LCR_PENAB); 939 if (!ISSET(cflag, PARODD)) 940 SET(lcr, LCR_PEVEN); 941 } 942 if (ISSET(cflag, CSTOPB)) 943 SET(lcr, LCR_STOPB); 944 945 return (lcr); 946 } 947 948 int 949 comparam(tp, t) 950 struct tty *tp; 951 struct termios *t; 952 { 953 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 954 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 955 u_char lcr; 956 int s; 957 958 /* check requested parameters */ 959 if (ospeed < 0) 960 return (EINVAL); 961 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 962 return (EINVAL); 963 964 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 965 966 s = splserial(); 967 968 sc->sc_lcr = lcr; 969 970 /* 971 * For the console, always force CLOCAL and !HUPCL, so that the port 972 * is always active. 973 */ 974 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 975 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 976 SET(t->c_cflag, CLOCAL); 977 CLR(t->c_cflag, HUPCL); 978 } 979 980 /* 981 * If we're not in a mode that assumes a connection is present, then 982 * ignore carrier changes. 983 */ 984 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 985 sc->sc_msr_dcd = 0; 986 else 987 sc->sc_msr_dcd = MSR_DCD; 988 /* 989 * Set the flow control pins depending on the current flow control 990 * mode. 991 */ 992 if (ISSET(t->c_cflag, CRTSCTS)) { 993 sc->sc_mcr_dtr = MCR_DTR; 994 sc->sc_mcr_rts = MCR_RTS; 995 sc->sc_msr_cts = MSR_CTS; 996 sc->sc_r_hiwat = RXHIWAT; 997 sc->sc_r_lowat = RXLOWAT; 998 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 999 } else if (ISSET(t->c_cflag, MDMBUF)) { 1000 /* 1001 * For DTR/DCD flow control, make sure we don't toggle DTR for 1002 * carrier detection. 1003 */ 1004 sc->sc_mcr_dtr = 0; 1005 sc->sc_mcr_rts = MCR_DTR; 1006 sc->sc_msr_cts = MSR_DCD; 1007 sc->sc_r_hiwat = RXHIWAT; 1008 sc->sc_r_lowat = RXLOWAT; 1009 sc->sc_efr = 0; 1010 } else { 1011 /* 1012 * If no flow control, then always set RTS. This will make 1013 * the other side happy if it mistakenly thinks we're doing 1014 * RTS/CTS flow control. 1015 */ 1016 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1017 sc->sc_mcr_rts = 0; 1018 sc->sc_msr_cts = 0; 1019 sc->sc_r_hiwat = 0; 1020 sc->sc_r_lowat = 0; 1021 sc->sc_efr = 0; 1022 if (ISSET(sc->sc_mcr, MCR_DTR)) 1023 SET(sc->sc_mcr, MCR_RTS); 1024 else 1025 CLR(sc->sc_mcr, MCR_RTS); 1026 } 1027 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1028 1029 #if 0 1030 if (ospeed == 0) 1031 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1032 else 1033 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1034 #endif 1035 1036 sc->sc_dlbl = ospeed; 1037 sc->sc_dlbh = ospeed >> 8; 1038 1039 /* 1040 * Set the FIFO threshold based on the receive speed. 1041 * 1042 * * If it's a low speed, it's probably a mouse or some other 1043 * interactive device, so set the threshold low. 1044 * * If it's a high speed, trim the trigger level down to prevent 1045 * overflows. 1046 * * Otherwise set it a bit higher. 1047 */ 1048 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1049 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1050 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1051 sc->sc_fifo = FIFO_ENABLE | 1052 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1053 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1054 else 1055 sc->sc_fifo = 0; 1056 1057 /* and copy to tty */ 1058 tp->t_ispeed = 0; 1059 tp->t_ospeed = t->c_ospeed; 1060 tp->t_cflag = t->c_cflag; 1061 1062 if (!sc->sc_heldchange) { 1063 if (sc->sc_tx_busy) { 1064 sc->sc_heldtbc = sc->sc_tbc; 1065 sc->sc_tbc = 0; 1066 sc->sc_heldchange = 1; 1067 } else 1068 com_loadchannelregs(sc); 1069 } 1070 1071 splx(s); 1072 1073 /* 1074 * Update the tty layer's idea of the carrier bit, in case we changed 1075 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1076 * lose carrier while carrier detection is on. 1077 */ 1078 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1079 1080 #ifdef COM_DEBUG 1081 if (com_debug) 1082 comstatus(sc, "comparam "); 1083 #endif 1084 1085 /* Block or unblock as needed. */ 1086 if (!ISSET(t->c_cflag, CHWFLOW)) { 1087 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1088 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1089 com_schedrx(sc); 1090 } 1091 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1092 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1093 com_hwiflow(sc); 1094 } 1095 if (sc->sc_tx_stopped) { 1096 sc->sc_tx_stopped = 0; 1097 comstart(tp); 1098 } 1099 } else { 1100 /* XXXXX FIX ME */ 1101 #if 0 1102 commsrint(sc, tp); 1103 #endif 1104 } 1105 1106 return (0); 1107 } 1108 1109 void 1110 com_iflush(sc) 1111 struct com_softc *sc; 1112 { 1113 bus_space_tag_t iot = sc->sc_iot; 1114 bus_space_handle_t ioh = sc->sc_ioh; 1115 1116 /* flush any pending I/O */ 1117 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1118 (void) bus_space_read_1(iot, ioh, com_data); 1119 } 1120 1121 void 1122 com_loadchannelregs(sc) 1123 struct com_softc *sc; 1124 { 1125 bus_space_tag_t iot = sc->sc_iot; 1126 bus_space_handle_t ioh = sc->sc_ioh; 1127 1128 /* XXXXX necessary? */ 1129 com_iflush(sc); 1130 1131 bus_space_write_1(iot, ioh, com_ier, 0); 1132 1133 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1134 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1135 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1136 } 1137 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1138 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1139 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1140 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1141 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1142 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1143 1144 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1145 } 1146 1147 int 1148 comhwiflow(tp, block) 1149 struct tty *tp; 1150 int block; 1151 { 1152 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1153 int s; 1154 1155 if (sc->sc_mcr_rts == 0) 1156 return (0); 1157 1158 s = splserial(); 1159 if (block) { 1160 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1161 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1162 com_hwiflow(sc); 1163 } 1164 } else { 1165 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1166 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1167 com_schedrx(sc); 1168 } 1169 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1170 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1171 com_hwiflow(sc); 1172 } 1173 } 1174 splx(s); 1175 return (1); 1176 } 1177 1178 /* 1179 * (un)block input via hw flowcontrol 1180 */ 1181 void 1182 com_hwiflow(sc) 1183 struct com_softc *sc; 1184 { 1185 bus_space_tag_t iot = sc->sc_iot; 1186 bus_space_handle_t ioh = sc->sc_ioh; 1187 1188 if (sc->sc_mcr_rts == 0) 1189 return; 1190 1191 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1192 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1193 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1194 } else { 1195 SET(sc->sc_mcr, sc->sc_mcr_rts); 1196 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1197 } 1198 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1199 } 1200 1201 1202 void 1203 comstart(tp) 1204 struct tty *tp; 1205 { 1206 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1207 bus_space_tag_t iot = sc->sc_iot; 1208 bus_space_handle_t ioh = sc->sc_ioh; 1209 int s; 1210 1211 s = spltty(); 1212 if (ISSET(tp->t_state, TS_BUSY)) 1213 goto out; 1214 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1215 goto stopped; 1216 1217 if (sc->sc_tx_stopped) 1218 goto stopped; 1219 1220 if (tp->t_outq.c_cc <= tp->t_lowat) { 1221 if (ISSET(tp->t_state, TS_ASLEEP)) { 1222 CLR(tp->t_state, TS_ASLEEP); 1223 wakeup(&tp->t_outq); 1224 } 1225 selwakeup(&tp->t_wsel); 1226 if (tp->t_outq.c_cc == 0) 1227 goto stopped; 1228 } 1229 1230 /* Grab the first contiguous region of buffer space. */ 1231 { 1232 u_char *tba; 1233 int tbc; 1234 1235 tba = tp->t_outq.c_cf; 1236 tbc = ndqb(&tp->t_outq, 0); 1237 1238 (void)splserial(); 1239 1240 sc->sc_tba = tba; 1241 sc->sc_tbc = tbc; 1242 } 1243 1244 SET(tp->t_state, TS_BUSY); 1245 sc->sc_tx_busy = 1; 1246 1247 /* Enable transmit completion interrupts if necessary. */ 1248 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1249 SET(sc->sc_ier, IER_ETXRDY); 1250 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1251 } 1252 1253 /* Output the first chunk of the contiguous buffer. */ 1254 { 1255 int n; 1256 1257 n = sc->sc_fifolen; 1258 if (n > sc->sc_tbc) 1259 n = sc->sc_tbc; 1260 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1261 sc->sc_tbc -= n; 1262 sc->sc_tba += n; 1263 } 1264 splx(s); 1265 return; 1266 1267 stopped: 1268 /* Disable transmit completion interrupts if necessary. */ 1269 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1270 CLR(sc->sc_ier, IER_ETXRDY); 1271 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1272 } 1273 out: 1274 splx(s); 1275 return; 1276 } 1277 1278 /* 1279 * Stop output on a line. 1280 */ 1281 void 1282 comstop(tp, flag) 1283 struct tty *tp; 1284 int flag; 1285 { 1286 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1287 int s; 1288 1289 s = splserial(); 1290 if (ISSET(tp->t_state, TS_BUSY)) { 1291 /* Stop transmitting at the next chunk. */ 1292 sc->sc_tbc = 0; 1293 sc->sc_heldtbc = 0; 1294 if (!ISSET(tp->t_state, TS_TTSTOP)) 1295 SET(tp->t_state, TS_FLUSH); 1296 } 1297 splx(s); 1298 } 1299 1300 void 1301 comdiag(arg) 1302 void *arg; 1303 { 1304 struct com_softc *sc = arg; 1305 int overflows, floods; 1306 int s; 1307 1308 s = splserial(); 1309 overflows = sc->sc_overflows; 1310 sc->sc_overflows = 0; 1311 floods = sc->sc_floods; 1312 sc->sc_floods = 0; 1313 sc->sc_errors = 0; 1314 splx(s); 1315 1316 log(LOG_WARNING, 1317 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1318 sc->sc_dev.dv_xname, 1319 overflows, overflows == 1 ? "" : "s", 1320 floods, floods == 1 ? "" : "s"); 1321 } 1322 1323 integrate void 1324 comrxint(sc, tp) 1325 struct com_softc *sc; 1326 struct tty *tp; 1327 { 1328 u_int get, cc, scc; 1329 int code; 1330 u_char lsr; 1331 int s; 1332 static int lsrmap[8] = { 1333 0, TTY_PE, 1334 TTY_FE, TTY_PE|TTY_FE, 1335 TTY_FE, TTY_PE|TTY_FE, 1336 TTY_FE, TTY_PE|TTY_FE 1337 }; 1338 1339 get = sc->sc_rbget; 1340 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1341 1342 if (cc == RXBUFSIZE) { 1343 sc->sc_floods++; 1344 if (sc->sc_errors++ == 0) 1345 timeout(comdiag, sc, 60 * hz); 1346 } 1347 1348 while (cc) { 1349 lsr = sc->sc_lbuf[get]; 1350 if (ISSET(lsr, LSR_OE)) { 1351 sc->sc_overflows++; 1352 if (sc->sc_errors++ == 0) 1353 timeout(comdiag, sc, 60 * hz); 1354 } 1355 code = sc->sc_rbuf[get] | 1356 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1357 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1358 /* 1359 * The line discipline's buffer is out of space. 1360 */ 1361 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1362 /* 1363 * We're either not using flow control, or the 1364 * line discipline didn't tell us to block for 1365 * some reason. Either way, we have no way to 1366 * know when there's more space available, so 1367 * just drop the rest of the data. 1368 */ 1369 get = (get + cc) & RXBUFMASK; 1370 cc = 0; 1371 } else { 1372 /* 1373 * Don't schedule any more receive processing 1374 * until the line discipline tells us there's 1375 * space available (through comhwiflow()). 1376 * Leave the rest of the data in the input 1377 * buffer. 1378 */ 1379 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1380 } 1381 break; 1382 } 1383 get = (get + 1) & RXBUFMASK; 1384 cc--; 1385 } 1386 1387 if (cc != scc) { 1388 sc->sc_rbget = get; 1389 s = splserial(); 1390 cc = sc->sc_rbavail += scc - cc; 1391 /* Buffers should be ok again, release possible block. */ 1392 if (cc >= sc->sc_r_lowat) { 1393 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1394 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1395 SET(sc->sc_ier, IER_ERXRDY); 1396 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1397 } 1398 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1399 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1400 com_hwiflow(sc); 1401 } 1402 } 1403 splx(s); 1404 } 1405 } 1406 1407 integrate void 1408 comtxint(sc, tp) 1409 struct com_softc *sc; 1410 struct tty *tp; 1411 { 1412 1413 CLR(tp->t_state, TS_BUSY); 1414 if (ISSET(tp->t_state, TS_FLUSH)) 1415 CLR(tp->t_state, TS_FLUSH); 1416 else 1417 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1418 (*linesw[tp->t_line].l_start)(tp); 1419 } 1420 1421 integrate void 1422 commsrint(sc, tp) 1423 struct com_softc *sc; 1424 struct tty *tp; 1425 { 1426 u_char msr, delta; 1427 int s; 1428 1429 s = splserial(); 1430 msr = sc->sc_msr; 1431 delta = sc->sc_msr_delta; 1432 sc->sc_msr_delta = 0; 1433 splx(s); 1434 1435 if (ISSET(delta, sc->sc_msr_dcd)) { 1436 /* 1437 * Inform the tty layer that carrier detect changed. 1438 */ 1439 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1440 } 1441 1442 if (ISSET(delta, sc->sc_msr_cts)) { 1443 /* Block or unblock output according to flow control. */ 1444 if (ISSET(msr, sc->sc_msr_cts)) { 1445 sc->sc_tx_stopped = 0; 1446 (*linesw[tp->t_line].l_start)(tp); 1447 } else { 1448 sc->sc_tx_stopped = 1; 1449 } 1450 } 1451 1452 #ifdef COM_DEBUG 1453 if (com_debug) 1454 comstatus(sc, "commsrint"); 1455 #endif 1456 } 1457 1458 #ifdef __GENERIC_SOFT_INTERRUPTS 1459 void 1460 comsoft(arg) 1461 void *arg; 1462 { 1463 struct com_softc *sc = arg; 1464 struct tty *tp; 1465 1466 { 1467 #else 1468 void 1469 #ifndef alpha 1470 comsoft() 1471 #else 1472 comsoft(arg) 1473 void *arg; 1474 #endif 1475 { 1476 struct com_softc *sc; 1477 struct tty *tp; 1478 int unit; 1479 #ifdef alpha 1480 int s; 1481 1482 s = splsoftserial(); 1483 com_softintr_scheduled = 0; 1484 #endif 1485 1486 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1487 sc = com_cd.cd_devs[unit]; 1488 if (sc == NULL) 1489 continue; 1490 1491 tp = sc->sc_tty; 1492 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1493 continue; 1494 #endif 1495 tp = sc->sc_tty; 1496 1497 if (sc->sc_rx_ready) { 1498 sc->sc_rx_ready = 0; 1499 comrxint(sc, tp); 1500 } 1501 1502 if (sc->sc_st_check) { 1503 sc->sc_st_check = 0; 1504 commsrint(sc, tp); 1505 } 1506 1507 if (sc->sc_tx_done) { 1508 sc->sc_tx_done = 0; 1509 comtxint(sc, tp); 1510 } 1511 } 1512 1513 #ifndef __GENERIC_SOFT_INTERRUPTS 1514 #ifdef alpha 1515 splx(s); 1516 #endif 1517 #endif 1518 } 1519 1520 int 1521 comintr(arg) 1522 void *arg; 1523 { 1524 struct com_softc *sc = arg; 1525 bus_space_tag_t iot = sc->sc_iot; 1526 bus_space_handle_t ioh = sc->sc_ioh; 1527 u_char lsr, iir; 1528 u_int put, cc; 1529 1530 iir = bus_space_read_1(iot, ioh, com_iir); 1531 if (ISSET(iir, IIR_NOPEND)) 1532 return (0); 1533 1534 put = sc->sc_rbput; 1535 cc = sc->sc_rbavail; 1536 1537 do { 1538 u_char msr, delta; 1539 1540 lsr = bus_space_read_1(iot, ioh, com_lsr); 1541 #if defined(DDB) || defined(KGDB) 1542 if (ISSET(lsr, LSR_BI)) { 1543 #ifdef DDB 1544 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1545 Debugger(); 1546 continue; 1547 } 1548 #endif 1549 #ifdef KGDB 1550 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1551 kgdb_connect(1); 1552 continue; 1553 } 1554 #endif 1555 } 1556 #endif /* DDB || KGDB */ 1557 1558 if (ISSET(lsr, LSR_RCV_MASK) && 1559 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1560 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1561 sc->sc_rbuf[put] = 1562 bus_space_read_1(iot, ioh, com_data); 1563 sc->sc_lbuf[put] = lsr; 1564 put = (put + 1) & RXBUFMASK; 1565 lsr = bus_space_read_1(iot, ioh, com_lsr); 1566 } 1567 /* 1568 * Current string of incoming characters ended because 1569 * no more data was available. Schedule a receive event 1570 * if any data was received. Drop any characters that 1571 * we couldn't handle. 1572 */ 1573 sc->sc_rbput = put; 1574 sc->sc_rbavail = cc; 1575 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1576 sc->sc_rx_ready = 1; 1577 /* 1578 * See if we are in danger of overflowing a buffer. If 1579 * so, use hardware flow control to ease the pressure. 1580 */ 1581 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1582 cc < sc->sc_r_hiwat) { 1583 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1584 com_hwiflow(sc); 1585 } 1586 /* 1587 * If we're out of space, disable receive interrupts 1588 * until the queue has drained a bit. 1589 */ 1590 if (!cc) { 1591 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1592 CLR(sc->sc_ier, IER_ERXRDY); 1593 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1594 } 1595 } else { 1596 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1597 bus_space_write_1(iot, ioh, com_ier, 0); 1598 delay(10); 1599 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1600 iir = IIR_NOPEND; 1601 continue; 1602 } 1603 } 1604 1605 msr = bus_space_read_1(iot, ioh, com_msr); 1606 delta = msr ^ sc->sc_msr; 1607 sc->sc_msr = msr; 1608 if (ISSET(delta, sc->sc_msr_mask)) { 1609 sc->sc_msr_delta |= delta; 1610 1611 /* 1612 * Stop output immediately if we lose the output 1613 * flow control signal or carrier detect. 1614 */ 1615 if (ISSET(~msr, sc->sc_msr_mask)) { 1616 sc->sc_tbc = 0; 1617 sc->sc_heldtbc = 0; 1618 #ifdef COM_DEBUG 1619 if (com_debug) 1620 comstatus(sc, "comintr "); 1621 #endif 1622 } 1623 1624 sc->sc_st_check = 1; 1625 } 1626 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1627 1628 /* 1629 * Done handling any receive interrupts. See if data can be 1630 * transmitted as well. Schedule tx done event if no data left 1631 * and tty was marked busy. 1632 */ 1633 if (ISSET(lsr, LSR_TXRDY)) { 1634 /* 1635 * If we've delayed a parameter change, do it now, and restart 1636 * output. 1637 */ 1638 if (sc->sc_heldchange) { 1639 com_loadchannelregs(sc); 1640 sc->sc_heldchange = 0; 1641 sc->sc_tbc = sc->sc_heldtbc; 1642 sc->sc_heldtbc = 0; 1643 } 1644 /* Output the next chunk of the contiguous buffer, if any. */ 1645 if (sc->sc_tbc > 0) { 1646 int n; 1647 1648 n = sc->sc_fifolen; 1649 if (n > sc->sc_tbc) 1650 n = sc->sc_tbc; 1651 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1652 sc->sc_tbc -= n; 1653 sc->sc_tba += n; 1654 } else if (sc->sc_tx_busy) { 1655 sc->sc_tx_busy = 0; 1656 sc->sc_tx_done = 1; 1657 } 1658 } 1659 1660 /* Wake up the poller. */ 1661 #ifdef __GENERIC_SOFT_INTERRUPTS 1662 softintr_schedule(sc->sc_si); 1663 #else 1664 #ifndef alpha 1665 setsoftserial(); 1666 #else 1667 if (!com_softintr_scheduled) { 1668 com_softintr_scheduled = 1; 1669 timeout(comsoft, NULL, 1); 1670 } 1671 #endif 1672 #endif 1673 1674 #if NRND > 0 && defined(RND_COM) 1675 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1676 #endif 1677 1678 return (1); 1679 } 1680 1681 /* 1682 * The following functions are polled getc and putc routines, shared 1683 * by the console and kgdb glue. 1684 */ 1685 1686 int 1687 com_common_getc(iot, ioh) 1688 bus_space_tag_t iot; 1689 bus_space_handle_t ioh; 1690 { 1691 int s = splserial(); 1692 u_char stat, c; 1693 1694 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1695 ; 1696 c = bus_space_read_1(iot, ioh, com_data); 1697 stat = bus_space_read_1(iot, ioh, com_iir); 1698 splx(s); 1699 return (c); 1700 } 1701 1702 void 1703 com_common_putc(iot, ioh, c) 1704 bus_space_tag_t iot; 1705 bus_space_handle_t ioh; 1706 int c; 1707 { 1708 int s = splserial(); 1709 u_char stat; 1710 register int timo; 1711 1712 /* wait for any pending transmission to finish */ 1713 timo = 50000; 1714 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1715 && --timo) 1716 ; 1717 bus_space_write_1(iot, ioh, com_data, c); 1718 /* wait for this transmission to complete */ 1719 timo = 1500000; 1720 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1721 && --timo) 1722 ; 1723 /* clear any interrupts generated by this transmission */ 1724 stat = bus_space_read_1(iot, ioh, com_iir); 1725 splx(s); 1726 } 1727 1728 /* 1729 * Initialize UART to known state. 1730 */ 1731 int 1732 cominit(iot, iobase, rate, frequency, cflag, iohp) 1733 bus_space_tag_t iot; 1734 int iobase; 1735 int rate, frequency; 1736 tcflag_t cflag; 1737 bus_space_handle_t *iohp; 1738 { 1739 bus_space_handle_t ioh; 1740 1741 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1742 return (ENOMEM); /* ??? */ 1743 1744 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1745 bus_space_write_1(iot, ioh, com_efr, 0); 1746 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1747 rate = comspeed(rate, frequency); 1748 bus_space_write_1(iot, ioh, com_dlbl, rate); 1749 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1750 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1751 bus_space_write_1(iot, ioh, com_mcr, 0); 1752 bus_space_write_1(iot, ioh, com_fifo, 1753 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1754 bus_space_write_1(iot, ioh, com_ier, 0); 1755 1756 *iohp = ioh; 1757 return (0); 1758 } 1759 1760 /* 1761 * Following are all routines needed for COM to act as console 1762 */ 1763 1764 int 1765 comcnattach(iot, iobase, rate, frequency, cflag) 1766 bus_space_tag_t iot; 1767 int iobase; 1768 int rate, frequency; 1769 tcflag_t cflag; 1770 { 1771 int res; 1772 static struct consdev comcons = { NULL, NULL, 1773 comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL}; 1774 1775 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1776 if (res) 1777 return (res); 1778 1779 cn_tab = &comcons; 1780 1781 comconstag = iot; 1782 comconsaddr = iobase; 1783 comconsrate = rate; 1784 comconscflag = cflag; 1785 1786 return (0); 1787 } 1788 1789 int 1790 comcngetc(dev) 1791 dev_t dev; 1792 { 1793 1794 return (com_common_getc(comconstag, comconsioh)); 1795 } 1796 1797 /* 1798 * Console kernel output character routine. 1799 */ 1800 void 1801 comcnputc(dev, c) 1802 dev_t dev; 1803 int c; 1804 { 1805 1806 com_common_putc(comconstag, comconsioh, c); 1807 } 1808 1809 void 1810 comcnpollc(dev, on) 1811 dev_t dev; 1812 int on; 1813 { 1814 1815 } 1816 1817 #ifdef KGDB 1818 int 1819 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1820 bus_space_tag_t iot; 1821 int iobase; 1822 int rate, frequency; 1823 tcflag_t cflag; 1824 { 1825 int res; 1826 1827 if (iot == comconstag && iobase == comconsaddr) 1828 return (EBUSY); /* cannot share with console */ 1829 1830 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1831 if (res) 1832 return (res); 1833 1834 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1835 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1836 1837 com_kgdb_iot = iot; 1838 com_kgdb_addr = iobase; 1839 1840 return (0); 1841 } 1842 1843 /* ARGSUSED */ 1844 int 1845 com_kgdb_getc(arg) 1846 void *arg; 1847 { 1848 1849 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1850 } 1851 1852 /* ARGSUSED */ 1853 void 1854 com_kgdb_putc(arg, c) 1855 void *arg; 1856 int c; 1857 { 1858 1859 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1860 } 1861 #endif /* KGDB */ 1862 1863 /* helper function to identify the com ports used by 1864 console or KGDB (and not yet autoconf attached) */ 1865 int 1866 com_is_console(iot, iobase, ioh) 1867 bus_space_tag_t iot; 1868 int iobase; 1869 bus_space_handle_t *ioh; 1870 { 1871 bus_space_handle_t help; 1872 1873 if (!comconsattached && 1874 iot == comconstag && iobase == comconsaddr) 1875 help = comconsioh; 1876 #ifdef KGDB 1877 else if (!com_kgdb_attached && 1878 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1879 help = com_kgdb_ioh; 1880 #endif 1881 else 1882 return (0); 1883 1884 if (ioh) 1885 *ioh = help; 1886 return (1); 1887 } 1888
Indexes created Tue Sep 23 13:09:54 GMT 2025