com.c revision 1.121
1 /* $NetBSD: com.c,v 1.121 1997/11/01 20:40:38 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 #ifdef COM16650 354 u_int8_t lcr; 355 #endif 356 #ifdef COM_HAYESP 357 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 358 int *hayespp; 359 #endif 360 361 /* Disable interrupts before configuring the device. */ 362 sc->sc_ier = 0; 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 364 365 if (iot == comconstag && iobase == comconsaddr) { 366 comconsattached = 1; 367 368 /* Make sure the console is always "hardwired". */ 369 delay(1000); /* wait for output to finish */ 370 SET(sc->sc_hwflags, COM_HW_CONSOLE); 371 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 372 } 373 374 #ifdef COM_HAYESP 375 /* Look for a Hayes ESP board. */ 376 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 377 bus_space_handle_t hayespioh; 378 379 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 380 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 381 continue; 382 if (comprobeHAYESP(hayespioh, sc)) { 383 sc->sc_hayespioh = hayespioh; 384 sc->sc_fifolen = 1024; 385 386 /* Set 16550 compatibility mode */ 387 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 388 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 389 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 390 HAYESP_MODE_SCALE); 391 392 /* Set RTS/CTS flow control */ 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 394 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 396 397 /* Set flow control levels */ 398 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 404 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 405 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 406 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 407 408 break; 409 } 410 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 411 } 412 /* No ESP; look for other things. */ 413 if (*hayespp == 0) { 414 #endif 415 sc->sc_fifolen = 1; 416 /* look for a NS 16550AF UART with FIFOs */ 417 bus_space_write_1(iot, ioh, com_fifo, 418 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 419 delay(100); 420 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 421 == IIR_FIFO_MASK) 422 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 423 == FIFO_TRIGGER_14) { 424 SET(sc->sc_hwflags, COM_HW_FIFO); 425 426 #ifdef COM16650 427 /* 428 * IIR changes into the EFR if LCR is set to LCR_EERS 429 * on 16650s. We also know IIR != 0 at this point. 430 * Write 0 into the EFR, and read it. If the result 431 * is 0, we have a 16650. 432 * 433 * Older 16650s were broken; the test to detect them 434 * is taken from the Linux driver. Apparently 435 * setting DLAB enable gives access to the EFR on 436 * these chips. 437 */ 438 lcr = bus_space_read_1(iot, ioh, com_lcr); 439 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 440 bus_space_write_1(iot, ioh, com_efr, 0); 441 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 442 bus_space_write_1(iot, ioh, com_lcr, 443 lcr | LCR_DLAB); 444 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 445 CLR(sc->sc_hwflags, COM_HW_FIFO); 446 sc->sc_fifolen = 0; 447 } else { 448 SET(sc->sc_hwflags, COM_HW_FLOW); 449 sc->sc_fifolen = 32; 450 } 451 } else 452 #endif 453 sc->sc_fifolen = 16; 454 455 #ifdef COM16650 456 bus_space_write_1(iot, ioh, com_lcr, lcr); 457 if (sc->sc_fifolen == 0) 458 printf(": st16650, broken fifo\n"); 459 else if (sc->sc_fifolen == 32) 460 printf(": st16650a, working fifo\n"); 461 else 462 #endif 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 474 SET(sc->sc_mcr, MCR_IENABLE); 475 476 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 477 int maj; 478 479 /* locate the major number */ 480 for (maj = 0; maj < nchrdev; maj++) 481 if (cdevsw[maj].d_open == comopen) 482 break; 483 484 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 485 #ifdef DDB 486 com_enable_debugport(sc); 487 #endif 488 printf("%s: console\n", sc->sc_dev.dv_xname); 489 } 490 491 #ifdef KGDB 492 /* 493 * Allow kgdb to "take over" this port. If this is 494 * the kgdb device, it has exclusive use. 495 */ 496 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 497 com_kgdb_attached = 1; 498 499 SET(sc->sc_hwflags, COM_HW_KGDB); 500 com_enable_debugport(sc); 501 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 502 } 503 #endif 504 505 #ifdef __GENERIC_SOFT_INTERRUPTS 506 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 507 #endif 508 509 #if NRND > 0 && defined(RND_COM) 510 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 511 RND_TYPE_TTY); 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 struct tty *tp; 524 int s, s2; 525 int error = 0; 526 527 if (unit >= com_cd.cd_ndevs) 528 return (ENXIO); 529 sc = com_cd.cd_devs[unit]; 530 if (!sc) 531 return (ENXIO); 532 533 #ifdef KGDB 534 /* 535 * If this is the kgdb port, no other use is permitted. 536 */ 537 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 538 return (EBUSY); 539 #endif 540 541 tp = sc->sc_tty; 542 if (tp == 0) { 543 sc->sc_tty = tp = ttymalloc(); 544 tp->t_dev = dev; 545 tp->t_oproc = comstart; 546 tp->t_param = comparam; 547 tp->t_hwiflow = comhwiflow; 548 tty_attach(tp); 549 } 550 551 if (ISSET(tp->t_state, TS_ISOPEN) && 552 ISSET(tp->t_state, TS_XCLUDE) && 553 p->p_ucred->cr_uid != 0) 554 return (EBUSY); 555 556 s = spltty(); 557 558 /* We need to set this early for the benefit of comsoft(). */ 559 SET(tp->t_state, TS_WOPEN); 560 561 /* 562 * Do the following iff this is a first open. 563 */ 564 if (!ISSET(tp->t_state, TS_ISOPEN)) { 565 struct termios t; 566 567 s2 = splserial(); 568 569 /* Turn on interrupts. */ 570 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 571 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 572 573 /* Fetch the current modem control status, needed later. */ 574 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 575 576 splx(s2); 577 578 /* 579 * Initialize the termios status to the defaults. Add in the 580 * sticky bits from TIOCSFLAGS. 581 */ 582 t.c_ispeed = 0; 583 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 584 t.c_ospeed = comconsrate; 585 t.c_cflag = comconscflag; 586 } else { 587 t.c_ospeed = TTYDEF_SPEED; 588 t.c_cflag = TTYDEF_CFLAG; 589 } 590 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 591 SET(t.c_cflag, CLOCAL); 592 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 593 SET(t.c_cflag, CRTSCTS); 594 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 595 SET(t.c_cflag, MDMBUF); 596 (void) comparam(tp, &t); 597 tp->t_iflag = TTYDEF_IFLAG; 598 tp->t_oflag = TTYDEF_OFLAG; 599 tp->t_lflag = TTYDEF_LFLAG; 600 ttychars(tp); 601 ttsetwater(tp); 602 603 s2 = splserial(); 604 605 /* 606 * Turn on DTR. We must always do this, even if carrier is not 607 * present, because otherwise we'd have to use TIOCSDTR 608 * immediately after setting CLOCAL, which applications do not 609 * expect. We always assert DTR while the device is open 610 * unless explicitly requested to deassert it. 611 */ 612 com_modem(sc, 1); 613 614 /* Clear the input ring, and unblock. */ 615 sc->sc_rbput = sc->sc_rbget = 0; 616 sc->sc_rbavail = RXBUFSIZE; 617 com_iflush(sc); 618 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 619 com_hwiflow(sc); 620 621 #ifdef COM_DEBUG 622 if (com_debug) 623 comstatus(sc, "comopen "); 624 #endif 625 626 splx(s2); 627 } 628 error = 0; 629 630 /* If we're doing a blocking open... */ 631 if (!ISSET(flag, O_NONBLOCK)) 632 /* ...then wait for carrier. */ 633 while (!ISSET(tp->t_state, TS_CARR_ON) && 634 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 635 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 636 ttopen, 0); 637 if (error) { 638 /* 639 * If the open was interrupted and nobody 640 * else has the device open, then hang up. 641 */ 642 if (!ISSET(tp->t_state, TS_ISOPEN)) { 643 com_modem(sc, 0); 644 CLR(tp->t_state, TS_WOPEN); 645 ttwakeup(tp); 646 } 647 break; 648 } 649 SET(tp->t_state, TS_WOPEN); 650 } 651 652 splx(s); 653 if (error == 0) 654 error = (*linesw[tp->t_line].l_open)(dev, tp); 655 return (error); 656 } 657 658 int 659 comclose(dev, flag, mode, p) 660 dev_t dev; 661 int flag, mode; 662 struct proc *p; 663 { 664 int unit = COMUNIT(dev); 665 struct com_softc *sc = com_cd.cd_devs[unit]; 666 struct tty *tp = sc->sc_tty; 667 int s; 668 669 /* XXX This is for cons.c. */ 670 if (!ISSET(tp->t_state, TS_ISOPEN)) 671 return (0); 672 673 (*linesw[tp->t_line].l_close)(tp, flag); 674 ttyclose(tp); 675 676 s = splserial(); 677 678 /* If we were asserting flow control, then deassert it. */ 679 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 680 com_hwiflow(sc); 681 /* Clear any break condition set with TIOCSBRK. */ 682 com_break(sc, 0); 683 684 splx(s); 685 686 /* 687 * Hang up if necessary. Wait a bit, so the other side has time to 688 * notice even if we immediately open the port again. 689 */ 690 if (ISSET(tp->t_cflag, HUPCL)) { 691 com_modem(sc, 0); 692 (void) tsleep(sc, TTIPRI, ttclos, hz); 693 } 694 695 s = splserial(); 696 697 /* Turn off interrupts. */ 698 #ifdef DDB 699 if(ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 700 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 701 else 702 #else 703 sc->sc_ier = 0; 704 #endif 705 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 706 707 splx(s); 708 709 return (0); 710 } 711 712 int 713 comread(dev, uio, flag) 714 dev_t dev; 715 struct uio *uio; 716 int flag; 717 { 718 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 719 struct tty *tp = sc->sc_tty; 720 721 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 722 } 723 724 int 725 comwrite(dev, uio, flag) 726 dev_t dev; 727 struct uio *uio; 728 int flag; 729 { 730 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 731 struct tty *tp = sc->sc_tty; 732 733 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 734 } 735 736 struct tty * 737 comtty(dev) 738 dev_t dev; 739 { 740 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 741 struct tty *tp = sc->sc_tty; 742 743 return (tp); 744 } 745 746 static u_char 747 tiocm_xxx2mcr(data) 748 int data; 749 { 750 u_char m = 0; 751 752 if (ISSET(data, TIOCM_DTR)) 753 SET(m, MCR_DTR); 754 if (ISSET(data, TIOCM_RTS)) 755 SET(m, MCR_RTS); 756 return m; 757 } 758 759 int 760 comioctl(dev, cmd, data, flag, p) 761 dev_t dev; 762 u_long cmd; 763 caddr_t data; 764 int flag; 765 struct proc *p; 766 { 767 int unit = COMUNIT(dev); 768 struct com_softc *sc = com_cd.cd_devs[unit]; 769 struct tty *tp = sc->sc_tty; 770 int error; 771 772 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 773 if (error >= 0) 774 return (error); 775 776 error = ttioctl(tp, cmd, data, flag, p); 777 if (error >= 0) 778 return (error); 779 780 switch (cmd) { 781 case TIOCSBRK: 782 com_break(sc, 1); 783 break; 784 785 case TIOCCBRK: 786 com_break(sc, 0); 787 break; 788 789 case TIOCSDTR: 790 com_modem(sc, 1); 791 break; 792 793 case TIOCCDTR: 794 com_modem(sc, 0); 795 break; 796 797 case TIOCGFLAGS: 798 *(int *)data = sc->sc_swflags; 799 break; 800 801 case TIOCSFLAGS: 802 error = suser(p->p_ucred, &p->p_acflag); 803 if (error) 804 return (error); 805 sc->sc_swflags = *(int *)data; 806 break; 807 808 case TIOCMSET: 809 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 810 /*FALLTHROUGH*/ 811 812 case TIOCMBIS: 813 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 814 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 815 break; 816 817 case TIOCMBIC: 818 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 819 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 820 break; 821 822 case TIOCMGET: { 823 u_char m; 824 int bits = 0; 825 826 m = sc->sc_mcr; 827 if (ISSET(m, MCR_DTR)) 828 SET(bits, TIOCM_DTR); 829 if (ISSET(m, MCR_RTS)) 830 SET(bits, TIOCM_RTS); 831 m = sc->sc_msr; 832 if (ISSET(m, MSR_DCD)) 833 SET(bits, TIOCM_CD); 834 if (ISSET(m, MSR_CTS)) 835 SET(bits, TIOCM_CTS); 836 if (ISSET(m, MSR_DSR)) 837 SET(bits, TIOCM_DSR); 838 if (ISSET(m, MSR_RI | MSR_TERI)) 839 SET(bits, TIOCM_RI); 840 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 841 SET(bits, TIOCM_LE); 842 *(int *)data = bits; 843 break; 844 } 845 default: 846 return (ENOTTY); 847 } 848 849 #ifdef COM_DEBUG 850 if (com_debug) 851 comstatus(sc, "comioctl "); 852 #endif 853 854 return (0); 855 } 856 857 integrate void 858 com_schedrx(sc) 859 struct com_softc *sc; 860 { 861 862 sc->sc_rx_ready = 1; 863 864 /* Wake up the poller. */ 865 #ifdef __GENERIC_SOFT_INTERRUPTS 866 softintr_schedule(sc->sc_si); 867 #else 868 #ifndef alpha 869 setsoftserial(); 870 #else 871 if (!com_softintr_scheduled) { 872 com_softintr_scheduled = 1; 873 timeout(comsoft, NULL, 1); 874 } 875 #endif 876 #endif 877 } 878 879 void 880 com_break(sc, onoff) 881 struct com_softc *sc; 882 int onoff; 883 { 884 int s; 885 886 s = splserial(); 887 if (onoff) 888 SET(sc->sc_lcr, LCR_SBREAK); 889 else 890 CLR(sc->sc_lcr, LCR_SBREAK); 891 892 if (!sc->sc_heldchange) { 893 if (sc->sc_tx_busy) { 894 sc->sc_heldtbc = sc->sc_tbc; 895 sc->sc_tbc = 0; 896 sc->sc_heldchange = 1; 897 } else 898 com_loadchannelregs(sc); 899 } 900 splx(s); 901 } 902 903 void 904 com_modem(sc, onoff) 905 struct com_softc *sc; 906 int onoff; 907 { 908 int s; 909 910 s = splserial(); 911 if (onoff) 912 SET(sc->sc_mcr, sc->sc_mcr_dtr); 913 else 914 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 915 916 if (!sc->sc_heldchange) { 917 if (sc->sc_tx_busy) { 918 sc->sc_heldtbc = sc->sc_tbc; 919 sc->sc_tbc = 0; 920 sc->sc_heldchange = 1; 921 } else 922 com_loadchannelregs(sc); 923 } 924 splx(s); 925 } 926 927 static u_char 928 cflag2lcr(cflag) 929 tcflag_t cflag; 930 { 931 u_char lcr = 0; 932 933 switch (ISSET(cflag, CSIZE)) { 934 case CS5: 935 SET(lcr, LCR_5BITS); 936 break; 937 case CS6: 938 SET(lcr, LCR_6BITS); 939 break; 940 case CS7: 941 SET(lcr, LCR_7BITS); 942 break; 943 case CS8: 944 SET(lcr, LCR_8BITS); 945 break; 946 } 947 if (ISSET(cflag, PARENB)) { 948 SET(lcr, LCR_PENAB); 949 if (!ISSET(cflag, PARODD)) 950 SET(lcr, LCR_PEVEN); 951 } 952 if (ISSET(cflag, CSTOPB)) 953 SET(lcr, LCR_STOPB); 954 955 return (lcr); 956 } 957 958 int 959 comparam(tp, t) 960 struct tty *tp; 961 struct termios *t; 962 { 963 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 964 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 965 u_char lcr; 966 int s; 967 968 /* check requested parameters */ 969 if (ospeed < 0) 970 return (EINVAL); 971 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 972 return (EINVAL); 973 974 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 975 976 s = splserial(); 977 978 sc->sc_lcr = lcr; 979 980 /* 981 * For the console, always force CLOCAL and !HUPCL, so that the port 982 * is always active. 983 */ 984 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 985 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 986 SET(t->c_cflag, CLOCAL); 987 CLR(t->c_cflag, HUPCL); 988 } 989 990 /* 991 * If we're not in a mode that assumes a connection is present, then 992 * ignore carrier changes. 993 */ 994 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 995 sc->sc_msr_dcd = 0; 996 else 997 sc->sc_msr_dcd = MSR_DCD; 998 /* 999 * Set the flow control pins depending on the current flow control 1000 * mode. 1001 */ 1002 if (ISSET(t->c_cflag, CRTSCTS)) { 1003 sc->sc_mcr_dtr = MCR_DTR; 1004 sc->sc_mcr_rts = MCR_RTS; 1005 sc->sc_msr_cts = MSR_CTS; 1006 sc->sc_r_hiwat = RXHIWAT; 1007 sc->sc_r_lowat = RXLOWAT; 1008 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1009 } else if (ISSET(t->c_cflag, MDMBUF)) { 1010 /* 1011 * For DTR/DCD flow control, make sure we don't toggle DTR for 1012 * carrier detection. 1013 */ 1014 sc->sc_mcr_dtr = 0; 1015 sc->sc_mcr_rts = MCR_DTR; 1016 sc->sc_msr_cts = MSR_DCD; 1017 sc->sc_r_hiwat = RXHIWAT; 1018 sc->sc_r_lowat = RXLOWAT; 1019 sc->sc_efr = 0; 1020 } else { 1021 /* 1022 * If no flow control, then always set RTS. This will make 1023 * the other side happy if it mistakenly thinks we're doing 1024 * RTS/CTS flow control. 1025 */ 1026 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1027 sc->sc_mcr_rts = 0; 1028 sc->sc_msr_cts = 0; 1029 sc->sc_r_hiwat = 0; 1030 sc->sc_r_lowat = 0; 1031 sc->sc_efr = 0; 1032 if (ISSET(sc->sc_mcr, MCR_DTR)) 1033 SET(sc->sc_mcr, MCR_RTS); 1034 else 1035 CLR(sc->sc_mcr, MCR_RTS); 1036 } 1037 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1038 1039 #if 0 1040 if (ospeed == 0) 1041 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1042 else 1043 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1044 #endif 1045 1046 sc->sc_dlbl = ospeed; 1047 sc->sc_dlbh = ospeed >> 8; 1048 1049 /* 1050 * Set the FIFO threshold based on the receive speed. 1051 * 1052 * * If it's a low speed, it's probably a mouse or some other 1053 * interactive device, so set the threshold low. 1054 * * If it's a high speed, trim the trigger level down to prevent 1055 * overflows. 1056 * * Otherwise set it a bit higher. 1057 */ 1058 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1059 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1060 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1061 sc->sc_fifo = FIFO_ENABLE | 1062 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1063 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1064 else 1065 sc->sc_fifo = 0; 1066 1067 /* and copy to tty */ 1068 tp->t_ispeed = 0; 1069 tp->t_ospeed = t->c_ospeed; 1070 tp->t_cflag = t->c_cflag; 1071 1072 if (!sc->sc_heldchange) { 1073 if (sc->sc_tx_busy) { 1074 sc->sc_heldtbc = sc->sc_tbc; 1075 sc->sc_tbc = 0; 1076 sc->sc_heldchange = 1; 1077 } else 1078 com_loadchannelregs(sc); 1079 } 1080 1081 splx(s); 1082 1083 /* 1084 * Update the tty layer's idea of the carrier bit, in case we changed 1085 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1086 * lose carrier while carrier detection is on. 1087 */ 1088 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1089 1090 #ifdef COM_DEBUG 1091 if (com_debug) 1092 comstatus(sc, "comparam "); 1093 #endif 1094 1095 /* Block or unblock as needed. */ 1096 if (!ISSET(t->c_cflag, CHWFLOW)) { 1097 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1098 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1099 com_schedrx(sc); 1100 } 1101 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1102 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1103 com_hwiflow(sc); 1104 } 1105 if (sc->sc_tx_stopped) { 1106 sc->sc_tx_stopped = 0; 1107 comstart(tp); 1108 } 1109 } else { 1110 /* XXXXX FIX ME */ 1111 #if 0 1112 commsrint(sc, tp); 1113 #endif 1114 } 1115 1116 return (0); 1117 } 1118 1119 void 1120 com_iflush(sc) 1121 struct com_softc *sc; 1122 { 1123 bus_space_tag_t iot = sc->sc_iot; 1124 bus_space_handle_t ioh = sc->sc_ioh; 1125 1126 /* flush any pending I/O */ 1127 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1128 (void) bus_space_read_1(iot, ioh, com_data); 1129 } 1130 1131 void 1132 com_loadchannelregs(sc) 1133 struct com_softc *sc; 1134 { 1135 bus_space_tag_t iot = sc->sc_iot; 1136 bus_space_handle_t ioh = sc->sc_ioh; 1137 1138 /* XXXXX necessary? */ 1139 com_iflush(sc); 1140 1141 bus_space_write_1(iot, ioh, com_ier, 0); 1142 1143 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1144 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1145 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1146 } 1147 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1148 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1149 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1150 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1151 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1152 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1153 1154 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1155 } 1156 1157 int 1158 comhwiflow(tp, block) 1159 struct tty *tp; 1160 int block; 1161 { 1162 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1163 int s; 1164 1165 if (sc->sc_mcr_rts == 0) 1166 return (0); 1167 1168 s = splserial(); 1169 if (block) { 1170 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1171 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1172 com_hwiflow(sc); 1173 } 1174 } else { 1175 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1176 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1177 com_schedrx(sc); 1178 } 1179 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1180 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1181 com_hwiflow(sc); 1182 } 1183 } 1184 splx(s); 1185 return (1); 1186 } 1187 1188 /* 1189 * (un)block input via hw flowcontrol 1190 */ 1191 void 1192 com_hwiflow(sc) 1193 struct com_softc *sc; 1194 { 1195 bus_space_tag_t iot = sc->sc_iot; 1196 bus_space_handle_t ioh = sc->sc_ioh; 1197 1198 if (sc->sc_mcr_rts == 0) 1199 return; 1200 1201 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1202 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1203 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1204 } else { 1205 SET(sc->sc_mcr, sc->sc_mcr_rts); 1206 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1207 } 1208 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1209 } 1210 1211 1212 void 1213 comstart(tp) 1214 struct tty *tp; 1215 { 1216 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1217 bus_space_tag_t iot = sc->sc_iot; 1218 bus_space_handle_t ioh = sc->sc_ioh; 1219 int s; 1220 1221 s = spltty(); 1222 if (ISSET(tp->t_state, TS_BUSY)) 1223 goto out; 1224 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1225 goto stopped; 1226 1227 if (sc->sc_tx_stopped) 1228 goto stopped; 1229 1230 if (tp->t_outq.c_cc <= tp->t_lowat) { 1231 if (ISSET(tp->t_state, TS_ASLEEP)) { 1232 CLR(tp->t_state, TS_ASLEEP); 1233 wakeup(&tp->t_outq); 1234 } 1235 selwakeup(&tp->t_wsel); 1236 if (tp->t_outq.c_cc == 0) 1237 goto stopped; 1238 } 1239 1240 /* Grab the first contiguous region of buffer space. */ 1241 { 1242 u_char *tba; 1243 int tbc; 1244 1245 tba = tp->t_outq.c_cf; 1246 tbc = ndqb(&tp->t_outq, 0); 1247 1248 (void)splserial(); 1249 1250 sc->sc_tba = tba; 1251 sc->sc_tbc = tbc; 1252 } 1253 1254 SET(tp->t_state, TS_BUSY); 1255 sc->sc_tx_busy = 1; 1256 1257 /* Enable transmit completion interrupts if necessary. */ 1258 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1259 SET(sc->sc_ier, IER_ETXRDY); 1260 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1261 } 1262 1263 /* Output the first chunk of the contiguous buffer. */ 1264 { 1265 int n; 1266 1267 n = sc->sc_fifolen; 1268 if (n > sc->sc_tbc) 1269 n = sc->sc_tbc; 1270 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1271 sc->sc_tbc -= n; 1272 sc->sc_tba += n; 1273 } 1274 splx(s); 1275 return; 1276 1277 stopped: 1278 /* Disable transmit completion interrupts if necessary. */ 1279 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1280 CLR(sc->sc_ier, IER_ETXRDY); 1281 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1282 } 1283 out: 1284 splx(s); 1285 return; 1286 } 1287 1288 /* 1289 * Stop output on a line. 1290 */ 1291 void 1292 comstop(tp, flag) 1293 struct tty *tp; 1294 int flag; 1295 { 1296 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1297 int s; 1298 1299 s = splserial(); 1300 if (ISSET(tp->t_state, TS_BUSY)) { 1301 /* Stop transmitting at the next chunk. */ 1302 sc->sc_tbc = 0; 1303 sc->sc_heldtbc = 0; 1304 if (!ISSET(tp->t_state, TS_TTSTOP)) 1305 SET(tp->t_state, TS_FLUSH); 1306 } 1307 splx(s); 1308 } 1309 1310 void 1311 comdiag(arg) 1312 void *arg; 1313 { 1314 struct com_softc *sc = arg; 1315 int overflows, floods; 1316 int s; 1317 1318 s = splserial(); 1319 overflows = sc->sc_overflows; 1320 sc->sc_overflows = 0; 1321 floods = sc->sc_floods; 1322 sc->sc_floods = 0; 1323 sc->sc_errors = 0; 1324 splx(s); 1325 1326 log(LOG_WARNING, 1327 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1328 sc->sc_dev.dv_xname, 1329 overflows, overflows == 1 ? "" : "s", 1330 floods, floods == 1 ? "" : "s"); 1331 } 1332 1333 integrate void 1334 comrxint(sc, tp) 1335 struct com_softc *sc; 1336 struct tty *tp; 1337 { 1338 u_int get, cc, scc; 1339 int code; 1340 u_char lsr; 1341 int s; 1342 static int lsrmap[8] = { 1343 0, TTY_PE, 1344 TTY_FE, TTY_PE|TTY_FE, 1345 TTY_FE, TTY_PE|TTY_FE, 1346 TTY_FE, TTY_PE|TTY_FE 1347 }; 1348 1349 get = sc->sc_rbget; 1350 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1351 1352 if (cc == RXBUFSIZE) { 1353 sc->sc_floods++; 1354 if (sc->sc_errors++ == 0) 1355 timeout(comdiag, sc, 60 * hz); 1356 } 1357 1358 while (cc) { 1359 lsr = sc->sc_lbuf[get]; 1360 if (ISSET(lsr, LSR_OE)) { 1361 sc->sc_overflows++; 1362 if (sc->sc_errors++ == 0) 1363 timeout(comdiag, sc, 60 * hz); 1364 } 1365 code = sc->sc_rbuf[get] | 1366 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1367 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1368 /* 1369 * The line discipline's buffer is out of space. 1370 */ 1371 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1372 /* 1373 * We're either not using flow control, or the 1374 * line discipline didn't tell us to block for 1375 * some reason. Either way, we have no way to 1376 * know when there's more space available, so 1377 * just drop the rest of the data. 1378 */ 1379 get = (get + cc) & RXBUFMASK; 1380 cc = 0; 1381 } else { 1382 /* 1383 * Don't schedule any more receive processing 1384 * until the line discipline tells us there's 1385 * space available (through comhwiflow()). 1386 * Leave the rest of the data in the input 1387 * buffer. 1388 */ 1389 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1390 } 1391 break; 1392 } 1393 get = (get + 1) & RXBUFMASK; 1394 cc--; 1395 } 1396 1397 if (cc != scc) { 1398 sc->sc_rbget = get; 1399 s = splserial(); 1400 cc = sc->sc_rbavail += scc - cc; 1401 /* Buffers should be ok again, release possible block. */ 1402 if (cc >= sc->sc_r_lowat) { 1403 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1404 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1405 SET(sc->sc_ier, IER_ERXRDY); 1406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1407 } 1408 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1409 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1410 com_hwiflow(sc); 1411 } 1412 } 1413 splx(s); 1414 } 1415 } 1416 1417 integrate void 1418 comtxint(sc, tp) 1419 struct com_softc *sc; 1420 struct tty *tp; 1421 { 1422 1423 CLR(tp->t_state, TS_BUSY); 1424 if (ISSET(tp->t_state, TS_FLUSH)) 1425 CLR(tp->t_state, TS_FLUSH); 1426 else 1427 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1428 (*linesw[tp->t_line].l_start)(tp); 1429 } 1430 1431 integrate void 1432 commsrint(sc, tp) 1433 struct com_softc *sc; 1434 struct tty *tp; 1435 { 1436 u_char msr, delta; 1437 int s; 1438 1439 s = splserial(); 1440 msr = sc->sc_msr; 1441 delta = sc->sc_msr_delta; 1442 sc->sc_msr_delta = 0; 1443 splx(s); 1444 1445 if (ISSET(delta, sc->sc_msr_dcd)) { 1446 /* 1447 * Inform the tty layer that carrier detect changed. 1448 */ 1449 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1450 } 1451 1452 if (ISSET(delta, sc->sc_msr_cts)) { 1453 /* Block or unblock output according to flow control. */ 1454 if (ISSET(msr, sc->sc_msr_cts)) { 1455 sc->sc_tx_stopped = 0; 1456 (*linesw[tp->t_line].l_start)(tp); 1457 } else { 1458 sc->sc_tx_stopped = 1; 1459 } 1460 } 1461 1462 #ifdef COM_DEBUG 1463 if (com_debug) 1464 comstatus(sc, "commsrint"); 1465 #endif 1466 } 1467 1468 #ifdef __GENERIC_SOFT_INTERRUPTS 1469 void 1470 comsoft(arg) 1471 void *arg; 1472 { 1473 struct com_softc *sc = arg; 1474 struct tty *tp; 1475 1476 { 1477 #else 1478 void 1479 #ifndef alpha 1480 comsoft() 1481 #else 1482 comsoft(arg) 1483 void *arg; 1484 #endif 1485 { 1486 struct com_softc *sc; 1487 struct tty *tp; 1488 int unit; 1489 #ifdef alpha 1490 int s; 1491 1492 s = splsoftserial(); 1493 com_softintr_scheduled = 0; 1494 #endif 1495 1496 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1497 sc = com_cd.cd_devs[unit]; 1498 if (sc == NULL) 1499 continue; 1500 1501 tp = sc->sc_tty; 1502 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1503 continue; 1504 #endif 1505 tp = sc->sc_tty; 1506 1507 if (sc->sc_rx_ready) { 1508 sc->sc_rx_ready = 0; 1509 comrxint(sc, tp); 1510 } 1511 1512 if (sc->sc_st_check) { 1513 sc->sc_st_check = 0; 1514 commsrint(sc, tp); 1515 } 1516 1517 if (sc->sc_tx_done) { 1518 sc->sc_tx_done = 0; 1519 comtxint(sc, tp); 1520 } 1521 } 1522 1523 #ifndef __GENERIC_SOFT_INTERRUPTS 1524 #ifdef alpha 1525 splx(s); 1526 #endif 1527 #endif 1528 } 1529 1530 int 1531 comintr(arg) 1532 void *arg; 1533 { 1534 struct com_softc *sc = arg; 1535 bus_space_tag_t iot = sc->sc_iot; 1536 bus_space_handle_t ioh = sc->sc_ioh; 1537 u_char lsr, iir; 1538 u_int put, cc; 1539 1540 iir = bus_space_read_1(iot, ioh, com_iir); 1541 if (ISSET(iir, IIR_NOPEND)) 1542 return (0); 1543 1544 put = sc->sc_rbput; 1545 cc = sc->sc_rbavail; 1546 1547 do { 1548 u_char msr, delta; 1549 1550 lsr = bus_space_read_1(iot, ioh, com_lsr); 1551 #if defined(DDB) || defined(KGDB) 1552 if (ISSET(lsr, LSR_BI)) { 1553 #ifdef DDB 1554 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1555 Debugger(); 1556 continue; 1557 } 1558 #endif 1559 #ifdef KGDB 1560 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1561 kgdb_connect(1); 1562 continue; 1563 } 1564 #endif 1565 } 1566 #endif /* DDB || KGDB */ 1567 1568 if (ISSET(lsr, LSR_RCV_MASK) && 1569 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1570 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1571 sc->sc_rbuf[put] = 1572 bus_space_read_1(iot, ioh, com_data); 1573 sc->sc_lbuf[put] = lsr; 1574 put = (put + 1) & RXBUFMASK; 1575 lsr = bus_space_read_1(iot, ioh, com_lsr); 1576 } 1577 /* 1578 * Current string of incoming characters ended because 1579 * no more data was available. Schedule a receive event 1580 * if any data was received. Drop any characters that 1581 * we couldn't handle. 1582 */ 1583 sc->sc_rbput = put; 1584 sc->sc_rbavail = cc; 1585 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1586 sc->sc_rx_ready = 1; 1587 /* 1588 * See if we are in danger of overflowing a buffer. If 1589 * so, use hardware flow control to ease the pressure. 1590 */ 1591 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1592 cc < sc->sc_r_hiwat) { 1593 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1594 com_hwiflow(sc); 1595 } 1596 /* 1597 * If we're out of space, disable receive interrupts 1598 * until the queue has drained a bit. 1599 */ 1600 if (!cc) { 1601 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1602 CLR(sc->sc_ier, IER_ERXRDY); 1603 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1604 } 1605 } else { 1606 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1607 bus_space_write_1(iot, ioh, com_ier, 0); 1608 delay(10); 1609 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1610 iir = IIR_NOPEND; 1611 continue; 1612 } 1613 } 1614 1615 msr = bus_space_read_1(iot, ioh, com_msr); 1616 delta = msr ^ sc->sc_msr; 1617 sc->sc_msr = msr; 1618 if (ISSET(delta, sc->sc_msr_mask)) { 1619 sc->sc_msr_delta |= delta; 1620 1621 /* 1622 * Stop output immediately if we lose the output 1623 * flow control signal or carrier detect. 1624 */ 1625 if (ISSET(~msr, sc->sc_msr_mask)) { 1626 sc->sc_tbc = 0; 1627 sc->sc_heldtbc = 0; 1628 #ifdef COM_DEBUG 1629 if (com_debug) 1630 comstatus(sc, "comintr "); 1631 #endif 1632 } 1633 1634 sc->sc_st_check = 1; 1635 } 1636 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1637 1638 /* 1639 * Done handling any receive interrupts. See if data can be 1640 * transmitted as well. Schedule tx done event if no data left 1641 * and tty was marked busy. 1642 */ 1643 if (ISSET(lsr, LSR_TXRDY)) { 1644 /* 1645 * If we've delayed a parameter change, do it now, and restart 1646 * output. 1647 */ 1648 if (sc->sc_heldchange) { 1649 com_loadchannelregs(sc); 1650 sc->sc_heldchange = 0; 1651 sc->sc_tbc = sc->sc_heldtbc; 1652 sc->sc_heldtbc = 0; 1653 } 1654 /* Output the next chunk of the contiguous buffer, if any. */ 1655 if (sc->sc_tbc > 0) { 1656 int n; 1657 1658 n = sc->sc_fifolen; 1659 if (n > sc->sc_tbc) 1660 n = sc->sc_tbc; 1661 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1662 sc->sc_tbc -= n; 1663 sc->sc_tba += n; 1664 } else if (sc->sc_tx_busy) { 1665 sc->sc_tx_busy = 0; 1666 sc->sc_tx_done = 1; 1667 } 1668 } 1669 1670 /* Wake up the poller. */ 1671 #ifdef __GENERIC_SOFT_INTERRUPTS 1672 softintr_schedule(sc->sc_si); 1673 #else 1674 #ifndef alpha 1675 setsoftserial(); 1676 #else 1677 if (!com_softintr_scheduled) { 1678 com_softintr_scheduled = 1; 1679 timeout(comsoft, NULL, 1); 1680 } 1681 #endif 1682 #endif 1683 1684 #if NRND > 0 && defined(RND_COM) 1685 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1686 #endif 1687 1688 return (1); 1689 } 1690 1691 /* 1692 * The following functions are polled getc and putc routines, shared 1693 * by the console and kgdb glue. 1694 */ 1695 1696 int 1697 com_common_getc(iot, ioh) 1698 bus_space_tag_t iot; 1699 bus_space_handle_t ioh; 1700 { 1701 int s = splserial(); 1702 u_char stat, c; 1703 1704 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1705 ; 1706 c = bus_space_read_1(iot, ioh, com_data); 1707 stat = bus_space_read_1(iot, ioh, com_iir); 1708 splx(s); 1709 return (c); 1710 } 1711 1712 void 1713 com_common_putc(iot, ioh, c) 1714 bus_space_tag_t iot; 1715 bus_space_handle_t ioh; 1716 int c; 1717 { 1718 int s = splserial(); 1719 u_char stat; 1720 register int timo; 1721 1722 /* wait for any pending transmission to finish */ 1723 timo = 50000; 1724 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1725 && --timo) 1726 ; 1727 bus_space_write_1(iot, ioh, com_data, c); 1728 /* wait for this transmission to complete */ 1729 timo = 1500000; 1730 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1731 && --timo) 1732 ; 1733 /* clear any interrupts generated by this transmission */ 1734 stat = bus_space_read_1(iot, ioh, com_iir); 1735 splx(s); 1736 } 1737 1738 /* 1739 * Initialize UART to known state. 1740 */ 1741 int 1742 cominit(iot, iobase, rate, frequency, cflag, iohp) 1743 bus_space_tag_t iot; 1744 int iobase; 1745 int rate, frequency; 1746 tcflag_t cflag; 1747 bus_space_handle_t *iohp; 1748 { 1749 bus_space_handle_t ioh; 1750 1751 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1752 return (ENOMEM); /* ??? */ 1753 1754 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1755 bus_space_write_1(iot, ioh, com_efr, 0); 1756 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1757 rate = comspeed(rate, frequency); 1758 bus_space_write_1(iot, ioh, com_dlbl, rate); 1759 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1760 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1761 bus_space_write_1(iot, ioh, com_mcr, 0); 1762 bus_space_write_1(iot, ioh, com_fifo, 1763 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1764 bus_space_write_1(iot, ioh, com_ier, 0); 1765 1766 *iohp = ioh; 1767 return (0); 1768 } 1769 1770 /* 1771 * Following are all routines needed for COM to act as console 1772 */ 1773 1774 int 1775 comcnattach(iot, iobase, rate, frequency, cflag) 1776 bus_space_tag_t iot; 1777 int iobase; 1778 int rate, frequency; 1779 tcflag_t cflag; 1780 { 1781 int res; 1782 static struct consdev comcons = { 1783 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 1784 }; 1785 1786 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1787 if (res) 1788 return (res); 1789 1790 cn_tab = &comcons; 1791 1792 comconstag = iot; 1793 comconsaddr = iobase; 1794 comconsrate = rate; 1795 comconscflag = cflag; 1796 1797 return (0); 1798 } 1799 1800 int 1801 comcngetc(dev) 1802 dev_t dev; 1803 { 1804 1805 return (com_common_getc(comconstag, comconsioh)); 1806 } 1807 1808 /* 1809 * Console kernel output character routine. 1810 */ 1811 void 1812 comcnputc(dev, c) 1813 dev_t dev; 1814 int c; 1815 { 1816 1817 com_common_putc(comconstag, comconsioh, c); 1818 } 1819 1820 void 1821 comcnpollc(dev, on) 1822 dev_t dev; 1823 int on; 1824 { 1825 1826 } 1827 1828 #ifdef KGDB 1829 int 1830 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1831 bus_space_tag_t iot; 1832 int iobase; 1833 int rate, frequency; 1834 tcflag_t cflag; 1835 { 1836 int res; 1837 1838 if (iot == comconstag && iobase == comconsaddr) 1839 return (EBUSY); /* cannot share with console */ 1840 1841 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1842 if (res) 1843 return (res); 1844 1845 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1846 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1847 1848 com_kgdb_iot = iot; 1849 com_kgdb_addr = iobase; 1850 1851 return (0); 1852 } 1853 1854 /* ARGSUSED */ 1855 int 1856 com_kgdb_getc(arg) 1857 void *arg; 1858 { 1859 1860 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1861 } 1862 1863 /* ARGSUSED */ 1864 void 1865 com_kgdb_putc(arg, c) 1866 void *arg; 1867 int c; 1868 { 1869 1870 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1871 } 1872 #endif /* KGDB */ 1873 1874 /* helper function to identify the com ports used by 1875 console or KGDB (and not yet autoconf attached) */ 1876 int 1877 com_is_console(iot, iobase, ioh) 1878 bus_space_tag_t iot; 1879 int iobase; 1880 bus_space_handle_t *ioh; 1881 { 1882 bus_space_handle_t help; 1883 1884 if (!comconsattached && 1885 iot == comconstag && iobase == comconsaddr) 1886 help = comconsioh; 1887 #ifdef KGDB 1888 else if (!com_kgdb_attached && 1889 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1890 help = com_kgdb_ioh; 1891 #endif 1892 else 1893 return (0); 1894 1895 if (ioh) 1896 *ioh = help; 1897 return (1); 1898 } 1899
Indexes created Sun Sep 28 16:09:52 GMT 2025