com.c revision 1.123
1 /* $NetBSD: com.c,v 1.123 1997/11/02 08:55:52 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 #ifdef COM16650 354 u_int8_t lcr; 355 #endif 356 #ifdef COM_HAYESP 357 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 358 int *hayespp; 359 #endif 360 361 /* Disable interrupts before configuring the device. */ 362 sc->sc_ier = 0; 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 364 365 if (iot == comconstag && iobase == comconsaddr) { 366 comconsattached = 1; 367 368 /* Make sure the console is always "hardwired". */ 369 delay(1000); /* wait for output to finish */ 370 SET(sc->sc_hwflags, COM_HW_CONSOLE); 371 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 372 } 373 374 #ifdef COM_HAYESP 375 /* Look for a Hayes ESP board. */ 376 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 377 bus_space_handle_t hayespioh; 378 379 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 380 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 381 continue; 382 if (comprobeHAYESP(hayespioh, sc)) { 383 sc->sc_hayespioh = hayespioh; 384 sc->sc_fifolen = 1024; 385 386 /* Set 16550 compatibility mode */ 387 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 388 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 389 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 390 HAYESP_MODE_SCALE); 391 392 /* Set RTS/CTS flow control */ 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 394 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 396 397 /* Set flow control levels */ 398 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 404 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 405 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 406 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 407 408 break; 409 } 410 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 411 } 412 /* No ESP; look for other things. */ 413 if (*hayespp == 0) { 414 #endif 415 sc->sc_fifolen = 1; 416 /* look for a NS 16550AF UART with FIFOs */ 417 bus_space_write_1(iot, ioh, com_fifo, 418 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 419 delay(100); 420 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 421 == IIR_FIFO_MASK) 422 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 423 == FIFO_TRIGGER_14) { 424 SET(sc->sc_hwflags, COM_HW_FIFO); 425 426 #ifdef COM16650 427 /* 428 * IIR changes into the EFR if LCR is set to LCR_EERS 429 * on 16650s. We also know IIR != 0 at this point. 430 * Write 0 into the EFR, and read it. If the result 431 * is 0, we have a 16650. 432 * 433 * Older 16650s were broken; the test to detect them 434 * is taken from the Linux driver. Apparently 435 * setting DLAB enable gives access to the EFR on 436 * these chips. 437 */ 438 lcr = bus_space_read_1(iot, ioh, com_lcr); 439 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 440 bus_space_write_1(iot, ioh, com_efr, 0); 441 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 442 bus_space_write_1(iot, ioh, com_lcr, 443 lcr | LCR_DLAB); 444 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 445 CLR(sc->sc_hwflags, COM_HW_FIFO); 446 sc->sc_fifolen = 0; 447 } else { 448 SET(sc->sc_hwflags, COM_HW_FLOW); 449 sc->sc_fifolen = 32; 450 } 451 } else 452 #endif 453 sc->sc_fifolen = 16; 454 455 #ifdef COM16650 456 bus_space_write_1(iot, ioh, com_lcr, lcr); 457 if (sc->sc_fifolen == 0) 458 printf(": st16650, broken fifo\n"); 459 else if (sc->sc_fifolen == 32) 460 printf(": st16650a, working fifo\n"); 461 else 462 #endif 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 474 SET(sc->sc_mcr, MCR_IENABLE); 475 476 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 477 int maj; 478 479 /* locate the major number */ 480 for (maj = 0; maj < nchrdev; maj++) 481 if (cdevsw[maj].d_open == comopen) 482 break; 483 484 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 485 #ifdef DDB 486 com_enable_debugport(sc); 487 #endif 488 printf("%s: console\n", sc->sc_dev.dv_xname); 489 } 490 491 #ifdef KGDB 492 /* 493 * Allow kgdb to "take over" this port. If this is 494 * the kgdb device, it has exclusive use. 495 */ 496 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 497 com_kgdb_attached = 1; 498 499 SET(sc->sc_hwflags, COM_HW_KGDB); 500 com_enable_debugport(sc); 501 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 502 } 503 #endif 504 505 #ifdef __GENERIC_SOFT_INTERRUPTS 506 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 507 #endif 508 509 #if NRND > 0 && defined(RND_COM) 510 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 511 RND_TYPE_TTY); 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 struct tty *tp; 524 int s, s2; 525 int error = 0; 526 527 if (unit >= com_cd.cd_ndevs) 528 return (ENXIO); 529 sc = com_cd.cd_devs[unit]; 530 if (!sc) 531 return (ENXIO); 532 533 #ifdef KGDB 534 /* 535 * If this is the kgdb port, no other use is permitted. 536 */ 537 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 538 return (EBUSY); 539 #endif 540 541 tp = sc->sc_tty; 542 if (tp == 0) { 543 sc->sc_tty = tp = ttymalloc(); 544 tp->t_dev = dev; 545 tp->t_oproc = comstart; 546 tp->t_param = comparam; 547 tp->t_hwiflow = comhwiflow; 548 tty_attach(tp); 549 } 550 551 if (ISSET(tp->t_state, TS_ISOPEN) && 552 ISSET(tp->t_state, TS_XCLUDE) && 553 p->p_ucred->cr_uid != 0) 554 return (EBUSY); 555 556 s = spltty(); 557 558 /* We need to set this early for the benefit of comsoft(). */ 559 SET(tp->t_state, TS_WOPEN); 560 561 /* 562 * Do the following iff this is a first open. 563 */ 564 if (!ISSET(tp->t_state, TS_ISOPEN)) { 565 struct termios t; 566 567 s2 = splserial(); 568 569 /* Turn on interrupts. */ 570 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 571 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 572 573 /* Fetch the current modem control status, needed later. */ 574 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 575 576 splx(s2); 577 578 /* 579 * Initialize the termios status to the defaults. Add in the 580 * sticky bits from TIOCSFLAGS. 581 */ 582 t.c_ispeed = 0; 583 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 584 t.c_ospeed = comconsrate; 585 t.c_cflag = comconscflag; 586 } else { 587 t.c_ospeed = TTYDEF_SPEED; 588 t.c_cflag = TTYDEF_CFLAG; 589 } 590 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 591 SET(t.c_cflag, CLOCAL); 592 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 593 SET(t.c_cflag, CRTSCTS); 594 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 595 SET(t.c_cflag, MDMBUF); 596 (void) comparam(tp, &t); 597 tp->t_iflag = TTYDEF_IFLAG; 598 tp->t_oflag = TTYDEF_OFLAG; 599 tp->t_lflag = TTYDEF_LFLAG; 600 ttychars(tp); 601 ttsetwater(tp); 602 603 /* 604 * Turn on DTR. We must always do this, even if carrier is not 605 * present, because otherwise we'd have to use TIOCSDTR 606 * immediately after setting CLOCAL, which applications do not 607 * expect. We always assert DTR while the device is open 608 * unless explicitly requested to deassert it. 609 */ 610 com_modem(sc, 1); 611 612 s2 = splserial(); 613 614 /* Clear the input ring, and unblock. */ 615 sc->sc_rbput = sc->sc_rbget = 0; 616 sc->sc_rbavail = RXBUFSIZE; 617 com_iflush(sc); 618 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 619 com_hwiflow(sc); 620 621 #ifdef COM_DEBUG 622 if (com_debug) 623 comstatus(sc, "comopen "); 624 #endif 625 626 splx(s2); 627 } 628 error = 0; 629 630 /* If we're doing a blocking open... */ 631 if (!ISSET(flag, O_NONBLOCK)) 632 /* ...then wait for carrier. */ 633 while (!ISSET(tp->t_state, TS_CARR_ON) && 634 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 635 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 636 ttopen, 0); 637 if (error) { 638 /* 639 * If the open was interrupted and nobody 640 * else has the device open, then hang up. 641 */ 642 if (!ISSET(tp->t_state, TS_ISOPEN)) { 643 com_modem(sc, 0); 644 CLR(tp->t_state, TS_WOPEN); 645 ttwakeup(tp); 646 } 647 break; 648 } 649 SET(tp->t_state, TS_WOPEN); 650 } 651 652 splx(s); 653 if (error == 0) 654 error = (*linesw[tp->t_line].l_open)(dev, tp); 655 return (error); 656 } 657 658 int 659 comclose(dev, flag, mode, p) 660 dev_t dev; 661 int flag, mode; 662 struct proc *p; 663 { 664 int unit = COMUNIT(dev); 665 struct com_softc *sc = com_cd.cd_devs[unit]; 666 struct tty *tp = sc->sc_tty; 667 int s; 668 669 /* XXX This is for cons.c. */ 670 if (!ISSET(tp->t_state, TS_ISOPEN)) 671 return (0); 672 673 (*linesw[tp->t_line].l_close)(tp, flag); 674 ttyclose(tp); 675 676 s = splserial(); 677 678 /* If we were asserting flow control, then deassert it. */ 679 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 680 com_hwiflow(sc); 681 682 splx(s); 683 684 /* Clear any break condition set with TIOCSBRK. */ 685 com_break(sc, 0); 686 687 /* 688 * Hang up if necessary. Wait a bit, so the other side has time to 689 * notice even if we immediately open the port again. 690 */ 691 if (ISSET(tp->t_cflag, HUPCL)) { 692 com_modem(sc, 0); 693 (void) tsleep(sc, TTIPRI, ttclos, hz); 694 } 695 696 s = splserial(); 697 698 /* Turn off interrupts. */ 699 #ifdef DDB 700 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 701 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 702 else 703 #else 704 sc->sc_ier = 0; 705 #endif 706 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 707 708 splx(s); 709 710 return (0); 711 } 712 713 int 714 comread(dev, uio, flag) 715 dev_t dev; 716 struct uio *uio; 717 int flag; 718 { 719 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 720 struct tty *tp = sc->sc_tty; 721 722 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 723 } 724 725 int 726 comwrite(dev, uio, flag) 727 dev_t dev; 728 struct uio *uio; 729 int flag; 730 { 731 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 732 struct tty *tp = sc->sc_tty; 733 734 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 735 } 736 737 struct tty * 738 comtty(dev) 739 dev_t dev; 740 { 741 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 742 struct tty *tp = sc->sc_tty; 743 744 return (tp); 745 } 746 747 static u_char 748 tiocm_xxx2mcr(data) 749 int data; 750 { 751 u_char m = 0; 752 753 if (ISSET(data, TIOCM_DTR)) 754 SET(m, MCR_DTR); 755 if (ISSET(data, TIOCM_RTS)) 756 SET(m, MCR_RTS); 757 return m; 758 } 759 760 int 761 comioctl(dev, cmd, data, flag, p) 762 dev_t dev; 763 u_long cmd; 764 caddr_t data; 765 int flag; 766 struct proc *p; 767 { 768 int unit = COMUNIT(dev); 769 struct com_softc *sc = com_cd.cd_devs[unit]; 770 struct tty *tp = sc->sc_tty; 771 int error; 772 773 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 774 if (error >= 0) 775 return (error); 776 777 error = ttioctl(tp, cmd, data, flag, p); 778 if (error >= 0) 779 return (error); 780 781 switch (cmd) { 782 case TIOCSBRK: 783 com_break(sc, 1); 784 break; 785 786 case TIOCCBRK: 787 com_break(sc, 0); 788 break; 789 790 case TIOCSDTR: 791 com_modem(sc, 1); 792 break; 793 794 case TIOCCDTR: 795 com_modem(sc, 0); 796 break; 797 798 case TIOCGFLAGS: 799 *(int *)data = sc->sc_swflags; 800 break; 801 802 case TIOCSFLAGS: 803 error = suser(p->p_ucred, &p->p_acflag); 804 if (error) 805 return (error); 806 sc->sc_swflags = *(int *)data; 807 break; 808 809 case TIOCMSET: 810 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 811 /*FALLTHROUGH*/ 812 813 case TIOCMBIS: 814 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 815 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 816 break; 817 818 case TIOCMBIC: 819 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 820 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 821 break; 822 823 case TIOCMGET: { 824 u_char m; 825 int bits = 0; 826 827 m = sc->sc_mcr; 828 if (ISSET(m, MCR_DTR)) 829 SET(bits, TIOCM_DTR); 830 if (ISSET(m, MCR_RTS)) 831 SET(bits, TIOCM_RTS); 832 m = sc->sc_msr; 833 if (ISSET(m, MSR_DCD)) 834 SET(bits, TIOCM_CD); 835 if (ISSET(m, MSR_CTS)) 836 SET(bits, TIOCM_CTS); 837 if (ISSET(m, MSR_DSR)) 838 SET(bits, TIOCM_DSR); 839 if (ISSET(m, MSR_RI | MSR_TERI)) 840 SET(bits, TIOCM_RI); 841 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 842 SET(bits, TIOCM_LE); 843 *(int *)data = bits; 844 break; 845 } 846 default: 847 return (ENOTTY); 848 } 849 850 #ifdef COM_DEBUG 851 if (com_debug) 852 comstatus(sc, "comioctl "); 853 #endif 854 855 return (0); 856 } 857 858 integrate void 859 com_schedrx(sc) 860 struct com_softc *sc; 861 { 862 863 sc->sc_rx_ready = 1; 864 865 /* Wake up the poller. */ 866 #ifdef __GENERIC_SOFT_INTERRUPTS 867 softintr_schedule(sc->sc_si); 868 #else 869 #ifndef alpha 870 setsoftserial(); 871 #else 872 if (!com_softintr_scheduled) { 873 com_softintr_scheduled = 1; 874 timeout(comsoft, NULL, 1); 875 } 876 #endif 877 #endif 878 } 879 880 void 881 com_break(sc, onoff) 882 struct com_softc *sc; 883 int onoff; 884 { 885 int s; 886 887 s = splserial(); 888 if (onoff) 889 SET(sc->sc_lcr, LCR_SBREAK); 890 else 891 CLR(sc->sc_lcr, LCR_SBREAK); 892 893 if (!sc->sc_heldchange) { 894 if (sc->sc_tx_busy) { 895 sc->sc_heldtbc = sc->sc_tbc; 896 sc->sc_tbc = 0; 897 sc->sc_heldchange = 1; 898 } else 899 com_loadchannelregs(sc); 900 } 901 splx(s); 902 } 903 904 void 905 com_modem(sc, onoff) 906 struct com_softc *sc; 907 int onoff; 908 { 909 int s; 910 911 s = splserial(); 912 if (onoff) 913 SET(sc->sc_mcr, sc->sc_mcr_dtr); 914 else 915 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 916 917 if (!sc->sc_heldchange) { 918 if (sc->sc_tx_busy) { 919 sc->sc_heldtbc = sc->sc_tbc; 920 sc->sc_tbc = 0; 921 sc->sc_heldchange = 1; 922 } else 923 com_loadchannelregs(sc); 924 } 925 splx(s); 926 } 927 928 static u_char 929 cflag2lcr(cflag) 930 tcflag_t cflag; 931 { 932 u_char lcr = 0; 933 934 switch (ISSET(cflag, CSIZE)) { 935 case CS5: 936 SET(lcr, LCR_5BITS); 937 break; 938 case CS6: 939 SET(lcr, LCR_6BITS); 940 break; 941 case CS7: 942 SET(lcr, LCR_7BITS); 943 break; 944 case CS8: 945 SET(lcr, LCR_8BITS); 946 break; 947 } 948 if (ISSET(cflag, PARENB)) { 949 SET(lcr, LCR_PENAB); 950 if (!ISSET(cflag, PARODD)) 951 SET(lcr, LCR_PEVEN); 952 } 953 if (ISSET(cflag, CSTOPB)) 954 SET(lcr, LCR_STOPB); 955 956 return (lcr); 957 } 958 959 int 960 comparam(tp, t) 961 struct tty *tp; 962 struct termios *t; 963 { 964 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 965 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 966 u_char lcr; 967 int s; 968 969 /* check requested parameters */ 970 if (ospeed < 0) 971 return (EINVAL); 972 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 973 return (EINVAL); 974 975 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 976 977 s = splserial(); 978 979 sc->sc_lcr = lcr; 980 981 /* 982 * For the console, always force CLOCAL and !HUPCL, so that the port 983 * is always active. 984 */ 985 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 986 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 987 SET(t->c_cflag, CLOCAL); 988 CLR(t->c_cflag, HUPCL); 989 } 990 991 /* 992 * If we're not in a mode that assumes a connection is present, then 993 * ignore carrier changes. 994 */ 995 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 996 sc->sc_msr_dcd = 0; 997 else 998 sc->sc_msr_dcd = MSR_DCD; 999 /* 1000 * Set the flow control pins depending on the current flow control 1001 * mode. 1002 */ 1003 if (ISSET(t->c_cflag, CRTSCTS)) { 1004 sc->sc_mcr_dtr = MCR_DTR; 1005 sc->sc_mcr_rts = MCR_RTS; 1006 sc->sc_msr_cts = MSR_CTS; 1007 sc->sc_r_hiwat = RXHIWAT; 1008 sc->sc_r_lowat = RXLOWAT; 1009 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1010 } else if (ISSET(t->c_cflag, MDMBUF)) { 1011 /* 1012 * For DTR/DCD flow control, make sure we don't toggle DTR for 1013 * carrier detection. 1014 */ 1015 sc->sc_mcr_dtr = 0; 1016 sc->sc_mcr_rts = MCR_DTR; 1017 sc->sc_msr_cts = MSR_DCD; 1018 sc->sc_r_hiwat = RXHIWAT; 1019 sc->sc_r_lowat = RXLOWAT; 1020 sc->sc_efr = 0; 1021 } else { 1022 /* 1023 * If no flow control, then always set RTS. This will make 1024 * the other side happy if it mistakenly thinks we're doing 1025 * RTS/CTS flow control. 1026 */ 1027 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1028 sc->sc_mcr_rts = 0; 1029 sc->sc_msr_cts = 0; 1030 sc->sc_r_hiwat = 0; 1031 sc->sc_r_lowat = 0; 1032 sc->sc_efr = 0; 1033 if (ISSET(sc->sc_mcr, MCR_DTR)) 1034 SET(sc->sc_mcr, MCR_RTS); 1035 else 1036 CLR(sc->sc_mcr, MCR_RTS); 1037 } 1038 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1039 1040 #if 0 1041 if (ospeed == 0) 1042 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1043 else 1044 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1045 #endif 1046 1047 sc->sc_dlbl = ospeed; 1048 sc->sc_dlbh = ospeed >> 8; 1049 1050 /* 1051 * Set the FIFO threshold based on the receive speed. 1052 * 1053 * * If it's a low speed, it's probably a mouse or some other 1054 * interactive device, so set the threshold low. 1055 * * If it's a high speed, trim the trigger level down to prevent 1056 * overflows. 1057 * * Otherwise set it a bit higher. 1058 */ 1059 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1060 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1061 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1062 sc->sc_fifo = FIFO_ENABLE | 1063 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1064 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1065 else 1066 sc->sc_fifo = 0; 1067 1068 /* and copy to tty */ 1069 tp->t_ispeed = 0; 1070 tp->t_ospeed = t->c_ospeed; 1071 tp->t_cflag = t->c_cflag; 1072 1073 if (!sc->sc_heldchange) { 1074 if (sc->sc_tx_busy) { 1075 sc->sc_heldtbc = sc->sc_tbc; 1076 sc->sc_tbc = 0; 1077 sc->sc_heldchange = 1; 1078 } else 1079 com_loadchannelregs(sc); 1080 } 1081 1082 splx(s); 1083 1084 /* 1085 * Update the tty layer's idea of the carrier bit, in case we changed 1086 * CLOCAL or MDMBUF. We don't hang up here; we only do that if we 1087 * lose carrier while carrier detection is on. 1088 */ 1089 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1090 1091 #ifdef COM_DEBUG 1092 if (com_debug) 1093 comstatus(sc, "comparam "); 1094 #endif 1095 1096 /* Block or unblock as needed. */ 1097 if (!ISSET(t->c_cflag, CHWFLOW)) { 1098 s = splserial(); 1099 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1100 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1101 com_schedrx(sc); 1102 } 1103 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1104 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1105 com_hwiflow(sc); 1106 } 1107 splx(s); 1108 if (sc->sc_tx_stopped) { 1109 sc->sc_tx_stopped = 0; 1110 comstart(tp); 1111 } 1112 } else { 1113 /* XXXXX FIX ME */ 1114 #if 0 1115 commsrint(sc, tp); 1116 #endif 1117 } 1118 1119 return (0); 1120 } 1121 1122 void 1123 com_iflush(sc) 1124 struct com_softc *sc; 1125 { 1126 bus_space_tag_t iot = sc->sc_iot; 1127 bus_space_handle_t ioh = sc->sc_ioh; 1128 1129 /* flush any pending I/O */ 1130 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1131 (void) bus_space_read_1(iot, ioh, com_data); 1132 } 1133 1134 void 1135 com_loadchannelregs(sc) 1136 struct com_softc *sc; 1137 { 1138 bus_space_tag_t iot = sc->sc_iot; 1139 bus_space_handle_t ioh = sc->sc_ioh; 1140 1141 /* XXXXX necessary? */ 1142 com_iflush(sc); 1143 1144 bus_space_write_1(iot, ioh, com_ier, 0); 1145 1146 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1147 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1148 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1149 } 1150 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1151 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1152 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1153 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1154 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1155 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1156 1157 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1158 } 1159 1160 int 1161 comhwiflow(tp, block) 1162 struct tty *tp; 1163 int block; 1164 { 1165 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1166 int s; 1167 1168 if (sc->sc_mcr_rts == 0) 1169 return (0); 1170 1171 s = splserial(); 1172 if (block) { 1173 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1174 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1175 com_hwiflow(sc); 1176 } 1177 } else { 1178 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1179 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1180 com_schedrx(sc); 1181 } 1182 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1183 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1184 com_hwiflow(sc); 1185 } 1186 } 1187 splx(s); 1188 return (1); 1189 } 1190 1191 /* 1192 * (un)block input via hw flowcontrol 1193 */ 1194 void 1195 com_hwiflow(sc) 1196 struct com_softc *sc; 1197 { 1198 bus_space_tag_t iot = sc->sc_iot; 1199 bus_space_handle_t ioh = sc->sc_ioh; 1200 1201 if (sc->sc_mcr_rts == 0) 1202 return; 1203 1204 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1205 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1206 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1207 } else { 1208 SET(sc->sc_mcr, sc->sc_mcr_rts); 1209 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1210 } 1211 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1212 } 1213 1214 1215 void 1216 comstart(tp) 1217 struct tty *tp; 1218 { 1219 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1220 bus_space_tag_t iot = sc->sc_iot; 1221 bus_space_handle_t ioh = sc->sc_ioh; 1222 int s; 1223 1224 s = spltty(); 1225 if (ISSET(tp->t_state, TS_BUSY)) 1226 goto out; 1227 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1228 goto stopped; 1229 1230 if (sc->sc_tx_stopped) 1231 goto stopped; 1232 1233 if (tp->t_outq.c_cc <= tp->t_lowat) { 1234 if (ISSET(tp->t_state, TS_ASLEEP)) { 1235 CLR(tp->t_state, TS_ASLEEP); 1236 wakeup(&tp->t_outq); 1237 } 1238 selwakeup(&tp->t_wsel); 1239 if (tp->t_outq.c_cc == 0) 1240 goto stopped; 1241 } 1242 1243 /* Grab the first contiguous region of buffer space. */ 1244 { 1245 u_char *tba; 1246 int tbc; 1247 1248 tba = tp->t_outq.c_cf; 1249 tbc = ndqb(&tp->t_outq, 0); 1250 1251 (void)splserial(); 1252 1253 sc->sc_tba = tba; 1254 sc->sc_tbc = tbc; 1255 } 1256 1257 SET(tp->t_state, TS_BUSY); 1258 sc->sc_tx_busy = 1; 1259 1260 /* Enable transmit completion interrupts if necessary. */ 1261 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1262 SET(sc->sc_ier, IER_ETXRDY); 1263 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1264 } 1265 1266 /* Output the first chunk of the contiguous buffer. */ 1267 { 1268 int n; 1269 1270 n = sc->sc_fifolen; 1271 if (n > sc->sc_tbc) 1272 n = sc->sc_tbc; 1273 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1274 sc->sc_tbc -= n; 1275 sc->sc_tba += n; 1276 } 1277 splx(s); 1278 return; 1279 1280 stopped: 1281 /* Disable transmit completion interrupts if necessary. */ 1282 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1283 CLR(sc->sc_ier, IER_ETXRDY); 1284 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1285 } 1286 out: 1287 splx(s); 1288 return; 1289 } 1290 1291 /* 1292 * Stop output on a line. 1293 */ 1294 void 1295 comstop(tp, flag) 1296 struct tty *tp; 1297 int flag; 1298 { 1299 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1300 int s; 1301 1302 s = splserial(); 1303 if (ISSET(tp->t_state, TS_BUSY)) { 1304 /* Stop transmitting at the next chunk. */ 1305 sc->sc_tbc = 0; 1306 sc->sc_heldtbc = 0; 1307 if (!ISSET(tp->t_state, TS_TTSTOP)) 1308 SET(tp->t_state, TS_FLUSH); 1309 } 1310 splx(s); 1311 } 1312 1313 void 1314 comdiag(arg) 1315 void *arg; 1316 { 1317 struct com_softc *sc = arg; 1318 int overflows, floods; 1319 int s; 1320 1321 s = splserial(); 1322 overflows = sc->sc_overflows; 1323 sc->sc_overflows = 0; 1324 floods = sc->sc_floods; 1325 sc->sc_floods = 0; 1326 sc->sc_errors = 0; 1327 splx(s); 1328 1329 log(LOG_WARNING, 1330 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1331 sc->sc_dev.dv_xname, 1332 overflows, overflows == 1 ? "" : "s", 1333 floods, floods == 1 ? "" : "s"); 1334 } 1335 1336 integrate void 1337 comrxint(sc, tp) 1338 struct com_softc *sc; 1339 struct tty *tp; 1340 { 1341 u_int get, cc, scc; 1342 int code; 1343 u_char lsr; 1344 int s; 1345 static int lsrmap[8] = { 1346 0, TTY_PE, 1347 TTY_FE, TTY_PE|TTY_FE, 1348 TTY_FE, TTY_PE|TTY_FE, 1349 TTY_FE, TTY_PE|TTY_FE 1350 }; 1351 1352 get = sc->sc_rbget; 1353 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1354 1355 if (cc == RXBUFSIZE) { 1356 sc->sc_floods++; 1357 if (sc->sc_errors++ == 0) 1358 timeout(comdiag, sc, 60 * hz); 1359 } 1360 1361 while (cc) { 1362 lsr = sc->sc_lbuf[get]; 1363 if (ISSET(lsr, LSR_OE)) { 1364 sc->sc_overflows++; 1365 if (sc->sc_errors++ == 0) 1366 timeout(comdiag, sc, 60 * hz); 1367 } 1368 code = sc->sc_rbuf[get] | 1369 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1370 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1371 /* 1372 * The line discipline's buffer is out of space. 1373 */ 1374 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1375 /* 1376 * We're either not using flow control, or the 1377 * line discipline didn't tell us to block for 1378 * some reason. Either way, we have no way to 1379 * know when there's more space available, so 1380 * just drop the rest of the data. 1381 */ 1382 get = (get + cc) & RXBUFMASK; 1383 cc = 0; 1384 } else { 1385 /* 1386 * Don't schedule any more receive processing 1387 * until the line discipline tells us there's 1388 * space available (through comhwiflow()). 1389 * Leave the rest of the data in the input 1390 * buffer. 1391 */ 1392 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1393 } 1394 break; 1395 } 1396 get = (get + 1) & RXBUFMASK; 1397 cc--; 1398 } 1399 1400 if (cc != scc) { 1401 sc->sc_rbget = get; 1402 s = splserial(); 1403 cc = sc->sc_rbavail += scc - cc; 1404 /* Buffers should be ok again, release possible block. */ 1405 if (cc >= sc->sc_r_lowat) { 1406 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1407 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1408 SET(sc->sc_ier, IER_ERXRDY); 1409 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1410 } 1411 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1412 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1413 com_hwiflow(sc); 1414 } 1415 } 1416 splx(s); 1417 } 1418 } 1419 1420 integrate void 1421 comtxint(sc, tp) 1422 struct com_softc *sc; 1423 struct tty *tp; 1424 { 1425 1426 CLR(tp->t_state, TS_BUSY); 1427 if (ISSET(tp->t_state, TS_FLUSH)) 1428 CLR(tp->t_state, TS_FLUSH); 1429 else 1430 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1431 (*linesw[tp->t_line].l_start)(tp); 1432 } 1433 1434 integrate void 1435 commsrint(sc, tp) 1436 struct com_softc *sc; 1437 struct tty *tp; 1438 { 1439 u_char msr, delta; 1440 int s; 1441 1442 s = splserial(); 1443 msr = sc->sc_msr; 1444 delta = sc->sc_msr_delta; 1445 sc->sc_msr_delta = 0; 1446 splx(s); 1447 1448 if (ISSET(delta, sc->sc_msr_dcd)) { 1449 /* 1450 * Inform the tty layer that carrier detect changed. 1451 */ 1452 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1453 } 1454 1455 if (ISSET(delta, sc->sc_msr_cts)) { 1456 /* Block or unblock output according to flow control. */ 1457 if (ISSET(msr, sc->sc_msr_cts)) { 1458 sc->sc_tx_stopped = 0; 1459 (*linesw[tp->t_line].l_start)(tp); 1460 } else { 1461 sc->sc_tx_stopped = 1; 1462 } 1463 } 1464 1465 #ifdef COM_DEBUG 1466 if (com_debug) 1467 comstatus(sc, "commsrint"); 1468 #endif 1469 } 1470 1471 #ifdef __GENERIC_SOFT_INTERRUPTS 1472 void 1473 comsoft(arg) 1474 void *arg; 1475 { 1476 struct com_softc *sc = arg; 1477 struct tty *tp; 1478 1479 { 1480 #else 1481 void 1482 #ifndef alpha 1483 comsoft() 1484 #else 1485 comsoft(arg) 1486 void *arg; 1487 #endif 1488 { 1489 struct com_softc *sc; 1490 struct tty *tp; 1491 int unit; 1492 #ifdef alpha 1493 int s; 1494 1495 s = splsoftserial(); 1496 com_softintr_scheduled = 0; 1497 #endif 1498 1499 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1500 sc = com_cd.cd_devs[unit]; 1501 if (sc == NULL) 1502 continue; 1503 1504 tp = sc->sc_tty; 1505 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1506 continue; 1507 #endif 1508 tp = sc->sc_tty; 1509 1510 if (sc->sc_rx_ready) { 1511 sc->sc_rx_ready = 0; 1512 comrxint(sc, tp); 1513 } 1514 1515 if (sc->sc_st_check) { 1516 sc->sc_st_check = 0; 1517 commsrint(sc, tp); 1518 } 1519 1520 if (sc->sc_tx_done) { 1521 sc->sc_tx_done = 0; 1522 comtxint(sc, tp); 1523 } 1524 } 1525 1526 #ifndef __GENERIC_SOFT_INTERRUPTS 1527 #ifdef alpha 1528 splx(s); 1529 #endif 1530 #endif 1531 } 1532 1533 int 1534 comintr(arg) 1535 void *arg; 1536 { 1537 struct com_softc *sc = arg; 1538 bus_space_tag_t iot = sc->sc_iot; 1539 bus_space_handle_t ioh = sc->sc_ioh; 1540 u_char lsr, iir; 1541 u_int put, cc; 1542 1543 iir = bus_space_read_1(iot, ioh, com_iir); 1544 if (ISSET(iir, IIR_NOPEND)) 1545 return (0); 1546 1547 put = sc->sc_rbput; 1548 cc = sc->sc_rbavail; 1549 1550 do { 1551 u_char msr, delta; 1552 1553 lsr = bus_space_read_1(iot, ioh, com_lsr); 1554 #if defined(DDB) || defined(KGDB) 1555 if (ISSET(lsr, LSR_BI)) { 1556 #ifdef DDB 1557 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1558 Debugger(); 1559 continue; 1560 } 1561 #endif 1562 #ifdef KGDB 1563 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1564 kgdb_connect(1); 1565 continue; 1566 } 1567 #endif 1568 } 1569 #endif /* DDB || KGDB */ 1570 1571 if (ISSET(lsr, LSR_RCV_MASK) && 1572 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1573 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1574 sc->sc_rbuf[put] = 1575 bus_space_read_1(iot, ioh, com_data); 1576 sc->sc_lbuf[put] = lsr; 1577 put = (put + 1) & RXBUFMASK; 1578 lsr = bus_space_read_1(iot, ioh, com_lsr); 1579 } 1580 /* 1581 * Current string of incoming characters ended because 1582 * no more data was available. Schedule a receive event 1583 * if any data was received. Drop any characters that 1584 * we couldn't handle. 1585 */ 1586 sc->sc_rbput = put; 1587 sc->sc_rbavail = cc; 1588 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1589 sc->sc_rx_ready = 1; 1590 /* 1591 * See if we are in danger of overflowing a buffer. If 1592 * so, use hardware flow control to ease the pressure. 1593 */ 1594 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1595 cc < sc->sc_r_hiwat) { 1596 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1597 com_hwiflow(sc); 1598 } 1599 /* 1600 * If we're out of space, disable receive interrupts 1601 * until the queue has drained a bit. 1602 */ 1603 if (!cc) { 1604 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1605 CLR(sc->sc_ier, IER_ERXRDY); 1606 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1607 } 1608 } else { 1609 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1610 bus_space_write_1(iot, ioh, com_ier, 0); 1611 delay(10); 1612 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1613 iir = IIR_NOPEND; 1614 continue; 1615 } 1616 } 1617 1618 msr = bus_space_read_1(iot, ioh, com_msr); 1619 delta = msr ^ sc->sc_msr; 1620 sc->sc_msr = msr; 1621 if (ISSET(delta, sc->sc_msr_mask)) { 1622 sc->sc_msr_delta |= delta; 1623 1624 /* 1625 * Stop output immediately if we lose the output 1626 * flow control signal or carrier detect. 1627 */ 1628 if (ISSET(~msr, sc->sc_msr_mask)) { 1629 sc->sc_tbc = 0; 1630 sc->sc_heldtbc = 0; 1631 #ifdef COM_DEBUG 1632 if (com_debug) 1633 comstatus(sc, "comintr "); 1634 #endif 1635 } 1636 1637 sc->sc_st_check = 1; 1638 } 1639 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1640 1641 /* 1642 * Done handling any receive interrupts. See if data can be 1643 * transmitted as well. Schedule tx done event if no data left 1644 * and tty was marked busy. 1645 */ 1646 if (ISSET(lsr, LSR_TXRDY)) { 1647 /* 1648 * If we've delayed a parameter change, do it now, and restart 1649 * output. 1650 */ 1651 if (sc->sc_heldchange) { 1652 com_loadchannelregs(sc); 1653 sc->sc_heldchange = 0; 1654 sc->sc_tbc = sc->sc_heldtbc; 1655 sc->sc_heldtbc = 0; 1656 } 1657 /* Output the next chunk of the contiguous buffer, if any. */ 1658 if (sc->sc_tbc > 0) { 1659 int n; 1660 1661 n = sc->sc_fifolen; 1662 if (n > sc->sc_tbc) 1663 n = sc->sc_tbc; 1664 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1665 sc->sc_tbc -= n; 1666 sc->sc_tba += n; 1667 } else if (sc->sc_tx_busy) { 1668 sc->sc_tx_busy = 0; 1669 sc->sc_tx_done = 1; 1670 } 1671 } 1672 1673 /* Wake up the poller. */ 1674 #ifdef __GENERIC_SOFT_INTERRUPTS 1675 softintr_schedule(sc->sc_si); 1676 #else 1677 #ifndef alpha 1678 setsoftserial(); 1679 #else 1680 if (!com_softintr_scheduled) { 1681 com_softintr_scheduled = 1; 1682 timeout(comsoft, NULL, 1); 1683 } 1684 #endif 1685 #endif 1686 1687 #if NRND > 0 && defined(RND_COM) 1688 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1689 #endif 1690 1691 return (1); 1692 } 1693 1694 /* 1695 * The following functions are polled getc and putc routines, shared 1696 * by the console and kgdb glue. 1697 */ 1698 1699 int 1700 com_common_getc(iot, ioh) 1701 bus_space_tag_t iot; 1702 bus_space_handle_t ioh; 1703 { 1704 int s = splserial(); 1705 u_char stat, c; 1706 1707 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1708 ; 1709 c = bus_space_read_1(iot, ioh, com_data); 1710 stat = bus_space_read_1(iot, ioh, com_iir); 1711 splx(s); 1712 return (c); 1713 } 1714 1715 void 1716 com_common_putc(iot, ioh, c) 1717 bus_space_tag_t iot; 1718 bus_space_handle_t ioh; 1719 int c; 1720 { 1721 int s = splserial(); 1722 u_char stat; 1723 register int timo; 1724 1725 /* wait for any pending transmission to finish */ 1726 timo = 50000; 1727 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1728 && --timo) 1729 ; 1730 bus_space_write_1(iot, ioh, com_data, c); 1731 /* wait for this transmission to complete */ 1732 timo = 1500000; 1733 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1734 && --timo) 1735 ; 1736 /* clear any interrupts generated by this transmission */ 1737 stat = bus_space_read_1(iot, ioh, com_iir); 1738 splx(s); 1739 } 1740 1741 /* 1742 * Initialize UART to known state. 1743 */ 1744 int 1745 cominit(iot, iobase, rate, frequency, cflag, iohp) 1746 bus_space_tag_t iot; 1747 int iobase; 1748 int rate, frequency; 1749 tcflag_t cflag; 1750 bus_space_handle_t *iohp; 1751 { 1752 bus_space_handle_t ioh; 1753 1754 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1755 return (ENOMEM); /* ??? */ 1756 1757 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1758 bus_space_write_1(iot, ioh, com_efr, 0); 1759 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1760 rate = comspeed(rate, frequency); 1761 bus_space_write_1(iot, ioh, com_dlbl, rate); 1762 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1763 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1764 bus_space_write_1(iot, ioh, com_mcr, 0); 1765 bus_space_write_1(iot, ioh, com_fifo, 1766 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1767 bus_space_write_1(iot, ioh, com_ier, 0); 1768 1769 *iohp = ioh; 1770 return (0); 1771 } 1772 1773 /* 1774 * Following are all routines needed for COM to act as console 1775 */ 1776 1777 int 1778 comcnattach(iot, iobase, rate, frequency, cflag) 1779 bus_space_tag_t iot; 1780 int iobase; 1781 int rate, frequency; 1782 tcflag_t cflag; 1783 { 1784 int res; 1785 static struct consdev comcons = { 1786 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 1787 }; 1788 1789 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1790 if (res) 1791 return (res); 1792 1793 cn_tab = &comcons; 1794 1795 comconstag = iot; 1796 comconsaddr = iobase; 1797 comconsrate = rate; 1798 comconscflag = cflag; 1799 1800 return (0); 1801 } 1802 1803 int 1804 comcngetc(dev) 1805 dev_t dev; 1806 { 1807 1808 return (com_common_getc(comconstag, comconsioh)); 1809 } 1810 1811 /* 1812 * Console kernel output character routine. 1813 */ 1814 void 1815 comcnputc(dev, c) 1816 dev_t dev; 1817 int c; 1818 { 1819 1820 com_common_putc(comconstag, comconsioh, c); 1821 } 1822 1823 void 1824 comcnpollc(dev, on) 1825 dev_t dev; 1826 int on; 1827 { 1828 1829 } 1830 1831 #ifdef KGDB 1832 int 1833 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1834 bus_space_tag_t iot; 1835 int iobase; 1836 int rate, frequency; 1837 tcflag_t cflag; 1838 { 1839 int res; 1840 1841 if (iot == comconstag && iobase == comconsaddr) 1842 return (EBUSY); /* cannot share with console */ 1843 1844 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1845 if (res) 1846 return (res); 1847 1848 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1849 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1850 1851 com_kgdb_iot = iot; 1852 com_kgdb_addr = iobase; 1853 1854 return (0); 1855 } 1856 1857 /* ARGSUSED */ 1858 int 1859 com_kgdb_getc(arg) 1860 void *arg; 1861 { 1862 1863 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1864 } 1865 1866 /* ARGSUSED */ 1867 void 1868 com_kgdb_putc(arg, c) 1869 void *arg; 1870 int c; 1871 { 1872 1873 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1874 } 1875 #endif /* KGDB */ 1876 1877 /* helper function to identify the com ports used by 1878 console or KGDB (and not yet autoconf attached) */ 1879 int 1880 com_is_console(iot, iobase, ioh) 1881 bus_space_tag_t iot; 1882 int iobase; 1883 bus_space_handle_t *ioh; 1884 { 1885 bus_space_handle_t help; 1886 1887 if (!comconsattached && 1888 iot == comconstag && iobase == comconsaddr) 1889 help = comconsioh; 1890 #ifdef KGDB 1891 else if (!com_kgdb_attached && 1892 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1893 help = com_kgdb_ioh; 1894 #endif 1895 else 1896 return (0); 1897 1898 if (ioh) 1899 *ioh = help; 1900 return (1); 1901 } 1902
Indexes created Wed Oct 22 06:10:02 GMT 2025