com.c revision 1.125
1 /* $NetBSD: com.c,v 1.125 1997/11/02 09:24:51 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 96 #include <machine/intr.h> 97 #include <machine/bus.h> 98 99 #include <dev/ic/comreg.h> 100 #include <dev/ic/comvar.h> 101 #include <dev/ic/ns16550reg.h> 102 #include <dev/ic/st16650reg.h> 103 #ifdef COM_HAYESP 104 #include <dev/ic/hayespreg.h> 105 #endif 106 #define com_lcr com_cfcr 107 #include <dev/cons.h> 108 109 #include "com.h" 110 111 #ifdef COM_HAYESP 112 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 113 #endif 114 115 #if defined(DDB) || defined(KGDB) 116 static void com_enable_debugport __P((struct com_softc *)); 117 #endif 118 void com_attach_subr __P((struct com_softc *sc)); 119 void comdiag __P((void *)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 #ifdef __GENERIC_SOFT_INTERRUPTS 126 void comsoft __P((void *)); 127 #else 128 #ifndef alpha 129 void comsoft __P((void)); 130 #else 131 void comsoft __P((void *)); 132 #endif 133 #endif 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void com_iflush __P((struct com_softc *)); 141 142 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 143 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 144 145 /* XXX: These belong elsewhere */ 146 cdev_decl(com); 147 bdev_decl(com); 148 149 int comcngetc __P((dev_t)); 150 void comcnputc __P((dev_t, int)); 151 void comcnpollc __P((dev_t, int)); 152 153 #define integrate static inline 154 integrate void comrxint __P((struct com_softc *, struct tty *)); 155 integrate void comtxint __P((struct com_softc *, struct tty *)); 156 integrate void commsrint __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 159 struct cfdriver com_cd = { 160 NULL, "com", DV_TTY 161 }; 162 163 static int comconsaddr; 164 static bus_space_tag_t comconstag; 165 static bus_space_handle_t comconsioh; 166 static int comconsattached; 167 static int comconsrate; 168 static tcflag_t comconscflag; 169 170 static u_char tiocm_xxx2mcr __P((int)); 171 172 #ifndef __GENERIC_SOFT_INTERRUPTS 173 #ifdef alpha 174 volatile int com_softintr_scheduled; 175 #endif 176 #endif 177 178 #ifdef KGDB 179 #include <sys/kgdb.h> 180 181 static int com_kgdb_addr; 182 static bus_space_tag_t com_kgdb_iot; 183 static bus_space_handle_t com_kgdb_ioh; 184 static int com_kgdb_attached; 185 186 int com_kgdb_getc __P((void *)); 187 void com_kgdb_putc __P((void *, int)); 188 #endif /* KGDB */ 189 190 #define COMUNIT(x) (minor(x)) 191 192 int 193 comspeed(speed, frequency) 194 long speed, frequency; 195 { 196 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 197 198 int x, err; 199 200 #if 0 201 if (speed == 0) 202 return (0); 203 #endif 204 if (speed <= 0) 205 return (-1); 206 x = divrnd(frequency / 16, speed); 207 if (x <= 0) 208 return (-1); 209 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 210 if (err < 0) 211 err = -err; 212 if (err > COM_TOLERANCE) 213 return (-1); 214 return (x); 215 216 #undef divrnd(n, q) 217 } 218 219 #ifdef COM_DEBUG 220 int com_debug = 0; 221 222 void comstatus __P((struct com_softc *, char *)); 223 void 224 comstatus(sc, str) 225 struct com_softc *sc; 226 char *str; 227 { 228 struct tty *tp = sc->sc_tty; 229 230 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 231 sc->sc_dev.dv_xname, str, 232 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 233 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 234 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 235 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 236 sc->sc_tx_stopped ? "+" : "-"); 237 238 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 239 sc->sc_dev.dv_xname, str, 240 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 241 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 242 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 243 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 244 sc->sc_rx_flags); 245 } 246 #endif 247 248 int 249 comprobe1(iot, ioh, iobase) 250 bus_space_tag_t iot; 251 bus_space_handle_t ioh; 252 int iobase; 253 { 254 255 /* force access to id reg */ 256 bus_space_write_1(iot, ioh, com_lcr, 0); 257 bus_space_write_1(iot, ioh, com_iir, 0); 258 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 259 return (0); 260 261 return (1); 262 } 263 264 #ifdef COM_HAYESP 265 int 266 comprobeHAYESP(hayespioh, sc) 267 bus_space_handle_t hayespioh; 268 struct com_softc *sc; 269 { 270 char val, dips; 271 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 272 bus_space_tag_t iot = sc->sc_iot; 273 274 /* 275 * Hayes ESP cards have two iobases. One is for compatibility with 276 * 16550 serial chips, and at the same ISA PC base addresses. The 277 * other is for ESP-specific enhanced features, and lies at a 278 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 279 */ 280 281 /* Test for ESP signature */ 282 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 283 return (0); 284 285 /* 286 * ESP is present at ESP enhanced base address; unknown com port 287 */ 288 289 /* Get the dip-switch configurations */ 290 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 291 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 292 293 /* Determine which com port this ESP card services: bits 0,1 of */ 294 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 295 if (sc->sc_iobase != combaselist[dips & 0x03]) 296 return (0); 297 298 printf(": ESP"); 299 300 /* Check ESP Self Test bits. */ 301 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 303 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 304 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 305 if ((val & 0x70) < 0x20) { 306 printf("-old (%o)", val & 0x70); 307 /* we do not support the necessary features */ 308 return (0); 309 } 310 311 /* Check for ability to emulate 16550: bit 8 == 1 */ 312 if ((dips & 0x80) == 0) { 313 printf(" slave"); 314 /* XXX Does slave really mean no 16550 support?? */ 315 return (0); 316 } 317 318 /* 319 * If we made it this far, we are a full-featured ESP v2.0 (or 320 * better), at the correct com port address. 321 */ 322 323 SET(sc->sc_hwflags, COM_HW_HAYESP); 324 printf(", 1024 byte fifo\n"); 325 return (1); 326 } 327 #endif 328 329 #if defined(DDB) || defined(KGDB) 330 static void 331 com_enable_debugport(sc) 332 struct com_softc *sc; 333 { 334 int s; 335 336 /* Turn on line break interrupt, set carrier. */ 337 s = splserial(); 338 sc->sc_ier = IER_ERXRDY; 339 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 340 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 341 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 342 splx(s); 343 } 344 #endif 345 346 void 347 com_attach_subr(sc) 348 struct com_softc *sc; 349 { 350 int iobase = sc->sc_iobase; 351 bus_space_tag_t iot = sc->sc_iot; 352 bus_space_handle_t ioh = sc->sc_ioh; 353 #ifdef COM16650 354 u_int8_t lcr; 355 #endif 356 #ifdef COM_HAYESP 357 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 358 int *hayespp; 359 #endif 360 361 /* Disable interrupts before configuring the device. */ 362 sc->sc_ier = 0; 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 364 365 if (iot == comconstag && iobase == comconsaddr) { 366 comconsattached = 1; 367 368 /* Make sure the console is always "hardwired". */ 369 delay(1000); /* wait for output to finish */ 370 SET(sc->sc_hwflags, COM_HW_CONSOLE); 371 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 372 } 373 374 #ifdef COM_HAYESP 375 /* Look for a Hayes ESP board. */ 376 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 377 bus_space_handle_t hayespioh; 378 379 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 380 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 381 continue; 382 if (comprobeHAYESP(hayespioh, sc)) { 383 sc->sc_hayespioh = hayespioh; 384 sc->sc_fifolen = 1024; 385 386 /* Set 16550 compatibility mode */ 387 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 388 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 389 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 390 HAYESP_MODE_SCALE); 391 392 /* Set RTS/CTS flow control */ 393 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 394 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 395 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 396 397 /* Set flow control levels */ 398 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 399 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 400 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 403 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 404 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 405 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 406 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 407 408 break; 409 } 410 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 411 } 412 /* No ESP; look for other things. */ 413 if (*hayespp == 0) { 414 #endif 415 sc->sc_fifolen = 1; 416 /* look for a NS 16550AF UART with FIFOs */ 417 bus_space_write_1(iot, ioh, com_fifo, 418 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 419 delay(100); 420 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 421 == IIR_FIFO_MASK) 422 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 423 == FIFO_TRIGGER_14) { 424 SET(sc->sc_hwflags, COM_HW_FIFO); 425 426 #ifdef COM16650 427 /* 428 * IIR changes into the EFR if LCR is set to LCR_EERS 429 * on 16650s. We also know IIR != 0 at this point. 430 * Write 0 into the EFR, and read it. If the result 431 * is 0, we have a 16650. 432 * 433 * Older 16650s were broken; the test to detect them 434 * is taken from the Linux driver. Apparently 435 * setting DLAB enable gives access to the EFR on 436 * these chips. 437 */ 438 lcr = bus_space_read_1(iot, ioh, com_lcr); 439 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 440 bus_space_write_1(iot, ioh, com_efr, 0); 441 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 442 bus_space_write_1(iot, ioh, com_lcr, 443 lcr | LCR_DLAB); 444 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 445 CLR(sc->sc_hwflags, COM_HW_FIFO); 446 sc->sc_fifolen = 0; 447 } else { 448 SET(sc->sc_hwflags, COM_HW_FLOW); 449 sc->sc_fifolen = 32; 450 } 451 } else 452 #endif 453 sc->sc_fifolen = 16; 454 455 #ifdef COM16650 456 bus_space_write_1(iot, ioh, com_lcr, lcr); 457 if (sc->sc_fifolen == 0) 458 printf(": st16650, broken fifo\n"); 459 else if (sc->sc_fifolen == 32) 460 printf(": st16650a, working fifo\n"); 461 else 462 #endif 463 printf(": ns16550a, working fifo\n"); 464 } else 465 printf(": ns16550, broken fifo\n"); 466 else 467 printf(": ns8250 or ns16450, no fifo\n"); 468 bus_space_write_1(iot, ioh, com_fifo, 0); 469 #ifdef COM_HAYESP 470 } 471 #endif 472 473 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 474 SET(sc->sc_mcr, MCR_IENABLE); 475 476 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 477 int maj; 478 479 /* locate the major number */ 480 for (maj = 0; maj < nchrdev; maj++) 481 if (cdevsw[maj].d_open == comopen) 482 break; 483 484 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 485 #ifdef DDB 486 com_enable_debugport(sc); 487 #endif 488 printf("%s: console\n", sc->sc_dev.dv_xname); 489 } 490 491 #ifdef KGDB 492 /* 493 * Allow kgdb to "take over" this port. If this is 494 * the kgdb device, it has exclusive use. 495 */ 496 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 497 com_kgdb_attached = 1; 498 499 SET(sc->sc_hwflags, COM_HW_KGDB); 500 com_enable_debugport(sc); 501 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 502 } 503 #endif 504 505 #ifdef __GENERIC_SOFT_INTERRUPTS 506 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 507 #endif 508 509 #if NRND > 0 && defined(RND_COM) 510 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 511 RND_TYPE_TTY); 512 #endif 513 } 514 515 int 516 comopen(dev, flag, mode, p) 517 dev_t dev; 518 int flag, mode; 519 struct proc *p; 520 { 521 int unit = COMUNIT(dev); 522 struct com_softc *sc; 523 struct tty *tp; 524 int s, s2; 525 int error = 0; 526 527 if (unit >= com_cd.cd_ndevs) 528 return (ENXIO); 529 sc = com_cd.cd_devs[unit]; 530 if (!sc) 531 return (ENXIO); 532 533 #ifdef KGDB 534 /* 535 * If this is the kgdb port, no other use is permitted. 536 */ 537 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 538 return (EBUSY); 539 #endif 540 541 tp = sc->sc_tty; 542 if (tp == 0) { 543 sc->sc_tty = tp = ttymalloc(); 544 tp->t_dev = dev; 545 tp->t_oproc = comstart; 546 tp->t_param = comparam; 547 tp->t_hwiflow = comhwiflow; 548 tty_attach(tp); 549 } 550 551 if (ISSET(tp->t_state, TS_ISOPEN) && 552 ISSET(tp->t_state, TS_XCLUDE) && 553 p->p_ucred->cr_uid != 0) 554 return (EBUSY); 555 556 s = spltty(); 557 558 /* We need to set this early for the benefit of comsoft(). */ 559 SET(tp->t_state, TS_WOPEN); 560 561 /* 562 * Do the following iff this is a first open. 563 */ 564 if (!ISSET(tp->t_state, TS_ISOPEN)) { 565 struct termios t; 566 567 s2 = splserial(); 568 569 /* Turn on interrupts. */ 570 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 571 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 572 573 /* Fetch the current modem control status, needed later. */ 574 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 575 576 splx(s2); 577 578 /* 579 * Initialize the termios status to the defaults. Add in the 580 * sticky bits from TIOCSFLAGS. 581 */ 582 t.c_ispeed = 0; 583 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 584 t.c_ospeed = comconsrate; 585 t.c_cflag = comconscflag; 586 } else { 587 t.c_ospeed = TTYDEF_SPEED; 588 t.c_cflag = TTYDEF_CFLAG; 589 } 590 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 591 SET(t.c_cflag, CLOCAL); 592 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 593 SET(t.c_cflag, CRTSCTS); 594 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 595 SET(t.c_cflag, MDMBUF); 596 (void) comparam(tp, &t); 597 tp->t_iflag = TTYDEF_IFLAG; 598 tp->t_oflag = TTYDEF_OFLAG; 599 tp->t_lflag = TTYDEF_LFLAG; 600 ttychars(tp); 601 ttsetwater(tp); 602 603 /* 604 * Turn on DTR. We must always do this, even if carrier is not 605 * present, because otherwise we'd have to use TIOCSDTR 606 * immediately after setting CLOCAL, which applications do not 607 * expect. We always assert DTR while the device is open 608 * unless explicitly requested to deassert it. 609 */ 610 com_modem(sc, 1); 611 612 s2 = splserial(); 613 614 /* Clear the input ring, and unblock. */ 615 sc->sc_rbput = sc->sc_rbget = 0; 616 sc->sc_rbavail = RXBUFSIZE; 617 com_iflush(sc); 618 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 619 com_hwiflow(sc); 620 621 #ifdef COM_DEBUG 622 if (com_debug) 623 comstatus(sc, "comopen "); 624 #endif 625 626 splx(s2); 627 } 628 error = 0; 629 630 /* If we're doing a blocking open... */ 631 if (!ISSET(flag, O_NONBLOCK)) 632 /* ...then wait for carrier. */ 633 while (!ISSET(tp->t_state, TS_CARR_ON) && 634 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 635 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 636 ttopen, 0); 637 if (error) { 638 /* 639 * If the open was interrupted and nobody 640 * else has the device open, then hang up. 641 */ 642 if (!ISSET(tp->t_state, TS_ISOPEN)) { 643 com_modem(sc, 0); 644 CLR(tp->t_state, TS_WOPEN); 645 ttwakeup(tp); 646 } 647 break; 648 } 649 SET(tp->t_state, TS_WOPEN); 650 } 651 652 splx(s); 653 if (error == 0) 654 error = (*linesw[tp->t_line].l_open)(dev, tp); 655 return (error); 656 } 657 658 int 659 comclose(dev, flag, mode, p) 660 dev_t dev; 661 int flag, mode; 662 struct proc *p; 663 { 664 int unit = COMUNIT(dev); 665 struct com_softc *sc = com_cd.cd_devs[unit]; 666 struct tty *tp = sc->sc_tty; 667 int s; 668 669 /* XXX This is for cons.c. */ 670 if (!ISSET(tp->t_state, TS_ISOPEN)) 671 return (0); 672 673 (*linesw[tp->t_line].l_close)(tp, flag); 674 ttyclose(tp); 675 676 s = splserial(); 677 678 /* If we were asserting flow control, then deassert it. */ 679 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 680 com_hwiflow(sc); 681 682 splx(s); 683 684 /* Clear any break condition set with TIOCSBRK. */ 685 com_break(sc, 0); 686 687 /* 688 * Hang up if necessary. Wait a bit, so the other side has time to 689 * notice even if we immediately open the port again. 690 */ 691 if (ISSET(tp->t_cflag, HUPCL)) { 692 com_modem(sc, 0); 693 (void) tsleep(sc, TTIPRI, ttclos, hz); 694 } 695 696 s = splserial(); 697 698 /* Turn off interrupts. */ 699 #ifdef DDB 700 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 701 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 702 else 703 #else 704 sc->sc_ier = 0; 705 #endif 706 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 707 708 splx(s); 709 710 return (0); 711 } 712 713 int 714 comread(dev, uio, flag) 715 dev_t dev; 716 struct uio *uio; 717 int flag; 718 { 719 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 720 struct tty *tp = sc->sc_tty; 721 722 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 723 } 724 725 int 726 comwrite(dev, uio, flag) 727 dev_t dev; 728 struct uio *uio; 729 int flag; 730 { 731 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 732 struct tty *tp = sc->sc_tty; 733 734 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 735 } 736 737 struct tty * 738 comtty(dev) 739 dev_t dev; 740 { 741 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 742 struct tty *tp = sc->sc_tty; 743 744 return (tp); 745 } 746 747 static u_char 748 tiocm_xxx2mcr(data) 749 int data; 750 { 751 u_char m = 0; 752 753 if (ISSET(data, TIOCM_DTR)) 754 SET(m, MCR_DTR); 755 if (ISSET(data, TIOCM_RTS)) 756 SET(m, MCR_RTS); 757 return m; 758 } 759 760 int 761 comioctl(dev, cmd, data, flag, p) 762 dev_t dev; 763 u_long cmd; 764 caddr_t data; 765 int flag; 766 struct proc *p; 767 { 768 int unit = COMUNIT(dev); 769 struct com_softc *sc = com_cd.cd_devs[unit]; 770 struct tty *tp = sc->sc_tty; 771 int error; 772 773 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 774 if (error >= 0) 775 return (error); 776 777 error = ttioctl(tp, cmd, data, flag, p); 778 if (error >= 0) 779 return (error); 780 781 switch (cmd) { 782 case TIOCSBRK: 783 com_break(sc, 1); 784 break; 785 786 case TIOCCBRK: 787 com_break(sc, 0); 788 break; 789 790 case TIOCSDTR: 791 com_modem(sc, 1); 792 break; 793 794 case TIOCCDTR: 795 com_modem(sc, 0); 796 break; 797 798 case TIOCGFLAGS: 799 *(int *)data = sc->sc_swflags; 800 break; 801 802 case TIOCSFLAGS: 803 error = suser(p->p_ucred, &p->p_acflag); 804 if (error) 805 return (error); 806 sc->sc_swflags = *(int *)data; 807 break; 808 809 case TIOCMSET: 810 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 811 /*FALLTHROUGH*/ 812 813 case TIOCMBIS: 814 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 815 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 816 break; 817 818 case TIOCMBIC: 819 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 820 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 821 break; 822 823 case TIOCMGET: { 824 u_char m; 825 int bits = 0; 826 827 m = sc->sc_mcr; 828 if (ISSET(m, MCR_DTR)) 829 SET(bits, TIOCM_DTR); 830 if (ISSET(m, MCR_RTS)) 831 SET(bits, TIOCM_RTS); 832 m = sc->sc_msr; 833 if (ISSET(m, MSR_DCD)) 834 SET(bits, TIOCM_CD); 835 if (ISSET(m, MSR_CTS)) 836 SET(bits, TIOCM_CTS); 837 if (ISSET(m, MSR_DSR)) 838 SET(bits, TIOCM_DSR); 839 if (ISSET(m, MSR_RI | MSR_TERI)) 840 SET(bits, TIOCM_RI); 841 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 842 SET(bits, TIOCM_LE); 843 *(int *)data = bits; 844 break; 845 } 846 default: 847 return (ENOTTY); 848 } 849 850 #ifdef COM_DEBUG 851 if (com_debug) 852 comstatus(sc, "comioctl "); 853 #endif 854 855 return (0); 856 } 857 858 integrate void 859 com_schedrx(sc) 860 struct com_softc *sc; 861 { 862 863 sc->sc_rx_ready = 1; 864 865 /* Wake up the poller. */ 866 #ifdef __GENERIC_SOFT_INTERRUPTS 867 softintr_schedule(sc->sc_si); 868 #else 869 #ifndef alpha 870 setsoftserial(); 871 #else 872 if (!com_softintr_scheduled) { 873 com_softintr_scheduled = 1; 874 timeout(comsoft, NULL, 1); 875 } 876 #endif 877 #endif 878 } 879 880 void 881 com_break(sc, onoff) 882 struct com_softc *sc; 883 int onoff; 884 { 885 int s; 886 887 s = splserial(); 888 if (onoff) 889 SET(sc->sc_lcr, LCR_SBREAK); 890 else 891 CLR(sc->sc_lcr, LCR_SBREAK); 892 893 if (!sc->sc_heldchange) { 894 if (sc->sc_tx_busy) { 895 sc->sc_heldtbc = sc->sc_tbc; 896 sc->sc_tbc = 0; 897 sc->sc_heldchange = 1; 898 } else 899 com_loadchannelregs(sc); 900 } 901 splx(s); 902 } 903 904 void 905 com_modem(sc, onoff) 906 struct com_softc *sc; 907 int onoff; 908 { 909 int s; 910 911 s = splserial(); 912 if (onoff) 913 SET(sc->sc_mcr, sc->sc_mcr_dtr); 914 else 915 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 916 917 if (!sc->sc_heldchange) { 918 if (sc->sc_tx_busy) { 919 sc->sc_heldtbc = sc->sc_tbc; 920 sc->sc_tbc = 0; 921 sc->sc_heldchange = 1; 922 } else 923 com_loadchannelregs(sc); 924 } 925 splx(s); 926 } 927 928 static u_char 929 cflag2lcr(cflag) 930 tcflag_t cflag; 931 { 932 u_char lcr = 0; 933 934 switch (ISSET(cflag, CSIZE)) { 935 case CS5: 936 SET(lcr, LCR_5BITS); 937 break; 938 case CS6: 939 SET(lcr, LCR_6BITS); 940 break; 941 case CS7: 942 SET(lcr, LCR_7BITS); 943 break; 944 case CS8: 945 SET(lcr, LCR_8BITS); 946 break; 947 } 948 if (ISSET(cflag, PARENB)) { 949 SET(lcr, LCR_PENAB); 950 if (!ISSET(cflag, PARODD)) 951 SET(lcr, LCR_PEVEN); 952 } 953 if (ISSET(cflag, CSTOPB)) 954 SET(lcr, LCR_STOPB); 955 956 return (lcr); 957 } 958 959 int 960 comparam(tp, t) 961 struct tty *tp; 962 struct termios *t; 963 { 964 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 965 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 966 u_char lcr; 967 int s; 968 969 /* check requested parameters */ 970 if (ospeed < 0) 971 return (EINVAL); 972 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 973 return (EINVAL); 974 975 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 976 977 s = splserial(); 978 979 sc->sc_lcr = lcr; 980 981 /* 982 * For the console, always force CLOCAL and !HUPCL, so that the port 983 * is always active. 984 */ 985 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 986 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 987 SET(t->c_cflag, CLOCAL); 988 CLR(t->c_cflag, HUPCL); 989 } 990 991 /* 992 * If we're not in a mode that assumes a connection is present, then 993 * ignore carrier changes. 994 */ 995 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 996 sc->sc_msr_dcd = 0; 997 else 998 sc->sc_msr_dcd = MSR_DCD; 999 /* 1000 * Set the flow control pins depending on the current flow control 1001 * mode. 1002 */ 1003 if (ISSET(t->c_cflag, CRTSCTS)) { 1004 sc->sc_mcr_dtr = MCR_DTR; 1005 sc->sc_mcr_rts = MCR_RTS; 1006 sc->sc_msr_cts = MSR_CTS; 1007 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1008 } else if (ISSET(t->c_cflag, MDMBUF)) { 1009 /* 1010 * For DTR/DCD flow control, make sure we don't toggle DTR for 1011 * carrier detection. 1012 */ 1013 sc->sc_mcr_dtr = 0; 1014 sc->sc_mcr_rts = MCR_DTR; 1015 sc->sc_msr_cts = MSR_DCD; 1016 sc->sc_efr = 0; 1017 } else { 1018 /* 1019 * If no flow control, then always set RTS. This will make 1020 * the other side happy if it mistakenly thinks we're doing 1021 * RTS/CTS flow control. 1022 */ 1023 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1024 sc->sc_mcr_rts = 0; 1025 sc->sc_msr_cts = 0; 1026 sc->sc_efr = 0; 1027 if (ISSET(sc->sc_mcr, MCR_DTR)) 1028 SET(sc->sc_mcr, MCR_RTS); 1029 else 1030 CLR(sc->sc_mcr, MCR_RTS); 1031 } 1032 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1033 1034 #if 0 1035 if (ospeed == 0) 1036 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1037 else 1038 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1039 #endif 1040 1041 sc->sc_dlbl = ospeed; 1042 sc->sc_dlbh = ospeed >> 8; 1043 1044 /* 1045 * Set the FIFO threshold based on the receive speed. 1046 * 1047 * * If it's a low speed, it's probably a mouse or some other 1048 * interactive device, so set the threshold low. 1049 * * If it's a high speed, trim the trigger level down to prevent 1050 * overflows. 1051 * * Otherwise set it a bit higher. 1052 */ 1053 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1054 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1055 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1056 sc->sc_fifo = FIFO_ENABLE | 1057 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1058 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1059 else 1060 sc->sc_fifo = 0; 1061 1062 /* and copy to tty */ 1063 tp->t_ispeed = 0; 1064 tp->t_ospeed = t->c_ospeed; 1065 tp->t_cflag = t->c_cflag; 1066 1067 if (!sc->sc_heldchange) { 1068 if (sc->sc_tx_busy) { 1069 sc->sc_heldtbc = sc->sc_tbc; 1070 sc->sc_tbc = 0; 1071 sc->sc_heldchange = 1; 1072 } else 1073 com_loadchannelregs(sc); 1074 } 1075 1076 if (!ISSET(t->c_cflag, CHWFLOW)) { 1077 /* Disable the high water mark. */ 1078 sc->sc_r_hiwat = 0; 1079 sc->sc_r_lowat = 0; 1080 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1081 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1082 com_schedrx(sc); 1083 } 1084 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1085 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1086 com_hwiflow(sc); 1087 } 1088 } else { 1089 sc->sc_r_hiwat = RXHIWAT; 1090 sc->sc_r_lowat = RXLOWAT; 1091 } 1092 1093 splx(s); 1094 1095 /* 1096 * Update the tty layer's idea of the carrier bit, in case we changed 1097 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1098 * explicit request. 1099 */ 1100 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1101 1102 #ifdef COM_DEBUG 1103 if (com_debug) 1104 comstatus(sc, "comparam "); 1105 #endif 1106 1107 /* Block or unblock as needed. */ 1108 if (!ISSET(t->c_cflag, CHWFLOW)) { 1109 if (sc->sc_tx_stopped) { 1110 sc->sc_tx_stopped = 0; 1111 comstart(tp); 1112 } 1113 } 1114 1115 return (0); 1116 } 1117 1118 void 1119 com_iflush(sc) 1120 struct com_softc *sc; 1121 { 1122 bus_space_tag_t iot = sc->sc_iot; 1123 bus_space_handle_t ioh = sc->sc_ioh; 1124 1125 /* flush any pending I/O */ 1126 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1127 (void) bus_space_read_1(iot, ioh, com_data); 1128 } 1129 1130 void 1131 com_loadchannelregs(sc) 1132 struct com_softc *sc; 1133 { 1134 bus_space_tag_t iot = sc->sc_iot; 1135 bus_space_handle_t ioh = sc->sc_ioh; 1136 1137 /* XXXXX necessary? */ 1138 com_iflush(sc); 1139 1140 bus_space_write_1(iot, ioh, com_ier, 0); 1141 1142 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1143 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1144 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1145 } 1146 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1147 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1148 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1149 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1150 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1151 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1152 1153 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1154 } 1155 1156 int 1157 comhwiflow(tp, block) 1158 struct tty *tp; 1159 int block; 1160 { 1161 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1162 int s; 1163 1164 if (sc->sc_mcr_rts == 0) 1165 return (0); 1166 1167 s = splserial(); 1168 if (block) { 1169 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1170 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1171 com_hwiflow(sc); 1172 } 1173 } else { 1174 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1175 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1176 com_schedrx(sc); 1177 } 1178 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1179 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1180 com_hwiflow(sc); 1181 } 1182 } 1183 splx(s); 1184 return (1); 1185 } 1186 1187 /* 1188 * (un)block input via hw flowcontrol 1189 */ 1190 void 1191 com_hwiflow(sc) 1192 struct com_softc *sc; 1193 { 1194 bus_space_tag_t iot = sc->sc_iot; 1195 bus_space_handle_t ioh = sc->sc_ioh; 1196 1197 if (sc->sc_mcr_rts == 0) 1198 return; 1199 1200 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1201 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1202 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1203 } else { 1204 SET(sc->sc_mcr, sc->sc_mcr_rts); 1205 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1206 } 1207 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1208 } 1209 1210 1211 void 1212 comstart(tp) 1213 struct tty *tp; 1214 { 1215 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1216 bus_space_tag_t iot = sc->sc_iot; 1217 bus_space_handle_t ioh = sc->sc_ioh; 1218 int s; 1219 1220 s = spltty(); 1221 if (ISSET(tp->t_state, TS_BUSY)) 1222 goto out; 1223 if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP)) 1224 goto stopped; 1225 1226 if (sc->sc_tx_stopped) 1227 goto stopped; 1228 1229 if (tp->t_outq.c_cc <= tp->t_lowat) { 1230 if (ISSET(tp->t_state, TS_ASLEEP)) { 1231 CLR(tp->t_state, TS_ASLEEP); 1232 wakeup(&tp->t_outq); 1233 } 1234 selwakeup(&tp->t_wsel); 1235 if (tp->t_outq.c_cc == 0) 1236 goto stopped; 1237 } 1238 1239 /* Grab the first contiguous region of buffer space. */ 1240 { 1241 u_char *tba; 1242 int tbc; 1243 1244 tba = tp->t_outq.c_cf; 1245 tbc = ndqb(&tp->t_outq, 0); 1246 1247 (void)splserial(); 1248 1249 sc->sc_tba = tba; 1250 sc->sc_tbc = tbc; 1251 } 1252 1253 SET(tp->t_state, TS_BUSY); 1254 sc->sc_tx_busy = 1; 1255 1256 /* Enable transmit completion interrupts if necessary. */ 1257 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1258 SET(sc->sc_ier, IER_ETXRDY); 1259 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1260 } 1261 1262 /* Output the first chunk of the contiguous buffer. */ 1263 { 1264 int n; 1265 1266 n = sc->sc_fifolen; 1267 if (n > sc->sc_tbc) 1268 n = sc->sc_tbc; 1269 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1270 sc->sc_tbc -= n; 1271 sc->sc_tba += n; 1272 } 1273 splx(s); 1274 return; 1275 1276 stopped: 1277 /* Disable transmit completion interrupts if necessary. */ 1278 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1279 CLR(sc->sc_ier, IER_ETXRDY); 1280 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1281 } 1282 out: 1283 splx(s); 1284 return; 1285 } 1286 1287 /* 1288 * Stop output on a line. 1289 */ 1290 void 1291 comstop(tp, flag) 1292 struct tty *tp; 1293 int flag; 1294 { 1295 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1296 int s; 1297 1298 s = splserial(); 1299 if (ISSET(tp->t_state, TS_BUSY)) { 1300 /* Stop transmitting at the next chunk. */ 1301 sc->sc_tbc = 0; 1302 sc->sc_heldtbc = 0; 1303 if (!ISSET(tp->t_state, TS_TTSTOP)) 1304 SET(tp->t_state, TS_FLUSH); 1305 } 1306 splx(s); 1307 } 1308 1309 void 1310 comdiag(arg) 1311 void *arg; 1312 { 1313 struct com_softc *sc = arg; 1314 int overflows, floods; 1315 int s; 1316 1317 s = splserial(); 1318 overflows = sc->sc_overflows; 1319 sc->sc_overflows = 0; 1320 floods = sc->sc_floods; 1321 sc->sc_floods = 0; 1322 sc->sc_errors = 0; 1323 splx(s); 1324 1325 log(LOG_WARNING, 1326 "%s: %d silo overflow%s, %d ibuf flood%s\n", 1327 sc->sc_dev.dv_xname, 1328 overflows, overflows == 1 ? "" : "s", 1329 floods, floods == 1 ? "" : "s"); 1330 } 1331 1332 integrate void 1333 comrxint(sc, tp) 1334 struct com_softc *sc; 1335 struct tty *tp; 1336 { 1337 u_int get, cc, scc; 1338 int code; 1339 u_char lsr; 1340 int s; 1341 static int lsrmap[8] = { 1342 0, TTY_PE, 1343 TTY_FE, TTY_PE|TTY_FE, 1344 TTY_FE, TTY_PE|TTY_FE, 1345 TTY_FE, TTY_PE|TTY_FE 1346 }; 1347 1348 get = sc->sc_rbget; 1349 scc = cc = RXBUFSIZE - sc->sc_rbavail; 1350 1351 if (cc == RXBUFSIZE) { 1352 sc->sc_floods++; 1353 if (sc->sc_errors++ == 0) 1354 timeout(comdiag, sc, 60 * hz); 1355 } 1356 1357 while (cc) { 1358 lsr = sc->sc_lbuf[get]; 1359 if (ISSET(lsr, LSR_OE)) { 1360 sc->sc_overflows++; 1361 if (sc->sc_errors++ == 0) 1362 timeout(comdiag, sc, 60 * hz); 1363 } 1364 code = sc->sc_rbuf[get] | 1365 lsrmap[(lsr & (LSR_BI|LSR_FE|LSR_PE)) >> 2]; 1366 if ((*linesw[tp->t_line].l_rint)(code, tp) == -1) { 1367 /* 1368 * The line discipline's buffer is out of space. 1369 */ 1370 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1371 /* 1372 * We're either not using flow control, or the 1373 * line discipline didn't tell us to block for 1374 * some reason. Either way, we have no way to 1375 * know when there's more space available, so 1376 * just drop the rest of the data. 1377 */ 1378 get = (get + cc) & RXBUFMASK; 1379 cc = 0; 1380 } else { 1381 /* 1382 * Don't schedule any more receive processing 1383 * until the line discipline tells us there's 1384 * space available (through comhwiflow()). 1385 * Leave the rest of the data in the input 1386 * buffer. 1387 */ 1388 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1389 } 1390 break; 1391 } 1392 get = (get + 1) & RXBUFMASK; 1393 cc--; 1394 } 1395 1396 if (cc != scc) { 1397 sc->sc_rbget = get; 1398 s = splserial(); 1399 cc = sc->sc_rbavail += scc - cc; 1400 /* Buffers should be ok again, release possible block. */ 1401 if (cc >= sc->sc_r_lowat) { 1402 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1403 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1404 SET(sc->sc_ier, IER_ERXRDY); 1405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1406 } 1407 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1408 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1409 com_hwiflow(sc); 1410 } 1411 } 1412 splx(s); 1413 } 1414 } 1415 1416 integrate void 1417 comtxint(sc, tp) 1418 struct com_softc *sc; 1419 struct tty *tp; 1420 { 1421 1422 CLR(tp->t_state, TS_BUSY); 1423 if (ISSET(tp->t_state, TS_FLUSH)) 1424 CLR(tp->t_state, TS_FLUSH); 1425 else 1426 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1427 (*linesw[tp->t_line].l_start)(tp); 1428 } 1429 1430 integrate void 1431 commsrint(sc, tp) 1432 struct com_softc *sc; 1433 struct tty *tp; 1434 { 1435 u_char msr, delta; 1436 int s; 1437 1438 s = splserial(); 1439 msr = sc->sc_msr; 1440 delta = sc->sc_msr_delta; 1441 sc->sc_msr_delta = 0; 1442 splx(s); 1443 1444 if (ISSET(delta, sc->sc_msr_dcd)) { 1445 /* 1446 * Inform the tty layer that carrier detect changed. 1447 */ 1448 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1449 } 1450 1451 if (ISSET(delta, sc->sc_msr_cts)) { 1452 /* Block or unblock output according to flow control. */ 1453 if (ISSET(msr, sc->sc_msr_cts)) { 1454 sc->sc_tx_stopped = 0; 1455 (*linesw[tp->t_line].l_start)(tp); 1456 } else { 1457 sc->sc_tx_stopped = 1; 1458 } 1459 } 1460 1461 #ifdef COM_DEBUG 1462 if (com_debug) 1463 comstatus(sc, "commsrint"); 1464 #endif 1465 } 1466 1467 #ifdef __GENERIC_SOFT_INTERRUPTS 1468 void 1469 comsoft(arg) 1470 void *arg; 1471 { 1472 struct com_softc *sc = arg; 1473 struct tty *tp; 1474 1475 { 1476 #else 1477 void 1478 #ifndef alpha 1479 comsoft() 1480 #else 1481 comsoft(arg) 1482 void *arg; 1483 #endif 1484 { 1485 struct com_softc *sc; 1486 struct tty *tp; 1487 int unit; 1488 #ifdef alpha 1489 int s; 1490 1491 s = splsoftserial(); 1492 com_softintr_scheduled = 0; 1493 #endif 1494 1495 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1496 sc = com_cd.cd_devs[unit]; 1497 if (sc == NULL) 1498 continue; 1499 1500 tp = sc->sc_tty; 1501 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1502 continue; 1503 #endif 1504 tp = sc->sc_tty; 1505 1506 if (sc->sc_rx_ready) { 1507 sc->sc_rx_ready = 0; 1508 comrxint(sc, tp); 1509 } 1510 1511 if (sc->sc_st_check) { 1512 sc->sc_st_check = 0; 1513 commsrint(sc, tp); 1514 } 1515 1516 if (sc->sc_tx_done) { 1517 sc->sc_tx_done = 0; 1518 comtxint(sc, tp); 1519 } 1520 } 1521 1522 #ifndef __GENERIC_SOFT_INTERRUPTS 1523 #ifdef alpha 1524 splx(s); 1525 #endif 1526 #endif 1527 } 1528 1529 int 1530 comintr(arg) 1531 void *arg; 1532 { 1533 struct com_softc *sc = arg; 1534 bus_space_tag_t iot = sc->sc_iot; 1535 bus_space_handle_t ioh = sc->sc_ioh; 1536 u_char lsr, iir; 1537 u_int put, cc; 1538 1539 iir = bus_space_read_1(iot, ioh, com_iir); 1540 if (ISSET(iir, IIR_NOPEND)) 1541 return (0); 1542 1543 put = sc->sc_rbput; 1544 cc = sc->sc_rbavail; 1545 1546 do { 1547 u_char msr, delta; 1548 1549 lsr = bus_space_read_1(iot, ioh, com_lsr); 1550 #if defined(DDB) || defined(KGDB) 1551 if (ISSET(lsr, LSR_BI)) { 1552 #ifdef DDB 1553 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1554 Debugger(); 1555 continue; 1556 } 1557 #endif 1558 #ifdef KGDB 1559 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1560 kgdb_connect(1); 1561 continue; 1562 } 1563 #endif 1564 } 1565 #endif /* DDB || KGDB */ 1566 1567 if (ISSET(lsr, LSR_RCV_MASK) && 1568 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1569 for (; ISSET(lsr, LSR_RCV_MASK) && cc > 0; cc--) { 1570 sc->sc_rbuf[put] = 1571 bus_space_read_1(iot, ioh, com_data); 1572 sc->sc_lbuf[put] = lsr; 1573 put = (put + 1) & RXBUFMASK; 1574 lsr = bus_space_read_1(iot, ioh, com_lsr); 1575 } 1576 /* 1577 * Current string of incoming characters ended because 1578 * no more data was available. Schedule a receive event 1579 * if any data was received. Drop any characters that 1580 * we couldn't handle. 1581 */ 1582 sc->sc_rbput = put; 1583 sc->sc_rbavail = cc; 1584 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1585 sc->sc_rx_ready = 1; 1586 /* 1587 * See if we are in danger of overflowing a buffer. If 1588 * so, use hardware flow control to ease the pressure. 1589 */ 1590 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1591 cc < sc->sc_r_hiwat) { 1592 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1593 com_hwiflow(sc); 1594 } 1595 /* 1596 * If we're out of space, disable receive interrupts 1597 * until the queue has drained a bit. 1598 */ 1599 if (!cc) { 1600 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1601 CLR(sc->sc_ier, IER_ERXRDY); 1602 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1603 } 1604 } else { 1605 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1606 bus_space_write_1(iot, ioh, com_ier, 0); 1607 delay(10); 1608 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1609 iir = IIR_NOPEND; 1610 continue; 1611 } 1612 } 1613 1614 msr = bus_space_read_1(iot, ioh, com_msr); 1615 delta = msr ^ sc->sc_msr; 1616 sc->sc_msr = msr; 1617 if (ISSET(delta, sc->sc_msr_mask)) { 1618 sc->sc_msr_delta |= delta; 1619 1620 /* 1621 * Stop output immediately if we lose the output 1622 * flow control signal or carrier detect. 1623 */ 1624 if (ISSET(~msr, sc->sc_msr_mask)) { 1625 sc->sc_tbc = 0; 1626 sc->sc_heldtbc = 0; 1627 #ifdef COM_DEBUG 1628 if (com_debug) 1629 comstatus(sc, "comintr "); 1630 #endif 1631 } 1632 1633 sc->sc_st_check = 1; 1634 } 1635 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1636 1637 /* 1638 * Done handling any receive interrupts. See if data can be 1639 * transmitted as well. Schedule tx done event if no data left 1640 * and tty was marked busy. 1641 */ 1642 if (ISSET(lsr, LSR_TXRDY)) { 1643 /* 1644 * If we've delayed a parameter change, do it now, and restart 1645 * output. 1646 */ 1647 if (sc->sc_heldchange) { 1648 com_loadchannelregs(sc); 1649 sc->sc_heldchange = 0; 1650 sc->sc_tbc = sc->sc_heldtbc; 1651 sc->sc_heldtbc = 0; 1652 } 1653 /* Output the next chunk of the contiguous buffer, if any. */ 1654 if (sc->sc_tbc > 0) { 1655 int n; 1656 1657 n = sc->sc_fifolen; 1658 if (n > sc->sc_tbc) 1659 n = sc->sc_tbc; 1660 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1661 sc->sc_tbc -= n; 1662 sc->sc_tba += n; 1663 } else if (sc->sc_tx_busy) { 1664 sc->sc_tx_busy = 0; 1665 sc->sc_tx_done = 1; 1666 } 1667 } 1668 1669 /* Wake up the poller. */ 1670 #ifdef __GENERIC_SOFT_INTERRUPTS 1671 softintr_schedule(sc->sc_si); 1672 #else 1673 #ifndef alpha 1674 setsoftserial(); 1675 #else 1676 if (!com_softintr_scheduled) { 1677 com_softintr_scheduled = 1; 1678 timeout(comsoft, NULL, 1); 1679 } 1680 #endif 1681 #endif 1682 1683 #if NRND > 0 && defined(RND_COM) 1684 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1685 #endif 1686 1687 return (1); 1688 } 1689 1690 /* 1691 * The following functions are polled getc and putc routines, shared 1692 * by the console and kgdb glue. 1693 */ 1694 1695 int 1696 com_common_getc(iot, ioh) 1697 bus_space_tag_t iot; 1698 bus_space_handle_t ioh; 1699 { 1700 int s = splserial(); 1701 u_char stat, c; 1702 1703 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1704 ; 1705 c = bus_space_read_1(iot, ioh, com_data); 1706 stat = bus_space_read_1(iot, ioh, com_iir); 1707 splx(s); 1708 return (c); 1709 } 1710 1711 void 1712 com_common_putc(iot, ioh, c) 1713 bus_space_tag_t iot; 1714 bus_space_handle_t ioh; 1715 int c; 1716 { 1717 int s = splserial(); 1718 u_char stat; 1719 register int timo; 1720 1721 /* wait for any pending transmission to finish */ 1722 timo = 50000; 1723 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1724 && --timo) 1725 ; 1726 bus_space_write_1(iot, ioh, com_data, c); 1727 /* wait for this transmission to complete */ 1728 timo = 1500000; 1729 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1730 && --timo) 1731 ; 1732 /* clear any interrupts generated by this transmission */ 1733 stat = bus_space_read_1(iot, ioh, com_iir); 1734 splx(s); 1735 } 1736 1737 /* 1738 * Initialize UART to known state. 1739 */ 1740 int 1741 cominit(iot, iobase, rate, frequency, cflag, iohp) 1742 bus_space_tag_t iot; 1743 int iobase; 1744 int rate, frequency; 1745 tcflag_t cflag; 1746 bus_space_handle_t *iohp; 1747 { 1748 bus_space_handle_t ioh; 1749 1750 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1751 return (ENOMEM); /* ??? */ 1752 1753 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1754 bus_space_write_1(iot, ioh, com_efr, 0); 1755 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1756 rate = comspeed(rate, frequency); 1757 bus_space_write_1(iot, ioh, com_dlbl, rate); 1758 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1759 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1760 bus_space_write_1(iot, ioh, com_mcr, 0); 1761 bus_space_write_1(iot, ioh, com_fifo, 1762 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1763 bus_space_write_1(iot, ioh, com_ier, 0); 1764 1765 *iohp = ioh; 1766 return (0); 1767 } 1768 1769 /* 1770 * Following are all routines needed for COM to act as console 1771 */ 1772 1773 int 1774 comcnattach(iot, iobase, rate, frequency, cflag) 1775 bus_space_tag_t iot; 1776 int iobase; 1777 int rate, frequency; 1778 tcflag_t cflag; 1779 { 1780 int res; 1781 static struct consdev comcons = { 1782 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 1783 }; 1784 1785 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1786 if (res) 1787 return (res); 1788 1789 cn_tab = &comcons; 1790 1791 comconstag = iot; 1792 comconsaddr = iobase; 1793 comconsrate = rate; 1794 comconscflag = cflag; 1795 1796 return (0); 1797 } 1798 1799 int 1800 comcngetc(dev) 1801 dev_t dev; 1802 { 1803 1804 return (com_common_getc(comconstag, comconsioh)); 1805 } 1806 1807 /* 1808 * Console kernel output character routine. 1809 */ 1810 void 1811 comcnputc(dev, c) 1812 dev_t dev; 1813 int c; 1814 { 1815 1816 com_common_putc(comconstag, comconsioh, c); 1817 } 1818 1819 void 1820 comcnpollc(dev, on) 1821 dev_t dev; 1822 int on; 1823 { 1824 1825 } 1826 1827 #ifdef KGDB 1828 int 1829 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1830 bus_space_tag_t iot; 1831 int iobase; 1832 int rate, frequency; 1833 tcflag_t cflag; 1834 { 1835 int res; 1836 1837 if (iot == comconstag && iobase == comconsaddr) 1838 return (EBUSY); /* cannot share with console */ 1839 1840 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1841 if (res) 1842 return (res); 1843 1844 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1845 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1846 1847 com_kgdb_iot = iot; 1848 com_kgdb_addr = iobase; 1849 1850 return (0); 1851 } 1852 1853 /* ARGSUSED */ 1854 int 1855 com_kgdb_getc(arg) 1856 void *arg; 1857 { 1858 1859 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1860 } 1861 1862 /* ARGSUSED */ 1863 void 1864 com_kgdb_putc(arg, c) 1865 void *arg; 1866 int c; 1867 { 1868 1869 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1870 } 1871 #endif /* KGDB */ 1872 1873 /* helper function to identify the com ports used by 1874 console or KGDB (and not yet autoconf attached) */ 1875 int 1876 com_is_console(iot, iobase, ioh) 1877 bus_space_tag_t iot; 1878 int iobase; 1879 bus_space_handle_t *ioh; 1880 { 1881 bus_space_handle_t help; 1882 1883 if (!comconsattached && 1884 iot == comconstag && iobase == comconsaddr) 1885 help = comconsioh; 1886 #ifdef KGDB 1887 else if (!com_kgdb_attached && 1888 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1889 help = com_kgdb_ioh; 1890 #endif 1891 else 1892 return (0); 1893 1894 if (ioh) 1895 *ioh = help; 1896 return (1); 1897 } 1898
Indexes created Mon Sep 22 10:09:38 GMT 2025