com.c revision 1.127
1 /* $NetBSD: com.c,v 1.127 1997/11/03 06:12:02 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 #include <sys/malloc.h> 96 97 #include <machine/intr.h> 98 #include <machine/bus.h> 99 100 #include <dev/ic/comreg.h> 101 #include <dev/ic/comvar.h> 102 #include <dev/ic/ns16550reg.h> 103 #include <dev/ic/st16650reg.h> 104 #ifdef COM_HAYESP 105 #include <dev/ic/hayespreg.h> 106 #endif 107 #define com_lcr com_cfcr 108 #include <dev/cons.h> 109 110 #include "com.h" 111 112 #ifdef COM_HAYESP 113 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 114 #endif 115 116 #if defined(DDB) || defined(KGDB) 117 static void com_enable_debugport __P((struct com_softc *)); 118 #endif 119 void com_attach_subr __P((struct com_softc *sc)); 120 int comspeed __P((long, long)); 121 static u_char cflag2lcr __P((tcflag_t)); 122 int comparam __P((struct tty *, struct termios *)); 123 void comstart __P((struct tty *)); 124 void comstop __P((struct tty *, int)); 125 int comhwiflow __P((struct tty *, int)); 126 127 void com_loadchannelregs __P((struct com_softc *)); 128 void com_hwiflow __P((struct com_softc *)); 129 void com_break __P((struct com_softc *, int)); 130 void com_modem __P((struct com_softc *, int)); 131 void com_iflush __P((struct com_softc *)); 132 133 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 134 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 135 136 /* XXX: These belong elsewhere */ 137 cdev_decl(com); 138 bdev_decl(com); 139 140 int comcngetc __P((dev_t)); 141 void comcnputc __P((dev_t, int)); 142 void comcnpollc __P((dev_t, int)); 143 144 #define integrate static inline 145 #ifdef __GENERIC_SOFT_INTERRUPTS 146 void comsoft __P((void *)); 147 #else 148 #ifndef alpha 149 void comsoft __P((void)); 150 #else 151 void comsoft __P((void *)); 152 #endif 153 #endif 154 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 155 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 156 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 157 integrate void com_schedrx __P((struct com_softc *)); 158 void comdiag __P((void *)); 159 160 161 struct cfdriver com_cd = { 162 NULL, "com", DV_TTY 163 }; 164 165 /* 166 * Make this an option variable one can patch. 167 * But be warned: this must be a power of 2! 168 */ 169 u_int com_rbuf_size = COM_RING_SIZE; 170 171 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 172 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 173 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 174 175 static int comconsaddr; 176 static bus_space_tag_t comconstag; 177 static bus_space_handle_t comconsioh; 178 static int comconsattached; 179 static int comconsrate; 180 static tcflag_t comconscflag; 181 182 static u_char tiocm_xxx2mcr __P((int)); 183 184 #ifndef __GENERIC_SOFT_INTERRUPTS 185 #ifdef alpha 186 volatile int com_softintr_scheduled; 187 #endif 188 #endif 189 190 #ifdef KGDB 191 #include <sys/kgdb.h> 192 193 static int com_kgdb_addr; 194 static bus_space_tag_t com_kgdb_iot; 195 static bus_space_handle_t com_kgdb_ioh; 196 static int com_kgdb_attached; 197 198 int com_kgdb_getc __P((void *)); 199 void com_kgdb_putc __P((void *, int)); 200 #endif /* KGDB */ 201 202 #define COMUNIT(x) (minor(x)) 203 204 int 205 comspeed(speed, frequency) 206 long speed, frequency; 207 { 208 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 209 210 int x, err; 211 212 #if 0 213 if (speed == 0) 214 return (0); 215 #endif 216 if (speed <= 0) 217 return (-1); 218 x = divrnd(frequency / 16, speed); 219 if (x <= 0) 220 return (-1); 221 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 222 if (err < 0) 223 err = -err; 224 if (err > COM_TOLERANCE) 225 return (-1); 226 return (x); 227 228 #undef divrnd(n, q) 229 } 230 231 #ifdef COM_DEBUG 232 int com_debug = 0; 233 234 void comstatus __P((struct com_softc *, char *)); 235 void 236 comstatus(sc, str) 237 struct com_softc *sc; 238 char *str; 239 { 240 struct tty *tp = sc->sc_tty; 241 242 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 243 sc->sc_dev.dv_xname, str, 244 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 245 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 246 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 247 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 248 sc->sc_tx_stopped ? "+" : "-"); 249 250 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 251 sc->sc_dev.dv_xname, str, 252 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 253 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 254 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 255 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 256 sc->sc_rx_flags); 257 } 258 #endif 259 260 int 261 comprobe1(iot, ioh, iobase) 262 bus_space_tag_t iot; 263 bus_space_handle_t ioh; 264 int iobase; 265 { 266 267 /* force access to id reg */ 268 bus_space_write_1(iot, ioh, com_lcr, 0); 269 bus_space_write_1(iot, ioh, com_iir, 0); 270 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 271 return (0); 272 273 return (1); 274 } 275 276 #ifdef COM_HAYESP 277 int 278 comprobeHAYESP(hayespioh, sc) 279 bus_space_handle_t hayespioh; 280 struct com_softc *sc; 281 { 282 char val, dips; 283 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 284 bus_space_tag_t iot = sc->sc_iot; 285 286 /* 287 * Hayes ESP cards have two iobases. One is for compatibility with 288 * 16550 serial chips, and at the same ISA PC base addresses. The 289 * other is for ESP-specific enhanced features, and lies at a 290 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 291 */ 292 293 /* Test for ESP signature */ 294 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 295 return (0); 296 297 /* 298 * ESP is present at ESP enhanced base address; unknown com port 299 */ 300 301 /* Get the dip-switch configurations */ 302 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 303 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 304 305 /* Determine which com port this ESP card services: bits 0,1 of */ 306 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 307 if (sc->sc_iobase != combaselist[dips & 0x03]) 308 return (0); 309 310 printf(": ESP"); 311 312 /* Check ESP Self Test bits. */ 313 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 314 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 315 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 316 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 317 if ((val & 0x70) < 0x20) { 318 printf("-old (%o)", val & 0x70); 319 /* we do not support the necessary features */ 320 return (0); 321 } 322 323 /* Check for ability to emulate 16550: bit 8 == 1 */ 324 if ((dips & 0x80) == 0) { 325 printf(" slave"); 326 /* XXX Does slave really mean no 16550 support?? */ 327 return (0); 328 } 329 330 /* 331 * If we made it this far, we are a full-featured ESP v2.0 (or 332 * better), at the correct com port address. 333 */ 334 335 SET(sc->sc_hwflags, COM_HW_HAYESP); 336 printf(", 1024 byte fifo\n"); 337 return (1); 338 } 339 #endif 340 341 #if defined(DDB) || defined(KGDB) 342 static void 343 com_enable_debugport(sc) 344 struct com_softc *sc; 345 { 346 int s; 347 348 /* Turn on line break interrupt, set carrier. */ 349 s = splserial(); 350 sc->sc_ier = IER_ERXRDY; 351 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 352 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 353 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 354 splx(s); 355 } 356 #endif 357 358 void 359 com_attach_subr(sc) 360 struct com_softc *sc; 361 { 362 int iobase = sc->sc_iobase; 363 bus_space_tag_t iot = sc->sc_iot; 364 bus_space_handle_t ioh = sc->sc_ioh; 365 struct tty *tp; 366 #ifdef COM16650 367 u_int8_t lcr; 368 #endif 369 #ifdef COM_HAYESP 370 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 371 int *hayespp; 372 #endif 373 374 /* Disable interrupts before configuring the device. */ 375 sc->sc_ier = 0; 376 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 377 378 if (iot == comconstag && iobase == comconsaddr) { 379 comconsattached = 1; 380 381 /* Make sure the console is always "hardwired". */ 382 delay(1000); /* wait for output to finish */ 383 SET(sc->sc_hwflags, COM_HW_CONSOLE); 384 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 385 } 386 387 #ifdef COM_HAYESP 388 /* Look for a Hayes ESP board. */ 389 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 390 bus_space_handle_t hayespioh; 391 392 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 393 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 394 continue; 395 if (comprobeHAYESP(hayespioh, sc)) { 396 sc->sc_hayespioh = hayespioh; 397 sc->sc_fifolen = 1024; 398 399 /* Set 16550 compatibility mode */ 400 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); 401 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 402 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 403 HAYESP_MODE_SCALE); 404 405 /* Set RTS/CTS flow control */ 406 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); 407 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); 408 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); 409 410 /* Set flow control levels */ 411 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); 412 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 413 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 414 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 415 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 416 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 417 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 418 bus_space_write_1(iot, hayespioh, HAYESP_CMD2, 419 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 420 421 break; 422 } 423 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 424 } 425 /* No ESP; look for other things. */ 426 if (*hayespp == 0) { 427 #endif 428 sc->sc_fifolen = 1; 429 /* look for a NS 16550AF UART with FIFOs */ 430 bus_space_write_1(iot, ioh, com_fifo, 431 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 432 delay(100); 433 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 434 == IIR_FIFO_MASK) 435 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 436 == FIFO_TRIGGER_14) { 437 SET(sc->sc_hwflags, COM_HW_FIFO); 438 439 #ifdef COM16650 440 /* 441 * IIR changes into the EFR if LCR is set to LCR_EERS 442 * on 16650s. We also know IIR != 0 at this point. 443 * Write 0 into the EFR, and read it. If the result 444 * is 0, we have a 16650. 445 * 446 * Older 16650s were broken; the test to detect them 447 * is taken from the Linux driver. Apparently 448 * setting DLAB enable gives access to the EFR on 449 * these chips. 450 */ 451 lcr = bus_space_read_1(iot, ioh, com_lcr); 452 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 453 bus_space_write_1(iot, ioh, com_efr, 0); 454 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 455 bus_space_write_1(iot, ioh, com_lcr, 456 lcr | LCR_DLAB); 457 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 458 CLR(sc->sc_hwflags, COM_HW_FIFO); 459 sc->sc_fifolen = 0; 460 } else { 461 SET(sc->sc_hwflags, COM_HW_FLOW); 462 sc->sc_fifolen = 32; 463 } 464 } else 465 #endif 466 sc->sc_fifolen = 16; 467 468 #ifdef COM16650 469 bus_space_write_1(iot, ioh, com_lcr, lcr); 470 if (sc->sc_fifolen == 0) 471 printf(": st16650, broken fifo\n"); 472 else if (sc->sc_fifolen == 32) 473 printf(": st16650a, working fifo\n"); 474 else 475 #endif 476 printf(": ns16550a, working fifo\n"); 477 } else 478 printf(": ns16550, broken fifo\n"); 479 else 480 printf(": ns8250 or ns16450, no fifo\n"); 481 bus_space_write_1(iot, ioh, com_fifo, 0); 482 #ifdef COM_HAYESP 483 } 484 #endif 485 486 tp = ttymalloc(); 487 tp->t_oproc = comstart; 488 tp->t_param = comparam; 489 tp->t_hwiflow = comhwiflow; 490 tty_attach(tp); 491 492 sc->sc_tty = tp; 493 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_WAITOK); 494 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 495 496 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 497 SET(sc->sc_mcr, MCR_IENABLE); 498 499 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 500 int maj; 501 502 /* locate the major number */ 503 for (maj = 0; maj < nchrdev; maj++) 504 if (cdevsw[maj].d_open == comopen) 505 break; 506 507 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 508 #ifdef DDB 509 com_enable_debugport(sc); 510 #endif 511 printf("%s: console\n", sc->sc_dev.dv_xname); 512 } 513 514 #ifdef KGDB 515 /* 516 * Allow kgdb to "take over" this port. If this is 517 * the kgdb device, it has exclusive use. 518 */ 519 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 520 com_kgdb_attached = 1; 521 522 SET(sc->sc_hwflags, COM_HW_KGDB); 523 com_enable_debugport(sc); 524 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 525 } 526 #endif 527 528 #ifdef __GENERIC_SOFT_INTERRUPTS 529 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 530 #endif 531 532 #if NRND > 0 && defined(RND_COM) 533 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 534 RND_TYPE_TTY); 535 #endif 536 } 537 538 int 539 comopen(dev, flag, mode, p) 540 dev_t dev; 541 int flag, mode; 542 struct proc *p; 543 { 544 int unit = COMUNIT(dev); 545 struct com_softc *sc; 546 struct tty *tp; 547 int s, s2; 548 int error = 0; 549 550 if (unit >= com_cd.cd_ndevs) 551 return (ENXIO); 552 sc = com_cd.cd_devs[unit]; 553 if (!sc) 554 return (ENXIO); 555 556 #ifdef KGDB 557 /* 558 * If this is the kgdb port, no other use is permitted. 559 */ 560 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 561 return (EBUSY); 562 #endif 563 564 tp = sc->sc_tty; 565 566 if (ISSET(tp->t_state, TS_ISOPEN) && 567 ISSET(tp->t_state, TS_XCLUDE) && 568 p->p_ucred->cr_uid != 0) 569 return (EBUSY); 570 571 s = spltty(); 572 573 /* We need to set this early for the benefit of comsoft(). */ 574 SET(tp->t_state, TS_WOPEN); 575 576 /* 577 * Do the following iff this is a first open. 578 */ 579 if (!ISSET(tp->t_state, TS_ISOPEN)) { 580 struct termios t; 581 582 tp->t_dev = dev; 583 584 s2 = splserial(); 585 586 /* Turn on interrupts. */ 587 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 588 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 589 590 /* Fetch the current modem control status, needed later. */ 591 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 592 593 splx(s2); 594 595 /* 596 * Initialize the termios status to the defaults. Add in the 597 * sticky bits from TIOCSFLAGS. 598 */ 599 t.c_ispeed = 0; 600 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 601 t.c_ospeed = comconsrate; 602 t.c_cflag = comconscflag; 603 } else { 604 t.c_ospeed = TTYDEF_SPEED; 605 t.c_cflag = TTYDEF_CFLAG; 606 } 607 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 608 SET(t.c_cflag, CLOCAL); 609 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 610 SET(t.c_cflag, CRTSCTS); 611 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 612 SET(t.c_cflag, MDMBUF); 613 (void) comparam(tp, &t); 614 tp->t_iflag = TTYDEF_IFLAG; 615 tp->t_oflag = TTYDEF_OFLAG; 616 tp->t_lflag = TTYDEF_LFLAG; 617 ttychars(tp); 618 ttsetwater(tp); 619 620 /* 621 * Turn on DTR. We must always do this, even if carrier is not 622 * present, because otherwise we'd have to use TIOCSDTR 623 * immediately after setting CLOCAL, which applications do not 624 * expect. We always assert DTR while the device is open 625 * unless explicitly requested to deassert it. 626 */ 627 com_modem(sc, 1); 628 629 s2 = splserial(); 630 631 /* Clear the input ring, and unblock. */ 632 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 633 sc->sc_rbavail = com_rbuf_size; 634 com_iflush(sc); 635 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 636 com_hwiflow(sc); 637 638 #ifdef COM_DEBUG 639 if (com_debug) 640 comstatus(sc, "comopen "); 641 #endif 642 643 splx(s2); 644 } 645 error = 0; 646 647 /* If we're doing a blocking open... */ 648 if (!ISSET(flag, O_NONBLOCK)) 649 /* ...then wait for carrier. */ 650 while (!ISSET(tp->t_state, TS_CARR_ON) && 651 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 652 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 653 ttopen, 0); 654 if (error) { 655 /* 656 * If the open was interrupted and nobody 657 * else has the device open, then hang up. 658 */ 659 if (!ISSET(tp->t_state, TS_ISOPEN)) { 660 com_modem(sc, 0); 661 CLR(tp->t_state, TS_WOPEN); 662 ttwakeup(tp); 663 } 664 break; 665 } 666 SET(tp->t_state, TS_WOPEN); 667 } 668 669 splx(s); 670 if (error == 0) 671 error = (*linesw[tp->t_line].l_open)(dev, tp); 672 return (error); 673 } 674 675 int 676 comclose(dev, flag, mode, p) 677 dev_t dev; 678 int flag, mode; 679 struct proc *p; 680 { 681 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 682 struct tty *tp = sc->sc_tty; 683 int s; 684 685 /* XXX This is for cons.c. */ 686 if (!ISSET(tp->t_state, TS_ISOPEN)) 687 return (0); 688 689 (*linesw[tp->t_line].l_close)(tp, flag); 690 ttyclose(tp); 691 692 s = splserial(); 693 694 /* If we were asserting flow control, then deassert it. */ 695 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 696 com_hwiflow(sc); 697 698 splx(s); 699 700 /* Clear any break condition set with TIOCSBRK. */ 701 com_break(sc, 0); 702 703 /* 704 * Hang up if necessary. Wait a bit, so the other side has time to 705 * notice even if we immediately open the port again. 706 */ 707 if (ISSET(tp->t_cflag, HUPCL)) { 708 com_modem(sc, 0); 709 (void) tsleep(sc, TTIPRI, ttclos, hz); 710 } 711 712 s = splserial(); 713 714 /* Turn off interrupts. */ 715 #ifdef DDB 716 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 717 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 718 else 719 #endif 720 sc->sc_ier = 0; 721 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 722 723 splx(s); 724 725 return (0); 726 } 727 728 int 729 comread(dev, uio, flag) 730 dev_t dev; 731 struct uio *uio; 732 int flag; 733 { 734 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 735 struct tty *tp = sc->sc_tty; 736 737 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 738 } 739 740 int 741 comwrite(dev, uio, flag) 742 dev_t dev; 743 struct uio *uio; 744 int flag; 745 { 746 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 747 struct tty *tp = sc->sc_tty; 748 749 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 750 } 751 752 struct tty * 753 comtty(dev) 754 dev_t dev; 755 { 756 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 757 struct tty *tp = sc->sc_tty; 758 759 return (tp); 760 } 761 762 static u_char 763 tiocm_xxx2mcr(data) 764 int data; 765 { 766 u_char m = 0; 767 768 if (ISSET(data, TIOCM_DTR)) 769 SET(m, MCR_DTR); 770 if (ISSET(data, TIOCM_RTS)) 771 SET(m, MCR_RTS); 772 return m; 773 } 774 775 int 776 comioctl(dev, cmd, data, flag, p) 777 dev_t dev; 778 u_long cmd; 779 caddr_t data; 780 int flag; 781 struct proc *p; 782 { 783 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 784 struct tty *tp = sc->sc_tty; 785 int error; 786 787 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 788 if (error >= 0) 789 return (error); 790 791 error = ttioctl(tp, cmd, data, flag, p); 792 if (error >= 0) 793 return (error); 794 795 switch (cmd) { 796 case TIOCSBRK: 797 com_break(sc, 1); 798 break; 799 800 case TIOCCBRK: 801 com_break(sc, 0); 802 break; 803 804 case TIOCSDTR: 805 com_modem(sc, 1); 806 break; 807 808 case TIOCCDTR: 809 com_modem(sc, 0); 810 break; 811 812 case TIOCGFLAGS: 813 *(int *)data = sc->sc_swflags; 814 break; 815 816 case TIOCSFLAGS: 817 error = suser(p->p_ucred, &p->p_acflag); 818 if (error) 819 return (error); 820 sc->sc_swflags = *(int *)data; 821 break; 822 823 case TIOCMSET: 824 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 825 /*FALLTHROUGH*/ 826 827 case TIOCMBIS: 828 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 829 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 830 break; 831 832 case TIOCMBIC: 833 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 834 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 835 break; 836 837 case TIOCMGET: { 838 u_char m; 839 int bits = 0; 840 841 m = sc->sc_mcr; 842 if (ISSET(m, MCR_DTR)) 843 SET(bits, TIOCM_DTR); 844 if (ISSET(m, MCR_RTS)) 845 SET(bits, TIOCM_RTS); 846 m = sc->sc_msr; 847 if (ISSET(m, MSR_DCD)) 848 SET(bits, TIOCM_CD); 849 if (ISSET(m, MSR_CTS)) 850 SET(bits, TIOCM_CTS); 851 if (ISSET(m, MSR_DSR)) 852 SET(bits, TIOCM_DSR); 853 if (ISSET(m, MSR_RI | MSR_TERI)) 854 SET(bits, TIOCM_RI); 855 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 856 SET(bits, TIOCM_LE); 857 *(int *)data = bits; 858 break; 859 } 860 default: 861 return (ENOTTY); 862 } 863 864 #ifdef COM_DEBUG 865 if (com_debug) 866 comstatus(sc, "comioctl "); 867 #endif 868 869 return (0); 870 } 871 872 integrate void 873 com_schedrx(sc) 874 struct com_softc *sc; 875 { 876 877 sc->sc_rx_ready = 1; 878 879 /* Wake up the poller. */ 880 #ifdef __GENERIC_SOFT_INTERRUPTS 881 softintr_schedule(sc->sc_si); 882 #else 883 #ifndef alpha 884 setsoftserial(); 885 #else 886 if (!com_softintr_scheduled) { 887 com_softintr_scheduled = 1; 888 timeout(comsoft, NULL, 1); 889 } 890 #endif 891 #endif 892 } 893 894 void 895 com_break(sc, onoff) 896 struct com_softc *sc; 897 int onoff; 898 { 899 int s; 900 901 s = splserial(); 902 if (onoff) 903 SET(sc->sc_lcr, LCR_SBREAK); 904 else 905 CLR(sc->sc_lcr, LCR_SBREAK); 906 907 if (!sc->sc_heldchange) { 908 if (sc->sc_tx_busy) { 909 sc->sc_heldtbc = sc->sc_tbc; 910 sc->sc_tbc = 0; 911 sc->sc_heldchange = 1; 912 } else 913 com_loadchannelregs(sc); 914 } 915 splx(s); 916 } 917 918 void 919 com_modem(sc, onoff) 920 struct com_softc *sc; 921 int onoff; 922 { 923 int s; 924 925 s = splserial(); 926 if (onoff) 927 SET(sc->sc_mcr, sc->sc_mcr_dtr); 928 else 929 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 930 931 if (!sc->sc_heldchange) { 932 if (sc->sc_tx_busy) { 933 sc->sc_heldtbc = sc->sc_tbc; 934 sc->sc_tbc = 0; 935 sc->sc_heldchange = 1; 936 } else 937 com_loadchannelregs(sc); 938 } 939 splx(s); 940 } 941 942 static u_char 943 cflag2lcr(cflag) 944 tcflag_t cflag; 945 { 946 u_char lcr = 0; 947 948 switch (ISSET(cflag, CSIZE)) { 949 case CS5: 950 SET(lcr, LCR_5BITS); 951 break; 952 case CS6: 953 SET(lcr, LCR_6BITS); 954 break; 955 case CS7: 956 SET(lcr, LCR_7BITS); 957 break; 958 case CS8: 959 SET(lcr, LCR_8BITS); 960 break; 961 } 962 if (ISSET(cflag, PARENB)) { 963 SET(lcr, LCR_PENAB); 964 if (!ISSET(cflag, PARODD)) 965 SET(lcr, LCR_PEVEN); 966 } 967 if (ISSET(cflag, CSTOPB)) 968 SET(lcr, LCR_STOPB); 969 970 return (lcr); 971 } 972 973 int 974 comparam(tp, t) 975 struct tty *tp; 976 struct termios *t; 977 { 978 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 979 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 980 u_char lcr; 981 int s; 982 983 /* Check requested parameters. */ 984 if (ospeed < 0) 985 return (EINVAL); 986 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 987 return (EINVAL); 988 989 /* 990 * For the console, always force CLOCAL and !HUPCL, so that the port 991 * is always active. 992 */ 993 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 994 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 995 SET(t->c_cflag, CLOCAL); 996 CLR(t->c_cflag, HUPCL); 997 } 998 999 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1000 1001 s = splserial(); 1002 1003 sc->sc_lcr = lcr; 1004 1005 /* 1006 * If we're not in a mode that assumes a connection is present, then 1007 * ignore carrier changes. 1008 */ 1009 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1010 sc->sc_msr_dcd = 0; 1011 else 1012 sc->sc_msr_dcd = MSR_DCD; 1013 /* 1014 * Set the flow control pins depending on the current flow control 1015 * mode. 1016 */ 1017 if (ISSET(t->c_cflag, CRTSCTS)) { 1018 sc->sc_mcr_dtr = MCR_DTR; 1019 sc->sc_mcr_rts = MCR_RTS; 1020 sc->sc_msr_cts = MSR_CTS; 1021 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1022 } else if (ISSET(t->c_cflag, MDMBUF)) { 1023 /* 1024 * For DTR/DCD flow control, make sure we don't toggle DTR for 1025 * carrier detection. 1026 */ 1027 sc->sc_mcr_dtr = 0; 1028 sc->sc_mcr_rts = MCR_DTR; 1029 sc->sc_msr_cts = MSR_DCD; 1030 sc->sc_efr = 0; 1031 } else { 1032 /* 1033 * If no flow control, then always set RTS. This will make 1034 * the other side happy if it mistakenly thinks we're doing 1035 * RTS/CTS flow control. 1036 */ 1037 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1038 sc->sc_mcr_rts = 0; 1039 sc->sc_msr_cts = 0; 1040 sc->sc_efr = 0; 1041 if (ISSET(sc->sc_mcr, MCR_DTR)) 1042 SET(sc->sc_mcr, MCR_RTS); 1043 else 1044 CLR(sc->sc_mcr, MCR_RTS); 1045 } 1046 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1047 1048 #if 0 1049 if (ospeed == 0) 1050 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1051 else 1052 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1053 #endif 1054 1055 sc->sc_dlbl = ospeed; 1056 sc->sc_dlbh = ospeed >> 8; 1057 1058 /* 1059 * Set the FIFO threshold based on the receive speed. 1060 * 1061 * * If it's a low speed, it's probably a mouse or some other 1062 * interactive device, so set the threshold low. 1063 * * If it's a high speed, trim the trigger level down to prevent 1064 * overflows. 1065 * * Otherwise set it a bit higher. 1066 */ 1067 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1068 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1069 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1070 sc->sc_fifo = FIFO_ENABLE | 1071 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1072 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1073 else 1074 sc->sc_fifo = 0; 1075 1076 /* And copy to tty. */ 1077 tp->t_ispeed = 0; 1078 tp->t_ospeed = t->c_ospeed; 1079 tp->t_cflag = t->c_cflag; 1080 1081 if (!sc->sc_heldchange) { 1082 if (sc->sc_tx_busy) { 1083 sc->sc_heldtbc = sc->sc_tbc; 1084 sc->sc_tbc = 0; 1085 sc->sc_heldchange = 1; 1086 } else 1087 com_loadchannelregs(sc); 1088 } 1089 1090 if (!ISSET(t->c_cflag, CHWFLOW)) { 1091 /* Disable the high water mark. */ 1092 sc->sc_r_hiwat = 0; 1093 sc->sc_r_lowat = 0; 1094 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1095 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1096 com_schedrx(sc); 1097 } 1098 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1099 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1100 com_hwiflow(sc); 1101 } 1102 } else { 1103 sc->sc_r_hiwat = com_rbuf_hiwat; 1104 sc->sc_r_lowat = com_rbuf_lowat; 1105 } 1106 1107 splx(s); 1108 1109 /* 1110 * Update the tty layer's idea of the carrier bit, in case we changed 1111 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1112 * explicit request. 1113 */ 1114 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1115 1116 #ifdef COM_DEBUG 1117 if (com_debug) 1118 comstatus(sc, "comparam "); 1119 #endif 1120 1121 if (!ISSET(t->c_cflag, CHWFLOW)) { 1122 if (sc->sc_tx_stopped) { 1123 sc->sc_tx_stopped = 0; 1124 comstart(tp); 1125 } 1126 } 1127 1128 return (0); 1129 } 1130 1131 void 1132 com_iflush(sc) 1133 struct com_softc *sc; 1134 { 1135 bus_space_tag_t iot = sc->sc_iot; 1136 bus_space_handle_t ioh = sc->sc_ioh; 1137 1138 /* flush any pending I/O */ 1139 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1140 (void) bus_space_read_1(iot, ioh, com_data); 1141 } 1142 1143 void 1144 com_loadchannelregs(sc) 1145 struct com_softc *sc; 1146 { 1147 bus_space_tag_t iot = sc->sc_iot; 1148 bus_space_handle_t ioh = sc->sc_ioh; 1149 1150 /* XXXXX necessary? */ 1151 com_iflush(sc); 1152 1153 bus_space_write_1(iot, ioh, com_ier, 0); 1154 1155 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1156 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1157 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1158 } 1159 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1160 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1161 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1162 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1163 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1164 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1165 1166 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1167 } 1168 1169 int 1170 comhwiflow(tp, block) 1171 struct tty *tp; 1172 int block; 1173 { 1174 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1175 int s; 1176 1177 if (sc->sc_mcr_rts == 0) 1178 return (0); 1179 1180 s = splserial(); 1181 if (block) { 1182 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1183 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1184 com_hwiflow(sc); 1185 } 1186 } else { 1187 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1188 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1189 com_schedrx(sc); 1190 } 1191 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1192 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1193 com_hwiflow(sc); 1194 } 1195 } 1196 splx(s); 1197 return (1); 1198 } 1199 1200 /* 1201 * (un)block input via hw flowcontrol 1202 */ 1203 void 1204 com_hwiflow(sc) 1205 struct com_softc *sc; 1206 { 1207 bus_space_tag_t iot = sc->sc_iot; 1208 bus_space_handle_t ioh = sc->sc_ioh; 1209 1210 if (sc->sc_mcr_rts == 0) 1211 return; 1212 1213 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1214 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1215 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1216 } else { 1217 SET(sc->sc_mcr, sc->sc_mcr_rts); 1218 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1219 } 1220 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1221 } 1222 1223 1224 void 1225 comstart(tp) 1226 struct tty *tp; 1227 { 1228 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1229 bus_space_tag_t iot = sc->sc_iot; 1230 bus_space_handle_t ioh = sc->sc_ioh; 1231 int s; 1232 1233 s = spltty(); 1234 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1235 goto out; 1236 if (sc->sc_tx_stopped) 1237 goto out; 1238 1239 if (tp->t_outq.c_cc <= tp->t_lowat) { 1240 if (ISSET(tp->t_state, TS_ASLEEP)) { 1241 CLR(tp->t_state, TS_ASLEEP); 1242 wakeup(&tp->t_outq); 1243 } 1244 selwakeup(&tp->t_wsel); 1245 if (tp->t_outq.c_cc == 0) 1246 goto out; 1247 } 1248 1249 /* Grab the first contiguous region of buffer space. */ 1250 { 1251 u_char *tba; 1252 int tbc; 1253 1254 tba = tp->t_outq.c_cf; 1255 tbc = ndqb(&tp->t_outq, 0); 1256 1257 (void)splserial(); 1258 1259 sc->sc_tba = tba; 1260 sc->sc_tbc = tbc; 1261 } 1262 1263 SET(tp->t_state, TS_BUSY); 1264 sc->sc_tx_busy = 1; 1265 1266 /* Enable transmit completion interrupts if necessary. */ 1267 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1268 SET(sc->sc_ier, IER_ETXRDY); 1269 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1270 } 1271 1272 /* Output the first chunk of the contiguous buffer. */ 1273 { 1274 int n; 1275 1276 n = sc->sc_tbc; 1277 if (n > sc->sc_fifolen) 1278 n = sc->sc_fifolen; 1279 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1280 sc->sc_tbc -= n; 1281 sc->sc_tba += n; 1282 } 1283 out: 1284 splx(s); 1285 return; 1286 } 1287 1288 /* 1289 * Stop output on a line. 1290 */ 1291 void 1292 comstop(tp, flag) 1293 struct tty *tp; 1294 int flag; 1295 { 1296 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1297 int s; 1298 1299 s = splserial(); 1300 if (ISSET(tp->t_state, TS_BUSY)) { 1301 /* Stop transmitting at the next chunk. */ 1302 sc->sc_tbc = 0; 1303 sc->sc_heldtbc = 0; 1304 if (!ISSET(tp->t_state, TS_TTSTOP)) 1305 SET(tp->t_state, TS_FLUSH); 1306 } 1307 splx(s); 1308 } 1309 1310 void 1311 comdiag(arg) 1312 void *arg; 1313 { 1314 struct com_softc *sc = arg; 1315 int overflows, floods; 1316 int s; 1317 1318 s = splserial(); 1319 overflows = sc->sc_overflows; 1320 sc->sc_overflows = 0; 1321 floods = sc->sc_floods; 1322 sc->sc_floods = 0; 1323 sc->sc_errors = 0; 1324 splx(s); 1325 1326 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1327 sc->sc_dev.dv_xname, 1328 overflows, overflows == 1 ? "" : "s", 1329 floods, floods == 1 ? "" : "s"); 1330 } 1331 1332 integrate void 1333 com_rxsoft(sc, tp) 1334 struct com_softc *sc; 1335 struct tty *tp; 1336 { 1337 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1338 u_char *get, *end; 1339 u_int cc, scc; 1340 u_char lsr; 1341 int code; 1342 int s; 1343 1344 end = sc->sc_ebuf; 1345 get = sc->sc_rbget; 1346 scc = cc = com_rbuf_size - sc->sc_rbavail; 1347 1348 if (cc == com_rbuf_size) { 1349 sc->sc_floods++; 1350 if (sc->sc_errors++ == 0) 1351 timeout(comdiag, sc, 60 * hz); 1352 } 1353 1354 while (cc) { 1355 lsr = get[1]; 1356 if (ISSET(lsr, LSR_OE)) { 1357 sc->sc_overflows++; 1358 if (sc->sc_errors++ == 0) 1359 timeout(comdiag, sc, 60 * hz); 1360 } 1361 code = get[0]; 1362 if (ISSET(lsr, LSR_BI | LSR_FE | LSR_PE)) { 1363 if (ISSET(lsr, LSR_BI | LSR_FE)) 1364 SET(code, TTY_FE); 1365 if (ISSET(lsr, LSR_PE)) 1366 SET(code, TTY_PE); 1367 } 1368 if ((*rint)(code, tp) == -1) { 1369 /* 1370 * The line discipline's buffer is out of space. 1371 */ 1372 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1373 /* 1374 * We're either not using flow control, or the 1375 * line discipline didn't tell us to block for 1376 * some reason. Either way, we have no way to 1377 * know when there's more space available, so 1378 * just drop the rest of the data. 1379 */ 1380 get += cc << 1; 1381 if (get >= end) 1382 get -= com_rbuf_size << 1; 1383 cc = 0; 1384 } else { 1385 /* 1386 * Don't schedule any more receive processing 1387 * until the line discipline tells us there's 1388 * space available (through comhwiflow()). 1389 * Leave the rest of the data in the input 1390 * buffer. 1391 */ 1392 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1393 } 1394 break; 1395 } 1396 get += 2; 1397 if (get >= end) 1398 get = sc->sc_rbuf; 1399 cc--; 1400 } 1401 1402 if (cc != scc) { 1403 sc->sc_rbget = get; 1404 s = splserial(); 1405 cc = sc->sc_rbavail += scc - cc; 1406 /* Buffers should be ok again, release possible block. */ 1407 if (cc >= sc->sc_r_lowat) { 1408 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1409 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1410 SET(sc->sc_ier, IER_ERXRDY); 1411 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1412 } 1413 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1414 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1415 com_hwiflow(sc); 1416 } 1417 } 1418 splx(s); 1419 } 1420 } 1421 1422 integrate void 1423 com_txsoft(sc, tp) 1424 struct com_softc *sc; 1425 struct tty *tp; 1426 { 1427 1428 CLR(tp->t_state, TS_BUSY); 1429 if (ISSET(tp->t_state, TS_FLUSH)) 1430 CLR(tp->t_state, TS_FLUSH); 1431 else 1432 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1433 (*linesw[tp->t_line].l_start)(tp); 1434 } 1435 1436 integrate void 1437 com_stsoft(sc, tp) 1438 struct com_softc *sc; 1439 struct tty *tp; 1440 { 1441 u_char msr, delta; 1442 int s; 1443 1444 s = splserial(); 1445 msr = sc->sc_msr; 1446 delta = sc->sc_msr_delta; 1447 sc->sc_msr_delta = 0; 1448 splx(s); 1449 1450 if (ISSET(delta, sc->sc_msr_dcd)) { 1451 /* 1452 * Inform the tty layer that carrier detect changed. 1453 */ 1454 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1455 } 1456 1457 if (ISSET(delta, sc->sc_msr_cts)) { 1458 /* Block or unblock output according to flow control. */ 1459 if (ISSET(msr, sc->sc_msr_cts)) { 1460 sc->sc_tx_stopped = 0; 1461 (*linesw[tp->t_line].l_start)(tp); 1462 } else { 1463 sc->sc_tx_stopped = 1; 1464 } 1465 } 1466 1467 #ifdef COM_DEBUG 1468 if (com_debug) 1469 comstatus(sc, "com_stsoft"); 1470 #endif 1471 } 1472 1473 #ifdef __GENERIC_SOFT_INTERRUPTS 1474 void 1475 comsoft(arg) 1476 void *arg; 1477 { 1478 struct com_softc *sc = arg; 1479 struct tty *tp; 1480 1481 { 1482 #else 1483 void 1484 #ifndef alpha 1485 comsoft() 1486 #else 1487 comsoft(arg) 1488 void *arg; 1489 #endif 1490 { 1491 struct com_softc *sc; 1492 struct tty *tp; 1493 int unit; 1494 #ifdef alpha 1495 int s; 1496 1497 s = splsoftserial(); 1498 com_softintr_scheduled = 0; 1499 #endif 1500 1501 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1502 sc = com_cd.cd_devs[unit]; 1503 if (sc == NULL) 1504 continue; 1505 1506 tp = sc->sc_tty; 1507 if (tp == NULL || !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1508 continue; 1509 #endif 1510 tp = sc->sc_tty; 1511 1512 if (sc->sc_rx_ready) { 1513 sc->sc_rx_ready = 0; 1514 com_rxsoft(sc, tp); 1515 } 1516 1517 if (sc->sc_st_check) { 1518 sc->sc_st_check = 0; 1519 com_stsoft(sc, tp); 1520 } 1521 1522 if (sc->sc_tx_done) { 1523 sc->sc_tx_done = 0; 1524 com_txsoft(sc, tp); 1525 } 1526 } 1527 1528 #ifndef __GENERIC_SOFT_INTERRUPTS 1529 #ifdef alpha 1530 splx(s); 1531 #endif 1532 #endif 1533 } 1534 1535 int 1536 comintr(arg) 1537 void *arg; 1538 { 1539 struct com_softc *sc = arg; 1540 bus_space_tag_t iot = sc->sc_iot; 1541 bus_space_handle_t ioh = sc->sc_ioh; 1542 u_char *put, *end; 1543 u_int cc; 1544 u_char lsr, iir; 1545 1546 iir = bus_space_read_1(iot, ioh, com_iir); 1547 if (ISSET(iir, IIR_NOPEND)) 1548 return (0); 1549 1550 end = sc->sc_ebuf; 1551 put = sc->sc_rbput; 1552 cc = sc->sc_rbavail; 1553 1554 do { 1555 u_char msr, delta; 1556 1557 lsr = bus_space_read_1(iot, ioh, com_lsr); 1558 #if defined(DDB) || defined(KGDB) 1559 if (ISSET(lsr, LSR_BI)) { 1560 #ifdef DDB 1561 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1562 Debugger(); 1563 continue; 1564 } 1565 #endif 1566 #ifdef KGDB 1567 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1568 kgdb_connect(1); 1569 continue; 1570 } 1571 #endif 1572 } 1573 #endif /* DDB || KGDB */ 1574 1575 if (ISSET(lsr, LSR_RCV_MASK) && 1576 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1577 while (cc > 0) { 1578 put[0] = bus_space_read_1(iot, ioh, com_data); 1579 put[1] = lsr; 1580 put += 2; 1581 if (put >= end) 1582 put = sc->sc_rbuf; 1583 cc--; 1584 1585 lsr = bus_space_read_1(iot, ioh, com_lsr); 1586 if (!ISSET(lsr, LSR_RCV_MASK)) 1587 break; 1588 } 1589 1590 /* 1591 * Current string of incoming characters ended because 1592 * no more data was available or we ran out of space. 1593 * Schedule a receive event if any data was received. 1594 * If we're out of space, turn off receive interrupts. 1595 */ 1596 sc->sc_rbput = put; 1597 sc->sc_rbavail = cc; 1598 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1599 sc->sc_rx_ready = 1; 1600 1601 /* 1602 * See if we are in danger of overflowing a buffer. If 1603 * so, use hardware flow control to ease the pressure. 1604 */ 1605 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1606 cc < sc->sc_r_hiwat) { 1607 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1608 com_hwiflow(sc); 1609 } 1610 1611 /* 1612 * If we're out of space, disable receive interrupts 1613 * until the queue has drained a bit. 1614 */ 1615 if (!cc) { 1616 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1617 CLR(sc->sc_ier, IER_ERXRDY); 1618 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1619 } 1620 } else { 1621 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1622 bus_space_write_1(iot, ioh, com_ier, 0); 1623 delay(10); 1624 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1625 iir = IIR_NOPEND; 1626 continue; 1627 } 1628 } 1629 1630 msr = bus_space_read_1(iot, ioh, com_msr); 1631 delta = msr ^ sc->sc_msr; 1632 sc->sc_msr = msr; 1633 if (ISSET(delta, sc->sc_msr_mask)) { 1634 SET(sc->sc_msr_delta, delta); 1635 1636 /* 1637 * Stop output immediately if we lose the output 1638 * flow control signal or carrier detect. 1639 */ 1640 if (ISSET(~msr, sc->sc_msr_mask)) { 1641 sc->sc_tbc = 0; 1642 sc->sc_heldtbc = 0; 1643 #ifdef COM_DEBUG 1644 if (com_debug) 1645 comstatus(sc, "comintr "); 1646 #endif 1647 } 1648 1649 sc->sc_st_check = 1; 1650 } 1651 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1652 1653 /* 1654 * Done handling any receive interrupts. See if data can be 1655 * transmitted as well. Schedule tx done event if no data left 1656 * and tty was marked busy. 1657 */ 1658 if (ISSET(lsr, LSR_TXRDY)) { 1659 /* 1660 * If we've delayed a parameter change, do it now, and restart 1661 * output. 1662 */ 1663 if (sc->sc_heldchange) { 1664 com_loadchannelregs(sc); 1665 sc->sc_heldchange = 0; 1666 sc->sc_tbc = sc->sc_heldtbc; 1667 sc->sc_heldtbc = 0; 1668 } 1669 1670 /* Output the next chunk of the contiguous buffer, if any. */ 1671 if (sc->sc_tbc > 0) { 1672 int n; 1673 1674 n = sc->sc_tbc; 1675 if (n > sc->sc_fifolen) 1676 n = sc->sc_fifolen; 1677 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1678 sc->sc_tbc -= n; 1679 sc->sc_tba += n; 1680 } else { 1681 /* Disable transmit completion interrupts if necessary. */ 1682 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1683 CLR(sc->sc_ier, IER_ETXRDY); 1684 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1685 } 1686 if (sc->sc_tx_busy) { 1687 sc->sc_tx_busy = 0; 1688 sc->sc_tx_done = 1; 1689 } 1690 } 1691 } 1692 1693 /* Wake up the poller. */ 1694 #ifdef __GENERIC_SOFT_INTERRUPTS 1695 softintr_schedule(sc->sc_si); 1696 #else 1697 #ifndef alpha 1698 setsoftserial(); 1699 #else 1700 if (!com_softintr_scheduled) { 1701 com_softintr_scheduled = 1; 1702 timeout(comsoft, NULL, 1); 1703 } 1704 #endif 1705 #endif 1706 1707 #if NRND > 0 && defined(RND_COM) 1708 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1709 #endif 1710 1711 return (1); 1712 } 1713 1714 /* 1715 * The following functions are polled getc and putc routines, shared 1716 * by the console and kgdb glue. 1717 */ 1718 1719 int 1720 com_common_getc(iot, ioh) 1721 bus_space_tag_t iot; 1722 bus_space_handle_t ioh; 1723 { 1724 int s = splserial(); 1725 u_char stat, c; 1726 1727 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1728 ; 1729 c = bus_space_read_1(iot, ioh, com_data); 1730 stat = bus_space_read_1(iot, ioh, com_iir); 1731 splx(s); 1732 return (c); 1733 } 1734 1735 void 1736 com_common_putc(iot, ioh, c) 1737 bus_space_tag_t iot; 1738 bus_space_handle_t ioh; 1739 int c; 1740 { 1741 int s = splserial(); 1742 u_char stat; 1743 int timo; 1744 1745 /* wait for any pending transmission to finish */ 1746 timo = 50000; 1747 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1748 && --timo) 1749 ; 1750 bus_space_write_1(iot, ioh, com_data, c); 1751 /* wait for this transmission to complete */ 1752 timo = 1500000; 1753 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1754 && --timo) 1755 ; 1756 /* clear any interrupts generated by this transmission */ 1757 stat = bus_space_read_1(iot, ioh, com_iir); 1758 splx(s); 1759 } 1760 1761 /* 1762 * Initialize UART to known state. 1763 */ 1764 int 1765 cominit(iot, iobase, rate, frequency, cflag, iohp) 1766 bus_space_tag_t iot; 1767 int iobase; 1768 int rate, frequency; 1769 tcflag_t cflag; 1770 bus_space_handle_t *iohp; 1771 { 1772 bus_space_handle_t ioh; 1773 1774 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1775 return (ENOMEM); /* ??? */ 1776 1777 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1778 bus_space_write_1(iot, ioh, com_efr, 0); 1779 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1780 rate = comspeed(rate, frequency); 1781 bus_space_write_1(iot, ioh, com_dlbl, rate); 1782 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1783 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1784 bus_space_write_1(iot, ioh, com_mcr, 0); 1785 bus_space_write_1(iot, ioh, com_fifo, 1786 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1787 bus_space_write_1(iot, ioh, com_ier, 0); 1788 1789 *iohp = ioh; 1790 return (0); 1791 } 1792 1793 /* 1794 * Following are all routines needed for COM to act as console 1795 */ 1796 1797 int 1798 comcnattach(iot, iobase, rate, frequency, cflag) 1799 bus_space_tag_t iot; 1800 int iobase; 1801 int rate, frequency; 1802 tcflag_t cflag; 1803 { 1804 int res; 1805 static struct consdev comcons = { 1806 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 1807 }; 1808 1809 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1810 if (res) 1811 return (res); 1812 1813 cn_tab = &comcons; 1814 1815 comconstag = iot; 1816 comconsaddr = iobase; 1817 comconsrate = rate; 1818 comconscflag = cflag; 1819 1820 return (0); 1821 } 1822 1823 int 1824 comcngetc(dev) 1825 dev_t dev; 1826 { 1827 1828 return (com_common_getc(comconstag, comconsioh)); 1829 } 1830 1831 /* 1832 * Console kernel output character routine. 1833 */ 1834 void 1835 comcnputc(dev, c) 1836 dev_t dev; 1837 int c; 1838 { 1839 1840 com_common_putc(comconstag, comconsioh, c); 1841 } 1842 1843 void 1844 comcnpollc(dev, on) 1845 dev_t dev; 1846 int on; 1847 { 1848 1849 } 1850 1851 #ifdef KGDB 1852 int 1853 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1854 bus_space_tag_t iot; 1855 int iobase; 1856 int rate, frequency; 1857 tcflag_t cflag; 1858 { 1859 int res; 1860 1861 if (iot == comconstag && iobase == comconsaddr) 1862 return (EBUSY); /* cannot share with console */ 1863 1864 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1865 if (res) 1866 return (res); 1867 1868 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1869 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1870 1871 com_kgdb_iot = iot; 1872 com_kgdb_addr = iobase; 1873 1874 return (0); 1875 } 1876 1877 /* ARGSUSED */ 1878 int 1879 com_kgdb_getc(arg) 1880 void *arg; 1881 { 1882 1883 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 1884 } 1885 1886 /* ARGSUSED */ 1887 void 1888 com_kgdb_putc(arg, c) 1889 void *arg; 1890 int c; 1891 { 1892 1893 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 1894 } 1895 #endif /* KGDB */ 1896 1897 /* helper function to identify the com ports used by 1898 console or KGDB (and not yet autoconf attached) */ 1899 int 1900 com_is_console(iot, iobase, ioh) 1901 bus_space_tag_t iot; 1902 int iobase; 1903 bus_space_handle_t *ioh; 1904 { 1905 bus_space_handle_t help; 1906 1907 if (!comconsattached && 1908 iot == comconstag && iobase == comconsaddr) 1909 help = comconsioh; 1910 #ifdef KGDB 1911 else if (!com_kgdb_attached && 1912 iot == com_kgdb_iot && iobase == com_kgdb_addr) 1913 help = com_kgdb_ioh; 1914 #endif 1915 else 1916 return (0); 1917 1918 if (ioh) 1919 *ioh = help; 1920 return (1); 1921 } 1922
Indexes created Wed Sep 24 22:09:59 GMT 2025