com.c revision 1.142
1 /* $NetBSD: com.c,v 1.142 1998/03/21 04:27:58 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997, 1998 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 #include <sys/malloc.h> 96 97 #include <machine/intr.h> 98 #include <machine/bus.h> 99 100 #include <dev/ic/comreg.h> 101 #include <dev/ic/comvar.h> 102 #include <dev/ic/ns16550reg.h> 103 #include <dev/ic/st16650reg.h> 104 #ifdef COM_HAYESP 105 #include <dev/ic/hayespreg.h> 106 #endif 107 #define com_lcr com_cfcr 108 #include <dev/cons.h> 109 110 #include "com.h" 111 112 #ifdef COM_HAYESP 113 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 114 #endif 115 116 #if defined(DDB) || defined(KGDB) 117 static void com_enable_debugport __P((struct com_softc *)); 118 #endif 119 void com_attach_subr __P((struct com_softc *sc)); 120 void com_config __P((struct com_softc *)); 121 void com_shutdown __P((struct com_softc *)); 122 int comspeed __P((long, long)); 123 static u_char cflag2lcr __P((tcflag_t)); 124 int comparam __P((struct tty *, struct termios *)); 125 void comstart __P((struct tty *)); 126 void comstop __P((struct tty *, int)); 127 int comhwiflow __P((struct tty *, int)); 128 129 void com_loadchannelregs __P((struct com_softc *)); 130 void com_hwiflow __P((struct com_softc *)); 131 void com_break __P((struct com_softc *, int)); 132 void com_modem __P((struct com_softc *, int)); 133 void com_iflush __P((struct com_softc *)); 134 135 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 136 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 137 138 /* XXX: These belong elsewhere */ 139 cdev_decl(com); 140 bdev_decl(com); 141 142 int comcngetc __P((dev_t)); 143 void comcnputc __P((dev_t, int)); 144 void comcnpollc __P((dev_t, int)); 145 146 #define integrate static inline 147 #ifdef __GENERIC_SOFT_INTERRUPTS 148 void comsoft __P((void *)); 149 #else 150 #ifndef __NO_SOFT_SERIAL_INTERRUPT 151 void comsoft __P((void)); 152 #else 153 void comsoft __P((void *)); 154 #endif 155 #endif 156 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 157 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 158 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 159 integrate void com_schedrx __P((struct com_softc *)); 160 void comdiag __P((void *)); 161 162 extern struct cfdriver com_cd; 163 164 /* 165 * Make this an option variable one can patch. 166 * But be warned: this must be a power of 2! 167 */ 168 u_int com_rbuf_size = COM_RING_SIZE; 169 170 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 171 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 172 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 173 174 static int comconsaddr; 175 static bus_space_tag_t comconstag; 176 static bus_space_handle_t comconsioh; 177 static int comconsattached; 178 static int comconsrate; 179 static tcflag_t comconscflag; 180 181 static u_char tiocm_xxx2mcr __P((int)); 182 183 #ifndef __GENERIC_SOFT_INTERRUPTS 184 #ifdef __NO_SOFT_SERIAL_INTERRUPT 185 volatile int com_softintr_scheduled; 186 #endif 187 #endif 188 189 #ifdef KGDB 190 #include <sys/kgdb.h> 191 192 static int com_kgdb_addr; 193 static bus_space_tag_t com_kgdb_iot; 194 static bus_space_handle_t com_kgdb_ioh; 195 static int com_kgdb_attached; 196 197 int com_kgdb_getc __P((void *)); 198 void com_kgdb_putc __P((void *, int)); 199 #endif /* KGDB */ 200 201 #define COMUNIT(x) (minor(x)) 202 203 int 204 comspeed(speed, frequency) 205 long speed, frequency; 206 { 207 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 208 209 int x, err; 210 211 #if 0 212 if (speed == 0) 213 return (0); 214 #endif 215 if (speed <= 0) 216 return (-1); 217 x = divrnd(frequency / 16, speed); 218 if (x <= 0) 219 return (-1); 220 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 221 if (err < 0) 222 err = -err; 223 if (err > COM_TOLERANCE) 224 return (-1); 225 return (x); 226 227 #undef divrnd(n, q) 228 } 229 230 #ifdef COM_DEBUG 231 int com_debug = 0; 232 233 void comstatus __P((struct com_softc *, char *)); 234 void 235 comstatus(sc, str) 236 struct com_softc *sc; 237 char *str; 238 { 239 struct tty *tp = sc->sc_tty; 240 241 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 242 sc->sc_dev.dv_xname, str, 243 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 244 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 245 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 246 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 247 sc->sc_tx_stopped ? "+" : "-"); 248 249 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 250 sc->sc_dev.dv_xname, str, 251 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 252 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 253 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 254 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 255 sc->sc_rx_flags); 256 } 257 #endif 258 259 int 260 comprobe1(iot, ioh, iobase) 261 bus_space_tag_t iot; 262 bus_space_handle_t ioh; 263 int iobase; 264 { 265 266 /* force access to id reg */ 267 bus_space_write_1(iot, ioh, com_lcr, 0); 268 bus_space_write_1(iot, ioh, com_iir, 0); 269 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 270 return (0); 271 272 return (1); 273 } 274 275 #ifdef COM_HAYESP 276 int 277 comprobeHAYESP(hayespioh, sc) 278 bus_space_handle_t hayespioh; 279 struct com_softc *sc; 280 { 281 char val, dips; 282 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 283 bus_space_tag_t iot = sc->sc_iot; 284 285 /* 286 * Hayes ESP cards have two iobases. One is for compatibility with 287 * 16550 serial chips, and at the same ISA PC base addresses. The 288 * other is for ESP-specific enhanced features, and lies at a 289 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 290 */ 291 292 /* Test for ESP signature */ 293 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 294 return (0); 295 296 /* 297 * ESP is present at ESP enhanced base address; unknown com port 298 */ 299 300 /* Get the dip-switch configurations */ 301 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 302 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 303 304 /* Determine which com port this ESP card services: bits 0,1 of */ 305 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 306 if (sc->sc_iobase != combaselist[dips & 0x03]) 307 return (0); 308 309 printf(": ESP"); 310 311 /* Check ESP Self Test bits. */ 312 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 313 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 314 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 315 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 316 if ((val & 0x70) < 0x20) { 317 printf("-old (%o)", val & 0x70); 318 /* we do not support the necessary features */ 319 return (0); 320 } 321 322 /* Check for ability to emulate 16550: bit 8 == 1 */ 323 if ((dips & 0x80) == 0) { 324 printf(" slave"); 325 /* XXX Does slave really mean no 16550 support?? */ 326 return (0); 327 } 328 329 /* 330 * If we made it this far, we are a full-featured ESP v2.0 (or 331 * better), at the correct com port address. 332 */ 333 334 SET(sc->sc_hwflags, COM_HW_HAYESP); 335 printf(", 1024 byte fifo\n"); 336 return (1); 337 } 338 #endif 339 340 #if defined(DDB) || defined(KGDB) 341 static void 342 com_enable_debugport(sc) 343 struct com_softc *sc; 344 { 345 int s; 346 347 /* Turn on line break interrupt, set carrier. */ 348 s = splserial(); 349 sc->sc_ier = IER_ERXRDY; 350 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 351 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 352 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 353 splx(s); 354 } 355 #endif 356 357 void 358 com_attach_subr(sc) 359 struct com_softc *sc; 360 { 361 int iobase = sc->sc_iobase; 362 bus_space_tag_t iot = sc->sc_iot; 363 bus_space_handle_t ioh = sc->sc_ioh; 364 struct tty *tp; 365 #ifdef COM16650 366 u_int8_t lcr; 367 #endif 368 #ifdef COM_HAYESP 369 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 370 int *hayespp; 371 #endif 372 373 /* Disable interrupts before configuring the device. */ 374 sc->sc_ier = 0; 375 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 376 377 if (iot == comconstag && iobase == comconsaddr) { 378 comconsattached = 1; 379 380 /* Make sure the console is always "hardwired". */ 381 delay(1000); /* wait for output to finish */ 382 SET(sc->sc_hwflags, COM_HW_CONSOLE); 383 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 384 } 385 386 #ifdef COM_HAYESP 387 /* Look for a Hayes ESP board. */ 388 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 389 bus_space_handle_t hayespioh; 390 391 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 392 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 393 continue; 394 if (comprobeHAYESP(hayespioh, sc)) { 395 sc->sc_hayespioh = hayespioh; 396 sc->sc_fifolen = 1024; 397 398 break; 399 } 400 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 401 } 402 /* No ESP; look for other things. */ 403 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 404 #endif 405 sc->sc_fifolen = 1; 406 /* look for a NS 16550AF UART with FIFOs */ 407 bus_space_write_1(iot, ioh, com_fifo, 408 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 409 delay(100); 410 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 411 == IIR_FIFO_MASK) 412 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 413 == FIFO_TRIGGER_14) { 414 SET(sc->sc_hwflags, COM_HW_FIFO); 415 416 #ifdef COM16650 417 /* 418 * IIR changes into the EFR if LCR is set to LCR_EERS 419 * on 16650s. We also know IIR != 0 at this point. 420 * Write 0 into the EFR, and read it. If the result 421 * is 0, we have a 16650. 422 * 423 * Older 16650s were broken; the test to detect them 424 * is taken from the Linux driver. Apparently 425 * setting DLAB enable gives access to the EFR on 426 * these chips. 427 */ 428 lcr = bus_space_read_1(iot, ioh, com_lcr); 429 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 430 bus_space_write_1(iot, ioh, com_efr, 0); 431 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 432 bus_space_write_1(iot, ioh, com_lcr, 433 lcr | LCR_DLAB); 434 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 435 CLR(sc->sc_hwflags, COM_HW_FIFO); 436 sc->sc_fifolen = 0; 437 } else { 438 SET(sc->sc_hwflags, COM_HW_FLOW); 439 sc->sc_fifolen = 32; 440 } 441 } else 442 #endif 443 sc->sc_fifolen = 16; 444 445 #ifdef COM16650 446 bus_space_write_1(iot, ioh, com_lcr, lcr); 447 if (sc->sc_fifolen == 0) 448 printf(": st16650, broken fifo\n"); 449 else if (sc->sc_fifolen == 32) 450 printf(": st16650a, working fifo\n"); 451 else 452 #endif 453 printf(": ns16550a, working fifo\n"); 454 } else 455 printf(": ns16550, broken fifo\n"); 456 else 457 printf(": ns8250 or ns16450, no fifo\n"); 458 bus_space_write_1(iot, ioh, com_fifo, 0); 459 #ifdef COM_HAYESP 460 } 461 #endif 462 463 tp = ttymalloc(); 464 tp->t_oproc = comstart; 465 tp->t_param = comparam; 466 tp->t_hwiflow = comhwiflow; 467 tty_attach(tp); 468 469 sc->sc_tty = tp; 470 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_WAITOK); 471 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 472 473 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 474 SET(sc->sc_mcr, MCR_IENABLE); 475 476 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 477 int maj; 478 479 /* locate the major number */ 480 for (maj = 0; maj < nchrdev; maj++) 481 if (cdevsw[maj].d_open == comopen) 482 break; 483 484 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 485 486 printf("%s: console\n", sc->sc_dev.dv_xname); 487 } 488 489 #ifdef KGDB 490 /* 491 * Allow kgdb to "take over" this port. If this is 492 * the kgdb device, it has exclusive use. 493 */ 494 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 495 com_kgdb_attached = 1; 496 497 SET(sc->sc_hwflags, COM_HW_KGDB); 498 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 499 } 500 #endif 501 502 #ifdef __GENERIC_SOFT_INTERRUPTS 503 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 504 #endif 505 506 #if NRND > 0 && defined(RND_COM) 507 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 508 RND_TYPE_TTY); 509 #endif 510 511 /* if there are no enable/disable functions, assume the device 512 is always enabled */ 513 if (!sc->enable) 514 sc->enabled = 1; 515 516 com_config(sc); 517 518 SET(sc->sc_hwflags, COM_HW_DEV_OK); 519 } 520 521 void 522 com_config(sc) 523 struct com_softc *sc; 524 { 525 bus_space_tag_t iot = sc->sc_iot; 526 bus_space_handle_t ioh = sc->sc_ioh; 527 528 /* Disable interrupts before configuring the device. */ 529 sc->sc_ier = 0; 530 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 531 532 #ifdef COM_HAYESP 533 /* Look for a Hayes ESP board. */ 534 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 535 sc->sc_fifolen = 1024; 536 537 /* Set 16550 compatibility mode */ 538 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 539 HAYESP_SETMODE); 540 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 541 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 542 HAYESP_MODE_SCALE); 543 544 /* Set RTS/CTS flow control */ 545 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 546 HAYESP_SETFLOWTYPE); 547 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 548 HAYESP_FLOW_RTS); 549 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 550 HAYESP_FLOW_CTS); 551 552 /* Set flow control levels */ 553 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 554 HAYESP_SETRXFLOW); 555 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 556 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 557 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 558 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 559 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 560 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 561 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 562 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 563 } 564 #endif 565 566 #ifdef DDB 567 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 568 com_enable_debugport(sc); 569 #endif 570 571 #ifdef KGDB 572 /* 573 * Allow kgdb to "take over" this port. If this is 574 * the kgdb device, it has exclusive use. 575 */ 576 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 577 com_enable_debugport(sc); 578 #endif 579 } 580 581 void 582 com_shutdown(sc) 583 struct com_softc *sc; 584 { 585 struct tty *tp = sc->sc_tty; 586 int s; 587 588 s = splserial(); 589 590 /* If we were asserting flow control, then deassert it. */ 591 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 592 com_hwiflow(sc); 593 594 /* Clear any break condition set with TIOCSBRK. */ 595 com_break(sc, 0); 596 597 /* 598 * Hang up if necessary. Wait a bit, so the other side has time to 599 * notice even if we immediately open the port again. 600 */ 601 if (ISSET(tp->t_cflag, HUPCL)) { 602 com_modem(sc, 0); 603 (void) tsleep(sc, TTIPRI, ttclos, hz); 604 } 605 606 /* Turn off interrupts. */ 607 #ifdef DDB 608 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 609 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 610 else 611 #endif 612 sc->sc_ier = 0; 613 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 614 615 if (sc->disable) { 616 #ifdef DIAGNOSTIC 617 if (!sc->enabled) 618 panic("com_shutdown: not enabled?"); 619 #endif 620 (*sc->disable)(sc); 621 sc->enabled = 0; 622 } 623 624 splx(s); 625 } 626 627 int 628 comopen(dev, flag, mode, p) 629 dev_t dev; 630 int flag, mode; 631 struct proc *p; 632 { 633 int unit = COMUNIT(dev); 634 struct com_softc *sc; 635 struct tty *tp; 636 int s, s2; 637 int error; 638 639 if (unit >= com_cd.cd_ndevs) 640 return (ENXIO); 641 sc = com_cd.cd_devs[unit]; 642 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 643 return (ENXIO); 644 645 #ifdef KGDB 646 /* 647 * If this is the kgdb port, no other use is permitted. 648 */ 649 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 650 return (EBUSY); 651 #endif 652 653 tp = sc->sc_tty; 654 655 if (ISSET(tp->t_state, TS_ISOPEN) && 656 ISSET(tp->t_state, TS_XCLUDE) && 657 p->p_ucred->cr_uid != 0) 658 return (EBUSY); 659 660 s = spltty(); 661 662 /* 663 * Do the following iff this is a first open. 664 */ 665 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 666 struct termios t; 667 668 tp->t_dev = dev; 669 670 s2 = splserial(); 671 672 if (sc->enable) { 673 if ((*sc->enable)(sc)) { 674 splx(s2); 675 splx(s); 676 printf("%s: device enable failed\n", 677 sc->sc_dev.dv_xname); 678 return (EIO); 679 } 680 sc->enabled = 1; 681 com_config(sc); 682 } 683 684 /* Turn on interrupts. */ 685 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 686 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 687 688 /* Fetch the current modem control status, needed later. */ 689 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 690 691 splx(s2); 692 693 /* 694 * Initialize the termios status to the defaults. Add in the 695 * sticky bits from TIOCSFLAGS. 696 */ 697 t.c_ispeed = 0; 698 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 699 t.c_ospeed = comconsrate; 700 t.c_cflag = comconscflag; 701 } else { 702 t.c_ospeed = TTYDEF_SPEED; 703 t.c_cflag = TTYDEF_CFLAG; 704 } 705 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 706 SET(t.c_cflag, CLOCAL); 707 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 708 SET(t.c_cflag, CRTSCTS); 709 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 710 SET(t.c_cflag, MDMBUF); 711 /* Make sure comparam() will do something. */ 712 tp->t_ospeed = 0; 713 (void) comparam(tp, &t); 714 tp->t_iflag = TTYDEF_IFLAG; 715 tp->t_oflag = TTYDEF_OFLAG; 716 tp->t_lflag = TTYDEF_LFLAG; 717 ttychars(tp); 718 ttsetwater(tp); 719 720 s2 = splserial(); 721 722 /* 723 * Turn on DTR. We must always do this, even if carrier is not 724 * present, because otherwise we'd have to use TIOCSDTR 725 * immediately after setting CLOCAL, which applications do not 726 * expect. We always assert DTR while the device is open 727 * unless explicitly requested to deassert it. 728 */ 729 com_modem(sc, 1); 730 731 /* Clear the input ring, and unblock. */ 732 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 733 sc->sc_rbavail = com_rbuf_size; 734 com_iflush(sc); 735 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 736 com_hwiflow(sc); 737 738 #ifdef COM_DEBUG 739 if (com_debug) 740 comstatus(sc, "comopen "); 741 #endif 742 743 splx(s2); 744 } 745 746 /* If we're doing a blocking open... */ 747 if (!ISSET(flag, O_NONBLOCK)) 748 /* ...then wait for carrier. */ 749 while (!ISSET(tp->t_state, TS_CARR_ON) && 750 !ISSET(tp->t_cflag, CLOCAL | MDMBUF)) { 751 tp->t_wopen++; 752 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 753 ttopen, 0); 754 tp->t_wopen--; 755 if (error) { 756 splx(s); 757 goto bad; 758 } 759 } 760 761 splx(s); 762 763 error = (*linesw[tp->t_line].l_open)(dev, tp); 764 if (error) 765 goto bad; 766 767 return (0); 768 769 bad: 770 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 771 /* 772 * We failed to open the device, and nobody else had it opened. 773 * Clean up the state as appropriate. 774 */ 775 com_shutdown(sc); 776 } 777 778 return (error); 779 } 780 781 int 782 comclose(dev, flag, mode, p) 783 dev_t dev; 784 int flag, mode; 785 struct proc *p; 786 { 787 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 788 struct tty *tp = sc->sc_tty; 789 790 /* XXX This is for cons.c. */ 791 if (!ISSET(tp->t_state, TS_ISOPEN)) 792 return (0); 793 794 (*linesw[tp->t_line].l_close)(tp, flag); 795 ttyclose(tp); 796 797 com_shutdown(sc); 798 799 return (0); 800 } 801 802 int 803 comread(dev, uio, flag) 804 dev_t dev; 805 struct uio *uio; 806 int flag; 807 { 808 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 809 struct tty *tp = sc->sc_tty; 810 811 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 812 } 813 814 int 815 comwrite(dev, uio, flag) 816 dev_t dev; 817 struct uio *uio; 818 int flag; 819 { 820 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 821 struct tty *tp = sc->sc_tty; 822 823 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 824 } 825 826 struct tty * 827 comtty(dev) 828 dev_t dev; 829 { 830 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 831 struct tty *tp = sc->sc_tty; 832 833 return (tp); 834 } 835 836 static u_char 837 tiocm_xxx2mcr(data) 838 int data; 839 { 840 u_char m = 0; 841 842 if (ISSET(data, TIOCM_DTR)) 843 SET(m, MCR_DTR); 844 if (ISSET(data, TIOCM_RTS)) 845 SET(m, MCR_RTS); 846 return m; 847 } 848 849 int 850 comioctl(dev, cmd, data, flag, p) 851 dev_t dev; 852 u_long cmd; 853 caddr_t data; 854 int flag; 855 struct proc *p; 856 { 857 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 858 struct tty *tp = sc->sc_tty; 859 int error; 860 int s; 861 862 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 863 if (error >= 0) 864 return (error); 865 866 error = ttioctl(tp, cmd, data, flag, p); 867 if (error >= 0) 868 return (error); 869 870 error = 0; 871 872 s = splserial(); 873 874 switch (cmd) { 875 case TIOCSBRK: 876 com_break(sc, 1); 877 break; 878 879 case TIOCCBRK: 880 com_break(sc, 0); 881 break; 882 883 case TIOCSDTR: 884 com_modem(sc, 1); 885 break; 886 887 case TIOCCDTR: 888 com_modem(sc, 0); 889 break; 890 891 case TIOCGFLAGS: 892 *(int *)data = sc->sc_swflags; 893 break; 894 895 case TIOCSFLAGS: 896 error = suser(p->p_ucred, &p->p_acflag); 897 if (error) 898 break; 899 sc->sc_swflags = *(int *)data; 900 break; 901 902 case TIOCMSET: 903 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 904 /*FALLTHROUGH*/ 905 906 case TIOCMBIS: 907 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 908 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 909 break; 910 911 case TIOCMBIC: 912 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 913 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 914 break; 915 916 case TIOCMGET: { 917 u_char m; 918 int bits = 0; 919 920 m = sc->sc_mcr; 921 if (ISSET(m, MCR_DTR)) 922 SET(bits, TIOCM_DTR); 923 if (ISSET(m, MCR_RTS)) 924 SET(bits, TIOCM_RTS); 925 m = sc->sc_msr; 926 if (ISSET(m, MSR_DCD)) 927 SET(bits, TIOCM_CD); 928 if (ISSET(m, MSR_CTS)) 929 SET(bits, TIOCM_CTS); 930 if (ISSET(m, MSR_DSR)) 931 SET(bits, TIOCM_DSR); 932 if (ISSET(m, MSR_RI | MSR_TERI)) 933 SET(bits, TIOCM_RI); 934 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 935 SET(bits, TIOCM_LE); 936 *(int *)data = bits; 937 break; 938 } 939 default: 940 error = ENOTTY; 941 break; 942 } 943 944 splx(s); 945 946 #ifdef COM_DEBUG 947 if (com_debug) 948 comstatus(sc, "comioctl "); 949 #endif 950 951 return (error); 952 } 953 954 integrate void 955 com_schedrx(sc) 956 struct com_softc *sc; 957 { 958 959 sc->sc_rx_ready = 1; 960 961 /* Wake up the poller. */ 962 #ifdef __GENERIC_SOFT_INTERRUPTS 963 softintr_schedule(sc->sc_si); 964 #else 965 #ifndef __NO_SOFT_SERIAL_INTERRUPT 966 setsoftserial(); 967 #else 968 if (!com_softintr_scheduled) { 969 com_softintr_scheduled = 1; 970 timeout(comsoft, NULL, 1); 971 } 972 #endif 973 #endif 974 } 975 976 void 977 com_break(sc, onoff) 978 struct com_softc *sc; 979 int onoff; 980 { 981 982 if (onoff) 983 SET(sc->sc_lcr, LCR_SBREAK); 984 else 985 CLR(sc->sc_lcr, LCR_SBREAK); 986 987 if (!sc->sc_heldchange) { 988 if (sc->sc_tx_busy) { 989 sc->sc_heldtbc = sc->sc_tbc; 990 sc->sc_tbc = 0; 991 sc->sc_heldchange = 1; 992 } else 993 com_loadchannelregs(sc); 994 } 995 } 996 997 void 998 com_modem(sc, onoff) 999 struct com_softc *sc; 1000 int onoff; 1001 { 1002 1003 if (onoff) 1004 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1005 else 1006 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1007 1008 if (!sc->sc_heldchange) { 1009 if (sc->sc_tx_busy) { 1010 sc->sc_heldtbc = sc->sc_tbc; 1011 sc->sc_tbc = 0; 1012 sc->sc_heldchange = 1; 1013 } else 1014 com_loadchannelregs(sc); 1015 } 1016 } 1017 1018 static u_char 1019 cflag2lcr(cflag) 1020 tcflag_t cflag; 1021 { 1022 u_char lcr = 0; 1023 1024 switch (ISSET(cflag, CSIZE)) { 1025 case CS5: 1026 SET(lcr, LCR_5BITS); 1027 break; 1028 case CS6: 1029 SET(lcr, LCR_6BITS); 1030 break; 1031 case CS7: 1032 SET(lcr, LCR_7BITS); 1033 break; 1034 case CS8: 1035 SET(lcr, LCR_8BITS); 1036 break; 1037 } 1038 if (ISSET(cflag, PARENB)) { 1039 SET(lcr, LCR_PENAB); 1040 if (!ISSET(cflag, PARODD)) 1041 SET(lcr, LCR_PEVEN); 1042 } 1043 if (ISSET(cflag, CSTOPB)) 1044 SET(lcr, LCR_STOPB); 1045 1046 return (lcr); 1047 } 1048 1049 int 1050 comparam(tp, t) 1051 struct tty *tp; 1052 struct termios *t; 1053 { 1054 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1055 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1056 u_char lcr; 1057 int s; 1058 1059 /* Check requested parameters. */ 1060 if (ospeed < 0) 1061 return (EINVAL); 1062 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1063 return (EINVAL); 1064 1065 /* 1066 * For the console, always force CLOCAL and !HUPCL, so that the port 1067 * is always active. 1068 */ 1069 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1070 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1071 SET(t->c_cflag, CLOCAL); 1072 CLR(t->c_cflag, HUPCL); 1073 } 1074 1075 /* 1076 * If there were no changes, don't do anything. This avoids dropping 1077 * input and improves performance when all we did was frob things like 1078 * VMIN and VTIME. 1079 */ 1080 if (tp->t_ospeed == t->c_ospeed && 1081 tp->t_cflag == t->c_cflag) 1082 return (0); 1083 1084 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1085 1086 s = splserial(); 1087 1088 sc->sc_lcr = lcr; 1089 1090 /* 1091 * If we're not in a mode that assumes a connection is present, then 1092 * ignore carrier changes. 1093 */ 1094 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1095 sc->sc_msr_dcd = 0; 1096 else 1097 sc->sc_msr_dcd = MSR_DCD; 1098 /* 1099 * Set the flow control pins depending on the current flow control 1100 * mode. 1101 */ 1102 if (ISSET(t->c_cflag, CRTSCTS)) { 1103 sc->sc_mcr_dtr = MCR_DTR; 1104 sc->sc_mcr_rts = MCR_RTS; 1105 sc->sc_msr_cts = MSR_CTS; 1106 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1107 } else if (ISSET(t->c_cflag, MDMBUF)) { 1108 /* 1109 * For DTR/DCD flow control, make sure we don't toggle DTR for 1110 * carrier detection. 1111 */ 1112 sc->sc_mcr_dtr = 0; 1113 sc->sc_mcr_rts = MCR_DTR; 1114 sc->sc_msr_cts = MSR_DCD; 1115 sc->sc_efr = 0; 1116 } else { 1117 /* 1118 * If no flow control, then always set RTS. This will make 1119 * the other side happy if it mistakenly thinks we're doing 1120 * RTS/CTS flow control. 1121 */ 1122 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1123 sc->sc_mcr_rts = 0; 1124 sc->sc_msr_cts = 0; 1125 sc->sc_efr = 0; 1126 if (ISSET(sc->sc_mcr, MCR_DTR)) 1127 SET(sc->sc_mcr, MCR_RTS); 1128 else 1129 CLR(sc->sc_mcr, MCR_RTS); 1130 } 1131 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1132 1133 #if 0 1134 if (ospeed == 0) 1135 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1136 else 1137 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1138 #endif 1139 1140 sc->sc_dlbl = ospeed; 1141 sc->sc_dlbh = ospeed >> 8; 1142 1143 /* 1144 * Set the FIFO threshold based on the receive speed. 1145 * 1146 * * If it's a low speed, it's probably a mouse or some other 1147 * interactive device, so set the threshold low. 1148 * * If it's a high speed, trim the trigger level down to prevent 1149 * overflows. 1150 * * Otherwise set it a bit higher. 1151 */ 1152 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1153 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1154 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1155 sc->sc_fifo = FIFO_ENABLE | 1156 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1157 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1158 else 1159 sc->sc_fifo = 0; 1160 1161 /* And copy to tty. */ 1162 tp->t_ispeed = 0; 1163 tp->t_ospeed = t->c_ospeed; 1164 tp->t_cflag = t->c_cflag; 1165 1166 if (!sc->sc_heldchange) { 1167 if (sc->sc_tx_busy) { 1168 sc->sc_heldtbc = sc->sc_tbc; 1169 sc->sc_tbc = 0; 1170 sc->sc_heldchange = 1; 1171 } else 1172 com_loadchannelregs(sc); 1173 } 1174 1175 if (!ISSET(t->c_cflag, CHWFLOW)) { 1176 /* Disable the high water mark. */ 1177 sc->sc_r_hiwat = 0; 1178 sc->sc_r_lowat = 0; 1179 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1180 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1181 com_schedrx(sc); 1182 } 1183 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1184 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1185 com_hwiflow(sc); 1186 } 1187 } else { 1188 sc->sc_r_hiwat = com_rbuf_hiwat; 1189 sc->sc_r_lowat = com_rbuf_lowat; 1190 } 1191 1192 splx(s); 1193 1194 /* 1195 * Update the tty layer's idea of the carrier bit, in case we changed 1196 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1197 * explicit request. 1198 */ 1199 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1200 1201 #ifdef COM_DEBUG 1202 if (com_debug) 1203 comstatus(sc, "comparam "); 1204 #endif 1205 1206 if (!ISSET(t->c_cflag, CHWFLOW)) { 1207 if (sc->sc_tx_stopped) { 1208 sc->sc_tx_stopped = 0; 1209 comstart(tp); 1210 } 1211 } 1212 1213 return (0); 1214 } 1215 1216 void 1217 com_iflush(sc) 1218 struct com_softc *sc; 1219 { 1220 bus_space_tag_t iot = sc->sc_iot; 1221 bus_space_handle_t ioh = sc->sc_ioh; 1222 #ifdef DIAGNOSTIC 1223 int reg; 1224 #endif 1225 int timo; 1226 1227 #ifdef DIAGNOSTIC 1228 reg = 0xffff; 1229 #endif 1230 timo = 50000; 1231 /* flush any pending I/O */ 1232 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1233 && --timo) 1234 #ifdef DIAGNOSTIC 1235 reg = 1236 #else 1237 (void) 1238 #endif 1239 bus_space_read_1(iot, ioh, com_data); 1240 #ifdef DIAGNOSTIC 1241 if (!timo) 1242 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1243 reg); 1244 #endif 1245 } 1246 1247 void 1248 com_loadchannelregs(sc) 1249 struct com_softc *sc; 1250 { 1251 bus_space_tag_t iot = sc->sc_iot; 1252 bus_space_handle_t ioh = sc->sc_ioh; 1253 1254 /* XXXXX necessary? */ 1255 com_iflush(sc); 1256 1257 bus_space_write_1(iot, ioh, com_ier, 0); 1258 1259 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1260 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1261 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1262 } 1263 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1264 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1265 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1266 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1267 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1268 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1269 1270 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1271 } 1272 1273 int 1274 comhwiflow(tp, block) 1275 struct tty *tp; 1276 int block; 1277 { 1278 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1279 int s; 1280 1281 if (sc->sc_mcr_rts == 0) 1282 return (0); 1283 1284 s = splserial(); 1285 if (block) { 1286 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1287 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1288 com_hwiflow(sc); 1289 } 1290 } else { 1291 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1292 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1293 com_schedrx(sc); 1294 } 1295 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1296 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1297 com_hwiflow(sc); 1298 } 1299 } 1300 splx(s); 1301 return (1); 1302 } 1303 1304 /* 1305 * (un)block input via hw flowcontrol 1306 */ 1307 void 1308 com_hwiflow(sc) 1309 struct com_softc *sc; 1310 { 1311 bus_space_tag_t iot = sc->sc_iot; 1312 bus_space_handle_t ioh = sc->sc_ioh; 1313 1314 if (sc->sc_mcr_rts == 0) 1315 return; 1316 1317 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1318 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1319 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1320 } else { 1321 SET(sc->sc_mcr, sc->sc_mcr_rts); 1322 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1323 } 1324 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1325 } 1326 1327 1328 void 1329 comstart(tp) 1330 struct tty *tp; 1331 { 1332 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1333 bus_space_tag_t iot = sc->sc_iot; 1334 bus_space_handle_t ioh = sc->sc_ioh; 1335 int s; 1336 1337 s = spltty(); 1338 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1339 goto out; 1340 if (sc->sc_tx_stopped) 1341 goto out; 1342 1343 if (tp->t_outq.c_cc <= tp->t_lowat) { 1344 if (ISSET(tp->t_state, TS_ASLEEP)) { 1345 CLR(tp->t_state, TS_ASLEEP); 1346 wakeup(&tp->t_outq); 1347 } 1348 selwakeup(&tp->t_wsel); 1349 if (tp->t_outq.c_cc == 0) 1350 goto out; 1351 } 1352 1353 /* Grab the first contiguous region of buffer space. */ 1354 { 1355 u_char *tba; 1356 int tbc; 1357 1358 tba = tp->t_outq.c_cf; 1359 tbc = ndqb(&tp->t_outq, 0); 1360 1361 (void)splserial(); 1362 1363 sc->sc_tba = tba; 1364 sc->sc_tbc = tbc; 1365 } 1366 1367 SET(tp->t_state, TS_BUSY); 1368 sc->sc_tx_busy = 1; 1369 1370 /* Enable transmit completion interrupts if necessary. */ 1371 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1372 SET(sc->sc_ier, IER_ETXRDY); 1373 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1374 } 1375 1376 /* Output the first chunk of the contiguous buffer. */ 1377 { 1378 int n; 1379 1380 n = sc->sc_tbc; 1381 if (n > sc->sc_fifolen) 1382 n = sc->sc_fifolen; 1383 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1384 sc->sc_tbc -= n; 1385 sc->sc_tba += n; 1386 } 1387 out: 1388 splx(s); 1389 return; 1390 } 1391 1392 /* 1393 * Stop output on a line. 1394 */ 1395 void 1396 comstop(tp, flag) 1397 struct tty *tp; 1398 int flag; 1399 { 1400 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1401 int s; 1402 1403 s = splserial(); 1404 if (ISSET(tp->t_state, TS_BUSY)) { 1405 /* Stop transmitting at the next chunk. */ 1406 sc->sc_tbc = 0; 1407 sc->sc_heldtbc = 0; 1408 if (!ISSET(tp->t_state, TS_TTSTOP)) 1409 SET(tp->t_state, TS_FLUSH); 1410 } 1411 splx(s); 1412 } 1413 1414 void 1415 comdiag(arg) 1416 void *arg; 1417 { 1418 struct com_softc *sc = arg; 1419 int overflows, floods; 1420 int s; 1421 1422 s = splserial(); 1423 overflows = sc->sc_overflows; 1424 sc->sc_overflows = 0; 1425 floods = sc->sc_floods; 1426 sc->sc_floods = 0; 1427 sc->sc_errors = 0; 1428 splx(s); 1429 1430 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1431 sc->sc_dev.dv_xname, 1432 overflows, overflows == 1 ? "" : "s", 1433 floods, floods == 1 ? "" : "s"); 1434 } 1435 1436 integrate void 1437 com_rxsoft(sc, tp) 1438 struct com_softc *sc; 1439 struct tty *tp; 1440 { 1441 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1442 u_char *get, *end; 1443 u_int cc, scc; 1444 u_char lsr; 1445 int code; 1446 int s; 1447 1448 end = sc->sc_ebuf; 1449 get = sc->sc_rbget; 1450 scc = cc = com_rbuf_size - sc->sc_rbavail; 1451 1452 if (cc == com_rbuf_size) { 1453 sc->sc_floods++; 1454 if (sc->sc_errors++ == 0) 1455 timeout(comdiag, sc, 60 * hz); 1456 } 1457 1458 while (cc) { 1459 code = get[0]; 1460 lsr = get[1]; 1461 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1462 if (ISSET(lsr, LSR_OE)) { 1463 sc->sc_overflows++; 1464 if (sc->sc_errors++ == 0) 1465 timeout(comdiag, sc, 60 * hz); 1466 } 1467 if (ISSET(lsr, LSR_BI | LSR_FE)) 1468 SET(code, TTY_FE); 1469 if (ISSET(lsr, LSR_PE)) 1470 SET(code, TTY_PE); 1471 } 1472 if ((*rint)(code, tp) == -1) { 1473 /* 1474 * The line discipline's buffer is out of space. 1475 */ 1476 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1477 /* 1478 * We're either not using flow control, or the 1479 * line discipline didn't tell us to block for 1480 * some reason. Either way, we have no way to 1481 * know when there's more space available, so 1482 * just drop the rest of the data. 1483 */ 1484 get += cc << 1; 1485 if (get >= end) 1486 get -= com_rbuf_size << 1; 1487 cc = 0; 1488 } else { 1489 /* 1490 * Don't schedule any more receive processing 1491 * until the line discipline tells us there's 1492 * space available (through comhwiflow()). 1493 * Leave the rest of the data in the input 1494 * buffer. 1495 */ 1496 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1497 } 1498 break; 1499 } 1500 get += 2; 1501 if (get >= end) 1502 get = sc->sc_rbuf; 1503 cc--; 1504 } 1505 1506 if (cc != scc) { 1507 sc->sc_rbget = get; 1508 s = splserial(); 1509 cc = sc->sc_rbavail += scc - cc; 1510 /* Buffers should be ok again, release possible block. */ 1511 if (cc >= sc->sc_r_lowat) { 1512 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1513 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1514 SET(sc->sc_ier, IER_ERXRDY); 1515 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1516 } 1517 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1518 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1519 com_hwiflow(sc); 1520 } 1521 } 1522 splx(s); 1523 } 1524 } 1525 1526 integrate void 1527 com_txsoft(sc, tp) 1528 struct com_softc *sc; 1529 struct tty *tp; 1530 { 1531 1532 CLR(tp->t_state, TS_BUSY); 1533 if (ISSET(tp->t_state, TS_FLUSH)) 1534 CLR(tp->t_state, TS_FLUSH); 1535 else 1536 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1537 (*linesw[tp->t_line].l_start)(tp); 1538 } 1539 1540 integrate void 1541 com_stsoft(sc, tp) 1542 struct com_softc *sc; 1543 struct tty *tp; 1544 { 1545 u_char msr, delta; 1546 int s; 1547 1548 s = splserial(); 1549 msr = sc->sc_msr; 1550 delta = sc->sc_msr_delta; 1551 sc->sc_msr_delta = 0; 1552 splx(s); 1553 1554 if (ISSET(delta, sc->sc_msr_dcd)) { 1555 /* 1556 * Inform the tty layer that carrier detect changed. 1557 */ 1558 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1559 } 1560 1561 if (ISSET(delta, sc->sc_msr_cts)) { 1562 /* Block or unblock output according to flow control. */ 1563 if (ISSET(msr, sc->sc_msr_cts)) { 1564 sc->sc_tx_stopped = 0; 1565 (*linesw[tp->t_line].l_start)(tp); 1566 } else { 1567 sc->sc_tx_stopped = 1; 1568 } 1569 } 1570 1571 #ifdef COM_DEBUG 1572 if (com_debug) 1573 comstatus(sc, "com_stsoft"); 1574 #endif 1575 } 1576 1577 #ifdef __GENERIC_SOFT_INTERRUPTS 1578 void 1579 comsoft(arg) 1580 void *arg; 1581 { 1582 struct com_softc *sc = arg; 1583 struct tty *tp; 1584 1585 if (!sc->enabled) 1586 return; 1587 1588 { 1589 #else 1590 void 1591 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1592 comsoft() 1593 #else 1594 comsoft(arg) 1595 void *arg; 1596 #endif 1597 { 1598 struct com_softc *sc; 1599 struct tty *tp; 1600 int unit; 1601 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1602 int s; 1603 1604 s = splsoftserial(); 1605 com_softintr_scheduled = 0; 1606 #endif 1607 1608 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1609 sc = com_cd.cd_devs[unit]; 1610 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1611 continue; 1612 1613 if (!sc->enabled) 1614 continue; 1615 1616 tp = sc->sc_tty; 1617 if (tp == NULL) 1618 continue; 1619 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1620 continue; 1621 #endif 1622 tp = sc->sc_tty; 1623 1624 if (sc->sc_rx_ready) { 1625 sc->sc_rx_ready = 0; 1626 com_rxsoft(sc, tp); 1627 } 1628 1629 if (sc->sc_st_check) { 1630 sc->sc_st_check = 0; 1631 com_stsoft(sc, tp); 1632 } 1633 1634 if (sc->sc_tx_done) { 1635 sc->sc_tx_done = 0; 1636 com_txsoft(sc, tp); 1637 } 1638 } 1639 1640 #ifndef __GENERIC_SOFT_INTERRUPTS 1641 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1642 splx(s); 1643 #endif 1644 #endif 1645 } 1646 1647 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1648 /* there has got to be a better way to do comsoft() */ 1649 }} 1650 #endif 1651 1652 int 1653 comintr(arg) 1654 void *arg; 1655 { 1656 struct com_softc *sc = arg; 1657 bus_space_tag_t iot = sc->sc_iot; 1658 bus_space_handle_t ioh = sc->sc_ioh; 1659 u_char *put, *end; 1660 u_int cc; 1661 u_char lsr, iir; 1662 1663 if (!sc->enabled) 1664 return (0); 1665 1666 iir = bus_space_read_1(iot, ioh, com_iir); 1667 if (ISSET(iir, IIR_NOPEND)) 1668 return (0); 1669 1670 end = sc->sc_ebuf; 1671 put = sc->sc_rbput; 1672 cc = sc->sc_rbavail; 1673 1674 do { 1675 u_char msr, delta; 1676 1677 lsr = bus_space_read_1(iot, ioh, com_lsr); 1678 #if defined(DDB) || defined(KGDB) 1679 if (ISSET(lsr, LSR_BI)) { 1680 #ifdef DDB 1681 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1682 Debugger(); 1683 continue; 1684 } 1685 #endif 1686 #ifdef KGDB 1687 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1688 kgdb_connect(1); 1689 continue; 1690 } 1691 #endif 1692 } 1693 #endif /* DDB || KGDB */ 1694 1695 if (ISSET(lsr, LSR_RCV_MASK) && 1696 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1697 while (cc > 0) { 1698 put[0] = bus_space_read_1(iot, ioh, com_data); 1699 put[1] = lsr; 1700 put += 2; 1701 if (put >= end) 1702 put = sc->sc_rbuf; 1703 cc--; 1704 1705 lsr = bus_space_read_1(iot, ioh, com_lsr); 1706 if (!ISSET(lsr, LSR_RCV_MASK)) 1707 break; 1708 } 1709 1710 /* 1711 * Current string of incoming characters ended because 1712 * no more data was available or we ran out of space. 1713 * Schedule a receive event if any data was received. 1714 * If we're out of space, turn off receive interrupts. 1715 */ 1716 sc->sc_rbput = put; 1717 sc->sc_rbavail = cc; 1718 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1719 sc->sc_rx_ready = 1; 1720 1721 /* 1722 * See if we are in danger of overflowing a buffer. If 1723 * so, use hardware flow control to ease the pressure. 1724 */ 1725 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1726 cc < sc->sc_r_hiwat) { 1727 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1728 com_hwiflow(sc); 1729 } 1730 1731 /* 1732 * If we're out of space, disable receive interrupts 1733 * until the queue has drained a bit. 1734 */ 1735 if (!cc) { 1736 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1737 CLR(sc->sc_ier, IER_ERXRDY); 1738 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1739 } 1740 } else { 1741 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1742 bus_space_write_1(iot, ioh, com_ier, 0); 1743 delay(10); 1744 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1745 iir = IIR_NOPEND; 1746 continue; 1747 } 1748 } 1749 1750 msr = bus_space_read_1(iot, ioh, com_msr); 1751 delta = msr ^ sc->sc_msr; 1752 sc->sc_msr = msr; 1753 if (ISSET(delta, sc->sc_msr_mask)) { 1754 SET(sc->sc_msr_delta, delta); 1755 1756 /* 1757 * Stop output immediately if we lose the output 1758 * flow control signal or carrier detect. 1759 */ 1760 if (ISSET(~msr, sc->sc_msr_mask)) { 1761 sc->sc_tbc = 0; 1762 sc->sc_heldtbc = 0; 1763 #ifdef COM_DEBUG 1764 if (com_debug) 1765 comstatus(sc, "comintr "); 1766 #endif 1767 } 1768 1769 sc->sc_st_check = 1; 1770 } 1771 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1772 1773 /* 1774 * Done handling any receive interrupts. See if data can be 1775 * transmitted as well. Schedule tx done event if no data left 1776 * and tty was marked busy. 1777 */ 1778 if (ISSET(lsr, LSR_TXRDY)) { 1779 /* 1780 * If we've delayed a parameter change, do it now, and restart 1781 * output. 1782 */ 1783 if (sc->sc_heldchange) { 1784 com_loadchannelregs(sc); 1785 sc->sc_heldchange = 0; 1786 sc->sc_tbc = sc->sc_heldtbc; 1787 sc->sc_heldtbc = 0; 1788 } 1789 1790 /* Output the next chunk of the contiguous buffer, if any. */ 1791 if (sc->sc_tbc > 0) { 1792 int n; 1793 1794 n = sc->sc_tbc; 1795 if (n > sc->sc_fifolen) 1796 n = sc->sc_fifolen; 1797 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1798 sc->sc_tbc -= n; 1799 sc->sc_tba += n; 1800 } else { 1801 /* Disable transmit completion interrupts if necessary. */ 1802 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1803 CLR(sc->sc_ier, IER_ETXRDY); 1804 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1805 } 1806 if (sc->sc_tx_busy) { 1807 sc->sc_tx_busy = 0; 1808 sc->sc_tx_done = 1; 1809 } 1810 } 1811 } 1812 1813 /* Wake up the poller. */ 1814 #ifdef __GENERIC_SOFT_INTERRUPTS 1815 softintr_schedule(sc->sc_si); 1816 #else 1817 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1818 setsoftserial(); 1819 #else 1820 if (!com_softintr_scheduled) { 1821 com_softintr_scheduled = 1; 1822 timeout(comsoft, NULL, 1); 1823 } 1824 #endif 1825 #endif 1826 1827 #if NRND > 0 && defined(RND_COM) 1828 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1829 #endif 1830 1831 return (1); 1832 } 1833 1834 /* 1835 * The following functions are polled getc and putc routines, shared 1836 * by the console and kgdb glue. 1837 */ 1838 1839 int 1840 com_common_getc(iot, ioh) 1841 bus_space_tag_t iot; 1842 bus_space_handle_t ioh; 1843 { 1844 int s = splserial(); 1845 u_char stat, c; 1846 1847 /* block until a character becomes available */ 1848 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 1849 ; 1850 1851 c = bus_space_read_1(iot, ioh, com_data); 1852 stat = bus_space_read_1(iot, ioh, com_iir); 1853 splx(s); 1854 return (c); 1855 } 1856 1857 void 1858 com_common_putc(iot, ioh, c) 1859 bus_space_tag_t iot; 1860 bus_space_handle_t ioh; 1861 int c; 1862 { 1863 int s = splserial(); 1864 u_char stat; 1865 int timo; 1866 1867 /* wait for any pending transmission to finish */ 1868 timo = 50000; 1869 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1870 && --timo) 1871 ; 1872 1873 bus_space_write_1(iot, ioh, com_data, c); 1874 /* wait for this transmission to complete */ 1875 timo = 1500000; 1876 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 1877 && --timo) 1878 ; 1879 1880 /* clear any interrupts generated by this transmission */ 1881 stat = bus_space_read_1(iot, ioh, com_iir); 1882 splx(s); 1883 } 1884 1885 /* 1886 * Initialize UART to known state. 1887 */ 1888 int 1889 cominit(iot, iobase, rate, frequency, cflag, iohp) 1890 bus_space_tag_t iot; 1891 int iobase; 1892 int rate, frequency; 1893 tcflag_t cflag; 1894 bus_space_handle_t *iohp; 1895 { 1896 bus_space_handle_t ioh; 1897 1898 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 1899 return (ENOMEM); /* ??? */ 1900 1901 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1902 bus_space_write_1(iot, ioh, com_efr, 0); 1903 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 1904 rate = comspeed(rate, frequency); 1905 bus_space_write_1(iot, ioh, com_dlbl, rate); 1906 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 1907 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 1908 bus_space_write_1(iot, ioh, com_mcr, 0); 1909 bus_space_write_1(iot, ioh, com_fifo, 1910 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 1911 bus_space_write_1(iot, ioh, com_ier, 0); 1912 1913 *iohp = ioh; 1914 return (0); 1915 } 1916 1917 /* 1918 * Following are all routines needed for COM to act as console 1919 */ 1920 1921 int 1922 comcnattach(iot, iobase, rate, frequency, cflag) 1923 bus_space_tag_t iot; 1924 int iobase; 1925 int rate, frequency; 1926 tcflag_t cflag; 1927 { 1928 int res; 1929 static struct consdev comcons = { 1930 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 1931 }; 1932 1933 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 1934 if (res) 1935 return (res); 1936 1937 cn_tab = &comcons; 1938 1939 comconstag = iot; 1940 comconsaddr = iobase; 1941 comconsrate = rate; 1942 comconscflag = cflag; 1943 1944 return (0); 1945 } 1946 1947 int 1948 comcngetc(dev) 1949 dev_t dev; 1950 { 1951 1952 return (com_common_getc(comconstag, comconsioh)); 1953 } 1954 1955 /* 1956 * Console kernel output character routine. 1957 */ 1958 void 1959 comcnputc(dev, c) 1960 dev_t dev; 1961 int c; 1962 { 1963 1964 com_common_putc(comconstag, comconsioh, c); 1965 } 1966 1967 void 1968 comcnpollc(dev, on) 1969 dev_t dev; 1970 int on; 1971 { 1972 1973 } 1974 1975 #ifdef KGDB 1976 int 1977 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 1978 bus_space_tag_t iot; 1979 int iobase; 1980 int rate, frequency; 1981 tcflag_t cflag; 1982 { 1983 int res; 1984 1985 if (iot == comconstag && iobase == comconsaddr) 1986 return (EBUSY); /* cannot share with console */ 1987 1988 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 1989 if (res) 1990 return (res); 1991 1992 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 1993 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1994 1995 com_kgdb_iot = iot; 1996 com_kgdb_addr = iobase; 1997 1998 return (0); 1999 } 2000 2001 /* ARGSUSED */ 2002 int 2003 com_kgdb_getc(arg) 2004 void *arg; 2005 { 2006 2007 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2008 } 2009 2010 /* ARGSUSED */ 2011 void 2012 com_kgdb_putc(arg, c) 2013 void *arg; 2014 int c; 2015 { 2016 2017 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2018 } 2019 #endif /* KGDB */ 2020 2021 /* helper function to identify the com ports used by 2022 console or KGDB (and not yet autoconf attached) */ 2023 int 2024 com_is_console(iot, iobase, ioh) 2025 bus_space_tag_t iot; 2026 int iobase; 2027 bus_space_handle_t *ioh; 2028 { 2029 bus_space_handle_t help; 2030 2031 if (!comconsattached && 2032 iot == comconstag && iobase == comconsaddr) 2033 help = comconsioh; 2034 #ifdef KGDB 2035 else if (!com_kgdb_attached && 2036 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2037 help = com_kgdb_ioh; 2038 #endif 2039 else 2040 return (0); 2041 2042 if (ioh) 2043 *ioh = help; 2044 return (1); 2045 } 2046
Indexes created Fri Sep 26 08:10:20 GMT 2025