com.c revision 1.144
1 /* $NetBSD: com.c,v 1.144 1998/06/10 12:06:23 jonathan Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997, 1998 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "rnd.h" 77 #if NRND > 0 && defined(RND_COM) 78 #include <sys/rnd.h> 79 #endif 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/ioctl.h> 84 #include <sys/select.h> 85 #include <sys/tty.h> 86 #include <sys/proc.h> 87 #include <sys/user.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/uio.h> 91 #include <sys/kernel.h> 92 #include <sys/syslog.h> 93 #include <sys/types.h> 94 #include <sys/device.h> 95 #include <sys/malloc.h> 96 #include <sys/timepps.h> 97 98 #include <machine/intr.h> 99 #include <machine/bus.h> 100 101 #include <dev/ic/comreg.h> 102 #include <dev/ic/comvar.h> 103 #include <dev/ic/ns16550reg.h> 104 #include <dev/ic/st16650reg.h> 105 #ifdef COM_HAYESP 106 #include <dev/ic/hayespreg.h> 107 #endif 108 #define com_lcr com_cfcr 109 #include <dev/cons.h> 110 111 #include "com.h" 112 113 #ifdef COM_HAYESP 114 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 115 #endif 116 117 #if defined(DDB) || defined(KGDB) 118 static void com_enable_debugport __P((struct com_softc *)); 119 #endif 120 void com_attach_subr __P((struct com_softc *sc)); 121 void com_config __P((struct com_softc *)); 122 void com_shutdown __P((struct com_softc *)); 123 int comspeed __P((long, long)); 124 static u_char cflag2lcr __P((tcflag_t)); 125 int comparam __P((struct tty *, struct termios *)); 126 void comstart __P((struct tty *)); 127 void comstop __P((struct tty *, int)); 128 int comhwiflow __P((struct tty *, int)); 129 130 void com_loadchannelregs __P((struct com_softc *)); 131 void com_hwiflow __P((struct com_softc *)); 132 void com_break __P((struct com_softc *, int)); 133 void com_modem __P((struct com_softc *, int)); 134 void com_iflush __P((struct com_softc *)); 135 136 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 137 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 138 139 /* XXX: These belong elsewhere */ 140 cdev_decl(com); 141 bdev_decl(com); 142 143 int comcngetc __P((dev_t)); 144 void comcnputc __P((dev_t, int)); 145 void comcnpollc __P((dev_t, int)); 146 147 #define integrate static inline 148 #ifdef __GENERIC_SOFT_INTERRUPTS 149 void comsoft __P((void *)); 150 #else 151 #ifndef __NO_SOFT_SERIAL_INTERRUPT 152 void comsoft __P((void)); 153 #else 154 void comsoft __P((void *)); 155 #endif 156 #endif 157 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 158 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 159 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 160 integrate void com_schedrx __P((struct com_softc *)); 161 void comdiag __P((void *)); 162 163 extern struct cfdriver com_cd; 164 165 /* 166 * Make this an option variable one can patch. 167 * But be warned: this must be a power of 2! 168 */ 169 u_int com_rbuf_size = COM_RING_SIZE; 170 171 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 172 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 173 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 174 175 static int comconsaddr; 176 static bus_space_tag_t comconstag; 177 static bus_space_handle_t comconsioh; 178 static int comconsattached; 179 static int comconsrate; 180 static tcflag_t comconscflag; 181 182 static int ppscap = 183 PPS_TSFMT_TSPEC | 184 PPS_CAPTUREASSERT | 185 PPS_CAPTURECLEAR | 186 #ifdef PPS_SYNC 187 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 188 #endif /* PPS_SYNC */ 189 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 190 191 static u_char tiocm_xxx2mcr __P((int)); 192 193 #ifndef __GENERIC_SOFT_INTERRUPTS 194 #ifdef __NO_SOFT_SERIAL_INTERRUPT 195 volatile int com_softintr_scheduled; 196 #endif 197 #endif 198 199 #ifdef KGDB 200 #include <sys/kgdb.h> 201 202 static int com_kgdb_addr; 203 static bus_space_tag_t com_kgdb_iot; 204 static bus_space_handle_t com_kgdb_ioh; 205 static int com_kgdb_attached; 206 207 int com_kgdb_getc __P((void *)); 208 void com_kgdb_putc __P((void *, int)); 209 #endif /* KGDB */ 210 211 #define COMUNIT(x) (minor(x) & 0x7ffff) 212 #define COMDIALOUT(x) (minor(x) & 0x80000) 213 214 int 215 comspeed(speed, frequency) 216 long speed, frequency; 217 { 218 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 219 220 int x, err; 221 222 #if 0 223 if (speed == 0) 224 return (0); 225 #endif 226 if (speed <= 0) 227 return (-1); 228 x = divrnd(frequency / 16, speed); 229 if (x <= 0) 230 return (-1); 231 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 232 if (err < 0) 233 err = -err; 234 if (err > COM_TOLERANCE) 235 return (-1); 236 return (x); 237 238 #undef divrnd(n, q) 239 } 240 241 #ifdef COM_DEBUG 242 int com_debug = 0; 243 244 void comstatus __P((struct com_softc *, char *)); 245 void 246 comstatus(sc, str) 247 struct com_softc *sc; 248 char *str; 249 { 250 struct tty *tp = sc->sc_tty; 251 252 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 253 sc->sc_dev.dv_xname, str, 254 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 255 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 256 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 257 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 258 sc->sc_tx_stopped ? "+" : "-"); 259 260 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 261 sc->sc_dev.dv_xname, str, 262 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 263 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 264 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 265 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 266 sc->sc_rx_flags); 267 } 268 #endif 269 270 int 271 comprobe1(iot, ioh, iobase) 272 bus_space_tag_t iot; 273 bus_space_handle_t ioh; 274 int iobase; 275 { 276 277 /* force access to id reg */ 278 bus_space_write_1(iot, ioh, com_lcr, 0); 279 bus_space_write_1(iot, ioh, com_iir, 0); 280 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 281 return (0); 282 283 return (1); 284 } 285 286 #ifdef COM_HAYESP 287 int 288 comprobeHAYESP(hayespioh, sc) 289 bus_space_handle_t hayespioh; 290 struct com_softc *sc; 291 { 292 char val, dips; 293 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 294 bus_space_tag_t iot = sc->sc_iot; 295 296 /* 297 * Hayes ESP cards have two iobases. One is for compatibility with 298 * 16550 serial chips, and at the same ISA PC base addresses. The 299 * other is for ESP-specific enhanced features, and lies at a 300 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 301 */ 302 303 /* Test for ESP signature */ 304 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 305 return (0); 306 307 /* 308 * ESP is present at ESP enhanced base address; unknown com port 309 */ 310 311 /* Get the dip-switch configurations */ 312 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 313 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 314 315 /* Determine which com port this ESP card services: bits 0,1 of */ 316 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 317 if (sc->sc_iobase != combaselist[dips & 0x03]) 318 return (0); 319 320 printf(": ESP"); 321 322 /* Check ESP Self Test bits. */ 323 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 324 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 325 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 326 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 327 if ((val & 0x70) < 0x20) { 328 printf("-old (%o)", val & 0x70); 329 /* we do not support the necessary features */ 330 return (0); 331 } 332 333 /* Check for ability to emulate 16550: bit 8 == 1 */ 334 if ((dips & 0x80) == 0) { 335 printf(" slave"); 336 /* XXX Does slave really mean no 16550 support?? */ 337 return (0); 338 } 339 340 /* 341 * If we made it this far, we are a full-featured ESP v2.0 (or 342 * better), at the correct com port address. 343 */ 344 345 SET(sc->sc_hwflags, COM_HW_HAYESP); 346 printf(", 1024 byte fifo\n"); 347 return (1); 348 } 349 #endif 350 351 #if defined(DDB) || defined(KGDB) 352 static void 353 com_enable_debugport(sc) 354 struct com_softc *sc; 355 { 356 int s; 357 358 /* Turn on line break interrupt, set carrier. */ 359 s = splserial(); 360 sc->sc_ier = IER_ERXRDY; 361 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 362 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 364 splx(s); 365 } 366 #endif 367 368 void 369 com_attach_subr(sc) 370 struct com_softc *sc; 371 { 372 int iobase = sc->sc_iobase; 373 bus_space_tag_t iot = sc->sc_iot; 374 bus_space_handle_t ioh = sc->sc_ioh; 375 struct tty *tp; 376 #ifdef COM16650 377 u_int8_t lcr; 378 #endif 379 #ifdef COM_HAYESP 380 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 381 int *hayespp; 382 #endif 383 384 /* Disable interrupts before configuring the device. */ 385 sc->sc_ier = 0; 386 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 387 388 if (iot == comconstag && iobase == comconsaddr) { 389 comconsattached = 1; 390 391 /* Make sure the console is always "hardwired". */ 392 delay(1000); /* wait for output to finish */ 393 SET(sc->sc_hwflags, COM_HW_CONSOLE); 394 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 395 } 396 397 #ifdef COM_HAYESP 398 /* Look for a Hayes ESP board. */ 399 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 400 bus_space_handle_t hayespioh; 401 402 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 403 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 404 continue; 405 if (comprobeHAYESP(hayespioh, sc)) { 406 sc->sc_hayespioh = hayespioh; 407 sc->sc_fifolen = 1024; 408 409 break; 410 } 411 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 412 } 413 /* No ESP; look for other things. */ 414 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 415 #endif 416 sc->sc_fifolen = 1; 417 /* look for a NS 16550AF UART with FIFOs */ 418 bus_space_write_1(iot, ioh, com_fifo, 419 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 420 delay(100); 421 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 422 == IIR_FIFO_MASK) 423 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 424 == FIFO_TRIGGER_14) { 425 SET(sc->sc_hwflags, COM_HW_FIFO); 426 427 #ifdef COM16650 428 /* 429 * IIR changes into the EFR if LCR is set to LCR_EERS 430 * on 16650s. We also know IIR != 0 at this point. 431 * Write 0 into the EFR, and read it. If the result 432 * is 0, we have a 16650. 433 * 434 * Older 16650s were broken; the test to detect them 435 * is taken from the Linux driver. Apparently 436 * setting DLAB enable gives access to the EFR on 437 * these chips. 438 */ 439 lcr = bus_space_read_1(iot, ioh, com_lcr); 440 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 441 bus_space_write_1(iot, ioh, com_efr, 0); 442 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 443 bus_space_write_1(iot, ioh, com_lcr, 444 lcr | LCR_DLAB); 445 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 446 CLR(sc->sc_hwflags, COM_HW_FIFO); 447 sc->sc_fifolen = 0; 448 } else { 449 SET(sc->sc_hwflags, COM_HW_FLOW); 450 sc->sc_fifolen = 32; 451 } 452 } else 453 #endif 454 sc->sc_fifolen = 16; 455 456 #ifdef COM16650 457 bus_space_write_1(iot, ioh, com_lcr, lcr); 458 if (sc->sc_fifolen == 0) 459 printf(": st16650, broken fifo\n"); 460 else if (sc->sc_fifolen == 32) 461 printf(": st16650a, working fifo\n"); 462 else 463 #endif 464 printf(": ns16550a, working fifo\n"); 465 } else 466 printf(": ns16550, broken fifo\n"); 467 else 468 printf(": ns8250 or ns16450, no fifo\n"); 469 bus_space_write_1(iot, ioh, com_fifo, 0); 470 #ifdef COM_HAYESP 471 } 472 #endif 473 474 tp = ttymalloc(); 475 tp->t_oproc = comstart; 476 tp->t_param = comparam; 477 tp->t_hwiflow = comhwiflow; 478 tty_attach(tp); 479 480 sc->sc_tty = tp; 481 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_WAITOK); 482 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 483 484 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 485 SET(sc->sc_mcr, MCR_IENABLE); 486 487 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 488 int maj; 489 490 /* locate the major number */ 491 for (maj = 0; maj < nchrdev; maj++) 492 if (cdevsw[maj].d_open == comopen) 493 break; 494 495 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 496 497 printf("%s: console\n", sc->sc_dev.dv_xname); 498 } 499 500 #ifdef KGDB 501 /* 502 * Allow kgdb to "take over" this port. If this is 503 * the kgdb device, it has exclusive use. 504 */ 505 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 506 com_kgdb_attached = 1; 507 508 SET(sc->sc_hwflags, COM_HW_KGDB); 509 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 510 } 511 #endif 512 513 #ifdef __GENERIC_SOFT_INTERRUPTS 514 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 515 #endif 516 517 #if NRND > 0 && defined(RND_COM) 518 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 519 RND_TYPE_TTY); 520 #endif 521 522 /* if there are no enable/disable functions, assume the device 523 is always enabled */ 524 if (!sc->enable) 525 sc->enabled = 1; 526 527 com_config(sc); 528 529 SET(sc->sc_hwflags, COM_HW_DEV_OK); 530 } 531 532 void 533 com_config(sc) 534 struct com_softc *sc; 535 { 536 bus_space_tag_t iot = sc->sc_iot; 537 bus_space_handle_t ioh = sc->sc_ioh; 538 539 /* Disable interrupts before configuring the device. */ 540 sc->sc_ier = 0; 541 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 542 543 #ifdef COM_HAYESP 544 /* Look for a Hayes ESP board. */ 545 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 546 sc->sc_fifolen = 1024; 547 548 /* Set 16550 compatibility mode */ 549 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 550 HAYESP_SETMODE); 551 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 552 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 553 HAYESP_MODE_SCALE); 554 555 /* Set RTS/CTS flow control */ 556 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 557 HAYESP_SETFLOWTYPE); 558 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 559 HAYESP_FLOW_RTS); 560 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 561 HAYESP_FLOW_CTS); 562 563 /* Set flow control levels */ 564 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 565 HAYESP_SETRXFLOW); 566 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 567 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 568 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 570 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 571 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 572 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 573 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 574 } 575 #endif 576 577 #ifdef DDB 578 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 579 com_enable_debugport(sc); 580 #endif 581 582 #ifdef KGDB 583 /* 584 * Allow kgdb to "take over" this port. If this is 585 * the kgdb device, it has exclusive use. 586 */ 587 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 588 com_enable_debugport(sc); 589 #endif 590 } 591 592 void 593 com_shutdown(sc) 594 struct com_softc *sc; 595 { 596 struct tty *tp = sc->sc_tty; 597 int s; 598 599 s = splserial(); 600 601 /* If we were asserting flow control, then deassert it. */ 602 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 603 com_hwiflow(sc); 604 605 /* Clear any break condition set with TIOCSBRK. */ 606 com_break(sc, 0); 607 608 /* Turn off PPS capture on last close. */ 609 sc->sc_ppsclearmask = 0; 610 sc->sc_ppsassertmask = 0; 611 sc->sc_ppsassert = 1; 612 sc->sc_ppsclear = 1; 613 sc->ppsparam.mode = 0; 614 615 /* 616 * Hang up if necessary. Wait a bit, so the other side has time to 617 * notice even if we immediately open the port again. 618 */ 619 if (ISSET(tp->t_cflag, HUPCL)) { 620 com_modem(sc, 0); 621 (void) tsleep(sc, TTIPRI, ttclos, hz); 622 } 623 624 /* Turn off interrupts. */ 625 #ifdef DDB 626 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 627 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 628 else 629 #endif 630 sc->sc_ier = 0; 631 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 632 633 if (sc->disable) { 634 #ifdef DIAGNOSTIC 635 if (!sc->enabled) 636 panic("com_shutdown: not enabled?"); 637 #endif 638 (*sc->disable)(sc); 639 sc->enabled = 0; 640 } 641 642 splx(s); 643 } 644 645 int 646 comopen(dev, flag, mode, p) 647 dev_t dev; 648 int flag, mode; 649 struct proc *p; 650 { 651 int unit = COMUNIT(dev); 652 struct com_softc *sc; 653 struct tty *tp; 654 int s, s2; 655 int error; 656 657 if (unit >= com_cd.cd_ndevs) 658 return (ENXIO); 659 sc = com_cd.cd_devs[unit]; 660 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 661 return (ENXIO); 662 663 #ifdef KGDB 664 /* 665 * If this is the kgdb port, no other use is permitted. 666 */ 667 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 668 return (EBUSY); 669 #endif 670 671 tp = sc->sc_tty; 672 673 if (ISSET(tp->t_state, TS_ISOPEN) && 674 ISSET(tp->t_state, TS_XCLUDE) && 675 p->p_ucred->cr_uid != 0) 676 return (EBUSY); 677 678 s = spltty(); 679 680 /* 681 * Do the following iff this is a first open. 682 */ 683 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 684 struct termios t; 685 686 tp->t_dev = dev; 687 688 s2 = splserial(); 689 690 if (sc->enable) { 691 if ((*sc->enable)(sc)) { 692 splx(s2); 693 splx(s); 694 printf("%s: device enable failed\n", 695 sc->sc_dev.dv_xname); 696 return (EIO); 697 } 698 sc->enabled = 1; 699 com_config(sc); 700 } 701 702 /* Turn on interrupts. */ 703 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 704 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 705 706 /* Fetch the current modem control status, needed later. */ 707 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 708 709 /* Clear PPS capture state on first open. */ 710 sc->sc_ppsclearmask = 0; 711 sc->sc_ppsassertmask = 0; 712 sc->sc_ppsassert = 1; 713 sc->sc_ppsclear = 1; 714 715 splx(s2); 716 717 /* 718 * Initialize the termios status to the defaults. Add in the 719 * sticky bits from TIOCSFLAGS. 720 */ 721 t.c_ispeed = 0; 722 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 723 t.c_ospeed = comconsrate; 724 t.c_cflag = comconscflag; 725 } else { 726 t.c_ospeed = TTYDEF_SPEED; 727 t.c_cflag = TTYDEF_CFLAG; 728 } 729 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 730 SET(t.c_cflag, CLOCAL); 731 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 732 SET(t.c_cflag, CRTSCTS); 733 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 734 SET(t.c_cflag, MDMBUF); 735 /* Make sure comparam() will do something. */ 736 tp->t_ospeed = 0; 737 (void) comparam(tp, &t); 738 tp->t_iflag = TTYDEF_IFLAG; 739 tp->t_oflag = TTYDEF_OFLAG; 740 tp->t_lflag = TTYDEF_LFLAG; 741 ttychars(tp); 742 ttsetwater(tp); 743 744 s2 = splserial(); 745 746 /* 747 * Turn on DTR. We must always do this, even if carrier is not 748 * present, because otherwise we'd have to use TIOCSDTR 749 * immediately after setting CLOCAL, which applications do not 750 * expect. We always assert DTR while the device is open 751 * unless explicitly requested to deassert it. 752 */ 753 com_modem(sc, 1); 754 755 /* Clear the input ring, and unblock. */ 756 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 757 sc->sc_rbavail = com_rbuf_size; 758 com_iflush(sc); 759 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 760 com_hwiflow(sc); 761 762 #ifdef COM_DEBUG 763 if (com_debug) 764 comstatus(sc, "comopen "); 765 #endif 766 767 splx(s2); 768 } 769 770 splx(s); 771 772 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 773 if (error) 774 goto bad; 775 776 error = (*linesw[tp->t_line].l_open)(dev, tp); 777 if (error) 778 goto bad; 779 780 return (0); 781 782 bad: 783 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 784 /* 785 * We failed to open the device, and nobody else had it opened. 786 * Clean up the state as appropriate. 787 */ 788 com_shutdown(sc); 789 } 790 791 return (error); 792 } 793 794 int 795 comclose(dev, flag, mode, p) 796 dev_t dev; 797 int flag, mode; 798 struct proc *p; 799 { 800 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 801 struct tty *tp = sc->sc_tty; 802 803 /* XXX This is for cons.c. */ 804 if (!ISSET(tp->t_state, TS_ISOPEN)) 805 return (0); 806 807 (*linesw[tp->t_line].l_close)(tp, flag); 808 ttyclose(tp); 809 810 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 811 /* 812 * Although we got a last close, the device may still be in 813 * use; e.g. if this was the dialout node, and there are still 814 * processes waiting for carrier on the non-dialout node. 815 */ 816 com_shutdown(sc); 817 } 818 819 return (0); 820 } 821 822 int 823 comread(dev, uio, flag) 824 dev_t dev; 825 struct uio *uio; 826 int flag; 827 { 828 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 829 struct tty *tp = sc->sc_tty; 830 831 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 832 } 833 834 int 835 comwrite(dev, uio, flag) 836 dev_t dev; 837 struct uio *uio; 838 int flag; 839 { 840 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 841 struct tty *tp = sc->sc_tty; 842 843 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 844 } 845 846 struct tty * 847 comtty(dev) 848 dev_t dev; 849 { 850 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 851 struct tty *tp = sc->sc_tty; 852 853 return (tp); 854 } 855 856 static u_char 857 tiocm_xxx2mcr(data) 858 int data; 859 { 860 u_char m = 0; 861 862 if (ISSET(data, TIOCM_DTR)) 863 SET(m, MCR_DTR); 864 if (ISSET(data, TIOCM_RTS)) 865 SET(m, MCR_RTS); 866 return m; 867 } 868 869 int 870 comioctl(dev, cmd, data, flag, p) 871 dev_t dev; 872 u_long cmd; 873 caddr_t data; 874 int flag; 875 struct proc *p; 876 { 877 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 878 struct tty *tp = sc->sc_tty; 879 int error; 880 int s; 881 882 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 883 if (error >= 0) 884 return (error); 885 886 error = ttioctl(tp, cmd, data, flag, p); 887 if (error >= 0) 888 return (error); 889 890 error = 0; 891 892 s = splserial(); 893 894 switch (cmd) { 895 case TIOCSBRK: 896 com_break(sc, 1); 897 break; 898 899 case TIOCCBRK: 900 com_break(sc, 0); 901 break; 902 903 case TIOCSDTR: 904 com_modem(sc, 1); 905 break; 906 907 case TIOCCDTR: 908 com_modem(sc, 0); 909 break; 910 911 case TIOCGFLAGS: 912 *(int *)data = sc->sc_swflags; 913 break; 914 915 case TIOCSFLAGS: 916 error = suser(p->p_ucred, &p->p_acflag); 917 if (error) 918 break; 919 sc->sc_swflags = *(int *)data; 920 break; 921 922 case TIOCMSET: 923 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 924 /*FALLTHROUGH*/ 925 926 case TIOCMBIS: 927 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 928 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 929 break; 930 931 case TIOCMBIC: 932 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 933 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 934 break; 935 936 case TIOCMGET: { 937 u_char m; 938 int bits = 0; 939 940 m = sc->sc_mcr; 941 if (ISSET(m, MCR_DTR)) 942 SET(bits, TIOCM_DTR); 943 if (ISSET(m, MCR_RTS)) 944 SET(bits, TIOCM_RTS); 945 m = sc->sc_msr; 946 if (ISSET(m, MSR_DCD)) 947 SET(bits, TIOCM_CD); 948 if (ISSET(m, MSR_CTS)) 949 SET(bits, TIOCM_CTS); 950 if (ISSET(m, MSR_DSR)) 951 SET(bits, TIOCM_DSR); 952 if (ISSET(m, MSR_RI | MSR_TERI)) 953 SET(bits, TIOCM_RI); 954 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 955 SET(bits, TIOCM_LE); 956 *(int *)data = bits; 957 break; 958 } 959 960 case PPS_CREATE: 961 break; 962 963 case PPS_DESTROY: 964 break; 965 966 case PPS_GETPARAMS: { 967 pps_params_t *pp; 968 pp = (pps_params_t *)data; 969 *pp = sc->ppsparam; 970 break; 971 } 972 973 case PPS_SETPARAMS: { 974 pps_params_t *pp; 975 int mode; 976 pp = (pps_params_t *)data; 977 if (pp->mode & ~ppscap) { 978 error = EINVAL; 979 break; 980 } 981 sc->ppsparam = *pp; 982 /* 983 * Compute msr masks from user-specified timestamp state. 984 */ 985 mode = sc->ppsparam.mode; 986 if (mode & PPS_HARDPPSONASSERT) { 987 mode |= PPS_CAPTUREASSERT; 988 /* XXX revoke any previous HARDPPS source */ 989 } 990 if (mode & PPS_HARDPPSONCLEAR) { 991 mode |= PPS_CAPTURECLEAR; 992 /* XXX revoke any previous HARDPPS source */ 993 } 994 switch (mode & PPS_CAPTUREBOTH) { 995 case 0: 996 sc->sc_ppsassertmask = 0; 997 sc->sc_ppsassert = 1; 998 sc->sc_ppsclearmask = 0; 999 sc->sc_ppsclear = 1; 1000 break; 1001 1002 case PPS_CAPTUREASSERT: 1003 sc->sc_ppsassertmask = MSR_DCD; 1004 sc->sc_ppsassert = MSR_DCD; 1005 sc->sc_ppsclearmask = 0; 1006 sc->sc_ppsclear = 1; 1007 break; 1008 1009 case PPS_CAPTURECLEAR: 1010 sc->sc_ppsassertmask = 0; 1011 sc->sc_ppsassert = 1; 1012 sc->sc_ppsclearmask = MSR_DCD; 1013 sc->sc_ppsclear = 0; 1014 break; 1015 1016 case PPS_CAPTUREBOTH: 1017 sc->sc_ppsassertmask = MSR_DCD; 1018 sc->sc_ppsclearmask = MSR_DCD; 1019 sc->sc_ppsassert = MSR_DCD; 1020 sc->sc_ppsclear = 0; 1021 break; 1022 1023 default: 1024 error = EINVAL; 1025 break; 1026 } 1027 break; 1028 } 1029 1030 case PPS_GETCAP: 1031 *(int*)data = ppscap; 1032 break; 1033 1034 case PPS_FETCH: { 1035 pps_info_t *pi; 1036 pi = (pps_info_t *)data; 1037 *pi = sc->ppsinfo; 1038 break; 1039 } 1040 1041 case PPS_WAIT: 1042 /* XXX */ 1043 error = EOPNOTSUPP; 1044 break; 1045 1046 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1047 /* 1048 * Some GPS clocks models use the falling rather than 1049 * rising edge as the on-the-second signal. 1050 * The old API has no way to specify PPS polarity. 1051 */ 1052 #ifndef PPS_TRAILING_EDGE 1053 sc->sc_ppsassertmask = MSR_DCD; 1054 sc->sc_ppsassert = MSR_DCD; 1055 sc->sc_ppsclearmask = 0; 1056 sc->sc_ppsclear = 1; 1057 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1058 &sc->ppsinfo.assert_timestamp); 1059 #else 1060 sc->sc_ppsassertmask = 0; 1061 sc->sc_ppsassert = 1 1062 sc->sc_ppsclearmask = MSR_DCD; 1063 sc->sc_ppsclear = 0; 1064 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1065 &sc->ppsinfo.clear_timestamp); 1066 #endif 1067 break; 1068 1069 default: 1070 error = ENOTTY; 1071 break; 1072 } 1073 1074 splx(s); 1075 1076 #ifdef COM_DEBUG 1077 if (com_debug) 1078 comstatus(sc, "comioctl "); 1079 #endif 1080 1081 return (error); 1082 } 1083 1084 integrate void 1085 com_schedrx(sc) 1086 struct com_softc *sc; 1087 { 1088 1089 sc->sc_rx_ready = 1; 1090 1091 /* Wake up the poller. */ 1092 #ifdef __GENERIC_SOFT_INTERRUPTS 1093 softintr_schedule(sc->sc_si); 1094 #else 1095 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1096 setsoftserial(); 1097 #else 1098 if (!com_softintr_scheduled) { 1099 com_softintr_scheduled = 1; 1100 timeout(comsoft, NULL, 1); 1101 } 1102 #endif 1103 #endif 1104 } 1105 1106 void 1107 com_break(sc, onoff) 1108 struct com_softc *sc; 1109 int onoff; 1110 { 1111 1112 if (onoff) 1113 SET(sc->sc_lcr, LCR_SBREAK); 1114 else 1115 CLR(sc->sc_lcr, LCR_SBREAK); 1116 1117 if (!sc->sc_heldchange) { 1118 if (sc->sc_tx_busy) { 1119 sc->sc_heldtbc = sc->sc_tbc; 1120 sc->sc_tbc = 0; 1121 sc->sc_heldchange = 1; 1122 } else 1123 com_loadchannelregs(sc); 1124 } 1125 } 1126 1127 void 1128 com_modem(sc, onoff) 1129 struct com_softc *sc; 1130 int onoff; 1131 { 1132 1133 if (onoff) 1134 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1135 else 1136 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1137 1138 if (!sc->sc_heldchange) { 1139 if (sc->sc_tx_busy) { 1140 sc->sc_heldtbc = sc->sc_tbc; 1141 sc->sc_tbc = 0; 1142 sc->sc_heldchange = 1; 1143 } else 1144 com_loadchannelregs(sc); 1145 } 1146 } 1147 1148 static u_char 1149 cflag2lcr(cflag) 1150 tcflag_t cflag; 1151 { 1152 u_char lcr = 0; 1153 1154 switch (ISSET(cflag, CSIZE)) { 1155 case CS5: 1156 SET(lcr, LCR_5BITS); 1157 break; 1158 case CS6: 1159 SET(lcr, LCR_6BITS); 1160 break; 1161 case CS7: 1162 SET(lcr, LCR_7BITS); 1163 break; 1164 case CS8: 1165 SET(lcr, LCR_8BITS); 1166 break; 1167 } 1168 if (ISSET(cflag, PARENB)) { 1169 SET(lcr, LCR_PENAB); 1170 if (!ISSET(cflag, PARODD)) 1171 SET(lcr, LCR_PEVEN); 1172 } 1173 if (ISSET(cflag, CSTOPB)) 1174 SET(lcr, LCR_STOPB); 1175 1176 return (lcr); 1177 } 1178 1179 int 1180 comparam(tp, t) 1181 struct tty *tp; 1182 struct termios *t; 1183 { 1184 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1185 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1186 u_char lcr; 1187 int s; 1188 1189 /* Check requested parameters. */ 1190 if (ospeed < 0) 1191 return (EINVAL); 1192 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1193 return (EINVAL); 1194 1195 /* 1196 * For the console, always force CLOCAL and !HUPCL, so that the port 1197 * is always active. 1198 */ 1199 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1200 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1201 SET(t->c_cflag, CLOCAL); 1202 CLR(t->c_cflag, HUPCL); 1203 } 1204 1205 /* 1206 * If there were no changes, don't do anything. This avoids dropping 1207 * input and improves performance when all we did was frob things like 1208 * VMIN and VTIME. 1209 */ 1210 if (tp->t_ospeed == t->c_ospeed && 1211 tp->t_cflag == t->c_cflag) 1212 return (0); 1213 1214 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1215 1216 s = splserial(); 1217 1218 sc->sc_lcr = lcr; 1219 1220 /* 1221 * If we're not in a mode that assumes a connection is present, then 1222 * ignore carrier changes. 1223 */ 1224 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1225 sc->sc_msr_dcd = 0; 1226 else 1227 sc->sc_msr_dcd = MSR_DCD; 1228 /* 1229 * Set the flow control pins depending on the current flow control 1230 * mode. 1231 */ 1232 if (ISSET(t->c_cflag, CRTSCTS)) { 1233 sc->sc_mcr_dtr = MCR_DTR; 1234 sc->sc_mcr_rts = MCR_RTS; 1235 sc->sc_msr_cts = MSR_CTS; 1236 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1237 } else if (ISSET(t->c_cflag, MDMBUF)) { 1238 /* 1239 * For DTR/DCD flow control, make sure we don't toggle DTR for 1240 * carrier detection. 1241 */ 1242 sc->sc_mcr_dtr = 0; 1243 sc->sc_mcr_rts = MCR_DTR; 1244 sc->sc_msr_cts = MSR_DCD; 1245 sc->sc_efr = 0; 1246 } else { 1247 /* 1248 * If no flow control, then always set RTS. This will make 1249 * the other side happy if it mistakenly thinks we're doing 1250 * RTS/CTS flow control. 1251 */ 1252 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1253 sc->sc_mcr_rts = 0; 1254 sc->sc_msr_cts = 0; 1255 sc->sc_efr = 0; 1256 if (ISSET(sc->sc_mcr, MCR_DTR)) 1257 SET(sc->sc_mcr, MCR_RTS); 1258 else 1259 CLR(sc->sc_mcr, MCR_RTS); 1260 } 1261 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1262 1263 #if 0 1264 if (ospeed == 0) 1265 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1266 else 1267 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1268 #endif 1269 1270 sc->sc_dlbl = ospeed; 1271 sc->sc_dlbh = ospeed >> 8; 1272 1273 /* 1274 * Set the FIFO threshold based on the receive speed. 1275 * 1276 * * If it's a low speed, it's probably a mouse or some other 1277 * interactive device, so set the threshold low. 1278 * * If it's a high speed, trim the trigger level down to prevent 1279 * overflows. 1280 * * Otherwise set it a bit higher. 1281 */ 1282 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1283 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1284 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1285 sc->sc_fifo = FIFO_ENABLE | 1286 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1287 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1288 else 1289 sc->sc_fifo = 0; 1290 1291 /* And copy to tty. */ 1292 tp->t_ispeed = 0; 1293 tp->t_ospeed = t->c_ospeed; 1294 tp->t_cflag = t->c_cflag; 1295 1296 if (!sc->sc_heldchange) { 1297 if (sc->sc_tx_busy) { 1298 sc->sc_heldtbc = sc->sc_tbc; 1299 sc->sc_tbc = 0; 1300 sc->sc_heldchange = 1; 1301 } else 1302 com_loadchannelregs(sc); 1303 } 1304 1305 if (!ISSET(t->c_cflag, CHWFLOW)) { 1306 /* Disable the high water mark. */ 1307 sc->sc_r_hiwat = 0; 1308 sc->sc_r_lowat = 0; 1309 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1310 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1311 com_schedrx(sc); 1312 } 1313 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1314 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1315 com_hwiflow(sc); 1316 } 1317 } else { 1318 sc->sc_r_hiwat = com_rbuf_hiwat; 1319 sc->sc_r_lowat = com_rbuf_lowat; 1320 } 1321 1322 splx(s); 1323 1324 /* 1325 * Update the tty layer's idea of the carrier bit, in case we changed 1326 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1327 * explicit request. 1328 */ 1329 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1330 1331 #ifdef COM_DEBUG 1332 if (com_debug) 1333 comstatus(sc, "comparam "); 1334 #endif 1335 1336 if (!ISSET(t->c_cflag, CHWFLOW)) { 1337 if (sc->sc_tx_stopped) { 1338 sc->sc_tx_stopped = 0; 1339 comstart(tp); 1340 } 1341 } 1342 1343 return (0); 1344 } 1345 1346 void 1347 com_iflush(sc) 1348 struct com_softc *sc; 1349 { 1350 bus_space_tag_t iot = sc->sc_iot; 1351 bus_space_handle_t ioh = sc->sc_ioh; 1352 #ifdef DIAGNOSTIC 1353 int reg; 1354 #endif 1355 int timo; 1356 1357 #ifdef DIAGNOSTIC 1358 reg = 0xffff; 1359 #endif 1360 timo = 50000; 1361 /* flush any pending I/O */ 1362 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1363 && --timo) 1364 #ifdef DIAGNOSTIC 1365 reg = 1366 #else 1367 (void) 1368 #endif 1369 bus_space_read_1(iot, ioh, com_data); 1370 #ifdef DIAGNOSTIC 1371 if (!timo) 1372 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1373 reg); 1374 #endif 1375 } 1376 1377 void 1378 com_loadchannelregs(sc) 1379 struct com_softc *sc; 1380 { 1381 bus_space_tag_t iot = sc->sc_iot; 1382 bus_space_handle_t ioh = sc->sc_ioh; 1383 1384 /* XXXXX necessary? */ 1385 com_iflush(sc); 1386 1387 bus_space_write_1(iot, ioh, com_ier, 0); 1388 1389 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1390 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1391 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1392 } 1393 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1394 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1395 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1396 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1397 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1398 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1399 1400 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1401 } 1402 1403 int 1404 comhwiflow(tp, block) 1405 struct tty *tp; 1406 int block; 1407 { 1408 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1409 int s; 1410 1411 if (sc->sc_mcr_rts == 0) 1412 return (0); 1413 1414 s = splserial(); 1415 if (block) { 1416 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1417 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1418 com_hwiflow(sc); 1419 } 1420 } else { 1421 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1422 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1423 com_schedrx(sc); 1424 } 1425 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1426 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1427 com_hwiflow(sc); 1428 } 1429 } 1430 splx(s); 1431 return (1); 1432 } 1433 1434 /* 1435 * (un)block input via hw flowcontrol 1436 */ 1437 void 1438 com_hwiflow(sc) 1439 struct com_softc *sc; 1440 { 1441 bus_space_tag_t iot = sc->sc_iot; 1442 bus_space_handle_t ioh = sc->sc_ioh; 1443 1444 if (sc->sc_mcr_rts == 0) 1445 return; 1446 1447 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1448 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1449 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1450 } else { 1451 SET(sc->sc_mcr, sc->sc_mcr_rts); 1452 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1453 } 1454 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1455 } 1456 1457 1458 void 1459 comstart(tp) 1460 struct tty *tp; 1461 { 1462 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1463 bus_space_tag_t iot = sc->sc_iot; 1464 bus_space_handle_t ioh = sc->sc_ioh; 1465 int s; 1466 1467 s = spltty(); 1468 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1469 goto out; 1470 if (sc->sc_tx_stopped) 1471 goto out; 1472 1473 if (tp->t_outq.c_cc <= tp->t_lowat) { 1474 if (ISSET(tp->t_state, TS_ASLEEP)) { 1475 CLR(tp->t_state, TS_ASLEEP); 1476 wakeup(&tp->t_outq); 1477 } 1478 selwakeup(&tp->t_wsel); 1479 if (tp->t_outq.c_cc == 0) 1480 goto out; 1481 } 1482 1483 /* Grab the first contiguous region of buffer space. */ 1484 { 1485 u_char *tba; 1486 int tbc; 1487 1488 tba = tp->t_outq.c_cf; 1489 tbc = ndqb(&tp->t_outq, 0); 1490 1491 (void)splserial(); 1492 1493 sc->sc_tba = tba; 1494 sc->sc_tbc = tbc; 1495 } 1496 1497 SET(tp->t_state, TS_BUSY); 1498 sc->sc_tx_busy = 1; 1499 1500 /* Enable transmit completion interrupts if necessary. */ 1501 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1502 SET(sc->sc_ier, IER_ETXRDY); 1503 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1504 } 1505 1506 /* Output the first chunk of the contiguous buffer. */ 1507 { 1508 int n; 1509 1510 n = sc->sc_tbc; 1511 if (n > sc->sc_fifolen) 1512 n = sc->sc_fifolen; 1513 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1514 sc->sc_tbc -= n; 1515 sc->sc_tba += n; 1516 } 1517 out: 1518 splx(s); 1519 return; 1520 } 1521 1522 /* 1523 * Stop output on a line. 1524 */ 1525 void 1526 comstop(tp, flag) 1527 struct tty *tp; 1528 int flag; 1529 { 1530 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1531 int s; 1532 1533 s = splserial(); 1534 if (ISSET(tp->t_state, TS_BUSY)) { 1535 /* Stop transmitting at the next chunk. */ 1536 sc->sc_tbc = 0; 1537 sc->sc_heldtbc = 0; 1538 if (!ISSET(tp->t_state, TS_TTSTOP)) 1539 SET(tp->t_state, TS_FLUSH); 1540 } 1541 splx(s); 1542 } 1543 1544 void 1545 comdiag(arg) 1546 void *arg; 1547 { 1548 struct com_softc *sc = arg; 1549 int overflows, floods; 1550 int s; 1551 1552 s = splserial(); 1553 overflows = sc->sc_overflows; 1554 sc->sc_overflows = 0; 1555 floods = sc->sc_floods; 1556 sc->sc_floods = 0; 1557 sc->sc_errors = 0; 1558 splx(s); 1559 1560 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1561 sc->sc_dev.dv_xname, 1562 overflows, overflows == 1 ? "" : "s", 1563 floods, floods == 1 ? "" : "s"); 1564 } 1565 1566 integrate void 1567 com_rxsoft(sc, tp) 1568 struct com_softc *sc; 1569 struct tty *tp; 1570 { 1571 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1572 u_char *get, *end; 1573 u_int cc, scc; 1574 u_char lsr; 1575 int code; 1576 int s; 1577 1578 end = sc->sc_ebuf; 1579 get = sc->sc_rbget; 1580 scc = cc = com_rbuf_size - sc->sc_rbavail; 1581 1582 if (cc == com_rbuf_size) { 1583 sc->sc_floods++; 1584 if (sc->sc_errors++ == 0) 1585 timeout(comdiag, sc, 60 * hz); 1586 } 1587 1588 while (cc) { 1589 code = get[0]; 1590 lsr = get[1]; 1591 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1592 if (ISSET(lsr, LSR_OE)) { 1593 sc->sc_overflows++; 1594 if (sc->sc_errors++ == 0) 1595 timeout(comdiag, sc, 60 * hz); 1596 } 1597 if (ISSET(lsr, LSR_BI | LSR_FE)) 1598 SET(code, TTY_FE); 1599 if (ISSET(lsr, LSR_PE)) 1600 SET(code, TTY_PE); 1601 } 1602 if ((*rint)(code, tp) == -1) { 1603 /* 1604 * The line discipline's buffer is out of space. 1605 */ 1606 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1607 /* 1608 * We're either not using flow control, or the 1609 * line discipline didn't tell us to block for 1610 * some reason. Either way, we have no way to 1611 * know when there's more space available, so 1612 * just drop the rest of the data. 1613 */ 1614 get += cc << 1; 1615 if (get >= end) 1616 get -= com_rbuf_size << 1; 1617 cc = 0; 1618 } else { 1619 /* 1620 * Don't schedule any more receive processing 1621 * until the line discipline tells us there's 1622 * space available (through comhwiflow()). 1623 * Leave the rest of the data in the input 1624 * buffer. 1625 */ 1626 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1627 } 1628 break; 1629 } 1630 get += 2; 1631 if (get >= end) 1632 get = sc->sc_rbuf; 1633 cc--; 1634 } 1635 1636 if (cc != scc) { 1637 sc->sc_rbget = get; 1638 s = splserial(); 1639 cc = sc->sc_rbavail += scc - cc; 1640 /* Buffers should be ok again, release possible block. */ 1641 if (cc >= sc->sc_r_lowat) { 1642 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1643 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1644 SET(sc->sc_ier, IER_ERXRDY); 1645 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1646 } 1647 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1648 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1649 com_hwiflow(sc); 1650 } 1651 } 1652 splx(s); 1653 } 1654 } 1655 1656 integrate void 1657 com_txsoft(sc, tp) 1658 struct com_softc *sc; 1659 struct tty *tp; 1660 { 1661 1662 CLR(tp->t_state, TS_BUSY); 1663 if (ISSET(tp->t_state, TS_FLUSH)) 1664 CLR(tp->t_state, TS_FLUSH); 1665 else 1666 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1667 (*linesw[tp->t_line].l_start)(tp); 1668 } 1669 1670 integrate void 1671 com_stsoft(sc, tp) 1672 struct com_softc *sc; 1673 struct tty *tp; 1674 { 1675 u_char msr, delta; 1676 int s; 1677 1678 s = splserial(); 1679 msr = sc->sc_msr; 1680 delta = sc->sc_msr_delta; 1681 sc->sc_msr_delta = 0; 1682 splx(s); 1683 1684 if (ISSET(delta, sc->sc_msr_dcd)) { 1685 /* 1686 * Inform the tty layer that carrier detect changed. 1687 */ 1688 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1689 } 1690 1691 if (ISSET(delta, sc->sc_msr_cts)) { 1692 /* Block or unblock output according to flow control. */ 1693 if (ISSET(msr, sc->sc_msr_cts)) { 1694 sc->sc_tx_stopped = 0; 1695 (*linesw[tp->t_line].l_start)(tp); 1696 } else { 1697 sc->sc_tx_stopped = 1; 1698 } 1699 } 1700 1701 #ifdef COM_DEBUG 1702 if (com_debug) 1703 comstatus(sc, "com_stsoft"); 1704 #endif 1705 } 1706 1707 #ifdef __GENERIC_SOFT_INTERRUPTS 1708 void 1709 comsoft(arg) 1710 void *arg; 1711 { 1712 struct com_softc *sc = arg; 1713 struct tty *tp; 1714 1715 if (!sc->enabled) 1716 return; 1717 1718 { 1719 #else 1720 void 1721 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1722 comsoft() 1723 #else 1724 comsoft(arg) 1725 void *arg; 1726 #endif 1727 { 1728 struct com_softc *sc; 1729 struct tty *tp; 1730 int unit; 1731 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1732 int s; 1733 1734 s = splsoftserial(); 1735 com_softintr_scheduled = 0; 1736 #endif 1737 1738 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1739 sc = com_cd.cd_devs[unit]; 1740 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1741 continue; 1742 1743 if (!sc->enabled) 1744 continue; 1745 1746 tp = sc->sc_tty; 1747 if (tp == NULL) 1748 continue; 1749 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1750 continue; 1751 #endif 1752 tp = sc->sc_tty; 1753 1754 if (sc->sc_rx_ready) { 1755 sc->sc_rx_ready = 0; 1756 com_rxsoft(sc, tp); 1757 } 1758 1759 if (sc->sc_st_check) { 1760 sc->sc_st_check = 0; 1761 com_stsoft(sc, tp); 1762 } 1763 1764 if (sc->sc_tx_done) { 1765 sc->sc_tx_done = 0; 1766 com_txsoft(sc, tp); 1767 } 1768 } 1769 1770 #ifndef __GENERIC_SOFT_INTERRUPTS 1771 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1772 splx(s); 1773 #endif 1774 #endif 1775 } 1776 1777 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1778 /* there has got to be a better way to do comsoft() */ 1779 }} 1780 #endif 1781 1782 int 1783 comintr(arg) 1784 void *arg; 1785 { 1786 struct com_softc *sc = arg; 1787 bus_space_tag_t iot = sc->sc_iot; 1788 bus_space_handle_t ioh = sc->sc_ioh; 1789 u_char *put, *end; 1790 u_int cc; 1791 u_char lsr, iir; 1792 1793 if (!sc->enabled) 1794 return (0); 1795 1796 iir = bus_space_read_1(iot, ioh, com_iir); 1797 if (ISSET(iir, IIR_NOPEND)) 1798 return (0); 1799 1800 end = sc->sc_ebuf; 1801 put = sc->sc_rbput; 1802 cc = sc->sc_rbavail; 1803 1804 do { 1805 u_char msr, delta; 1806 1807 lsr = bus_space_read_1(iot, ioh, com_lsr); 1808 #if defined(DDB) || defined(KGDB) 1809 if (ISSET(lsr, LSR_BI)) { 1810 #ifdef DDB 1811 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1812 Debugger(); 1813 continue; 1814 } 1815 #endif 1816 #ifdef KGDB 1817 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1818 kgdb_connect(1); 1819 continue; 1820 } 1821 #endif 1822 } 1823 #endif /* DDB || KGDB */ 1824 1825 if (ISSET(lsr, LSR_RCV_MASK) && 1826 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1827 while (cc > 0) { 1828 put[0] = bus_space_read_1(iot, ioh, com_data); 1829 put[1] = lsr; 1830 put += 2; 1831 if (put >= end) 1832 put = sc->sc_rbuf; 1833 cc--; 1834 1835 lsr = bus_space_read_1(iot, ioh, com_lsr); 1836 if (!ISSET(lsr, LSR_RCV_MASK)) 1837 break; 1838 } 1839 1840 /* 1841 * Current string of incoming characters ended because 1842 * no more data was available or we ran out of space. 1843 * Schedule a receive event if any data was received. 1844 * If we're out of space, turn off receive interrupts. 1845 */ 1846 sc->sc_rbput = put; 1847 sc->sc_rbavail = cc; 1848 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1849 sc->sc_rx_ready = 1; 1850 1851 /* 1852 * See if we are in danger of overflowing a buffer. If 1853 * so, use hardware flow control to ease the pressure. 1854 */ 1855 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1856 cc < sc->sc_r_hiwat) { 1857 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1858 com_hwiflow(sc); 1859 } 1860 1861 /* 1862 * If we're out of space, disable receive interrupts 1863 * until the queue has drained a bit. 1864 */ 1865 if (!cc) { 1866 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1867 CLR(sc->sc_ier, IER_ERXRDY); 1868 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1869 } 1870 } else { 1871 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1872 bus_space_write_1(iot, ioh, com_ier, 0); 1873 delay(10); 1874 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1875 iir = IIR_NOPEND; 1876 continue; 1877 } 1878 } 1879 1880 msr = bus_space_read_1(iot, ioh, com_msr); 1881 delta = msr ^ sc->sc_msr; 1882 sc->sc_msr = msr; 1883 if (ISSET(delta, sc->sc_msr_mask)) { 1884 SET(sc->sc_msr_delta, delta); 1885 1886 /* 1887 * Pulse-per-second clock signal on edge of DCD? 1888 */ 1889 if (ISSET(delta, (sc->sc_ppsassertmask | 1890 sc->sc_ppsclearmask))) { 1891 struct timeval tv; 1892 if ((msr & sc->sc_ppsassertmask) == 1893 sc->sc_ppsassert) { 1894 1895 /* XXX nanotime() */ 1896 microtime(&tv); 1897 TIMEVAL_TO_TIMESPEC(&tv, 1898 &sc->ppsinfo.assert_timestamp); 1899 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1900 timespecadd(&sc->ppsinfo.assert_timestamp, 1901 &sc->ppsparam.assert_offset, 1902 &sc->ppsinfo.assert_timestamp); 1903 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1904 } 1905 1906 #ifdef PPS_SYNC 1907 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1908 hardpps(&tv, tv.tv_usec); 1909 #endif 1910 sc->ppsinfo.assert_sequence++; 1911 sc->ppsinfo.current_mode = 1912 sc->ppsparam.mode; 1913 1914 } else if ((msr & sc->sc_ppsclearmask) == 1915 sc->sc_ppsclear) { 1916 /* XXX nanotime() */ 1917 1918 microtime(&tv); 1919 TIMEVAL_TO_TIMESPEC(&tv, 1920 &sc->ppsinfo.clear_timestamp); 1921 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1922 timespecadd(&sc->ppsinfo.clear_timestamp, 1923 &sc->ppsparam.clear_offset, 1924 &sc->ppsinfo.clear_timestamp); 1925 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1926 } 1927 1928 #ifdef PPS_SYNC 1929 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1930 hardpps(&tv, tv.tv_usec); 1931 #endif 1932 sc->ppsinfo.clear_sequence++; 1933 sc->ppsinfo.current_mode = 1934 sc->ppsparam.mode; 1935 } 1936 } 1937 1938 /* 1939 * Stop output immediately if we lose the output 1940 * flow control signal or carrier detect. 1941 */ 1942 if (ISSET(~msr, sc->sc_msr_mask)) { 1943 sc->sc_tbc = 0; 1944 sc->sc_heldtbc = 0; 1945 #ifdef COM_DEBUG 1946 if (com_debug) 1947 comstatus(sc, "comintr "); 1948 #endif 1949 } 1950 1951 sc->sc_st_check = 1; 1952 } 1953 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1954 1955 /* 1956 * Done handling any receive interrupts. See if data can be 1957 * transmitted as well. Schedule tx done event if no data left 1958 * and tty was marked busy. 1959 */ 1960 if (ISSET(lsr, LSR_TXRDY)) { 1961 /* 1962 * If we've delayed a parameter change, do it now, and restart 1963 * output. 1964 */ 1965 if (sc->sc_heldchange) { 1966 com_loadchannelregs(sc); 1967 sc->sc_heldchange = 0; 1968 sc->sc_tbc = sc->sc_heldtbc; 1969 sc->sc_heldtbc = 0; 1970 } 1971 1972 /* Output the next chunk of the contiguous buffer, if any. */ 1973 if (sc->sc_tbc > 0) { 1974 int n; 1975 1976 n = sc->sc_tbc; 1977 if (n > sc->sc_fifolen) 1978 n = sc->sc_fifolen; 1979 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1980 sc->sc_tbc -= n; 1981 sc->sc_tba += n; 1982 } else { 1983 /* Disable transmit completion interrupts if necessary. */ 1984 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1985 CLR(sc->sc_ier, IER_ETXRDY); 1986 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1987 } 1988 if (sc->sc_tx_busy) { 1989 sc->sc_tx_busy = 0; 1990 sc->sc_tx_done = 1; 1991 } 1992 } 1993 } 1994 1995 /* Wake up the poller. */ 1996 #ifdef __GENERIC_SOFT_INTERRUPTS 1997 softintr_schedule(sc->sc_si); 1998 #else 1999 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2000 setsoftserial(); 2001 #else 2002 if (!com_softintr_scheduled) { 2003 com_softintr_scheduled = 1; 2004 timeout(comsoft, NULL, 1); 2005 } 2006 #endif 2007 #endif 2008 2009 #if NRND > 0 && defined(RND_COM) 2010 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2011 #endif 2012 2013 return (1); 2014 } 2015 2016 /* 2017 * The following functions are polled getc and putc routines, shared 2018 * by the console and kgdb glue. 2019 */ 2020 2021 int 2022 com_common_getc(iot, ioh) 2023 bus_space_tag_t iot; 2024 bus_space_handle_t ioh; 2025 { 2026 int s = splserial(); 2027 u_char stat, c; 2028 2029 /* block until a character becomes available */ 2030 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2031 ; 2032 2033 c = bus_space_read_1(iot, ioh, com_data); 2034 stat = bus_space_read_1(iot, ioh, com_iir); 2035 splx(s); 2036 return (c); 2037 } 2038 2039 void 2040 com_common_putc(iot, ioh, c) 2041 bus_space_tag_t iot; 2042 bus_space_handle_t ioh; 2043 int c; 2044 { 2045 int s = splserial(); 2046 u_char stat; 2047 int timo; 2048 2049 /* wait for any pending transmission to finish */ 2050 timo = 50000; 2051 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2052 && --timo) 2053 ; 2054 2055 bus_space_write_1(iot, ioh, com_data, c); 2056 /* wait for this transmission to complete */ 2057 timo = 1500000; 2058 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2059 && --timo) 2060 ; 2061 2062 /* clear any interrupts generated by this transmission */ 2063 stat = bus_space_read_1(iot, ioh, com_iir); 2064 splx(s); 2065 } 2066 2067 /* 2068 * Initialize UART to known state. 2069 */ 2070 int 2071 cominit(iot, iobase, rate, frequency, cflag, iohp) 2072 bus_space_tag_t iot; 2073 int iobase; 2074 int rate, frequency; 2075 tcflag_t cflag; 2076 bus_space_handle_t *iohp; 2077 { 2078 bus_space_handle_t ioh; 2079 2080 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2081 return (ENOMEM); /* ??? */ 2082 2083 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2084 bus_space_write_1(iot, ioh, com_efr, 0); 2085 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2086 rate = comspeed(rate, frequency); 2087 bus_space_write_1(iot, ioh, com_dlbl, rate); 2088 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2089 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2090 bus_space_write_1(iot, ioh, com_mcr, 0); 2091 bus_space_write_1(iot, ioh, com_fifo, 2092 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2093 bus_space_write_1(iot, ioh, com_ier, 0); 2094 2095 *iohp = ioh; 2096 return (0); 2097 } 2098 2099 /* 2100 * Following are all routines needed for COM to act as console 2101 */ 2102 2103 int 2104 comcnattach(iot, iobase, rate, frequency, cflag) 2105 bus_space_tag_t iot; 2106 int iobase; 2107 int rate, frequency; 2108 tcflag_t cflag; 2109 { 2110 int res; 2111 static struct consdev comcons = { 2112 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 2113 }; 2114 2115 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2116 if (res) 2117 return (res); 2118 2119 cn_tab = &comcons; 2120 2121 comconstag = iot; 2122 comconsaddr = iobase; 2123 comconsrate = rate; 2124 comconscflag = cflag; 2125 2126 return (0); 2127 } 2128 2129 int 2130 comcngetc(dev) 2131 dev_t dev; 2132 { 2133 2134 return (com_common_getc(comconstag, comconsioh)); 2135 } 2136 2137 /* 2138 * Console kernel output character routine. 2139 */ 2140 void 2141 comcnputc(dev, c) 2142 dev_t dev; 2143 int c; 2144 { 2145 2146 com_common_putc(comconstag, comconsioh, c); 2147 } 2148 2149 void 2150 comcnpollc(dev, on) 2151 dev_t dev; 2152 int on; 2153 { 2154 2155 } 2156 2157 #ifdef KGDB 2158 int 2159 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2160 bus_space_tag_t iot; 2161 int iobase; 2162 int rate, frequency; 2163 tcflag_t cflag; 2164 { 2165 int res; 2166 2167 if (iot == comconstag && iobase == comconsaddr) 2168 return (EBUSY); /* cannot share with console */ 2169 2170 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2171 if (res) 2172 return (res); 2173 2174 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2175 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2176 2177 com_kgdb_iot = iot; 2178 com_kgdb_addr = iobase; 2179 2180 return (0); 2181 } 2182 2183 /* ARGSUSED */ 2184 int 2185 com_kgdb_getc(arg) 2186 void *arg; 2187 { 2188 2189 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2190 } 2191 2192 /* ARGSUSED */ 2193 void 2194 com_kgdb_putc(arg, c) 2195 void *arg; 2196 int c; 2197 { 2198 2199 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2200 } 2201 #endif /* KGDB */ 2202 2203 /* helper function to identify the com ports used by 2204 console or KGDB (and not yet autoconf attached) */ 2205 int 2206 com_is_console(iot, iobase, ioh) 2207 bus_space_tag_t iot; 2208 int iobase; 2209 bus_space_handle_t *ioh; 2210 { 2211 bus_space_handle_t help; 2212 2213 if (!comconsattached && 2214 iot == comconstag && iobase == comconsaddr) 2215 help = comconsioh; 2216 #ifdef KGDB 2217 else if (!com_kgdb_attached && 2218 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2219 help = com_kgdb_ioh; 2220 #endif 2221 else 2222 return (0); 2223 2224 if (ioh) 2225 *ioh = help; 2226 return (1); 2227 } 2228
Indexes created Wed Sep 24 05:09:52 GMT 2025