com.c revision 1.145
1 /* $NetBSD: com.c,v 1.145 1998/07/04 22:18:50 jonathan Exp $ */ 2 3 /*- 4 * Copyright (c) 1993, 1994, 1995, 1996, 1997, 1998 5 * Charles M. Hannum. All rights reserved. 6 * 7 * Interrupt processing and hardware flow control partly based on code from 8 * Onno van der Linden and Gordon Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Charles M. Hannum. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * Copyright (c) 1991 The Regents of the University of California. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 * 68 * @(#)com.c 7.5 (Berkeley) 5/16/91 69 */ 70 71 /* 72 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 73 * Supports automatic hardware flow control on StarTech ST16C650A UART 74 */ 75 76 #include "opt_ddb.h" 77 78 #include "rnd.h" 79 #if NRND > 0 && defined(RND_COM) 80 #include <sys/rnd.h> 81 #endif 82 83 #include <sys/param.h> 84 #include <sys/systm.h> 85 #include <sys/ioctl.h> 86 #include <sys/select.h> 87 #include <sys/tty.h> 88 #include <sys/proc.h> 89 #include <sys/user.h> 90 #include <sys/conf.h> 91 #include <sys/file.h> 92 #include <sys/uio.h> 93 #include <sys/kernel.h> 94 #include <sys/syslog.h> 95 #include <sys/types.h> 96 #include <sys/device.h> 97 #include <sys/malloc.h> 98 #include <sys/timepps.h> 99 100 #include <machine/intr.h> 101 #include <machine/bus.h> 102 103 #include <dev/ic/comreg.h> 104 #include <dev/ic/comvar.h> 105 #include <dev/ic/ns16550reg.h> 106 #include <dev/ic/st16650reg.h> 107 #ifdef COM_HAYESP 108 #include <dev/ic/hayespreg.h> 109 #endif 110 #define com_lcr com_cfcr 111 #include <dev/cons.h> 112 113 #include "com.h" 114 115 #ifdef COM_HAYESP 116 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 117 #endif 118 119 #if defined(DDB) || defined(KGDB) 120 static void com_enable_debugport __P((struct com_softc *)); 121 #endif 122 void com_attach_subr __P((struct com_softc *sc)); 123 void com_config __P((struct com_softc *)); 124 void com_shutdown __P((struct com_softc *)); 125 int comspeed __P((long, long)); 126 static u_char cflag2lcr __P((tcflag_t)); 127 int comparam __P((struct tty *, struct termios *)); 128 void comstart __P((struct tty *)); 129 void comstop __P((struct tty *, int)); 130 int comhwiflow __P((struct tty *, int)); 131 132 void com_loadchannelregs __P((struct com_softc *)); 133 void com_hwiflow __P((struct com_softc *)); 134 void com_break __P((struct com_softc *, int)); 135 void com_modem __P((struct com_softc *, int)); 136 void com_iflush __P((struct com_softc *)); 137 138 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 139 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 140 141 /* XXX: These belong elsewhere */ 142 cdev_decl(com); 143 bdev_decl(com); 144 145 int comcngetc __P((dev_t)); 146 void comcnputc __P((dev_t, int)); 147 void comcnpollc __P((dev_t, int)); 148 149 #define integrate static inline 150 #ifdef __GENERIC_SOFT_INTERRUPTS 151 void comsoft __P((void *)); 152 #else 153 #ifndef __NO_SOFT_SERIAL_INTERRUPT 154 void comsoft __P((void)); 155 #else 156 void comsoft __P((void *)); 157 #endif 158 #endif 159 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 160 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 161 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 162 integrate void com_schedrx __P((struct com_softc *)); 163 void comdiag __P((void *)); 164 165 extern struct cfdriver com_cd; 166 167 /* 168 * Make this an option variable one can patch. 169 * But be warned: this must be a power of 2! 170 */ 171 u_int com_rbuf_size = COM_RING_SIZE; 172 173 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 174 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 175 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 176 177 static int comconsaddr; 178 static bus_space_tag_t comconstag; 179 static bus_space_handle_t comconsioh; 180 static int comconsattached; 181 static int comconsrate; 182 static tcflag_t comconscflag; 183 184 static int ppscap = 185 PPS_TSFMT_TSPEC | 186 PPS_CAPTUREASSERT | 187 PPS_CAPTURECLEAR | 188 #ifdef PPS_SYNC 189 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 190 #endif /* PPS_SYNC */ 191 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 192 193 static u_char tiocm_xxx2mcr __P((int)); 194 195 #ifndef __GENERIC_SOFT_INTERRUPTS 196 #ifdef __NO_SOFT_SERIAL_INTERRUPT 197 volatile int com_softintr_scheduled; 198 #endif 199 #endif 200 201 #ifdef KGDB 202 #include <sys/kgdb.h> 203 204 static int com_kgdb_addr; 205 static bus_space_tag_t com_kgdb_iot; 206 static bus_space_handle_t com_kgdb_ioh; 207 static int com_kgdb_attached; 208 209 int com_kgdb_getc __P((void *)); 210 void com_kgdb_putc __P((void *, int)); 211 #endif /* KGDB */ 212 213 #define COMUNIT(x) (minor(x) & 0x7ffff) 214 #define COMDIALOUT(x) (minor(x) & 0x80000) 215 216 int 217 comspeed(speed, frequency) 218 long speed, frequency; 219 { 220 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 221 222 int x, err; 223 224 #if 0 225 if (speed == 0) 226 return (0); 227 #endif 228 if (speed <= 0) 229 return (-1); 230 x = divrnd(frequency / 16, speed); 231 if (x <= 0) 232 return (-1); 233 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 234 if (err < 0) 235 err = -err; 236 if (err > COM_TOLERANCE) 237 return (-1); 238 return (x); 239 240 #undef divrnd(n, q) 241 } 242 243 #ifdef COM_DEBUG 244 int com_debug = 0; 245 246 void comstatus __P((struct com_softc *, char *)); 247 void 248 comstatus(sc, str) 249 struct com_softc *sc; 250 char *str; 251 { 252 struct tty *tp = sc->sc_tty; 253 254 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 255 sc->sc_dev.dv_xname, str, 256 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 257 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 258 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 259 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 260 sc->sc_tx_stopped ? "+" : "-"); 261 262 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 263 sc->sc_dev.dv_xname, str, 264 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 265 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 266 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 267 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 268 sc->sc_rx_flags); 269 } 270 #endif 271 272 int 273 comprobe1(iot, ioh, iobase) 274 bus_space_tag_t iot; 275 bus_space_handle_t ioh; 276 int iobase; 277 { 278 279 /* force access to id reg */ 280 bus_space_write_1(iot, ioh, com_lcr, 0); 281 bus_space_write_1(iot, ioh, com_iir, 0); 282 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 283 return (0); 284 285 return (1); 286 } 287 288 #ifdef COM_HAYESP 289 int 290 comprobeHAYESP(hayespioh, sc) 291 bus_space_handle_t hayespioh; 292 struct com_softc *sc; 293 { 294 char val, dips; 295 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 296 bus_space_tag_t iot = sc->sc_iot; 297 298 /* 299 * Hayes ESP cards have two iobases. One is for compatibility with 300 * 16550 serial chips, and at the same ISA PC base addresses. The 301 * other is for ESP-specific enhanced features, and lies at a 302 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 303 */ 304 305 /* Test for ESP signature */ 306 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 307 return (0); 308 309 /* 310 * ESP is present at ESP enhanced base address; unknown com port 311 */ 312 313 /* Get the dip-switch configurations */ 314 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 315 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 316 317 /* Determine which com port this ESP card services: bits 0,1 of */ 318 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 319 if (sc->sc_iobase != combaselist[dips & 0x03]) 320 return (0); 321 322 printf(": ESP"); 323 324 /* Check ESP Self Test bits. */ 325 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 326 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 327 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 328 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 329 if ((val & 0x70) < 0x20) { 330 printf("-old (%o)", val & 0x70); 331 /* we do not support the necessary features */ 332 return (0); 333 } 334 335 /* Check for ability to emulate 16550: bit 8 == 1 */ 336 if ((dips & 0x80) == 0) { 337 printf(" slave"); 338 /* XXX Does slave really mean no 16550 support?? */ 339 return (0); 340 } 341 342 /* 343 * If we made it this far, we are a full-featured ESP v2.0 (or 344 * better), at the correct com port address. 345 */ 346 347 SET(sc->sc_hwflags, COM_HW_HAYESP); 348 printf(", 1024 byte fifo\n"); 349 return (1); 350 } 351 #endif 352 353 #if defined(DDB) || defined(KGDB) 354 static void 355 com_enable_debugport(sc) 356 struct com_softc *sc; 357 { 358 int s; 359 360 /* Turn on line break interrupt, set carrier. */ 361 s = splserial(); 362 sc->sc_ier = IER_ERXRDY; 363 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 364 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 365 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 366 splx(s); 367 } 368 #endif 369 370 void 371 com_attach_subr(sc) 372 struct com_softc *sc; 373 { 374 int iobase = sc->sc_iobase; 375 bus_space_tag_t iot = sc->sc_iot; 376 bus_space_handle_t ioh = sc->sc_ioh; 377 struct tty *tp; 378 #ifdef COM16650 379 u_int8_t lcr; 380 #endif 381 #ifdef COM_HAYESP 382 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 383 int *hayespp; 384 #endif 385 386 /* Disable interrupts before configuring the device. */ 387 sc->sc_ier = 0; 388 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 389 390 if (iot == comconstag && iobase == comconsaddr) { 391 comconsattached = 1; 392 393 /* Make sure the console is always "hardwired". */ 394 delay(1000); /* wait for output to finish */ 395 SET(sc->sc_hwflags, COM_HW_CONSOLE); 396 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 397 } 398 399 #ifdef COM_HAYESP 400 /* Look for a Hayes ESP board. */ 401 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 402 bus_space_handle_t hayespioh; 403 404 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 405 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 406 continue; 407 if (comprobeHAYESP(hayespioh, sc)) { 408 sc->sc_hayespioh = hayespioh; 409 sc->sc_fifolen = 1024; 410 411 break; 412 } 413 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 414 } 415 /* No ESP; look for other things. */ 416 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 417 #endif 418 sc->sc_fifolen = 1; 419 /* look for a NS 16550AF UART with FIFOs */ 420 bus_space_write_1(iot, ioh, com_fifo, 421 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 422 delay(100); 423 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 424 == IIR_FIFO_MASK) 425 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 426 == FIFO_TRIGGER_14) { 427 SET(sc->sc_hwflags, COM_HW_FIFO); 428 429 #ifdef COM16650 430 /* 431 * IIR changes into the EFR if LCR is set to LCR_EERS 432 * on 16650s. We also know IIR != 0 at this point. 433 * Write 0 into the EFR, and read it. If the result 434 * is 0, we have a 16650. 435 * 436 * Older 16650s were broken; the test to detect them 437 * is taken from the Linux driver. Apparently 438 * setting DLAB enable gives access to the EFR on 439 * these chips. 440 */ 441 lcr = bus_space_read_1(iot, ioh, com_lcr); 442 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 443 bus_space_write_1(iot, ioh, com_efr, 0); 444 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 445 bus_space_write_1(iot, ioh, com_lcr, 446 lcr | LCR_DLAB); 447 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 448 CLR(sc->sc_hwflags, COM_HW_FIFO); 449 sc->sc_fifolen = 0; 450 } else { 451 SET(sc->sc_hwflags, COM_HW_FLOW); 452 sc->sc_fifolen = 32; 453 } 454 } else 455 #endif 456 sc->sc_fifolen = 16; 457 458 #ifdef COM16650 459 bus_space_write_1(iot, ioh, com_lcr, lcr); 460 if (sc->sc_fifolen == 0) 461 printf(": st16650, broken fifo\n"); 462 else if (sc->sc_fifolen == 32) 463 printf(": st16650a, working fifo\n"); 464 else 465 #endif 466 printf(": ns16550a, working fifo\n"); 467 } else 468 printf(": ns16550, broken fifo\n"); 469 else 470 printf(": ns8250 or ns16450, no fifo\n"); 471 bus_space_write_1(iot, ioh, com_fifo, 0); 472 #ifdef COM_HAYESP 473 } 474 #endif 475 476 tp = ttymalloc(); 477 tp->t_oproc = comstart; 478 tp->t_param = comparam; 479 tp->t_hwiflow = comhwiflow; 480 tty_attach(tp); 481 482 sc->sc_tty = tp; 483 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_WAITOK); 484 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 485 486 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 487 SET(sc->sc_mcr, MCR_IENABLE); 488 489 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 490 int maj; 491 492 /* locate the major number */ 493 for (maj = 0; maj < nchrdev; maj++) 494 if (cdevsw[maj].d_open == comopen) 495 break; 496 497 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 498 499 printf("%s: console\n", sc->sc_dev.dv_xname); 500 } 501 502 #ifdef KGDB 503 /* 504 * Allow kgdb to "take over" this port. If this is 505 * the kgdb device, it has exclusive use. 506 */ 507 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 508 com_kgdb_attached = 1; 509 510 SET(sc->sc_hwflags, COM_HW_KGDB); 511 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 512 } 513 #endif 514 515 #ifdef __GENERIC_SOFT_INTERRUPTS 516 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 517 #endif 518 519 #if NRND > 0 && defined(RND_COM) 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_TTY); 522 #endif 523 524 /* if there are no enable/disable functions, assume the device 525 is always enabled */ 526 if (!sc->enable) 527 sc->enabled = 1; 528 529 com_config(sc); 530 531 SET(sc->sc_hwflags, COM_HW_DEV_OK); 532 } 533 534 void 535 com_config(sc) 536 struct com_softc *sc; 537 { 538 bus_space_tag_t iot = sc->sc_iot; 539 bus_space_handle_t ioh = sc->sc_ioh; 540 541 /* Disable interrupts before configuring the device. */ 542 sc->sc_ier = 0; 543 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 544 545 #ifdef COM_HAYESP 546 /* Look for a Hayes ESP board. */ 547 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 548 sc->sc_fifolen = 1024; 549 550 /* Set 16550 compatibility mode */ 551 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 552 HAYESP_SETMODE); 553 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 554 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 555 HAYESP_MODE_SCALE); 556 557 /* Set RTS/CTS flow control */ 558 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 559 HAYESP_SETFLOWTYPE); 560 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 561 HAYESP_FLOW_RTS); 562 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 563 HAYESP_FLOW_CTS); 564 565 /* Set flow control levels */ 566 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 567 HAYESP_SETRXFLOW); 568 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 570 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 571 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 572 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 573 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 574 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 575 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 576 } 577 #endif 578 579 #ifdef DDB 580 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 581 com_enable_debugport(sc); 582 #endif 583 584 #ifdef KGDB 585 /* 586 * Allow kgdb to "take over" this port. If this is 587 * the kgdb device, it has exclusive use. 588 */ 589 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 590 com_enable_debugport(sc); 591 #endif 592 } 593 594 void 595 com_shutdown(sc) 596 struct com_softc *sc; 597 { 598 struct tty *tp = sc->sc_tty; 599 int s; 600 601 s = splserial(); 602 603 /* If we were asserting flow control, then deassert it. */ 604 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 605 com_hwiflow(sc); 606 607 /* Clear any break condition set with TIOCSBRK. */ 608 com_break(sc, 0); 609 610 /* Turn off PPS capture on last close. */ 611 sc->sc_ppsclearmask = 0; 612 sc->sc_ppsassertmask = 0; 613 sc->sc_ppsassert = 1; 614 sc->sc_ppsclear = 1; 615 sc->ppsparam.mode = 0; 616 617 /* 618 * Hang up if necessary. Wait a bit, so the other side has time to 619 * notice even if we immediately open the port again. 620 */ 621 if (ISSET(tp->t_cflag, HUPCL)) { 622 com_modem(sc, 0); 623 (void) tsleep(sc, TTIPRI, ttclos, hz); 624 } 625 626 /* Turn off interrupts. */ 627 #ifdef DDB 628 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 629 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 630 else 631 #endif 632 sc->sc_ier = 0; 633 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 634 635 if (sc->disable) { 636 #ifdef DIAGNOSTIC 637 if (!sc->enabled) 638 panic("com_shutdown: not enabled?"); 639 #endif 640 (*sc->disable)(sc); 641 sc->enabled = 0; 642 } 643 644 splx(s); 645 } 646 647 int 648 comopen(dev, flag, mode, p) 649 dev_t dev; 650 int flag, mode; 651 struct proc *p; 652 { 653 int unit = COMUNIT(dev); 654 struct com_softc *sc; 655 struct tty *tp; 656 int s, s2; 657 int error; 658 659 if (unit >= com_cd.cd_ndevs) 660 return (ENXIO); 661 sc = com_cd.cd_devs[unit]; 662 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 663 return (ENXIO); 664 665 #ifdef KGDB 666 /* 667 * If this is the kgdb port, no other use is permitted. 668 */ 669 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 670 return (EBUSY); 671 #endif 672 673 tp = sc->sc_tty; 674 675 if (ISSET(tp->t_state, TS_ISOPEN) && 676 ISSET(tp->t_state, TS_XCLUDE) && 677 p->p_ucred->cr_uid != 0) 678 return (EBUSY); 679 680 s = spltty(); 681 682 /* 683 * Do the following iff this is a first open. 684 */ 685 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 686 struct termios t; 687 688 tp->t_dev = dev; 689 690 s2 = splserial(); 691 692 if (sc->enable) { 693 if ((*sc->enable)(sc)) { 694 splx(s2); 695 splx(s); 696 printf("%s: device enable failed\n", 697 sc->sc_dev.dv_xname); 698 return (EIO); 699 } 700 sc->enabled = 1; 701 com_config(sc); 702 } 703 704 /* Turn on interrupts. */ 705 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 706 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 707 708 /* Fetch the current modem control status, needed later. */ 709 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 710 711 /* Clear PPS capture state on first open. */ 712 sc->sc_ppsclearmask = 0; 713 sc->sc_ppsassertmask = 0; 714 sc->sc_ppsassert = 1; 715 sc->sc_ppsclear = 1; 716 717 splx(s2); 718 719 /* 720 * Initialize the termios status to the defaults. Add in the 721 * sticky bits from TIOCSFLAGS. 722 */ 723 t.c_ispeed = 0; 724 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 725 t.c_ospeed = comconsrate; 726 t.c_cflag = comconscflag; 727 } else { 728 t.c_ospeed = TTYDEF_SPEED; 729 t.c_cflag = TTYDEF_CFLAG; 730 } 731 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 732 SET(t.c_cflag, CLOCAL); 733 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 734 SET(t.c_cflag, CRTSCTS); 735 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 736 SET(t.c_cflag, MDMBUF); 737 /* Make sure comparam() will do something. */ 738 tp->t_ospeed = 0; 739 (void) comparam(tp, &t); 740 tp->t_iflag = TTYDEF_IFLAG; 741 tp->t_oflag = TTYDEF_OFLAG; 742 tp->t_lflag = TTYDEF_LFLAG; 743 ttychars(tp); 744 ttsetwater(tp); 745 746 s2 = splserial(); 747 748 /* 749 * Turn on DTR. We must always do this, even if carrier is not 750 * present, because otherwise we'd have to use TIOCSDTR 751 * immediately after setting CLOCAL, which applications do not 752 * expect. We always assert DTR while the device is open 753 * unless explicitly requested to deassert it. 754 */ 755 com_modem(sc, 1); 756 757 /* Clear the input ring, and unblock. */ 758 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 759 sc->sc_rbavail = com_rbuf_size; 760 com_iflush(sc); 761 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 762 com_hwiflow(sc); 763 764 #ifdef COM_DEBUG 765 if (com_debug) 766 comstatus(sc, "comopen "); 767 #endif 768 769 splx(s2); 770 } 771 772 splx(s); 773 774 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 775 if (error) 776 goto bad; 777 778 error = (*linesw[tp->t_line].l_open)(dev, tp); 779 if (error) 780 goto bad; 781 782 return (0); 783 784 bad: 785 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 786 /* 787 * We failed to open the device, and nobody else had it opened. 788 * Clean up the state as appropriate. 789 */ 790 com_shutdown(sc); 791 } 792 793 return (error); 794 } 795 796 int 797 comclose(dev, flag, mode, p) 798 dev_t dev; 799 int flag, mode; 800 struct proc *p; 801 { 802 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 803 struct tty *tp = sc->sc_tty; 804 805 /* XXX This is for cons.c. */ 806 if (!ISSET(tp->t_state, TS_ISOPEN)) 807 return (0); 808 809 (*linesw[tp->t_line].l_close)(tp, flag); 810 ttyclose(tp); 811 812 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 813 /* 814 * Although we got a last close, the device may still be in 815 * use; e.g. if this was the dialout node, and there are still 816 * processes waiting for carrier on the non-dialout node. 817 */ 818 com_shutdown(sc); 819 } 820 821 return (0); 822 } 823 824 int 825 comread(dev, uio, flag) 826 dev_t dev; 827 struct uio *uio; 828 int flag; 829 { 830 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 831 struct tty *tp = sc->sc_tty; 832 833 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 834 } 835 836 int 837 comwrite(dev, uio, flag) 838 dev_t dev; 839 struct uio *uio; 840 int flag; 841 { 842 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 843 struct tty *tp = sc->sc_tty; 844 845 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 846 } 847 848 struct tty * 849 comtty(dev) 850 dev_t dev; 851 { 852 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 853 struct tty *tp = sc->sc_tty; 854 855 return (tp); 856 } 857 858 static u_char 859 tiocm_xxx2mcr(data) 860 int data; 861 { 862 u_char m = 0; 863 864 if (ISSET(data, TIOCM_DTR)) 865 SET(m, MCR_DTR); 866 if (ISSET(data, TIOCM_RTS)) 867 SET(m, MCR_RTS); 868 return m; 869 } 870 871 int 872 comioctl(dev, cmd, data, flag, p) 873 dev_t dev; 874 u_long cmd; 875 caddr_t data; 876 int flag; 877 struct proc *p; 878 { 879 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 880 struct tty *tp = sc->sc_tty; 881 int error; 882 int s; 883 884 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 885 if (error >= 0) 886 return (error); 887 888 error = ttioctl(tp, cmd, data, flag, p); 889 if (error >= 0) 890 return (error); 891 892 error = 0; 893 894 s = splserial(); 895 896 switch (cmd) { 897 case TIOCSBRK: 898 com_break(sc, 1); 899 break; 900 901 case TIOCCBRK: 902 com_break(sc, 0); 903 break; 904 905 case TIOCSDTR: 906 com_modem(sc, 1); 907 break; 908 909 case TIOCCDTR: 910 com_modem(sc, 0); 911 break; 912 913 case TIOCGFLAGS: 914 *(int *)data = sc->sc_swflags; 915 break; 916 917 case TIOCSFLAGS: 918 error = suser(p->p_ucred, &p->p_acflag); 919 if (error) 920 break; 921 sc->sc_swflags = *(int *)data; 922 break; 923 924 case TIOCMSET: 925 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 926 /*FALLTHROUGH*/ 927 928 case TIOCMBIS: 929 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 930 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 931 break; 932 933 case TIOCMBIC: 934 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 935 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 936 break; 937 938 case TIOCMGET: { 939 u_char m; 940 int bits = 0; 941 942 m = sc->sc_mcr; 943 if (ISSET(m, MCR_DTR)) 944 SET(bits, TIOCM_DTR); 945 if (ISSET(m, MCR_RTS)) 946 SET(bits, TIOCM_RTS); 947 m = sc->sc_msr; 948 if (ISSET(m, MSR_DCD)) 949 SET(bits, TIOCM_CD); 950 if (ISSET(m, MSR_CTS)) 951 SET(bits, TIOCM_CTS); 952 if (ISSET(m, MSR_DSR)) 953 SET(bits, TIOCM_DSR); 954 if (ISSET(m, MSR_RI | MSR_TERI)) 955 SET(bits, TIOCM_RI); 956 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 957 SET(bits, TIOCM_LE); 958 *(int *)data = bits; 959 break; 960 } 961 962 case PPS_CREATE: 963 break; 964 965 case PPS_DESTROY: 966 break; 967 968 case PPS_GETPARAMS: { 969 pps_params_t *pp; 970 pp = (pps_params_t *)data; 971 *pp = sc->ppsparam; 972 break; 973 } 974 975 case PPS_SETPARAMS: { 976 pps_params_t *pp; 977 int mode; 978 pp = (pps_params_t *)data; 979 if (pp->mode & ~ppscap) { 980 error = EINVAL; 981 break; 982 } 983 sc->ppsparam = *pp; 984 /* 985 * Compute msr masks from user-specified timestamp state. 986 */ 987 mode = sc->ppsparam.mode; 988 if (mode & PPS_HARDPPSONASSERT) { 989 mode |= PPS_CAPTUREASSERT; 990 /* XXX revoke any previous HARDPPS source */ 991 } 992 if (mode & PPS_HARDPPSONCLEAR) { 993 mode |= PPS_CAPTURECLEAR; 994 /* XXX revoke any previous HARDPPS source */ 995 } 996 switch (mode & PPS_CAPTUREBOTH) { 997 case 0: 998 sc->sc_ppsassertmask = 0; 999 sc->sc_ppsassert = 1; 1000 sc->sc_ppsclearmask = 0; 1001 sc->sc_ppsclear = 1; 1002 break; 1003 1004 case PPS_CAPTUREASSERT: 1005 sc->sc_ppsassertmask = MSR_DCD; 1006 sc->sc_ppsassert = MSR_DCD; 1007 sc->sc_ppsclearmask = 0; 1008 sc->sc_ppsclear = 1; 1009 break; 1010 1011 case PPS_CAPTURECLEAR: 1012 sc->sc_ppsassertmask = 0; 1013 sc->sc_ppsassert = 1; 1014 sc->sc_ppsclearmask = MSR_DCD; 1015 sc->sc_ppsclear = 0; 1016 break; 1017 1018 case PPS_CAPTUREBOTH: 1019 sc->sc_ppsassertmask = MSR_DCD; 1020 sc->sc_ppsclearmask = MSR_DCD; 1021 sc->sc_ppsassert = MSR_DCD; 1022 sc->sc_ppsclear = 0; 1023 break; 1024 1025 default: 1026 error = EINVAL; 1027 break; 1028 } 1029 break; 1030 } 1031 1032 case PPS_GETCAP: 1033 *(int*)data = ppscap; 1034 break; 1035 1036 case PPS_FETCH: { 1037 pps_info_t *pi; 1038 pi = (pps_info_t *)data; 1039 *pi = sc->ppsinfo; 1040 break; 1041 } 1042 1043 case PPS_WAIT: 1044 /* XXX */ 1045 error = EOPNOTSUPP; 1046 break; 1047 1048 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1049 /* 1050 * Some GPS clocks models use the falling rather than 1051 * rising edge as the on-the-second signal. 1052 * The old API has no way to specify PPS polarity. 1053 */ 1054 #ifndef PPS_TRAILING_EDGE 1055 sc->sc_ppsassertmask = MSR_DCD; 1056 sc->sc_ppsassert = MSR_DCD; 1057 sc->sc_ppsclearmask = 0; 1058 sc->sc_ppsclear = 1; 1059 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1060 &sc->ppsinfo.assert_timestamp); 1061 #else 1062 sc->sc_ppsassertmask = 0; 1063 sc->sc_ppsassert = 1 1064 sc->sc_ppsclearmask = MSR_DCD; 1065 sc->sc_ppsclear = 0; 1066 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1067 &sc->ppsinfo.clear_timestamp); 1068 #endif 1069 break; 1070 1071 default: 1072 error = ENOTTY; 1073 break; 1074 } 1075 1076 splx(s); 1077 1078 #ifdef COM_DEBUG 1079 if (com_debug) 1080 comstatus(sc, "comioctl "); 1081 #endif 1082 1083 return (error); 1084 } 1085 1086 integrate void 1087 com_schedrx(sc) 1088 struct com_softc *sc; 1089 { 1090 1091 sc->sc_rx_ready = 1; 1092 1093 /* Wake up the poller. */ 1094 #ifdef __GENERIC_SOFT_INTERRUPTS 1095 softintr_schedule(sc->sc_si); 1096 #else 1097 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1098 setsoftserial(); 1099 #else 1100 if (!com_softintr_scheduled) { 1101 com_softintr_scheduled = 1; 1102 timeout(comsoft, NULL, 1); 1103 } 1104 #endif 1105 #endif 1106 } 1107 1108 void 1109 com_break(sc, onoff) 1110 struct com_softc *sc; 1111 int onoff; 1112 { 1113 1114 if (onoff) 1115 SET(sc->sc_lcr, LCR_SBREAK); 1116 else 1117 CLR(sc->sc_lcr, LCR_SBREAK); 1118 1119 if (!sc->sc_heldchange) { 1120 if (sc->sc_tx_busy) { 1121 sc->sc_heldtbc = sc->sc_tbc; 1122 sc->sc_tbc = 0; 1123 sc->sc_heldchange = 1; 1124 } else 1125 com_loadchannelregs(sc); 1126 } 1127 } 1128 1129 void 1130 com_modem(sc, onoff) 1131 struct com_softc *sc; 1132 int onoff; 1133 { 1134 1135 if (onoff) 1136 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1137 else 1138 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1139 1140 if (!sc->sc_heldchange) { 1141 if (sc->sc_tx_busy) { 1142 sc->sc_heldtbc = sc->sc_tbc; 1143 sc->sc_tbc = 0; 1144 sc->sc_heldchange = 1; 1145 } else 1146 com_loadchannelregs(sc); 1147 } 1148 } 1149 1150 static u_char 1151 cflag2lcr(cflag) 1152 tcflag_t cflag; 1153 { 1154 u_char lcr = 0; 1155 1156 switch (ISSET(cflag, CSIZE)) { 1157 case CS5: 1158 SET(lcr, LCR_5BITS); 1159 break; 1160 case CS6: 1161 SET(lcr, LCR_6BITS); 1162 break; 1163 case CS7: 1164 SET(lcr, LCR_7BITS); 1165 break; 1166 case CS8: 1167 SET(lcr, LCR_8BITS); 1168 break; 1169 } 1170 if (ISSET(cflag, PARENB)) { 1171 SET(lcr, LCR_PENAB); 1172 if (!ISSET(cflag, PARODD)) 1173 SET(lcr, LCR_PEVEN); 1174 } 1175 if (ISSET(cflag, CSTOPB)) 1176 SET(lcr, LCR_STOPB); 1177 1178 return (lcr); 1179 } 1180 1181 int 1182 comparam(tp, t) 1183 struct tty *tp; 1184 struct termios *t; 1185 { 1186 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1187 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1188 u_char lcr; 1189 int s; 1190 1191 /* Check requested parameters. */ 1192 if (ospeed < 0) 1193 return (EINVAL); 1194 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1195 return (EINVAL); 1196 1197 /* 1198 * For the console, always force CLOCAL and !HUPCL, so that the port 1199 * is always active. 1200 */ 1201 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1202 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1203 SET(t->c_cflag, CLOCAL); 1204 CLR(t->c_cflag, HUPCL); 1205 } 1206 1207 /* 1208 * If there were no changes, don't do anything. This avoids dropping 1209 * input and improves performance when all we did was frob things like 1210 * VMIN and VTIME. 1211 */ 1212 if (tp->t_ospeed == t->c_ospeed && 1213 tp->t_cflag == t->c_cflag) 1214 return (0); 1215 1216 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1217 1218 s = splserial(); 1219 1220 sc->sc_lcr = lcr; 1221 1222 /* 1223 * If we're not in a mode that assumes a connection is present, then 1224 * ignore carrier changes. 1225 */ 1226 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1227 sc->sc_msr_dcd = 0; 1228 else 1229 sc->sc_msr_dcd = MSR_DCD; 1230 /* 1231 * Set the flow control pins depending on the current flow control 1232 * mode. 1233 */ 1234 if (ISSET(t->c_cflag, CRTSCTS)) { 1235 sc->sc_mcr_dtr = MCR_DTR; 1236 sc->sc_mcr_rts = MCR_RTS; 1237 sc->sc_msr_cts = MSR_CTS; 1238 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1239 } else if (ISSET(t->c_cflag, MDMBUF)) { 1240 /* 1241 * For DTR/DCD flow control, make sure we don't toggle DTR for 1242 * carrier detection. 1243 */ 1244 sc->sc_mcr_dtr = 0; 1245 sc->sc_mcr_rts = MCR_DTR; 1246 sc->sc_msr_cts = MSR_DCD; 1247 sc->sc_efr = 0; 1248 } else { 1249 /* 1250 * If no flow control, then always set RTS. This will make 1251 * the other side happy if it mistakenly thinks we're doing 1252 * RTS/CTS flow control. 1253 */ 1254 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1255 sc->sc_mcr_rts = 0; 1256 sc->sc_msr_cts = 0; 1257 sc->sc_efr = 0; 1258 if (ISSET(sc->sc_mcr, MCR_DTR)) 1259 SET(sc->sc_mcr, MCR_RTS); 1260 else 1261 CLR(sc->sc_mcr, MCR_RTS); 1262 } 1263 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1264 1265 #if 0 1266 if (ospeed == 0) 1267 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1268 else 1269 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1270 #endif 1271 1272 sc->sc_dlbl = ospeed; 1273 sc->sc_dlbh = ospeed >> 8; 1274 1275 /* 1276 * Set the FIFO threshold based on the receive speed. 1277 * 1278 * * If it's a low speed, it's probably a mouse or some other 1279 * interactive device, so set the threshold low. 1280 * * If it's a high speed, trim the trigger level down to prevent 1281 * overflows. 1282 * * Otherwise set it a bit higher. 1283 */ 1284 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1285 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1286 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1287 sc->sc_fifo = FIFO_ENABLE | 1288 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1289 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1290 else 1291 sc->sc_fifo = 0; 1292 1293 /* And copy to tty. */ 1294 tp->t_ispeed = 0; 1295 tp->t_ospeed = t->c_ospeed; 1296 tp->t_cflag = t->c_cflag; 1297 1298 if (!sc->sc_heldchange) { 1299 if (sc->sc_tx_busy) { 1300 sc->sc_heldtbc = sc->sc_tbc; 1301 sc->sc_tbc = 0; 1302 sc->sc_heldchange = 1; 1303 } else 1304 com_loadchannelregs(sc); 1305 } 1306 1307 if (!ISSET(t->c_cflag, CHWFLOW)) { 1308 /* Disable the high water mark. */ 1309 sc->sc_r_hiwat = 0; 1310 sc->sc_r_lowat = 0; 1311 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1312 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1313 com_schedrx(sc); 1314 } 1315 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1316 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1317 com_hwiflow(sc); 1318 } 1319 } else { 1320 sc->sc_r_hiwat = com_rbuf_hiwat; 1321 sc->sc_r_lowat = com_rbuf_lowat; 1322 } 1323 1324 splx(s); 1325 1326 /* 1327 * Update the tty layer's idea of the carrier bit, in case we changed 1328 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1329 * explicit request. 1330 */ 1331 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1332 1333 #ifdef COM_DEBUG 1334 if (com_debug) 1335 comstatus(sc, "comparam "); 1336 #endif 1337 1338 if (!ISSET(t->c_cflag, CHWFLOW)) { 1339 if (sc->sc_tx_stopped) { 1340 sc->sc_tx_stopped = 0; 1341 comstart(tp); 1342 } 1343 } 1344 1345 return (0); 1346 } 1347 1348 void 1349 com_iflush(sc) 1350 struct com_softc *sc; 1351 { 1352 bus_space_tag_t iot = sc->sc_iot; 1353 bus_space_handle_t ioh = sc->sc_ioh; 1354 #ifdef DIAGNOSTIC 1355 int reg; 1356 #endif 1357 int timo; 1358 1359 #ifdef DIAGNOSTIC 1360 reg = 0xffff; 1361 #endif 1362 timo = 50000; 1363 /* flush any pending I/O */ 1364 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1365 && --timo) 1366 #ifdef DIAGNOSTIC 1367 reg = 1368 #else 1369 (void) 1370 #endif 1371 bus_space_read_1(iot, ioh, com_data); 1372 #ifdef DIAGNOSTIC 1373 if (!timo) 1374 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1375 reg); 1376 #endif 1377 } 1378 1379 void 1380 com_loadchannelregs(sc) 1381 struct com_softc *sc; 1382 { 1383 bus_space_tag_t iot = sc->sc_iot; 1384 bus_space_handle_t ioh = sc->sc_ioh; 1385 1386 /* XXXXX necessary? */ 1387 com_iflush(sc); 1388 1389 bus_space_write_1(iot, ioh, com_ier, 0); 1390 1391 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1392 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1393 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1394 } 1395 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1396 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1397 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1398 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1399 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1400 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1401 1402 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1403 } 1404 1405 int 1406 comhwiflow(tp, block) 1407 struct tty *tp; 1408 int block; 1409 { 1410 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1411 int s; 1412 1413 if (sc->sc_mcr_rts == 0) 1414 return (0); 1415 1416 s = splserial(); 1417 if (block) { 1418 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1419 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1420 com_hwiflow(sc); 1421 } 1422 } else { 1423 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1424 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1425 com_schedrx(sc); 1426 } 1427 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1428 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1429 com_hwiflow(sc); 1430 } 1431 } 1432 splx(s); 1433 return (1); 1434 } 1435 1436 /* 1437 * (un)block input via hw flowcontrol 1438 */ 1439 void 1440 com_hwiflow(sc) 1441 struct com_softc *sc; 1442 { 1443 bus_space_tag_t iot = sc->sc_iot; 1444 bus_space_handle_t ioh = sc->sc_ioh; 1445 1446 if (sc->sc_mcr_rts == 0) 1447 return; 1448 1449 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1450 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1451 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1452 } else { 1453 SET(sc->sc_mcr, sc->sc_mcr_rts); 1454 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1455 } 1456 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1457 } 1458 1459 1460 void 1461 comstart(tp) 1462 struct tty *tp; 1463 { 1464 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1465 bus_space_tag_t iot = sc->sc_iot; 1466 bus_space_handle_t ioh = sc->sc_ioh; 1467 int s; 1468 1469 s = spltty(); 1470 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1471 goto out; 1472 if (sc->sc_tx_stopped) 1473 goto out; 1474 1475 if (tp->t_outq.c_cc <= tp->t_lowat) { 1476 if (ISSET(tp->t_state, TS_ASLEEP)) { 1477 CLR(tp->t_state, TS_ASLEEP); 1478 wakeup(&tp->t_outq); 1479 } 1480 selwakeup(&tp->t_wsel); 1481 if (tp->t_outq.c_cc == 0) 1482 goto out; 1483 } 1484 1485 /* Grab the first contiguous region of buffer space. */ 1486 { 1487 u_char *tba; 1488 int tbc; 1489 1490 tba = tp->t_outq.c_cf; 1491 tbc = ndqb(&tp->t_outq, 0); 1492 1493 (void)splserial(); 1494 1495 sc->sc_tba = tba; 1496 sc->sc_tbc = tbc; 1497 } 1498 1499 SET(tp->t_state, TS_BUSY); 1500 sc->sc_tx_busy = 1; 1501 1502 /* Enable transmit completion interrupts if necessary. */ 1503 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1504 SET(sc->sc_ier, IER_ETXRDY); 1505 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1506 } 1507 1508 /* Output the first chunk of the contiguous buffer. */ 1509 { 1510 int n; 1511 1512 n = sc->sc_tbc; 1513 if (n > sc->sc_fifolen) 1514 n = sc->sc_fifolen; 1515 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1516 sc->sc_tbc -= n; 1517 sc->sc_tba += n; 1518 } 1519 out: 1520 splx(s); 1521 return; 1522 } 1523 1524 /* 1525 * Stop output on a line. 1526 */ 1527 void 1528 comstop(tp, flag) 1529 struct tty *tp; 1530 int flag; 1531 { 1532 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1533 int s; 1534 1535 s = splserial(); 1536 if (ISSET(tp->t_state, TS_BUSY)) { 1537 /* Stop transmitting at the next chunk. */ 1538 sc->sc_tbc = 0; 1539 sc->sc_heldtbc = 0; 1540 if (!ISSET(tp->t_state, TS_TTSTOP)) 1541 SET(tp->t_state, TS_FLUSH); 1542 } 1543 splx(s); 1544 } 1545 1546 void 1547 comdiag(arg) 1548 void *arg; 1549 { 1550 struct com_softc *sc = arg; 1551 int overflows, floods; 1552 int s; 1553 1554 s = splserial(); 1555 overflows = sc->sc_overflows; 1556 sc->sc_overflows = 0; 1557 floods = sc->sc_floods; 1558 sc->sc_floods = 0; 1559 sc->sc_errors = 0; 1560 splx(s); 1561 1562 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1563 sc->sc_dev.dv_xname, 1564 overflows, overflows == 1 ? "" : "s", 1565 floods, floods == 1 ? "" : "s"); 1566 } 1567 1568 integrate void 1569 com_rxsoft(sc, tp) 1570 struct com_softc *sc; 1571 struct tty *tp; 1572 { 1573 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1574 u_char *get, *end; 1575 u_int cc, scc; 1576 u_char lsr; 1577 int code; 1578 int s; 1579 1580 end = sc->sc_ebuf; 1581 get = sc->sc_rbget; 1582 scc = cc = com_rbuf_size - sc->sc_rbavail; 1583 1584 if (cc == com_rbuf_size) { 1585 sc->sc_floods++; 1586 if (sc->sc_errors++ == 0) 1587 timeout(comdiag, sc, 60 * hz); 1588 } 1589 1590 while (cc) { 1591 code = get[0]; 1592 lsr = get[1]; 1593 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1594 if (ISSET(lsr, LSR_OE)) { 1595 sc->sc_overflows++; 1596 if (sc->sc_errors++ == 0) 1597 timeout(comdiag, sc, 60 * hz); 1598 } 1599 if (ISSET(lsr, LSR_BI | LSR_FE)) 1600 SET(code, TTY_FE); 1601 if (ISSET(lsr, LSR_PE)) 1602 SET(code, TTY_PE); 1603 } 1604 if ((*rint)(code, tp) == -1) { 1605 /* 1606 * The line discipline's buffer is out of space. 1607 */ 1608 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1609 /* 1610 * We're either not using flow control, or the 1611 * line discipline didn't tell us to block for 1612 * some reason. Either way, we have no way to 1613 * know when there's more space available, so 1614 * just drop the rest of the data. 1615 */ 1616 get += cc << 1; 1617 if (get >= end) 1618 get -= com_rbuf_size << 1; 1619 cc = 0; 1620 } else { 1621 /* 1622 * Don't schedule any more receive processing 1623 * until the line discipline tells us there's 1624 * space available (through comhwiflow()). 1625 * Leave the rest of the data in the input 1626 * buffer. 1627 */ 1628 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1629 } 1630 break; 1631 } 1632 get += 2; 1633 if (get >= end) 1634 get = sc->sc_rbuf; 1635 cc--; 1636 } 1637 1638 if (cc != scc) { 1639 sc->sc_rbget = get; 1640 s = splserial(); 1641 cc = sc->sc_rbavail += scc - cc; 1642 /* Buffers should be ok again, release possible block. */ 1643 if (cc >= sc->sc_r_lowat) { 1644 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1645 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1646 SET(sc->sc_ier, IER_ERXRDY); 1647 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1648 } 1649 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1650 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1651 com_hwiflow(sc); 1652 } 1653 } 1654 splx(s); 1655 } 1656 } 1657 1658 integrate void 1659 com_txsoft(sc, tp) 1660 struct com_softc *sc; 1661 struct tty *tp; 1662 { 1663 1664 CLR(tp->t_state, TS_BUSY); 1665 if (ISSET(tp->t_state, TS_FLUSH)) 1666 CLR(tp->t_state, TS_FLUSH); 1667 else 1668 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1669 (*linesw[tp->t_line].l_start)(tp); 1670 } 1671 1672 integrate void 1673 com_stsoft(sc, tp) 1674 struct com_softc *sc; 1675 struct tty *tp; 1676 { 1677 u_char msr, delta; 1678 int s; 1679 1680 s = splserial(); 1681 msr = sc->sc_msr; 1682 delta = sc->sc_msr_delta; 1683 sc->sc_msr_delta = 0; 1684 splx(s); 1685 1686 if (ISSET(delta, sc->sc_msr_dcd)) { 1687 /* 1688 * Inform the tty layer that carrier detect changed. 1689 */ 1690 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1691 } 1692 1693 if (ISSET(delta, sc->sc_msr_cts)) { 1694 /* Block or unblock output according to flow control. */ 1695 if (ISSET(msr, sc->sc_msr_cts)) { 1696 sc->sc_tx_stopped = 0; 1697 (*linesw[tp->t_line].l_start)(tp); 1698 } else { 1699 sc->sc_tx_stopped = 1; 1700 } 1701 } 1702 1703 #ifdef COM_DEBUG 1704 if (com_debug) 1705 comstatus(sc, "com_stsoft"); 1706 #endif 1707 } 1708 1709 #ifdef __GENERIC_SOFT_INTERRUPTS 1710 void 1711 comsoft(arg) 1712 void *arg; 1713 { 1714 struct com_softc *sc = arg; 1715 struct tty *tp; 1716 1717 if (!sc->enabled) 1718 return; 1719 1720 { 1721 #else 1722 void 1723 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1724 comsoft() 1725 #else 1726 comsoft(arg) 1727 void *arg; 1728 #endif 1729 { 1730 struct com_softc *sc; 1731 struct tty *tp; 1732 int unit; 1733 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1734 int s; 1735 1736 s = splsoftserial(); 1737 com_softintr_scheduled = 0; 1738 #endif 1739 1740 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1741 sc = com_cd.cd_devs[unit]; 1742 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1743 continue; 1744 1745 if (!sc->enabled) 1746 continue; 1747 1748 tp = sc->sc_tty; 1749 if (tp == NULL) 1750 continue; 1751 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1752 continue; 1753 #endif 1754 tp = sc->sc_tty; 1755 1756 if (sc->sc_rx_ready) { 1757 sc->sc_rx_ready = 0; 1758 com_rxsoft(sc, tp); 1759 } 1760 1761 if (sc->sc_st_check) { 1762 sc->sc_st_check = 0; 1763 com_stsoft(sc, tp); 1764 } 1765 1766 if (sc->sc_tx_done) { 1767 sc->sc_tx_done = 0; 1768 com_txsoft(sc, tp); 1769 } 1770 } 1771 1772 #ifndef __GENERIC_SOFT_INTERRUPTS 1773 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1774 splx(s); 1775 #endif 1776 #endif 1777 } 1778 1779 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1780 /* there has got to be a better way to do comsoft() */ 1781 }} 1782 #endif 1783 1784 int 1785 comintr(arg) 1786 void *arg; 1787 { 1788 struct com_softc *sc = arg; 1789 bus_space_tag_t iot = sc->sc_iot; 1790 bus_space_handle_t ioh = sc->sc_ioh; 1791 u_char *put, *end; 1792 u_int cc; 1793 u_char lsr, iir; 1794 1795 if (!sc->enabled) 1796 return (0); 1797 1798 iir = bus_space_read_1(iot, ioh, com_iir); 1799 if (ISSET(iir, IIR_NOPEND)) 1800 return (0); 1801 1802 end = sc->sc_ebuf; 1803 put = sc->sc_rbput; 1804 cc = sc->sc_rbavail; 1805 1806 do { 1807 u_char msr, delta; 1808 1809 lsr = bus_space_read_1(iot, ioh, com_lsr); 1810 #if defined(DDB) || defined(KGDB) 1811 if (ISSET(lsr, LSR_BI)) { 1812 #ifdef DDB 1813 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1814 Debugger(); 1815 continue; 1816 } 1817 #endif 1818 #ifdef KGDB 1819 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1820 kgdb_connect(1); 1821 continue; 1822 } 1823 #endif 1824 } 1825 #endif /* DDB || KGDB */ 1826 1827 if (ISSET(lsr, LSR_RCV_MASK) && 1828 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1829 while (cc > 0) { 1830 put[0] = bus_space_read_1(iot, ioh, com_data); 1831 put[1] = lsr; 1832 put += 2; 1833 if (put >= end) 1834 put = sc->sc_rbuf; 1835 cc--; 1836 1837 lsr = bus_space_read_1(iot, ioh, com_lsr); 1838 if (!ISSET(lsr, LSR_RCV_MASK)) 1839 break; 1840 } 1841 1842 /* 1843 * Current string of incoming characters ended because 1844 * no more data was available or we ran out of space. 1845 * Schedule a receive event if any data was received. 1846 * If we're out of space, turn off receive interrupts. 1847 */ 1848 sc->sc_rbput = put; 1849 sc->sc_rbavail = cc; 1850 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1851 sc->sc_rx_ready = 1; 1852 1853 /* 1854 * See if we are in danger of overflowing a buffer. If 1855 * so, use hardware flow control to ease the pressure. 1856 */ 1857 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1858 cc < sc->sc_r_hiwat) { 1859 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1860 com_hwiflow(sc); 1861 } 1862 1863 /* 1864 * If we're out of space, disable receive interrupts 1865 * until the queue has drained a bit. 1866 */ 1867 if (!cc) { 1868 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1869 CLR(sc->sc_ier, IER_ERXRDY); 1870 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1871 } 1872 } else { 1873 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1874 bus_space_write_1(iot, ioh, com_ier, 0); 1875 delay(10); 1876 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1877 iir = IIR_NOPEND; 1878 continue; 1879 } 1880 } 1881 1882 msr = bus_space_read_1(iot, ioh, com_msr); 1883 delta = msr ^ sc->sc_msr; 1884 sc->sc_msr = msr; 1885 if (ISSET(delta, sc->sc_msr_mask)) { 1886 SET(sc->sc_msr_delta, delta); 1887 1888 /* 1889 * Pulse-per-second clock signal on edge of DCD? 1890 */ 1891 if (ISSET(delta, (sc->sc_ppsassertmask | 1892 sc->sc_ppsclearmask))) { 1893 struct timeval tv; 1894 if ((msr & sc->sc_ppsassertmask) == 1895 sc->sc_ppsassert) { 1896 1897 /* XXX nanotime() */ 1898 microtime(&tv); 1899 TIMEVAL_TO_TIMESPEC(&tv, 1900 &sc->ppsinfo.assert_timestamp); 1901 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1902 timespecadd(&sc->ppsinfo.assert_timestamp, 1903 &sc->ppsparam.assert_offset, 1904 &sc->ppsinfo.assert_timestamp); 1905 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1906 } 1907 1908 #ifdef PPS_SYNC 1909 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1910 hardpps(&tv, tv.tv_usec); 1911 #endif 1912 sc->ppsinfo.assert_sequence++; 1913 sc->ppsinfo.current_mode = 1914 sc->ppsparam.mode; 1915 1916 } else if ((msr & sc->sc_ppsclearmask) == 1917 sc->sc_ppsclear) { 1918 /* XXX nanotime() */ 1919 1920 microtime(&tv); 1921 TIMEVAL_TO_TIMESPEC(&tv, 1922 &sc->ppsinfo.clear_timestamp); 1923 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1924 timespecadd(&sc->ppsinfo.clear_timestamp, 1925 &sc->ppsparam.clear_offset, 1926 &sc->ppsinfo.clear_timestamp); 1927 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1928 } 1929 1930 #ifdef PPS_SYNC 1931 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1932 hardpps(&tv, tv.tv_usec); 1933 #endif 1934 sc->ppsinfo.clear_sequence++; 1935 sc->ppsinfo.current_mode = 1936 sc->ppsparam.mode; 1937 } 1938 } 1939 1940 /* 1941 * Stop output immediately if we lose the output 1942 * flow control signal or carrier detect. 1943 */ 1944 if (ISSET(~msr, sc->sc_msr_mask)) { 1945 sc->sc_tbc = 0; 1946 sc->sc_heldtbc = 0; 1947 #ifdef COM_DEBUG 1948 if (com_debug) 1949 comstatus(sc, "comintr "); 1950 #endif 1951 } 1952 1953 sc->sc_st_check = 1; 1954 } 1955 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1956 1957 /* 1958 * Done handling any receive interrupts. See if data can be 1959 * transmitted as well. Schedule tx done event if no data left 1960 * and tty was marked busy. 1961 */ 1962 if (ISSET(lsr, LSR_TXRDY)) { 1963 /* 1964 * If we've delayed a parameter change, do it now, and restart 1965 * output. 1966 */ 1967 if (sc->sc_heldchange) { 1968 com_loadchannelregs(sc); 1969 sc->sc_heldchange = 0; 1970 sc->sc_tbc = sc->sc_heldtbc; 1971 sc->sc_heldtbc = 0; 1972 } 1973 1974 /* Output the next chunk of the contiguous buffer, if any. */ 1975 if (sc->sc_tbc > 0) { 1976 int n; 1977 1978 n = sc->sc_tbc; 1979 if (n > sc->sc_fifolen) 1980 n = sc->sc_fifolen; 1981 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1982 sc->sc_tbc -= n; 1983 sc->sc_tba += n; 1984 } else { 1985 /* Disable transmit completion interrupts if necessary. */ 1986 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1987 CLR(sc->sc_ier, IER_ETXRDY); 1988 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1989 } 1990 if (sc->sc_tx_busy) { 1991 sc->sc_tx_busy = 0; 1992 sc->sc_tx_done = 1; 1993 } 1994 } 1995 } 1996 1997 /* Wake up the poller. */ 1998 #ifdef __GENERIC_SOFT_INTERRUPTS 1999 softintr_schedule(sc->sc_si); 2000 #else 2001 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2002 setsoftserial(); 2003 #else 2004 if (!com_softintr_scheduled) { 2005 com_softintr_scheduled = 1; 2006 timeout(comsoft, NULL, 1); 2007 } 2008 #endif 2009 #endif 2010 2011 #if NRND > 0 && defined(RND_COM) 2012 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2013 #endif 2014 2015 return (1); 2016 } 2017 2018 /* 2019 * The following functions are polled getc and putc routines, shared 2020 * by the console and kgdb glue. 2021 */ 2022 2023 int 2024 com_common_getc(iot, ioh) 2025 bus_space_tag_t iot; 2026 bus_space_handle_t ioh; 2027 { 2028 int s = splserial(); 2029 u_char stat, c; 2030 2031 /* block until a character becomes available */ 2032 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2033 ; 2034 2035 c = bus_space_read_1(iot, ioh, com_data); 2036 stat = bus_space_read_1(iot, ioh, com_iir); 2037 splx(s); 2038 return (c); 2039 } 2040 2041 void 2042 com_common_putc(iot, ioh, c) 2043 bus_space_tag_t iot; 2044 bus_space_handle_t ioh; 2045 int c; 2046 { 2047 int s = splserial(); 2048 u_char stat; 2049 int timo; 2050 2051 /* wait for any pending transmission to finish */ 2052 timo = 50000; 2053 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2054 && --timo) 2055 ; 2056 2057 bus_space_write_1(iot, ioh, com_data, c); 2058 /* wait for this transmission to complete */ 2059 timo = 1500000; 2060 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2061 && --timo) 2062 ; 2063 2064 /* clear any interrupts generated by this transmission */ 2065 stat = bus_space_read_1(iot, ioh, com_iir); 2066 splx(s); 2067 } 2068 2069 /* 2070 * Initialize UART to known state. 2071 */ 2072 int 2073 cominit(iot, iobase, rate, frequency, cflag, iohp) 2074 bus_space_tag_t iot; 2075 int iobase; 2076 int rate, frequency; 2077 tcflag_t cflag; 2078 bus_space_handle_t *iohp; 2079 { 2080 bus_space_handle_t ioh; 2081 2082 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2083 return (ENOMEM); /* ??? */ 2084 2085 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2086 bus_space_write_1(iot, ioh, com_efr, 0); 2087 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2088 rate = comspeed(rate, frequency); 2089 bus_space_write_1(iot, ioh, com_dlbl, rate); 2090 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2091 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2092 bus_space_write_1(iot, ioh, com_mcr, 0); 2093 bus_space_write_1(iot, ioh, com_fifo, 2094 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2095 bus_space_write_1(iot, ioh, com_ier, 0); 2096 2097 *iohp = ioh; 2098 return (0); 2099 } 2100 2101 /* 2102 * Following are all routines needed for COM to act as console 2103 */ 2104 2105 int 2106 comcnattach(iot, iobase, rate, frequency, cflag) 2107 bus_space_tag_t iot; 2108 int iobase; 2109 int rate, frequency; 2110 tcflag_t cflag; 2111 { 2112 int res; 2113 static struct consdev comcons = { 2114 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 2115 }; 2116 2117 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2118 if (res) 2119 return (res); 2120 2121 cn_tab = &comcons; 2122 2123 comconstag = iot; 2124 comconsaddr = iobase; 2125 comconsrate = rate; 2126 comconscflag = cflag; 2127 2128 return (0); 2129 } 2130 2131 int 2132 comcngetc(dev) 2133 dev_t dev; 2134 { 2135 2136 return (com_common_getc(comconstag, comconsioh)); 2137 } 2138 2139 /* 2140 * Console kernel output character routine. 2141 */ 2142 void 2143 comcnputc(dev, c) 2144 dev_t dev; 2145 int c; 2146 { 2147 2148 com_common_putc(comconstag, comconsioh, c); 2149 } 2150 2151 void 2152 comcnpollc(dev, on) 2153 dev_t dev; 2154 int on; 2155 { 2156 2157 } 2158 2159 #ifdef KGDB 2160 int 2161 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2162 bus_space_tag_t iot; 2163 int iobase; 2164 int rate, frequency; 2165 tcflag_t cflag; 2166 { 2167 int res; 2168 2169 if (iot == comconstag && iobase == comconsaddr) 2170 return (EBUSY); /* cannot share with console */ 2171 2172 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2173 if (res) 2174 return (res); 2175 2176 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2177 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2178 2179 com_kgdb_iot = iot; 2180 com_kgdb_addr = iobase; 2181 2182 return (0); 2183 } 2184 2185 /* ARGSUSED */ 2186 int 2187 com_kgdb_getc(arg) 2188 void *arg; 2189 { 2190 2191 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2192 } 2193 2194 /* ARGSUSED */ 2195 void 2196 com_kgdb_putc(arg, c) 2197 void *arg; 2198 int c; 2199 { 2200 2201 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2202 } 2203 #endif /* KGDB */ 2204 2205 /* helper function to identify the com ports used by 2206 console or KGDB (and not yet autoconf attached) */ 2207 int 2208 com_is_console(iot, iobase, ioh) 2209 bus_space_tag_t iot; 2210 int iobase; 2211 bus_space_handle_t *ioh; 2212 { 2213 bus_space_handle_t help; 2214 2215 if (!comconsattached && 2216 iot == comconstag && iobase == comconsaddr) 2217 help = comconsioh; 2218 #ifdef KGDB 2219 else if (!com_kgdb_attached && 2220 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2221 help = com_kgdb_ioh; 2222 #endif 2223 else 2224 return (0); 2225 2226 if (ioh) 2227 *ioh = help; 2228 return (1); 2229 } 2230
Indexes created Tue Sep 23 14:10:03 GMT 2025