com.c revision 1.147
1 /* $NetBSD: com.c,v 1.147 1998/09/09 05:17:53 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 81 #include "rnd.h" 82 #if NRND > 0 && defined(RND_COM) 83 #include <sys/rnd.h> 84 #endif 85 86 #include <sys/param.h> 87 #include <sys/systm.h> 88 #include <sys/ioctl.h> 89 #include <sys/select.h> 90 #include <sys/tty.h> 91 #include <sys/proc.h> 92 #include <sys/user.h> 93 #include <sys/conf.h> 94 #include <sys/file.h> 95 #include <sys/uio.h> 96 #include <sys/kernel.h> 97 #include <sys/syslog.h> 98 #include <sys/types.h> 99 #include <sys/device.h> 100 #include <sys/malloc.h> 101 #include <sys/timepps.h> 102 103 #include <machine/intr.h> 104 #include <machine/bus.h> 105 106 #include <dev/ic/comreg.h> 107 #include <dev/ic/comvar.h> 108 #include <dev/ic/ns16550reg.h> 109 #include <dev/ic/st16650reg.h> 110 #ifdef COM_HAYESP 111 #include <dev/ic/hayespreg.h> 112 #endif 113 #define com_lcr com_cfcr 114 #include <dev/cons.h> 115 116 #include "com.h" 117 118 #ifdef COM_HAYESP 119 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 120 #endif 121 122 #if defined(DDB) || defined(KGDB) 123 static void com_enable_debugport __P((struct com_softc *)); 124 #endif 125 void com_attach_subr __P((struct com_softc *sc)); 126 void com_config __P((struct com_softc *)); 127 void com_shutdown __P((struct com_softc *)); 128 int comspeed __P((long, long)); 129 static u_char cflag2lcr __P((tcflag_t)); 130 int comparam __P((struct tty *, struct termios *)); 131 void comstart __P((struct tty *)); 132 void comstop __P((struct tty *, int)); 133 int comhwiflow __P((struct tty *, int)); 134 135 void com_loadchannelregs __P((struct com_softc *)); 136 void com_hwiflow __P((struct com_softc *)); 137 void com_break __P((struct com_softc *, int)); 138 void com_modem __P((struct com_softc *, int)); 139 void com_iflush __P((struct com_softc *)); 140 141 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 142 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 143 144 /* XXX: These belong elsewhere */ 145 cdev_decl(com); 146 bdev_decl(com); 147 148 int comcngetc __P((dev_t)); 149 void comcnputc __P((dev_t, int)); 150 void comcnpollc __P((dev_t, int)); 151 152 #define integrate static inline 153 #ifdef __GENERIC_SOFT_INTERRUPTS 154 void comsoft __P((void *)); 155 #else 156 #ifndef __NO_SOFT_SERIAL_INTERRUPT 157 void comsoft __P((void)); 158 #else 159 void comsoft __P((void *)); 160 #endif 161 #endif 162 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 163 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 164 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 165 integrate void com_schedrx __P((struct com_softc *)); 166 void comdiag __P((void *)); 167 168 extern struct cfdriver com_cd; 169 170 /* 171 * Make this an option variable one can patch. 172 * But be warned: this must be a power of 2! 173 */ 174 u_int com_rbuf_size = COM_RING_SIZE; 175 176 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 177 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 178 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 179 180 static int comconsaddr; 181 static bus_space_tag_t comconstag; 182 static bus_space_handle_t comconsioh; 183 static int comconsattached; 184 static int comconsrate; 185 static tcflag_t comconscflag; 186 187 static int ppscap = 188 PPS_TSFMT_TSPEC | 189 PPS_CAPTUREASSERT | 190 PPS_CAPTURECLEAR | 191 #ifdef PPS_SYNC 192 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 193 #endif /* PPS_SYNC */ 194 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 195 196 static u_char tiocm_xxx2mcr __P((int)); 197 198 #ifndef __GENERIC_SOFT_INTERRUPTS 199 #ifdef __NO_SOFT_SERIAL_INTERRUPT 200 volatile int com_softintr_scheduled; 201 #endif 202 #endif 203 204 #ifdef KGDB 205 #include <sys/kgdb.h> 206 207 static int com_kgdb_addr; 208 static bus_space_tag_t com_kgdb_iot; 209 static bus_space_handle_t com_kgdb_ioh; 210 static int com_kgdb_attached; 211 212 int com_kgdb_getc __P((void *)); 213 void com_kgdb_putc __P((void *, int)); 214 #endif /* KGDB */ 215 216 #define COMUNIT(x) (minor(x) & 0x7ffff) 217 #define COMDIALOUT(x) (minor(x) & 0x80000) 218 219 int 220 comspeed(speed, frequency) 221 long speed, frequency; 222 { 223 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 224 225 int x, err; 226 227 #if 0 228 if (speed == 0) 229 return (0); 230 #endif 231 if (speed <= 0) 232 return (-1); 233 x = divrnd(frequency / 16, speed); 234 if (x <= 0) 235 return (-1); 236 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 237 if (err < 0) 238 err = -err; 239 if (err > COM_TOLERANCE) 240 return (-1); 241 return (x); 242 243 #undef divrnd(n, q) 244 } 245 246 #ifdef COM_DEBUG 247 int com_debug = 0; 248 249 void comstatus __P((struct com_softc *, char *)); 250 void 251 comstatus(sc, str) 252 struct com_softc *sc; 253 char *str; 254 { 255 struct tty *tp = sc->sc_tty; 256 257 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 258 sc->sc_dev.dv_xname, str, 259 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 260 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 261 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 262 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 263 sc->sc_tx_stopped ? "+" : "-"); 264 265 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 266 sc->sc_dev.dv_xname, str, 267 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 268 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 269 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 270 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 271 sc->sc_rx_flags); 272 } 273 #endif 274 275 int 276 comprobe1(iot, ioh, iobase) 277 bus_space_tag_t iot; 278 bus_space_handle_t ioh; 279 int iobase; 280 { 281 282 /* force access to id reg */ 283 bus_space_write_1(iot, ioh, com_lcr, 0); 284 bus_space_write_1(iot, ioh, com_iir, 0); 285 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 286 return (0); 287 288 return (1); 289 } 290 291 #ifdef COM_HAYESP 292 int 293 comprobeHAYESP(hayespioh, sc) 294 bus_space_handle_t hayespioh; 295 struct com_softc *sc; 296 { 297 char val, dips; 298 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 299 bus_space_tag_t iot = sc->sc_iot; 300 301 /* 302 * Hayes ESP cards have two iobases. One is for compatibility with 303 * 16550 serial chips, and at the same ISA PC base addresses. The 304 * other is for ESP-specific enhanced features, and lies at a 305 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 306 */ 307 308 /* Test for ESP signature */ 309 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 310 return (0); 311 312 /* 313 * ESP is present at ESP enhanced base address; unknown com port 314 */ 315 316 /* Get the dip-switch configurations */ 317 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 318 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 319 320 /* Determine which com port this ESP card services: bits 0,1 of */ 321 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 322 if (sc->sc_iobase != combaselist[dips & 0x03]) 323 return (0); 324 325 printf(": ESP"); 326 327 /* Check ESP Self Test bits. */ 328 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 329 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 330 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 331 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 332 if ((val & 0x70) < 0x20) { 333 printf("-old (%o)", val & 0x70); 334 /* we do not support the necessary features */ 335 return (0); 336 } 337 338 /* Check for ability to emulate 16550: bit 8 == 1 */ 339 if ((dips & 0x80) == 0) { 340 printf(" slave"); 341 /* XXX Does slave really mean no 16550 support?? */ 342 return (0); 343 } 344 345 /* 346 * If we made it this far, we are a full-featured ESP v2.0 (or 347 * better), at the correct com port address. 348 */ 349 350 SET(sc->sc_hwflags, COM_HW_HAYESP); 351 printf(", 1024 byte fifo\n"); 352 return (1); 353 } 354 #endif 355 356 #if defined(DDB) || defined(KGDB) 357 static void 358 com_enable_debugport(sc) 359 struct com_softc *sc; 360 { 361 int s; 362 363 /* Turn on line break interrupt, set carrier. */ 364 s = splserial(); 365 sc->sc_ier = IER_ERXRDY; 366 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 367 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 368 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 369 splx(s); 370 } 371 #endif 372 373 void 374 com_attach_subr(sc) 375 struct com_softc *sc; 376 { 377 int iobase = sc->sc_iobase; 378 bus_space_tag_t iot = sc->sc_iot; 379 bus_space_handle_t ioh = sc->sc_ioh; 380 struct tty *tp; 381 #ifdef COM16650 382 u_int8_t lcr; 383 #endif 384 #ifdef COM_HAYESP 385 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 386 int *hayespp; 387 #endif 388 389 /* Disable interrupts before configuring the device. */ 390 sc->sc_ier = 0; 391 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 392 393 if (iot == comconstag && iobase == comconsaddr) { 394 comconsattached = 1; 395 396 /* Make sure the console is always "hardwired". */ 397 delay(1000); /* wait for output to finish */ 398 SET(sc->sc_hwflags, COM_HW_CONSOLE); 399 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 400 } 401 402 #ifdef COM_HAYESP 403 /* Look for a Hayes ESP board. */ 404 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 405 bus_space_handle_t hayespioh; 406 407 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 408 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 409 continue; 410 if (comprobeHAYESP(hayespioh, sc)) { 411 sc->sc_hayespioh = hayespioh; 412 sc->sc_fifolen = 1024; 413 414 break; 415 } 416 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 417 } 418 /* No ESP; look for other things. */ 419 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 420 #endif 421 sc->sc_fifolen = 1; 422 /* look for a NS 16550AF UART with FIFOs */ 423 bus_space_write_1(iot, ioh, com_fifo, 424 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 425 delay(100); 426 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 427 == IIR_FIFO_MASK) 428 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 429 == FIFO_TRIGGER_14) { 430 SET(sc->sc_hwflags, COM_HW_FIFO); 431 432 #ifdef COM16650 433 /* 434 * IIR changes into the EFR if LCR is set to LCR_EERS 435 * on 16650s. We also know IIR != 0 at this point. 436 * Write 0 into the EFR, and read it. If the result 437 * is 0, we have a 16650. 438 * 439 * Older 16650s were broken; the test to detect them 440 * is taken from the Linux driver. Apparently 441 * setting DLAB enable gives access to the EFR on 442 * these chips. 443 */ 444 lcr = bus_space_read_1(iot, ioh, com_lcr); 445 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 446 bus_space_write_1(iot, ioh, com_efr, 0); 447 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 448 bus_space_write_1(iot, ioh, com_lcr, 449 lcr | LCR_DLAB); 450 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 451 CLR(sc->sc_hwflags, COM_HW_FIFO); 452 sc->sc_fifolen = 0; 453 } else { 454 SET(sc->sc_hwflags, COM_HW_FLOW); 455 sc->sc_fifolen = 32; 456 } 457 } else 458 #endif 459 sc->sc_fifolen = 16; 460 461 #ifdef COM16650 462 bus_space_write_1(iot, ioh, com_lcr, lcr); 463 if (sc->sc_fifolen == 0) 464 printf(": st16650, broken fifo\n"); 465 else if (sc->sc_fifolen == 32) 466 printf(": st16650a, working fifo\n"); 467 else 468 #endif 469 printf(": ns16550a, working fifo\n"); 470 } else 471 printf(": ns16550, broken fifo\n"); 472 else 473 printf(": ns8250 or ns16450, no fifo\n"); 474 bus_space_write_1(iot, ioh, com_fifo, 0); 475 #ifdef COM_HAYESP 476 } 477 #endif 478 479 tp = ttymalloc(); 480 tp->t_oproc = comstart; 481 tp->t_param = comparam; 482 tp->t_hwiflow = comhwiflow; 483 484 sc->sc_tty = tp; 485 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 486 if (sc->sc_rbuf == NULL) { 487 printf("%s: unable to allocate ring buffer\n", 488 sc->sc_dev.dv_xname); 489 return; 490 } 491 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 492 493 tty_attach(tp); 494 495 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 496 SET(sc->sc_mcr, MCR_IENABLE); 497 498 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 499 int maj; 500 501 /* locate the major number */ 502 for (maj = 0; maj < nchrdev; maj++) 503 if (cdevsw[maj].d_open == comopen) 504 break; 505 506 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 507 508 printf("%s: console\n", sc->sc_dev.dv_xname); 509 } 510 511 #ifdef KGDB 512 /* 513 * Allow kgdb to "take over" this port. If this is 514 * the kgdb device, it has exclusive use. 515 */ 516 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 517 com_kgdb_attached = 1; 518 519 SET(sc->sc_hwflags, COM_HW_KGDB); 520 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 521 } 522 #endif 523 524 #ifdef __GENERIC_SOFT_INTERRUPTS 525 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 526 #endif 527 528 #if NRND > 0 && defined(RND_COM) 529 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 530 RND_TYPE_TTY); 531 #endif 532 533 /* if there are no enable/disable functions, assume the device 534 is always enabled */ 535 if (!sc->enable) 536 sc->enabled = 1; 537 538 com_config(sc); 539 540 SET(sc->sc_hwflags, COM_HW_DEV_OK); 541 } 542 543 void 544 com_config(sc) 545 struct com_softc *sc; 546 { 547 bus_space_tag_t iot = sc->sc_iot; 548 bus_space_handle_t ioh = sc->sc_ioh; 549 550 /* Disable interrupts before configuring the device. */ 551 sc->sc_ier = 0; 552 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 553 554 #ifdef COM_HAYESP 555 /* Look for a Hayes ESP board. */ 556 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 557 sc->sc_fifolen = 1024; 558 559 /* Set 16550 compatibility mode */ 560 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 561 HAYESP_SETMODE); 562 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 563 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 564 HAYESP_MODE_SCALE); 565 566 /* Set RTS/CTS flow control */ 567 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 568 HAYESP_SETFLOWTYPE); 569 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 570 HAYESP_FLOW_RTS); 571 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 572 HAYESP_FLOW_CTS); 573 574 /* Set flow control levels */ 575 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 576 HAYESP_SETRXFLOW); 577 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 578 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 579 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 580 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 581 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 583 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 585 } 586 #endif 587 588 #ifdef DDB 589 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 590 com_enable_debugport(sc); 591 #endif 592 593 #ifdef KGDB 594 /* 595 * Allow kgdb to "take over" this port. If this is 596 * the kgdb device, it has exclusive use. 597 */ 598 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 599 com_enable_debugport(sc); 600 #endif 601 } 602 603 void 604 com_shutdown(sc) 605 struct com_softc *sc; 606 { 607 struct tty *tp = sc->sc_tty; 608 int s; 609 610 s = splserial(); 611 612 /* If we were asserting flow control, then deassert it. */ 613 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 614 com_hwiflow(sc); 615 616 /* Clear any break condition set with TIOCSBRK. */ 617 com_break(sc, 0); 618 619 /* Turn off PPS capture on last close. */ 620 sc->sc_ppsclearmask = 0; 621 sc->sc_ppsassertmask = 0; 622 sc->sc_ppsassert = 1; 623 sc->sc_ppsclear = 1; 624 sc->ppsparam.mode = 0; 625 626 /* 627 * Hang up if necessary. Wait a bit, so the other side has time to 628 * notice even if we immediately open the port again. 629 */ 630 if (ISSET(tp->t_cflag, HUPCL)) { 631 com_modem(sc, 0); 632 (void) tsleep(sc, TTIPRI, ttclos, hz); 633 } 634 635 /* Turn off interrupts. */ 636 #ifdef DDB 637 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 638 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 639 else 640 #endif 641 sc->sc_ier = 0; 642 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 643 644 if (sc->disable) { 645 #ifdef DIAGNOSTIC 646 if (!sc->enabled) 647 panic("com_shutdown: not enabled?"); 648 #endif 649 (*sc->disable)(sc); 650 sc->enabled = 0; 651 } 652 653 splx(s); 654 } 655 656 int 657 comopen(dev, flag, mode, p) 658 dev_t dev; 659 int flag, mode; 660 struct proc *p; 661 { 662 int unit = COMUNIT(dev); 663 struct com_softc *sc; 664 struct tty *tp; 665 int s, s2; 666 int error; 667 668 if (unit >= com_cd.cd_ndevs) 669 return (ENXIO); 670 sc = com_cd.cd_devs[unit]; 671 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 672 sc->sc_rbuf == NULL) 673 return (ENXIO); 674 675 #ifdef KGDB 676 /* 677 * If this is the kgdb port, no other use is permitted. 678 */ 679 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 680 return (EBUSY); 681 #endif 682 683 tp = sc->sc_tty; 684 685 if (ISSET(tp->t_state, TS_ISOPEN) && 686 ISSET(tp->t_state, TS_XCLUDE) && 687 p->p_ucred->cr_uid != 0) 688 return (EBUSY); 689 690 s = spltty(); 691 692 /* 693 * Do the following iff this is a first open. 694 */ 695 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 696 struct termios t; 697 698 tp->t_dev = dev; 699 700 s2 = splserial(); 701 702 if (sc->enable) { 703 if ((*sc->enable)(sc)) { 704 splx(s2); 705 splx(s); 706 printf("%s: device enable failed\n", 707 sc->sc_dev.dv_xname); 708 return (EIO); 709 } 710 sc->enabled = 1; 711 com_config(sc); 712 } 713 714 /* Turn on interrupts. */ 715 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 716 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 717 718 /* Fetch the current modem control status, needed later. */ 719 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 720 721 /* Clear PPS capture state on first open. */ 722 sc->sc_ppsclearmask = 0; 723 sc->sc_ppsassertmask = 0; 724 sc->sc_ppsassert = 1; 725 sc->sc_ppsclear = 1; 726 727 splx(s2); 728 729 /* 730 * Initialize the termios status to the defaults. Add in the 731 * sticky bits from TIOCSFLAGS. 732 */ 733 t.c_ispeed = 0; 734 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 735 t.c_ospeed = comconsrate; 736 t.c_cflag = comconscflag; 737 } else { 738 t.c_ospeed = TTYDEF_SPEED; 739 t.c_cflag = TTYDEF_CFLAG; 740 } 741 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 742 SET(t.c_cflag, CLOCAL); 743 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 744 SET(t.c_cflag, CRTSCTS); 745 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 746 SET(t.c_cflag, MDMBUF); 747 /* Make sure comparam() will do something. */ 748 tp->t_ospeed = 0; 749 (void) comparam(tp, &t); 750 tp->t_iflag = TTYDEF_IFLAG; 751 tp->t_oflag = TTYDEF_OFLAG; 752 tp->t_lflag = TTYDEF_LFLAG; 753 ttychars(tp); 754 ttsetwater(tp); 755 756 s2 = splserial(); 757 758 /* 759 * Turn on DTR. We must always do this, even if carrier is not 760 * present, because otherwise we'd have to use TIOCSDTR 761 * immediately after setting CLOCAL, which applications do not 762 * expect. We always assert DTR while the device is open 763 * unless explicitly requested to deassert it. 764 */ 765 com_modem(sc, 1); 766 767 /* Clear the input ring, and unblock. */ 768 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 769 sc->sc_rbavail = com_rbuf_size; 770 com_iflush(sc); 771 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 772 com_hwiflow(sc); 773 774 #ifdef COM_DEBUG 775 if (com_debug) 776 comstatus(sc, "comopen "); 777 #endif 778 779 splx(s2); 780 } 781 782 splx(s); 783 784 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 785 if (error) 786 goto bad; 787 788 error = (*linesw[tp->t_line].l_open)(dev, tp); 789 if (error) 790 goto bad; 791 792 return (0); 793 794 bad: 795 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 796 /* 797 * We failed to open the device, and nobody else had it opened. 798 * Clean up the state as appropriate. 799 */ 800 com_shutdown(sc); 801 } 802 803 return (error); 804 } 805 806 int 807 comclose(dev, flag, mode, p) 808 dev_t dev; 809 int flag, mode; 810 struct proc *p; 811 { 812 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 813 struct tty *tp = sc->sc_tty; 814 815 /* XXX This is for cons.c. */ 816 if (!ISSET(tp->t_state, TS_ISOPEN)) 817 return (0); 818 819 (*linesw[tp->t_line].l_close)(tp, flag); 820 ttyclose(tp); 821 822 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 823 /* 824 * Although we got a last close, the device may still be in 825 * use; e.g. if this was the dialout node, and there are still 826 * processes waiting for carrier on the non-dialout node. 827 */ 828 com_shutdown(sc); 829 } 830 831 return (0); 832 } 833 834 int 835 comread(dev, uio, flag) 836 dev_t dev; 837 struct uio *uio; 838 int flag; 839 { 840 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 841 struct tty *tp = sc->sc_tty; 842 843 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 844 } 845 846 int 847 comwrite(dev, uio, flag) 848 dev_t dev; 849 struct uio *uio; 850 int flag; 851 { 852 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 853 struct tty *tp = sc->sc_tty; 854 855 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 856 } 857 858 struct tty * 859 comtty(dev) 860 dev_t dev; 861 { 862 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 863 struct tty *tp = sc->sc_tty; 864 865 return (tp); 866 } 867 868 static u_char 869 tiocm_xxx2mcr(data) 870 int data; 871 { 872 u_char m = 0; 873 874 if (ISSET(data, TIOCM_DTR)) 875 SET(m, MCR_DTR); 876 if (ISSET(data, TIOCM_RTS)) 877 SET(m, MCR_RTS); 878 return m; 879 } 880 881 int 882 comioctl(dev, cmd, data, flag, p) 883 dev_t dev; 884 u_long cmd; 885 caddr_t data; 886 int flag; 887 struct proc *p; 888 { 889 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 890 struct tty *tp = sc->sc_tty; 891 int error; 892 int s; 893 894 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 895 if (error >= 0) 896 return (error); 897 898 error = ttioctl(tp, cmd, data, flag, p); 899 if (error >= 0) 900 return (error); 901 902 error = 0; 903 904 s = splserial(); 905 906 switch (cmd) { 907 case TIOCSBRK: 908 com_break(sc, 1); 909 break; 910 911 case TIOCCBRK: 912 com_break(sc, 0); 913 break; 914 915 case TIOCSDTR: 916 com_modem(sc, 1); 917 break; 918 919 case TIOCCDTR: 920 com_modem(sc, 0); 921 break; 922 923 case TIOCGFLAGS: 924 *(int *)data = sc->sc_swflags; 925 break; 926 927 case TIOCSFLAGS: 928 error = suser(p->p_ucred, &p->p_acflag); 929 if (error) 930 break; 931 sc->sc_swflags = *(int *)data; 932 break; 933 934 case TIOCMSET: 935 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 936 /*FALLTHROUGH*/ 937 938 case TIOCMBIS: 939 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 940 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 941 break; 942 943 case TIOCMBIC: 944 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 945 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 946 break; 947 948 case TIOCMGET: { 949 u_char m; 950 int bits = 0; 951 952 m = sc->sc_mcr; 953 if (ISSET(m, MCR_DTR)) 954 SET(bits, TIOCM_DTR); 955 if (ISSET(m, MCR_RTS)) 956 SET(bits, TIOCM_RTS); 957 m = sc->sc_msr; 958 if (ISSET(m, MSR_DCD)) 959 SET(bits, TIOCM_CD); 960 if (ISSET(m, MSR_CTS)) 961 SET(bits, TIOCM_CTS); 962 if (ISSET(m, MSR_DSR)) 963 SET(bits, TIOCM_DSR); 964 if (ISSET(m, MSR_RI | MSR_TERI)) 965 SET(bits, TIOCM_RI); 966 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 967 SET(bits, TIOCM_LE); 968 *(int *)data = bits; 969 break; 970 } 971 972 case PPS_CREATE: 973 break; 974 975 case PPS_DESTROY: 976 break; 977 978 case PPS_GETPARAMS: { 979 pps_params_t *pp; 980 pp = (pps_params_t *)data; 981 *pp = sc->ppsparam; 982 break; 983 } 984 985 case PPS_SETPARAMS: { 986 pps_params_t *pp; 987 int mode; 988 pp = (pps_params_t *)data; 989 if (pp->mode & ~ppscap) { 990 error = EINVAL; 991 break; 992 } 993 sc->ppsparam = *pp; 994 /* 995 * Compute msr masks from user-specified timestamp state. 996 */ 997 mode = sc->ppsparam.mode; 998 if (mode & PPS_HARDPPSONASSERT) { 999 mode |= PPS_CAPTUREASSERT; 1000 /* XXX revoke any previous HARDPPS source */ 1001 } 1002 if (mode & PPS_HARDPPSONCLEAR) { 1003 mode |= PPS_CAPTURECLEAR; 1004 /* XXX revoke any previous HARDPPS source */ 1005 } 1006 switch (mode & PPS_CAPTUREBOTH) { 1007 case 0: 1008 sc->sc_ppsassertmask = 0; 1009 sc->sc_ppsassert = 1; 1010 sc->sc_ppsclearmask = 0; 1011 sc->sc_ppsclear = 1; 1012 break; 1013 1014 case PPS_CAPTUREASSERT: 1015 sc->sc_ppsassertmask = MSR_DCD; 1016 sc->sc_ppsassert = MSR_DCD; 1017 sc->sc_ppsclearmask = 0; 1018 sc->sc_ppsclear = 1; 1019 break; 1020 1021 case PPS_CAPTURECLEAR: 1022 sc->sc_ppsassertmask = 0; 1023 sc->sc_ppsassert = 1; 1024 sc->sc_ppsclearmask = MSR_DCD; 1025 sc->sc_ppsclear = 0; 1026 break; 1027 1028 case PPS_CAPTUREBOTH: 1029 sc->sc_ppsassertmask = MSR_DCD; 1030 sc->sc_ppsclearmask = MSR_DCD; 1031 sc->sc_ppsassert = MSR_DCD; 1032 sc->sc_ppsclear = 0; 1033 break; 1034 1035 default: 1036 error = EINVAL; 1037 break; 1038 } 1039 break; 1040 } 1041 1042 case PPS_GETCAP: 1043 *(int*)data = ppscap; 1044 break; 1045 1046 case PPS_FETCH: { 1047 pps_info_t *pi; 1048 pi = (pps_info_t *)data; 1049 *pi = sc->ppsinfo; 1050 break; 1051 } 1052 1053 case PPS_WAIT: 1054 /* XXX */ 1055 error = EOPNOTSUPP; 1056 break; 1057 1058 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1059 /* 1060 * Some GPS clocks models use the falling rather than 1061 * rising edge as the on-the-second signal. 1062 * The old API has no way to specify PPS polarity. 1063 */ 1064 #ifndef PPS_TRAILING_EDGE 1065 sc->sc_ppsassertmask = MSR_DCD; 1066 sc->sc_ppsassert = MSR_DCD; 1067 sc->sc_ppsclearmask = 0; 1068 sc->sc_ppsclear = 1; 1069 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1070 &sc->ppsinfo.assert_timestamp); 1071 #else 1072 sc->sc_ppsassertmask = 0; 1073 sc->sc_ppsassert = 1 1074 sc->sc_ppsclearmask = MSR_DCD; 1075 sc->sc_ppsclear = 0; 1076 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1077 &sc->ppsinfo.clear_timestamp); 1078 #endif 1079 break; 1080 1081 default: 1082 error = ENOTTY; 1083 break; 1084 } 1085 1086 splx(s); 1087 1088 #ifdef COM_DEBUG 1089 if (com_debug) 1090 comstatus(sc, "comioctl "); 1091 #endif 1092 1093 return (error); 1094 } 1095 1096 integrate void 1097 com_schedrx(sc) 1098 struct com_softc *sc; 1099 { 1100 1101 sc->sc_rx_ready = 1; 1102 1103 /* Wake up the poller. */ 1104 #ifdef __GENERIC_SOFT_INTERRUPTS 1105 softintr_schedule(sc->sc_si); 1106 #else 1107 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1108 setsoftserial(); 1109 #else 1110 if (!com_softintr_scheduled) { 1111 com_softintr_scheduled = 1; 1112 timeout(comsoft, NULL, 1); 1113 } 1114 #endif 1115 #endif 1116 } 1117 1118 void 1119 com_break(sc, onoff) 1120 struct com_softc *sc; 1121 int onoff; 1122 { 1123 1124 if (onoff) 1125 SET(sc->sc_lcr, LCR_SBREAK); 1126 else 1127 CLR(sc->sc_lcr, LCR_SBREAK); 1128 1129 if (!sc->sc_heldchange) { 1130 if (sc->sc_tx_busy) { 1131 sc->sc_heldtbc = sc->sc_tbc; 1132 sc->sc_tbc = 0; 1133 sc->sc_heldchange = 1; 1134 } else 1135 com_loadchannelregs(sc); 1136 } 1137 } 1138 1139 void 1140 com_modem(sc, onoff) 1141 struct com_softc *sc; 1142 int onoff; 1143 { 1144 1145 if (onoff) 1146 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1147 else 1148 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1149 1150 if (!sc->sc_heldchange) { 1151 if (sc->sc_tx_busy) { 1152 sc->sc_heldtbc = sc->sc_tbc; 1153 sc->sc_tbc = 0; 1154 sc->sc_heldchange = 1; 1155 } else 1156 com_loadchannelregs(sc); 1157 } 1158 } 1159 1160 static u_char 1161 cflag2lcr(cflag) 1162 tcflag_t cflag; 1163 { 1164 u_char lcr = 0; 1165 1166 switch (ISSET(cflag, CSIZE)) { 1167 case CS5: 1168 SET(lcr, LCR_5BITS); 1169 break; 1170 case CS6: 1171 SET(lcr, LCR_6BITS); 1172 break; 1173 case CS7: 1174 SET(lcr, LCR_7BITS); 1175 break; 1176 case CS8: 1177 SET(lcr, LCR_8BITS); 1178 break; 1179 } 1180 if (ISSET(cflag, PARENB)) { 1181 SET(lcr, LCR_PENAB); 1182 if (!ISSET(cflag, PARODD)) 1183 SET(lcr, LCR_PEVEN); 1184 } 1185 if (ISSET(cflag, CSTOPB)) 1186 SET(lcr, LCR_STOPB); 1187 1188 return (lcr); 1189 } 1190 1191 int 1192 comparam(tp, t) 1193 struct tty *tp; 1194 struct termios *t; 1195 { 1196 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1197 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1198 u_char lcr; 1199 int s; 1200 1201 /* Check requested parameters. */ 1202 if (ospeed < 0) 1203 return (EINVAL); 1204 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1205 return (EINVAL); 1206 1207 /* 1208 * For the console, always force CLOCAL and !HUPCL, so that the port 1209 * is always active. 1210 */ 1211 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1212 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1213 SET(t->c_cflag, CLOCAL); 1214 CLR(t->c_cflag, HUPCL); 1215 } 1216 1217 /* 1218 * If there were no changes, don't do anything. This avoids dropping 1219 * input and improves performance when all we did was frob things like 1220 * VMIN and VTIME. 1221 */ 1222 if (tp->t_ospeed == t->c_ospeed && 1223 tp->t_cflag == t->c_cflag) 1224 return (0); 1225 1226 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1227 1228 s = splserial(); 1229 1230 sc->sc_lcr = lcr; 1231 1232 /* 1233 * If we're not in a mode that assumes a connection is present, then 1234 * ignore carrier changes. 1235 */ 1236 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1237 sc->sc_msr_dcd = 0; 1238 else 1239 sc->sc_msr_dcd = MSR_DCD; 1240 /* 1241 * Set the flow control pins depending on the current flow control 1242 * mode. 1243 */ 1244 if (ISSET(t->c_cflag, CRTSCTS)) { 1245 sc->sc_mcr_dtr = MCR_DTR; 1246 sc->sc_mcr_rts = MCR_RTS; 1247 sc->sc_msr_cts = MSR_CTS; 1248 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1249 } else if (ISSET(t->c_cflag, MDMBUF)) { 1250 /* 1251 * For DTR/DCD flow control, make sure we don't toggle DTR for 1252 * carrier detection. 1253 */ 1254 sc->sc_mcr_dtr = 0; 1255 sc->sc_mcr_rts = MCR_DTR; 1256 sc->sc_msr_cts = MSR_DCD; 1257 sc->sc_efr = 0; 1258 } else { 1259 /* 1260 * If no flow control, then always set RTS. This will make 1261 * the other side happy if it mistakenly thinks we're doing 1262 * RTS/CTS flow control. 1263 */ 1264 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1265 sc->sc_mcr_rts = 0; 1266 sc->sc_msr_cts = 0; 1267 sc->sc_efr = 0; 1268 if (ISSET(sc->sc_mcr, MCR_DTR)) 1269 SET(sc->sc_mcr, MCR_RTS); 1270 else 1271 CLR(sc->sc_mcr, MCR_RTS); 1272 } 1273 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1274 1275 #if 0 1276 if (ospeed == 0) 1277 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1278 else 1279 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1280 #endif 1281 1282 sc->sc_dlbl = ospeed; 1283 sc->sc_dlbh = ospeed >> 8; 1284 1285 /* 1286 * Set the FIFO threshold based on the receive speed. 1287 * 1288 * * If it's a low speed, it's probably a mouse or some other 1289 * interactive device, so set the threshold low. 1290 * * If it's a high speed, trim the trigger level down to prevent 1291 * overflows. 1292 * * Otherwise set it a bit higher. 1293 */ 1294 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1295 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1296 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1297 sc->sc_fifo = FIFO_ENABLE | 1298 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1299 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1300 else 1301 sc->sc_fifo = 0; 1302 1303 /* And copy to tty. */ 1304 tp->t_ispeed = 0; 1305 tp->t_ospeed = t->c_ospeed; 1306 tp->t_cflag = t->c_cflag; 1307 1308 if (!sc->sc_heldchange) { 1309 if (sc->sc_tx_busy) { 1310 sc->sc_heldtbc = sc->sc_tbc; 1311 sc->sc_tbc = 0; 1312 sc->sc_heldchange = 1; 1313 } else 1314 com_loadchannelregs(sc); 1315 } 1316 1317 if (!ISSET(t->c_cflag, CHWFLOW)) { 1318 /* Disable the high water mark. */ 1319 sc->sc_r_hiwat = 0; 1320 sc->sc_r_lowat = 0; 1321 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1322 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1323 com_schedrx(sc); 1324 } 1325 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1326 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1327 com_hwiflow(sc); 1328 } 1329 } else { 1330 sc->sc_r_hiwat = com_rbuf_hiwat; 1331 sc->sc_r_lowat = com_rbuf_lowat; 1332 } 1333 1334 splx(s); 1335 1336 /* 1337 * Update the tty layer's idea of the carrier bit, in case we changed 1338 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1339 * explicit request. 1340 */ 1341 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1342 1343 #ifdef COM_DEBUG 1344 if (com_debug) 1345 comstatus(sc, "comparam "); 1346 #endif 1347 1348 if (!ISSET(t->c_cflag, CHWFLOW)) { 1349 if (sc->sc_tx_stopped) { 1350 sc->sc_tx_stopped = 0; 1351 comstart(tp); 1352 } 1353 } 1354 1355 return (0); 1356 } 1357 1358 void 1359 com_iflush(sc) 1360 struct com_softc *sc; 1361 { 1362 bus_space_tag_t iot = sc->sc_iot; 1363 bus_space_handle_t ioh = sc->sc_ioh; 1364 #ifdef DIAGNOSTIC 1365 int reg; 1366 #endif 1367 int timo; 1368 1369 #ifdef DIAGNOSTIC 1370 reg = 0xffff; 1371 #endif 1372 timo = 50000; 1373 /* flush any pending I/O */ 1374 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1375 && --timo) 1376 #ifdef DIAGNOSTIC 1377 reg = 1378 #else 1379 (void) 1380 #endif 1381 bus_space_read_1(iot, ioh, com_data); 1382 #ifdef DIAGNOSTIC 1383 if (!timo) 1384 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1385 reg); 1386 #endif 1387 } 1388 1389 void 1390 com_loadchannelregs(sc) 1391 struct com_softc *sc; 1392 { 1393 bus_space_tag_t iot = sc->sc_iot; 1394 bus_space_handle_t ioh = sc->sc_ioh; 1395 1396 /* XXXXX necessary? */ 1397 com_iflush(sc); 1398 1399 bus_space_write_1(iot, ioh, com_ier, 0); 1400 1401 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1402 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1403 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1404 } 1405 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1406 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1407 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1408 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1409 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1410 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1411 1412 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1413 } 1414 1415 int 1416 comhwiflow(tp, block) 1417 struct tty *tp; 1418 int block; 1419 { 1420 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1421 int s; 1422 1423 if (sc->sc_mcr_rts == 0) 1424 return (0); 1425 1426 s = splserial(); 1427 if (block) { 1428 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1429 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1430 com_hwiflow(sc); 1431 } 1432 } else { 1433 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1434 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1435 com_schedrx(sc); 1436 } 1437 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1438 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1439 com_hwiflow(sc); 1440 } 1441 } 1442 splx(s); 1443 return (1); 1444 } 1445 1446 /* 1447 * (un)block input via hw flowcontrol 1448 */ 1449 void 1450 com_hwiflow(sc) 1451 struct com_softc *sc; 1452 { 1453 bus_space_tag_t iot = sc->sc_iot; 1454 bus_space_handle_t ioh = sc->sc_ioh; 1455 1456 if (sc->sc_mcr_rts == 0) 1457 return; 1458 1459 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1460 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1461 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1462 } else { 1463 SET(sc->sc_mcr, sc->sc_mcr_rts); 1464 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1465 } 1466 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1467 } 1468 1469 1470 void 1471 comstart(tp) 1472 struct tty *tp; 1473 { 1474 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1475 bus_space_tag_t iot = sc->sc_iot; 1476 bus_space_handle_t ioh = sc->sc_ioh; 1477 int s; 1478 1479 s = spltty(); 1480 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1481 goto out; 1482 if (sc->sc_tx_stopped) 1483 goto out; 1484 1485 if (tp->t_outq.c_cc <= tp->t_lowat) { 1486 if (ISSET(tp->t_state, TS_ASLEEP)) { 1487 CLR(tp->t_state, TS_ASLEEP); 1488 wakeup(&tp->t_outq); 1489 } 1490 selwakeup(&tp->t_wsel); 1491 if (tp->t_outq.c_cc == 0) 1492 goto out; 1493 } 1494 1495 /* Grab the first contiguous region of buffer space. */ 1496 { 1497 u_char *tba; 1498 int tbc; 1499 1500 tba = tp->t_outq.c_cf; 1501 tbc = ndqb(&tp->t_outq, 0); 1502 1503 (void)splserial(); 1504 1505 sc->sc_tba = tba; 1506 sc->sc_tbc = tbc; 1507 } 1508 1509 SET(tp->t_state, TS_BUSY); 1510 sc->sc_tx_busy = 1; 1511 1512 /* Enable transmit completion interrupts if necessary. */ 1513 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1514 SET(sc->sc_ier, IER_ETXRDY); 1515 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1516 } 1517 1518 /* Output the first chunk of the contiguous buffer. */ 1519 { 1520 int n; 1521 1522 n = sc->sc_tbc; 1523 if (n > sc->sc_fifolen) 1524 n = sc->sc_fifolen; 1525 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1526 sc->sc_tbc -= n; 1527 sc->sc_tba += n; 1528 } 1529 out: 1530 splx(s); 1531 return; 1532 } 1533 1534 /* 1535 * Stop output on a line. 1536 */ 1537 void 1538 comstop(tp, flag) 1539 struct tty *tp; 1540 int flag; 1541 { 1542 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1543 int s; 1544 1545 s = splserial(); 1546 if (ISSET(tp->t_state, TS_BUSY)) { 1547 /* Stop transmitting at the next chunk. */ 1548 sc->sc_tbc = 0; 1549 sc->sc_heldtbc = 0; 1550 if (!ISSET(tp->t_state, TS_TTSTOP)) 1551 SET(tp->t_state, TS_FLUSH); 1552 } 1553 splx(s); 1554 } 1555 1556 void 1557 comdiag(arg) 1558 void *arg; 1559 { 1560 struct com_softc *sc = arg; 1561 int overflows, floods; 1562 int s; 1563 1564 s = splserial(); 1565 overflows = sc->sc_overflows; 1566 sc->sc_overflows = 0; 1567 floods = sc->sc_floods; 1568 sc->sc_floods = 0; 1569 sc->sc_errors = 0; 1570 splx(s); 1571 1572 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1573 sc->sc_dev.dv_xname, 1574 overflows, overflows == 1 ? "" : "s", 1575 floods, floods == 1 ? "" : "s"); 1576 } 1577 1578 integrate void 1579 com_rxsoft(sc, tp) 1580 struct com_softc *sc; 1581 struct tty *tp; 1582 { 1583 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1584 u_char *get, *end; 1585 u_int cc, scc; 1586 u_char lsr; 1587 int code; 1588 int s; 1589 1590 end = sc->sc_ebuf; 1591 get = sc->sc_rbget; 1592 scc = cc = com_rbuf_size - sc->sc_rbavail; 1593 1594 if (cc == com_rbuf_size) { 1595 sc->sc_floods++; 1596 if (sc->sc_errors++ == 0) 1597 timeout(comdiag, sc, 60 * hz); 1598 } 1599 1600 while (cc) { 1601 code = get[0]; 1602 lsr = get[1]; 1603 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1604 if (ISSET(lsr, LSR_OE)) { 1605 sc->sc_overflows++; 1606 if (sc->sc_errors++ == 0) 1607 timeout(comdiag, sc, 60 * hz); 1608 } 1609 if (ISSET(lsr, LSR_BI | LSR_FE)) 1610 SET(code, TTY_FE); 1611 if (ISSET(lsr, LSR_PE)) 1612 SET(code, TTY_PE); 1613 } 1614 if ((*rint)(code, tp) == -1) { 1615 /* 1616 * The line discipline's buffer is out of space. 1617 */ 1618 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1619 /* 1620 * We're either not using flow control, or the 1621 * line discipline didn't tell us to block for 1622 * some reason. Either way, we have no way to 1623 * know when there's more space available, so 1624 * just drop the rest of the data. 1625 */ 1626 get += cc << 1; 1627 if (get >= end) 1628 get -= com_rbuf_size << 1; 1629 cc = 0; 1630 } else { 1631 /* 1632 * Don't schedule any more receive processing 1633 * until the line discipline tells us there's 1634 * space available (through comhwiflow()). 1635 * Leave the rest of the data in the input 1636 * buffer. 1637 */ 1638 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1639 } 1640 break; 1641 } 1642 get += 2; 1643 if (get >= end) 1644 get = sc->sc_rbuf; 1645 cc--; 1646 } 1647 1648 if (cc != scc) { 1649 sc->sc_rbget = get; 1650 s = splserial(); 1651 cc = sc->sc_rbavail += scc - cc; 1652 /* Buffers should be ok again, release possible block. */ 1653 if (cc >= sc->sc_r_lowat) { 1654 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1655 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1656 SET(sc->sc_ier, IER_ERXRDY); 1657 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1658 } 1659 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1660 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1661 com_hwiflow(sc); 1662 } 1663 } 1664 splx(s); 1665 } 1666 } 1667 1668 integrate void 1669 com_txsoft(sc, tp) 1670 struct com_softc *sc; 1671 struct tty *tp; 1672 { 1673 1674 CLR(tp->t_state, TS_BUSY); 1675 if (ISSET(tp->t_state, TS_FLUSH)) 1676 CLR(tp->t_state, TS_FLUSH); 1677 else 1678 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1679 (*linesw[tp->t_line].l_start)(tp); 1680 } 1681 1682 integrate void 1683 com_stsoft(sc, tp) 1684 struct com_softc *sc; 1685 struct tty *tp; 1686 { 1687 u_char msr, delta; 1688 int s; 1689 1690 s = splserial(); 1691 msr = sc->sc_msr; 1692 delta = sc->sc_msr_delta; 1693 sc->sc_msr_delta = 0; 1694 splx(s); 1695 1696 if (ISSET(delta, sc->sc_msr_dcd)) { 1697 /* 1698 * Inform the tty layer that carrier detect changed. 1699 */ 1700 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1701 } 1702 1703 if (ISSET(delta, sc->sc_msr_cts)) { 1704 /* Block or unblock output according to flow control. */ 1705 if (ISSET(msr, sc->sc_msr_cts)) { 1706 sc->sc_tx_stopped = 0; 1707 (*linesw[tp->t_line].l_start)(tp); 1708 } else { 1709 sc->sc_tx_stopped = 1; 1710 } 1711 } 1712 1713 #ifdef COM_DEBUG 1714 if (com_debug) 1715 comstatus(sc, "com_stsoft"); 1716 #endif 1717 } 1718 1719 #ifdef __GENERIC_SOFT_INTERRUPTS 1720 void 1721 comsoft(arg) 1722 void *arg; 1723 { 1724 struct com_softc *sc = arg; 1725 struct tty *tp; 1726 1727 if (!sc->enabled) 1728 return; 1729 1730 { 1731 #else 1732 void 1733 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1734 comsoft() 1735 #else 1736 comsoft(arg) 1737 void *arg; 1738 #endif 1739 { 1740 struct com_softc *sc; 1741 struct tty *tp; 1742 int unit; 1743 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1744 int s; 1745 1746 s = splsoftserial(); 1747 com_softintr_scheduled = 0; 1748 #endif 1749 1750 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1751 sc = com_cd.cd_devs[unit]; 1752 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1753 continue; 1754 1755 if (!sc->enabled) 1756 continue; 1757 1758 tp = sc->sc_tty; 1759 if (tp == NULL) 1760 continue; 1761 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1762 continue; 1763 #endif 1764 tp = sc->sc_tty; 1765 1766 if (sc->sc_rx_ready) { 1767 sc->sc_rx_ready = 0; 1768 com_rxsoft(sc, tp); 1769 } 1770 1771 if (sc->sc_st_check) { 1772 sc->sc_st_check = 0; 1773 com_stsoft(sc, tp); 1774 } 1775 1776 if (sc->sc_tx_done) { 1777 sc->sc_tx_done = 0; 1778 com_txsoft(sc, tp); 1779 } 1780 } 1781 1782 #ifndef __GENERIC_SOFT_INTERRUPTS 1783 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1784 splx(s); 1785 #endif 1786 #endif 1787 } 1788 1789 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1790 /* there has got to be a better way to do comsoft() */ 1791 }} 1792 #endif 1793 1794 int 1795 comintr(arg) 1796 void *arg; 1797 { 1798 struct com_softc *sc = arg; 1799 bus_space_tag_t iot = sc->sc_iot; 1800 bus_space_handle_t ioh = sc->sc_ioh; 1801 u_char *put, *end; 1802 u_int cc; 1803 u_char lsr, iir; 1804 1805 if (!sc->enabled) 1806 return (0); 1807 1808 iir = bus_space_read_1(iot, ioh, com_iir); 1809 if (ISSET(iir, IIR_NOPEND)) 1810 return (0); 1811 1812 end = sc->sc_ebuf; 1813 put = sc->sc_rbput; 1814 cc = sc->sc_rbavail; 1815 1816 do { 1817 u_char msr, delta; 1818 1819 lsr = bus_space_read_1(iot, ioh, com_lsr); 1820 #if defined(DDB) || defined(KGDB) 1821 if (ISSET(lsr, LSR_BI)) { 1822 #ifdef DDB 1823 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1824 Debugger(); 1825 continue; 1826 } 1827 #endif 1828 #ifdef KGDB 1829 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1830 kgdb_connect(1); 1831 continue; 1832 } 1833 #endif 1834 } 1835 #endif /* DDB || KGDB */ 1836 1837 if (ISSET(lsr, LSR_RCV_MASK) && 1838 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1839 while (cc > 0) { 1840 put[0] = bus_space_read_1(iot, ioh, com_data); 1841 put[1] = lsr; 1842 put += 2; 1843 if (put >= end) 1844 put = sc->sc_rbuf; 1845 cc--; 1846 1847 lsr = bus_space_read_1(iot, ioh, com_lsr); 1848 if (!ISSET(lsr, LSR_RCV_MASK)) 1849 break; 1850 } 1851 1852 /* 1853 * Current string of incoming characters ended because 1854 * no more data was available or we ran out of space. 1855 * Schedule a receive event if any data was received. 1856 * If we're out of space, turn off receive interrupts. 1857 */ 1858 sc->sc_rbput = put; 1859 sc->sc_rbavail = cc; 1860 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1861 sc->sc_rx_ready = 1; 1862 1863 /* 1864 * See if we are in danger of overflowing a buffer. If 1865 * so, use hardware flow control to ease the pressure. 1866 */ 1867 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1868 cc < sc->sc_r_hiwat) { 1869 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1870 com_hwiflow(sc); 1871 } 1872 1873 /* 1874 * If we're out of space, disable receive interrupts 1875 * until the queue has drained a bit. 1876 */ 1877 if (!cc) { 1878 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1879 CLR(sc->sc_ier, IER_ERXRDY); 1880 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1881 } 1882 } else { 1883 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1884 bus_space_write_1(iot, ioh, com_ier, 0); 1885 delay(10); 1886 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1887 iir = IIR_NOPEND; 1888 continue; 1889 } 1890 } 1891 1892 msr = bus_space_read_1(iot, ioh, com_msr); 1893 delta = msr ^ sc->sc_msr; 1894 sc->sc_msr = msr; 1895 if (ISSET(delta, sc->sc_msr_mask)) { 1896 SET(sc->sc_msr_delta, delta); 1897 1898 /* 1899 * Pulse-per-second clock signal on edge of DCD? 1900 */ 1901 if (ISSET(delta, (sc->sc_ppsassertmask | 1902 sc->sc_ppsclearmask))) { 1903 struct timeval tv; 1904 if ((msr & sc->sc_ppsassertmask) == 1905 sc->sc_ppsassert) { 1906 1907 /* XXX nanotime() */ 1908 microtime(&tv); 1909 TIMEVAL_TO_TIMESPEC(&tv, 1910 &sc->ppsinfo.assert_timestamp); 1911 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1912 timespecadd(&sc->ppsinfo.assert_timestamp, 1913 &sc->ppsparam.assert_offset, 1914 &sc->ppsinfo.assert_timestamp); 1915 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1916 } 1917 1918 #ifdef PPS_SYNC 1919 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1920 hardpps(&tv, tv.tv_usec); 1921 #endif 1922 sc->ppsinfo.assert_sequence++; 1923 sc->ppsinfo.current_mode = 1924 sc->ppsparam.mode; 1925 1926 } else if ((msr & sc->sc_ppsclearmask) == 1927 sc->sc_ppsclear) { 1928 /* XXX nanotime() */ 1929 1930 microtime(&tv); 1931 TIMEVAL_TO_TIMESPEC(&tv, 1932 &sc->ppsinfo.clear_timestamp); 1933 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1934 timespecadd(&sc->ppsinfo.clear_timestamp, 1935 &sc->ppsparam.clear_offset, 1936 &sc->ppsinfo.clear_timestamp); 1937 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1938 } 1939 1940 #ifdef PPS_SYNC 1941 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1942 hardpps(&tv, tv.tv_usec); 1943 #endif 1944 sc->ppsinfo.clear_sequence++; 1945 sc->ppsinfo.current_mode = 1946 sc->ppsparam.mode; 1947 } 1948 } 1949 1950 /* 1951 * Stop output immediately if we lose the output 1952 * flow control signal or carrier detect. 1953 */ 1954 if (ISSET(~msr, sc->sc_msr_mask)) { 1955 sc->sc_tbc = 0; 1956 sc->sc_heldtbc = 0; 1957 #ifdef COM_DEBUG 1958 if (com_debug) 1959 comstatus(sc, "comintr "); 1960 #endif 1961 } 1962 1963 sc->sc_st_check = 1; 1964 } 1965 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1966 1967 /* 1968 * Done handling any receive interrupts. See if data can be 1969 * transmitted as well. Schedule tx done event if no data left 1970 * and tty was marked busy. 1971 */ 1972 if (ISSET(lsr, LSR_TXRDY)) { 1973 /* 1974 * If we've delayed a parameter change, do it now, and restart 1975 * output. 1976 */ 1977 if (sc->sc_heldchange) { 1978 com_loadchannelregs(sc); 1979 sc->sc_heldchange = 0; 1980 sc->sc_tbc = sc->sc_heldtbc; 1981 sc->sc_heldtbc = 0; 1982 } 1983 1984 /* Output the next chunk of the contiguous buffer, if any. */ 1985 if (sc->sc_tbc > 0) { 1986 int n; 1987 1988 n = sc->sc_tbc; 1989 if (n > sc->sc_fifolen) 1990 n = sc->sc_fifolen; 1991 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1992 sc->sc_tbc -= n; 1993 sc->sc_tba += n; 1994 } else { 1995 /* Disable transmit completion interrupts if necessary. */ 1996 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1997 CLR(sc->sc_ier, IER_ETXRDY); 1998 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1999 } 2000 if (sc->sc_tx_busy) { 2001 sc->sc_tx_busy = 0; 2002 sc->sc_tx_done = 1; 2003 } 2004 } 2005 } 2006 2007 /* Wake up the poller. */ 2008 #ifdef __GENERIC_SOFT_INTERRUPTS 2009 softintr_schedule(sc->sc_si); 2010 #else 2011 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2012 setsoftserial(); 2013 #else 2014 if (!com_softintr_scheduled) { 2015 com_softintr_scheduled = 1; 2016 timeout(comsoft, NULL, 1); 2017 } 2018 #endif 2019 #endif 2020 2021 #if NRND > 0 && defined(RND_COM) 2022 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2023 #endif 2024 2025 return (1); 2026 } 2027 2028 /* 2029 * The following functions are polled getc and putc routines, shared 2030 * by the console and kgdb glue. 2031 */ 2032 2033 int 2034 com_common_getc(iot, ioh) 2035 bus_space_tag_t iot; 2036 bus_space_handle_t ioh; 2037 { 2038 int s = splserial(); 2039 u_char stat, c; 2040 2041 /* block until a character becomes available */ 2042 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2043 ; 2044 2045 c = bus_space_read_1(iot, ioh, com_data); 2046 stat = bus_space_read_1(iot, ioh, com_iir); 2047 splx(s); 2048 return (c); 2049 } 2050 2051 void 2052 com_common_putc(iot, ioh, c) 2053 bus_space_tag_t iot; 2054 bus_space_handle_t ioh; 2055 int c; 2056 { 2057 int s = splserial(); 2058 u_char stat; 2059 int timo; 2060 2061 /* wait for any pending transmission to finish */ 2062 timo = 50000; 2063 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2064 && --timo) 2065 ; 2066 2067 bus_space_write_1(iot, ioh, com_data, c); 2068 /* wait for this transmission to complete */ 2069 timo = 1500000; 2070 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2071 && --timo) 2072 ; 2073 2074 /* clear any interrupts generated by this transmission */ 2075 stat = bus_space_read_1(iot, ioh, com_iir); 2076 splx(s); 2077 } 2078 2079 /* 2080 * Initialize UART to known state. 2081 */ 2082 int 2083 cominit(iot, iobase, rate, frequency, cflag, iohp) 2084 bus_space_tag_t iot; 2085 int iobase; 2086 int rate, frequency; 2087 tcflag_t cflag; 2088 bus_space_handle_t *iohp; 2089 { 2090 bus_space_handle_t ioh; 2091 2092 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2093 return (ENOMEM); /* ??? */ 2094 2095 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2096 bus_space_write_1(iot, ioh, com_efr, 0); 2097 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2098 rate = comspeed(rate, frequency); 2099 bus_space_write_1(iot, ioh, com_dlbl, rate); 2100 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2101 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2102 bus_space_write_1(iot, ioh, com_mcr, 0); 2103 bus_space_write_1(iot, ioh, com_fifo, 2104 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2105 bus_space_write_1(iot, ioh, com_ier, 0); 2106 2107 *iohp = ioh; 2108 return (0); 2109 } 2110 2111 /* 2112 * Following are all routines needed for COM to act as console 2113 */ 2114 2115 int 2116 comcnattach(iot, iobase, rate, frequency, cflag) 2117 bus_space_tag_t iot; 2118 int iobase; 2119 int rate, frequency; 2120 tcflag_t cflag; 2121 { 2122 int res; 2123 static struct consdev comcons = { 2124 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 2125 }; 2126 2127 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2128 if (res) 2129 return (res); 2130 2131 cn_tab = &comcons; 2132 2133 comconstag = iot; 2134 comconsaddr = iobase; 2135 comconsrate = rate; 2136 comconscflag = cflag; 2137 2138 return (0); 2139 } 2140 2141 int 2142 comcngetc(dev) 2143 dev_t dev; 2144 { 2145 2146 return (com_common_getc(comconstag, comconsioh)); 2147 } 2148 2149 /* 2150 * Console kernel output character routine. 2151 */ 2152 void 2153 comcnputc(dev, c) 2154 dev_t dev; 2155 int c; 2156 { 2157 2158 com_common_putc(comconstag, comconsioh, c); 2159 } 2160 2161 void 2162 comcnpollc(dev, on) 2163 dev_t dev; 2164 int on; 2165 { 2166 2167 } 2168 2169 #ifdef KGDB 2170 int 2171 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2172 bus_space_tag_t iot; 2173 int iobase; 2174 int rate, frequency; 2175 tcflag_t cflag; 2176 { 2177 int res; 2178 2179 if (iot == comconstag && iobase == comconsaddr) 2180 return (EBUSY); /* cannot share with console */ 2181 2182 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2183 if (res) 2184 return (res); 2185 2186 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2187 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2188 2189 com_kgdb_iot = iot; 2190 com_kgdb_addr = iobase; 2191 2192 return (0); 2193 } 2194 2195 /* ARGSUSED */ 2196 int 2197 com_kgdb_getc(arg) 2198 void *arg; 2199 { 2200 2201 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2202 } 2203 2204 /* ARGSUSED */ 2205 void 2206 com_kgdb_putc(arg, c) 2207 void *arg; 2208 int c; 2209 { 2210 2211 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2212 } 2213 #endif /* KGDB */ 2214 2215 /* helper function to identify the com ports used by 2216 console or KGDB (and not yet autoconf attached) */ 2217 int 2218 com_is_console(iot, iobase, ioh) 2219 bus_space_tag_t iot; 2220 int iobase; 2221 bus_space_handle_t *ioh; 2222 { 2223 bus_space_handle_t help; 2224 2225 if (!comconsattached && 2226 iot == comconstag && iobase == comconsaddr) 2227 help = comconsioh; 2228 #ifdef KGDB 2229 else if (!com_kgdb_attached && 2230 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2231 help = com_kgdb_ioh; 2232 #endif 2233 else 2234 return (0); 2235 2236 if (ioh) 2237 *ioh = help; 2238 return (1); 2239 } 2240
Indexes created Thu Sep 25 16:09:42 GMT 2025