com.c revision 1.148
1 /* $NetBSD: com.c,v 1.148 1998/09/16 21:30:58 is Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 81 #include "rnd.h" 82 #if NRND > 0 && defined(RND_COM) 83 #include <sys/rnd.h> 84 #endif 85 86 #include <sys/param.h> 87 #include <sys/systm.h> 88 #include <sys/ioctl.h> 89 #include <sys/select.h> 90 #include <sys/tty.h> 91 #include <sys/proc.h> 92 #include <sys/user.h> 93 #include <sys/conf.h> 94 #include <sys/file.h> 95 #include <sys/uio.h> 96 #include <sys/kernel.h> 97 #include <sys/syslog.h> 98 #include <sys/types.h> 99 #include <sys/device.h> 100 #include <sys/malloc.h> 101 #include <sys/timepps.h> 102 103 #include <machine/intr.h> 104 #include <machine/bus.h> 105 106 #include <dev/ic/comreg.h> 107 #include <dev/ic/comvar.h> 108 #include <dev/ic/ns16550reg.h> 109 #include <dev/ic/st16650reg.h> 110 #ifdef COM_HAYESP 111 #include <dev/ic/hayespreg.h> 112 #endif 113 #define com_lcr com_cfcr 114 #include <dev/cons.h> 115 116 #include "com.h" 117 118 #ifdef COM_HAYESP 119 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 120 #endif 121 122 #if defined(DDB) || defined(KGDB) 123 static void com_enable_debugport __P((struct com_softc *)); 124 #endif 125 void com_attach_subr __P((struct com_softc *sc)); 126 void com_config __P((struct com_softc *)); 127 void com_shutdown __P((struct com_softc *)); 128 int comspeed __P((long, long)); 129 static u_char cflag2lcr __P((tcflag_t)); 130 int comparam __P((struct tty *, struct termios *)); 131 void comstart __P((struct tty *)); 132 void comstop __P((struct tty *, int)); 133 int comhwiflow __P((struct tty *, int)); 134 135 void com_loadchannelregs __P((struct com_softc *)); 136 void com_hwiflow __P((struct com_softc *)); 137 void com_break __P((struct com_softc *, int)); 138 void com_modem __P((struct com_softc *, int)); 139 void com_iflush __P((struct com_softc *)); 140 141 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 142 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 143 144 /* XXX: These belong elsewhere */ 145 cdev_decl(com); 146 bdev_decl(com); 147 148 int comcngetc __P((dev_t)); 149 void comcnputc __P((dev_t, int)); 150 void comcnpollc __P((dev_t, int)); 151 152 #define integrate static inline 153 #ifdef __GENERIC_SOFT_INTERRUPTS 154 void comsoft __P((void *)); 155 #else 156 #ifndef __NO_SOFT_SERIAL_INTERRUPT 157 void comsoft __P((void)); 158 #else 159 void comsoft __P((void *)); 160 #endif 161 #endif 162 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 163 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 164 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 165 integrate void com_schedrx __P((struct com_softc *)); 166 void comdiag __P((void *)); 167 168 extern struct cfdriver com_cd; 169 170 /* 171 * Make this an option variable one can patch. 172 * But be warned: this must be a power of 2! 173 */ 174 u_int com_rbuf_size = COM_RING_SIZE; 175 176 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 177 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 178 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 179 180 static int comconsaddr; 181 static bus_space_tag_t comconstag; 182 static bus_space_handle_t comconsioh; 183 static int comconsattached; 184 static int comconsrate; 185 static tcflag_t comconscflag; 186 187 static int ppscap = 188 PPS_TSFMT_TSPEC | 189 PPS_CAPTUREASSERT | 190 PPS_CAPTURECLEAR | 191 #ifdef PPS_SYNC 192 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 193 #endif /* PPS_SYNC */ 194 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 195 196 static u_char tiocm_xxx2mcr __P((int)); 197 198 #ifndef __GENERIC_SOFT_INTERRUPTS 199 #ifdef __NO_SOFT_SERIAL_INTERRUPT 200 volatile int com_softintr_scheduled; 201 #endif 202 #endif 203 204 #ifdef KGDB 205 #include <sys/kgdb.h> 206 207 static int com_kgdb_addr; 208 static bus_space_tag_t com_kgdb_iot; 209 static bus_space_handle_t com_kgdb_ioh; 210 static int com_kgdb_attached; 211 212 int com_kgdb_getc __P((void *)); 213 void com_kgdb_putc __P((void *, int)); 214 #endif /* KGDB */ 215 216 #define COMUNIT(x) (minor(x) & 0x7ffff) 217 #define COMDIALOUT(x) (minor(x) & 0x80000) 218 219 int 220 comspeed(speed, frequency) 221 long speed, frequency; 222 { 223 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 224 225 int x, err; 226 227 #if 0 228 if (speed == 0) 229 return (0); 230 #endif 231 if (speed <= 0) 232 return (-1); 233 x = divrnd(frequency / 16, speed); 234 if (x <= 0) 235 return (-1); 236 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 237 if (err < 0) 238 err = -err; 239 if (err > COM_TOLERANCE) 240 return (-1); 241 return (x); 242 243 #undef divrnd(n, q) 244 } 245 246 #ifdef COM_DEBUG 247 int com_debug = 0; 248 249 void comstatus __P((struct com_softc *, char *)); 250 void 251 comstatus(sc, str) 252 struct com_softc *sc; 253 char *str; 254 { 255 struct tty *tp = sc->sc_tty; 256 257 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 258 sc->sc_dev.dv_xname, str, 259 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 260 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 261 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 262 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 263 sc->sc_tx_stopped ? "+" : "-"); 264 265 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 266 sc->sc_dev.dv_xname, str, 267 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 268 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 269 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 270 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 271 sc->sc_rx_flags); 272 } 273 #endif 274 275 int 276 comprobe1(iot, ioh) 277 bus_space_tag_t iot; 278 bus_space_handle_t ioh; 279 { 280 281 /* force access to id reg */ 282 bus_space_write_1(iot, ioh, com_lcr, 0); 283 bus_space_write_1(iot, ioh, com_iir, 0); 284 if (bus_space_read_1(iot, ioh, com_iir) & 0x38) 285 return (0); 286 287 return (1); 288 } 289 290 #ifdef COM_HAYESP 291 int 292 comprobeHAYESP(hayespioh, sc) 293 bus_space_handle_t hayespioh; 294 struct com_softc *sc; 295 { 296 char val, dips; 297 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 298 bus_space_tag_t iot = sc->sc_iot; 299 300 /* 301 * Hayes ESP cards have two iobases. One is for compatibility with 302 * 16550 serial chips, and at the same ISA PC base addresses. The 303 * other is for ESP-specific enhanced features, and lies at a 304 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 305 */ 306 307 /* Test for ESP signature */ 308 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 309 return (0); 310 311 /* 312 * ESP is present at ESP enhanced base address; unknown com port 313 */ 314 315 /* Get the dip-switch configurations */ 316 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 317 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 318 319 /* Determine which com port this ESP card services: bits 0,1 of */ 320 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 321 if (sc->sc_iobase != combaselist[dips & 0x03]) 322 return (0); 323 324 printf(": ESP"); 325 326 /* Check ESP Self Test bits. */ 327 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 328 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 329 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 330 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 331 if ((val & 0x70) < 0x20) { 332 printf("-old (%o)", val & 0x70); 333 /* we do not support the necessary features */ 334 return (0); 335 } 336 337 /* Check for ability to emulate 16550: bit 8 == 1 */ 338 if ((dips & 0x80) == 0) { 339 printf(" slave"); 340 /* XXX Does slave really mean no 16550 support?? */ 341 return (0); 342 } 343 344 /* 345 * If we made it this far, we are a full-featured ESP v2.0 (or 346 * better), at the correct com port address. 347 */ 348 349 SET(sc->sc_hwflags, COM_HW_HAYESP); 350 printf(", 1024 byte fifo\n"); 351 return (1); 352 } 353 #endif 354 355 #if defined(DDB) || defined(KGDB) 356 static void 357 com_enable_debugport(sc) 358 struct com_softc *sc; 359 { 360 int s; 361 362 /* Turn on line break interrupt, set carrier. */ 363 s = splserial(); 364 sc->sc_ier = IER_ERXRDY; 365 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 366 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 367 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 368 splx(s); 369 } 370 #endif 371 372 void 373 com_attach_subr(sc) 374 struct com_softc *sc; 375 { 376 int iobase = sc->sc_iobase; 377 bus_space_tag_t iot = sc->sc_iot; 378 bus_space_handle_t ioh = sc->sc_ioh; 379 struct tty *tp; 380 #ifdef COM16650 381 u_int8_t lcr; 382 #endif 383 #ifdef COM_HAYESP 384 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 385 int *hayespp; 386 #endif 387 388 /* Disable interrupts before configuring the device. */ 389 sc->sc_ier = 0; 390 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 391 392 if (iot == comconstag && iobase == comconsaddr) { 393 comconsattached = 1; 394 395 /* Make sure the console is always "hardwired". */ 396 delay(1000); /* wait for output to finish */ 397 SET(sc->sc_hwflags, COM_HW_CONSOLE); 398 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 399 } 400 401 #ifdef COM_HAYESP 402 /* Look for a Hayes ESP board. */ 403 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 404 bus_space_handle_t hayespioh; 405 406 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 407 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 408 continue; 409 if (comprobeHAYESP(hayespioh, sc)) { 410 sc->sc_hayespioh = hayespioh; 411 sc->sc_fifolen = 1024; 412 413 break; 414 } 415 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 416 } 417 /* No ESP; look for other things. */ 418 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 419 #endif 420 sc->sc_fifolen = 1; 421 /* look for a NS 16550AF UART with FIFOs */ 422 bus_space_write_1(iot, ioh, com_fifo, 423 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 424 delay(100); 425 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 426 == IIR_FIFO_MASK) 427 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 428 == FIFO_TRIGGER_14) { 429 SET(sc->sc_hwflags, COM_HW_FIFO); 430 431 #ifdef COM16650 432 /* 433 * IIR changes into the EFR if LCR is set to LCR_EERS 434 * on 16650s. We also know IIR != 0 at this point. 435 * Write 0 into the EFR, and read it. If the result 436 * is 0, we have a 16650. 437 * 438 * Older 16650s were broken; the test to detect them 439 * is taken from the Linux driver. Apparently 440 * setting DLAB enable gives access to the EFR on 441 * these chips. 442 */ 443 lcr = bus_space_read_1(iot, ioh, com_lcr); 444 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 445 bus_space_write_1(iot, ioh, com_efr, 0); 446 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 447 bus_space_write_1(iot, ioh, com_lcr, 448 lcr | LCR_DLAB); 449 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 450 CLR(sc->sc_hwflags, COM_HW_FIFO); 451 sc->sc_fifolen = 0; 452 } else { 453 SET(sc->sc_hwflags, COM_HW_FLOW); 454 sc->sc_fifolen = 32; 455 } 456 } else 457 #endif 458 sc->sc_fifolen = 16; 459 460 #ifdef COM16650 461 bus_space_write_1(iot, ioh, com_lcr, lcr); 462 if (sc->sc_fifolen == 0) 463 printf(": st16650, broken fifo\n"); 464 else if (sc->sc_fifolen == 32) 465 printf(": st16650a, working fifo\n"); 466 else 467 #endif 468 printf(": ns16550a, working fifo\n"); 469 } else 470 printf(": ns16550, broken fifo\n"); 471 else 472 printf(": ns8250 or ns16450, no fifo\n"); 473 bus_space_write_1(iot, ioh, com_fifo, 0); 474 #ifdef COM_HAYESP 475 } 476 #endif 477 478 tp = ttymalloc(); 479 tp->t_oproc = comstart; 480 tp->t_param = comparam; 481 tp->t_hwiflow = comhwiflow; 482 483 sc->sc_tty = tp; 484 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 485 if (sc->sc_rbuf == NULL) { 486 printf("%s: unable to allocate ring buffer\n", 487 sc->sc_dev.dv_xname); 488 return; 489 } 490 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 491 492 tty_attach(tp); 493 494 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 495 SET(sc->sc_mcr, MCR_IENABLE); 496 497 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 498 int maj; 499 500 /* locate the major number */ 501 for (maj = 0; maj < nchrdev; maj++) 502 if (cdevsw[maj].d_open == comopen) 503 break; 504 505 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 506 507 printf("%s: console\n", sc->sc_dev.dv_xname); 508 } 509 510 #ifdef KGDB 511 /* 512 * Allow kgdb to "take over" this port. If this is 513 * the kgdb device, it has exclusive use. 514 */ 515 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 516 com_kgdb_attached = 1; 517 518 SET(sc->sc_hwflags, COM_HW_KGDB); 519 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 520 } 521 #endif 522 523 #ifdef __GENERIC_SOFT_INTERRUPTS 524 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 525 #endif 526 527 #if NRND > 0 && defined(RND_COM) 528 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 529 RND_TYPE_TTY); 530 #endif 531 532 /* if there are no enable/disable functions, assume the device 533 is always enabled */ 534 if (!sc->enable) 535 sc->enabled = 1; 536 537 com_config(sc); 538 539 SET(sc->sc_hwflags, COM_HW_DEV_OK); 540 } 541 542 void 543 com_config(sc) 544 struct com_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 549 /* Disable interrupts before configuring the device. */ 550 sc->sc_ier = 0; 551 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 552 553 #ifdef COM_HAYESP 554 /* Look for a Hayes ESP board. */ 555 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 556 sc->sc_fifolen = 1024; 557 558 /* Set 16550 compatibility mode */ 559 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 560 HAYESP_SETMODE); 561 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 562 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 563 HAYESP_MODE_SCALE); 564 565 /* Set RTS/CTS flow control */ 566 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 567 HAYESP_SETFLOWTYPE); 568 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_FLOW_RTS); 570 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 571 HAYESP_FLOW_CTS); 572 573 /* Set flow control levels */ 574 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 575 HAYESP_SETRXFLOW); 576 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 577 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 578 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 579 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 580 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 581 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 582 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 583 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 584 } 585 #endif 586 587 #ifdef DDB 588 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 589 com_enable_debugport(sc); 590 #endif 591 592 #ifdef KGDB 593 /* 594 * Allow kgdb to "take over" this port. If this is 595 * the kgdb device, it has exclusive use. 596 */ 597 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 598 com_enable_debugport(sc); 599 #endif 600 } 601 602 void 603 com_shutdown(sc) 604 struct com_softc *sc; 605 { 606 struct tty *tp = sc->sc_tty; 607 int s; 608 609 s = splserial(); 610 611 /* If we were asserting flow control, then deassert it. */ 612 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 613 com_hwiflow(sc); 614 615 /* Clear any break condition set with TIOCSBRK. */ 616 com_break(sc, 0); 617 618 /* Turn off PPS capture on last close. */ 619 sc->sc_ppsclearmask = 0; 620 sc->sc_ppsassertmask = 0; 621 sc->sc_ppsassert = 1; 622 sc->sc_ppsclear = 1; 623 sc->ppsparam.mode = 0; 624 625 /* 626 * Hang up if necessary. Wait a bit, so the other side has time to 627 * notice even if we immediately open the port again. 628 */ 629 if (ISSET(tp->t_cflag, HUPCL)) { 630 com_modem(sc, 0); 631 (void) tsleep(sc, TTIPRI, ttclos, hz); 632 } 633 634 /* Turn off interrupts. */ 635 #ifdef DDB 636 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 637 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 638 else 639 #endif 640 sc->sc_ier = 0; 641 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 642 643 if (sc->disable) { 644 #ifdef DIAGNOSTIC 645 if (!sc->enabled) 646 panic("com_shutdown: not enabled?"); 647 #endif 648 (*sc->disable)(sc); 649 sc->enabled = 0; 650 } 651 652 splx(s); 653 } 654 655 int 656 comopen(dev, flag, mode, p) 657 dev_t dev; 658 int flag, mode; 659 struct proc *p; 660 { 661 int unit = COMUNIT(dev); 662 struct com_softc *sc; 663 struct tty *tp; 664 int s, s2; 665 int error; 666 667 if (unit >= com_cd.cd_ndevs) 668 return (ENXIO); 669 sc = com_cd.cd_devs[unit]; 670 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 671 sc->sc_rbuf == NULL) 672 return (ENXIO); 673 674 #ifdef KGDB 675 /* 676 * If this is the kgdb port, no other use is permitted. 677 */ 678 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 679 return (EBUSY); 680 #endif 681 682 tp = sc->sc_tty; 683 684 if (ISSET(tp->t_state, TS_ISOPEN) && 685 ISSET(tp->t_state, TS_XCLUDE) && 686 p->p_ucred->cr_uid != 0) 687 return (EBUSY); 688 689 s = spltty(); 690 691 /* 692 * Do the following iff this is a first open. 693 */ 694 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 695 struct termios t; 696 697 tp->t_dev = dev; 698 699 s2 = splserial(); 700 701 if (sc->enable) { 702 if ((*sc->enable)(sc)) { 703 splx(s2); 704 splx(s); 705 printf("%s: device enable failed\n", 706 sc->sc_dev.dv_xname); 707 return (EIO); 708 } 709 sc->enabled = 1; 710 com_config(sc); 711 } 712 713 /* Turn on interrupts. */ 714 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 715 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 716 717 /* Fetch the current modem control status, needed later. */ 718 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 719 720 /* Clear PPS capture state on first open. */ 721 sc->sc_ppsclearmask = 0; 722 sc->sc_ppsassertmask = 0; 723 sc->sc_ppsassert = 1; 724 sc->sc_ppsclear = 1; 725 726 splx(s2); 727 728 /* 729 * Initialize the termios status to the defaults. Add in the 730 * sticky bits from TIOCSFLAGS. 731 */ 732 t.c_ispeed = 0; 733 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 734 t.c_ospeed = comconsrate; 735 t.c_cflag = comconscflag; 736 } else { 737 t.c_ospeed = TTYDEF_SPEED; 738 t.c_cflag = TTYDEF_CFLAG; 739 } 740 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 741 SET(t.c_cflag, CLOCAL); 742 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 743 SET(t.c_cflag, CRTSCTS); 744 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 745 SET(t.c_cflag, MDMBUF); 746 /* Make sure comparam() will do something. */ 747 tp->t_ospeed = 0; 748 (void) comparam(tp, &t); 749 tp->t_iflag = TTYDEF_IFLAG; 750 tp->t_oflag = TTYDEF_OFLAG; 751 tp->t_lflag = TTYDEF_LFLAG; 752 ttychars(tp); 753 ttsetwater(tp); 754 755 s2 = splserial(); 756 757 /* 758 * Turn on DTR. We must always do this, even if carrier is not 759 * present, because otherwise we'd have to use TIOCSDTR 760 * immediately after setting CLOCAL, which applications do not 761 * expect. We always assert DTR while the device is open 762 * unless explicitly requested to deassert it. 763 */ 764 com_modem(sc, 1); 765 766 /* Clear the input ring, and unblock. */ 767 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 768 sc->sc_rbavail = com_rbuf_size; 769 com_iflush(sc); 770 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 771 com_hwiflow(sc); 772 773 #ifdef COM_DEBUG 774 if (com_debug) 775 comstatus(sc, "comopen "); 776 #endif 777 778 splx(s2); 779 } 780 781 splx(s); 782 783 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 784 if (error) 785 goto bad; 786 787 error = (*linesw[tp->t_line].l_open)(dev, tp); 788 if (error) 789 goto bad; 790 791 return (0); 792 793 bad: 794 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 795 /* 796 * We failed to open the device, and nobody else had it opened. 797 * Clean up the state as appropriate. 798 */ 799 com_shutdown(sc); 800 } 801 802 return (error); 803 } 804 805 int 806 comclose(dev, flag, mode, p) 807 dev_t dev; 808 int flag, mode; 809 struct proc *p; 810 { 811 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 812 struct tty *tp = sc->sc_tty; 813 814 /* XXX This is for cons.c. */ 815 if (!ISSET(tp->t_state, TS_ISOPEN)) 816 return (0); 817 818 (*linesw[tp->t_line].l_close)(tp, flag); 819 ttyclose(tp); 820 821 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 822 /* 823 * Although we got a last close, the device may still be in 824 * use; e.g. if this was the dialout node, and there are still 825 * processes waiting for carrier on the non-dialout node. 826 */ 827 com_shutdown(sc); 828 } 829 830 return (0); 831 } 832 833 int 834 comread(dev, uio, flag) 835 dev_t dev; 836 struct uio *uio; 837 int flag; 838 { 839 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 840 struct tty *tp = sc->sc_tty; 841 842 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 843 } 844 845 int 846 comwrite(dev, uio, flag) 847 dev_t dev; 848 struct uio *uio; 849 int flag; 850 { 851 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 852 struct tty *tp = sc->sc_tty; 853 854 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 855 } 856 857 struct tty * 858 comtty(dev) 859 dev_t dev; 860 { 861 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 862 struct tty *tp = sc->sc_tty; 863 864 return (tp); 865 } 866 867 static u_char 868 tiocm_xxx2mcr(data) 869 int data; 870 { 871 u_char m = 0; 872 873 if (ISSET(data, TIOCM_DTR)) 874 SET(m, MCR_DTR); 875 if (ISSET(data, TIOCM_RTS)) 876 SET(m, MCR_RTS); 877 return m; 878 } 879 880 int 881 comioctl(dev, cmd, data, flag, p) 882 dev_t dev; 883 u_long cmd; 884 caddr_t data; 885 int flag; 886 struct proc *p; 887 { 888 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 889 struct tty *tp = sc->sc_tty; 890 int error; 891 int s; 892 893 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 894 if (error >= 0) 895 return (error); 896 897 error = ttioctl(tp, cmd, data, flag, p); 898 if (error >= 0) 899 return (error); 900 901 error = 0; 902 903 s = splserial(); 904 905 switch (cmd) { 906 case TIOCSBRK: 907 com_break(sc, 1); 908 break; 909 910 case TIOCCBRK: 911 com_break(sc, 0); 912 break; 913 914 case TIOCSDTR: 915 com_modem(sc, 1); 916 break; 917 918 case TIOCCDTR: 919 com_modem(sc, 0); 920 break; 921 922 case TIOCGFLAGS: 923 *(int *)data = sc->sc_swflags; 924 break; 925 926 case TIOCSFLAGS: 927 error = suser(p->p_ucred, &p->p_acflag); 928 if (error) 929 break; 930 sc->sc_swflags = *(int *)data; 931 break; 932 933 case TIOCMSET: 934 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 935 /*FALLTHROUGH*/ 936 937 case TIOCMBIS: 938 SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 939 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 940 break; 941 942 case TIOCMBIC: 943 CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); 944 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 945 break; 946 947 case TIOCMGET: { 948 u_char m; 949 int bits = 0; 950 951 m = sc->sc_mcr; 952 if (ISSET(m, MCR_DTR)) 953 SET(bits, TIOCM_DTR); 954 if (ISSET(m, MCR_RTS)) 955 SET(bits, TIOCM_RTS); 956 m = sc->sc_msr; 957 if (ISSET(m, MSR_DCD)) 958 SET(bits, TIOCM_CD); 959 if (ISSET(m, MSR_CTS)) 960 SET(bits, TIOCM_CTS); 961 if (ISSET(m, MSR_DSR)) 962 SET(bits, TIOCM_DSR); 963 if (ISSET(m, MSR_RI | MSR_TERI)) 964 SET(bits, TIOCM_RI); 965 if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier)) 966 SET(bits, TIOCM_LE); 967 *(int *)data = bits; 968 break; 969 } 970 971 case PPS_CREATE: 972 break; 973 974 case PPS_DESTROY: 975 break; 976 977 case PPS_GETPARAMS: { 978 pps_params_t *pp; 979 pp = (pps_params_t *)data; 980 *pp = sc->ppsparam; 981 break; 982 } 983 984 case PPS_SETPARAMS: { 985 pps_params_t *pp; 986 int mode; 987 pp = (pps_params_t *)data; 988 if (pp->mode & ~ppscap) { 989 error = EINVAL; 990 break; 991 } 992 sc->ppsparam = *pp; 993 /* 994 * Compute msr masks from user-specified timestamp state. 995 */ 996 mode = sc->ppsparam.mode; 997 if (mode & PPS_HARDPPSONASSERT) { 998 mode |= PPS_CAPTUREASSERT; 999 /* XXX revoke any previous HARDPPS source */ 1000 } 1001 if (mode & PPS_HARDPPSONCLEAR) { 1002 mode |= PPS_CAPTURECLEAR; 1003 /* XXX revoke any previous HARDPPS source */ 1004 } 1005 switch (mode & PPS_CAPTUREBOTH) { 1006 case 0: 1007 sc->sc_ppsassertmask = 0; 1008 sc->sc_ppsassert = 1; 1009 sc->sc_ppsclearmask = 0; 1010 sc->sc_ppsclear = 1; 1011 break; 1012 1013 case PPS_CAPTUREASSERT: 1014 sc->sc_ppsassertmask = MSR_DCD; 1015 sc->sc_ppsassert = MSR_DCD; 1016 sc->sc_ppsclearmask = 0; 1017 sc->sc_ppsclear = 1; 1018 break; 1019 1020 case PPS_CAPTURECLEAR: 1021 sc->sc_ppsassertmask = 0; 1022 sc->sc_ppsassert = 1; 1023 sc->sc_ppsclearmask = MSR_DCD; 1024 sc->sc_ppsclear = 0; 1025 break; 1026 1027 case PPS_CAPTUREBOTH: 1028 sc->sc_ppsassertmask = MSR_DCD; 1029 sc->sc_ppsclearmask = MSR_DCD; 1030 sc->sc_ppsassert = MSR_DCD; 1031 sc->sc_ppsclear = 0; 1032 break; 1033 1034 default: 1035 error = EINVAL; 1036 break; 1037 } 1038 break; 1039 } 1040 1041 case PPS_GETCAP: 1042 *(int*)data = ppscap; 1043 break; 1044 1045 case PPS_FETCH: { 1046 pps_info_t *pi; 1047 pi = (pps_info_t *)data; 1048 *pi = sc->ppsinfo; 1049 break; 1050 } 1051 1052 case PPS_WAIT: 1053 /* XXX */ 1054 error = EOPNOTSUPP; 1055 break; 1056 1057 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1058 /* 1059 * Some GPS clocks models use the falling rather than 1060 * rising edge as the on-the-second signal. 1061 * The old API has no way to specify PPS polarity. 1062 */ 1063 #ifndef PPS_TRAILING_EDGE 1064 sc->sc_ppsassertmask = MSR_DCD; 1065 sc->sc_ppsassert = MSR_DCD; 1066 sc->sc_ppsclearmask = 0; 1067 sc->sc_ppsclear = 1; 1068 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1069 &sc->ppsinfo.assert_timestamp); 1070 #else 1071 sc->sc_ppsassertmask = 0; 1072 sc->sc_ppsassert = 1 1073 sc->sc_ppsclearmask = MSR_DCD; 1074 sc->sc_ppsclear = 0; 1075 TIMESPEC_TO_TIMEVAL((struct timeval*)data, 1076 &sc->ppsinfo.clear_timestamp); 1077 #endif 1078 break; 1079 1080 default: 1081 error = ENOTTY; 1082 break; 1083 } 1084 1085 splx(s); 1086 1087 #ifdef COM_DEBUG 1088 if (com_debug) 1089 comstatus(sc, "comioctl "); 1090 #endif 1091 1092 return (error); 1093 } 1094 1095 integrate void 1096 com_schedrx(sc) 1097 struct com_softc *sc; 1098 { 1099 1100 sc->sc_rx_ready = 1; 1101 1102 /* Wake up the poller. */ 1103 #ifdef __GENERIC_SOFT_INTERRUPTS 1104 softintr_schedule(sc->sc_si); 1105 #else 1106 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1107 setsoftserial(); 1108 #else 1109 if (!com_softintr_scheduled) { 1110 com_softintr_scheduled = 1; 1111 timeout(comsoft, NULL, 1); 1112 } 1113 #endif 1114 #endif 1115 } 1116 1117 void 1118 com_break(sc, onoff) 1119 struct com_softc *sc; 1120 int onoff; 1121 { 1122 1123 if (onoff) 1124 SET(sc->sc_lcr, LCR_SBREAK); 1125 else 1126 CLR(sc->sc_lcr, LCR_SBREAK); 1127 1128 if (!sc->sc_heldchange) { 1129 if (sc->sc_tx_busy) { 1130 sc->sc_heldtbc = sc->sc_tbc; 1131 sc->sc_tbc = 0; 1132 sc->sc_heldchange = 1; 1133 } else 1134 com_loadchannelregs(sc); 1135 } 1136 } 1137 1138 void 1139 com_modem(sc, onoff) 1140 struct com_softc *sc; 1141 int onoff; 1142 { 1143 1144 if (onoff) 1145 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1146 else 1147 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1148 1149 if (!sc->sc_heldchange) { 1150 if (sc->sc_tx_busy) { 1151 sc->sc_heldtbc = sc->sc_tbc; 1152 sc->sc_tbc = 0; 1153 sc->sc_heldchange = 1; 1154 } else 1155 com_loadchannelregs(sc); 1156 } 1157 } 1158 1159 static u_char 1160 cflag2lcr(cflag) 1161 tcflag_t cflag; 1162 { 1163 u_char lcr = 0; 1164 1165 switch (ISSET(cflag, CSIZE)) { 1166 case CS5: 1167 SET(lcr, LCR_5BITS); 1168 break; 1169 case CS6: 1170 SET(lcr, LCR_6BITS); 1171 break; 1172 case CS7: 1173 SET(lcr, LCR_7BITS); 1174 break; 1175 case CS8: 1176 SET(lcr, LCR_8BITS); 1177 break; 1178 } 1179 if (ISSET(cflag, PARENB)) { 1180 SET(lcr, LCR_PENAB); 1181 if (!ISSET(cflag, PARODD)) 1182 SET(lcr, LCR_PEVEN); 1183 } 1184 if (ISSET(cflag, CSTOPB)) 1185 SET(lcr, LCR_STOPB); 1186 1187 return (lcr); 1188 } 1189 1190 int 1191 comparam(tp, t) 1192 struct tty *tp; 1193 struct termios *t; 1194 { 1195 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1196 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1197 u_char lcr; 1198 int s; 1199 1200 /* Check requested parameters. */ 1201 if (ospeed < 0) 1202 return (EINVAL); 1203 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1204 return (EINVAL); 1205 1206 /* 1207 * For the console, always force CLOCAL and !HUPCL, so that the port 1208 * is always active. 1209 */ 1210 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1211 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1212 SET(t->c_cflag, CLOCAL); 1213 CLR(t->c_cflag, HUPCL); 1214 } 1215 1216 /* 1217 * If there were no changes, don't do anything. This avoids dropping 1218 * input and improves performance when all we did was frob things like 1219 * VMIN and VTIME. 1220 */ 1221 if (tp->t_ospeed == t->c_ospeed && 1222 tp->t_cflag == t->c_cflag) 1223 return (0); 1224 1225 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1226 1227 s = splserial(); 1228 1229 sc->sc_lcr = lcr; 1230 1231 /* 1232 * If we're not in a mode that assumes a connection is present, then 1233 * ignore carrier changes. 1234 */ 1235 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1236 sc->sc_msr_dcd = 0; 1237 else 1238 sc->sc_msr_dcd = MSR_DCD; 1239 /* 1240 * Set the flow control pins depending on the current flow control 1241 * mode. 1242 */ 1243 if (ISSET(t->c_cflag, CRTSCTS)) { 1244 sc->sc_mcr_dtr = MCR_DTR; 1245 sc->sc_mcr_rts = MCR_RTS; 1246 sc->sc_msr_cts = MSR_CTS; 1247 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1248 } else if (ISSET(t->c_cflag, MDMBUF)) { 1249 /* 1250 * For DTR/DCD flow control, make sure we don't toggle DTR for 1251 * carrier detection. 1252 */ 1253 sc->sc_mcr_dtr = 0; 1254 sc->sc_mcr_rts = MCR_DTR; 1255 sc->sc_msr_cts = MSR_DCD; 1256 sc->sc_efr = 0; 1257 } else { 1258 /* 1259 * If no flow control, then always set RTS. This will make 1260 * the other side happy if it mistakenly thinks we're doing 1261 * RTS/CTS flow control. 1262 */ 1263 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1264 sc->sc_mcr_rts = 0; 1265 sc->sc_msr_cts = 0; 1266 sc->sc_efr = 0; 1267 if (ISSET(sc->sc_mcr, MCR_DTR)) 1268 SET(sc->sc_mcr, MCR_RTS); 1269 else 1270 CLR(sc->sc_mcr, MCR_RTS); 1271 } 1272 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1273 1274 #if 0 1275 if (ospeed == 0) 1276 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1277 else 1278 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1279 #endif 1280 1281 sc->sc_dlbl = ospeed; 1282 sc->sc_dlbh = ospeed >> 8; 1283 1284 /* 1285 * Set the FIFO threshold based on the receive speed. 1286 * 1287 * * If it's a low speed, it's probably a mouse or some other 1288 * interactive device, so set the threshold low. 1289 * * If it's a high speed, trim the trigger level down to prevent 1290 * overflows. 1291 * * Otherwise set it a bit higher. 1292 */ 1293 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1294 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1295 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1296 sc->sc_fifo = FIFO_ENABLE | 1297 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1298 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1299 else 1300 sc->sc_fifo = 0; 1301 1302 /* And copy to tty. */ 1303 tp->t_ispeed = 0; 1304 tp->t_ospeed = t->c_ospeed; 1305 tp->t_cflag = t->c_cflag; 1306 1307 if (!sc->sc_heldchange) { 1308 if (sc->sc_tx_busy) { 1309 sc->sc_heldtbc = sc->sc_tbc; 1310 sc->sc_tbc = 0; 1311 sc->sc_heldchange = 1; 1312 } else 1313 com_loadchannelregs(sc); 1314 } 1315 1316 if (!ISSET(t->c_cflag, CHWFLOW)) { 1317 /* Disable the high water mark. */ 1318 sc->sc_r_hiwat = 0; 1319 sc->sc_r_lowat = 0; 1320 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1321 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1322 com_schedrx(sc); 1323 } 1324 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1325 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1326 com_hwiflow(sc); 1327 } 1328 } else { 1329 sc->sc_r_hiwat = com_rbuf_hiwat; 1330 sc->sc_r_lowat = com_rbuf_lowat; 1331 } 1332 1333 splx(s); 1334 1335 /* 1336 * Update the tty layer's idea of the carrier bit, in case we changed 1337 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1338 * explicit request. 1339 */ 1340 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1341 1342 #ifdef COM_DEBUG 1343 if (com_debug) 1344 comstatus(sc, "comparam "); 1345 #endif 1346 1347 if (!ISSET(t->c_cflag, CHWFLOW)) { 1348 if (sc->sc_tx_stopped) { 1349 sc->sc_tx_stopped = 0; 1350 comstart(tp); 1351 } 1352 } 1353 1354 return (0); 1355 } 1356 1357 void 1358 com_iflush(sc) 1359 struct com_softc *sc; 1360 { 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 #ifdef DIAGNOSTIC 1364 int reg; 1365 #endif 1366 int timo; 1367 1368 #ifdef DIAGNOSTIC 1369 reg = 0xffff; 1370 #endif 1371 timo = 50000; 1372 /* flush any pending I/O */ 1373 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1374 && --timo) 1375 #ifdef DIAGNOSTIC 1376 reg = 1377 #else 1378 (void) 1379 #endif 1380 bus_space_read_1(iot, ioh, com_data); 1381 #ifdef DIAGNOSTIC 1382 if (!timo) 1383 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1384 reg); 1385 #endif 1386 } 1387 1388 void 1389 com_loadchannelregs(sc) 1390 struct com_softc *sc; 1391 { 1392 bus_space_tag_t iot = sc->sc_iot; 1393 bus_space_handle_t ioh = sc->sc_ioh; 1394 1395 /* XXXXX necessary? */ 1396 com_iflush(sc); 1397 1398 bus_space_write_1(iot, ioh, com_ier, 0); 1399 1400 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1401 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1402 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1403 } 1404 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1405 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1406 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1407 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1408 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1409 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1410 1411 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1412 } 1413 1414 int 1415 comhwiflow(tp, block) 1416 struct tty *tp; 1417 int block; 1418 { 1419 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1420 int s; 1421 1422 if (sc->sc_mcr_rts == 0) 1423 return (0); 1424 1425 s = splserial(); 1426 if (block) { 1427 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1428 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1429 com_hwiflow(sc); 1430 } 1431 } else { 1432 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1433 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1434 com_schedrx(sc); 1435 } 1436 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1437 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1438 com_hwiflow(sc); 1439 } 1440 } 1441 splx(s); 1442 return (1); 1443 } 1444 1445 /* 1446 * (un)block input via hw flowcontrol 1447 */ 1448 void 1449 com_hwiflow(sc) 1450 struct com_softc *sc; 1451 { 1452 bus_space_tag_t iot = sc->sc_iot; 1453 bus_space_handle_t ioh = sc->sc_ioh; 1454 1455 if (sc->sc_mcr_rts == 0) 1456 return; 1457 1458 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1459 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1460 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1461 } else { 1462 SET(sc->sc_mcr, sc->sc_mcr_rts); 1463 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1464 } 1465 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1466 } 1467 1468 1469 void 1470 comstart(tp) 1471 struct tty *tp; 1472 { 1473 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1474 bus_space_tag_t iot = sc->sc_iot; 1475 bus_space_handle_t ioh = sc->sc_ioh; 1476 int s; 1477 1478 s = spltty(); 1479 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1480 goto out; 1481 if (sc->sc_tx_stopped) 1482 goto out; 1483 1484 if (tp->t_outq.c_cc <= tp->t_lowat) { 1485 if (ISSET(tp->t_state, TS_ASLEEP)) { 1486 CLR(tp->t_state, TS_ASLEEP); 1487 wakeup(&tp->t_outq); 1488 } 1489 selwakeup(&tp->t_wsel); 1490 if (tp->t_outq.c_cc == 0) 1491 goto out; 1492 } 1493 1494 /* Grab the first contiguous region of buffer space. */ 1495 { 1496 u_char *tba; 1497 int tbc; 1498 1499 tba = tp->t_outq.c_cf; 1500 tbc = ndqb(&tp->t_outq, 0); 1501 1502 (void)splserial(); 1503 1504 sc->sc_tba = tba; 1505 sc->sc_tbc = tbc; 1506 } 1507 1508 SET(tp->t_state, TS_BUSY); 1509 sc->sc_tx_busy = 1; 1510 1511 /* Enable transmit completion interrupts if necessary. */ 1512 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1513 SET(sc->sc_ier, IER_ETXRDY); 1514 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1515 } 1516 1517 /* Output the first chunk of the contiguous buffer. */ 1518 { 1519 int n; 1520 1521 n = sc->sc_tbc; 1522 if (n > sc->sc_fifolen) 1523 n = sc->sc_fifolen; 1524 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1525 sc->sc_tbc -= n; 1526 sc->sc_tba += n; 1527 } 1528 out: 1529 splx(s); 1530 return; 1531 } 1532 1533 /* 1534 * Stop output on a line. 1535 */ 1536 void 1537 comstop(tp, flag) 1538 struct tty *tp; 1539 int flag; 1540 { 1541 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1542 int s; 1543 1544 s = splserial(); 1545 if (ISSET(tp->t_state, TS_BUSY)) { 1546 /* Stop transmitting at the next chunk. */ 1547 sc->sc_tbc = 0; 1548 sc->sc_heldtbc = 0; 1549 if (!ISSET(tp->t_state, TS_TTSTOP)) 1550 SET(tp->t_state, TS_FLUSH); 1551 } 1552 splx(s); 1553 } 1554 1555 void 1556 comdiag(arg) 1557 void *arg; 1558 { 1559 struct com_softc *sc = arg; 1560 int overflows, floods; 1561 int s; 1562 1563 s = splserial(); 1564 overflows = sc->sc_overflows; 1565 sc->sc_overflows = 0; 1566 floods = sc->sc_floods; 1567 sc->sc_floods = 0; 1568 sc->sc_errors = 0; 1569 splx(s); 1570 1571 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1572 sc->sc_dev.dv_xname, 1573 overflows, overflows == 1 ? "" : "s", 1574 floods, floods == 1 ? "" : "s"); 1575 } 1576 1577 integrate void 1578 com_rxsoft(sc, tp) 1579 struct com_softc *sc; 1580 struct tty *tp; 1581 { 1582 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1583 u_char *get, *end; 1584 u_int cc, scc; 1585 u_char lsr; 1586 int code; 1587 int s; 1588 1589 end = sc->sc_ebuf; 1590 get = sc->sc_rbget; 1591 scc = cc = com_rbuf_size - sc->sc_rbavail; 1592 1593 if (cc == com_rbuf_size) { 1594 sc->sc_floods++; 1595 if (sc->sc_errors++ == 0) 1596 timeout(comdiag, sc, 60 * hz); 1597 } 1598 1599 while (cc) { 1600 code = get[0]; 1601 lsr = get[1]; 1602 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1603 if (ISSET(lsr, LSR_OE)) { 1604 sc->sc_overflows++; 1605 if (sc->sc_errors++ == 0) 1606 timeout(comdiag, sc, 60 * hz); 1607 } 1608 if (ISSET(lsr, LSR_BI | LSR_FE)) 1609 SET(code, TTY_FE); 1610 if (ISSET(lsr, LSR_PE)) 1611 SET(code, TTY_PE); 1612 } 1613 if ((*rint)(code, tp) == -1) { 1614 /* 1615 * The line discipline's buffer is out of space. 1616 */ 1617 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1618 /* 1619 * We're either not using flow control, or the 1620 * line discipline didn't tell us to block for 1621 * some reason. Either way, we have no way to 1622 * know when there's more space available, so 1623 * just drop the rest of the data. 1624 */ 1625 get += cc << 1; 1626 if (get >= end) 1627 get -= com_rbuf_size << 1; 1628 cc = 0; 1629 } else { 1630 /* 1631 * Don't schedule any more receive processing 1632 * until the line discipline tells us there's 1633 * space available (through comhwiflow()). 1634 * Leave the rest of the data in the input 1635 * buffer. 1636 */ 1637 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1638 } 1639 break; 1640 } 1641 get += 2; 1642 if (get >= end) 1643 get = sc->sc_rbuf; 1644 cc--; 1645 } 1646 1647 if (cc != scc) { 1648 sc->sc_rbget = get; 1649 s = splserial(); 1650 cc = sc->sc_rbavail += scc - cc; 1651 /* Buffers should be ok again, release possible block. */ 1652 if (cc >= sc->sc_r_lowat) { 1653 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1654 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1655 SET(sc->sc_ier, IER_ERXRDY); 1656 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1657 } 1658 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1659 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1660 com_hwiflow(sc); 1661 } 1662 } 1663 splx(s); 1664 } 1665 } 1666 1667 integrate void 1668 com_txsoft(sc, tp) 1669 struct com_softc *sc; 1670 struct tty *tp; 1671 { 1672 1673 CLR(tp->t_state, TS_BUSY); 1674 if (ISSET(tp->t_state, TS_FLUSH)) 1675 CLR(tp->t_state, TS_FLUSH); 1676 else 1677 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1678 (*linesw[tp->t_line].l_start)(tp); 1679 } 1680 1681 integrate void 1682 com_stsoft(sc, tp) 1683 struct com_softc *sc; 1684 struct tty *tp; 1685 { 1686 u_char msr, delta; 1687 int s; 1688 1689 s = splserial(); 1690 msr = sc->sc_msr; 1691 delta = sc->sc_msr_delta; 1692 sc->sc_msr_delta = 0; 1693 splx(s); 1694 1695 if (ISSET(delta, sc->sc_msr_dcd)) { 1696 /* 1697 * Inform the tty layer that carrier detect changed. 1698 */ 1699 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1700 } 1701 1702 if (ISSET(delta, sc->sc_msr_cts)) { 1703 /* Block or unblock output according to flow control. */ 1704 if (ISSET(msr, sc->sc_msr_cts)) { 1705 sc->sc_tx_stopped = 0; 1706 (*linesw[tp->t_line].l_start)(tp); 1707 } else { 1708 sc->sc_tx_stopped = 1; 1709 } 1710 } 1711 1712 #ifdef COM_DEBUG 1713 if (com_debug) 1714 comstatus(sc, "com_stsoft"); 1715 #endif 1716 } 1717 1718 #ifdef __GENERIC_SOFT_INTERRUPTS 1719 void 1720 comsoft(arg) 1721 void *arg; 1722 { 1723 struct com_softc *sc = arg; 1724 struct tty *tp; 1725 1726 if (!sc->enabled) 1727 return; 1728 1729 { 1730 #else 1731 void 1732 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1733 comsoft() 1734 #else 1735 comsoft(arg) 1736 void *arg; 1737 #endif 1738 { 1739 struct com_softc *sc; 1740 struct tty *tp; 1741 int unit; 1742 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1743 int s; 1744 1745 s = splsoftserial(); 1746 com_softintr_scheduled = 0; 1747 #endif 1748 1749 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1750 sc = com_cd.cd_devs[unit]; 1751 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1752 continue; 1753 1754 if (!sc->enabled) 1755 continue; 1756 1757 tp = sc->sc_tty; 1758 if (tp == NULL) 1759 continue; 1760 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1761 continue; 1762 #endif 1763 tp = sc->sc_tty; 1764 1765 if (sc->sc_rx_ready) { 1766 sc->sc_rx_ready = 0; 1767 com_rxsoft(sc, tp); 1768 } 1769 1770 if (sc->sc_st_check) { 1771 sc->sc_st_check = 0; 1772 com_stsoft(sc, tp); 1773 } 1774 1775 if (sc->sc_tx_done) { 1776 sc->sc_tx_done = 0; 1777 com_txsoft(sc, tp); 1778 } 1779 } 1780 1781 #ifndef __GENERIC_SOFT_INTERRUPTS 1782 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1783 splx(s); 1784 #endif 1785 #endif 1786 } 1787 1788 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1789 /* there has got to be a better way to do comsoft() */ 1790 }} 1791 #endif 1792 1793 int 1794 comintr(arg) 1795 void *arg; 1796 { 1797 struct com_softc *sc = arg; 1798 bus_space_tag_t iot = sc->sc_iot; 1799 bus_space_handle_t ioh = sc->sc_ioh; 1800 u_char *put, *end; 1801 u_int cc; 1802 u_char lsr, iir; 1803 1804 if (!sc->enabled) 1805 return (0); 1806 1807 iir = bus_space_read_1(iot, ioh, com_iir); 1808 if (ISSET(iir, IIR_NOPEND)) 1809 return (0); 1810 1811 end = sc->sc_ebuf; 1812 put = sc->sc_rbput; 1813 cc = sc->sc_rbavail; 1814 1815 do { 1816 u_char msr, delta; 1817 1818 lsr = bus_space_read_1(iot, ioh, com_lsr); 1819 #if defined(DDB) || defined(KGDB) 1820 if (ISSET(lsr, LSR_BI)) { 1821 #ifdef DDB 1822 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1823 Debugger(); 1824 continue; 1825 } 1826 #endif 1827 #ifdef KGDB 1828 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1829 kgdb_connect(1); 1830 continue; 1831 } 1832 #endif 1833 } 1834 #endif /* DDB || KGDB */ 1835 1836 if (ISSET(lsr, LSR_RCV_MASK) && 1837 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1838 while (cc > 0) { 1839 put[0] = bus_space_read_1(iot, ioh, com_data); 1840 put[1] = lsr; 1841 put += 2; 1842 if (put >= end) 1843 put = sc->sc_rbuf; 1844 cc--; 1845 1846 lsr = bus_space_read_1(iot, ioh, com_lsr); 1847 if (!ISSET(lsr, LSR_RCV_MASK)) 1848 break; 1849 } 1850 1851 /* 1852 * Current string of incoming characters ended because 1853 * no more data was available or we ran out of space. 1854 * Schedule a receive event if any data was received. 1855 * If we're out of space, turn off receive interrupts. 1856 */ 1857 sc->sc_rbput = put; 1858 sc->sc_rbavail = cc; 1859 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1860 sc->sc_rx_ready = 1; 1861 1862 /* 1863 * See if we are in danger of overflowing a buffer. If 1864 * so, use hardware flow control to ease the pressure. 1865 */ 1866 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1867 cc < sc->sc_r_hiwat) { 1868 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1869 com_hwiflow(sc); 1870 } 1871 1872 /* 1873 * If we're out of space, disable receive interrupts 1874 * until the queue has drained a bit. 1875 */ 1876 if (!cc) { 1877 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1878 CLR(sc->sc_ier, IER_ERXRDY); 1879 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1880 } 1881 } else { 1882 if ((iir & IIR_IMASK) == IIR_RXRDY) { 1883 bus_space_write_1(iot, ioh, com_ier, 0); 1884 delay(10); 1885 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 1886 iir = IIR_NOPEND; 1887 continue; 1888 } 1889 } 1890 1891 msr = bus_space_read_1(iot, ioh, com_msr); 1892 delta = msr ^ sc->sc_msr; 1893 sc->sc_msr = msr; 1894 if (ISSET(delta, sc->sc_msr_mask)) { 1895 SET(sc->sc_msr_delta, delta); 1896 1897 /* 1898 * Pulse-per-second clock signal on edge of DCD? 1899 */ 1900 if (ISSET(delta, (sc->sc_ppsassertmask | 1901 sc->sc_ppsclearmask))) { 1902 struct timeval tv; 1903 if ((msr & sc->sc_ppsassertmask) == 1904 sc->sc_ppsassert) { 1905 1906 /* XXX nanotime() */ 1907 microtime(&tv); 1908 TIMEVAL_TO_TIMESPEC(&tv, 1909 &sc->ppsinfo.assert_timestamp); 1910 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1911 timespecadd(&sc->ppsinfo.assert_timestamp, 1912 &sc->ppsparam.assert_offset, 1913 &sc->ppsinfo.assert_timestamp); 1914 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1915 } 1916 1917 #ifdef PPS_SYNC 1918 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1919 hardpps(&tv, tv.tv_usec); 1920 #endif 1921 sc->ppsinfo.assert_sequence++; 1922 sc->ppsinfo.current_mode = 1923 sc->ppsparam.mode; 1924 1925 } else if ((msr & sc->sc_ppsclearmask) == 1926 sc->sc_ppsclear) { 1927 /* XXX nanotime() */ 1928 1929 microtime(&tv); 1930 TIMEVAL_TO_TIMESPEC(&tv, 1931 &sc->ppsinfo.clear_timestamp); 1932 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1933 timespecadd(&sc->ppsinfo.clear_timestamp, 1934 &sc->ppsparam.clear_offset, 1935 &sc->ppsinfo.clear_timestamp); 1936 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1937 } 1938 1939 #ifdef PPS_SYNC 1940 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1941 hardpps(&tv, tv.tv_usec); 1942 #endif 1943 sc->ppsinfo.clear_sequence++; 1944 sc->ppsinfo.current_mode = 1945 sc->ppsparam.mode; 1946 } 1947 } 1948 1949 /* 1950 * Stop output immediately if we lose the output 1951 * flow control signal or carrier detect. 1952 */ 1953 if (ISSET(~msr, sc->sc_msr_mask)) { 1954 sc->sc_tbc = 0; 1955 sc->sc_heldtbc = 0; 1956 #ifdef COM_DEBUG 1957 if (com_debug) 1958 comstatus(sc, "comintr "); 1959 #endif 1960 } 1961 1962 sc->sc_st_check = 1; 1963 } 1964 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 1965 1966 /* 1967 * Done handling any receive interrupts. See if data can be 1968 * transmitted as well. Schedule tx done event if no data left 1969 * and tty was marked busy. 1970 */ 1971 if (ISSET(lsr, LSR_TXRDY)) { 1972 /* 1973 * If we've delayed a parameter change, do it now, and restart 1974 * output. 1975 */ 1976 if (sc->sc_heldchange) { 1977 com_loadchannelregs(sc); 1978 sc->sc_heldchange = 0; 1979 sc->sc_tbc = sc->sc_heldtbc; 1980 sc->sc_heldtbc = 0; 1981 } 1982 1983 /* Output the next chunk of the contiguous buffer, if any. */ 1984 if (sc->sc_tbc > 0) { 1985 int n; 1986 1987 n = sc->sc_tbc; 1988 if (n > sc->sc_fifolen) 1989 n = sc->sc_fifolen; 1990 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1991 sc->sc_tbc -= n; 1992 sc->sc_tba += n; 1993 } else { 1994 /* Disable transmit completion interrupts if necessary. */ 1995 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1996 CLR(sc->sc_ier, IER_ETXRDY); 1997 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1998 } 1999 if (sc->sc_tx_busy) { 2000 sc->sc_tx_busy = 0; 2001 sc->sc_tx_done = 1; 2002 } 2003 } 2004 } 2005 2006 /* Wake up the poller. */ 2007 #ifdef __GENERIC_SOFT_INTERRUPTS 2008 softintr_schedule(sc->sc_si); 2009 #else 2010 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2011 setsoftserial(); 2012 #else 2013 if (!com_softintr_scheduled) { 2014 com_softintr_scheduled = 1; 2015 timeout(comsoft, NULL, 1); 2016 } 2017 #endif 2018 #endif 2019 2020 #if NRND > 0 && defined(RND_COM) 2021 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2022 #endif 2023 2024 return (1); 2025 } 2026 2027 /* 2028 * The following functions are polled getc and putc routines, shared 2029 * by the console and kgdb glue. 2030 */ 2031 2032 int 2033 com_common_getc(iot, ioh) 2034 bus_space_tag_t iot; 2035 bus_space_handle_t ioh; 2036 { 2037 int s = splserial(); 2038 u_char stat, c; 2039 2040 /* block until a character becomes available */ 2041 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2042 ; 2043 2044 c = bus_space_read_1(iot, ioh, com_data); 2045 stat = bus_space_read_1(iot, ioh, com_iir); 2046 splx(s); 2047 return (c); 2048 } 2049 2050 void 2051 com_common_putc(iot, ioh, c) 2052 bus_space_tag_t iot; 2053 bus_space_handle_t ioh; 2054 int c; 2055 { 2056 int s = splserial(); 2057 u_char stat; 2058 int timo; 2059 2060 /* wait for any pending transmission to finish */ 2061 timo = 50000; 2062 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2063 && --timo) 2064 ; 2065 2066 bus_space_write_1(iot, ioh, com_data, c); 2067 /* wait for this transmission to complete */ 2068 timo = 1500000; 2069 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) 2070 && --timo) 2071 ; 2072 2073 /* clear any interrupts generated by this transmission */ 2074 stat = bus_space_read_1(iot, ioh, com_iir); 2075 splx(s); 2076 } 2077 2078 /* 2079 * Initialize UART to known state. 2080 */ 2081 int 2082 cominit(iot, iobase, rate, frequency, cflag, iohp) 2083 bus_space_tag_t iot; 2084 int iobase; 2085 int rate, frequency; 2086 tcflag_t cflag; 2087 bus_space_handle_t *iohp; 2088 { 2089 bus_space_handle_t ioh; 2090 2091 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2092 return (ENOMEM); /* ??? */ 2093 2094 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2095 bus_space_write_1(iot, ioh, com_efr, 0); 2096 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2097 rate = comspeed(rate, frequency); 2098 bus_space_write_1(iot, ioh, com_dlbl, rate); 2099 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2100 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2101 bus_space_write_1(iot, ioh, com_mcr, 0); 2102 bus_space_write_1(iot, ioh, com_fifo, 2103 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2104 bus_space_write_1(iot, ioh, com_ier, 0); 2105 2106 *iohp = ioh; 2107 return (0); 2108 } 2109 2110 /* 2111 * Following are all routines needed for COM to act as console 2112 */ 2113 2114 int 2115 comcnattach(iot, iobase, rate, frequency, cflag) 2116 bus_space_tag_t iot; 2117 int iobase; 2118 int rate, frequency; 2119 tcflag_t cflag; 2120 { 2121 int res; 2122 static struct consdev comcons = { 2123 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 2124 }; 2125 2126 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2127 if (res) 2128 return (res); 2129 2130 cn_tab = &comcons; 2131 2132 comconstag = iot; 2133 comconsaddr = iobase; 2134 comconsrate = rate; 2135 comconscflag = cflag; 2136 2137 return (0); 2138 } 2139 2140 int 2141 comcngetc(dev) 2142 dev_t dev; 2143 { 2144 2145 return (com_common_getc(comconstag, comconsioh)); 2146 } 2147 2148 /* 2149 * Console kernel output character routine. 2150 */ 2151 void 2152 comcnputc(dev, c) 2153 dev_t dev; 2154 int c; 2155 { 2156 2157 com_common_putc(comconstag, comconsioh, c); 2158 } 2159 2160 void 2161 comcnpollc(dev, on) 2162 dev_t dev; 2163 int on; 2164 { 2165 2166 } 2167 2168 #ifdef KGDB 2169 int 2170 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2171 bus_space_tag_t iot; 2172 int iobase; 2173 int rate, frequency; 2174 tcflag_t cflag; 2175 { 2176 int res; 2177 2178 if (iot == comconstag && iobase == comconsaddr) 2179 return (EBUSY); /* cannot share with console */ 2180 2181 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2182 if (res) 2183 return (res); 2184 2185 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2186 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2187 2188 com_kgdb_iot = iot; 2189 com_kgdb_addr = iobase; 2190 2191 return (0); 2192 } 2193 2194 /* ARGSUSED */ 2195 int 2196 com_kgdb_getc(arg) 2197 void *arg; 2198 { 2199 2200 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2201 } 2202 2203 /* ARGSUSED */ 2204 void 2205 com_kgdb_putc(arg, c) 2206 void *arg; 2207 int c; 2208 { 2209 2210 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2211 } 2212 #endif /* KGDB */ 2213 2214 /* helper function to identify the com ports used by 2215 console or KGDB (and not yet autoconf attached) */ 2216 int 2217 com_is_console(iot, iobase, ioh) 2218 bus_space_tag_t iot; 2219 int iobase; 2220 bus_space_handle_t *ioh; 2221 { 2222 bus_space_handle_t help; 2223 2224 if (!comconsattached && 2225 iot == comconstag && iobase == comconsaddr) 2226 help = comconsioh; 2227 #ifdef KGDB 2228 else if (!com_kgdb_attached && 2229 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2230 help = com_kgdb_ioh; 2231 #endif 2232 else 2233 return (0); 2234 2235 if (ioh) 2236 *ioh = help; 2237 return (1); 2238 } 2239
Indexes created Thu Sep 25 16:09:42 GMT 2025