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com.c revision 1.149
      1 /*	$NetBSD: com.c,v 1.149 1998/11/18 23:58:52 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Copyright (c) 1991 The Regents of the University of California.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by the University of
     54  *	California, Berkeley and its contributors.
     55  * 4. Neither the name of the University nor the names of its contributors
     56  *    may be used to endorse or promote products derived from this software
     57  *    without specific prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     60  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     61  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     62  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     63  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     64  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     65  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  * SUCH DAMAGE.
     70  *
     71  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     72  */
     73 
     74 /*
     75  * COM driver, uses National Semiconductor NS16450/NS16550AF UART
     76  * Supports automatic hardware flow control on StarTech ST16C650A UART
     77  */
     78 
     79 #include "opt_ddb.h"
     80 
     81 #include "rnd.h"
     82 #if NRND > 0 && defined(RND_COM)
     83 #include <sys/rnd.h>
     84 #endif
     85 
     86 #include <sys/param.h>
     87 #include <sys/systm.h>
     88 #include <sys/ioctl.h>
     89 #include <sys/select.h>
     90 #include <sys/tty.h>
     91 #include <sys/proc.h>
     92 #include <sys/user.h>
     93 #include <sys/conf.h>
     94 #include <sys/file.h>
     95 #include <sys/uio.h>
     96 #include <sys/kernel.h>
     97 #include <sys/syslog.h>
     98 #include <sys/types.h>
     99 #include <sys/device.h>
    100 #include <sys/malloc.h>
    101 #include <sys/timepps.h>
    102 #include <sys/vnode.h>
    103 
    104 #include <machine/intr.h>
    105 #include <machine/bus.h>
    106 
    107 #include <dev/ic/comreg.h>
    108 #include <dev/ic/comvar.h>
    109 #include <dev/ic/ns16550reg.h>
    110 #include <dev/ic/st16650reg.h>
    111 #ifdef COM_HAYESP
    112 #include <dev/ic/hayespreg.h>
    113 #endif
    114 #define	com_lcr	com_cfcr
    115 #include <dev/cons.h>
    116 
    117 #include "com.h"
    118 
    119 #ifdef COM_HAYESP
    120 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
    121 #endif
    122 
    123 #if defined(DDB) || defined(KGDB)
    124 static void com_enable_debugport __P((struct com_softc *));
    125 #endif
    126 void	com_attach_subr	__P((struct com_softc *sc));
    127 void	com_config	__P((struct com_softc *));
    128 void	com_shutdown	__P((struct com_softc *));
    129 int	comspeed	__P((long, long));
    130 static	u_char	cflag2lcr __P((tcflag_t));
    131 int	comparam	__P((struct tty *, struct termios *));
    132 void	comstart	__P((struct tty *));
    133 void	comstop		__P((struct tty *, int));
    134 int	comhwiflow	__P((struct tty *, int));
    135 
    136 void	com_loadchannelregs __P((struct com_softc *));
    137 void	com_hwiflow	__P((struct com_softc *));
    138 void	com_break	__P((struct com_softc *, int));
    139 void	com_modem	__P((struct com_softc *, int));
    140 void	com_iflush	__P((struct com_softc *));
    141 
    142 int	com_common_getc	__P((bus_space_tag_t, bus_space_handle_t));
    143 void	com_common_putc	__P((bus_space_tag_t, bus_space_handle_t, int));
    144 
    145 /* XXX: These belong elsewhere */
    146 cdev_decl(com);
    147 bdev_decl(com);
    148 
    149 int	comcngetc	__P((dev_t));
    150 void	comcnputc	__P((dev_t, int));
    151 void	comcnpollc	__P((dev_t, int));
    152 
    153 #define	integrate	static inline
    154 #ifdef __GENERIC_SOFT_INTERRUPTS
    155 void 	comsoft		__P((void *));
    156 #else
    157 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    158 void 	comsoft		__P((void));
    159 #else
    160 void 	comsoft		__P((void *));
    161 #endif
    162 #endif
    163 integrate void com_rxsoft	__P((struct com_softc *, struct tty *));
    164 integrate void com_txsoft	__P((struct com_softc *, struct tty *));
    165 integrate void com_stsoft	__P((struct com_softc *, struct tty *));
    166 integrate void com_schedrx	__P((struct com_softc *));
    167 void	comdiag		__P((void *));
    168 
    169 extern struct cfdriver com_cd;
    170 
    171 /*
    172  * Make this an option variable one can patch.
    173  * But be warned:  this must be a power of 2!
    174  */
    175 u_int com_rbuf_size = COM_RING_SIZE;
    176 
    177 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    178 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4;
    179 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4;
    180 
    181 static int	comconsaddr;
    182 static bus_space_tag_t comconstag;
    183 static bus_space_handle_t comconsioh;
    184 static int	comconsattached;
    185 static int comconsrate;
    186 static tcflag_t comconscflag;
    187 
    188 static int ppscap =
    189 	PPS_TSFMT_TSPEC |
    190 	PPS_CAPTUREASSERT |
    191 	PPS_CAPTURECLEAR |
    192 #ifdef  PPS_SYNC
    193 	PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
    194 #endif	/* PPS_SYNC */
    195 	PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
    196 
    197 static u_char tiocm_xxx2mcr __P((int));
    198 
    199 #ifndef __GENERIC_SOFT_INTERRUPTS
    200 #ifdef __NO_SOFT_SERIAL_INTERRUPT
    201 volatile int	com_softintr_scheduled;
    202 #endif
    203 #endif
    204 
    205 #ifdef KGDB
    206 #include <sys/kgdb.h>
    207 
    208 static int com_kgdb_addr;
    209 static bus_space_tag_t com_kgdb_iot;
    210 static bus_space_handle_t com_kgdb_ioh;
    211 static int com_kgdb_attached;
    212 
    213 int	com_kgdb_getc __P((void *));
    214 void	com_kgdb_putc __P((void *, int));
    215 #endif /* KGDB */
    216 
    217 #define	COMUNIT_MASK	0x7ffff
    218 #define	COMDIALOUT_MASK	0x80000
    219 
    220 #define	COMUNIT(x)	(minor(x) & COMUNIT_MASK)
    221 #define	COMDIALOUT(x)	(minor(x) & COMDIALOUT_MASK)
    222 
    223 #define	COM_ISALIVE(sc)	((sc)->enabled != 0 && \
    224 			 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
    225 
    226 int
    227 comspeed(speed, frequency)
    228 	long speed, frequency;
    229 {
    230 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    231 
    232 	int x, err;
    233 
    234 #if 0
    235 	if (speed == 0)
    236 		return (0);
    237 #endif
    238 	if (speed <= 0)
    239 		return (-1);
    240 	x = divrnd(frequency / 16, speed);
    241 	if (x <= 0)
    242 		return (-1);
    243 	err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
    244 	if (err < 0)
    245 		err = -err;
    246 	if (err > COM_TOLERANCE)
    247 		return (-1);
    248 	return (x);
    249 
    250 #undef	divrnd(n, q)
    251 }
    252 
    253 #ifdef COM_DEBUG
    254 int	com_debug = 0;
    255 
    256 void comstatus __P((struct com_softc *, char *));
    257 void
    258 comstatus(sc, str)
    259 	struct com_softc *sc;
    260 	char *str;
    261 {
    262 	struct tty *tp = sc->sc_tty;
    263 
    264 	printf("%s: %s %sclocal  %sdcd %sts_carr_on %sdtr %stx_stopped\n",
    265 	    sc->sc_dev.dv_xname, str,
    266 	    ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
    267 	    ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-",
    268 	    ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
    269 	    ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
    270 	    sc->sc_tx_stopped ? "+" : "-");
    271 
    272 	printf("%s: %s %scrtscts %scts %sts_ttstop  %srts %xrx_flags\n",
    273 	    sc->sc_dev.dv_xname, str,
    274 	    ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
    275 	    ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-",
    276 	    ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
    277 	    ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
    278 	    sc->sc_rx_flags);
    279 }
    280 #endif
    281 
    282 int
    283 comprobe1(iot, ioh)
    284 	bus_space_tag_t iot;
    285 	bus_space_handle_t ioh;
    286 {
    287 
    288 	/* force access to id reg */
    289 	bus_space_write_1(iot, ioh, com_lcr, 0);
    290 	bus_space_write_1(iot, ioh, com_iir, 0);
    291 	if (bus_space_read_1(iot, ioh, com_iir) & 0x38)
    292 		return (0);
    293 
    294 	return (1);
    295 }
    296 
    297 #ifdef COM_HAYESP
    298 int
    299 comprobeHAYESP(hayespioh, sc)
    300 	bus_space_handle_t hayespioh;
    301 	struct com_softc *sc;
    302 {
    303 	char	val, dips;
    304 	int	combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
    305 	bus_space_tag_t iot = sc->sc_iot;
    306 
    307 	/*
    308 	 * Hayes ESP cards have two iobases.  One is for compatibility with
    309 	 * 16550 serial chips, and at the same ISA PC base addresses.  The
    310 	 * other is for ESP-specific enhanced features, and lies at a
    311 	 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300).
    312 	 */
    313 
    314 	/* Test for ESP signature */
    315 	if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
    316 		return (0);
    317 
    318 	/*
    319 	 * ESP is present at ESP enhanced base address; unknown com port
    320 	 */
    321 
    322 	/* Get the dip-switch configurations */
    323 	bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
    324 	dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
    325 
    326 	/* Determine which com port this ESP card services: bits 0,1 of  */
    327 	/*  dips is the port # (0-3); combaselist[val] is the com_iobase */
    328 	if (sc->sc_iobase != combaselist[dips & 0x03])
    329 		return (0);
    330 
    331 	printf(": ESP");
    332 
    333  	/* Check ESP Self Test bits. */
    334 	/* Check for ESP version 2.0: bits 4,5,6 == 010 */
    335 	bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
    336 	val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */
    337 	val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
    338 	if ((val & 0x70) < 0x20) {
    339 		printf("-old (%o)", val & 0x70);
    340 		/* we do not support the necessary features */
    341 		return (0);
    342 	}
    343 
    344 	/* Check for ability to emulate 16550: bit 8 == 1 */
    345 	if ((dips & 0x80) == 0) {
    346 		printf(" slave");
    347 		/* XXX Does slave really mean no 16550 support?? */
    348 		return (0);
    349 	}
    350 
    351 	/*
    352 	 * If we made it this far, we are a full-featured ESP v2.0 (or
    353 	 * better), at the correct com port address.
    354 	 */
    355 
    356 	SET(sc->sc_hwflags, COM_HW_HAYESP);
    357 	printf(", 1024 byte fifo\n");
    358 	return (1);
    359 }
    360 #endif
    361 
    362 #if defined(DDB) || defined(KGDB)
    363 static void
    364 com_enable_debugport(sc)
    365 	struct com_softc *sc;
    366 {
    367 	int s;
    368 
    369 	/* Turn on line break interrupt, set carrier. */
    370 	s = splserial();
    371 	sc->sc_ier = IER_ERXRDY;
    372 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
    373 	SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
    374 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
    375 	splx(s);
    376 }
    377 #endif
    378 
    379 void
    380 com_attach_subr(sc)
    381 	struct com_softc *sc;
    382 {
    383 	int iobase = sc->sc_iobase;
    384 	bus_space_tag_t iot = sc->sc_iot;
    385 	bus_space_handle_t ioh = sc->sc_ioh;
    386 	struct tty *tp;
    387 #ifdef COM16650
    388 	u_int8_t lcr;
    389 #endif
    390 #ifdef COM_HAYESP
    391 	int	hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
    392 	int	*hayespp;
    393 #endif
    394 
    395 	/* Disable interrupts before configuring the device. */
    396 	sc->sc_ier = 0;
    397 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
    398 
    399 	if (iot == comconstag && iobase == comconsaddr) {
    400 		comconsattached = 1;
    401 
    402 		/* Make sure the console is always "hardwired". */
    403 		delay(1000);			/* wait for output to finish */
    404 		SET(sc->sc_hwflags, COM_HW_CONSOLE);
    405 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    406 	}
    407 
    408 #ifdef COM_HAYESP
    409 	/* Look for a Hayes ESP board. */
    410 	for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
    411 		bus_space_handle_t hayespioh;
    412 
    413 #define	HAYESP_NPORTS	8			/* XXX XXX XXX ??? ??? ??? */
    414 		if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh))
    415 			continue;
    416 		if (comprobeHAYESP(hayespioh, sc)) {
    417 			sc->sc_hayespioh = hayespioh;
    418 			sc->sc_fifolen = 1024;
    419 
    420 			break;
    421 		}
    422 		bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
    423 	}
    424 	/* No ESP; look for other things. */
    425 	if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
    426 #endif
    427 	sc->sc_fifolen = 1;
    428 	/* look for a NS 16550AF UART with FIFOs */
    429 	bus_space_write_1(iot, ioh, com_fifo,
    430 	    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
    431 	delay(100);
    432 	if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK)
    433 	    == IIR_FIFO_MASK)
    434 		if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14)
    435 		    == FIFO_TRIGGER_14) {
    436 			SET(sc->sc_hwflags, COM_HW_FIFO);
    437 
    438 #ifdef COM16650
    439 			/*
    440 			 * IIR changes into the EFR if LCR is set to LCR_EERS
    441 			 * on 16650s. We also know IIR != 0 at this point.
    442 			 * Write 0 into the EFR, and read it. If the result
    443 			 * is 0, we have a 16650.
    444 			 *
    445 			 * Older 16650s were broken; the test to detect them
    446 			 * is taken from the Linux driver. Apparently
    447 			 * setting DLAB enable gives access to the EFR on
    448 			 * these chips.
    449 			 */
    450 			lcr = bus_space_read_1(iot, ioh, com_lcr);
    451 			bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
    452 			bus_space_write_1(iot, ioh, com_efr, 0);
    453 			if (bus_space_read_1(iot, ioh, com_efr) == 0) {
    454 				bus_space_write_1(iot, ioh, com_lcr,
    455 				    lcr | LCR_DLAB);
    456 				if (bus_space_read_1(iot, ioh, com_efr) == 0) {
    457 					CLR(sc->sc_hwflags, COM_HW_FIFO);
    458 					sc->sc_fifolen = 0;
    459 				} else {
    460 					SET(sc->sc_hwflags, COM_HW_FLOW);
    461 					sc->sc_fifolen = 32;
    462 				}
    463 			} else
    464 #endif
    465 				sc->sc_fifolen = 16;
    466 
    467 #ifdef COM16650
    468 			bus_space_write_1(iot, ioh, com_lcr, lcr);
    469 			if (sc->sc_fifolen == 0)
    470 				printf(": st16650, broken fifo\n");
    471 			else if (sc->sc_fifolen == 32)
    472 				printf(": st16650a, working fifo\n");
    473 			else
    474 #endif
    475 				printf(": ns16550a, working fifo\n");
    476 		} else
    477 			printf(": ns16550, broken fifo\n");
    478 	else
    479 		printf(": ns8250 or ns16450, no fifo\n");
    480 	bus_space_write_1(iot, ioh, com_fifo, 0);
    481 #ifdef COM_HAYESP
    482 	}
    483 #endif
    484 
    485 	tp = ttymalloc();
    486 	tp->t_oproc = comstart;
    487 	tp->t_param = comparam;
    488 	tp->t_hwiflow = comhwiflow;
    489 
    490 	sc->sc_tty = tp;
    491 	sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    492 	if (sc->sc_rbuf == NULL) {
    493 		printf("%s: unable to allocate ring buffer\n",
    494 		    sc->sc_dev.dv_xname);
    495 		return;
    496 	}
    497 	sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1);
    498 
    499 	tty_attach(tp);
    500 
    501 	if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
    502 		SET(sc->sc_mcr, MCR_IENABLE);
    503 
    504 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
    505 		int maj;
    506 
    507 		/* locate the major number */
    508 		for (maj = 0; maj < nchrdev; maj++)
    509 			if (cdevsw[maj].d_open == comopen)
    510 				break;
    511 
    512 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
    513 
    514 		printf("%s: console\n", sc->sc_dev.dv_xname);
    515 	}
    516 
    517 #ifdef KGDB
    518 	/*
    519 	 * Allow kgdb to "take over" this port.  If this is
    520 	 * the kgdb device, it has exclusive use.
    521 	 */
    522 	if (iot == com_kgdb_iot && iobase == com_kgdb_addr) {
    523 		com_kgdb_attached = 1;
    524 
    525 		SET(sc->sc_hwflags, COM_HW_KGDB);
    526 		printf("%s: kgdb\n", sc->sc_dev.dv_xname);
    527 	}
    528 #endif
    529 
    530 #ifdef __GENERIC_SOFT_INTERRUPTS
    531 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc);
    532 #endif
    533 
    534 #if NRND > 0 && defined(RND_COM)
    535 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
    536 			  RND_TYPE_TTY);
    537 #endif
    538 
    539 	/* if there are no enable/disable functions, assume the device
    540 	   is always enabled */
    541 	if (!sc->enable)
    542 		sc->enabled = 1;
    543 
    544 	com_config(sc);
    545 
    546 	SET(sc->sc_hwflags, COM_HW_DEV_OK);
    547 }
    548 
    549 void
    550 com_config(sc)
    551 	struct com_softc *sc;
    552 {
    553 	bus_space_tag_t iot = sc->sc_iot;
    554 	bus_space_handle_t ioh = sc->sc_ioh;
    555 
    556 	/* Disable interrupts before configuring the device. */
    557 	sc->sc_ier = 0;
    558 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
    559 
    560 #ifdef COM_HAYESP
    561 	/* Look for a Hayes ESP board. */
    562 	if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
    563 		sc->sc_fifolen = 1024;
    564 
    565 		/* Set 16550 compatibility mode */
    566 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
    567 				  HAYESP_SETMODE);
    568 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    569 				  HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
    570 				  HAYESP_MODE_SCALE);
    571 
    572 		/* Set RTS/CTS flow control */
    573 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
    574 				  HAYESP_SETFLOWTYPE);
    575 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    576 				  HAYESP_FLOW_RTS);
    577 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    578 				  HAYESP_FLOW_CTS);
    579 
    580 		/* Set flow control levels */
    581 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
    582 				  HAYESP_SETRXFLOW);
    583 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    584 				  HAYESP_HIBYTE(HAYESP_RXHIWMARK));
    585 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    586 				  HAYESP_LOBYTE(HAYESP_RXHIWMARK));
    587 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    588 				  HAYESP_HIBYTE(HAYESP_RXLOWMARK));
    589 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
    590 				  HAYESP_LOBYTE(HAYESP_RXLOWMARK));
    591 	}
    592 #endif
    593 
    594 #ifdef DDB
    595 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
    596 		com_enable_debugport(sc);
    597 #endif
    598 
    599 #ifdef KGDB
    600 	/*
    601 	 * Allow kgdb to "take over" this port.  If this is
    602 	 * the kgdb device, it has exclusive use.
    603 	 */
    604 	if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
    605 		com_enable_debugport(sc);
    606 #endif
    607 }
    608 
    609 int
    610 com_detach(self, flags)
    611 	struct device *self;
    612 	int flags;
    613 {
    614 	struct com_softc *sc = (struct com_softc *)self;
    615 	int maj, mn;
    616 
    617 	/* locate the major number */
    618 	for (maj = 0; maj < nchrdev; maj++)
    619 		if (cdevsw[maj].d_open == comopen)
    620 			break;
    621 
    622 	/* Nuke the vnodes for any open instances. */
    623 	mn = self->dv_unit;
    624 	vdevgone(maj, mn, mn, VCHR);
    625 
    626 	mn |= COMDIALOUT_MASK;
    627 	vdevgone(maj, mn, mn, VCHR);
    628 
    629 	/* Free the receive buffer. */
    630 	free(sc->sc_rbuf, M_DEVBUF);
    631 
    632 	/* Detach and free the tty. */
    633 	tty_detach(sc->sc_tty);
    634 	ttyfree(sc->sc_tty);
    635 
    636 #ifdef __GENERIC_SOFT_INTERRUPTS
    637 	/* Unhook the soft interrupt handler. */
    638 	softintr_disestablish(sc->sc_si);
    639 #endif
    640 
    641 #if NRND > 0 && defined(RND_COM)
    642 	/* Unhook the entropy source. */
    643 	rnd_detach_source(&sc->rnd_source);
    644 #endif
    645 
    646 	return (0);
    647 }
    648 
    649 int
    650 com_activate(self, act)
    651 	struct device *self;
    652 	enum devact act;
    653 {
    654 	struct com_softc *sc = (struct com_softc *)self;
    655 	int s, rv = 0;
    656 
    657 	s = splserial();
    658 	switch (act) {
    659 	case DVACT_ACTIVATE:
    660 		rv = EOPNOTSUPP;
    661 		break;
    662 
    663 	case DVACT_DEACTIVATE:
    664 		if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
    665 			rv = EBUSY;
    666 			break;
    667 		}
    668 
    669 		if (sc->disable != NULL && sc->enabled != 0) {
    670 			(*sc->disable)(sc);
    671 			sc->enabled = 0;
    672 		}
    673 		break;
    674 	}
    675 	splx(s);
    676 	return (rv);
    677 }
    678 
    679 void
    680 com_shutdown(sc)
    681 	struct com_softc *sc;
    682 {
    683 	struct tty *tp = sc->sc_tty;
    684 	int s;
    685 
    686 	s = splserial();
    687 
    688 	/* If we were asserting flow control, then deassert it. */
    689 	SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
    690 	com_hwiflow(sc);
    691 
    692 	/* Clear any break condition set with TIOCSBRK. */
    693 	com_break(sc, 0);
    694 
    695 	/* Turn off PPS capture on last close. */
    696 	sc->sc_ppsclearmask = 0;
    697 	sc->sc_ppsassertmask = 0;
    698 	sc->sc_ppsassert = 1;
    699 	sc->sc_ppsclear = 1;
    700 	sc->ppsparam.mode = 0;
    701 
    702 	/*
    703 	 * Hang up if necessary.  Wait a bit, so the other side has time to
    704 	 * notice even if we immediately open the port again.
    705 	 */
    706 	if (ISSET(tp->t_cflag, HUPCL)) {
    707 		com_modem(sc, 0);
    708 		(void) tsleep(sc, TTIPRI, ttclos, hz);
    709 	}
    710 
    711 	/* Turn off interrupts. */
    712 #ifdef DDB
    713 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
    714 		sc->sc_ier = IER_ERXRDY; /* interrupt on break */
    715 	else
    716 #endif
    717 		sc->sc_ier = 0;
    718 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
    719 
    720 	if (sc->disable) {
    721 #ifdef DIAGNOSTIC
    722 		if (!sc->enabled)
    723 			panic("com_shutdown: not enabled?");
    724 #endif
    725 		(*sc->disable)(sc);
    726 		sc->enabled = 0;
    727 	}
    728 
    729 	splx(s);
    730 }
    731 
    732 int
    733 comopen(dev, flag, mode, p)
    734 	dev_t dev;
    735 	int flag, mode;
    736 	struct proc *p;
    737 {
    738 	int unit = COMUNIT(dev);
    739 	struct com_softc *sc;
    740 	struct tty *tp;
    741 	int s, s2;
    742 	int error;
    743 
    744 	if (unit >= com_cd.cd_ndevs)
    745 		return (ENXIO);
    746 	sc = com_cd.cd_devs[unit];
    747 	if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
    748 	    sc->sc_rbuf == NULL)
    749 		return (ENXIO);
    750 
    751 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    752 		return (ENXIO);
    753 
    754 #ifdef KGDB
    755 	/*
    756 	 * If this is the kgdb port, no other use is permitted.
    757 	 */
    758 	if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
    759 		return (EBUSY);
    760 #endif
    761 
    762 	tp = sc->sc_tty;
    763 
    764 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    765 	    ISSET(tp->t_state, TS_XCLUDE) &&
    766 	    p->p_ucred->cr_uid != 0)
    767 		return (EBUSY);
    768 
    769 	s = spltty();
    770 
    771 	/*
    772 	 * Do the following iff this is a first open.
    773 	 */
    774 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    775 		struct termios t;
    776 
    777 		tp->t_dev = dev;
    778 
    779 		s2 = splserial();
    780 
    781 		if (sc->enable) {
    782 			if ((*sc->enable)(sc)) {
    783 				splx(s2);
    784 				splx(s);
    785 				printf("%s: device enable failed\n",
    786 				       sc->sc_dev.dv_xname);
    787 				return (EIO);
    788 			}
    789 			sc->enabled = 1;
    790 			com_config(sc);
    791 		}
    792 
    793 		/* Turn on interrupts. */
    794 		sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
    795 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
    796 
    797 		/* Fetch the current modem control status, needed later. */
    798 		sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr);
    799 
    800 		/* Clear PPS capture state on first open. */
    801 		sc->sc_ppsclearmask = 0;
    802 		sc->sc_ppsassertmask = 0;
    803 		sc->sc_ppsassert = 1;
    804 		sc->sc_ppsclear = 1;
    805 
    806 		splx(s2);
    807 
    808 		/*
    809 		 * Initialize the termios status to the defaults.  Add in the
    810 		 * sticky bits from TIOCSFLAGS.
    811 		 */
    812 		t.c_ispeed = 0;
    813 		if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
    814 			t.c_ospeed = comconsrate;
    815 			t.c_cflag = comconscflag;
    816 		} else {
    817 			t.c_ospeed = TTYDEF_SPEED;
    818 			t.c_cflag = TTYDEF_CFLAG;
    819 		}
    820 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    821 			SET(t.c_cflag, CLOCAL);
    822 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    823 			SET(t.c_cflag, CRTSCTS);
    824 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    825 			SET(t.c_cflag, MDMBUF);
    826 		/* Make sure comparam() will do something. */
    827 		tp->t_ospeed = 0;
    828 		(void) comparam(tp, &t);
    829 		tp->t_iflag = TTYDEF_IFLAG;
    830 		tp->t_oflag = TTYDEF_OFLAG;
    831 		tp->t_lflag = TTYDEF_LFLAG;
    832 		ttychars(tp);
    833 		ttsetwater(tp);
    834 
    835 		s2 = splserial();
    836 
    837 		/*
    838 		 * Turn on DTR.  We must always do this, even if carrier is not
    839 		 * present, because otherwise we'd have to use TIOCSDTR
    840 		 * immediately after setting CLOCAL, which applications do not
    841 		 * expect.  We always assert DTR while the device is open
    842 		 * unless explicitly requested to deassert it.
    843 		 */
    844 		com_modem(sc, 1);
    845 
    846 		/* Clear the input ring, and unblock. */
    847 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    848 		sc->sc_rbavail = com_rbuf_size;
    849 		com_iflush(sc);
    850 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    851 		com_hwiflow(sc);
    852 
    853 #ifdef COM_DEBUG
    854 		if (com_debug)
    855 			comstatus(sc, "comopen  ");
    856 #endif
    857 
    858 		splx(s2);
    859 	}
    860 
    861 	splx(s);
    862 
    863 	error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    864 	if (error)
    865 		goto bad;
    866 
    867 	error = (*linesw[tp->t_line].l_open)(dev, tp);
    868 	if (error)
    869 		goto bad;
    870 
    871 	return (0);
    872 
    873 bad:
    874 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    875 		/*
    876 		 * We failed to open the device, and nobody else had it opened.
    877 		 * Clean up the state as appropriate.
    878 		 */
    879 		com_shutdown(sc);
    880 	}
    881 
    882 	return (error);
    883 }
    884 
    885 int
    886 comclose(dev, flag, mode, p)
    887 	dev_t dev;
    888 	int flag, mode;
    889 	struct proc *p;
    890 {
    891 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
    892 	struct tty *tp = sc->sc_tty;
    893 
    894 	/* XXX This is for cons.c. */
    895 	if (!ISSET(tp->t_state, TS_ISOPEN))
    896 		return (0);
    897 
    898 	(*linesw[tp->t_line].l_close)(tp, flag);
    899 	ttyclose(tp);
    900 
    901 	if (COM_ISALIVE(sc) == 0)
    902 		return (0);
    903 
    904 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    905 		/*
    906 		 * Although we got a last close, the device may still be in
    907 		 * use; e.g. if this was the dialout node, and there are still
    908 		 * processes waiting for carrier on the non-dialout node.
    909 		 */
    910 		com_shutdown(sc);
    911 	}
    912 
    913 	return (0);
    914 }
    915 
    916 int
    917 comread(dev, uio, flag)
    918 	dev_t dev;
    919 	struct uio *uio;
    920 	int flag;
    921 {
    922 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
    923 	struct tty *tp = sc->sc_tty;
    924 
    925 	if (COM_ISALIVE(sc) == 0)
    926 		return (EIO);
    927 
    928 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
    929 }
    930 
    931 int
    932 comwrite(dev, uio, flag)
    933 	dev_t dev;
    934 	struct uio *uio;
    935 	int flag;
    936 {
    937 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
    938 	struct tty *tp = sc->sc_tty;
    939 
    940 	if (COM_ISALIVE(sc) == 0)
    941 		return (EIO);
    942 
    943 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
    944 }
    945 
    946 struct tty *
    947 comtty(dev)
    948 	dev_t dev;
    949 {
    950 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
    951 	struct tty *tp = sc->sc_tty;
    952 
    953 	return (tp);
    954 }
    955 
    956 static u_char
    957 tiocm_xxx2mcr(data)
    958 	int data;
    959 {
    960 	u_char m = 0;
    961 
    962 	if (ISSET(data, TIOCM_DTR))
    963 		SET(m, MCR_DTR);
    964 	if (ISSET(data, TIOCM_RTS))
    965 		SET(m, MCR_RTS);
    966 	return m;
    967 }
    968 
    969 int
    970 comioctl(dev, cmd, data, flag, p)
    971 	dev_t dev;
    972 	u_long cmd;
    973 	caddr_t data;
    974 	int flag;
    975 	struct proc *p;
    976 {
    977 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
    978 	struct tty *tp = sc->sc_tty;
    979 	int error;
    980 	int s;
    981 
    982 	if (COM_ISALIVE(sc) == 0)
    983 		return (EIO);
    984 
    985 	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
    986 	if (error >= 0)
    987 		return (error);
    988 
    989 	error = ttioctl(tp, cmd, data, flag, p);
    990 	if (error >= 0)
    991 		return (error);
    992 
    993 	error = 0;
    994 
    995 	s = splserial();
    996 
    997 	switch (cmd) {
    998 	case TIOCSBRK:
    999 		com_break(sc, 1);
   1000 		break;
   1001 
   1002 	case TIOCCBRK:
   1003 		com_break(sc, 0);
   1004 		break;
   1005 
   1006 	case TIOCSDTR:
   1007 		com_modem(sc, 1);
   1008 		break;
   1009 
   1010 	case TIOCCDTR:
   1011 		com_modem(sc, 0);
   1012 		break;
   1013 
   1014 	case TIOCGFLAGS:
   1015 		*(int *)data = sc->sc_swflags;
   1016 		break;
   1017 
   1018 	case TIOCSFLAGS:
   1019 		error = suser(p->p_ucred, &p->p_acflag);
   1020 		if (error)
   1021 			break;
   1022 		sc->sc_swflags = *(int *)data;
   1023 		break;
   1024 
   1025 	case TIOCMSET:
   1026 		CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
   1027 		/*FALLTHROUGH*/
   1028 
   1029 	case TIOCMBIS:
   1030 		SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
   1031 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
   1032 		break;
   1033 
   1034 	case TIOCMBIC:
   1035 		CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
   1036 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
   1037 		break;
   1038 
   1039 	case TIOCMGET: {
   1040 		u_char m;
   1041 		int bits = 0;
   1042 
   1043 		m = sc->sc_mcr;
   1044 		if (ISSET(m, MCR_DTR))
   1045 			SET(bits, TIOCM_DTR);
   1046 		if (ISSET(m, MCR_RTS))
   1047 			SET(bits, TIOCM_RTS);
   1048 		m = sc->sc_msr;
   1049 		if (ISSET(m, MSR_DCD))
   1050 			SET(bits, TIOCM_CD);
   1051 		if (ISSET(m, MSR_CTS))
   1052 			SET(bits, TIOCM_CTS);
   1053 		if (ISSET(m, MSR_DSR))
   1054 			SET(bits, TIOCM_DSR);
   1055 		if (ISSET(m, MSR_RI | MSR_TERI))
   1056 			SET(bits, TIOCM_RI);
   1057 		if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_ier))
   1058 			SET(bits, TIOCM_LE);
   1059 		*(int *)data = bits;
   1060 		break;
   1061 	}
   1062 
   1063 	case PPS_CREATE:
   1064 		break;
   1065 
   1066 	case PPS_DESTROY:
   1067 		break;
   1068 
   1069 	case PPS_GETPARAMS: {
   1070 		pps_params_t *pp;
   1071 		pp = (pps_params_t *)data;
   1072 		*pp = sc->ppsparam;
   1073 		break;
   1074 	}
   1075 
   1076 	case PPS_SETPARAMS: {
   1077 	  	pps_params_t *pp;
   1078 		int mode;
   1079 		pp = (pps_params_t *)data;
   1080 		if (pp->mode & ~ppscap) {
   1081 			error = EINVAL;
   1082 			break;
   1083 		}
   1084 		sc->ppsparam = *pp;
   1085 	 	/*
   1086 		 * Compute msr masks from user-specified timestamp state.
   1087 		 */
   1088 		mode = sc->ppsparam.mode;
   1089 		if (mode & PPS_HARDPPSONASSERT) {
   1090 			mode |= PPS_CAPTUREASSERT;
   1091 			/* XXX revoke any previous HARDPPS source */
   1092 		}
   1093 		if (mode & PPS_HARDPPSONCLEAR) {
   1094 			mode |= PPS_CAPTURECLEAR;
   1095 			/* XXX revoke any previous HARDPPS source */
   1096 		}
   1097 		switch (mode & PPS_CAPTUREBOTH) {
   1098 		case 0:
   1099 			sc->sc_ppsassertmask = 0;
   1100 			sc->sc_ppsassert = 1;
   1101 			sc->sc_ppsclearmask = 0;
   1102 			sc->sc_ppsclear = 1;
   1103 			break;
   1104 
   1105 		case PPS_CAPTUREASSERT:
   1106 			sc->sc_ppsassertmask = MSR_DCD;
   1107 			sc->sc_ppsassert = MSR_DCD;
   1108 			sc->sc_ppsclearmask = 0;
   1109 			sc->sc_ppsclear = 1;
   1110 			break;
   1111 
   1112 		case PPS_CAPTURECLEAR:
   1113 			sc->sc_ppsassertmask = 0;
   1114 			sc->sc_ppsassert = 1;
   1115 			sc->sc_ppsclearmask = MSR_DCD;
   1116 			sc->sc_ppsclear = 0;
   1117 			break;
   1118 
   1119 		case PPS_CAPTUREBOTH:
   1120 			sc->sc_ppsassertmask = MSR_DCD;
   1121 			sc->sc_ppsclearmask = MSR_DCD;
   1122 			sc->sc_ppsassert = MSR_DCD;
   1123 			sc->sc_ppsclear = 0;
   1124 			break;
   1125 
   1126 		default:
   1127 			error = EINVAL;
   1128 			break;
   1129 		}
   1130 		break;
   1131 	}
   1132 
   1133 	case PPS_GETCAP:
   1134 		*(int*)data = ppscap;
   1135 		break;
   1136 
   1137 	case PPS_FETCH: {
   1138 		pps_info_t *pi;
   1139 		pi = (pps_info_t *)data;
   1140 		*pi = sc->ppsinfo;
   1141 		break;
   1142 	}
   1143 
   1144 	case PPS_WAIT:
   1145 		  /* XXX */
   1146 		error = EOPNOTSUPP;
   1147 		break;
   1148 
   1149 	case TIOCDCDTIMESTAMP:	/* XXX old, overloaded  API used by xntpd v3 */
   1150 		/*
   1151 		 * Some GPS clocks models use the falling rather than
   1152 		 * rising edge as the on-the-second signal.
   1153 		 * The old API has no way to specify PPS polarity.
   1154 		 */
   1155 #ifndef PPS_TRAILING_EDGE
   1156 		sc->sc_ppsassertmask = MSR_DCD;
   1157 		sc->sc_ppsassert = MSR_DCD;
   1158 		sc->sc_ppsclearmask = 0;
   1159 		sc->sc_ppsclear = 1;
   1160 		TIMESPEC_TO_TIMEVAL((struct timeval*)data,
   1161 		    &sc->ppsinfo.assert_timestamp);
   1162 #else
   1163 		sc->sc_ppsassertmask = 0;
   1164 		sc->sc_ppsassert = 1
   1165 		sc->sc_ppsclearmask = MSR_DCD;
   1166 		sc->sc_ppsclear = 0;
   1167 		TIMESPEC_TO_TIMEVAL((struct timeval*)data,
   1168 		    &sc->ppsinfo.clear_timestamp);
   1169 #endif
   1170 		break;
   1171 
   1172 	default:
   1173 		error = ENOTTY;
   1174 		break;
   1175 	}
   1176 
   1177 	splx(s);
   1178 
   1179 #ifdef COM_DEBUG
   1180 	if (com_debug)
   1181 		comstatus(sc, "comioctl ");
   1182 #endif
   1183 
   1184 	return (error);
   1185 }
   1186 
   1187 integrate void
   1188 com_schedrx(sc)
   1189 	struct com_softc *sc;
   1190 {
   1191 
   1192 	sc->sc_rx_ready = 1;
   1193 
   1194 	/* Wake up the poller. */
   1195 #ifdef __GENERIC_SOFT_INTERRUPTS
   1196 	softintr_schedule(sc->sc_si);
   1197 #else
   1198 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1199 	setsoftserial();
   1200 #else
   1201 	if (!com_softintr_scheduled) {
   1202 		com_softintr_scheduled = 1;
   1203 		timeout(comsoft, NULL, 1);
   1204 	}
   1205 #endif
   1206 #endif
   1207 }
   1208 
   1209 void
   1210 com_break(sc, onoff)
   1211 	struct com_softc *sc;
   1212 	int onoff;
   1213 {
   1214 
   1215 	if (onoff)
   1216 		SET(sc->sc_lcr, LCR_SBREAK);
   1217 	else
   1218 		CLR(sc->sc_lcr, LCR_SBREAK);
   1219 
   1220 	if (!sc->sc_heldchange) {
   1221 		if (sc->sc_tx_busy) {
   1222 			sc->sc_heldtbc = sc->sc_tbc;
   1223 			sc->sc_tbc = 0;
   1224 			sc->sc_heldchange = 1;
   1225 		} else
   1226 			com_loadchannelregs(sc);
   1227 	}
   1228 }
   1229 
   1230 void
   1231 com_modem(sc, onoff)
   1232 	struct com_softc *sc;
   1233 	int onoff;
   1234 {
   1235 
   1236 	if (onoff)
   1237 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
   1238 	else
   1239 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
   1240 
   1241 	if (!sc->sc_heldchange) {
   1242 		if (sc->sc_tx_busy) {
   1243 			sc->sc_heldtbc = sc->sc_tbc;
   1244 			sc->sc_tbc = 0;
   1245 			sc->sc_heldchange = 1;
   1246 		} else
   1247 			com_loadchannelregs(sc);
   1248 	}
   1249 }
   1250 
   1251 static u_char
   1252 cflag2lcr(cflag)
   1253 	tcflag_t cflag;
   1254 {
   1255 	u_char lcr = 0;
   1256 
   1257 	switch (ISSET(cflag, CSIZE)) {
   1258 	case CS5:
   1259 		SET(lcr, LCR_5BITS);
   1260 		break;
   1261 	case CS6:
   1262 		SET(lcr, LCR_6BITS);
   1263 		break;
   1264 	case CS7:
   1265 		SET(lcr, LCR_7BITS);
   1266 		break;
   1267 	case CS8:
   1268 		SET(lcr, LCR_8BITS);
   1269 		break;
   1270 	}
   1271 	if (ISSET(cflag, PARENB)) {
   1272 		SET(lcr, LCR_PENAB);
   1273 		if (!ISSET(cflag, PARODD))
   1274 			SET(lcr, LCR_PEVEN);
   1275 	}
   1276 	if (ISSET(cflag, CSTOPB))
   1277 		SET(lcr, LCR_STOPB);
   1278 
   1279 	return (lcr);
   1280 }
   1281 
   1282 int
   1283 comparam(tp, t)
   1284 	struct tty *tp;
   1285 	struct termios *t;
   1286 {
   1287 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
   1288 	int ospeed = comspeed(t->c_ospeed, sc->sc_frequency);
   1289 	u_char lcr;
   1290 	int s;
   1291 
   1292 	if (COM_ISALIVE(sc) == 0)
   1293 		return (EIO);
   1294 
   1295 	/* Check requested parameters. */
   1296 	if (ospeed < 0)
   1297 		return (EINVAL);
   1298 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
   1299 		return (EINVAL);
   1300 
   1301 	/*
   1302 	 * For the console, always force CLOCAL and !HUPCL, so that the port
   1303 	 * is always active.
   1304 	 */
   1305 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
   1306 	    ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
   1307 		SET(t->c_cflag, CLOCAL);
   1308 		CLR(t->c_cflag, HUPCL);
   1309 	}
   1310 
   1311 	/*
   1312 	 * If there were no changes, don't do anything.  This avoids dropping
   1313 	 * input and improves performance when all we did was frob things like
   1314 	 * VMIN and VTIME.
   1315 	 */
   1316 	if (tp->t_ospeed == t->c_ospeed &&
   1317 	    tp->t_cflag == t->c_cflag)
   1318 		return (0);
   1319 
   1320 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
   1321 
   1322 	s = splserial();
   1323 
   1324 	sc->sc_lcr = lcr;
   1325 
   1326 	/*
   1327 	 * If we're not in a mode that assumes a connection is present, then
   1328 	 * ignore carrier changes.
   1329 	 */
   1330 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
   1331 		sc->sc_msr_dcd = 0;
   1332 	else
   1333 		sc->sc_msr_dcd = MSR_DCD;
   1334 	/*
   1335 	 * Set the flow control pins depending on the current flow control
   1336 	 * mode.
   1337 	 */
   1338 	if (ISSET(t->c_cflag, CRTSCTS)) {
   1339 		sc->sc_mcr_dtr = MCR_DTR;
   1340 		sc->sc_mcr_rts = MCR_RTS;
   1341 		sc->sc_msr_cts = MSR_CTS;
   1342 		sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
   1343 	} else if (ISSET(t->c_cflag, MDMBUF)) {
   1344 		/*
   1345 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
   1346 		 * carrier detection.
   1347 		 */
   1348 		sc->sc_mcr_dtr = 0;
   1349 		sc->sc_mcr_rts = MCR_DTR;
   1350 		sc->sc_msr_cts = MSR_DCD;
   1351 		sc->sc_efr = 0;
   1352 	} else {
   1353 		/*
   1354 		 * If no flow control, then always set RTS.  This will make
   1355 		 * the other side happy if it mistakenly thinks we're doing
   1356 		 * RTS/CTS flow control.
   1357 		 */
   1358 		sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
   1359 		sc->sc_mcr_rts = 0;
   1360 		sc->sc_msr_cts = 0;
   1361 		sc->sc_efr = 0;
   1362 		if (ISSET(sc->sc_mcr, MCR_DTR))
   1363 			SET(sc->sc_mcr, MCR_RTS);
   1364 		else
   1365 			CLR(sc->sc_mcr, MCR_RTS);
   1366 	}
   1367 	sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
   1368 
   1369 #if 0
   1370 	if (ospeed == 0)
   1371 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
   1372 	else
   1373 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
   1374 #endif
   1375 
   1376 	sc->sc_dlbl = ospeed;
   1377 	sc->sc_dlbh = ospeed >> 8;
   1378 
   1379 	/*
   1380 	 * Set the FIFO threshold based on the receive speed.
   1381 	 *
   1382 	 *  * If it's a low speed, it's probably a mouse or some other
   1383 	 *    interactive device, so set the threshold low.
   1384 	 *  * If it's a high speed, trim the trigger level down to prevent
   1385 	 *    overflows.
   1386 	 *  * Otherwise set it a bit higher.
   1387 	 */
   1388 	if (ISSET(sc->sc_hwflags, COM_HW_HAYESP))
   1389 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
   1390 	else if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
   1391 		sc->sc_fifo = FIFO_ENABLE |
   1392 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
   1393 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
   1394 	else
   1395 		sc->sc_fifo = 0;
   1396 
   1397 	/* And copy to tty. */
   1398 	tp->t_ispeed = 0;
   1399 	tp->t_ospeed = t->c_ospeed;
   1400 	tp->t_cflag = t->c_cflag;
   1401 
   1402 	if (!sc->sc_heldchange) {
   1403 		if (sc->sc_tx_busy) {
   1404 			sc->sc_heldtbc = sc->sc_tbc;
   1405 			sc->sc_tbc = 0;
   1406 			sc->sc_heldchange = 1;
   1407 		} else
   1408 			com_loadchannelregs(sc);
   1409 	}
   1410 
   1411 	if (!ISSET(t->c_cflag, CHWFLOW)) {
   1412 		/* Disable the high water mark. */
   1413 		sc->sc_r_hiwat = 0;
   1414 		sc->sc_r_lowat = 0;
   1415 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
   1416 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1417 			com_schedrx(sc);
   1418 		}
   1419 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
   1420 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
   1421 			com_hwiflow(sc);
   1422 		}
   1423 	} else {
   1424 		sc->sc_r_hiwat = com_rbuf_hiwat;
   1425 		sc->sc_r_lowat = com_rbuf_lowat;
   1426 	}
   1427 
   1428 	splx(s);
   1429 
   1430 	/*
   1431 	 * Update the tty layer's idea of the carrier bit, in case we changed
   1432 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
   1433 	 * explicit request.
   1434 	 */
   1435 	(void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
   1436 
   1437 #ifdef COM_DEBUG
   1438 	if (com_debug)
   1439 		comstatus(sc, "comparam ");
   1440 #endif
   1441 
   1442 	if (!ISSET(t->c_cflag, CHWFLOW)) {
   1443 		if (sc->sc_tx_stopped) {
   1444 			sc->sc_tx_stopped = 0;
   1445 			comstart(tp);
   1446 		}
   1447 	}
   1448 
   1449 	return (0);
   1450 }
   1451 
   1452 void
   1453 com_iflush(sc)
   1454 	struct com_softc *sc;
   1455 {
   1456 	bus_space_tag_t iot = sc->sc_iot;
   1457 	bus_space_handle_t ioh = sc->sc_ioh;
   1458 #ifdef DIAGNOSTIC
   1459 	int reg;
   1460 #endif
   1461 	int timo;
   1462 
   1463 #ifdef DIAGNOSTIC
   1464 	reg = 0xffff;
   1465 #endif
   1466 	timo = 50000;
   1467 	/* flush any pending I/O */
   1468 	while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)
   1469 	    && --timo)
   1470 #ifdef DIAGNOSTIC
   1471 		reg =
   1472 #else
   1473 		    (void)
   1474 #endif
   1475 		    bus_space_read_1(iot, ioh, com_data);
   1476 #ifdef DIAGNOSTIC
   1477 	if (!timo)
   1478 		printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname,
   1479 		       reg);
   1480 #endif
   1481 }
   1482 
   1483 void
   1484 com_loadchannelregs(sc)
   1485 	struct com_softc *sc;
   1486 {
   1487 	bus_space_tag_t iot = sc->sc_iot;
   1488 	bus_space_handle_t ioh = sc->sc_ioh;
   1489 
   1490 	/* XXXXX necessary? */
   1491 	com_iflush(sc);
   1492 
   1493 	bus_space_write_1(iot, ioh, com_ier, 0);
   1494 
   1495 	if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) {
   1496 		bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
   1497 		bus_space_write_1(iot, ioh, com_efr, sc->sc_efr);
   1498 	}
   1499 	bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB);
   1500 	bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl);
   1501 	bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh);
   1502 	bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
   1503 	bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr);
   1504 	bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo);
   1505 
   1506 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
   1507 }
   1508 
   1509 int
   1510 comhwiflow(tp, block)
   1511 	struct tty *tp;
   1512 	int block;
   1513 {
   1514 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
   1515 	int s;
   1516 
   1517 	if (COM_ISALIVE(sc) == 0)
   1518 		return (0);
   1519 
   1520 	if (sc->sc_mcr_rts == 0)
   1521 		return (0);
   1522 
   1523 	s = splserial();
   1524 	if (block) {
   1525 		if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
   1526 			SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
   1527 			com_hwiflow(sc);
   1528 		}
   1529 	} else {
   1530 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
   1531 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1532 			com_schedrx(sc);
   1533 		}
   1534 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
   1535 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
   1536 			com_hwiflow(sc);
   1537 		}
   1538 	}
   1539 	splx(s);
   1540 	return (1);
   1541 }
   1542 
   1543 /*
   1544  * (un)block input via hw flowcontrol
   1545  */
   1546 void
   1547 com_hwiflow(sc)
   1548 	struct com_softc *sc;
   1549 {
   1550 	bus_space_tag_t iot = sc->sc_iot;
   1551 	bus_space_handle_t ioh = sc->sc_ioh;
   1552 
   1553 	if (sc->sc_mcr_rts == 0)
   1554 		return;
   1555 
   1556 	if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
   1557 		CLR(sc->sc_mcr, sc->sc_mcr_rts);
   1558 		CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
   1559 	} else {
   1560 		SET(sc->sc_mcr, sc->sc_mcr_rts);
   1561 		SET(sc->sc_mcr_active, sc->sc_mcr_rts);
   1562 	}
   1563 	bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active);
   1564 }
   1565 
   1566 
   1567 void
   1568 comstart(tp)
   1569 	struct tty *tp;
   1570 {
   1571 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
   1572 	bus_space_tag_t iot = sc->sc_iot;
   1573 	bus_space_handle_t ioh = sc->sc_ioh;
   1574 	int s;
   1575 
   1576 	if (COM_ISALIVE(sc) == 0)
   1577 		return;
   1578 
   1579 	s = spltty();
   1580 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
   1581 		goto out;
   1582 	if (sc->sc_tx_stopped)
   1583 		goto out;
   1584 
   1585 	if (tp->t_outq.c_cc <= tp->t_lowat) {
   1586 		if (ISSET(tp->t_state, TS_ASLEEP)) {
   1587 			CLR(tp->t_state, TS_ASLEEP);
   1588 			wakeup(&tp->t_outq);
   1589 		}
   1590 		selwakeup(&tp->t_wsel);
   1591 		if (tp->t_outq.c_cc == 0)
   1592 			goto out;
   1593 	}
   1594 
   1595 	/* Grab the first contiguous region of buffer space. */
   1596 	{
   1597 		u_char *tba;
   1598 		int tbc;
   1599 
   1600 		tba = tp->t_outq.c_cf;
   1601 		tbc = ndqb(&tp->t_outq, 0);
   1602 
   1603 		(void)splserial();
   1604 
   1605 		sc->sc_tba = tba;
   1606 		sc->sc_tbc = tbc;
   1607 	}
   1608 
   1609 	SET(tp->t_state, TS_BUSY);
   1610 	sc->sc_tx_busy = 1;
   1611 
   1612 	/* Enable transmit completion interrupts if necessary. */
   1613 	if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
   1614 		SET(sc->sc_ier, IER_ETXRDY);
   1615 		bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
   1616 	}
   1617 
   1618 	/* Output the first chunk of the contiguous buffer. */
   1619 	{
   1620 		int n;
   1621 
   1622 		n = sc->sc_tbc;
   1623 		if (n > sc->sc_fifolen)
   1624 			n = sc->sc_fifolen;
   1625 		bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
   1626 		sc->sc_tbc -= n;
   1627 		sc->sc_tba += n;
   1628 	}
   1629 out:
   1630 	splx(s);
   1631 	return;
   1632 }
   1633 
   1634 /*
   1635  * Stop output on a line.
   1636  */
   1637 void
   1638 comstop(tp, flag)
   1639 	struct tty *tp;
   1640 	int flag;
   1641 {
   1642 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
   1643 	int s;
   1644 
   1645 	s = splserial();
   1646 	if (ISSET(tp->t_state, TS_BUSY)) {
   1647 		/* Stop transmitting at the next chunk. */
   1648 		sc->sc_tbc = 0;
   1649 		sc->sc_heldtbc = 0;
   1650 		if (!ISSET(tp->t_state, TS_TTSTOP))
   1651 			SET(tp->t_state, TS_FLUSH);
   1652 	}
   1653 	splx(s);
   1654 }
   1655 
   1656 void
   1657 comdiag(arg)
   1658 	void *arg;
   1659 {
   1660 	struct com_softc *sc = arg;
   1661 	int overflows, floods;
   1662 	int s;
   1663 
   1664 	s = splserial();
   1665 	overflows = sc->sc_overflows;
   1666 	sc->sc_overflows = 0;
   1667 	floods = sc->sc_floods;
   1668 	sc->sc_floods = 0;
   1669 	sc->sc_errors = 0;
   1670 	splx(s);
   1671 
   1672 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
   1673 	    sc->sc_dev.dv_xname,
   1674 	    overflows, overflows == 1 ? "" : "s",
   1675 	    floods, floods == 1 ? "" : "s");
   1676 }
   1677 
   1678 integrate void
   1679 com_rxsoft(sc, tp)
   1680 	struct com_softc *sc;
   1681 	struct tty *tp;
   1682 {
   1683 	int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint;
   1684 	u_char *get, *end;
   1685 	u_int cc, scc;
   1686 	u_char lsr;
   1687 	int code;
   1688 	int s;
   1689 
   1690 	end = sc->sc_ebuf;
   1691 	get = sc->sc_rbget;
   1692 	scc = cc = com_rbuf_size - sc->sc_rbavail;
   1693 
   1694 	if (cc == com_rbuf_size) {
   1695 		sc->sc_floods++;
   1696 		if (sc->sc_errors++ == 0)
   1697 			timeout(comdiag, sc, 60 * hz);
   1698 	}
   1699 
   1700 	while (cc) {
   1701 		code = get[0];
   1702 		lsr = get[1];
   1703 		if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) {
   1704 			if (ISSET(lsr, LSR_OE)) {
   1705 				sc->sc_overflows++;
   1706 				if (sc->sc_errors++ == 0)
   1707 					timeout(comdiag, sc, 60 * hz);
   1708 			}
   1709 			if (ISSET(lsr, LSR_BI | LSR_FE))
   1710 				SET(code, TTY_FE);
   1711 			if (ISSET(lsr, LSR_PE))
   1712 				SET(code, TTY_PE);
   1713 		}
   1714 		if ((*rint)(code, tp) == -1) {
   1715 			/*
   1716 			 * The line discipline's buffer is out of space.
   1717 			 */
   1718 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
   1719 				/*
   1720 				 * We're either not using flow control, or the
   1721 				 * line discipline didn't tell us to block for
   1722 				 * some reason.  Either way, we have no way to
   1723 				 * know when there's more space available, so
   1724 				 * just drop the rest of the data.
   1725 				 */
   1726 				get += cc << 1;
   1727 				if (get >= end)
   1728 					get -= com_rbuf_size << 1;
   1729 				cc = 0;
   1730 			} else {
   1731 				/*
   1732 				 * Don't schedule any more receive processing
   1733 				 * until the line discipline tells us there's
   1734 				 * space available (through comhwiflow()).
   1735 				 * Leave the rest of the data in the input
   1736 				 * buffer.
   1737 				 */
   1738 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1739 			}
   1740 			break;
   1741 		}
   1742 		get += 2;
   1743 		if (get >= end)
   1744 			get = sc->sc_rbuf;
   1745 		cc--;
   1746 	}
   1747 
   1748 	if (cc != scc) {
   1749 		sc->sc_rbget = get;
   1750 		s = splserial();
   1751 		cc = sc->sc_rbavail += scc - cc;
   1752 		/* Buffers should be ok again, release possible block. */
   1753 		if (cc >= sc->sc_r_lowat) {
   1754 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1755 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1756 				SET(sc->sc_ier, IER_ERXRDY);
   1757 				bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
   1758 			}
   1759 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1760 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1761 				com_hwiflow(sc);
   1762 			}
   1763 		}
   1764 		splx(s);
   1765 	}
   1766 }
   1767 
   1768 integrate void
   1769 com_txsoft(sc, tp)
   1770 	struct com_softc *sc;
   1771 	struct tty *tp;
   1772 {
   1773 
   1774 	CLR(tp->t_state, TS_BUSY);
   1775 	if (ISSET(tp->t_state, TS_FLUSH))
   1776 		CLR(tp->t_state, TS_FLUSH);
   1777 	else
   1778 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1779 	(*linesw[tp->t_line].l_start)(tp);
   1780 }
   1781 
   1782 integrate void
   1783 com_stsoft(sc, tp)
   1784 	struct com_softc *sc;
   1785 	struct tty *tp;
   1786 {
   1787 	u_char msr, delta;
   1788 	int s;
   1789 
   1790 	s = splserial();
   1791 	msr = sc->sc_msr;
   1792 	delta = sc->sc_msr_delta;
   1793 	sc->sc_msr_delta = 0;
   1794 	splx(s);
   1795 
   1796 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1797 		/*
   1798 		 * Inform the tty layer that carrier detect changed.
   1799 		 */
   1800 		(void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD));
   1801 	}
   1802 
   1803 	if (ISSET(delta, sc->sc_msr_cts)) {
   1804 		/* Block or unblock output according to flow control. */
   1805 		if (ISSET(msr, sc->sc_msr_cts)) {
   1806 			sc->sc_tx_stopped = 0;
   1807 			(*linesw[tp->t_line].l_start)(tp);
   1808 		} else {
   1809 			sc->sc_tx_stopped = 1;
   1810 		}
   1811 	}
   1812 
   1813 #ifdef COM_DEBUG
   1814 	if (com_debug)
   1815 		comstatus(sc, "com_stsoft");
   1816 #endif
   1817 }
   1818 
   1819 #ifdef __GENERIC_SOFT_INTERRUPTS
   1820 void
   1821 comsoft(arg)
   1822 	void *arg;
   1823 {
   1824 	struct com_softc *sc = arg;
   1825 	struct tty *tp;
   1826 
   1827 	if (COM_ISALIVE(sc) == 0)
   1828 		return;
   1829 
   1830 	{
   1831 #else
   1832 void
   1833 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1834 comsoft()
   1835 #else
   1836 comsoft(arg)
   1837 	void *arg;
   1838 #endif
   1839 {
   1840 	struct com_softc	*sc;
   1841 	struct tty	*tp;
   1842 	int	unit;
   1843 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1844 	int s;
   1845 
   1846 	s = splsoftserial();
   1847 	com_softintr_scheduled = 0;
   1848 #endif
   1849 
   1850 	for (unit = 0; unit < com_cd.cd_ndevs; unit++) {
   1851 		sc = com_cd.cd_devs[unit];
   1852 		if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK))
   1853 			continue;
   1854 
   1855 		if (COM_ISALIVE(sc) == 0)
   1856 			continue;
   1857 
   1858 		tp = sc->sc_tty;
   1859 		if (tp == NULL)
   1860 			continue;
   1861 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1862 			continue;
   1863 #endif
   1864 		tp = sc->sc_tty;
   1865 
   1866 		if (sc->sc_rx_ready) {
   1867 			sc->sc_rx_ready = 0;
   1868 			com_rxsoft(sc, tp);
   1869 		}
   1870 
   1871 		if (sc->sc_st_check) {
   1872 			sc->sc_st_check = 0;
   1873 			com_stsoft(sc, tp);
   1874 		}
   1875 
   1876 		if (sc->sc_tx_done) {
   1877 			sc->sc_tx_done = 0;
   1878 			com_txsoft(sc, tp);
   1879 		}
   1880 	}
   1881 
   1882 #ifndef __GENERIC_SOFT_INTERRUPTS
   1883 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1884 	splx(s);
   1885 #endif
   1886 #endif
   1887 }
   1888 
   1889 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS
   1890 	/* there has got to be a better way to do comsoft() */
   1891 }}
   1892 #endif
   1893 
   1894 int
   1895 comintr(arg)
   1896 	void *arg;
   1897 {
   1898 	struct com_softc *sc = arg;
   1899 	bus_space_tag_t iot = sc->sc_iot;
   1900 	bus_space_handle_t ioh = sc->sc_ioh;
   1901 	u_char *put, *end;
   1902 	u_int cc;
   1903 	u_char lsr, iir;
   1904 
   1905 	if (COM_ISALIVE(sc) == 0)
   1906 		return (0);
   1907 
   1908 	iir = bus_space_read_1(iot, ioh, com_iir);
   1909 	if (ISSET(iir, IIR_NOPEND))
   1910 		return (0);
   1911 
   1912 	end = sc->sc_ebuf;
   1913 	put = sc->sc_rbput;
   1914 	cc = sc->sc_rbavail;
   1915 
   1916 	do {
   1917 		u_char	msr, delta;
   1918 
   1919 		lsr = bus_space_read_1(iot, ioh, com_lsr);
   1920 #if defined(DDB) || defined(KGDB)
   1921 		if (ISSET(lsr, LSR_BI)) {
   1922 #ifdef DDB
   1923 			if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
   1924 				Debugger();
   1925 				continue;
   1926 			}
   1927 #endif
   1928 #ifdef KGDB
   1929 			if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
   1930 				kgdb_connect(1);
   1931 				continue;
   1932 			}
   1933 #endif
   1934 		}
   1935 #endif /* DDB || KGDB */
   1936 
   1937 		if (ISSET(lsr, LSR_RCV_MASK) &&
   1938 		    !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1939 			while (cc > 0) {
   1940 				put[0] = bus_space_read_1(iot, ioh, com_data);
   1941 				put[1] = lsr;
   1942 				put += 2;
   1943 				if (put >= end)
   1944 					put = sc->sc_rbuf;
   1945 				cc--;
   1946 
   1947 				lsr = bus_space_read_1(iot, ioh, com_lsr);
   1948 				if (!ISSET(lsr, LSR_RCV_MASK))
   1949 					break;
   1950 			}
   1951 
   1952 			/*
   1953 			 * Current string of incoming characters ended because
   1954 			 * no more data was available or we ran out of space.
   1955 			 * Schedule a receive event if any data was received.
   1956 			 * If we're out of space, turn off receive interrupts.
   1957 			 */
   1958 			sc->sc_rbput = put;
   1959 			sc->sc_rbavail = cc;
   1960 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1961 				sc->sc_rx_ready = 1;
   1962 
   1963 			/*
   1964 			 * See if we are in danger of overflowing a buffer. If
   1965 			 * so, use hardware flow control to ease the pressure.
   1966 			 */
   1967 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1968 			    cc < sc->sc_r_hiwat) {
   1969 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1970 				com_hwiflow(sc);
   1971 			}
   1972 
   1973 			/*
   1974 			 * If we're out of space, disable receive interrupts
   1975 			 * until the queue has drained a bit.
   1976 			 */
   1977 			if (!cc) {
   1978 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1979 				CLR(sc->sc_ier, IER_ERXRDY);
   1980 				bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
   1981 			}
   1982 		} else {
   1983 			if ((iir & IIR_IMASK) == IIR_RXRDY) {
   1984 				bus_space_write_1(iot, ioh, com_ier, 0);
   1985 				delay(10);
   1986 				bus_space_write_1(iot, ioh, com_ier,sc->sc_ier);
   1987 				iir = IIR_NOPEND;
   1988 				continue;
   1989 			}
   1990 		}
   1991 
   1992 		msr = bus_space_read_1(iot, ioh, com_msr);
   1993 		delta = msr ^ sc->sc_msr;
   1994 		sc->sc_msr = msr;
   1995 		if (ISSET(delta, sc->sc_msr_mask)) {
   1996 			SET(sc->sc_msr_delta, delta);
   1997 
   1998 			/*
   1999 			 * Pulse-per-second clock  signal on edge of DCD?
   2000 			 */
   2001 			if (ISSET(delta, (sc->sc_ppsassertmask |
   2002 					  sc->sc_ppsclearmask))) {
   2003 				struct timeval tv;
   2004 			    	if ((msr & sc->sc_ppsassertmask) ==
   2005 				    sc->sc_ppsassert) {
   2006 
   2007 					/* XXX nanotime() */
   2008 					microtime(&tv);
   2009 					TIMEVAL_TO_TIMESPEC(&tv,
   2010 					    &sc->ppsinfo.assert_timestamp);
   2011 					if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   2012 						timespecadd(&sc->ppsinfo.assert_timestamp,
   2013 						    &sc->ppsparam.assert_offset,
   2014 						    &sc->ppsinfo.assert_timestamp);
   2015 						TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   2016 	}
   2017 
   2018 #ifdef PPS_SYNC
   2019 					if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   2020 						hardpps(&tv, tv.tv_usec);
   2021 #endif
   2022 					sc->ppsinfo.assert_sequence++;
   2023 					sc->ppsinfo.current_mode =
   2024 					    sc->ppsparam.mode;
   2025 
   2026 				} else if ((msr & sc->sc_ppsclearmask) ==
   2027 				    sc->sc_ppsclear) {
   2028 					/* XXX nanotime() */
   2029 
   2030 					microtime(&tv);
   2031 					TIMEVAL_TO_TIMESPEC(&tv,
   2032 					    &sc->ppsinfo.clear_timestamp);
   2033 					if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   2034 						timespecadd(&sc->ppsinfo.clear_timestamp,
   2035 						    &sc->ppsparam.clear_offset,
   2036 						    &sc->ppsinfo.clear_timestamp);
   2037 						TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   2038 	}
   2039 
   2040 #ifdef PPS_SYNC
   2041 					if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   2042 						hardpps(&tv, tv.tv_usec);
   2043 #endif
   2044 					sc->ppsinfo.clear_sequence++;
   2045 					sc->ppsinfo.current_mode =
   2046 					    sc->ppsparam.mode;
   2047 				}
   2048 			}
   2049 
   2050 			/*
   2051 			 * Stop output immediately if we lose the output
   2052 			 * flow control signal or carrier detect.
   2053 			 */
   2054 			if (ISSET(~msr, sc->sc_msr_mask)) {
   2055 				sc->sc_tbc = 0;
   2056 				sc->sc_heldtbc = 0;
   2057 #ifdef COM_DEBUG
   2058 				if (com_debug)
   2059 					comstatus(sc, "comintr  ");
   2060 #endif
   2061 			}
   2062 
   2063 			sc->sc_st_check = 1;
   2064 		}
   2065 	} while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND));
   2066 
   2067 	/*
   2068 	 * Done handling any receive interrupts. See if data can be
   2069 	 * transmitted as well. Schedule tx done event if no data left
   2070 	 * and tty was marked busy.
   2071 	 */
   2072 	if (ISSET(lsr, LSR_TXRDY)) {
   2073 		/*
   2074 		 * If we've delayed a parameter change, do it now, and restart
   2075 		 * output.
   2076 		 */
   2077 		if (sc->sc_heldchange) {
   2078 			com_loadchannelregs(sc);
   2079 			sc->sc_heldchange = 0;
   2080 			sc->sc_tbc = sc->sc_heldtbc;
   2081 			sc->sc_heldtbc = 0;
   2082 		}
   2083 
   2084 		/* Output the next chunk of the contiguous buffer, if any. */
   2085 		if (sc->sc_tbc > 0) {
   2086 			int n;
   2087 
   2088 			n = sc->sc_tbc;
   2089 			if (n > sc->sc_fifolen)
   2090 				n = sc->sc_fifolen;
   2091 			bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
   2092 			sc->sc_tbc -= n;
   2093 			sc->sc_tba += n;
   2094 		} else {
   2095 			/* Disable transmit completion interrupts if necessary. */
   2096 			if (ISSET(sc->sc_ier, IER_ETXRDY)) {
   2097 				CLR(sc->sc_ier, IER_ETXRDY);
   2098 				bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
   2099 			}
   2100 			if (sc->sc_tx_busy) {
   2101 				sc->sc_tx_busy = 0;
   2102 				sc->sc_tx_done = 1;
   2103 			}
   2104 		}
   2105 	}
   2106 
   2107 	/* Wake up the poller. */
   2108 #ifdef __GENERIC_SOFT_INTERRUPTS
   2109 	softintr_schedule(sc->sc_si);
   2110 #else
   2111 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   2112 	setsoftserial();
   2113 #else
   2114 	if (!com_softintr_scheduled) {
   2115 		com_softintr_scheduled = 1;
   2116 		timeout(comsoft, NULL, 1);
   2117 	}
   2118 #endif
   2119 #endif
   2120 
   2121 #if NRND > 0 && defined(RND_COM)
   2122 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   2123 #endif
   2124 
   2125 	return (1);
   2126 }
   2127 
   2128 /*
   2129  * The following functions are polled getc and putc routines, shared
   2130  * by the console and kgdb glue.
   2131  */
   2132 
   2133 int
   2134 com_common_getc(iot, ioh)
   2135 	bus_space_tag_t iot;
   2136 	bus_space_handle_t ioh;
   2137 {
   2138 	int s = splserial();
   2139 	u_char stat, c;
   2140 
   2141 	/* block until a character becomes available */
   2142 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
   2143 		;
   2144 
   2145 	c = bus_space_read_1(iot, ioh, com_data);
   2146 	stat = bus_space_read_1(iot, ioh, com_iir);
   2147 	splx(s);
   2148 	return (c);
   2149 }
   2150 
   2151 void
   2152 com_common_putc(iot, ioh, c)
   2153 	bus_space_tag_t iot;
   2154 	bus_space_handle_t ioh;
   2155 	int c;
   2156 {
   2157 	int s = splserial();
   2158 	u_char stat;
   2159 	int timo;
   2160 
   2161 	/* wait for any pending transmission to finish */
   2162 	timo = 50000;
   2163 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY)
   2164 	    && --timo)
   2165 		;
   2166 
   2167 	bus_space_write_1(iot, ioh, com_data, c);
   2168 	/* wait for this transmission to complete */
   2169 	timo = 1500000;
   2170 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY)
   2171 	    && --timo)
   2172 		;
   2173 
   2174 	/* clear any interrupts generated by this transmission */
   2175 	stat = bus_space_read_1(iot, ioh, com_iir);
   2176 	splx(s);
   2177 }
   2178 
   2179 /*
   2180  * Initialize UART to known state.
   2181  */
   2182 int
   2183 cominit(iot, iobase, rate, frequency, cflag, iohp)
   2184 	bus_space_tag_t iot;
   2185 	int iobase;
   2186 	int rate, frequency;
   2187 	tcflag_t cflag;
   2188 	bus_space_handle_t *iohp;
   2189 {
   2190 	bus_space_handle_t ioh;
   2191 
   2192 	if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
   2193 		return (ENOMEM); /* ??? */
   2194 
   2195 	bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
   2196 	bus_space_write_1(iot, ioh, com_efr, 0);
   2197 	bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
   2198 	rate = comspeed(rate, frequency);
   2199 	bus_space_write_1(iot, ioh, com_dlbl, rate);
   2200 	bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
   2201 	bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag));
   2202 	bus_space_write_1(iot, ioh, com_mcr, 0);
   2203 	bus_space_write_1(iot, ioh, com_fifo,
   2204 	    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
   2205 	bus_space_write_1(iot, ioh, com_ier, 0);
   2206 
   2207 	*iohp = ioh;
   2208 	return (0);
   2209 }
   2210 
   2211 /*
   2212  * Following are all routines needed for COM to act as console
   2213  */
   2214 
   2215 int
   2216 comcnattach(iot, iobase, rate, frequency, cflag)
   2217 	bus_space_tag_t iot;
   2218 	int iobase;
   2219 	int rate, frequency;
   2220 	tcflag_t cflag;
   2221 {
   2222 	int res;
   2223 	static struct consdev comcons = {
   2224 		NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL
   2225 	};
   2226 
   2227 	res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh);
   2228 	if (res)
   2229 		return (res);
   2230 
   2231 	cn_tab = &comcons;
   2232 
   2233 	comconstag = iot;
   2234 	comconsaddr = iobase;
   2235 	comconsrate = rate;
   2236 	comconscflag = cflag;
   2237 
   2238 	return (0);
   2239 }
   2240 
   2241 int
   2242 comcngetc(dev)
   2243 	dev_t dev;
   2244 {
   2245 
   2246 	return (com_common_getc(comconstag, comconsioh));
   2247 }
   2248 
   2249 /*
   2250  * Console kernel output character routine.
   2251  */
   2252 void
   2253 comcnputc(dev, c)
   2254 	dev_t dev;
   2255 	int c;
   2256 {
   2257 
   2258 	com_common_putc(comconstag, comconsioh, c);
   2259 }
   2260 
   2261 void
   2262 comcnpollc(dev, on)
   2263 	dev_t dev;
   2264 	int on;
   2265 {
   2266 
   2267 }
   2268 
   2269 #ifdef KGDB
   2270 int
   2271 com_kgdb_attach(iot, iobase, rate, frequency, cflag)
   2272 	bus_space_tag_t iot;
   2273 	int iobase;
   2274 	int rate, frequency;
   2275 	tcflag_t cflag;
   2276 {
   2277 	int res;
   2278 
   2279 	if (iot == comconstag && iobase == comconsaddr)
   2280 		return (EBUSY); /* cannot share with console */
   2281 
   2282 	res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh);
   2283 	if (res)
   2284 		return (res);
   2285 
   2286 	kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL);
   2287 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
   2288 
   2289 	com_kgdb_iot = iot;
   2290 	com_kgdb_addr = iobase;
   2291 
   2292 	return (0);
   2293 }
   2294 
   2295 /* ARGSUSED */
   2296 int
   2297 com_kgdb_getc(arg)
   2298 	void *arg;
   2299 {
   2300 
   2301 	return (com_common_getc(com_kgdb_iot, com_kgdb_ioh));
   2302 }
   2303 
   2304 /* ARGSUSED */
   2305 void
   2306 com_kgdb_putc(arg, c)
   2307 	void *arg;
   2308 	int c;
   2309 {
   2310 
   2311 	return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c));
   2312 }
   2313 #endif /* KGDB */
   2314 
   2315 /* helper function to identify the com ports used by
   2316  console or KGDB (and not yet autoconf attached) */
   2317 int
   2318 com_is_console(iot, iobase, ioh)
   2319 	bus_space_tag_t iot;
   2320 	int iobase;
   2321 	bus_space_handle_t *ioh;
   2322 {
   2323 	bus_space_handle_t help;
   2324 
   2325 	if (!comconsattached &&
   2326 	    iot == comconstag && iobase == comconsaddr)
   2327 		help = comconsioh;
   2328 #ifdef KGDB
   2329 	else if (!com_kgdb_attached &&
   2330 	    iot == com_kgdb_iot && iobase == com_kgdb_addr)
   2331 		help = com_kgdb_ioh;
   2332 #endif
   2333 	else
   2334 		return (0);
   2335 
   2336 	if (ioh)
   2337 		*ioh = help;
   2338 	return (1);
   2339 }
   2340