com.c revision 1.165
1 /* $NetBSD: com.c,v 1.165 1999/12/21 11:04:36 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_com.h" 81 82 #include "rnd.h" 83 #if NRND > 0 && defined(RND_COM) 84 #include <sys/rnd.h> 85 #endif 86 87 #include <sys/param.h> 88 #include <sys/systm.h> 89 #include <sys/ioctl.h> 90 #include <sys/select.h> 91 #include <sys/tty.h> 92 #include <sys/proc.h> 93 #include <sys/user.h> 94 #include <sys/conf.h> 95 #include <sys/file.h> 96 #include <sys/uio.h> 97 #include <sys/kernel.h> 98 #include <sys/syslog.h> 99 #include <sys/types.h> 100 #include <sys/device.h> 101 #include <sys/malloc.h> 102 #include <sys/timepps.h> 103 #include <sys/vnode.h> 104 105 #include <machine/intr.h> 106 #include <machine/bus.h> 107 108 #include <dev/ic/comreg.h> 109 #include <dev/ic/comvar.h> 110 #include <dev/ic/ns16550reg.h> 111 #include <dev/ic/st16650reg.h> 112 #ifdef COM_HAYESP 113 #include <dev/ic/hayespreg.h> 114 #endif 115 #define com_lcr com_cfcr 116 #include <dev/cons.h> 117 118 #include "com.h" 119 120 #ifdef COM_HAYESP 121 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 122 #endif 123 124 #if defined(DDB) || defined(KGDB) 125 static void com_enable_debugport __P((struct com_softc *)); 126 #endif 127 void com_attach_subr __P((struct com_softc *sc)); 128 void com_config __P((struct com_softc *)); 129 void com_shutdown __P((struct com_softc *)); 130 int comspeed __P((long, long)); 131 static u_char cflag2lcr __P((tcflag_t)); 132 int comparam __P((struct tty *, struct termios *)); 133 void comstart __P((struct tty *)); 134 void comstop __P((struct tty *, int)); 135 int comhwiflow __P((struct tty *, int)); 136 137 void com_loadchannelregs __P((struct com_softc *)); 138 void com_hwiflow __P((struct com_softc *)); 139 void com_break __P((struct com_softc *, int)); 140 void com_modem __P((struct com_softc *, int)); 141 void tiocm_to_com __P((struct com_softc *, int, int)); 142 int com_to_tiocm __P((struct com_softc *)); 143 void com_iflush __P((struct com_softc *)); 144 145 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 146 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 147 148 /* XXX: These belong elsewhere */ 149 cdev_decl(com); 150 bdev_decl(com); 151 152 int comcngetc __P((dev_t)); 153 void comcnputc __P((dev_t, int)); 154 void comcnpollc __P((dev_t, int)); 155 156 #define integrate static inline 157 #ifdef __GENERIC_SOFT_INTERRUPTS 158 void comsoft __P((void *)); 159 #else 160 #ifndef __NO_SOFT_SERIAL_INTERRUPT 161 void comsoft __P((void)); 162 #else 163 void comsoft __P((void *)); 164 #endif 165 #endif 166 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 167 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_schedrx __P((struct com_softc *)); 170 void comdiag __P((void *)); 171 172 extern struct cfdriver com_cd; 173 174 /* 175 * Make this an option variable one can patch. 176 * But be warned: this must be a power of 2! 177 */ 178 u_int com_rbuf_size = COM_RING_SIZE; 179 180 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 181 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 182 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 183 184 static int comconsaddr; 185 static bus_space_tag_t comconstag; 186 static bus_space_handle_t comconsioh; 187 static int comconsattached; 188 static int comconsrate; 189 static tcflag_t comconscflag; 190 191 static int ppscap = 192 PPS_TSFMT_TSPEC | 193 PPS_CAPTUREASSERT | 194 PPS_CAPTURECLEAR | 195 #ifdef PPS_SYNC 196 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 197 #endif /* PPS_SYNC */ 198 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 199 200 #ifndef __GENERIC_SOFT_INTERRUPTS 201 #ifdef __NO_SOFT_SERIAL_INTERRUPT 202 volatile int com_softintr_scheduled; 203 #endif 204 #endif 205 206 #ifdef KGDB 207 #include <sys/kgdb.h> 208 209 static int com_kgdb_addr; 210 static bus_space_tag_t com_kgdb_iot; 211 static bus_space_handle_t com_kgdb_ioh; 212 static int com_kgdb_attached; 213 214 int com_kgdb_getc __P((void *)); 215 void com_kgdb_putc __P((void *, int)); 216 #endif /* KGDB */ 217 218 #define COMUNIT_MASK 0x7ffff 219 #define COMDIALOUT_MASK 0x80000 220 221 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 222 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 223 224 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 225 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 226 227 #define BR BUS_SPACE_BARRIER_READ 228 #define BW BUS_SPACE_BARRIER_WRITE 229 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 230 231 int 232 comspeed(speed, frequency) 233 long speed, frequency; 234 { 235 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 236 237 int x, err; 238 239 #if 0 240 if (speed == 0) 241 return (0); 242 #endif 243 if (speed <= 0) 244 return (-1); 245 x = divrnd(frequency / 16, speed); 246 if (x <= 0) 247 return (-1); 248 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 249 if (err < 0) 250 err = -err; 251 if (err > COM_TOLERANCE) 252 return (-1); 253 return (x); 254 255 #undef divrnd(n, q) 256 } 257 258 #ifdef COM_DEBUG 259 int com_debug = 0; 260 261 void comstatus __P((struct com_softc *, char *)); 262 void 263 comstatus(sc, str) 264 struct com_softc *sc; 265 char *str; 266 { 267 struct tty *tp = sc->sc_tty; 268 269 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 270 sc->sc_dev.dv_xname, str, 271 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 272 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 273 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 274 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 275 sc->sc_tx_stopped ? "+" : "-"); 276 277 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 278 sc->sc_dev.dv_xname, str, 279 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 280 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 281 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 282 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 283 sc->sc_rx_flags); 284 } 285 #endif 286 287 int 288 comprobe1(iot, ioh) 289 bus_space_tag_t iot; 290 bus_space_handle_t ioh; 291 { 292 293 /* force access to id reg */ 294 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 295 bus_space_write_1(iot, ioh, com_iir, 0); 296 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 297 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 298 return (0); 299 300 return (1); 301 } 302 303 #ifdef COM_HAYESP 304 int 305 comprobeHAYESP(hayespioh, sc) 306 bus_space_handle_t hayespioh; 307 struct com_softc *sc; 308 { 309 char val, dips; 310 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 311 bus_space_tag_t iot = sc->sc_iot; 312 313 /* 314 * Hayes ESP cards have two iobases. One is for compatibility with 315 * 16550 serial chips, and at the same ISA PC base addresses. The 316 * other is for ESP-specific enhanced features, and lies at a 317 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 318 */ 319 320 /* Test for ESP signature */ 321 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 322 return (0); 323 324 /* 325 * ESP is present at ESP enhanced base address; unknown com port 326 */ 327 328 /* Get the dip-switch configurations */ 329 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 330 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 331 332 /* Determine which com port this ESP card services: bits 0,1 of */ 333 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 334 if (sc->sc_iobase != combaselist[dips & 0x03]) 335 return (0); 336 337 printf(": ESP"); 338 339 /* Check ESP Self Test bits. */ 340 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 341 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 342 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 344 if ((val & 0x70) < 0x20) { 345 printf("-old (%o)", val & 0x70); 346 /* we do not support the necessary features */ 347 return (0); 348 } 349 350 /* Check for ability to emulate 16550: bit 8 == 1 */ 351 if ((dips & 0x80) == 0) { 352 printf(" slave"); 353 /* XXX Does slave really mean no 16550 support?? */ 354 return (0); 355 } 356 357 /* 358 * If we made it this far, we are a full-featured ESP v2.0 (or 359 * better), at the correct com port address. 360 */ 361 362 SET(sc->sc_hwflags, COM_HW_HAYESP); 363 printf(", 1024 byte fifo\n"); 364 return (1); 365 } 366 #endif 367 368 #if defined(DDB) || defined(KGDB) 369 static void 370 com_enable_debugport(sc) 371 struct com_softc *sc; 372 { 373 int s; 374 375 /* Turn on line break interrupt, set carrier. */ 376 s = splserial(); 377 sc->sc_ier = IER_ERXRDY; 378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 379 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 380 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 381 splx(s); 382 } 383 #endif 384 385 void 386 com_attach_subr(sc) 387 struct com_softc *sc; 388 { 389 int iobase = sc->sc_iobase; 390 bus_space_tag_t iot = sc->sc_iot; 391 bus_space_handle_t ioh = sc->sc_ioh; 392 struct tty *tp; 393 #ifdef COM16650 394 u_int8_t lcr; 395 #endif 396 #ifdef COM_HAYESP 397 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 398 int *hayespp; 399 #endif 400 401 /* Disable interrupts before configuring the device. */ 402 sc->sc_ier = 0; 403 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 404 405 if (iot == comconstag && iobase == comconsaddr) { 406 comconsattached = 1; 407 408 /* Make sure the console is always "hardwired". */ 409 delay(1000); /* wait for output to finish */ 410 SET(sc->sc_hwflags, COM_HW_CONSOLE); 411 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 412 } 413 414 #ifdef COM_HAYESP 415 /* Look for a Hayes ESP board. */ 416 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 417 bus_space_handle_t hayespioh; 418 419 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 420 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 421 continue; 422 if (comprobeHAYESP(hayespioh, sc)) { 423 sc->sc_hayespioh = hayespioh; 424 sc->sc_fifolen = 1024; 425 426 break; 427 } 428 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 429 } 430 /* No ESP; look for other things. */ 431 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 432 #endif 433 sc->sc_fifolen = 1; 434 /* look for a NS 16550AF UART with FIFOs */ 435 bus_space_write_1(iot, ioh, com_fifo, 436 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 437 delay(100); 438 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 439 == IIR_FIFO_MASK) 440 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 441 == FIFO_TRIGGER_14) { 442 SET(sc->sc_hwflags, COM_HW_FIFO); 443 444 #ifdef COM16650 445 /* 446 * IIR changes into the EFR if LCR is set to LCR_EERS 447 * on 16650s. We also know IIR != 0 at this point. 448 * Write 0 into the EFR, and read it. If the result 449 * is 0, we have a 16650. 450 * 451 * Older 16650s were broken; the test to detect them 452 * is taken from the Linux driver. Apparently 453 * setting DLAB enable gives access to the EFR on 454 * these chips. 455 */ 456 lcr = bus_space_read_1(iot, ioh, com_lcr); 457 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 458 bus_space_write_1(iot, ioh, com_efr, 0); 459 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 460 bus_space_write_1(iot, ioh, com_lcr, 461 lcr | LCR_DLAB); 462 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 463 CLR(sc->sc_hwflags, COM_HW_FIFO); 464 sc->sc_fifolen = 0; 465 } else { 466 SET(sc->sc_hwflags, COM_HW_FLOW); 467 sc->sc_fifolen = 32; 468 } 469 } else 470 #endif 471 sc->sc_fifolen = 16; 472 473 #ifdef COM16650 474 bus_space_write_1(iot, ioh, com_lcr, lcr); 475 if (sc->sc_fifolen == 0) 476 printf(": st16650, broken fifo\n"); 477 else if (sc->sc_fifolen == 32) 478 printf(": st16650a, working fifo\n"); 479 else 480 #endif 481 printf(": ns16550a, working fifo\n"); 482 } else 483 printf(": ns16550, broken fifo\n"); 484 else 485 printf(": ns8250 or ns16450, no fifo\n"); 486 bus_space_write_1(iot, ioh, com_fifo, 0); 487 #ifdef COM_HAYESP 488 } 489 #endif 490 491 tp = ttymalloc(); 492 tp->t_oproc = comstart; 493 tp->t_param = comparam; 494 tp->t_hwiflow = comhwiflow; 495 496 sc->sc_tty = tp; 497 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 498 if (sc->sc_rbuf == NULL) { 499 printf("%s: unable to allocate ring buffer\n", 500 sc->sc_dev.dv_xname); 501 return; 502 } 503 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 504 505 tty_attach(tp); 506 507 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 508 SET(sc->sc_mcr, MCR_IENABLE); 509 510 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 511 int maj; 512 513 /* locate the major number */ 514 for (maj = 0; maj < nchrdev; maj++) 515 if (cdevsw[maj].d_open == comopen) 516 break; 517 518 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 519 520 printf("%s: console\n", sc->sc_dev.dv_xname); 521 } 522 523 #ifdef KGDB 524 /* 525 * Allow kgdb to "take over" this port. If this is 526 * the kgdb device, it has exclusive use. 527 */ 528 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 529 com_kgdb_attached = 1; 530 531 SET(sc->sc_hwflags, COM_HW_KGDB); 532 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 533 } 534 #endif 535 536 #ifdef __GENERIC_SOFT_INTERRUPTS 537 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 538 #endif 539 540 #if NRND > 0 && defined(RND_COM) 541 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 542 RND_TYPE_TTY, 0); 543 #endif 544 545 /* if there are no enable/disable functions, assume the device 546 is always enabled */ 547 if (!sc->enable) 548 sc->enabled = 1; 549 550 com_config(sc); 551 552 SET(sc->sc_hwflags, COM_HW_DEV_OK); 553 } 554 555 void 556 com_config(sc) 557 struct com_softc *sc; 558 { 559 bus_space_tag_t iot = sc->sc_iot; 560 bus_space_handle_t ioh = sc->sc_ioh; 561 562 /* Disable interrupts before configuring the device. */ 563 sc->sc_ier = 0; 564 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 565 566 #ifdef COM_HAYESP 567 /* Look for a Hayes ESP board. */ 568 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 569 sc->sc_fifolen = 1024; 570 571 /* Set 16550 compatibility mode */ 572 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 573 HAYESP_SETMODE); 574 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 575 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 576 HAYESP_MODE_SCALE); 577 578 /* Set RTS/CTS flow control */ 579 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETFLOWTYPE); 581 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_FLOW_RTS); 583 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_FLOW_CTS); 585 586 /* Set flow control levels */ 587 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 588 HAYESP_SETRXFLOW); 589 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 590 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 591 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 592 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 593 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 594 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 595 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 596 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 597 } 598 #endif 599 600 #ifdef DDB 601 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 602 com_enable_debugport(sc); 603 #endif 604 605 #ifdef KGDB 606 /* 607 * Allow kgdb to "take over" this port. If this is 608 * the kgdb device, it has exclusive use. 609 */ 610 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 611 com_enable_debugport(sc); 612 #endif 613 } 614 615 int 616 com_detach(self, flags) 617 struct device *self; 618 int flags; 619 { 620 struct com_softc *sc = (struct com_softc *)self; 621 int maj, mn; 622 623 /* locate the major number */ 624 for (maj = 0; maj < nchrdev; maj++) 625 if (cdevsw[maj].d_open == comopen) 626 break; 627 628 /* Nuke the vnodes for any open instances. */ 629 mn = self->dv_unit; 630 vdevgone(maj, mn, mn, VCHR); 631 632 mn |= COMDIALOUT_MASK; 633 vdevgone(maj, mn, mn, VCHR); 634 635 /* Free the receive buffer. */ 636 free(sc->sc_rbuf, M_DEVBUF); 637 638 /* Detach and free the tty. */ 639 tty_detach(sc->sc_tty); 640 ttyfree(sc->sc_tty); 641 642 #ifdef __GENERIC_SOFT_INTERRUPTS 643 /* Unhook the soft interrupt handler. */ 644 softintr_disestablish(sc->sc_si); 645 #endif 646 647 #if NRND > 0 && defined(RND_COM) 648 /* Unhook the entropy source. */ 649 rnd_detach_source(&sc->rnd_source); 650 #endif 651 652 return (0); 653 } 654 655 int 656 com_activate(self, act) 657 struct device *self; 658 enum devact act; 659 { 660 struct com_softc *sc = (struct com_softc *)self; 661 int s, rv = 0; 662 663 s = splserial(); 664 switch (act) { 665 case DVACT_ACTIVATE: 666 rv = EOPNOTSUPP; 667 break; 668 669 case DVACT_DEACTIVATE: 670 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 671 rv = EBUSY; 672 break; 673 } 674 675 if (sc->disable != NULL && sc->enabled != 0) { 676 (*sc->disable)(sc); 677 sc->enabled = 0; 678 } 679 break; 680 } 681 splx(s); 682 return (rv); 683 } 684 685 void 686 com_shutdown(sc) 687 struct com_softc *sc; 688 { 689 struct tty *tp = sc->sc_tty; 690 int s; 691 692 s = splserial(); 693 694 /* If we were asserting flow control, then deassert it. */ 695 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 696 com_hwiflow(sc); 697 698 /* Clear any break condition set with TIOCSBRK. */ 699 com_break(sc, 0); 700 701 /* Turn off PPS capture on last close. */ 702 sc->sc_ppsmask = 0; 703 sc->ppsparam.mode = 0; 704 705 /* 706 * Hang up if necessary. Wait a bit, so the other side has time to 707 * notice even if we immediately open the port again. 708 */ 709 if (ISSET(tp->t_cflag, HUPCL)) { 710 com_modem(sc, 0); 711 (void) tsleep(sc, TTIPRI, ttclos, hz); 712 } 713 714 /* Turn off interrupts. */ 715 #ifdef DDB 716 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 717 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 718 else 719 #endif 720 sc->sc_ier = 0; 721 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 722 723 if (sc->disable) { 724 #ifdef DIAGNOSTIC 725 if (!sc->enabled) 726 panic("com_shutdown: not enabled?"); 727 #endif 728 (*sc->disable)(sc); 729 sc->enabled = 0; 730 } 731 732 splx(s); 733 } 734 735 int 736 comopen(dev, flag, mode, p) 737 dev_t dev; 738 int flag, mode; 739 struct proc *p; 740 { 741 int unit = COMUNIT(dev); 742 struct com_softc *sc; 743 struct tty *tp; 744 int s, s2; 745 int error; 746 747 if (unit >= com_cd.cd_ndevs) 748 return (ENXIO); 749 sc = com_cd.cd_devs[unit]; 750 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 751 sc->sc_rbuf == NULL) 752 return (ENXIO); 753 754 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 755 return (ENXIO); 756 757 #ifdef KGDB 758 /* 759 * If this is the kgdb port, no other use is permitted. 760 */ 761 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 762 return (EBUSY); 763 #endif 764 765 tp = sc->sc_tty; 766 767 if (ISSET(tp->t_state, TS_ISOPEN) && 768 ISSET(tp->t_state, TS_XCLUDE) && 769 p->p_ucred->cr_uid != 0) 770 return (EBUSY); 771 772 s = spltty(); 773 774 /* 775 * Do the following iff this is a first open. 776 */ 777 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 778 struct termios t; 779 780 tp->t_dev = dev; 781 782 s2 = splserial(); 783 784 if (sc->enable) { 785 if ((*sc->enable)(sc)) { 786 splx(s2); 787 splx(s); 788 printf("%s: device enable failed\n", 789 sc->sc_dev.dv_xname); 790 return (EIO); 791 } 792 sc->enabled = 1; 793 com_config(sc); 794 } 795 796 /* Turn on interrupts. */ 797 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 798 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 799 800 /* Fetch the current modem control status, needed later. */ 801 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 802 803 /* Clear PPS capture state on first open. */ 804 sc->sc_ppsmask = 0; 805 sc->ppsparam.mode = 0; 806 807 splx(s2); 808 809 /* 810 * Initialize the termios status to the defaults. Add in the 811 * sticky bits from TIOCSFLAGS. 812 */ 813 t.c_ispeed = 0; 814 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 815 t.c_ospeed = comconsrate; 816 t.c_cflag = comconscflag; 817 } else { 818 t.c_ospeed = TTYDEF_SPEED; 819 t.c_cflag = TTYDEF_CFLAG; 820 } 821 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 822 SET(t.c_cflag, CLOCAL); 823 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 824 SET(t.c_cflag, CRTSCTS); 825 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 826 SET(t.c_cflag, MDMBUF); 827 /* Make sure comparam() will do something. */ 828 tp->t_ospeed = 0; 829 (void) comparam(tp, &t); 830 tp->t_iflag = TTYDEF_IFLAG; 831 tp->t_oflag = TTYDEF_OFLAG; 832 tp->t_lflag = TTYDEF_LFLAG; 833 ttychars(tp); 834 ttsetwater(tp); 835 836 s2 = splserial(); 837 838 /* 839 * Turn on DTR. We must always do this, even if carrier is not 840 * present, because otherwise we'd have to use TIOCSDTR 841 * immediately after setting CLOCAL, which applications do not 842 * expect. We always assert DTR while the device is open 843 * unless explicitly requested to deassert it. 844 */ 845 com_modem(sc, 1); 846 847 /* Clear the input ring, and unblock. */ 848 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 849 sc->sc_rbavail = com_rbuf_size; 850 com_iflush(sc); 851 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 852 com_hwiflow(sc); 853 854 #ifdef COM_DEBUG 855 if (com_debug) 856 comstatus(sc, "comopen "); 857 #endif 858 859 splx(s2); 860 } 861 862 splx(s); 863 864 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 865 if (error) 866 goto bad; 867 868 error = (*linesw[tp->t_line].l_open)(dev, tp); 869 if (error) 870 goto bad; 871 872 return (0); 873 874 bad: 875 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 876 /* 877 * We failed to open the device, and nobody else had it opened. 878 * Clean up the state as appropriate. 879 */ 880 com_shutdown(sc); 881 } 882 883 return (error); 884 } 885 886 int 887 comclose(dev, flag, mode, p) 888 dev_t dev; 889 int flag, mode; 890 struct proc *p; 891 { 892 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 893 struct tty *tp = sc->sc_tty; 894 895 /* XXX This is for cons.c. */ 896 if (!ISSET(tp->t_state, TS_ISOPEN)) 897 return (0); 898 899 (*linesw[tp->t_line].l_close)(tp, flag); 900 ttyclose(tp); 901 902 if (COM_ISALIVE(sc) == 0) 903 return (0); 904 905 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 906 /* 907 * Although we got a last close, the device may still be in 908 * use; e.g. if this was the dialout node, and there are still 909 * processes waiting for carrier on the non-dialout node. 910 */ 911 com_shutdown(sc); 912 } 913 914 return (0); 915 } 916 917 int 918 comread(dev, uio, flag) 919 dev_t dev; 920 struct uio *uio; 921 int flag; 922 { 923 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 924 struct tty *tp = sc->sc_tty; 925 926 if (COM_ISALIVE(sc) == 0) 927 return (EIO); 928 929 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 930 } 931 932 int 933 comwrite(dev, uio, flag) 934 dev_t dev; 935 struct uio *uio; 936 int flag; 937 { 938 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 939 struct tty *tp = sc->sc_tty; 940 941 if (COM_ISALIVE(sc) == 0) 942 return (EIO); 943 944 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 945 } 946 947 struct tty * 948 comtty(dev) 949 dev_t dev; 950 { 951 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 952 struct tty *tp = sc->sc_tty; 953 954 return (tp); 955 } 956 957 int 958 comioctl(dev, cmd, data, flag, p) 959 dev_t dev; 960 u_long cmd; 961 caddr_t data; 962 int flag; 963 struct proc *p; 964 { 965 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 966 struct tty *tp = sc->sc_tty; 967 int error; 968 int s; 969 970 if (COM_ISALIVE(sc) == 0) 971 return (EIO); 972 973 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 974 if (error >= 0) 975 return (error); 976 977 error = ttioctl(tp, cmd, data, flag, p); 978 if (error >= 0) 979 return (error); 980 981 error = 0; 982 983 s = splserial(); 984 985 switch (cmd) { 986 case TIOCSBRK: 987 com_break(sc, 1); 988 break; 989 990 case TIOCCBRK: 991 com_break(sc, 0); 992 break; 993 994 case TIOCSDTR: 995 com_modem(sc, 1); 996 break; 997 998 case TIOCCDTR: 999 com_modem(sc, 0); 1000 break; 1001 1002 case TIOCGFLAGS: 1003 *(int *)data = sc->sc_swflags; 1004 break; 1005 1006 case TIOCSFLAGS: 1007 error = suser(p->p_ucred, &p->p_acflag); 1008 if (error) 1009 break; 1010 sc->sc_swflags = *(int *)data; 1011 break; 1012 1013 case TIOCMSET: 1014 case TIOCMBIS: 1015 case TIOCMBIC: 1016 tiocm_to_com(sc, cmd, *(int *)data); 1017 break; 1018 1019 case TIOCMGET: 1020 *(int *)data = com_to_tiocm(sc); 1021 break; 1022 1023 case PPS_IOC_CREATE: 1024 break; 1025 1026 case PPS_IOC_DESTROY: 1027 break; 1028 1029 case PPS_IOC_GETPARAMS: { 1030 pps_params_t *pp; 1031 pp = (pps_params_t *)data; 1032 *pp = sc->ppsparam; 1033 break; 1034 } 1035 1036 case PPS_IOC_SETPARAMS: { 1037 pps_params_t *pp; 1038 int mode; 1039 pp = (pps_params_t *)data; 1040 if (pp->mode & ~ppscap) { 1041 error = EINVAL; 1042 break; 1043 } 1044 sc->ppsparam = *pp; 1045 /* 1046 * Compute msr masks from user-specified timestamp state. 1047 */ 1048 mode = sc->ppsparam.mode; 1049 #ifdef PPS_SYNC 1050 if (mode & PPS_HARDPPSONASSERT) { 1051 mode |= PPS_CAPTUREASSERT; 1052 /* XXX revoke any previous HARDPPS source */ 1053 } 1054 if (mode & PPS_HARDPPSONCLEAR) { 1055 mode |= PPS_CAPTURECLEAR; 1056 /* XXX revoke any previous HARDPPS source */ 1057 } 1058 #endif /* PPS_SYNC */ 1059 switch (mode & PPS_CAPTUREBOTH) { 1060 case 0: 1061 sc->sc_ppsmask = 0; 1062 break; 1063 1064 case PPS_CAPTUREASSERT: 1065 sc->sc_ppsmask = MSR_DCD; 1066 sc->sc_ppsassert = MSR_DCD; 1067 sc->sc_ppsclear = -1; 1068 break; 1069 1070 case PPS_CAPTURECLEAR: 1071 sc->sc_ppsmask = MSR_DCD; 1072 sc->sc_ppsassert = -1; 1073 sc->sc_ppsclear = 0; 1074 break; 1075 1076 case PPS_CAPTUREBOTH: 1077 sc->sc_ppsmask = MSR_DCD; 1078 sc->sc_ppsassert = MSR_DCD; 1079 sc->sc_ppsclear = 0; 1080 break; 1081 1082 default: 1083 error = EINVAL; 1084 break; 1085 } 1086 break; 1087 } 1088 1089 case PPS_IOC_GETCAP: 1090 *(int*)data = ppscap; 1091 break; 1092 1093 case PPS_IOC_FETCH: { 1094 pps_info_t *pi; 1095 pi = (pps_info_t *)data; 1096 *pi = sc->ppsinfo; 1097 break; 1098 } 1099 1100 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1101 /* 1102 * Some GPS clocks models use the falling rather than 1103 * rising edge as the on-the-second signal. 1104 * The old API has no way to specify PPS polarity. 1105 */ 1106 sc->sc_ppsmask = MSR_DCD; 1107 #ifndef PPS_TRAILING_EDGE 1108 sc->sc_ppsassert = MSR_DCD; 1109 sc->sc_ppsclear = -1; 1110 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1111 &sc->ppsinfo.assert_timestamp); 1112 #else 1113 sc->sc_ppsassert = -1 1114 sc->sc_ppsclear = 0; 1115 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1116 &sc->ppsinfo.clear_timestamp); 1117 #endif 1118 break; 1119 1120 default: 1121 error = ENOTTY; 1122 break; 1123 } 1124 1125 splx(s); 1126 1127 #ifdef COM_DEBUG 1128 if (com_debug) 1129 comstatus(sc, "comioctl "); 1130 #endif 1131 1132 return (error); 1133 } 1134 1135 integrate void 1136 com_schedrx(sc) 1137 struct com_softc *sc; 1138 { 1139 1140 sc->sc_rx_ready = 1; 1141 1142 /* Wake up the poller. */ 1143 #ifdef __GENERIC_SOFT_INTERRUPTS 1144 softintr_schedule(sc->sc_si); 1145 #else 1146 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1147 setsoftserial(); 1148 #else 1149 if (!com_softintr_scheduled) { 1150 com_softintr_scheduled = 1; 1151 timeout(comsoft, NULL, 1); 1152 } 1153 #endif 1154 #endif 1155 } 1156 1157 void 1158 com_break(sc, onoff) 1159 struct com_softc *sc; 1160 int onoff; 1161 { 1162 1163 if (onoff) 1164 SET(sc->sc_lcr, LCR_SBREAK); 1165 else 1166 CLR(sc->sc_lcr, LCR_SBREAK); 1167 1168 if (!sc->sc_heldchange) { 1169 if (sc->sc_tx_busy) { 1170 sc->sc_heldtbc = sc->sc_tbc; 1171 sc->sc_tbc = 0; 1172 sc->sc_heldchange = 1; 1173 } else 1174 com_loadchannelregs(sc); 1175 } 1176 } 1177 1178 void 1179 com_modem(sc, onoff) 1180 struct com_softc *sc; 1181 int onoff; 1182 { 1183 1184 if (sc->sc_mcr_dtr == 0) 1185 return; 1186 1187 if (onoff) 1188 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1189 else 1190 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1191 1192 if (!sc->sc_heldchange) { 1193 if (sc->sc_tx_busy) { 1194 sc->sc_heldtbc = sc->sc_tbc; 1195 sc->sc_tbc = 0; 1196 sc->sc_heldchange = 1; 1197 } else 1198 com_loadchannelregs(sc); 1199 } 1200 } 1201 1202 void 1203 tiocm_to_com(sc, how, ttybits) 1204 struct com_softc *sc; 1205 int how, ttybits; 1206 { 1207 u_char combits; 1208 1209 combits = 0; 1210 if (ISSET(ttybits, TIOCM_DTR)) 1211 SET(combits, MCR_DTR); 1212 if (ISSET(ttybits, TIOCM_RTS)) 1213 SET(combits, MCR_RTS); 1214 1215 switch (how) { 1216 case TIOCMBIC: 1217 CLR(sc->sc_mcr, combits); 1218 break; 1219 1220 case TIOCMBIS: 1221 SET(sc->sc_mcr, combits); 1222 break; 1223 1224 case TIOCMSET: 1225 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1226 SET(sc->sc_mcr, combits); 1227 break; 1228 } 1229 1230 if (!sc->sc_heldchange) { 1231 if (sc->sc_tx_busy) { 1232 sc->sc_heldtbc = sc->sc_tbc; 1233 sc->sc_tbc = 0; 1234 sc->sc_heldchange = 1; 1235 } else 1236 com_loadchannelregs(sc); 1237 } 1238 } 1239 1240 int 1241 com_to_tiocm(sc) 1242 struct com_softc *sc; 1243 { 1244 u_char combits; 1245 int ttybits = 0; 1246 1247 combits = sc->sc_mcr; 1248 if (ISSET(combits, MCR_DTR)) 1249 SET(ttybits, TIOCM_DTR); 1250 if (ISSET(combits, MCR_RTS)) 1251 SET(ttybits, TIOCM_RTS); 1252 1253 combits = sc->sc_msr; 1254 if (ISSET(combits, MSR_DCD)) 1255 SET(ttybits, TIOCM_CD); 1256 if (ISSET(combits, MSR_CTS)) 1257 SET(ttybits, TIOCM_CTS); 1258 if (ISSET(combits, MSR_DSR)) 1259 SET(ttybits, TIOCM_DSR); 1260 if (ISSET(combits, MSR_RI | MSR_TERI)) 1261 SET(ttybits, TIOCM_RI); 1262 1263 if (sc->sc_ier != 0) 1264 SET(ttybits, TIOCM_LE); 1265 1266 return (ttybits); 1267 } 1268 1269 static u_char 1270 cflag2lcr(cflag) 1271 tcflag_t cflag; 1272 { 1273 u_char lcr = 0; 1274 1275 switch (ISSET(cflag, CSIZE)) { 1276 case CS5: 1277 SET(lcr, LCR_5BITS); 1278 break; 1279 case CS6: 1280 SET(lcr, LCR_6BITS); 1281 break; 1282 case CS7: 1283 SET(lcr, LCR_7BITS); 1284 break; 1285 case CS8: 1286 SET(lcr, LCR_8BITS); 1287 break; 1288 } 1289 if (ISSET(cflag, PARENB)) { 1290 SET(lcr, LCR_PENAB); 1291 if (!ISSET(cflag, PARODD)) 1292 SET(lcr, LCR_PEVEN); 1293 } 1294 if (ISSET(cflag, CSTOPB)) 1295 SET(lcr, LCR_STOPB); 1296 1297 return (lcr); 1298 } 1299 1300 int 1301 comparam(tp, t) 1302 struct tty *tp; 1303 struct termios *t; 1304 { 1305 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1306 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1307 u_char lcr; 1308 int s; 1309 1310 if (COM_ISALIVE(sc) == 0) 1311 return (EIO); 1312 1313 /* Check requested parameters. */ 1314 if (ospeed < 0) 1315 return (EINVAL); 1316 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1317 return (EINVAL); 1318 1319 /* 1320 * For the console, always force CLOCAL and !HUPCL, so that the port 1321 * is always active. 1322 */ 1323 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1324 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1325 SET(t->c_cflag, CLOCAL); 1326 CLR(t->c_cflag, HUPCL); 1327 } 1328 1329 /* 1330 * If there were no changes, don't do anything. This avoids dropping 1331 * input and improves performance when all we did was frob things like 1332 * VMIN and VTIME. 1333 */ 1334 if (tp->t_ospeed == t->c_ospeed && 1335 tp->t_cflag == t->c_cflag) 1336 return (0); 1337 1338 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1339 1340 s = splserial(); 1341 1342 sc->sc_lcr = lcr; 1343 1344 /* 1345 * If we're not in a mode that assumes a connection is present, then 1346 * ignore carrier changes. 1347 */ 1348 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1349 sc->sc_msr_dcd = 0; 1350 else 1351 sc->sc_msr_dcd = MSR_DCD; 1352 /* 1353 * Set the flow control pins depending on the current flow control 1354 * mode. 1355 */ 1356 if (ISSET(t->c_cflag, CRTSCTS)) { 1357 sc->sc_mcr_dtr = MCR_DTR; 1358 sc->sc_mcr_rts = MCR_RTS; 1359 sc->sc_msr_cts = MSR_CTS; 1360 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1361 } else if (ISSET(t->c_cflag, MDMBUF)) { 1362 /* 1363 * For DTR/DCD flow control, make sure we don't toggle DTR for 1364 * carrier detection. 1365 */ 1366 sc->sc_mcr_dtr = 0; 1367 sc->sc_mcr_rts = MCR_DTR; 1368 sc->sc_msr_cts = MSR_DCD; 1369 sc->sc_efr = 0; 1370 } else { 1371 /* 1372 * If no flow control, then always set RTS. This will make 1373 * the other side happy if it mistakenly thinks we're doing 1374 * RTS/CTS flow control. 1375 */ 1376 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1377 sc->sc_mcr_rts = 0; 1378 sc->sc_msr_cts = 0; 1379 sc->sc_efr = 0; 1380 if (ISSET(sc->sc_mcr, MCR_DTR)) 1381 SET(sc->sc_mcr, MCR_RTS); 1382 else 1383 CLR(sc->sc_mcr, MCR_RTS); 1384 } 1385 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1386 1387 #if 0 1388 if (ospeed == 0) 1389 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1390 else 1391 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1392 #endif 1393 1394 sc->sc_dlbl = ospeed; 1395 sc->sc_dlbh = ospeed >> 8; 1396 1397 /* 1398 * Set the FIFO threshold based on the receive speed. 1399 * 1400 * * If it's a low speed, it's probably a mouse or some other 1401 * interactive device, so set the threshold low. 1402 * * If it's a high speed, trim the trigger level down to prevent 1403 * overflows. 1404 * * Otherwise set it a bit higher. 1405 */ 1406 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1407 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1408 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1409 sc->sc_fifo = FIFO_ENABLE | 1410 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1411 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1412 else 1413 sc->sc_fifo = 0; 1414 1415 /* And copy to tty. */ 1416 tp->t_ispeed = 0; 1417 tp->t_ospeed = t->c_ospeed; 1418 tp->t_cflag = t->c_cflag; 1419 1420 if (!sc->sc_heldchange) { 1421 if (sc->sc_tx_busy) { 1422 sc->sc_heldtbc = sc->sc_tbc; 1423 sc->sc_tbc = 0; 1424 sc->sc_heldchange = 1; 1425 } else 1426 com_loadchannelregs(sc); 1427 } 1428 1429 if (!ISSET(t->c_cflag, CHWFLOW)) { 1430 /* Disable the high water mark. */ 1431 sc->sc_r_hiwat = 0; 1432 sc->sc_r_lowat = 0; 1433 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1434 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1435 com_schedrx(sc); 1436 } 1437 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1438 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1439 com_hwiflow(sc); 1440 } 1441 } else { 1442 sc->sc_r_hiwat = com_rbuf_hiwat; 1443 sc->sc_r_lowat = com_rbuf_lowat; 1444 } 1445 1446 splx(s); 1447 1448 /* 1449 * Update the tty layer's idea of the carrier bit, in case we changed 1450 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1451 * explicit request. 1452 */ 1453 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1454 1455 #ifdef COM_DEBUG 1456 if (com_debug) 1457 comstatus(sc, "comparam "); 1458 #endif 1459 1460 if (!ISSET(t->c_cflag, CHWFLOW)) { 1461 if (sc->sc_tx_stopped) { 1462 sc->sc_tx_stopped = 0; 1463 comstart(tp); 1464 } 1465 } 1466 1467 return (0); 1468 } 1469 1470 void 1471 com_iflush(sc) 1472 struct com_softc *sc; 1473 { 1474 bus_space_tag_t iot = sc->sc_iot; 1475 bus_space_handle_t ioh = sc->sc_ioh; 1476 #ifdef DIAGNOSTIC 1477 int reg; 1478 #endif 1479 int timo; 1480 1481 #ifdef DIAGNOSTIC 1482 reg = 0xffff; 1483 #endif 1484 timo = 50000; 1485 /* flush any pending I/O */ 1486 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1487 && --timo) 1488 #ifdef DIAGNOSTIC 1489 reg = 1490 #else 1491 (void) 1492 #endif 1493 bus_space_read_1(iot, ioh, com_data); 1494 #ifdef DIAGNOSTIC 1495 if (!timo) 1496 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1497 reg); 1498 #endif 1499 } 1500 1501 void 1502 com_loadchannelregs(sc) 1503 struct com_softc *sc; 1504 { 1505 bus_space_tag_t iot = sc->sc_iot; 1506 bus_space_handle_t ioh = sc->sc_ioh; 1507 1508 /* XXXXX necessary? */ 1509 com_iflush(sc); 1510 1511 bus_space_write_1(iot, ioh, com_ier, 0); 1512 1513 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1514 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1515 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1516 } 1517 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1518 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1519 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1520 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1521 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1522 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1523 1524 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1525 } 1526 1527 int 1528 comhwiflow(tp, block) 1529 struct tty *tp; 1530 int block; 1531 { 1532 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1533 int s; 1534 1535 if (COM_ISALIVE(sc) == 0) 1536 return (0); 1537 1538 if (sc->sc_mcr_rts == 0) 1539 return (0); 1540 1541 s = splserial(); 1542 if (block) { 1543 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1544 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1545 com_hwiflow(sc); 1546 } 1547 } else { 1548 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1549 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1550 com_schedrx(sc); 1551 } 1552 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1553 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1554 com_hwiflow(sc); 1555 } 1556 } 1557 splx(s); 1558 return (1); 1559 } 1560 1561 /* 1562 * (un)block input via hw flowcontrol 1563 */ 1564 void 1565 com_hwiflow(sc) 1566 struct com_softc *sc; 1567 { 1568 bus_space_tag_t iot = sc->sc_iot; 1569 bus_space_handle_t ioh = sc->sc_ioh; 1570 1571 if (sc->sc_mcr_rts == 0) 1572 return; 1573 1574 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1575 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1576 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1577 } else { 1578 SET(sc->sc_mcr, sc->sc_mcr_rts); 1579 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1580 } 1581 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1582 } 1583 1584 1585 void 1586 comstart(tp) 1587 struct tty *tp; 1588 { 1589 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1590 bus_space_tag_t iot = sc->sc_iot; 1591 bus_space_handle_t ioh = sc->sc_ioh; 1592 int s; 1593 1594 if (COM_ISALIVE(sc) == 0) 1595 return; 1596 1597 s = spltty(); 1598 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1599 goto out; 1600 if (sc->sc_tx_stopped) 1601 goto out; 1602 1603 if (tp->t_outq.c_cc <= tp->t_lowat) { 1604 if (ISSET(tp->t_state, TS_ASLEEP)) { 1605 CLR(tp->t_state, TS_ASLEEP); 1606 wakeup(&tp->t_outq); 1607 } 1608 selwakeup(&tp->t_wsel); 1609 if (tp->t_outq.c_cc == 0) 1610 goto out; 1611 } 1612 1613 /* Grab the first contiguous region of buffer space. */ 1614 { 1615 u_char *tba; 1616 int tbc; 1617 1618 tba = tp->t_outq.c_cf; 1619 tbc = ndqb(&tp->t_outq, 0); 1620 1621 (void)splserial(); 1622 1623 sc->sc_tba = tba; 1624 sc->sc_tbc = tbc; 1625 } 1626 1627 SET(tp->t_state, TS_BUSY); 1628 sc->sc_tx_busy = 1; 1629 1630 /* Enable transmit completion interrupts if necessary. */ 1631 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1632 SET(sc->sc_ier, IER_ETXRDY); 1633 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1634 } 1635 1636 /* Output the first chunk of the contiguous buffer. */ 1637 { 1638 int n; 1639 1640 n = sc->sc_tbc; 1641 if (n > sc->sc_fifolen) 1642 n = sc->sc_fifolen; 1643 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1644 sc->sc_tbc -= n; 1645 sc->sc_tba += n; 1646 } 1647 out: 1648 splx(s); 1649 return; 1650 } 1651 1652 /* 1653 * Stop output on a line. 1654 */ 1655 void 1656 comstop(tp, flag) 1657 struct tty *tp; 1658 int flag; 1659 { 1660 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1661 int s; 1662 1663 s = splserial(); 1664 if (ISSET(tp->t_state, TS_BUSY)) { 1665 /* Stop transmitting at the next chunk. */ 1666 sc->sc_tbc = 0; 1667 sc->sc_heldtbc = 0; 1668 if (!ISSET(tp->t_state, TS_TTSTOP)) 1669 SET(tp->t_state, TS_FLUSH); 1670 } 1671 splx(s); 1672 } 1673 1674 void 1675 comdiag(arg) 1676 void *arg; 1677 { 1678 struct com_softc *sc = arg; 1679 int overflows, floods; 1680 int s; 1681 1682 s = splserial(); 1683 overflows = sc->sc_overflows; 1684 sc->sc_overflows = 0; 1685 floods = sc->sc_floods; 1686 sc->sc_floods = 0; 1687 sc->sc_errors = 0; 1688 splx(s); 1689 1690 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1691 sc->sc_dev.dv_xname, 1692 overflows, overflows == 1 ? "" : "s", 1693 floods, floods == 1 ? "" : "s"); 1694 } 1695 1696 integrate void 1697 com_rxsoft(sc, tp) 1698 struct com_softc *sc; 1699 struct tty *tp; 1700 { 1701 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1702 u_char *get, *end; 1703 u_int cc, scc; 1704 u_char lsr; 1705 int code; 1706 int s; 1707 1708 end = sc->sc_ebuf; 1709 get = sc->sc_rbget; 1710 scc = cc = com_rbuf_size - sc->sc_rbavail; 1711 1712 if (cc == com_rbuf_size) { 1713 sc->sc_floods++; 1714 if (sc->sc_errors++ == 0) 1715 timeout(comdiag, sc, 60 * hz); 1716 } 1717 1718 while (cc) { 1719 code = get[0]; 1720 lsr = get[1]; 1721 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1722 if (ISSET(lsr, LSR_OE)) { 1723 sc->sc_overflows++; 1724 if (sc->sc_errors++ == 0) 1725 timeout(comdiag, sc, 60 * hz); 1726 } 1727 if (ISSET(lsr, LSR_BI | LSR_FE)) 1728 SET(code, TTY_FE); 1729 if (ISSET(lsr, LSR_PE)) 1730 SET(code, TTY_PE); 1731 } 1732 if ((*rint)(code, tp) == -1) { 1733 /* 1734 * The line discipline's buffer is out of space. 1735 */ 1736 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1737 /* 1738 * We're either not using flow control, or the 1739 * line discipline didn't tell us to block for 1740 * some reason. Either way, we have no way to 1741 * know when there's more space available, so 1742 * just drop the rest of the data. 1743 */ 1744 get += cc << 1; 1745 if (get >= end) 1746 get -= com_rbuf_size << 1; 1747 cc = 0; 1748 } else { 1749 /* 1750 * Don't schedule any more receive processing 1751 * until the line discipline tells us there's 1752 * space available (through comhwiflow()). 1753 * Leave the rest of the data in the input 1754 * buffer. 1755 */ 1756 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1757 } 1758 break; 1759 } 1760 get += 2; 1761 if (get >= end) 1762 get = sc->sc_rbuf; 1763 cc--; 1764 } 1765 1766 if (cc != scc) { 1767 sc->sc_rbget = get; 1768 s = splserial(); 1769 cc = sc->sc_rbavail += scc - cc; 1770 /* Buffers should be ok again, release possible block. */ 1771 if (cc >= sc->sc_r_lowat) { 1772 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1773 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1774 SET(sc->sc_ier, IER_ERXRDY); 1775 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1776 } 1777 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1778 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1779 com_hwiflow(sc); 1780 } 1781 } 1782 splx(s); 1783 } 1784 } 1785 1786 integrate void 1787 com_txsoft(sc, tp) 1788 struct com_softc *sc; 1789 struct tty *tp; 1790 { 1791 1792 CLR(tp->t_state, TS_BUSY); 1793 if (ISSET(tp->t_state, TS_FLUSH)) 1794 CLR(tp->t_state, TS_FLUSH); 1795 else 1796 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1797 (*linesw[tp->t_line].l_start)(tp); 1798 } 1799 1800 integrate void 1801 com_stsoft(sc, tp) 1802 struct com_softc *sc; 1803 struct tty *tp; 1804 { 1805 u_char msr, delta; 1806 int s; 1807 1808 s = splserial(); 1809 msr = sc->sc_msr; 1810 delta = sc->sc_msr_delta; 1811 sc->sc_msr_delta = 0; 1812 splx(s); 1813 1814 if (ISSET(delta, sc->sc_msr_dcd)) { 1815 /* 1816 * Inform the tty layer that carrier detect changed. 1817 */ 1818 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1819 } 1820 1821 if (ISSET(delta, sc->sc_msr_cts)) { 1822 /* Block or unblock output according to flow control. */ 1823 if (ISSET(msr, sc->sc_msr_cts)) { 1824 sc->sc_tx_stopped = 0; 1825 (*linesw[tp->t_line].l_start)(tp); 1826 } else { 1827 sc->sc_tx_stopped = 1; 1828 } 1829 } 1830 1831 #ifdef COM_DEBUG 1832 if (com_debug) 1833 comstatus(sc, "com_stsoft"); 1834 #endif 1835 } 1836 1837 #ifdef __GENERIC_SOFT_INTERRUPTS 1838 void 1839 comsoft(arg) 1840 void *arg; 1841 { 1842 struct com_softc *sc = arg; 1843 struct tty *tp; 1844 1845 if (COM_ISALIVE(sc) == 0) 1846 return; 1847 1848 { 1849 #else 1850 void 1851 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1852 comsoft() 1853 #else 1854 comsoft(arg) 1855 void *arg; 1856 #endif 1857 { 1858 struct com_softc *sc; 1859 struct tty *tp; 1860 int unit; 1861 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1862 int s; 1863 1864 s = splsoftserial(); 1865 com_softintr_scheduled = 0; 1866 #endif 1867 1868 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1869 sc = com_cd.cd_devs[unit]; 1870 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1871 continue; 1872 1873 if (COM_ISALIVE(sc) == 0) 1874 continue; 1875 1876 tp = sc->sc_tty; 1877 if (tp == NULL) 1878 continue; 1879 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1880 continue; 1881 #endif 1882 tp = sc->sc_tty; 1883 1884 if (sc->sc_rx_ready) { 1885 sc->sc_rx_ready = 0; 1886 com_rxsoft(sc, tp); 1887 } 1888 1889 if (sc->sc_st_check) { 1890 sc->sc_st_check = 0; 1891 com_stsoft(sc, tp); 1892 } 1893 1894 if (sc->sc_tx_done) { 1895 sc->sc_tx_done = 0; 1896 com_txsoft(sc, tp); 1897 } 1898 } 1899 1900 #ifndef __GENERIC_SOFT_INTERRUPTS 1901 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1902 splx(s); 1903 #endif 1904 #endif 1905 } 1906 1907 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1908 /* there has got to be a better way to do comsoft() */ 1909 }} 1910 #endif 1911 1912 int 1913 comintr(arg) 1914 void *arg; 1915 { 1916 struct com_softc *sc = arg; 1917 bus_space_tag_t iot = sc->sc_iot; 1918 bus_space_handle_t ioh = sc->sc_ioh; 1919 u_char *put, *end; 1920 u_int cc; 1921 u_char lsr, iir; 1922 1923 if (COM_ISALIVE(sc) == 0) 1924 return (0); 1925 1926 iir = bus_space_read_1(iot, ioh, com_iir); 1927 if (ISSET(iir, IIR_NOPEND)) 1928 return (0); 1929 1930 end = sc->sc_ebuf; 1931 put = sc->sc_rbput; 1932 cc = sc->sc_rbavail; 1933 1934 do { 1935 u_char msr, delta; 1936 1937 lsr = bus_space_read_1(iot, ioh, com_lsr); 1938 #if defined(DDB) || defined(KGDB) 1939 if (ISSET(lsr, LSR_BI)) { 1940 #ifdef DDB 1941 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1942 console_debugger(); 1943 continue; 1944 } 1945 #endif 1946 #ifdef KGDB 1947 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1948 kgdb_connect(1); 1949 continue; 1950 } 1951 #endif 1952 } 1953 #endif /* DDB || KGDB */ 1954 1955 if (ISSET(lsr, LSR_RCV_MASK) && 1956 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1957 while (cc > 0) { 1958 put[0] = bus_space_read_1(iot, ioh, com_data); 1959 put[1] = lsr; 1960 put += 2; 1961 if (put >= end) 1962 put = sc->sc_rbuf; 1963 cc--; 1964 1965 lsr = bus_space_read_1(iot, ioh, com_lsr); 1966 if (!ISSET(lsr, LSR_RCV_MASK)) 1967 break; 1968 } 1969 1970 /* 1971 * Current string of incoming characters ended because 1972 * no more data was available or we ran out of space. 1973 * Schedule a receive event if any data was received. 1974 * If we're out of space, turn off receive interrupts. 1975 */ 1976 sc->sc_rbput = put; 1977 sc->sc_rbavail = cc; 1978 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1979 sc->sc_rx_ready = 1; 1980 1981 /* 1982 * See if we are in danger of overflowing a buffer. If 1983 * so, use hardware flow control to ease the pressure. 1984 */ 1985 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1986 cc < sc->sc_r_hiwat) { 1987 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1988 com_hwiflow(sc); 1989 } 1990 1991 /* 1992 * If we're out of space, disable receive interrupts 1993 * until the queue has drained a bit. 1994 */ 1995 if (!cc) { 1996 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1997 CLR(sc->sc_ier, IER_ERXRDY); 1998 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1999 } 2000 } else { 2001 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2002 bus_space_write_1(iot, ioh, com_ier, 0); 2003 delay(10); 2004 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2005 iir = IIR_NOPEND; 2006 continue; 2007 } 2008 } 2009 2010 msr = bus_space_read_1(iot, ioh, com_msr); 2011 delta = msr ^ sc->sc_msr; 2012 sc->sc_msr = msr; 2013 if (ISSET(delta, sc->sc_msr_mask)) { 2014 SET(sc->sc_msr_delta, delta); 2015 2016 /* 2017 * Pulse-per-second clock signal on edge of DCD? 2018 */ 2019 if (ISSET(delta, sc->sc_ppsmask)) { 2020 struct timeval tv; 2021 if (ISSET(msr, sc->sc_ppsmask) == 2022 sc->sc_ppsassert) { 2023 /* XXX nanotime() */ 2024 microtime(&tv); 2025 TIMEVAL_TO_TIMESPEC(&tv, 2026 &sc->ppsinfo.assert_timestamp); 2027 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2028 timespecadd(&sc->ppsinfo.assert_timestamp, 2029 &sc->ppsparam.assert_offset, 2030 &sc->ppsinfo.assert_timestamp); 2031 } 2032 2033 #ifdef PPS_SYNC 2034 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2035 hardpps(&tv, tv.tv_usec); 2036 #endif 2037 sc->ppsinfo.assert_sequence++; 2038 sc->ppsinfo.current_mode = 2039 sc->ppsparam.mode; 2040 2041 } else if (ISSET(msr, sc->sc_ppsmask) == 2042 sc->sc_ppsclear) { 2043 /* XXX nanotime() */ 2044 microtime(&tv); 2045 TIMEVAL_TO_TIMESPEC(&tv, 2046 &sc->ppsinfo.clear_timestamp); 2047 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2048 timespecadd(&sc->ppsinfo.clear_timestamp, 2049 &sc->ppsparam.clear_offset, 2050 &sc->ppsinfo.clear_timestamp); 2051 } 2052 2053 #ifdef PPS_SYNC 2054 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2055 hardpps(&tv, tv.tv_usec); 2056 #endif 2057 sc->ppsinfo.clear_sequence++; 2058 sc->ppsinfo.current_mode = 2059 sc->ppsparam.mode; 2060 } 2061 } 2062 2063 /* 2064 * Stop output immediately if we lose the output 2065 * flow control signal or carrier detect. 2066 */ 2067 if (ISSET(~msr, sc->sc_msr_mask)) { 2068 sc->sc_tbc = 0; 2069 sc->sc_heldtbc = 0; 2070 #ifdef COM_DEBUG 2071 if (com_debug) 2072 comstatus(sc, "comintr "); 2073 #endif 2074 } 2075 2076 sc->sc_st_check = 1; 2077 } 2078 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2079 2080 /* 2081 * Done handling any receive interrupts. See if data can be 2082 * transmitted as well. Schedule tx done event if no data left 2083 * and tty was marked busy. 2084 */ 2085 if (ISSET(lsr, LSR_TXRDY)) { 2086 /* 2087 * If we've delayed a parameter change, do it now, and restart 2088 * output. 2089 */ 2090 if (sc->sc_heldchange) { 2091 com_loadchannelregs(sc); 2092 sc->sc_heldchange = 0; 2093 sc->sc_tbc = sc->sc_heldtbc; 2094 sc->sc_heldtbc = 0; 2095 } 2096 2097 /* Output the next chunk of the contiguous buffer, if any. */ 2098 if (sc->sc_tbc > 0) { 2099 int n; 2100 2101 n = sc->sc_tbc; 2102 if (n > sc->sc_fifolen) 2103 n = sc->sc_fifolen; 2104 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2105 sc->sc_tbc -= n; 2106 sc->sc_tba += n; 2107 } else { 2108 /* Disable transmit completion interrupts if necessary. */ 2109 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2110 CLR(sc->sc_ier, IER_ETXRDY); 2111 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2112 } 2113 if (sc->sc_tx_busy) { 2114 sc->sc_tx_busy = 0; 2115 sc->sc_tx_done = 1; 2116 } 2117 } 2118 } 2119 2120 /* Wake up the poller. */ 2121 #ifdef __GENERIC_SOFT_INTERRUPTS 2122 softintr_schedule(sc->sc_si); 2123 #else 2124 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2125 setsoftserial(); 2126 #else 2127 if (!com_softintr_scheduled) { 2128 com_softintr_scheduled = 1; 2129 timeout(comsoft, NULL, 1); 2130 } 2131 #endif 2132 #endif 2133 2134 #if NRND > 0 && defined(RND_COM) 2135 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2136 #endif 2137 2138 return (1); 2139 } 2140 2141 /* 2142 * The following functions are polled getc and putc routines, shared 2143 * by the console and kgdb glue. 2144 */ 2145 2146 int 2147 com_common_getc(iot, ioh) 2148 bus_space_tag_t iot; 2149 bus_space_handle_t ioh; 2150 { 2151 int s = splserial(); 2152 u_char stat, c; 2153 2154 /* block until a character becomes available */ 2155 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2156 ; 2157 2158 c = bus_space_read_1(iot, ioh, com_data); 2159 stat = bus_space_read_1(iot, ioh, com_iir); 2160 splx(s); 2161 return (c); 2162 } 2163 2164 void 2165 com_common_putc(iot, ioh, c) 2166 bus_space_tag_t iot; 2167 bus_space_handle_t ioh; 2168 int c; 2169 { 2170 int s = splserial(); 2171 int timo; 2172 2173 /* wait for any pending transmission to finish */ 2174 timo = 150000; 2175 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2176 continue; 2177 2178 bus_space_write_1(iot, ioh, com_data, c); 2179 COM_BARRIER(iot, ioh, BR | BW); 2180 2181 /* wait for this transmission to complete */ 2182 timo = 1500000; 2183 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2184 continue; 2185 2186 splx(s); 2187 } 2188 2189 /* 2190 * Initialize UART for use as console or KGDB line. 2191 */ 2192 int 2193 cominit(iot, iobase, rate, frequency, cflag, iohp) 2194 bus_space_tag_t iot; 2195 int iobase; 2196 int rate, frequency; 2197 tcflag_t cflag; 2198 bus_space_handle_t *iohp; 2199 { 2200 bus_space_handle_t ioh; 2201 2202 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2203 return (ENOMEM); /* ??? */ 2204 2205 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2206 bus_space_write_1(iot, ioh, com_efr, 0); 2207 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2208 rate = comspeed(rate, frequency); 2209 bus_space_write_1(iot, ioh, com_dlbl, rate); 2210 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2211 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2212 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2213 bus_space_write_1(iot, ioh, com_fifo, 2214 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2215 bus_space_write_1(iot, ioh, com_ier, 0); 2216 2217 *iohp = ioh; 2218 return (0); 2219 } 2220 2221 /* 2222 * Following are all routines needed for COM to act as console 2223 */ 2224 2225 int 2226 comcnattach(iot, iobase, rate, frequency, cflag) 2227 bus_space_tag_t iot; 2228 int iobase; 2229 int rate, frequency; 2230 tcflag_t cflag; 2231 { 2232 int res; 2233 static struct consdev comcons = { 2234 NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL 2235 }; 2236 2237 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2238 if (res) 2239 return (res); 2240 2241 cn_tab = &comcons; 2242 2243 comconstag = iot; 2244 comconsaddr = iobase; 2245 comconsrate = rate; 2246 comconscflag = cflag; 2247 2248 return (0); 2249 } 2250 2251 int 2252 comcngetc(dev) 2253 dev_t dev; 2254 { 2255 2256 return (com_common_getc(comconstag, comconsioh)); 2257 } 2258 2259 /* 2260 * Console kernel output character routine. 2261 */ 2262 void 2263 comcnputc(dev, c) 2264 dev_t dev; 2265 int c; 2266 { 2267 2268 com_common_putc(comconstag, comconsioh, c); 2269 } 2270 2271 void 2272 comcnpollc(dev, on) 2273 dev_t dev; 2274 int on; 2275 { 2276 2277 } 2278 2279 #ifdef KGDB 2280 int 2281 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2282 bus_space_tag_t iot; 2283 int iobase; 2284 int rate, frequency; 2285 tcflag_t cflag; 2286 { 2287 int res; 2288 2289 if (iot == comconstag && iobase == comconsaddr) 2290 return (EBUSY); /* cannot share with console */ 2291 2292 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2293 if (res) 2294 return (res); 2295 2296 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2297 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2298 2299 com_kgdb_iot = iot; 2300 com_kgdb_addr = iobase; 2301 2302 return (0); 2303 } 2304 2305 /* ARGSUSED */ 2306 int 2307 com_kgdb_getc(arg) 2308 void *arg; 2309 { 2310 2311 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2312 } 2313 2314 /* ARGSUSED */ 2315 void 2316 com_kgdb_putc(arg, c) 2317 void *arg; 2318 int c; 2319 { 2320 2321 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2322 } 2323 #endif /* KGDB */ 2324 2325 /* helper function to identify the com ports used by 2326 console or KGDB (and not yet autoconf attached) */ 2327 int 2328 com_is_console(iot, iobase, ioh) 2329 bus_space_tag_t iot; 2330 int iobase; 2331 bus_space_handle_t *ioh; 2332 { 2333 bus_space_handle_t help; 2334 2335 if (!comconsattached && 2336 iot == comconstag && iobase == comconsaddr) 2337 help = comconsioh; 2338 #ifdef KGDB 2339 else if (!com_kgdb_attached && 2340 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2341 help = com_kgdb_ioh; 2342 #endif 2343 else 2344 return (0); 2345 2346 if (ioh) 2347 *ioh = help; 2348 return (1); 2349 } 2350
Indexes created Tue Sep 23 02:09:52 GMT 2025