com.c revision 1.169
1 /* $NetBSD: com.c,v 1.169 2000/03/06 21:36:12 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_com.h" 81 82 #include "rnd.h" 83 #if NRND > 0 && defined(RND_COM) 84 #include <sys/rnd.h> 85 #endif 86 87 #include <sys/param.h> 88 #include <sys/systm.h> 89 #include <sys/ioctl.h> 90 #include <sys/select.h> 91 #include <sys/tty.h> 92 #include <sys/proc.h> 93 #include <sys/user.h> 94 #include <sys/conf.h> 95 #include <sys/file.h> 96 #include <sys/uio.h> 97 #include <sys/kernel.h> 98 #include <sys/syslog.h> 99 #include <sys/types.h> 100 #include <sys/device.h> 101 #include <sys/malloc.h> 102 #include <sys/timepps.h> 103 #include <sys/vnode.h> 104 105 #include <machine/intr.h> 106 #include <machine/bus.h> 107 108 #include <dev/ic/comreg.h> 109 #include <dev/ic/comvar.h> 110 #include <dev/ic/ns16550reg.h> 111 #include <dev/ic/st16650reg.h> 112 #ifdef COM_HAYESP 113 #include <dev/ic/hayespreg.h> 114 #endif 115 #define com_lcr com_cfcr 116 #include <dev/cons.h> 117 118 #include "com.h" 119 120 #ifdef COM_HAYESP 121 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 122 #endif 123 124 #if defined(DDB) || defined(KGDB) 125 static void com_enable_debugport __P((struct com_softc *)); 126 #endif 127 void com_attach_subr __P((struct com_softc *sc)); 128 void com_config __P((struct com_softc *)); 129 void com_shutdown __P((struct com_softc *)); 130 int comspeed __P((long, long)); 131 static u_char cflag2lcr __P((tcflag_t)); 132 int comparam __P((struct tty *, struct termios *)); 133 void comstart __P((struct tty *)); 134 void comstop __P((struct tty *, int)); 135 int comhwiflow __P((struct tty *, int)); 136 137 void com_loadchannelregs __P((struct com_softc *)); 138 void com_hwiflow __P((struct com_softc *)); 139 void com_break __P((struct com_softc *, int)); 140 void com_modem __P((struct com_softc *, int)); 141 void tiocm_to_com __P((struct com_softc *, int, int)); 142 int com_to_tiocm __P((struct com_softc *)); 143 void com_iflush __P((struct com_softc *)); 144 145 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 146 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 147 148 /* XXX: These belong elsewhere */ 149 cdev_decl(com); 150 bdev_decl(com); 151 152 int comcngetc __P((dev_t)); 153 void comcnputc __P((dev_t, int)); 154 void comcnpollc __P((dev_t, int)); 155 156 #define integrate static inline 157 #ifdef __GENERIC_SOFT_INTERRUPTS 158 void comsoft __P((void *)); 159 #else 160 #ifndef __NO_SOFT_SERIAL_INTERRUPT 161 void comsoft __P((void)); 162 #else 163 void comsoft __P((void *)); 164 #endif 165 #endif 166 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 167 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_schedrx __P((struct com_softc *)); 170 void comdiag __P((void *)); 171 172 extern struct cfdriver com_cd; 173 174 /* 175 * Make this an option variable one can patch. 176 * But be warned: this must be a power of 2! 177 */ 178 u_int com_rbuf_size = COM_RING_SIZE; 179 180 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 181 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 182 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 183 184 static int comconsaddr; 185 static bus_space_tag_t comconstag; 186 static bus_space_handle_t comconsioh; 187 static int comconsattached; 188 static int comconsrate; 189 static tcflag_t comconscflag; 190 191 static int ppscap = 192 PPS_TSFMT_TSPEC | 193 PPS_CAPTUREASSERT | 194 PPS_CAPTURECLEAR | 195 #ifdef PPS_SYNC 196 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 197 #endif /* PPS_SYNC */ 198 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 199 200 #ifndef __GENERIC_SOFT_INTERRUPTS 201 #ifdef __NO_SOFT_SERIAL_INTERRUPT 202 volatile int com_softintr_scheduled; 203 #endif 204 #endif 205 206 #ifdef KGDB 207 #include <sys/kgdb.h> 208 209 static int com_kgdb_addr; 210 static bus_space_tag_t com_kgdb_iot; 211 static bus_space_handle_t com_kgdb_ioh; 212 static int com_kgdb_attached; 213 214 int com_kgdb_getc __P((void *)); 215 void com_kgdb_putc __P((void *, int)); 216 #endif /* KGDB */ 217 218 #define COMUNIT_MASK 0x7ffff 219 #define COMDIALOUT_MASK 0x80000 220 221 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 222 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 223 224 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 225 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 226 227 #define BR BUS_SPACE_BARRIER_READ 228 #define BW BUS_SPACE_BARRIER_WRITE 229 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 230 231 int 232 comspeed(speed, frequency) 233 long speed, frequency; 234 { 235 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 236 237 int x, err; 238 239 #if 0 240 if (speed == 0) 241 return (0); 242 #endif 243 if (speed <= 0) 244 return (-1); 245 x = divrnd(frequency / 16, speed); 246 if (x <= 0) 247 return (-1); 248 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 249 if (err < 0) 250 err = -err; 251 if (err > COM_TOLERANCE) 252 return (-1); 253 return (x); 254 255 #undef divrnd(n, q) 256 } 257 258 #ifdef COM_DEBUG 259 int com_debug = 0; 260 261 void comstatus __P((struct com_softc *, char *)); 262 void 263 comstatus(sc, str) 264 struct com_softc *sc; 265 char *str; 266 { 267 struct tty *tp = sc->sc_tty; 268 269 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 270 sc->sc_dev.dv_xname, str, 271 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 272 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 273 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 274 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 275 sc->sc_tx_stopped ? "+" : "-"); 276 277 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 278 sc->sc_dev.dv_xname, str, 279 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 280 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 281 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 282 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 283 sc->sc_rx_flags); 284 } 285 #endif 286 287 int 288 comprobe1(iot, ioh) 289 bus_space_tag_t iot; 290 bus_space_handle_t ioh; 291 { 292 293 /* force access to id reg */ 294 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 295 bus_space_write_1(iot, ioh, com_iir, 0); 296 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 297 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 298 return (0); 299 300 return (1); 301 } 302 303 #ifdef COM_HAYESP 304 int 305 comprobeHAYESP(hayespioh, sc) 306 bus_space_handle_t hayespioh; 307 struct com_softc *sc; 308 { 309 char val, dips; 310 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 311 bus_space_tag_t iot = sc->sc_iot; 312 313 /* 314 * Hayes ESP cards have two iobases. One is for compatibility with 315 * 16550 serial chips, and at the same ISA PC base addresses. The 316 * other is for ESP-specific enhanced features, and lies at a 317 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 318 */ 319 320 /* Test for ESP signature */ 321 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 322 return (0); 323 324 /* 325 * ESP is present at ESP enhanced base address; unknown com port 326 */ 327 328 /* Get the dip-switch configurations */ 329 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 330 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 331 332 /* Determine which com port this ESP card services: bits 0,1 of */ 333 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 334 if (sc->sc_iobase != combaselist[dips & 0x03]) 335 return (0); 336 337 printf(": ESP"); 338 339 /* Check ESP Self Test bits. */ 340 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 341 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 342 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 344 if ((val & 0x70) < 0x20) { 345 printf("-old (%o)", val & 0x70); 346 /* we do not support the necessary features */ 347 return (0); 348 } 349 350 /* Check for ability to emulate 16550: bit 8 == 1 */ 351 if ((dips & 0x80) == 0) { 352 printf(" slave"); 353 /* XXX Does slave really mean no 16550 support?? */ 354 return (0); 355 } 356 357 /* 358 * If we made it this far, we are a full-featured ESP v2.0 (or 359 * better), at the correct com port address. 360 */ 361 362 SET(sc->sc_hwflags, COM_HW_HAYESP); 363 printf(", 1024 byte fifo\n"); 364 return (1); 365 } 366 #endif 367 368 #if defined(DDB) || defined(KGDB) 369 static void 370 com_enable_debugport(sc) 371 struct com_softc *sc; 372 { 373 int s; 374 375 /* Turn on line break interrupt, set carrier. */ 376 s = splserial(); 377 sc->sc_ier = IER_ERXRDY; 378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 379 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 380 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 381 splx(s); 382 } 383 #endif 384 385 void 386 com_attach_subr(sc) 387 struct com_softc *sc; 388 { 389 int iobase = sc->sc_iobase; 390 bus_space_tag_t iot = sc->sc_iot; 391 bus_space_handle_t ioh = sc->sc_ioh; 392 struct tty *tp; 393 #ifdef COM16650 394 u_int8_t lcr; 395 #endif 396 #ifdef COM_HAYESP 397 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 398 int *hayespp; 399 #endif 400 401 /* Disable interrupts before configuring the device. */ 402 sc->sc_ier = 0; 403 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 404 405 if (iot == comconstag && iobase == comconsaddr) { 406 comconsattached = 1; 407 408 /* Make sure the console is always "hardwired". */ 409 delay(1000); /* wait for output to finish */ 410 SET(sc->sc_hwflags, COM_HW_CONSOLE); 411 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 412 } 413 414 #ifdef COM_HAYESP 415 /* Look for a Hayes ESP board. */ 416 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 417 bus_space_handle_t hayespioh; 418 419 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 420 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 421 continue; 422 if (comprobeHAYESP(hayespioh, sc)) { 423 sc->sc_hayespioh = hayespioh; 424 sc->sc_fifolen = 1024; 425 426 break; 427 } 428 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 429 } 430 /* No ESP; look for other things. */ 431 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 432 #endif 433 sc->sc_fifolen = 1; 434 /* look for a NS 16550AF UART with FIFOs */ 435 bus_space_write_1(iot, ioh, com_fifo, 436 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 437 delay(100); 438 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 439 == IIR_FIFO_MASK) 440 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 441 == FIFO_TRIGGER_14) { 442 SET(sc->sc_hwflags, COM_HW_FIFO); 443 444 #ifdef COM16650 445 /* 446 * IIR changes into the EFR if LCR is set to LCR_EERS 447 * on 16650s. We also know IIR != 0 at this point. 448 * Write 0 into the EFR, and read it. If the result 449 * is 0, we have a 16650. 450 * 451 * Older 16650s were broken; the test to detect them 452 * is taken from the Linux driver. Apparently 453 * setting DLAB enable gives access to the EFR on 454 * these chips. 455 */ 456 lcr = bus_space_read_1(iot, ioh, com_lcr); 457 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 458 bus_space_write_1(iot, ioh, com_efr, 0); 459 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 460 bus_space_write_1(iot, ioh, com_lcr, 461 lcr | LCR_DLAB); 462 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 463 CLR(sc->sc_hwflags, COM_HW_FIFO); 464 sc->sc_fifolen = 0; 465 } else { 466 SET(sc->sc_hwflags, COM_HW_FLOW); 467 sc->sc_fifolen = 32; 468 } 469 } else 470 #endif 471 sc->sc_fifolen = 16; 472 473 #ifdef COM16650 474 bus_space_write_1(iot, ioh, com_lcr, lcr); 475 if (sc->sc_fifolen == 0) 476 printf(": st16650, broken fifo\n"); 477 else if (sc->sc_fifolen == 32) 478 printf(": st16650a, working fifo\n"); 479 else 480 #endif 481 printf(": ns16550a, working fifo\n"); 482 } else 483 printf(": ns16550, broken fifo\n"); 484 else 485 printf(": ns8250 or ns16450, no fifo\n"); 486 bus_space_write_1(iot, ioh, com_fifo, 0); 487 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 488 sc->sc_fifolen = 1; 489 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 490 } 491 #ifdef COM_HAYESP 492 } 493 #endif 494 495 tp = ttymalloc(); 496 tp->t_oproc = comstart; 497 tp->t_param = comparam; 498 tp->t_hwiflow = comhwiflow; 499 500 sc->sc_tty = tp; 501 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 502 if (sc->sc_rbuf == NULL) { 503 printf("%s: unable to allocate ring buffer\n", 504 sc->sc_dev.dv_xname); 505 return; 506 } 507 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 508 509 tty_attach(tp); 510 511 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 512 SET(sc->sc_mcr, MCR_IENABLE); 513 514 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 515 int maj; 516 517 /* locate the major number */ 518 for (maj = 0; maj < nchrdev; maj++) 519 if (cdevsw[maj].d_open == comopen) 520 break; 521 522 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 523 524 printf("%s: console\n", sc->sc_dev.dv_xname); 525 } 526 527 #ifdef KGDB 528 /* 529 * Allow kgdb to "take over" this port. If this is 530 * the kgdb device, it has exclusive use. 531 */ 532 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 533 com_kgdb_attached = 1; 534 535 SET(sc->sc_hwflags, COM_HW_KGDB); 536 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 537 } 538 #endif 539 540 #ifdef __GENERIC_SOFT_INTERRUPTS 541 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 542 #endif 543 544 #if NRND > 0 && defined(RND_COM) 545 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 546 RND_TYPE_TTY, 0); 547 #endif 548 549 /* if there are no enable/disable functions, assume the device 550 is always enabled */ 551 if (!sc->enable) 552 sc->enabled = 1; 553 554 com_config(sc); 555 556 SET(sc->sc_hwflags, COM_HW_DEV_OK); 557 } 558 559 void 560 com_config(sc) 561 struct com_softc *sc; 562 { 563 bus_space_tag_t iot = sc->sc_iot; 564 bus_space_handle_t ioh = sc->sc_ioh; 565 566 /* Disable interrupts before configuring the device. */ 567 sc->sc_ier = 0; 568 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 569 570 #ifdef COM_HAYESP 571 /* Look for a Hayes ESP board. */ 572 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 573 sc->sc_fifolen = 1024; 574 575 /* Set 16550 compatibility mode */ 576 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 577 HAYESP_SETMODE); 578 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 579 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 580 HAYESP_MODE_SCALE); 581 582 /* Set RTS/CTS flow control */ 583 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 584 HAYESP_SETFLOWTYPE); 585 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_FLOW_RTS); 587 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_FLOW_CTS); 589 590 /* Set flow control levels */ 591 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 592 HAYESP_SETRXFLOW); 593 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 594 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 595 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 596 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 597 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 598 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 599 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 600 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 601 } 602 #endif 603 604 #ifdef DDB 605 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 606 com_enable_debugport(sc); 607 #endif 608 609 #ifdef KGDB 610 /* 611 * Allow kgdb to "take over" this port. If this is 612 * the kgdb device, it has exclusive use. 613 */ 614 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 615 com_enable_debugport(sc); 616 #endif 617 } 618 619 int 620 com_detach(self, flags) 621 struct device *self; 622 int flags; 623 { 624 struct com_softc *sc = (struct com_softc *)self; 625 int maj, mn; 626 627 /* locate the major number */ 628 for (maj = 0; maj < nchrdev; maj++) 629 if (cdevsw[maj].d_open == comopen) 630 break; 631 632 /* Nuke the vnodes for any open instances. */ 633 mn = self->dv_unit; 634 vdevgone(maj, mn, mn, VCHR); 635 636 mn |= COMDIALOUT_MASK; 637 vdevgone(maj, mn, mn, VCHR); 638 639 /* Free the receive buffer. */ 640 free(sc->sc_rbuf, M_DEVBUF); 641 642 /* Detach and free the tty. */ 643 tty_detach(sc->sc_tty); 644 ttyfree(sc->sc_tty); 645 646 #ifdef __GENERIC_SOFT_INTERRUPTS 647 /* Unhook the soft interrupt handler. */ 648 softintr_disestablish(sc->sc_si); 649 #endif 650 651 #if NRND > 0 && defined(RND_COM) 652 /* Unhook the entropy source. */ 653 rnd_detach_source(&sc->rnd_source); 654 #endif 655 656 return (0); 657 } 658 659 int 660 com_activate(self, act) 661 struct device *self; 662 enum devact act; 663 { 664 struct com_softc *sc = (struct com_softc *)self; 665 int s, rv = 0; 666 667 s = splserial(); 668 switch (act) { 669 case DVACT_ACTIVATE: 670 rv = EOPNOTSUPP; 671 break; 672 673 case DVACT_DEACTIVATE: 674 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 675 rv = EBUSY; 676 break; 677 } 678 679 if (sc->disable != NULL && sc->enabled != 0) { 680 (*sc->disable)(sc); 681 sc->enabled = 0; 682 } 683 break; 684 } 685 splx(s); 686 return (rv); 687 } 688 689 void 690 com_shutdown(sc) 691 struct com_softc *sc; 692 { 693 struct tty *tp = sc->sc_tty; 694 int s; 695 696 s = splserial(); 697 698 /* If we were asserting flow control, then deassert it. */ 699 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 700 com_hwiflow(sc); 701 702 /* Clear any break condition set with TIOCSBRK. */ 703 com_break(sc, 0); 704 705 /* Turn off PPS capture on last close. */ 706 sc->sc_ppsmask = 0; 707 sc->ppsparam.mode = 0; 708 709 /* 710 * Hang up if necessary. Wait a bit, so the other side has time to 711 * notice even if we immediately open the port again. 712 */ 713 if (ISSET(tp->t_cflag, HUPCL)) { 714 com_modem(sc, 0); 715 (void) tsleep(sc, TTIPRI, ttclos, hz); 716 } 717 718 /* Turn off interrupts. */ 719 #ifdef DDB 720 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 721 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 722 else 723 #endif 724 sc->sc_ier = 0; 725 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 726 727 if (sc->disable) { 728 #ifdef DIAGNOSTIC 729 if (!sc->enabled) 730 panic("com_shutdown: not enabled?"); 731 #endif 732 (*sc->disable)(sc); 733 sc->enabled = 0; 734 } 735 736 splx(s); 737 } 738 739 int 740 comopen(dev, flag, mode, p) 741 dev_t dev; 742 int flag, mode; 743 struct proc *p; 744 { 745 int unit = COMUNIT(dev); 746 struct com_softc *sc; 747 struct tty *tp; 748 int s, s2; 749 int error; 750 751 if (unit >= com_cd.cd_ndevs) 752 return (ENXIO); 753 sc = com_cd.cd_devs[unit]; 754 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 755 sc->sc_rbuf == NULL) 756 return (ENXIO); 757 758 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 759 return (ENXIO); 760 761 #ifdef KGDB 762 /* 763 * If this is the kgdb port, no other use is permitted. 764 */ 765 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 766 return (EBUSY); 767 #endif 768 769 tp = sc->sc_tty; 770 771 if (ISSET(tp->t_state, TS_ISOPEN) && 772 ISSET(tp->t_state, TS_XCLUDE) && 773 p->p_ucred->cr_uid != 0) 774 return (EBUSY); 775 776 s = spltty(); 777 778 /* 779 * Do the following iff this is a first open. 780 */ 781 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 782 struct termios t; 783 784 tp->t_dev = dev; 785 786 s2 = splserial(); 787 788 if (sc->enable) { 789 if ((*sc->enable)(sc)) { 790 splx(s2); 791 splx(s); 792 printf("%s: device enable failed\n", 793 sc->sc_dev.dv_xname); 794 return (EIO); 795 } 796 sc->enabled = 1; 797 com_config(sc); 798 } 799 800 /* Turn on interrupts. */ 801 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 802 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 803 804 /* Fetch the current modem control status, needed later. */ 805 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 806 807 /* Clear PPS capture state on first open. */ 808 sc->sc_ppsmask = 0; 809 sc->ppsparam.mode = 0; 810 811 splx(s2); 812 813 /* 814 * Initialize the termios status to the defaults. Add in the 815 * sticky bits from TIOCSFLAGS. 816 */ 817 t.c_ispeed = 0; 818 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 819 t.c_ospeed = comconsrate; 820 t.c_cflag = comconscflag; 821 } else { 822 t.c_ospeed = TTYDEF_SPEED; 823 t.c_cflag = TTYDEF_CFLAG; 824 } 825 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 826 SET(t.c_cflag, CLOCAL); 827 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 828 SET(t.c_cflag, CRTSCTS); 829 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 830 SET(t.c_cflag, MDMBUF); 831 /* Make sure comparam() will do something. */ 832 tp->t_ospeed = 0; 833 (void) comparam(tp, &t); 834 tp->t_iflag = TTYDEF_IFLAG; 835 tp->t_oflag = TTYDEF_OFLAG; 836 tp->t_lflag = TTYDEF_LFLAG; 837 ttychars(tp); 838 ttsetwater(tp); 839 840 s2 = splserial(); 841 842 /* 843 * Turn on DTR. We must always do this, even if carrier is not 844 * present, because otherwise we'd have to use TIOCSDTR 845 * immediately after setting CLOCAL, which applications do not 846 * expect. We always assert DTR while the device is open 847 * unless explicitly requested to deassert it. 848 */ 849 com_modem(sc, 1); 850 851 /* Clear the input ring, and unblock. */ 852 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 853 sc->sc_rbavail = com_rbuf_size; 854 com_iflush(sc); 855 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 856 com_hwiflow(sc); 857 858 #ifdef COM_DEBUG 859 if (com_debug) 860 comstatus(sc, "comopen "); 861 #endif 862 863 splx(s2); 864 } 865 866 splx(s); 867 868 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 869 if (error) 870 goto bad; 871 872 error = (*linesw[tp->t_line].l_open)(dev, tp); 873 if (error) 874 goto bad; 875 876 return (0); 877 878 bad: 879 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 880 /* 881 * We failed to open the device, and nobody else had it opened. 882 * Clean up the state as appropriate. 883 */ 884 com_shutdown(sc); 885 } 886 887 return (error); 888 } 889 890 int 891 comclose(dev, flag, mode, p) 892 dev_t dev; 893 int flag, mode; 894 struct proc *p; 895 { 896 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 897 struct tty *tp = sc->sc_tty; 898 899 /* XXX This is for cons.c. */ 900 if (!ISSET(tp->t_state, TS_ISOPEN)) 901 return (0); 902 903 (*linesw[tp->t_line].l_close)(tp, flag); 904 ttyclose(tp); 905 906 if (COM_ISALIVE(sc) == 0) 907 return (0); 908 909 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 910 /* 911 * Although we got a last close, the device may still be in 912 * use; e.g. if this was the dialout node, and there are still 913 * processes waiting for carrier on the non-dialout node. 914 */ 915 com_shutdown(sc); 916 } 917 918 return (0); 919 } 920 921 int 922 comread(dev, uio, flag) 923 dev_t dev; 924 struct uio *uio; 925 int flag; 926 { 927 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 928 struct tty *tp = sc->sc_tty; 929 930 if (COM_ISALIVE(sc) == 0) 931 return (EIO); 932 933 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 934 } 935 936 int 937 comwrite(dev, uio, flag) 938 dev_t dev; 939 struct uio *uio; 940 int flag; 941 { 942 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 943 struct tty *tp = sc->sc_tty; 944 945 if (COM_ISALIVE(sc) == 0) 946 return (EIO); 947 948 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 949 } 950 951 struct tty * 952 comtty(dev) 953 dev_t dev; 954 { 955 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 956 struct tty *tp = sc->sc_tty; 957 958 return (tp); 959 } 960 961 int 962 comioctl(dev, cmd, data, flag, p) 963 dev_t dev; 964 u_long cmd; 965 caddr_t data; 966 int flag; 967 struct proc *p; 968 { 969 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 970 struct tty *tp = sc->sc_tty; 971 int error; 972 int s; 973 974 if (COM_ISALIVE(sc) == 0) 975 return (EIO); 976 977 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 978 if (error >= 0) 979 return (error); 980 981 error = ttioctl(tp, cmd, data, flag, p); 982 if (error >= 0) 983 return (error); 984 985 error = 0; 986 987 s = splserial(); 988 989 switch (cmd) { 990 case TIOCSBRK: 991 com_break(sc, 1); 992 break; 993 994 case TIOCCBRK: 995 com_break(sc, 0); 996 break; 997 998 case TIOCSDTR: 999 com_modem(sc, 1); 1000 break; 1001 1002 case TIOCCDTR: 1003 com_modem(sc, 0); 1004 break; 1005 1006 case TIOCGFLAGS: 1007 *(int *)data = sc->sc_swflags; 1008 break; 1009 1010 case TIOCSFLAGS: 1011 error = suser(p->p_ucred, &p->p_acflag); 1012 if (error) 1013 break; 1014 sc->sc_swflags = *(int *)data; 1015 break; 1016 1017 case TIOCMSET: 1018 case TIOCMBIS: 1019 case TIOCMBIC: 1020 tiocm_to_com(sc, cmd, *(int *)data); 1021 break; 1022 1023 case TIOCMGET: 1024 *(int *)data = com_to_tiocm(sc); 1025 break; 1026 1027 case PPS_IOC_CREATE: 1028 break; 1029 1030 case PPS_IOC_DESTROY: 1031 break; 1032 1033 case PPS_IOC_GETPARAMS: { 1034 pps_params_t *pp; 1035 pp = (pps_params_t *)data; 1036 *pp = sc->ppsparam; 1037 break; 1038 } 1039 1040 case PPS_IOC_SETPARAMS: { 1041 pps_params_t *pp; 1042 int mode; 1043 pp = (pps_params_t *)data; 1044 if (pp->mode & ~ppscap) { 1045 error = EINVAL; 1046 break; 1047 } 1048 sc->ppsparam = *pp; 1049 /* 1050 * Compute msr masks from user-specified timestamp state. 1051 */ 1052 mode = sc->ppsparam.mode; 1053 #ifdef PPS_SYNC 1054 if (mode & PPS_HARDPPSONASSERT) { 1055 mode |= PPS_CAPTUREASSERT; 1056 /* XXX revoke any previous HARDPPS source */ 1057 } 1058 if (mode & PPS_HARDPPSONCLEAR) { 1059 mode |= PPS_CAPTURECLEAR; 1060 /* XXX revoke any previous HARDPPS source */ 1061 } 1062 #endif /* PPS_SYNC */ 1063 switch (mode & PPS_CAPTUREBOTH) { 1064 case 0: 1065 sc->sc_ppsmask = 0; 1066 break; 1067 1068 case PPS_CAPTUREASSERT: 1069 sc->sc_ppsmask = MSR_DCD; 1070 sc->sc_ppsassert = MSR_DCD; 1071 sc->sc_ppsclear = -1; 1072 break; 1073 1074 case PPS_CAPTURECLEAR: 1075 sc->sc_ppsmask = MSR_DCD; 1076 sc->sc_ppsassert = -1; 1077 sc->sc_ppsclear = 0; 1078 break; 1079 1080 case PPS_CAPTUREBOTH: 1081 sc->sc_ppsmask = MSR_DCD; 1082 sc->sc_ppsassert = MSR_DCD; 1083 sc->sc_ppsclear = 0; 1084 break; 1085 1086 default: 1087 error = EINVAL; 1088 break; 1089 } 1090 break; 1091 } 1092 1093 case PPS_IOC_GETCAP: 1094 *(int*)data = ppscap; 1095 break; 1096 1097 case PPS_IOC_FETCH: { 1098 pps_info_t *pi; 1099 pi = (pps_info_t *)data; 1100 *pi = sc->ppsinfo; 1101 break; 1102 } 1103 1104 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1105 /* 1106 * Some GPS clocks models use the falling rather than 1107 * rising edge as the on-the-second signal. 1108 * The old API has no way to specify PPS polarity. 1109 */ 1110 sc->sc_ppsmask = MSR_DCD; 1111 #ifndef PPS_TRAILING_EDGE 1112 sc->sc_ppsassert = MSR_DCD; 1113 sc->sc_ppsclear = -1; 1114 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1115 &sc->ppsinfo.assert_timestamp); 1116 #else 1117 sc->sc_ppsassert = -1 1118 sc->sc_ppsclear = 0; 1119 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1120 &sc->ppsinfo.clear_timestamp); 1121 #endif 1122 break; 1123 1124 default: 1125 error = ENOTTY; 1126 break; 1127 } 1128 1129 splx(s); 1130 1131 #ifdef COM_DEBUG 1132 if (com_debug) 1133 comstatus(sc, "comioctl "); 1134 #endif 1135 1136 return (error); 1137 } 1138 1139 integrate void 1140 com_schedrx(sc) 1141 struct com_softc *sc; 1142 { 1143 1144 sc->sc_rx_ready = 1; 1145 1146 /* Wake up the poller. */ 1147 #ifdef __GENERIC_SOFT_INTERRUPTS 1148 softintr_schedule(sc->sc_si); 1149 #else 1150 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1151 setsoftserial(); 1152 #else 1153 if (!com_softintr_scheduled) { 1154 com_softintr_scheduled = 1; 1155 timeout(comsoft, NULL, 1); 1156 } 1157 #endif 1158 #endif 1159 } 1160 1161 void 1162 com_break(sc, onoff) 1163 struct com_softc *sc; 1164 int onoff; 1165 { 1166 1167 if (onoff) 1168 SET(sc->sc_lcr, LCR_SBREAK); 1169 else 1170 CLR(sc->sc_lcr, LCR_SBREAK); 1171 1172 if (!sc->sc_heldchange) { 1173 if (sc->sc_tx_busy) { 1174 sc->sc_heldtbc = sc->sc_tbc; 1175 sc->sc_tbc = 0; 1176 sc->sc_heldchange = 1; 1177 } else 1178 com_loadchannelregs(sc); 1179 } 1180 } 1181 1182 void 1183 com_modem(sc, onoff) 1184 struct com_softc *sc; 1185 int onoff; 1186 { 1187 1188 if (sc->sc_mcr_dtr == 0) 1189 return; 1190 1191 if (onoff) 1192 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1193 else 1194 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1195 1196 if (!sc->sc_heldchange) { 1197 if (sc->sc_tx_busy) { 1198 sc->sc_heldtbc = sc->sc_tbc; 1199 sc->sc_tbc = 0; 1200 sc->sc_heldchange = 1; 1201 } else 1202 com_loadchannelregs(sc); 1203 } 1204 } 1205 1206 void 1207 tiocm_to_com(sc, how, ttybits) 1208 struct com_softc *sc; 1209 int how, ttybits; 1210 { 1211 u_char combits; 1212 1213 combits = 0; 1214 if (ISSET(ttybits, TIOCM_DTR)) 1215 SET(combits, MCR_DTR); 1216 if (ISSET(ttybits, TIOCM_RTS)) 1217 SET(combits, MCR_RTS); 1218 1219 switch (how) { 1220 case TIOCMBIC: 1221 CLR(sc->sc_mcr, combits); 1222 break; 1223 1224 case TIOCMBIS: 1225 SET(sc->sc_mcr, combits); 1226 break; 1227 1228 case TIOCMSET: 1229 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1230 SET(sc->sc_mcr, combits); 1231 break; 1232 } 1233 1234 if (!sc->sc_heldchange) { 1235 if (sc->sc_tx_busy) { 1236 sc->sc_heldtbc = sc->sc_tbc; 1237 sc->sc_tbc = 0; 1238 sc->sc_heldchange = 1; 1239 } else 1240 com_loadchannelregs(sc); 1241 } 1242 } 1243 1244 int 1245 com_to_tiocm(sc) 1246 struct com_softc *sc; 1247 { 1248 u_char combits; 1249 int ttybits = 0; 1250 1251 combits = sc->sc_mcr; 1252 if (ISSET(combits, MCR_DTR)) 1253 SET(ttybits, TIOCM_DTR); 1254 if (ISSET(combits, MCR_RTS)) 1255 SET(ttybits, TIOCM_RTS); 1256 1257 combits = sc->sc_msr; 1258 if (ISSET(combits, MSR_DCD)) 1259 SET(ttybits, TIOCM_CD); 1260 if (ISSET(combits, MSR_CTS)) 1261 SET(ttybits, TIOCM_CTS); 1262 if (ISSET(combits, MSR_DSR)) 1263 SET(ttybits, TIOCM_DSR); 1264 if (ISSET(combits, MSR_RI | MSR_TERI)) 1265 SET(ttybits, TIOCM_RI); 1266 1267 if (sc->sc_ier != 0) 1268 SET(ttybits, TIOCM_LE); 1269 1270 return (ttybits); 1271 } 1272 1273 static u_char 1274 cflag2lcr(cflag) 1275 tcflag_t cflag; 1276 { 1277 u_char lcr = 0; 1278 1279 switch (ISSET(cflag, CSIZE)) { 1280 case CS5: 1281 SET(lcr, LCR_5BITS); 1282 break; 1283 case CS6: 1284 SET(lcr, LCR_6BITS); 1285 break; 1286 case CS7: 1287 SET(lcr, LCR_7BITS); 1288 break; 1289 case CS8: 1290 SET(lcr, LCR_8BITS); 1291 break; 1292 } 1293 if (ISSET(cflag, PARENB)) { 1294 SET(lcr, LCR_PENAB); 1295 if (!ISSET(cflag, PARODD)) 1296 SET(lcr, LCR_PEVEN); 1297 } 1298 if (ISSET(cflag, CSTOPB)) 1299 SET(lcr, LCR_STOPB); 1300 1301 return (lcr); 1302 } 1303 1304 int 1305 comparam(tp, t) 1306 struct tty *tp; 1307 struct termios *t; 1308 { 1309 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1310 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1311 u_char lcr; 1312 int s; 1313 1314 if (COM_ISALIVE(sc) == 0) 1315 return (EIO); 1316 1317 /* Check requested parameters. */ 1318 if (ospeed < 0) 1319 return (EINVAL); 1320 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1321 return (EINVAL); 1322 1323 /* 1324 * For the console, always force CLOCAL and !HUPCL, so that the port 1325 * is always active. 1326 */ 1327 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1328 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1329 SET(t->c_cflag, CLOCAL); 1330 CLR(t->c_cflag, HUPCL); 1331 } 1332 1333 /* 1334 * If there were no changes, don't do anything. This avoids dropping 1335 * input and improves performance when all we did was frob things like 1336 * VMIN and VTIME. 1337 */ 1338 if (tp->t_ospeed == t->c_ospeed && 1339 tp->t_cflag == t->c_cflag) 1340 return (0); 1341 1342 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1343 1344 s = splserial(); 1345 1346 sc->sc_lcr = lcr; 1347 1348 /* 1349 * If we're not in a mode that assumes a connection is present, then 1350 * ignore carrier changes. 1351 */ 1352 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1353 sc->sc_msr_dcd = 0; 1354 else 1355 sc->sc_msr_dcd = MSR_DCD; 1356 /* 1357 * Set the flow control pins depending on the current flow control 1358 * mode. 1359 */ 1360 if (ISSET(t->c_cflag, CRTSCTS)) { 1361 sc->sc_mcr_dtr = MCR_DTR; 1362 sc->sc_mcr_rts = MCR_RTS; 1363 sc->sc_msr_cts = MSR_CTS; 1364 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1365 } else if (ISSET(t->c_cflag, MDMBUF)) { 1366 /* 1367 * For DTR/DCD flow control, make sure we don't toggle DTR for 1368 * carrier detection. 1369 */ 1370 sc->sc_mcr_dtr = 0; 1371 sc->sc_mcr_rts = MCR_DTR; 1372 sc->sc_msr_cts = MSR_DCD; 1373 sc->sc_efr = 0; 1374 } else { 1375 /* 1376 * If no flow control, then always set RTS. This will make 1377 * the other side happy if it mistakenly thinks we're doing 1378 * RTS/CTS flow control. 1379 */ 1380 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1381 sc->sc_mcr_rts = 0; 1382 sc->sc_msr_cts = 0; 1383 sc->sc_efr = 0; 1384 if (ISSET(sc->sc_mcr, MCR_DTR)) 1385 SET(sc->sc_mcr, MCR_RTS); 1386 else 1387 CLR(sc->sc_mcr, MCR_RTS); 1388 } 1389 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1390 1391 #if 0 1392 if (ospeed == 0) 1393 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1394 else 1395 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1396 #endif 1397 1398 sc->sc_dlbl = ospeed; 1399 sc->sc_dlbh = ospeed >> 8; 1400 1401 /* 1402 * Set the FIFO threshold based on the receive speed. 1403 * 1404 * * If it's a low speed, it's probably a mouse or some other 1405 * interactive device, so set the threshold low. 1406 * * If it's a high speed, trim the trigger level down to prevent 1407 * overflows. 1408 * * Otherwise set it a bit higher. 1409 */ 1410 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1411 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1412 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1413 sc->sc_fifo = FIFO_ENABLE | 1414 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1415 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1416 else 1417 sc->sc_fifo = 0; 1418 1419 /* And copy to tty. */ 1420 tp->t_ispeed = 0; 1421 tp->t_ospeed = t->c_ospeed; 1422 tp->t_cflag = t->c_cflag; 1423 1424 if (!sc->sc_heldchange) { 1425 if (sc->sc_tx_busy) { 1426 sc->sc_heldtbc = sc->sc_tbc; 1427 sc->sc_tbc = 0; 1428 sc->sc_heldchange = 1; 1429 } else 1430 com_loadchannelregs(sc); 1431 } 1432 1433 if (!ISSET(t->c_cflag, CHWFLOW)) { 1434 /* Disable the high water mark. */ 1435 sc->sc_r_hiwat = 0; 1436 sc->sc_r_lowat = 0; 1437 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1438 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1439 com_schedrx(sc); 1440 } 1441 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1442 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1443 com_hwiflow(sc); 1444 } 1445 } else { 1446 sc->sc_r_hiwat = com_rbuf_hiwat; 1447 sc->sc_r_lowat = com_rbuf_lowat; 1448 } 1449 1450 splx(s); 1451 1452 /* 1453 * Update the tty layer's idea of the carrier bit, in case we changed 1454 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1455 * explicit request. 1456 */ 1457 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1458 1459 #ifdef COM_DEBUG 1460 if (com_debug) 1461 comstatus(sc, "comparam "); 1462 #endif 1463 1464 if (!ISSET(t->c_cflag, CHWFLOW)) { 1465 if (sc->sc_tx_stopped) { 1466 sc->sc_tx_stopped = 0; 1467 comstart(tp); 1468 } 1469 } 1470 1471 return (0); 1472 } 1473 1474 void 1475 com_iflush(sc) 1476 struct com_softc *sc; 1477 { 1478 bus_space_tag_t iot = sc->sc_iot; 1479 bus_space_handle_t ioh = sc->sc_ioh; 1480 #ifdef DIAGNOSTIC 1481 int reg; 1482 #endif 1483 int timo; 1484 1485 #ifdef DIAGNOSTIC 1486 reg = 0xffff; 1487 #endif 1488 timo = 50000; 1489 /* flush any pending I/O */ 1490 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1491 && --timo) 1492 #ifdef DIAGNOSTIC 1493 reg = 1494 #else 1495 (void) 1496 #endif 1497 bus_space_read_1(iot, ioh, com_data); 1498 #ifdef DIAGNOSTIC 1499 if (!timo) 1500 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1501 reg); 1502 #endif 1503 } 1504 1505 void 1506 com_loadchannelregs(sc) 1507 struct com_softc *sc; 1508 { 1509 bus_space_tag_t iot = sc->sc_iot; 1510 bus_space_handle_t ioh = sc->sc_ioh; 1511 1512 /* XXXXX necessary? */ 1513 com_iflush(sc); 1514 1515 bus_space_write_1(iot, ioh, com_ier, 0); 1516 1517 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1518 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1519 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1520 } 1521 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1522 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1523 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1524 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1525 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1526 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1527 1528 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1529 } 1530 1531 int 1532 comhwiflow(tp, block) 1533 struct tty *tp; 1534 int block; 1535 { 1536 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1537 int s; 1538 1539 if (COM_ISALIVE(sc) == 0) 1540 return (0); 1541 1542 if (sc->sc_mcr_rts == 0) 1543 return (0); 1544 1545 s = splserial(); 1546 if (block) { 1547 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1548 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1549 com_hwiflow(sc); 1550 } 1551 } else { 1552 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1553 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1554 com_schedrx(sc); 1555 } 1556 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1557 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1558 com_hwiflow(sc); 1559 } 1560 } 1561 splx(s); 1562 return (1); 1563 } 1564 1565 /* 1566 * (un)block input via hw flowcontrol 1567 */ 1568 void 1569 com_hwiflow(sc) 1570 struct com_softc *sc; 1571 { 1572 bus_space_tag_t iot = sc->sc_iot; 1573 bus_space_handle_t ioh = sc->sc_ioh; 1574 1575 if (sc->sc_mcr_rts == 0) 1576 return; 1577 1578 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1579 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1580 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1581 } else { 1582 SET(sc->sc_mcr, sc->sc_mcr_rts); 1583 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1584 } 1585 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1586 } 1587 1588 1589 void 1590 comstart(tp) 1591 struct tty *tp; 1592 { 1593 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1594 bus_space_tag_t iot = sc->sc_iot; 1595 bus_space_handle_t ioh = sc->sc_ioh; 1596 int s; 1597 1598 if (COM_ISALIVE(sc) == 0) 1599 return; 1600 1601 s = spltty(); 1602 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1603 goto out; 1604 if (sc->sc_tx_stopped) 1605 goto out; 1606 1607 if (tp->t_outq.c_cc <= tp->t_lowat) { 1608 if (ISSET(tp->t_state, TS_ASLEEP)) { 1609 CLR(tp->t_state, TS_ASLEEP); 1610 wakeup(&tp->t_outq); 1611 } 1612 selwakeup(&tp->t_wsel); 1613 if (tp->t_outq.c_cc == 0) 1614 goto out; 1615 } 1616 1617 /* Grab the first contiguous region of buffer space. */ 1618 { 1619 u_char *tba; 1620 int tbc; 1621 1622 tba = tp->t_outq.c_cf; 1623 tbc = ndqb(&tp->t_outq, 0); 1624 1625 (void)splserial(); 1626 1627 sc->sc_tba = tba; 1628 sc->sc_tbc = tbc; 1629 } 1630 1631 SET(tp->t_state, TS_BUSY); 1632 sc->sc_tx_busy = 1; 1633 1634 /* Enable transmit completion interrupts if necessary. */ 1635 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1636 SET(sc->sc_ier, IER_ETXRDY); 1637 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1638 } 1639 1640 /* Output the first chunk of the contiguous buffer. */ 1641 { 1642 int n; 1643 1644 n = sc->sc_tbc; 1645 if (n > sc->sc_fifolen) 1646 n = sc->sc_fifolen; 1647 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1648 sc->sc_tbc -= n; 1649 sc->sc_tba += n; 1650 } 1651 out: 1652 splx(s); 1653 return; 1654 } 1655 1656 /* 1657 * Stop output on a line. 1658 */ 1659 void 1660 comstop(tp, flag) 1661 struct tty *tp; 1662 int flag; 1663 { 1664 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1665 int s; 1666 1667 s = splserial(); 1668 if (ISSET(tp->t_state, TS_BUSY)) { 1669 /* Stop transmitting at the next chunk. */ 1670 sc->sc_tbc = 0; 1671 sc->sc_heldtbc = 0; 1672 if (!ISSET(tp->t_state, TS_TTSTOP)) 1673 SET(tp->t_state, TS_FLUSH); 1674 } 1675 splx(s); 1676 } 1677 1678 void 1679 comdiag(arg) 1680 void *arg; 1681 { 1682 struct com_softc *sc = arg; 1683 int overflows, floods; 1684 int s; 1685 1686 s = splserial(); 1687 overflows = sc->sc_overflows; 1688 sc->sc_overflows = 0; 1689 floods = sc->sc_floods; 1690 sc->sc_floods = 0; 1691 sc->sc_errors = 0; 1692 splx(s); 1693 1694 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1695 sc->sc_dev.dv_xname, 1696 overflows, overflows == 1 ? "" : "s", 1697 floods, floods == 1 ? "" : "s"); 1698 } 1699 1700 integrate void 1701 com_rxsoft(sc, tp) 1702 struct com_softc *sc; 1703 struct tty *tp; 1704 { 1705 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1706 u_char *get, *end; 1707 u_int cc, scc; 1708 u_char lsr; 1709 int code; 1710 int s; 1711 1712 end = sc->sc_ebuf; 1713 get = sc->sc_rbget; 1714 scc = cc = com_rbuf_size - sc->sc_rbavail; 1715 1716 if (cc == com_rbuf_size) { 1717 sc->sc_floods++; 1718 if (sc->sc_errors++ == 0) 1719 timeout(comdiag, sc, 60 * hz); 1720 } 1721 1722 while (cc) { 1723 code = get[0]; 1724 lsr = get[1]; 1725 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1726 if (ISSET(lsr, LSR_OE)) { 1727 sc->sc_overflows++; 1728 if (sc->sc_errors++ == 0) 1729 timeout(comdiag, sc, 60 * hz); 1730 } 1731 if (ISSET(lsr, LSR_BI | LSR_FE)) 1732 SET(code, TTY_FE); 1733 if (ISSET(lsr, LSR_PE)) 1734 SET(code, TTY_PE); 1735 } 1736 if ((*rint)(code, tp) == -1) { 1737 /* 1738 * The line discipline's buffer is out of space. 1739 */ 1740 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1741 /* 1742 * We're either not using flow control, or the 1743 * line discipline didn't tell us to block for 1744 * some reason. Either way, we have no way to 1745 * know when there's more space available, so 1746 * just drop the rest of the data. 1747 */ 1748 get += cc << 1; 1749 if (get >= end) 1750 get -= com_rbuf_size << 1; 1751 cc = 0; 1752 } else { 1753 /* 1754 * Don't schedule any more receive processing 1755 * until the line discipline tells us there's 1756 * space available (through comhwiflow()). 1757 * Leave the rest of the data in the input 1758 * buffer. 1759 */ 1760 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1761 } 1762 break; 1763 } 1764 get += 2; 1765 if (get >= end) 1766 get = sc->sc_rbuf; 1767 cc--; 1768 } 1769 1770 if (cc != scc) { 1771 sc->sc_rbget = get; 1772 s = splserial(); 1773 cc = sc->sc_rbavail += scc - cc; 1774 /* Buffers should be ok again, release possible block. */ 1775 if (cc >= sc->sc_r_lowat) { 1776 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1777 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1778 SET(sc->sc_ier, IER_ERXRDY); 1779 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1780 } 1781 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1782 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1783 com_hwiflow(sc); 1784 } 1785 } 1786 splx(s); 1787 } 1788 } 1789 1790 integrate void 1791 com_txsoft(sc, tp) 1792 struct com_softc *sc; 1793 struct tty *tp; 1794 { 1795 1796 CLR(tp->t_state, TS_BUSY); 1797 if (ISSET(tp->t_state, TS_FLUSH)) 1798 CLR(tp->t_state, TS_FLUSH); 1799 else 1800 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1801 (*linesw[tp->t_line].l_start)(tp); 1802 } 1803 1804 integrate void 1805 com_stsoft(sc, tp) 1806 struct com_softc *sc; 1807 struct tty *tp; 1808 { 1809 u_char msr, delta; 1810 int s; 1811 1812 s = splserial(); 1813 msr = sc->sc_msr; 1814 delta = sc->sc_msr_delta; 1815 sc->sc_msr_delta = 0; 1816 splx(s); 1817 1818 if (ISSET(delta, sc->sc_msr_dcd)) { 1819 /* 1820 * Inform the tty layer that carrier detect changed. 1821 */ 1822 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1823 } 1824 1825 if (ISSET(delta, sc->sc_msr_cts)) { 1826 /* Block or unblock output according to flow control. */ 1827 if (ISSET(msr, sc->sc_msr_cts)) { 1828 sc->sc_tx_stopped = 0; 1829 (*linesw[tp->t_line].l_start)(tp); 1830 } else { 1831 sc->sc_tx_stopped = 1; 1832 } 1833 } 1834 1835 #ifdef COM_DEBUG 1836 if (com_debug) 1837 comstatus(sc, "com_stsoft"); 1838 #endif 1839 } 1840 1841 #ifdef __GENERIC_SOFT_INTERRUPTS 1842 void 1843 comsoft(arg) 1844 void *arg; 1845 { 1846 struct com_softc *sc = arg; 1847 struct tty *tp; 1848 1849 if (COM_ISALIVE(sc) == 0) 1850 return; 1851 1852 { 1853 #else 1854 void 1855 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1856 comsoft() 1857 #else 1858 comsoft(arg) 1859 void *arg; 1860 #endif 1861 { 1862 struct com_softc *sc; 1863 struct tty *tp; 1864 int unit; 1865 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1866 int s; 1867 1868 s = splsoftserial(); 1869 com_softintr_scheduled = 0; 1870 #endif 1871 1872 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1873 sc = com_cd.cd_devs[unit]; 1874 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1875 continue; 1876 1877 if (COM_ISALIVE(sc) == 0) 1878 continue; 1879 1880 tp = sc->sc_tty; 1881 if (tp == NULL) 1882 continue; 1883 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1884 continue; 1885 #endif 1886 tp = sc->sc_tty; 1887 1888 if (sc->sc_rx_ready) { 1889 sc->sc_rx_ready = 0; 1890 com_rxsoft(sc, tp); 1891 } 1892 1893 if (sc->sc_st_check) { 1894 sc->sc_st_check = 0; 1895 com_stsoft(sc, tp); 1896 } 1897 1898 if (sc->sc_tx_done) { 1899 sc->sc_tx_done = 0; 1900 com_txsoft(sc, tp); 1901 } 1902 } 1903 1904 #ifndef __GENERIC_SOFT_INTERRUPTS 1905 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1906 splx(s); 1907 #endif 1908 #endif 1909 } 1910 1911 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1912 /* there has got to be a better way to do comsoft() */ 1913 }} 1914 #endif 1915 1916 int 1917 comintr(arg) 1918 void *arg; 1919 { 1920 struct com_softc *sc = arg; 1921 bus_space_tag_t iot = sc->sc_iot; 1922 bus_space_handle_t ioh = sc->sc_ioh; 1923 u_char *put, *end; 1924 u_int cc; 1925 u_char lsr, iir; 1926 1927 if (COM_ISALIVE(sc) == 0) 1928 return (0); 1929 1930 iir = bus_space_read_1(iot, ioh, com_iir); 1931 if (ISSET(iir, IIR_NOPEND)) 1932 return (0); 1933 1934 end = sc->sc_ebuf; 1935 put = sc->sc_rbput; 1936 cc = sc->sc_rbavail; 1937 1938 do { 1939 u_char msr, delta; 1940 1941 lsr = bus_space_read_1(iot, ioh, com_lsr); 1942 #if defined(DDB) || defined(KGDB) 1943 if (ISSET(lsr, LSR_BI)) { 1944 #ifdef DDB 1945 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1946 console_debugger(); 1947 continue; 1948 } 1949 #endif 1950 #ifdef KGDB 1951 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1952 kgdb_connect(1); 1953 continue; 1954 } 1955 #endif 1956 } 1957 #endif /* DDB || KGDB */ 1958 1959 if (ISSET(lsr, LSR_RCV_MASK) && 1960 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1961 while (cc > 0) { 1962 put[0] = bus_space_read_1(iot, ioh, com_data); 1963 put[1] = lsr; 1964 put += 2; 1965 if (put >= end) 1966 put = sc->sc_rbuf; 1967 cc--; 1968 1969 lsr = bus_space_read_1(iot, ioh, com_lsr); 1970 if (!ISSET(lsr, LSR_RCV_MASK)) 1971 break; 1972 } 1973 1974 /* 1975 * Current string of incoming characters ended because 1976 * no more data was available or we ran out of space. 1977 * Schedule a receive event if any data was received. 1978 * If we're out of space, turn off receive interrupts. 1979 */ 1980 sc->sc_rbput = put; 1981 sc->sc_rbavail = cc; 1982 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1983 sc->sc_rx_ready = 1; 1984 1985 /* 1986 * See if we are in danger of overflowing a buffer. If 1987 * so, use hardware flow control to ease the pressure. 1988 */ 1989 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1990 cc < sc->sc_r_hiwat) { 1991 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1992 com_hwiflow(sc); 1993 } 1994 1995 /* 1996 * If we're out of space, disable receive interrupts 1997 * until the queue has drained a bit. 1998 */ 1999 if (!cc) { 2000 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2001 CLR(sc->sc_ier, IER_ERXRDY); 2002 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2003 } 2004 } else { 2005 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2006 bus_space_write_1(iot, ioh, com_ier, 0); 2007 delay(10); 2008 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2009 iir = IIR_NOPEND; 2010 continue; 2011 } 2012 } 2013 2014 msr = bus_space_read_1(iot, ioh, com_msr); 2015 delta = msr ^ sc->sc_msr; 2016 sc->sc_msr = msr; 2017 /* 2018 * Pulse-per-second (PSS) signals on edge of DCD? 2019 * Process these even if line discipline is ignoring DCD. 2020 */ 2021 if (delta & sc->sc_ppsmask) { 2022 struct timeval tv; 2023 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2024 /* XXX nanotime() */ 2025 microtime(&tv); 2026 TIMEVAL_TO_TIMESPEC(&tv, 2027 &sc->ppsinfo.assert_timestamp); 2028 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2029 timespecadd(&sc->ppsinfo.assert_timestamp, 2030 &sc->ppsparam.assert_offset, 2031 &sc->ppsinfo.assert_timestamp); 2032 } 2033 2034 #ifdef PPS_SYNC 2035 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2036 hardpps(&tv, tv.tv_usec); 2037 #endif 2038 sc->ppsinfo.assert_sequence++; 2039 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2040 2041 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2042 /* XXX nanotime() */ 2043 microtime(&tv); 2044 TIMEVAL_TO_TIMESPEC(&tv, 2045 &sc->ppsinfo.clear_timestamp); 2046 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2047 timespecadd(&sc->ppsinfo.clear_timestamp, 2048 &sc->ppsparam.clear_offset, 2049 &sc->ppsinfo.clear_timestamp); 2050 } 2051 2052 #ifdef PPS_SYNC 2053 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2054 hardpps(&tv, tv.tv_usec); 2055 #endif 2056 sc->ppsinfo.clear_sequence++; 2057 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2058 } 2059 } 2060 2061 /* 2062 * Process normal status changes 2063 */ 2064 if (ISSET(delta, sc->sc_msr_mask)) { 2065 SET(sc->sc_msr_delta, delta); 2066 2067 /* 2068 * Stop output immediately if we lose the output 2069 * flow control signal or carrier detect. 2070 */ 2071 if (ISSET(~msr, sc->sc_msr_mask)) { 2072 sc->sc_tbc = 0; 2073 sc->sc_heldtbc = 0; 2074 #ifdef COM_DEBUG 2075 if (com_debug) 2076 comstatus(sc, "comintr "); 2077 #endif 2078 } 2079 2080 sc->sc_st_check = 1; 2081 } 2082 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2083 2084 /* 2085 * Done handling any receive interrupts. See if data can be 2086 * transmitted as well. Schedule tx done event if no data left 2087 * and tty was marked busy. 2088 */ 2089 if (ISSET(lsr, LSR_TXRDY)) { 2090 /* 2091 * If we've delayed a parameter change, do it now, and restart 2092 * output. 2093 */ 2094 if (sc->sc_heldchange) { 2095 com_loadchannelregs(sc); 2096 sc->sc_heldchange = 0; 2097 sc->sc_tbc = sc->sc_heldtbc; 2098 sc->sc_heldtbc = 0; 2099 } 2100 2101 /* Output the next chunk of the contiguous buffer, if any. */ 2102 if (sc->sc_tbc > 0) { 2103 int n; 2104 2105 n = sc->sc_tbc; 2106 if (n > sc->sc_fifolen) 2107 n = sc->sc_fifolen; 2108 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2109 sc->sc_tbc -= n; 2110 sc->sc_tba += n; 2111 } else { 2112 /* Disable transmit completion interrupts if necessary. */ 2113 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2114 CLR(sc->sc_ier, IER_ETXRDY); 2115 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2116 } 2117 if (sc->sc_tx_busy) { 2118 sc->sc_tx_busy = 0; 2119 sc->sc_tx_done = 1; 2120 } 2121 } 2122 } 2123 2124 /* Wake up the poller. */ 2125 #ifdef __GENERIC_SOFT_INTERRUPTS 2126 softintr_schedule(sc->sc_si); 2127 #else 2128 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2129 setsoftserial(); 2130 #else 2131 if (!com_softintr_scheduled) { 2132 com_softintr_scheduled = 1; 2133 timeout(comsoft, NULL, 1); 2134 } 2135 #endif 2136 #endif 2137 2138 #if NRND > 0 && defined(RND_COM) 2139 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2140 #endif 2141 2142 return (1); 2143 } 2144 2145 /* 2146 * The following functions are polled getc and putc routines, shared 2147 * by the console and kgdb glue. 2148 */ 2149 2150 int 2151 com_common_getc(iot, ioh) 2152 bus_space_tag_t iot; 2153 bus_space_handle_t ioh; 2154 { 2155 int s = splserial(); 2156 u_char stat, c; 2157 2158 /* block until a character becomes available */ 2159 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2160 ; 2161 2162 c = bus_space_read_1(iot, ioh, com_data); 2163 stat = bus_space_read_1(iot, ioh, com_iir); 2164 splx(s); 2165 return (c); 2166 } 2167 2168 void 2169 com_common_putc(iot, ioh, c) 2170 bus_space_tag_t iot; 2171 bus_space_handle_t ioh; 2172 int c; 2173 { 2174 int s = splserial(); 2175 int timo; 2176 2177 /* wait for any pending transmission to finish */ 2178 timo = 150000; 2179 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2180 continue; 2181 2182 bus_space_write_1(iot, ioh, com_data, c); 2183 COM_BARRIER(iot, ioh, BR | BW); 2184 2185 /* wait for this transmission to complete */ 2186 timo = 1500000; 2187 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2188 continue; 2189 2190 splx(s); 2191 } 2192 2193 /* 2194 * Initialize UART for use as console or KGDB line. 2195 */ 2196 int 2197 cominit(iot, iobase, rate, frequency, cflag, iohp) 2198 bus_space_tag_t iot; 2199 int iobase; 2200 int rate, frequency; 2201 tcflag_t cflag; 2202 bus_space_handle_t *iohp; 2203 { 2204 bus_space_handle_t ioh; 2205 2206 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2207 return (ENOMEM); /* ??? */ 2208 2209 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2210 bus_space_write_1(iot, ioh, com_efr, 0); 2211 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2212 rate = comspeed(rate, frequency); 2213 bus_space_write_1(iot, ioh, com_dlbl, rate); 2214 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2215 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2216 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2217 bus_space_write_1(iot, ioh, com_fifo, 2218 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2219 bus_space_write_1(iot, ioh, com_ier, 0); 2220 2221 *iohp = ioh; 2222 return (0); 2223 } 2224 2225 /* 2226 * Following are all routines needed for COM to act as console 2227 */ 2228 2229 int 2230 comcnattach(iot, iobase, rate, frequency, cflag) 2231 bus_space_tag_t iot; 2232 int iobase; 2233 int rate, frequency; 2234 tcflag_t cflag; 2235 { 2236 int res; 2237 static struct consdev comcons = { 2238 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2239 NODEV, CN_NORMAL 2240 }; 2241 2242 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2243 if (res) 2244 return (res); 2245 2246 cn_tab = &comcons; 2247 2248 comconstag = iot; 2249 comconsaddr = iobase; 2250 comconsrate = rate; 2251 comconscflag = cflag; 2252 2253 return (0); 2254 } 2255 2256 int 2257 comcngetc(dev) 2258 dev_t dev; 2259 { 2260 2261 return (com_common_getc(comconstag, comconsioh)); 2262 } 2263 2264 /* 2265 * Console kernel output character routine. 2266 */ 2267 void 2268 comcnputc(dev, c) 2269 dev_t dev; 2270 int c; 2271 { 2272 2273 com_common_putc(comconstag, comconsioh, c); 2274 } 2275 2276 void 2277 comcnpollc(dev, on) 2278 dev_t dev; 2279 int on; 2280 { 2281 2282 } 2283 2284 #ifdef KGDB 2285 int 2286 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2287 bus_space_tag_t iot; 2288 int iobase; 2289 int rate, frequency; 2290 tcflag_t cflag; 2291 { 2292 int res; 2293 2294 if (iot == comconstag && iobase == comconsaddr) 2295 return (EBUSY); /* cannot share with console */ 2296 2297 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2298 if (res) 2299 return (res); 2300 2301 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2302 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2303 2304 com_kgdb_iot = iot; 2305 com_kgdb_addr = iobase; 2306 2307 return (0); 2308 } 2309 2310 /* ARGSUSED */ 2311 int 2312 com_kgdb_getc(arg) 2313 void *arg; 2314 { 2315 2316 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2317 } 2318 2319 /* ARGSUSED */ 2320 void 2321 com_kgdb_putc(arg, c) 2322 void *arg; 2323 int c; 2324 { 2325 2326 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2327 } 2328 #endif /* KGDB */ 2329 2330 /* helper function to identify the com ports used by 2331 console or KGDB (and not yet autoconf attached) */ 2332 int 2333 com_is_console(iot, iobase, ioh) 2334 bus_space_tag_t iot; 2335 int iobase; 2336 bus_space_handle_t *ioh; 2337 { 2338 bus_space_handle_t help; 2339 2340 if (!comconsattached && 2341 iot == comconstag && iobase == comconsaddr) 2342 help = comconsioh; 2343 #ifdef KGDB 2344 else if (!com_kgdb_attached && 2345 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2346 help = com_kgdb_ioh; 2347 #endif 2348 else 2349 return (0); 2350 2351 if (ioh) 2352 *ioh = help; 2353 return (1); 2354 } 2355
Indexes created Wed Sep 24 05:09:52 GMT 2025