com.c revision 1.172
1 /* $NetBSD: com.c,v 1.172 2000/05/03 19:19:04 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_com.h" 81 82 #include "rnd.h" 83 #if NRND > 0 && defined(RND_COM) 84 #include <sys/rnd.h> 85 #endif 86 87 #include <sys/param.h> 88 #include <sys/systm.h> 89 #include <sys/ioctl.h> 90 #include <sys/select.h> 91 #include <sys/tty.h> 92 #include <sys/proc.h> 93 #include <sys/user.h> 94 #include <sys/conf.h> 95 #include <sys/file.h> 96 #include <sys/uio.h> 97 #include <sys/kernel.h> 98 #include <sys/syslog.h> 99 #include <sys/types.h> 100 #include <sys/device.h> 101 #include <sys/malloc.h> 102 #include <sys/timepps.h> 103 #include <sys/vnode.h> 104 105 #include <machine/intr.h> 106 #include <machine/bus.h> 107 108 #include <dev/ic/comreg.h> 109 #include <dev/ic/comvar.h> 110 #include <dev/ic/ns16550reg.h> 111 #include <dev/ic/st16650reg.h> 112 #ifdef COM_HAYESP 113 #include <dev/ic/hayespreg.h> 114 #endif 115 #define com_lcr com_cfcr 116 #include <dev/cons.h> 117 118 #include "com.h" 119 120 #ifdef COM_HAYESP 121 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 122 #endif 123 124 #if defined(DDB) || defined(KGDB) 125 static void com_enable_debugport __P((struct com_softc *)); 126 #endif 127 void com_config __P((struct com_softc *)); 128 void com_shutdown __P((struct com_softc *)); 129 int comspeed __P((long, long)); 130 static u_char cflag2lcr __P((tcflag_t)); 131 int comparam __P((struct tty *, struct termios *)); 132 void comstart __P((struct tty *)); 133 void comstop __P((struct tty *, int)); 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void tiocm_to_com __P((struct com_softc *, int, int)); 141 int com_to_tiocm __P((struct com_softc *)); 142 void com_iflush __P((struct com_softc *)); 143 144 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 145 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 146 147 /* XXX: These belong elsewhere */ 148 cdev_decl(com); 149 bdev_decl(com); 150 151 int comcngetc __P((dev_t)); 152 void comcnputc __P((dev_t, int)); 153 void comcnpollc __P((dev_t, int)); 154 155 #define integrate static inline 156 #ifdef __GENERIC_SOFT_INTERRUPTS 157 void comsoft __P((void *)); 158 #else 159 #ifndef __NO_SOFT_SERIAL_INTERRUPT 160 void comsoft __P((void)); 161 #else 162 void comsoft __P((void *)); 163 struct callout comsoft_callout = CALLOUT_INITIALIZER; 164 #endif 165 #endif 166 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 167 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_schedrx __P((struct com_softc *)); 170 void comdiag __P((void *)); 171 172 extern struct cfdriver com_cd; 173 174 /* 175 * Make this an option variable one can patch. 176 * But be warned: this must be a power of 2! 177 */ 178 u_int com_rbuf_size = COM_RING_SIZE; 179 180 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 181 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 182 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 183 184 static int comconsaddr; 185 static bus_space_tag_t comconstag; 186 static bus_space_handle_t comconsioh; 187 static int comconsattached; 188 static int comconsrate; 189 static tcflag_t comconscflag; 190 191 static int ppscap = 192 PPS_TSFMT_TSPEC | 193 PPS_CAPTUREASSERT | 194 PPS_CAPTURECLEAR | 195 #ifdef PPS_SYNC 196 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 197 #endif /* PPS_SYNC */ 198 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 199 200 #ifndef __GENERIC_SOFT_INTERRUPTS 201 #ifdef __NO_SOFT_SERIAL_INTERRUPT 202 volatile int com_softintr_scheduled; 203 #endif 204 #endif 205 206 #ifdef KGDB 207 #include <sys/kgdb.h> 208 209 static int com_kgdb_addr; 210 static bus_space_tag_t com_kgdb_iot; 211 static bus_space_handle_t com_kgdb_ioh; 212 static int com_kgdb_attached; 213 214 int com_kgdb_getc __P((void *)); 215 void com_kgdb_putc __P((void *, int)); 216 #endif /* KGDB */ 217 218 #define COMUNIT_MASK 0x7ffff 219 #define COMDIALOUT_MASK 0x80000 220 221 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 222 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 223 224 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 225 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 226 227 #define BR BUS_SPACE_BARRIER_READ 228 #define BW BUS_SPACE_BARRIER_WRITE 229 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 230 231 int 232 comspeed(speed, frequency) 233 long speed, frequency; 234 { 235 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 236 237 int x, err; 238 239 #if 0 240 if (speed == 0) 241 return (0); 242 #endif 243 if (speed <= 0) 244 return (-1); 245 x = divrnd(frequency / 16, speed); 246 if (x <= 0) 247 return (-1); 248 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 249 if (err < 0) 250 err = -err; 251 if (err > COM_TOLERANCE) 252 return (-1); 253 return (x); 254 255 #undef divrnd 256 } 257 258 #ifdef COM_DEBUG 259 int com_debug = 0; 260 261 void comstatus __P((struct com_softc *, char *)); 262 void 263 comstatus(sc, str) 264 struct com_softc *sc; 265 char *str; 266 { 267 struct tty *tp = sc->sc_tty; 268 269 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 270 sc->sc_dev.dv_xname, str, 271 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 272 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 273 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 274 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 275 sc->sc_tx_stopped ? "+" : "-"); 276 277 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 278 sc->sc_dev.dv_xname, str, 279 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 280 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 281 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 282 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 283 sc->sc_rx_flags); 284 } 285 #endif 286 287 int 288 comprobe1(iot, ioh) 289 bus_space_tag_t iot; 290 bus_space_handle_t ioh; 291 { 292 293 /* force access to id reg */ 294 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 295 bus_space_write_1(iot, ioh, com_iir, 0); 296 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 297 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 298 return (0); 299 300 return (1); 301 } 302 303 #ifdef COM_HAYESP 304 int 305 comprobeHAYESP(hayespioh, sc) 306 bus_space_handle_t hayespioh; 307 struct com_softc *sc; 308 { 309 char val, dips; 310 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 311 bus_space_tag_t iot = sc->sc_iot; 312 313 /* 314 * Hayes ESP cards have two iobases. One is for compatibility with 315 * 16550 serial chips, and at the same ISA PC base addresses. The 316 * other is for ESP-specific enhanced features, and lies at a 317 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 318 */ 319 320 /* Test for ESP signature */ 321 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 322 return (0); 323 324 /* 325 * ESP is present at ESP enhanced base address; unknown com port 326 */ 327 328 /* Get the dip-switch configurations */ 329 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 330 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 331 332 /* Determine which com port this ESP card services: bits 0,1 of */ 333 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 334 if (sc->sc_iobase != combaselist[dips & 0x03]) 335 return (0); 336 337 printf(": ESP"); 338 339 /* Check ESP Self Test bits. */ 340 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 341 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 342 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 344 if ((val & 0x70) < 0x20) { 345 printf("-old (%o)", val & 0x70); 346 /* we do not support the necessary features */ 347 return (0); 348 } 349 350 /* Check for ability to emulate 16550: bit 8 == 1 */ 351 if ((dips & 0x80) == 0) { 352 printf(" slave"); 353 /* XXX Does slave really mean no 16550 support?? */ 354 return (0); 355 } 356 357 /* 358 * If we made it this far, we are a full-featured ESP v2.0 (or 359 * better), at the correct com port address. 360 */ 361 362 SET(sc->sc_hwflags, COM_HW_HAYESP); 363 printf(", 1024 byte fifo\n"); 364 return (1); 365 } 366 #endif 367 368 #if defined(DDB) || defined(KGDB) 369 static void 370 com_enable_debugport(sc) 371 struct com_softc *sc; 372 { 373 int s; 374 375 /* Turn on line break interrupt, set carrier. */ 376 s = splserial(); 377 sc->sc_ier = IER_ERXRDY; 378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 379 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 380 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 381 splx(s); 382 } 383 #endif 384 385 void 386 com_attach_subr(sc) 387 struct com_softc *sc; 388 { 389 int iobase = sc->sc_iobase; 390 bus_space_tag_t iot = sc->sc_iot; 391 bus_space_handle_t ioh = sc->sc_ioh; 392 struct tty *tp; 393 #ifdef COM16650 394 u_int8_t lcr; 395 #endif 396 #ifdef COM_HAYESP 397 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 398 int *hayespp; 399 #endif 400 401 callout_init(&sc->sc_diag_callout); 402 403 /* Disable interrupts before configuring the device. */ 404 sc->sc_ier = 0; 405 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 406 407 if (iot == comconstag && iobase == comconsaddr) { 408 comconsattached = 1; 409 410 /* Make sure the console is always "hardwired". */ 411 delay(1000); /* wait for output to finish */ 412 SET(sc->sc_hwflags, COM_HW_CONSOLE); 413 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 414 } 415 416 #ifdef COM_HAYESP 417 /* Look for a Hayes ESP board. */ 418 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 419 bus_space_handle_t hayespioh; 420 421 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 422 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 423 continue; 424 if (comprobeHAYESP(hayespioh, sc)) { 425 sc->sc_hayespioh = hayespioh; 426 sc->sc_fifolen = 1024; 427 428 break; 429 } 430 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 431 } 432 /* No ESP; look for other things. */ 433 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 434 #endif 435 sc->sc_fifolen = 1; 436 /* look for a NS 16550AF UART with FIFOs */ 437 bus_space_write_1(iot, ioh, com_fifo, 438 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 439 delay(100); 440 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 441 == IIR_FIFO_MASK) 442 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 443 == FIFO_TRIGGER_14) { 444 SET(sc->sc_hwflags, COM_HW_FIFO); 445 446 #ifdef COM16650 447 /* 448 * IIR changes into the EFR if LCR is set to LCR_EERS 449 * on 16650s. We also know IIR != 0 at this point. 450 * Write 0 into the EFR, and read it. If the result 451 * is 0, we have a 16650. 452 * 453 * Older 16650s were broken; the test to detect them 454 * is taken from the Linux driver. Apparently 455 * setting DLAB enable gives access to the EFR on 456 * these chips. 457 */ 458 lcr = bus_space_read_1(iot, ioh, com_lcr); 459 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 460 bus_space_write_1(iot, ioh, com_efr, 0); 461 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 462 bus_space_write_1(iot, ioh, com_lcr, 463 lcr | LCR_DLAB); 464 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 465 CLR(sc->sc_hwflags, COM_HW_FIFO); 466 sc->sc_fifolen = 0; 467 } else { 468 SET(sc->sc_hwflags, COM_HW_FLOW); 469 sc->sc_fifolen = 32; 470 } 471 } else 472 #endif 473 sc->sc_fifolen = 16; 474 475 #ifdef COM16650 476 bus_space_write_1(iot, ioh, com_lcr, lcr); 477 if (sc->sc_fifolen == 0) 478 printf(": st16650, broken fifo\n"); 479 else if (sc->sc_fifolen == 32) 480 printf(": st16650a, working fifo\n"); 481 else 482 #endif 483 printf(": ns16550a, working fifo\n"); 484 } else 485 printf(": ns16550, broken fifo\n"); 486 else 487 printf(": ns8250 or ns16450, no fifo\n"); 488 bus_space_write_1(iot, ioh, com_fifo, 0); 489 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 490 sc->sc_fifolen = 1; 491 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 492 } 493 #ifdef COM_HAYESP 494 } 495 #endif 496 497 tp = ttymalloc(); 498 tp->t_oproc = comstart; 499 tp->t_param = comparam; 500 tp->t_hwiflow = comhwiflow; 501 502 sc->sc_tty = tp; 503 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 504 if (sc->sc_rbuf == NULL) { 505 printf("%s: unable to allocate ring buffer\n", 506 sc->sc_dev.dv_xname); 507 return; 508 } 509 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 510 511 tty_attach(tp); 512 513 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 514 SET(sc->sc_mcr, MCR_IENABLE); 515 516 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 517 int maj; 518 519 /* locate the major number */ 520 for (maj = 0; maj < nchrdev; maj++) 521 if (cdevsw[maj].d_open == comopen) 522 break; 523 524 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 525 526 printf("%s: console\n", sc->sc_dev.dv_xname); 527 } 528 529 #ifdef KGDB 530 /* 531 * Allow kgdb to "take over" this port. If this is 532 * the kgdb device, it has exclusive use. 533 */ 534 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 535 com_kgdb_attached = 1; 536 537 SET(sc->sc_hwflags, COM_HW_KGDB); 538 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 539 } 540 #endif 541 542 #ifdef __GENERIC_SOFT_INTERRUPTS 543 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 544 #endif 545 546 #if NRND > 0 && defined(RND_COM) 547 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 548 RND_TYPE_TTY, 0); 549 #endif 550 551 /* if there are no enable/disable functions, assume the device 552 is always enabled */ 553 if (!sc->enable) 554 sc->enabled = 1; 555 556 com_config(sc); 557 558 SET(sc->sc_hwflags, COM_HW_DEV_OK); 559 } 560 561 void 562 com_config(sc) 563 struct com_softc *sc; 564 { 565 bus_space_tag_t iot = sc->sc_iot; 566 bus_space_handle_t ioh = sc->sc_ioh; 567 568 /* Disable interrupts before configuring the device. */ 569 sc->sc_ier = 0; 570 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 571 572 #ifdef COM_HAYESP 573 /* Look for a Hayes ESP board. */ 574 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 575 sc->sc_fifolen = 1024; 576 577 /* Set 16550 compatibility mode */ 578 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 579 HAYESP_SETMODE); 580 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 581 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 582 HAYESP_MODE_SCALE); 583 584 /* Set RTS/CTS flow control */ 585 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 586 HAYESP_SETFLOWTYPE); 587 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_FLOW_RTS); 589 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 590 HAYESP_FLOW_CTS); 591 592 /* Set flow control levels */ 593 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 594 HAYESP_SETRXFLOW); 595 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 596 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 597 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 598 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 599 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 600 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 601 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 602 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 603 } 604 #endif 605 606 #ifdef DDB 607 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 608 com_enable_debugport(sc); 609 #endif 610 611 #ifdef KGDB 612 /* 613 * Allow kgdb to "take over" this port. If this is 614 * the kgdb device, it has exclusive use. 615 */ 616 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 617 com_enable_debugport(sc); 618 #endif 619 } 620 621 int 622 com_detach(self, flags) 623 struct device *self; 624 int flags; 625 { 626 struct com_softc *sc = (struct com_softc *)self; 627 int maj, mn; 628 629 /* locate the major number */ 630 for (maj = 0; maj < nchrdev; maj++) 631 if (cdevsw[maj].d_open == comopen) 632 break; 633 634 /* Nuke the vnodes for any open instances. */ 635 mn = self->dv_unit; 636 vdevgone(maj, mn, mn, VCHR); 637 638 mn |= COMDIALOUT_MASK; 639 vdevgone(maj, mn, mn, VCHR); 640 641 /* Free the receive buffer. */ 642 free(sc->sc_rbuf, M_DEVBUF); 643 644 /* Detach and free the tty. */ 645 tty_detach(sc->sc_tty); 646 ttyfree(sc->sc_tty); 647 648 #ifdef __GENERIC_SOFT_INTERRUPTS 649 /* Unhook the soft interrupt handler. */ 650 softintr_disestablish(sc->sc_si); 651 #endif 652 653 #if NRND > 0 && defined(RND_COM) 654 /* Unhook the entropy source. */ 655 rnd_detach_source(&sc->rnd_source); 656 #endif 657 658 return (0); 659 } 660 661 int 662 com_activate(self, act) 663 struct device *self; 664 enum devact act; 665 { 666 struct com_softc *sc = (struct com_softc *)self; 667 int s, rv = 0; 668 669 s = splserial(); 670 switch (act) { 671 case DVACT_ACTIVATE: 672 rv = EOPNOTSUPP; 673 break; 674 675 case DVACT_DEACTIVATE: 676 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 677 rv = EBUSY; 678 break; 679 } 680 681 if (sc->disable != NULL && sc->enabled != 0) { 682 (*sc->disable)(sc); 683 sc->enabled = 0; 684 } 685 break; 686 } 687 splx(s); 688 return (rv); 689 } 690 691 void 692 com_shutdown(sc) 693 struct com_softc *sc; 694 { 695 struct tty *tp = sc->sc_tty; 696 int s; 697 698 s = splserial(); 699 700 /* If we were asserting flow control, then deassert it. */ 701 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 702 com_hwiflow(sc); 703 704 /* Clear any break condition set with TIOCSBRK. */ 705 com_break(sc, 0); 706 707 /* Turn off PPS capture on last close. */ 708 sc->sc_ppsmask = 0; 709 sc->ppsparam.mode = 0; 710 711 /* 712 * Hang up if necessary. Wait a bit, so the other side has time to 713 * notice even if we immediately open the port again. 714 */ 715 if (ISSET(tp->t_cflag, HUPCL)) { 716 com_modem(sc, 0); 717 (void) tsleep(sc, TTIPRI, ttclos, hz); 718 } 719 720 /* Turn off interrupts. */ 721 #ifdef DDB 722 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 723 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 724 else 725 #endif 726 sc->sc_ier = 0; 727 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 728 729 if (sc->disable) { 730 #ifdef DIAGNOSTIC 731 if (!sc->enabled) 732 panic("com_shutdown: not enabled?"); 733 #endif 734 (*sc->disable)(sc); 735 sc->enabled = 0; 736 } 737 738 splx(s); 739 } 740 741 int 742 comopen(dev, flag, mode, p) 743 dev_t dev; 744 int flag, mode; 745 struct proc *p; 746 { 747 int unit = COMUNIT(dev); 748 struct com_softc *sc; 749 struct tty *tp; 750 int s, s2; 751 int error; 752 753 if (unit >= com_cd.cd_ndevs) 754 return (ENXIO); 755 sc = com_cd.cd_devs[unit]; 756 if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 757 sc->sc_rbuf == NULL) 758 return (ENXIO); 759 760 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 761 return (ENXIO); 762 763 #ifdef KGDB 764 /* 765 * If this is the kgdb port, no other use is permitted. 766 */ 767 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 768 return (EBUSY); 769 #endif 770 771 tp = sc->sc_tty; 772 773 if (ISSET(tp->t_state, TS_ISOPEN) && 774 ISSET(tp->t_state, TS_XCLUDE) && 775 p->p_ucred->cr_uid != 0) 776 return (EBUSY); 777 778 s = spltty(); 779 780 /* 781 * Do the following iff this is a first open. 782 */ 783 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 784 struct termios t; 785 786 tp->t_dev = dev; 787 788 s2 = splserial(); 789 790 if (sc->enable) { 791 if ((*sc->enable)(sc)) { 792 splx(s2); 793 splx(s); 794 printf("%s: device enable failed\n", 795 sc->sc_dev.dv_xname); 796 return (EIO); 797 } 798 sc->enabled = 1; 799 com_config(sc); 800 } 801 802 /* Turn on interrupts. */ 803 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 804 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 805 806 /* Fetch the current modem control status, needed later. */ 807 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 808 809 /* Clear PPS capture state on first open. */ 810 sc->sc_ppsmask = 0; 811 sc->ppsparam.mode = 0; 812 813 splx(s2); 814 815 /* 816 * Initialize the termios status to the defaults. Add in the 817 * sticky bits from TIOCSFLAGS. 818 */ 819 t.c_ispeed = 0; 820 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 821 t.c_ospeed = comconsrate; 822 t.c_cflag = comconscflag; 823 } else { 824 t.c_ospeed = TTYDEF_SPEED; 825 t.c_cflag = TTYDEF_CFLAG; 826 } 827 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 828 SET(t.c_cflag, CLOCAL); 829 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 830 SET(t.c_cflag, CRTSCTS); 831 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 832 SET(t.c_cflag, MDMBUF); 833 /* Make sure comparam() will do something. */ 834 tp->t_ospeed = 0; 835 (void) comparam(tp, &t); 836 tp->t_iflag = TTYDEF_IFLAG; 837 tp->t_oflag = TTYDEF_OFLAG; 838 tp->t_lflag = TTYDEF_LFLAG; 839 ttychars(tp); 840 ttsetwater(tp); 841 842 s2 = splserial(); 843 844 /* 845 * Turn on DTR. We must always do this, even if carrier is not 846 * present, because otherwise we'd have to use TIOCSDTR 847 * immediately after setting CLOCAL, which applications do not 848 * expect. We always assert DTR while the device is open 849 * unless explicitly requested to deassert it. 850 */ 851 com_modem(sc, 1); 852 853 /* Clear the input ring, and unblock. */ 854 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 855 sc->sc_rbavail = com_rbuf_size; 856 com_iflush(sc); 857 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 858 com_hwiflow(sc); 859 860 #ifdef COM_DEBUG 861 if (com_debug) 862 comstatus(sc, "comopen "); 863 #endif 864 865 splx(s2); 866 } 867 868 splx(s); 869 870 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 871 if (error) 872 goto bad; 873 874 error = (*linesw[tp->t_line].l_open)(dev, tp); 875 if (error) 876 goto bad; 877 878 return (0); 879 880 bad: 881 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 882 /* 883 * We failed to open the device, and nobody else had it opened. 884 * Clean up the state as appropriate. 885 */ 886 com_shutdown(sc); 887 } 888 889 return (error); 890 } 891 892 int 893 comclose(dev, flag, mode, p) 894 dev_t dev; 895 int flag, mode; 896 struct proc *p; 897 { 898 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 899 struct tty *tp = sc->sc_tty; 900 901 /* XXX This is for cons.c. */ 902 if (!ISSET(tp->t_state, TS_ISOPEN)) 903 return (0); 904 905 (*linesw[tp->t_line].l_close)(tp, flag); 906 ttyclose(tp); 907 908 if (COM_ISALIVE(sc) == 0) 909 return (0); 910 911 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 912 /* 913 * Although we got a last close, the device may still be in 914 * use; e.g. if this was the dialout node, and there are still 915 * processes waiting for carrier on the non-dialout node. 916 */ 917 com_shutdown(sc); 918 } 919 920 return (0); 921 } 922 923 int 924 comread(dev, uio, flag) 925 dev_t dev; 926 struct uio *uio; 927 int flag; 928 { 929 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 930 struct tty *tp = sc->sc_tty; 931 932 if (COM_ISALIVE(sc) == 0) 933 return (EIO); 934 935 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 936 } 937 938 int 939 comwrite(dev, uio, flag) 940 dev_t dev; 941 struct uio *uio; 942 int flag; 943 { 944 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 945 struct tty *tp = sc->sc_tty; 946 947 if (COM_ISALIVE(sc) == 0) 948 return (EIO); 949 950 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 951 } 952 953 struct tty * 954 comtty(dev) 955 dev_t dev; 956 { 957 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 958 struct tty *tp = sc->sc_tty; 959 960 return (tp); 961 } 962 963 int 964 comioctl(dev, cmd, data, flag, p) 965 dev_t dev; 966 u_long cmd; 967 caddr_t data; 968 int flag; 969 struct proc *p; 970 { 971 struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)]; 972 struct tty *tp = sc->sc_tty; 973 int error; 974 int s; 975 976 if (COM_ISALIVE(sc) == 0) 977 return (EIO); 978 979 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 980 if (error >= 0) 981 return (error); 982 983 error = ttioctl(tp, cmd, data, flag, p); 984 if (error >= 0) 985 return (error); 986 987 error = 0; 988 989 s = splserial(); 990 991 switch (cmd) { 992 case TIOCSBRK: 993 com_break(sc, 1); 994 break; 995 996 case TIOCCBRK: 997 com_break(sc, 0); 998 break; 999 1000 case TIOCSDTR: 1001 com_modem(sc, 1); 1002 break; 1003 1004 case TIOCCDTR: 1005 com_modem(sc, 0); 1006 break; 1007 1008 case TIOCGFLAGS: 1009 *(int *)data = sc->sc_swflags; 1010 break; 1011 1012 case TIOCSFLAGS: 1013 error = suser(p->p_ucred, &p->p_acflag); 1014 if (error) 1015 break; 1016 sc->sc_swflags = *(int *)data; 1017 break; 1018 1019 case TIOCMSET: 1020 case TIOCMBIS: 1021 case TIOCMBIC: 1022 tiocm_to_com(sc, cmd, *(int *)data); 1023 break; 1024 1025 case TIOCMGET: 1026 *(int *)data = com_to_tiocm(sc); 1027 break; 1028 1029 case PPS_IOC_CREATE: 1030 break; 1031 1032 case PPS_IOC_DESTROY: 1033 break; 1034 1035 case PPS_IOC_GETPARAMS: { 1036 pps_params_t *pp; 1037 pp = (pps_params_t *)data; 1038 *pp = sc->ppsparam; 1039 break; 1040 } 1041 1042 case PPS_IOC_SETPARAMS: { 1043 pps_params_t *pp; 1044 int mode; 1045 pp = (pps_params_t *)data; 1046 if (pp->mode & ~ppscap) { 1047 error = EINVAL; 1048 break; 1049 } 1050 sc->ppsparam = *pp; 1051 /* 1052 * Compute msr masks from user-specified timestamp state. 1053 */ 1054 mode = sc->ppsparam.mode; 1055 #ifdef PPS_SYNC 1056 if (mode & PPS_HARDPPSONASSERT) { 1057 mode |= PPS_CAPTUREASSERT; 1058 /* XXX revoke any previous HARDPPS source */ 1059 } 1060 if (mode & PPS_HARDPPSONCLEAR) { 1061 mode |= PPS_CAPTURECLEAR; 1062 /* XXX revoke any previous HARDPPS source */ 1063 } 1064 #endif /* PPS_SYNC */ 1065 switch (mode & PPS_CAPTUREBOTH) { 1066 case 0: 1067 sc->sc_ppsmask = 0; 1068 break; 1069 1070 case PPS_CAPTUREASSERT: 1071 sc->sc_ppsmask = MSR_DCD; 1072 sc->sc_ppsassert = MSR_DCD; 1073 sc->sc_ppsclear = -1; 1074 break; 1075 1076 case PPS_CAPTURECLEAR: 1077 sc->sc_ppsmask = MSR_DCD; 1078 sc->sc_ppsassert = -1; 1079 sc->sc_ppsclear = 0; 1080 break; 1081 1082 case PPS_CAPTUREBOTH: 1083 sc->sc_ppsmask = MSR_DCD; 1084 sc->sc_ppsassert = MSR_DCD; 1085 sc->sc_ppsclear = 0; 1086 break; 1087 1088 default: 1089 error = EINVAL; 1090 break; 1091 } 1092 break; 1093 } 1094 1095 case PPS_IOC_GETCAP: 1096 *(int*)data = ppscap; 1097 break; 1098 1099 case PPS_IOC_FETCH: { 1100 pps_info_t *pi; 1101 pi = (pps_info_t *)data; 1102 *pi = sc->ppsinfo; 1103 break; 1104 } 1105 1106 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1107 /* 1108 * Some GPS clocks models use the falling rather than 1109 * rising edge as the on-the-second signal. 1110 * The old API has no way to specify PPS polarity. 1111 */ 1112 sc->sc_ppsmask = MSR_DCD; 1113 #ifndef PPS_TRAILING_EDGE 1114 sc->sc_ppsassert = MSR_DCD; 1115 sc->sc_ppsclear = -1; 1116 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1117 &sc->ppsinfo.assert_timestamp); 1118 #else 1119 sc->sc_ppsassert = -1 1120 sc->sc_ppsclear = 0; 1121 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1122 &sc->ppsinfo.clear_timestamp); 1123 #endif 1124 break; 1125 1126 default: 1127 error = ENOTTY; 1128 break; 1129 } 1130 1131 splx(s); 1132 1133 #ifdef COM_DEBUG 1134 if (com_debug) 1135 comstatus(sc, "comioctl "); 1136 #endif 1137 1138 return (error); 1139 } 1140 1141 integrate void 1142 com_schedrx(sc) 1143 struct com_softc *sc; 1144 { 1145 1146 sc->sc_rx_ready = 1; 1147 1148 /* Wake up the poller. */ 1149 #ifdef __GENERIC_SOFT_INTERRUPTS 1150 softintr_schedule(sc->sc_si); 1151 #else 1152 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1153 setsoftserial(); 1154 #else 1155 if (!com_softintr_scheduled) { 1156 com_softintr_scheduled = 1; 1157 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1158 } 1159 #endif 1160 #endif 1161 } 1162 1163 void 1164 com_break(sc, onoff) 1165 struct com_softc *sc; 1166 int onoff; 1167 { 1168 1169 if (onoff) 1170 SET(sc->sc_lcr, LCR_SBREAK); 1171 else 1172 CLR(sc->sc_lcr, LCR_SBREAK); 1173 1174 if (!sc->sc_heldchange) { 1175 if (sc->sc_tx_busy) { 1176 sc->sc_heldtbc = sc->sc_tbc; 1177 sc->sc_tbc = 0; 1178 sc->sc_heldchange = 1; 1179 } else 1180 com_loadchannelregs(sc); 1181 } 1182 } 1183 1184 void 1185 com_modem(sc, onoff) 1186 struct com_softc *sc; 1187 int onoff; 1188 { 1189 1190 if (sc->sc_mcr_dtr == 0) 1191 return; 1192 1193 if (onoff) 1194 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1195 else 1196 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1197 1198 if (!sc->sc_heldchange) { 1199 if (sc->sc_tx_busy) { 1200 sc->sc_heldtbc = sc->sc_tbc; 1201 sc->sc_tbc = 0; 1202 sc->sc_heldchange = 1; 1203 } else 1204 com_loadchannelregs(sc); 1205 } 1206 } 1207 1208 void 1209 tiocm_to_com(sc, how, ttybits) 1210 struct com_softc *sc; 1211 int how, ttybits; 1212 { 1213 u_char combits; 1214 1215 combits = 0; 1216 if (ISSET(ttybits, TIOCM_DTR)) 1217 SET(combits, MCR_DTR); 1218 if (ISSET(ttybits, TIOCM_RTS)) 1219 SET(combits, MCR_RTS); 1220 1221 switch (how) { 1222 case TIOCMBIC: 1223 CLR(sc->sc_mcr, combits); 1224 break; 1225 1226 case TIOCMBIS: 1227 SET(sc->sc_mcr, combits); 1228 break; 1229 1230 case TIOCMSET: 1231 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1232 SET(sc->sc_mcr, combits); 1233 break; 1234 } 1235 1236 if (!sc->sc_heldchange) { 1237 if (sc->sc_tx_busy) { 1238 sc->sc_heldtbc = sc->sc_tbc; 1239 sc->sc_tbc = 0; 1240 sc->sc_heldchange = 1; 1241 } else 1242 com_loadchannelregs(sc); 1243 } 1244 } 1245 1246 int 1247 com_to_tiocm(sc) 1248 struct com_softc *sc; 1249 { 1250 u_char combits; 1251 int ttybits = 0; 1252 1253 combits = sc->sc_mcr; 1254 if (ISSET(combits, MCR_DTR)) 1255 SET(ttybits, TIOCM_DTR); 1256 if (ISSET(combits, MCR_RTS)) 1257 SET(ttybits, TIOCM_RTS); 1258 1259 combits = sc->sc_msr; 1260 if (ISSET(combits, MSR_DCD)) 1261 SET(ttybits, TIOCM_CD); 1262 if (ISSET(combits, MSR_CTS)) 1263 SET(ttybits, TIOCM_CTS); 1264 if (ISSET(combits, MSR_DSR)) 1265 SET(ttybits, TIOCM_DSR); 1266 if (ISSET(combits, MSR_RI | MSR_TERI)) 1267 SET(ttybits, TIOCM_RI); 1268 1269 if (sc->sc_ier != 0) 1270 SET(ttybits, TIOCM_LE); 1271 1272 return (ttybits); 1273 } 1274 1275 static u_char 1276 cflag2lcr(cflag) 1277 tcflag_t cflag; 1278 { 1279 u_char lcr = 0; 1280 1281 switch (ISSET(cflag, CSIZE)) { 1282 case CS5: 1283 SET(lcr, LCR_5BITS); 1284 break; 1285 case CS6: 1286 SET(lcr, LCR_6BITS); 1287 break; 1288 case CS7: 1289 SET(lcr, LCR_7BITS); 1290 break; 1291 case CS8: 1292 SET(lcr, LCR_8BITS); 1293 break; 1294 } 1295 if (ISSET(cflag, PARENB)) { 1296 SET(lcr, LCR_PENAB); 1297 if (!ISSET(cflag, PARODD)) 1298 SET(lcr, LCR_PEVEN); 1299 } 1300 if (ISSET(cflag, CSTOPB)) 1301 SET(lcr, LCR_STOPB); 1302 1303 return (lcr); 1304 } 1305 1306 int 1307 comparam(tp, t) 1308 struct tty *tp; 1309 struct termios *t; 1310 { 1311 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1312 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1313 u_char lcr; 1314 int s; 1315 1316 if (COM_ISALIVE(sc) == 0) 1317 return (EIO); 1318 1319 /* Check requested parameters. */ 1320 if (ospeed < 0) 1321 return (EINVAL); 1322 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1323 return (EINVAL); 1324 1325 /* 1326 * For the console, always force CLOCAL and !HUPCL, so that the port 1327 * is always active. 1328 */ 1329 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1330 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1331 SET(t->c_cflag, CLOCAL); 1332 CLR(t->c_cflag, HUPCL); 1333 } 1334 1335 /* 1336 * If there were no changes, don't do anything. This avoids dropping 1337 * input and improves performance when all we did was frob things like 1338 * VMIN and VTIME. 1339 */ 1340 if (tp->t_ospeed == t->c_ospeed && 1341 tp->t_cflag == t->c_cflag) 1342 return (0); 1343 1344 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1345 1346 s = splserial(); 1347 1348 sc->sc_lcr = lcr; 1349 1350 /* 1351 * If we're not in a mode that assumes a connection is present, then 1352 * ignore carrier changes. 1353 */ 1354 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1355 sc->sc_msr_dcd = 0; 1356 else 1357 sc->sc_msr_dcd = MSR_DCD; 1358 /* 1359 * Set the flow control pins depending on the current flow control 1360 * mode. 1361 */ 1362 if (ISSET(t->c_cflag, CRTSCTS)) { 1363 sc->sc_mcr_dtr = MCR_DTR; 1364 sc->sc_mcr_rts = MCR_RTS; 1365 sc->sc_msr_cts = MSR_CTS; 1366 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1367 } else if (ISSET(t->c_cflag, MDMBUF)) { 1368 /* 1369 * For DTR/DCD flow control, make sure we don't toggle DTR for 1370 * carrier detection. 1371 */ 1372 sc->sc_mcr_dtr = 0; 1373 sc->sc_mcr_rts = MCR_DTR; 1374 sc->sc_msr_cts = MSR_DCD; 1375 sc->sc_efr = 0; 1376 } else { 1377 /* 1378 * If no flow control, then always set RTS. This will make 1379 * the other side happy if it mistakenly thinks we're doing 1380 * RTS/CTS flow control. 1381 */ 1382 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1383 sc->sc_mcr_rts = 0; 1384 sc->sc_msr_cts = 0; 1385 sc->sc_efr = 0; 1386 if (ISSET(sc->sc_mcr, MCR_DTR)) 1387 SET(sc->sc_mcr, MCR_RTS); 1388 else 1389 CLR(sc->sc_mcr, MCR_RTS); 1390 } 1391 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1392 1393 #if 0 1394 if (ospeed == 0) 1395 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1396 else 1397 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1398 #endif 1399 1400 sc->sc_dlbl = ospeed; 1401 sc->sc_dlbh = ospeed >> 8; 1402 1403 /* 1404 * Set the FIFO threshold based on the receive speed. 1405 * 1406 * * If it's a low speed, it's probably a mouse or some other 1407 * interactive device, so set the threshold low. 1408 * * If it's a high speed, trim the trigger level down to prevent 1409 * overflows. 1410 * * Otherwise set it a bit higher. 1411 */ 1412 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1413 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1414 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1415 sc->sc_fifo = FIFO_ENABLE | 1416 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1417 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1418 else 1419 sc->sc_fifo = 0; 1420 1421 /* And copy to tty. */ 1422 tp->t_ispeed = 0; 1423 tp->t_ospeed = t->c_ospeed; 1424 tp->t_cflag = t->c_cflag; 1425 1426 if (!sc->sc_heldchange) { 1427 if (sc->sc_tx_busy) { 1428 sc->sc_heldtbc = sc->sc_tbc; 1429 sc->sc_tbc = 0; 1430 sc->sc_heldchange = 1; 1431 } else 1432 com_loadchannelregs(sc); 1433 } 1434 1435 if (!ISSET(t->c_cflag, CHWFLOW)) { 1436 /* Disable the high water mark. */ 1437 sc->sc_r_hiwat = 0; 1438 sc->sc_r_lowat = 0; 1439 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1440 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1441 com_schedrx(sc); 1442 } 1443 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1444 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1445 com_hwiflow(sc); 1446 } 1447 } else { 1448 sc->sc_r_hiwat = com_rbuf_hiwat; 1449 sc->sc_r_lowat = com_rbuf_lowat; 1450 } 1451 1452 splx(s); 1453 1454 /* 1455 * Update the tty layer's idea of the carrier bit, in case we changed 1456 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1457 * explicit request. 1458 */ 1459 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1460 1461 #ifdef COM_DEBUG 1462 if (com_debug) 1463 comstatus(sc, "comparam "); 1464 #endif 1465 1466 if (!ISSET(t->c_cflag, CHWFLOW)) { 1467 if (sc->sc_tx_stopped) { 1468 sc->sc_tx_stopped = 0; 1469 comstart(tp); 1470 } 1471 } 1472 1473 return (0); 1474 } 1475 1476 void 1477 com_iflush(sc) 1478 struct com_softc *sc; 1479 { 1480 bus_space_tag_t iot = sc->sc_iot; 1481 bus_space_handle_t ioh = sc->sc_ioh; 1482 #ifdef DIAGNOSTIC 1483 int reg; 1484 #endif 1485 int timo; 1486 1487 #ifdef DIAGNOSTIC 1488 reg = 0xffff; 1489 #endif 1490 timo = 50000; 1491 /* flush any pending I/O */ 1492 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1493 && --timo) 1494 #ifdef DIAGNOSTIC 1495 reg = 1496 #else 1497 (void) 1498 #endif 1499 bus_space_read_1(iot, ioh, com_data); 1500 #ifdef DIAGNOSTIC 1501 if (!timo) 1502 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1503 reg); 1504 #endif 1505 } 1506 1507 void 1508 com_loadchannelregs(sc) 1509 struct com_softc *sc; 1510 { 1511 bus_space_tag_t iot = sc->sc_iot; 1512 bus_space_handle_t ioh = sc->sc_ioh; 1513 1514 /* XXXXX necessary? */ 1515 com_iflush(sc); 1516 1517 bus_space_write_1(iot, ioh, com_ier, 0); 1518 1519 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1520 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1521 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1522 } 1523 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1524 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1525 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1526 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1527 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1528 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1529 1530 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1531 } 1532 1533 int 1534 comhwiflow(tp, block) 1535 struct tty *tp; 1536 int block; 1537 { 1538 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1539 int s; 1540 1541 if (COM_ISALIVE(sc) == 0) 1542 return (0); 1543 1544 if (sc->sc_mcr_rts == 0) 1545 return (0); 1546 1547 s = splserial(); 1548 if (block) { 1549 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1550 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1551 com_hwiflow(sc); 1552 } 1553 } else { 1554 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1555 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1556 com_schedrx(sc); 1557 } 1558 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1559 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1560 com_hwiflow(sc); 1561 } 1562 } 1563 splx(s); 1564 return (1); 1565 } 1566 1567 /* 1568 * (un)block input via hw flowcontrol 1569 */ 1570 void 1571 com_hwiflow(sc) 1572 struct com_softc *sc; 1573 { 1574 bus_space_tag_t iot = sc->sc_iot; 1575 bus_space_handle_t ioh = sc->sc_ioh; 1576 1577 if (sc->sc_mcr_rts == 0) 1578 return; 1579 1580 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1581 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1582 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1583 } else { 1584 SET(sc->sc_mcr, sc->sc_mcr_rts); 1585 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1586 } 1587 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1588 } 1589 1590 1591 void 1592 comstart(tp) 1593 struct tty *tp; 1594 { 1595 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1596 bus_space_tag_t iot = sc->sc_iot; 1597 bus_space_handle_t ioh = sc->sc_ioh; 1598 int s; 1599 1600 if (COM_ISALIVE(sc) == 0) 1601 return; 1602 1603 s = spltty(); 1604 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1605 goto out; 1606 if (sc->sc_tx_stopped) 1607 goto out; 1608 1609 if (tp->t_outq.c_cc <= tp->t_lowat) { 1610 if (ISSET(tp->t_state, TS_ASLEEP)) { 1611 CLR(tp->t_state, TS_ASLEEP); 1612 wakeup(&tp->t_outq); 1613 } 1614 selwakeup(&tp->t_wsel); 1615 if (tp->t_outq.c_cc == 0) 1616 goto out; 1617 } 1618 1619 /* Grab the first contiguous region of buffer space. */ 1620 { 1621 u_char *tba; 1622 int tbc; 1623 1624 tba = tp->t_outq.c_cf; 1625 tbc = ndqb(&tp->t_outq, 0); 1626 1627 (void)splserial(); 1628 1629 sc->sc_tba = tba; 1630 sc->sc_tbc = tbc; 1631 } 1632 1633 SET(tp->t_state, TS_BUSY); 1634 sc->sc_tx_busy = 1; 1635 1636 /* Enable transmit completion interrupts if necessary. */ 1637 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1638 SET(sc->sc_ier, IER_ETXRDY); 1639 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1640 } 1641 1642 /* Output the first chunk of the contiguous buffer. */ 1643 { 1644 int n; 1645 1646 n = sc->sc_tbc; 1647 if (n > sc->sc_fifolen) 1648 n = sc->sc_fifolen; 1649 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1650 sc->sc_tbc -= n; 1651 sc->sc_tba += n; 1652 } 1653 out: 1654 splx(s); 1655 return; 1656 } 1657 1658 /* 1659 * Stop output on a line. 1660 */ 1661 void 1662 comstop(tp, flag) 1663 struct tty *tp; 1664 int flag; 1665 { 1666 struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)]; 1667 int s; 1668 1669 s = splserial(); 1670 if (ISSET(tp->t_state, TS_BUSY)) { 1671 /* Stop transmitting at the next chunk. */ 1672 sc->sc_tbc = 0; 1673 sc->sc_heldtbc = 0; 1674 if (!ISSET(tp->t_state, TS_TTSTOP)) 1675 SET(tp->t_state, TS_FLUSH); 1676 } 1677 splx(s); 1678 } 1679 1680 void 1681 comdiag(arg) 1682 void *arg; 1683 { 1684 struct com_softc *sc = arg; 1685 int overflows, floods; 1686 int s; 1687 1688 s = splserial(); 1689 overflows = sc->sc_overflows; 1690 sc->sc_overflows = 0; 1691 floods = sc->sc_floods; 1692 sc->sc_floods = 0; 1693 sc->sc_errors = 0; 1694 splx(s); 1695 1696 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1697 sc->sc_dev.dv_xname, 1698 overflows, overflows == 1 ? "" : "s", 1699 floods, floods == 1 ? "" : "s"); 1700 } 1701 1702 integrate void 1703 com_rxsoft(sc, tp) 1704 struct com_softc *sc; 1705 struct tty *tp; 1706 { 1707 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1708 u_char *get, *end; 1709 u_int cc, scc; 1710 u_char lsr; 1711 int code; 1712 int s; 1713 1714 end = sc->sc_ebuf; 1715 get = sc->sc_rbget; 1716 scc = cc = com_rbuf_size - sc->sc_rbavail; 1717 1718 if (cc == com_rbuf_size) { 1719 sc->sc_floods++; 1720 if (sc->sc_errors++ == 0) 1721 callout_reset(&sc->sc_diag_callout, 60 * hz, 1722 comdiag, sc); 1723 } 1724 1725 while (cc) { 1726 code = get[0]; 1727 lsr = get[1]; 1728 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1729 if (ISSET(lsr, LSR_OE)) { 1730 sc->sc_overflows++; 1731 if (sc->sc_errors++ == 0) 1732 callout_reset(&sc->sc_diag_callout, 1733 60 * hz, comdiag, sc); 1734 } 1735 if (ISSET(lsr, LSR_BI | LSR_FE)) 1736 SET(code, TTY_FE); 1737 if (ISSET(lsr, LSR_PE)) 1738 SET(code, TTY_PE); 1739 } 1740 if ((*rint)(code, tp) == -1) { 1741 /* 1742 * The line discipline's buffer is out of space. 1743 */ 1744 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1745 /* 1746 * We're either not using flow control, or the 1747 * line discipline didn't tell us to block for 1748 * some reason. Either way, we have no way to 1749 * know when there's more space available, so 1750 * just drop the rest of the data. 1751 */ 1752 get += cc << 1; 1753 if (get >= end) 1754 get -= com_rbuf_size << 1; 1755 cc = 0; 1756 } else { 1757 /* 1758 * Don't schedule any more receive processing 1759 * until the line discipline tells us there's 1760 * space available (through comhwiflow()). 1761 * Leave the rest of the data in the input 1762 * buffer. 1763 */ 1764 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1765 } 1766 break; 1767 } 1768 get += 2; 1769 if (get >= end) 1770 get = sc->sc_rbuf; 1771 cc--; 1772 } 1773 1774 if (cc != scc) { 1775 sc->sc_rbget = get; 1776 s = splserial(); 1777 cc = sc->sc_rbavail += scc - cc; 1778 /* Buffers should be ok again, release possible block. */ 1779 if (cc >= sc->sc_r_lowat) { 1780 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1781 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1782 SET(sc->sc_ier, IER_ERXRDY); 1783 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1784 } 1785 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1786 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1787 com_hwiflow(sc); 1788 } 1789 } 1790 splx(s); 1791 } 1792 } 1793 1794 integrate void 1795 com_txsoft(sc, tp) 1796 struct com_softc *sc; 1797 struct tty *tp; 1798 { 1799 1800 CLR(tp->t_state, TS_BUSY); 1801 if (ISSET(tp->t_state, TS_FLUSH)) 1802 CLR(tp->t_state, TS_FLUSH); 1803 else 1804 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1805 (*linesw[tp->t_line].l_start)(tp); 1806 } 1807 1808 integrate void 1809 com_stsoft(sc, tp) 1810 struct com_softc *sc; 1811 struct tty *tp; 1812 { 1813 u_char msr, delta; 1814 int s; 1815 1816 s = splserial(); 1817 msr = sc->sc_msr; 1818 delta = sc->sc_msr_delta; 1819 sc->sc_msr_delta = 0; 1820 splx(s); 1821 1822 if (ISSET(delta, sc->sc_msr_dcd)) { 1823 /* 1824 * Inform the tty layer that carrier detect changed. 1825 */ 1826 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1827 } 1828 1829 if (ISSET(delta, sc->sc_msr_cts)) { 1830 /* Block or unblock output according to flow control. */ 1831 if (ISSET(msr, sc->sc_msr_cts)) { 1832 sc->sc_tx_stopped = 0; 1833 (*linesw[tp->t_line].l_start)(tp); 1834 } else { 1835 sc->sc_tx_stopped = 1; 1836 } 1837 } 1838 1839 #ifdef COM_DEBUG 1840 if (com_debug) 1841 comstatus(sc, "com_stsoft"); 1842 #endif 1843 } 1844 1845 #ifdef __GENERIC_SOFT_INTERRUPTS 1846 void 1847 comsoft(arg) 1848 void *arg; 1849 { 1850 struct com_softc *sc = arg; 1851 struct tty *tp; 1852 1853 if (COM_ISALIVE(sc) == 0) 1854 return; 1855 1856 { 1857 #else 1858 void 1859 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1860 comsoft() 1861 #else 1862 comsoft(arg) 1863 void *arg; 1864 #endif 1865 { 1866 struct com_softc *sc; 1867 struct tty *tp; 1868 int unit; 1869 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1870 int s; 1871 1872 s = splsoftserial(); 1873 com_softintr_scheduled = 0; 1874 #endif 1875 1876 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1877 sc = com_cd.cd_devs[unit]; 1878 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1879 continue; 1880 1881 if (COM_ISALIVE(sc) == 0) 1882 continue; 1883 1884 tp = sc->sc_tty; 1885 if (tp == NULL) 1886 continue; 1887 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1888 continue; 1889 #endif 1890 tp = sc->sc_tty; 1891 1892 if (sc->sc_rx_ready) { 1893 sc->sc_rx_ready = 0; 1894 com_rxsoft(sc, tp); 1895 } 1896 1897 if (sc->sc_st_check) { 1898 sc->sc_st_check = 0; 1899 com_stsoft(sc, tp); 1900 } 1901 1902 if (sc->sc_tx_done) { 1903 sc->sc_tx_done = 0; 1904 com_txsoft(sc, tp); 1905 } 1906 } 1907 1908 #ifndef __GENERIC_SOFT_INTERRUPTS 1909 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1910 splx(s); 1911 #endif 1912 #endif 1913 } 1914 1915 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1916 /* there has got to be a better way to do comsoft() */ 1917 }} 1918 #endif 1919 1920 int 1921 comintr(arg) 1922 void *arg; 1923 { 1924 struct com_softc *sc = arg; 1925 bus_space_tag_t iot = sc->sc_iot; 1926 bus_space_handle_t ioh = sc->sc_ioh; 1927 u_char *put, *end; 1928 u_int cc; 1929 u_char lsr, iir; 1930 1931 if (COM_ISALIVE(sc) == 0) 1932 return (0); 1933 1934 iir = bus_space_read_1(iot, ioh, com_iir); 1935 if (ISSET(iir, IIR_NOPEND)) 1936 return (0); 1937 1938 end = sc->sc_ebuf; 1939 put = sc->sc_rbput; 1940 cc = sc->sc_rbavail; 1941 1942 do { 1943 u_char msr, delta; 1944 1945 lsr = bus_space_read_1(iot, ioh, com_lsr); 1946 #if defined(DDB) || defined(KGDB) 1947 if (ISSET(lsr, LSR_BI)) { 1948 #ifdef DDB 1949 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1950 console_debugger(); 1951 continue; 1952 } 1953 #endif 1954 #ifdef KGDB 1955 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1956 kgdb_connect(1); 1957 continue; 1958 } 1959 #endif 1960 } 1961 #endif /* DDB || KGDB */ 1962 1963 if (ISSET(lsr, LSR_RCV_MASK) && 1964 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1965 while (cc > 0) { 1966 put[0] = bus_space_read_1(iot, ioh, com_data); 1967 put[1] = lsr; 1968 put += 2; 1969 if (put >= end) 1970 put = sc->sc_rbuf; 1971 cc--; 1972 1973 lsr = bus_space_read_1(iot, ioh, com_lsr); 1974 if (!ISSET(lsr, LSR_RCV_MASK)) 1975 break; 1976 } 1977 1978 /* 1979 * Current string of incoming characters ended because 1980 * no more data was available or we ran out of space. 1981 * Schedule a receive event if any data was received. 1982 * If we're out of space, turn off receive interrupts. 1983 */ 1984 sc->sc_rbput = put; 1985 sc->sc_rbavail = cc; 1986 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1987 sc->sc_rx_ready = 1; 1988 1989 /* 1990 * See if we are in danger of overflowing a buffer. If 1991 * so, use hardware flow control to ease the pressure. 1992 */ 1993 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1994 cc < sc->sc_r_hiwat) { 1995 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1996 com_hwiflow(sc); 1997 } 1998 1999 /* 2000 * If we're out of space, disable receive interrupts 2001 * until the queue has drained a bit. 2002 */ 2003 if (!cc) { 2004 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2005 CLR(sc->sc_ier, IER_ERXRDY); 2006 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2007 } 2008 } else { 2009 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2010 bus_space_write_1(iot, ioh, com_ier, 0); 2011 delay(10); 2012 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2013 iir = IIR_NOPEND; 2014 continue; 2015 } 2016 } 2017 2018 msr = bus_space_read_1(iot, ioh, com_msr); 2019 delta = msr ^ sc->sc_msr; 2020 sc->sc_msr = msr; 2021 /* 2022 * Pulse-per-second (PSS) signals on edge of DCD? 2023 * Process these even if line discipline is ignoring DCD. 2024 */ 2025 if (delta & sc->sc_ppsmask) { 2026 struct timeval tv; 2027 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2028 /* XXX nanotime() */ 2029 microtime(&tv); 2030 TIMEVAL_TO_TIMESPEC(&tv, 2031 &sc->ppsinfo.assert_timestamp); 2032 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2033 timespecadd(&sc->ppsinfo.assert_timestamp, 2034 &sc->ppsparam.assert_offset, 2035 &sc->ppsinfo.assert_timestamp); 2036 } 2037 2038 #ifdef PPS_SYNC 2039 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2040 hardpps(&tv, tv.tv_usec); 2041 #endif 2042 sc->ppsinfo.assert_sequence++; 2043 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2044 2045 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2046 /* XXX nanotime() */ 2047 microtime(&tv); 2048 TIMEVAL_TO_TIMESPEC(&tv, 2049 &sc->ppsinfo.clear_timestamp); 2050 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2051 timespecadd(&sc->ppsinfo.clear_timestamp, 2052 &sc->ppsparam.clear_offset, 2053 &sc->ppsinfo.clear_timestamp); 2054 } 2055 2056 #ifdef PPS_SYNC 2057 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2058 hardpps(&tv, tv.tv_usec); 2059 #endif 2060 sc->ppsinfo.clear_sequence++; 2061 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2062 } 2063 } 2064 2065 /* 2066 * Process normal status changes 2067 */ 2068 if (ISSET(delta, sc->sc_msr_mask)) { 2069 SET(sc->sc_msr_delta, delta); 2070 2071 /* 2072 * Stop output immediately if we lose the output 2073 * flow control signal or carrier detect. 2074 */ 2075 if (ISSET(~msr, sc->sc_msr_mask)) { 2076 sc->sc_tbc = 0; 2077 sc->sc_heldtbc = 0; 2078 #ifdef COM_DEBUG 2079 if (com_debug) 2080 comstatus(sc, "comintr "); 2081 #endif 2082 } 2083 2084 sc->sc_st_check = 1; 2085 } 2086 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2087 2088 /* 2089 * Done handling any receive interrupts. See if data can be 2090 * transmitted as well. Schedule tx done event if no data left 2091 * and tty was marked busy. 2092 */ 2093 if (ISSET(lsr, LSR_TXRDY)) { 2094 /* 2095 * If we've delayed a parameter change, do it now, and restart 2096 * output. 2097 */ 2098 if (sc->sc_heldchange) { 2099 com_loadchannelregs(sc); 2100 sc->sc_heldchange = 0; 2101 sc->sc_tbc = sc->sc_heldtbc; 2102 sc->sc_heldtbc = 0; 2103 } 2104 2105 /* Output the next chunk of the contiguous buffer, if any. */ 2106 if (sc->sc_tbc > 0) { 2107 int n; 2108 2109 n = sc->sc_tbc; 2110 if (n > sc->sc_fifolen) 2111 n = sc->sc_fifolen; 2112 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2113 sc->sc_tbc -= n; 2114 sc->sc_tba += n; 2115 } else { 2116 /* Disable transmit completion interrupts if necessary. */ 2117 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2118 CLR(sc->sc_ier, IER_ETXRDY); 2119 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2120 } 2121 if (sc->sc_tx_busy) { 2122 sc->sc_tx_busy = 0; 2123 sc->sc_tx_done = 1; 2124 } 2125 } 2126 } 2127 2128 /* Wake up the poller. */ 2129 #ifdef __GENERIC_SOFT_INTERRUPTS 2130 softintr_schedule(sc->sc_si); 2131 #else 2132 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2133 setsoftserial(); 2134 #else 2135 if (!com_softintr_scheduled) { 2136 com_softintr_scheduled = 1; 2137 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2138 } 2139 #endif 2140 #endif 2141 2142 #if NRND > 0 && defined(RND_COM) 2143 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2144 #endif 2145 2146 return (1); 2147 } 2148 2149 /* 2150 * The following functions are polled getc and putc routines, shared 2151 * by the console and kgdb glue. 2152 */ 2153 2154 int 2155 com_common_getc(iot, ioh) 2156 bus_space_tag_t iot; 2157 bus_space_handle_t ioh; 2158 { 2159 int s = splserial(); 2160 u_char stat, c; 2161 2162 /* block until a character becomes available */ 2163 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2164 ; 2165 2166 c = bus_space_read_1(iot, ioh, com_data); 2167 stat = bus_space_read_1(iot, ioh, com_iir); 2168 splx(s); 2169 return (c); 2170 } 2171 2172 void 2173 com_common_putc(iot, ioh, c) 2174 bus_space_tag_t iot; 2175 bus_space_handle_t ioh; 2176 int c; 2177 { 2178 int s = splserial(); 2179 int timo; 2180 2181 /* wait for any pending transmission to finish */ 2182 timo = 150000; 2183 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2184 continue; 2185 2186 bus_space_write_1(iot, ioh, com_data, c); 2187 COM_BARRIER(iot, ioh, BR | BW); 2188 2189 /* wait for this transmission to complete */ 2190 timo = 1500000; 2191 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2192 continue; 2193 2194 splx(s); 2195 } 2196 2197 /* 2198 * Initialize UART for use as console or KGDB line. 2199 */ 2200 int 2201 cominit(iot, iobase, rate, frequency, cflag, iohp) 2202 bus_space_tag_t iot; 2203 int iobase; 2204 int rate, frequency; 2205 tcflag_t cflag; 2206 bus_space_handle_t *iohp; 2207 { 2208 bus_space_handle_t ioh; 2209 2210 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2211 return (ENOMEM); /* ??? */ 2212 2213 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2214 bus_space_write_1(iot, ioh, com_efr, 0); 2215 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2216 rate = comspeed(rate, frequency); 2217 bus_space_write_1(iot, ioh, com_dlbl, rate); 2218 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2219 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2220 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2221 bus_space_write_1(iot, ioh, com_fifo, 2222 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2223 bus_space_write_1(iot, ioh, com_ier, 0); 2224 2225 *iohp = ioh; 2226 return (0); 2227 } 2228 2229 /* 2230 * Following are all routines needed for COM to act as console 2231 */ 2232 2233 int 2234 comcnattach(iot, iobase, rate, frequency, cflag) 2235 bus_space_tag_t iot; 2236 int iobase; 2237 int rate, frequency; 2238 tcflag_t cflag; 2239 { 2240 int res; 2241 static struct consdev comcons = { 2242 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2243 NODEV, CN_NORMAL 2244 }; 2245 2246 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2247 if (res) 2248 return (res); 2249 2250 cn_tab = &comcons; 2251 2252 comconstag = iot; 2253 comconsaddr = iobase; 2254 comconsrate = rate; 2255 comconscflag = cflag; 2256 2257 return (0); 2258 } 2259 2260 int 2261 comcngetc(dev) 2262 dev_t dev; 2263 { 2264 2265 return (com_common_getc(comconstag, comconsioh)); 2266 } 2267 2268 /* 2269 * Console kernel output character routine. 2270 */ 2271 void 2272 comcnputc(dev, c) 2273 dev_t dev; 2274 int c; 2275 { 2276 2277 com_common_putc(comconstag, comconsioh, c); 2278 } 2279 2280 void 2281 comcnpollc(dev, on) 2282 dev_t dev; 2283 int on; 2284 { 2285 2286 } 2287 2288 #ifdef KGDB 2289 int 2290 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2291 bus_space_tag_t iot; 2292 int iobase; 2293 int rate, frequency; 2294 tcflag_t cflag; 2295 { 2296 int res; 2297 2298 if (iot == comconstag && iobase == comconsaddr) 2299 return (EBUSY); /* cannot share with console */ 2300 2301 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2302 if (res) 2303 return (res); 2304 2305 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2306 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2307 2308 com_kgdb_iot = iot; 2309 com_kgdb_addr = iobase; 2310 2311 return (0); 2312 } 2313 2314 /* ARGSUSED */ 2315 int 2316 com_kgdb_getc(arg) 2317 void *arg; 2318 { 2319 2320 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2321 } 2322 2323 /* ARGSUSED */ 2324 void 2325 com_kgdb_putc(arg, c) 2326 void *arg; 2327 int c; 2328 { 2329 2330 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2331 } 2332 #endif /* KGDB */ 2333 2334 /* helper function to identify the com ports used by 2335 console or KGDB (and not yet autoconf attached) */ 2336 int 2337 com_is_console(iot, iobase, ioh) 2338 bus_space_tag_t iot; 2339 int iobase; 2340 bus_space_handle_t *ioh; 2341 { 2342 bus_space_handle_t help; 2343 2344 if (!comconsattached && 2345 iot == comconstag && iobase == comconsaddr) 2346 help = comconsioh; 2347 #ifdef KGDB 2348 else if (!com_kgdb_attached && 2349 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2350 help = com_kgdb_ioh; 2351 #endif 2352 else 2353 return (0); 2354 2355 if (ioh) 2356 *ioh = help; 2357 return (1); 2358 } 2359
Indexes created Sat Sep 27 22:09:54 GMT 2025