com.c revision 1.175
1 /* $NetBSD: com.c,v 1.175 2000/08/18 13:22:39 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_ddbparam.h" 81 #include "opt_com.h" 82 83 #include "rnd.h" 84 #if NRND > 0 && defined(RND_COM) 85 #include <sys/rnd.h> 86 #endif 87 88 #include <sys/param.h> 89 #include <sys/systm.h> 90 #include <sys/ioctl.h> 91 #include <sys/select.h> 92 #include <sys/tty.h> 93 #include <sys/proc.h> 94 #include <sys/user.h> 95 #include <sys/conf.h> 96 #include <sys/file.h> 97 #include <sys/uio.h> 98 #include <sys/kernel.h> 99 #include <sys/syslog.h> 100 #include <sys/types.h> 101 #include <sys/device.h> 102 #include <sys/malloc.h> 103 #include <sys/timepps.h> 104 #include <sys/vnode.h> 105 106 #include <machine/intr.h> 107 #include <machine/bus.h> 108 109 #include <dev/ic/comreg.h> 110 #include <dev/ic/comvar.h> 111 #include <dev/ic/ns16550reg.h> 112 #include <dev/ic/st16650reg.h> 113 #ifdef COM_HAYESP 114 #include <dev/ic/hayespreg.h> 115 #endif 116 #define com_lcr com_cfcr 117 #include <dev/cons.h> 118 119 #include "com.h" 120 121 #ifdef COM_HAYESP 122 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 123 #endif 124 125 #if defined(DDB) || defined(KGDB) 126 static void com_enable_debugport __P((struct com_softc *)); 127 #endif 128 void com_config __P((struct com_softc *)); 129 void com_shutdown __P((struct com_softc *)); 130 int comspeed __P((long, long)); 131 static u_char cflag2lcr __P((tcflag_t)); 132 int comparam __P((struct tty *, struct termios *)); 133 void comstart __P((struct tty *)); 134 void comstop __P((struct tty *, int)); 135 int comhwiflow __P((struct tty *, int)); 136 137 void com_loadchannelregs __P((struct com_softc *)); 138 void com_hwiflow __P((struct com_softc *)); 139 void com_break __P((struct com_softc *, int)); 140 void com_modem __P((struct com_softc *, int)); 141 void tiocm_to_com __P((struct com_softc *, int, int)); 142 int com_to_tiocm __P((struct com_softc *)); 143 void com_iflush __P((struct com_softc *)); 144 145 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 146 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 147 148 /* XXX: These belong elsewhere */ 149 cdev_decl(com); 150 bdev_decl(com); 151 152 int comcngetc __P((dev_t)); 153 void comcnputc __P((dev_t, int)); 154 void comcnpollc __P((dev_t, int)); 155 156 #define integrate static inline 157 #ifdef __GENERIC_SOFT_INTERRUPTS 158 void comsoft __P((void *)); 159 #else 160 #ifndef __NO_SOFT_SERIAL_INTERRUPT 161 void comsoft __P((void)); 162 #else 163 void comsoft __P((void *)); 164 struct callout comsoft_callout = CALLOUT_INITIALIZER; 165 #endif 166 #endif 167 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 170 integrate void com_schedrx __P((struct com_softc *)); 171 void comdiag __P((void *)); 172 173 extern struct cfdriver com_cd; 174 175 /* 176 * Make this an option variable one can patch. 177 * But be warned: this must be a power of 2! 178 */ 179 u_int com_rbuf_size = COM_RING_SIZE; 180 181 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 182 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 183 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 184 185 static int comconsaddr; 186 static bus_space_tag_t comconstag; 187 static bus_space_handle_t comconsioh; 188 static int comconsattached; 189 static int comconsrate; 190 static tcflag_t comconscflag; 191 192 static int ppscap = 193 PPS_TSFMT_TSPEC | 194 PPS_CAPTUREASSERT | 195 PPS_CAPTURECLEAR | 196 #ifdef PPS_SYNC 197 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 198 #endif /* PPS_SYNC */ 199 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 200 201 #ifndef __GENERIC_SOFT_INTERRUPTS 202 #ifdef __NO_SOFT_SERIAL_INTERRUPT 203 volatile int com_softintr_scheduled; 204 #endif 205 #endif 206 207 #ifdef KGDB 208 #include <sys/kgdb.h> 209 210 static int com_kgdb_addr; 211 static bus_space_tag_t com_kgdb_iot; 212 static bus_space_handle_t com_kgdb_ioh; 213 static int com_kgdb_attached; 214 215 int com_kgdb_getc __P((void *)); 216 void com_kgdb_putc __P((void *, int)); 217 #endif /* KGDB */ 218 219 #define COMUNIT_MASK 0x7ffff 220 #define COMDIALOUT_MASK 0x80000 221 222 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 223 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 224 225 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 226 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 227 228 #define BR BUS_SPACE_BARRIER_READ 229 #define BW BUS_SPACE_BARRIER_WRITE 230 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 231 232 int 233 comspeed(speed, frequency) 234 long speed, frequency; 235 { 236 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 237 238 int x, err; 239 240 #if 0 241 if (speed == 0) 242 return (0); 243 #endif 244 if (speed <= 0) 245 return (-1); 246 x = divrnd(frequency / 16, speed); 247 if (x <= 0) 248 return (-1); 249 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 250 if (err < 0) 251 err = -err; 252 if (err > COM_TOLERANCE) 253 return (-1); 254 return (x); 255 256 #undef divrnd 257 } 258 259 #ifdef COM_DEBUG 260 int com_debug = 0; 261 262 void comstatus __P((struct com_softc *, char *)); 263 void 264 comstatus(sc, str) 265 struct com_softc *sc; 266 char *str; 267 { 268 struct tty *tp = sc->sc_tty; 269 270 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 271 sc->sc_dev.dv_xname, str, 272 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 273 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 274 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 275 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 276 sc->sc_tx_stopped ? "+" : "-"); 277 278 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 279 sc->sc_dev.dv_xname, str, 280 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 281 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 282 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 283 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 284 sc->sc_rx_flags); 285 } 286 #endif 287 288 int 289 comprobe1(iot, ioh) 290 bus_space_tag_t iot; 291 bus_space_handle_t ioh; 292 { 293 294 /* force access to id reg */ 295 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 296 bus_space_write_1(iot, ioh, com_iir, 0); 297 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 298 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 299 return (0); 300 301 return (1); 302 } 303 304 #ifdef COM_HAYESP 305 int 306 comprobeHAYESP(hayespioh, sc) 307 bus_space_handle_t hayespioh; 308 struct com_softc *sc; 309 { 310 char val, dips; 311 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 312 bus_space_tag_t iot = sc->sc_iot; 313 314 /* 315 * Hayes ESP cards have two iobases. One is for compatibility with 316 * 16550 serial chips, and at the same ISA PC base addresses. The 317 * other is for ESP-specific enhanced features, and lies at a 318 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 319 */ 320 321 /* Test for ESP signature */ 322 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 323 return (0); 324 325 /* 326 * ESP is present at ESP enhanced base address; unknown com port 327 */ 328 329 /* Get the dip-switch configurations */ 330 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 331 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 332 333 /* Determine which com port this ESP card services: bits 0,1 of */ 334 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 335 if (sc->sc_iobase != combaselist[dips & 0x03]) 336 return (0); 337 338 printf(": ESP"); 339 340 /* Check ESP Self Test bits. */ 341 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 342 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 344 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 345 if ((val & 0x70) < 0x20) { 346 printf("-old (%o)", val & 0x70); 347 /* we do not support the necessary features */ 348 return (0); 349 } 350 351 /* Check for ability to emulate 16550: bit 8 == 1 */ 352 if ((dips & 0x80) == 0) { 353 printf(" slave"); 354 /* XXX Does slave really mean no 16550 support?? */ 355 return (0); 356 } 357 358 /* 359 * If we made it this far, we are a full-featured ESP v2.0 (or 360 * better), at the correct com port address. 361 */ 362 363 SET(sc->sc_hwflags, COM_HW_HAYESP); 364 printf(", 1024 byte fifo\n"); 365 return (1); 366 } 367 #endif 368 369 #if defined(DDB) || defined(KGDB) 370 static void 371 com_enable_debugport(sc) 372 struct com_softc *sc; 373 { 374 int s; 375 376 /* Turn on line break interrupt, set carrier. */ 377 s = splserial(); 378 sc->sc_ier = IER_ERXRDY; 379 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 380 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 381 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 382 splx(s); 383 } 384 #endif 385 386 void 387 com_attach_subr(sc) 388 struct com_softc *sc; 389 { 390 int iobase = sc->sc_iobase; 391 bus_space_tag_t iot = sc->sc_iot; 392 bus_space_handle_t ioh = sc->sc_ioh; 393 struct tty *tp; 394 #ifdef COM16650 395 u_int8_t lcr; 396 #endif 397 #ifdef COM_HAYESP 398 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 399 int *hayespp; 400 #endif 401 402 callout_init(&sc->sc_diag_callout); 403 404 /* Disable interrupts before configuring the device. */ 405 sc->sc_ier = 0; 406 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 407 408 if (iot == comconstag && iobase == comconsaddr) { 409 comconsattached = 1; 410 411 /* Make sure the console is always "hardwired". */ 412 delay(1000); /* wait for output to finish */ 413 SET(sc->sc_hwflags, COM_HW_CONSOLE); 414 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 415 } 416 417 #ifdef COM_HAYESP 418 /* Look for a Hayes ESP board. */ 419 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 420 bus_space_handle_t hayespioh; 421 422 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 423 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 424 continue; 425 if (comprobeHAYESP(hayespioh, sc)) { 426 sc->sc_hayespioh = hayespioh; 427 sc->sc_fifolen = 1024; 428 429 break; 430 } 431 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 432 } 433 /* No ESP; look for other things. */ 434 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 435 #endif 436 sc->sc_fifolen = 1; 437 /* look for a NS 16550AF UART with FIFOs */ 438 bus_space_write_1(iot, ioh, com_fifo, 439 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 440 delay(100); 441 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 442 == IIR_FIFO_MASK) 443 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 444 == FIFO_TRIGGER_14) { 445 SET(sc->sc_hwflags, COM_HW_FIFO); 446 447 #ifdef COM16650 448 /* 449 * IIR changes into the EFR if LCR is set to LCR_EERS 450 * on 16650s. We also know IIR != 0 at this point. 451 * Write 0 into the EFR, and read it. If the result 452 * is 0, we have a 16650. 453 * 454 * Older 16650s were broken; the test to detect them 455 * is taken from the Linux driver. Apparently 456 * setting DLAB enable gives access to the EFR on 457 * these chips. 458 */ 459 lcr = bus_space_read_1(iot, ioh, com_lcr); 460 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 461 bus_space_write_1(iot, ioh, com_efr, 0); 462 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 463 bus_space_write_1(iot, ioh, com_lcr, 464 lcr | LCR_DLAB); 465 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 466 CLR(sc->sc_hwflags, COM_HW_FIFO); 467 sc->sc_fifolen = 0; 468 } else { 469 SET(sc->sc_hwflags, COM_HW_FLOW); 470 sc->sc_fifolen = 32; 471 } 472 } else 473 #endif 474 sc->sc_fifolen = 16; 475 476 #ifdef COM16650 477 bus_space_write_1(iot, ioh, com_lcr, lcr); 478 if (sc->sc_fifolen == 0) 479 printf(": st16650, broken fifo\n"); 480 else if (sc->sc_fifolen == 32) 481 printf(": st16650a, working fifo\n"); 482 else 483 #endif 484 printf(": ns16550a, working fifo\n"); 485 } else 486 printf(": ns16550, broken fifo\n"); 487 else 488 printf(": ns8250 or ns16450, no fifo\n"); 489 bus_space_write_1(iot, ioh, com_fifo, 0); 490 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 491 sc->sc_fifolen = 1; 492 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 493 } 494 #ifdef COM_HAYESP 495 } 496 #endif 497 498 tp = ttymalloc(); 499 tp->t_oproc = comstart; 500 tp->t_param = comparam; 501 tp->t_hwiflow = comhwiflow; 502 503 sc->sc_tty = tp; 504 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 505 if (sc->sc_rbuf == NULL) { 506 printf("%s: unable to allocate ring buffer\n", 507 sc->sc_dev.dv_xname); 508 return; 509 } 510 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 511 512 tty_attach(tp); 513 514 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 515 SET(sc->sc_mcr, MCR_IENABLE); 516 517 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 518 int maj; 519 520 /* locate the major number */ 521 for (maj = 0; maj < nchrdev; maj++) 522 if (cdevsw[maj].d_open == comopen) 523 break; 524 525 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 526 527 printf("%s: console\n", sc->sc_dev.dv_xname); 528 } 529 530 #ifdef KGDB 531 /* 532 * Allow kgdb to "take over" this port. If this is 533 * the kgdb device, it has exclusive use. 534 */ 535 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 536 com_kgdb_attached = 1; 537 538 SET(sc->sc_hwflags, COM_HW_KGDB); 539 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 540 } 541 #endif 542 543 #ifdef __GENERIC_SOFT_INTERRUPTS 544 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 545 #endif 546 547 #if NRND > 0 && defined(RND_COM) 548 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 549 RND_TYPE_TTY, 0); 550 #endif 551 552 /* if there are no enable/disable functions, assume the device 553 is always enabled */ 554 if (!sc->enable) 555 sc->enabled = 1; 556 557 com_config(sc); 558 559 SET(sc->sc_hwflags, COM_HW_DEV_OK); 560 } 561 562 void 563 com_config(sc) 564 struct com_softc *sc; 565 { 566 bus_space_tag_t iot = sc->sc_iot; 567 bus_space_handle_t ioh = sc->sc_ioh; 568 569 /* Disable interrupts before configuring the device. */ 570 sc->sc_ier = 0; 571 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 572 573 #ifdef COM_HAYESP 574 /* Look for a Hayes ESP board. */ 575 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 576 sc->sc_fifolen = 1024; 577 578 /* Set 16550 compatibility mode */ 579 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETMODE); 581 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 583 HAYESP_MODE_SCALE); 584 585 /* Set RTS/CTS flow control */ 586 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 587 HAYESP_SETFLOWTYPE); 588 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 589 HAYESP_FLOW_RTS); 590 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 591 HAYESP_FLOW_CTS); 592 593 /* Set flow control levels */ 594 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 595 HAYESP_SETRXFLOW); 596 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 597 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 598 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 599 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 600 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 601 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 603 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 604 } 605 #endif 606 607 #ifdef DDB 608 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 609 com_enable_debugport(sc); 610 #endif 611 612 #ifdef KGDB 613 /* 614 * Allow kgdb to "take over" this port. If this is 615 * the kgdb device, it has exclusive use. 616 */ 617 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 618 com_enable_debugport(sc); 619 #endif 620 } 621 622 int 623 com_detach(self, flags) 624 struct device *self; 625 int flags; 626 { 627 struct com_softc *sc = (struct com_softc *)self; 628 int maj, mn; 629 630 /* locate the major number */ 631 for (maj = 0; maj < nchrdev; maj++) 632 if (cdevsw[maj].d_open == comopen) 633 break; 634 635 /* Nuke the vnodes for any open instances. */ 636 mn = self->dv_unit; 637 vdevgone(maj, mn, mn, VCHR); 638 639 mn |= COMDIALOUT_MASK; 640 vdevgone(maj, mn, mn, VCHR); 641 642 /* Free the receive buffer. */ 643 free(sc->sc_rbuf, M_DEVBUF); 644 645 /* Detach and free the tty. */ 646 tty_detach(sc->sc_tty); 647 ttyfree(sc->sc_tty); 648 649 #ifdef __GENERIC_SOFT_INTERRUPTS 650 /* Unhook the soft interrupt handler. */ 651 softintr_disestablish(sc->sc_si); 652 #endif 653 654 #if NRND > 0 && defined(RND_COM) 655 /* Unhook the entropy source. */ 656 rnd_detach_source(&sc->rnd_source); 657 #endif 658 659 return (0); 660 } 661 662 int 663 com_activate(self, act) 664 struct device *self; 665 enum devact act; 666 { 667 struct com_softc *sc = (struct com_softc *)self; 668 int s, rv = 0; 669 670 s = splserial(); 671 switch (act) { 672 case DVACT_ACTIVATE: 673 rv = EOPNOTSUPP; 674 break; 675 676 case DVACT_DEACTIVATE: 677 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 678 rv = EBUSY; 679 break; 680 } 681 682 if (sc->disable != NULL && sc->enabled != 0) { 683 (*sc->disable)(sc); 684 sc->enabled = 0; 685 } 686 break; 687 } 688 splx(s); 689 return (rv); 690 } 691 692 void 693 com_shutdown(sc) 694 struct com_softc *sc; 695 { 696 struct tty *tp = sc->sc_tty; 697 int s; 698 699 s = splserial(); 700 701 /* If we were asserting flow control, then deassert it. */ 702 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 703 com_hwiflow(sc); 704 705 /* Clear any break condition set with TIOCSBRK. */ 706 com_break(sc, 0); 707 708 /* Turn off PPS capture on last close. */ 709 sc->sc_ppsmask = 0; 710 sc->ppsparam.mode = 0; 711 712 /* 713 * Hang up if necessary. Wait a bit, so the other side has time to 714 * notice even if we immediately open the port again. 715 * Avoid tsleeping above splhigh(). 716 */ 717 if (ISSET(tp->t_cflag, HUPCL)) { 718 com_modem(sc, 0); 719 splx(s); 720 /* XXX tsleep will only timeout */ 721 (void) tsleep(sc, TTIPRI, ttclos, hz); 722 s = splserial(); 723 } 724 725 /* Turn off interrupts. */ 726 #ifdef DDB 727 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 728 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 729 else 730 #endif 731 sc->sc_ier = 0; 732 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 733 734 if (sc->disable) { 735 #ifdef DIAGNOSTIC 736 if (!sc->enabled) 737 panic("com_shutdown: not enabled?"); 738 #endif 739 (*sc->disable)(sc); 740 sc->enabled = 0; 741 } 742 743 splx(s); 744 } 745 746 int 747 comopen(dev, flag, mode, p) 748 dev_t dev; 749 int flag, mode; 750 struct proc *p; 751 { 752 struct com_softc *sc; 753 struct tty *tp; 754 int s, s2; 755 int error; 756 757 sc = device_lookup(&com_cd, COMUNIT(dev)); 758 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 759 sc->sc_rbuf == NULL) 760 return (ENXIO); 761 762 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 763 return (ENXIO); 764 765 #ifdef KGDB 766 /* 767 * If this is the kgdb port, no other use is permitted. 768 */ 769 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 770 return (EBUSY); 771 #endif 772 773 tp = sc->sc_tty; 774 775 if (ISSET(tp->t_state, TS_ISOPEN) && 776 ISSET(tp->t_state, TS_XCLUDE) && 777 p->p_ucred->cr_uid != 0) 778 return (EBUSY); 779 780 s = spltty(); 781 782 /* 783 * Do the following iff this is a first open. 784 */ 785 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 786 struct termios t; 787 788 tp->t_dev = dev; 789 790 s2 = splserial(); 791 792 if (sc->enable) { 793 if ((*sc->enable)(sc)) { 794 splx(s2); 795 splx(s); 796 printf("%s: device enable failed\n", 797 sc->sc_dev.dv_xname); 798 return (EIO); 799 } 800 sc->enabled = 1; 801 com_config(sc); 802 } 803 804 /* Turn on interrupts. */ 805 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 806 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 807 808 /* Fetch the current modem control status, needed later. */ 809 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 810 811 /* Clear PPS capture state on first open. */ 812 sc->sc_ppsmask = 0; 813 sc->ppsparam.mode = 0; 814 815 splx(s2); 816 817 /* 818 * Initialize the termios status to the defaults. Add in the 819 * sticky bits from TIOCSFLAGS. 820 */ 821 t.c_ispeed = 0; 822 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 823 t.c_ospeed = comconsrate; 824 t.c_cflag = comconscflag; 825 } else { 826 t.c_ospeed = TTYDEF_SPEED; 827 t.c_cflag = TTYDEF_CFLAG; 828 } 829 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 830 SET(t.c_cflag, CLOCAL); 831 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 832 SET(t.c_cflag, CRTSCTS); 833 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 834 SET(t.c_cflag, MDMBUF); 835 /* Make sure comparam() will do something. */ 836 tp->t_ospeed = 0; 837 (void) comparam(tp, &t); 838 tp->t_iflag = TTYDEF_IFLAG; 839 tp->t_oflag = TTYDEF_OFLAG; 840 tp->t_lflag = TTYDEF_LFLAG; 841 ttychars(tp); 842 ttsetwater(tp); 843 844 s2 = splserial(); 845 846 /* 847 * Turn on DTR. We must always do this, even if carrier is not 848 * present, because otherwise we'd have to use TIOCSDTR 849 * immediately after setting CLOCAL, which applications do not 850 * expect. We always assert DTR while the device is open 851 * unless explicitly requested to deassert it. 852 */ 853 com_modem(sc, 1); 854 855 /* Clear the input ring, and unblock. */ 856 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 857 sc->sc_rbavail = com_rbuf_size; 858 com_iflush(sc); 859 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 860 com_hwiflow(sc); 861 862 #ifdef COM_DEBUG 863 if (com_debug) 864 comstatus(sc, "comopen "); 865 #endif 866 867 splx(s2); 868 } 869 870 splx(s); 871 872 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 873 if (error) 874 goto bad; 875 876 error = (*linesw[tp->t_line].l_open)(dev, tp); 877 if (error) 878 goto bad; 879 880 return (0); 881 882 bad: 883 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 884 /* 885 * We failed to open the device, and nobody else had it opened. 886 * Clean up the state as appropriate. 887 */ 888 com_shutdown(sc); 889 } 890 891 return (error); 892 } 893 894 int 895 comclose(dev, flag, mode, p) 896 dev_t dev; 897 int flag, mode; 898 struct proc *p; 899 { 900 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 901 struct tty *tp = sc->sc_tty; 902 903 /* XXX This is for cons.c. */ 904 if (!ISSET(tp->t_state, TS_ISOPEN)) 905 return (0); 906 907 (*linesw[tp->t_line].l_close)(tp, flag); 908 ttyclose(tp); 909 910 if (COM_ISALIVE(sc) == 0) 911 return (0); 912 913 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 914 /* 915 * Although we got a last close, the device may still be in 916 * use; e.g. if this was the dialout node, and there are still 917 * processes waiting for carrier on the non-dialout node. 918 */ 919 com_shutdown(sc); 920 } 921 922 return (0); 923 } 924 925 int 926 comread(dev, uio, flag) 927 dev_t dev; 928 struct uio *uio; 929 int flag; 930 { 931 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 932 struct tty *tp = sc->sc_tty; 933 934 if (COM_ISALIVE(sc) == 0) 935 return (EIO); 936 937 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 938 } 939 940 int 941 comwrite(dev, uio, flag) 942 dev_t dev; 943 struct uio *uio; 944 int flag; 945 { 946 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 if (COM_ISALIVE(sc) == 0) 950 return (EIO); 951 952 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 953 } 954 955 struct tty * 956 comtty(dev) 957 dev_t dev; 958 { 959 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 return (tp); 963 } 964 965 int 966 comioctl(dev, cmd, data, flag, p) 967 dev_t dev; 968 u_long cmd; 969 caddr_t data; 970 int flag; 971 struct proc *p; 972 { 973 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 974 struct tty *tp = sc->sc_tty; 975 int error; 976 int s; 977 978 if (COM_ISALIVE(sc) == 0) 979 return (EIO); 980 981 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 982 if (error >= 0) 983 return (error); 984 985 error = ttioctl(tp, cmd, data, flag, p); 986 if (error >= 0) 987 return (error); 988 989 error = 0; 990 991 s = splserial(); 992 993 switch (cmd) { 994 case TIOCSBRK: 995 com_break(sc, 1); 996 break; 997 998 case TIOCCBRK: 999 com_break(sc, 0); 1000 break; 1001 1002 case TIOCSDTR: 1003 com_modem(sc, 1); 1004 break; 1005 1006 case TIOCCDTR: 1007 com_modem(sc, 0); 1008 break; 1009 1010 case TIOCGFLAGS: 1011 *(int *)data = sc->sc_swflags; 1012 break; 1013 1014 case TIOCSFLAGS: 1015 error = suser(p->p_ucred, &p->p_acflag); 1016 if (error) 1017 break; 1018 sc->sc_swflags = *(int *)data; 1019 break; 1020 1021 case TIOCMSET: 1022 case TIOCMBIS: 1023 case TIOCMBIC: 1024 tiocm_to_com(sc, cmd, *(int *)data); 1025 break; 1026 1027 case TIOCMGET: 1028 *(int *)data = com_to_tiocm(sc); 1029 break; 1030 1031 case PPS_IOC_CREATE: 1032 break; 1033 1034 case PPS_IOC_DESTROY: 1035 break; 1036 1037 case PPS_IOC_GETPARAMS: { 1038 pps_params_t *pp; 1039 pp = (pps_params_t *)data; 1040 *pp = sc->ppsparam; 1041 break; 1042 } 1043 1044 case PPS_IOC_SETPARAMS: { 1045 pps_params_t *pp; 1046 int mode; 1047 pp = (pps_params_t *)data; 1048 if (pp->mode & ~ppscap) { 1049 error = EINVAL; 1050 break; 1051 } 1052 sc->ppsparam = *pp; 1053 /* 1054 * Compute msr masks from user-specified timestamp state. 1055 */ 1056 mode = sc->ppsparam.mode; 1057 #ifdef PPS_SYNC 1058 if (mode & PPS_HARDPPSONASSERT) { 1059 mode |= PPS_CAPTUREASSERT; 1060 /* XXX revoke any previous HARDPPS source */ 1061 } 1062 if (mode & PPS_HARDPPSONCLEAR) { 1063 mode |= PPS_CAPTURECLEAR; 1064 /* XXX revoke any previous HARDPPS source */ 1065 } 1066 #endif /* PPS_SYNC */ 1067 switch (mode & PPS_CAPTUREBOTH) { 1068 case 0: 1069 sc->sc_ppsmask = 0; 1070 break; 1071 1072 case PPS_CAPTUREASSERT: 1073 sc->sc_ppsmask = MSR_DCD; 1074 sc->sc_ppsassert = MSR_DCD; 1075 sc->sc_ppsclear = -1; 1076 break; 1077 1078 case PPS_CAPTURECLEAR: 1079 sc->sc_ppsmask = MSR_DCD; 1080 sc->sc_ppsassert = -1; 1081 sc->sc_ppsclear = 0; 1082 break; 1083 1084 case PPS_CAPTUREBOTH: 1085 sc->sc_ppsmask = MSR_DCD; 1086 sc->sc_ppsassert = MSR_DCD; 1087 sc->sc_ppsclear = 0; 1088 break; 1089 1090 default: 1091 error = EINVAL; 1092 break; 1093 } 1094 break; 1095 } 1096 1097 case PPS_IOC_GETCAP: 1098 *(int*)data = ppscap; 1099 break; 1100 1101 case PPS_IOC_FETCH: { 1102 pps_info_t *pi; 1103 pi = (pps_info_t *)data; 1104 *pi = sc->ppsinfo; 1105 break; 1106 } 1107 1108 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1109 /* 1110 * Some GPS clocks models use the falling rather than 1111 * rising edge as the on-the-second signal. 1112 * The old API has no way to specify PPS polarity. 1113 */ 1114 sc->sc_ppsmask = MSR_DCD; 1115 #ifndef PPS_TRAILING_EDGE 1116 sc->sc_ppsassert = MSR_DCD; 1117 sc->sc_ppsclear = -1; 1118 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1119 &sc->ppsinfo.assert_timestamp); 1120 #else 1121 sc->sc_ppsassert = -1 1122 sc->sc_ppsclear = 0; 1123 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1124 &sc->ppsinfo.clear_timestamp); 1125 #endif 1126 break; 1127 1128 default: 1129 error = ENOTTY; 1130 break; 1131 } 1132 1133 splx(s); 1134 1135 #ifdef COM_DEBUG 1136 if (com_debug) 1137 comstatus(sc, "comioctl "); 1138 #endif 1139 1140 return (error); 1141 } 1142 1143 integrate void 1144 com_schedrx(sc) 1145 struct com_softc *sc; 1146 { 1147 1148 sc->sc_rx_ready = 1; 1149 1150 /* Wake up the poller. */ 1151 #ifdef __GENERIC_SOFT_INTERRUPTS 1152 softintr_schedule(sc->sc_si); 1153 #else 1154 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1155 setsoftserial(); 1156 #else 1157 if (!com_softintr_scheduled) { 1158 com_softintr_scheduled = 1; 1159 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1160 } 1161 #endif 1162 #endif 1163 } 1164 1165 void 1166 com_break(sc, onoff) 1167 struct com_softc *sc; 1168 int onoff; 1169 { 1170 1171 if (onoff) 1172 SET(sc->sc_lcr, LCR_SBREAK); 1173 else 1174 CLR(sc->sc_lcr, LCR_SBREAK); 1175 1176 if (!sc->sc_heldchange) { 1177 if (sc->sc_tx_busy) { 1178 sc->sc_heldtbc = sc->sc_tbc; 1179 sc->sc_tbc = 0; 1180 sc->sc_heldchange = 1; 1181 } else 1182 com_loadchannelregs(sc); 1183 } 1184 } 1185 1186 void 1187 com_modem(sc, onoff) 1188 struct com_softc *sc; 1189 int onoff; 1190 { 1191 1192 if (sc->sc_mcr_dtr == 0) 1193 return; 1194 1195 if (onoff) 1196 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1197 else 1198 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1199 1200 if (!sc->sc_heldchange) { 1201 if (sc->sc_tx_busy) { 1202 sc->sc_heldtbc = sc->sc_tbc; 1203 sc->sc_tbc = 0; 1204 sc->sc_heldchange = 1; 1205 } else 1206 com_loadchannelregs(sc); 1207 } 1208 } 1209 1210 void 1211 tiocm_to_com(sc, how, ttybits) 1212 struct com_softc *sc; 1213 int how, ttybits; 1214 { 1215 u_char combits; 1216 1217 combits = 0; 1218 if (ISSET(ttybits, TIOCM_DTR)) 1219 SET(combits, MCR_DTR); 1220 if (ISSET(ttybits, TIOCM_RTS)) 1221 SET(combits, MCR_RTS); 1222 1223 switch (how) { 1224 case TIOCMBIC: 1225 CLR(sc->sc_mcr, combits); 1226 break; 1227 1228 case TIOCMBIS: 1229 SET(sc->sc_mcr, combits); 1230 break; 1231 1232 case TIOCMSET: 1233 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1234 SET(sc->sc_mcr, combits); 1235 break; 1236 } 1237 1238 if (!sc->sc_heldchange) { 1239 if (sc->sc_tx_busy) { 1240 sc->sc_heldtbc = sc->sc_tbc; 1241 sc->sc_tbc = 0; 1242 sc->sc_heldchange = 1; 1243 } else 1244 com_loadchannelregs(sc); 1245 } 1246 } 1247 1248 int 1249 com_to_tiocm(sc) 1250 struct com_softc *sc; 1251 { 1252 u_char combits; 1253 int ttybits = 0; 1254 1255 combits = sc->sc_mcr; 1256 if (ISSET(combits, MCR_DTR)) 1257 SET(ttybits, TIOCM_DTR); 1258 if (ISSET(combits, MCR_RTS)) 1259 SET(ttybits, TIOCM_RTS); 1260 1261 combits = sc->sc_msr; 1262 if (ISSET(combits, MSR_DCD)) 1263 SET(ttybits, TIOCM_CD); 1264 if (ISSET(combits, MSR_CTS)) 1265 SET(ttybits, TIOCM_CTS); 1266 if (ISSET(combits, MSR_DSR)) 1267 SET(ttybits, TIOCM_DSR); 1268 if (ISSET(combits, MSR_RI | MSR_TERI)) 1269 SET(ttybits, TIOCM_RI); 1270 1271 if (sc->sc_ier != 0) 1272 SET(ttybits, TIOCM_LE); 1273 1274 return (ttybits); 1275 } 1276 1277 static u_char 1278 cflag2lcr(cflag) 1279 tcflag_t cflag; 1280 { 1281 u_char lcr = 0; 1282 1283 switch (ISSET(cflag, CSIZE)) { 1284 case CS5: 1285 SET(lcr, LCR_5BITS); 1286 break; 1287 case CS6: 1288 SET(lcr, LCR_6BITS); 1289 break; 1290 case CS7: 1291 SET(lcr, LCR_7BITS); 1292 break; 1293 case CS8: 1294 SET(lcr, LCR_8BITS); 1295 break; 1296 } 1297 if (ISSET(cflag, PARENB)) { 1298 SET(lcr, LCR_PENAB); 1299 if (!ISSET(cflag, PARODD)) 1300 SET(lcr, LCR_PEVEN); 1301 } 1302 if (ISSET(cflag, CSTOPB)) 1303 SET(lcr, LCR_STOPB); 1304 1305 return (lcr); 1306 } 1307 1308 int 1309 comparam(tp, t) 1310 struct tty *tp; 1311 struct termios *t; 1312 { 1313 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1314 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1315 u_char lcr; 1316 int s; 1317 1318 if (COM_ISALIVE(sc) == 0) 1319 return (EIO); 1320 1321 /* Check requested parameters. */ 1322 if (ospeed < 0) 1323 return (EINVAL); 1324 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1325 return (EINVAL); 1326 1327 /* 1328 * For the console, always force CLOCAL and !HUPCL, so that the port 1329 * is always active. 1330 */ 1331 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1332 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1333 SET(t->c_cflag, CLOCAL); 1334 CLR(t->c_cflag, HUPCL); 1335 } 1336 1337 /* 1338 * If there were no changes, don't do anything. This avoids dropping 1339 * input and improves performance when all we did was frob things like 1340 * VMIN and VTIME. 1341 */ 1342 if (tp->t_ospeed == t->c_ospeed && 1343 tp->t_cflag == t->c_cflag) 1344 return (0); 1345 1346 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1347 1348 s = splserial(); 1349 1350 sc->sc_lcr = lcr; 1351 1352 /* 1353 * If we're not in a mode that assumes a connection is present, then 1354 * ignore carrier changes. 1355 */ 1356 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1357 sc->sc_msr_dcd = 0; 1358 else 1359 sc->sc_msr_dcd = MSR_DCD; 1360 /* 1361 * Set the flow control pins depending on the current flow control 1362 * mode. 1363 */ 1364 if (ISSET(t->c_cflag, CRTSCTS)) { 1365 sc->sc_mcr_dtr = MCR_DTR; 1366 sc->sc_mcr_rts = MCR_RTS; 1367 sc->sc_msr_cts = MSR_CTS; 1368 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1369 } else if (ISSET(t->c_cflag, MDMBUF)) { 1370 /* 1371 * For DTR/DCD flow control, make sure we don't toggle DTR for 1372 * carrier detection. 1373 */ 1374 sc->sc_mcr_dtr = 0; 1375 sc->sc_mcr_rts = MCR_DTR; 1376 sc->sc_msr_cts = MSR_DCD; 1377 sc->sc_efr = 0; 1378 } else { 1379 /* 1380 * If no flow control, then always set RTS. This will make 1381 * the other side happy if it mistakenly thinks we're doing 1382 * RTS/CTS flow control. 1383 */ 1384 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1385 sc->sc_mcr_rts = 0; 1386 sc->sc_msr_cts = 0; 1387 sc->sc_efr = 0; 1388 if (ISSET(sc->sc_mcr, MCR_DTR)) 1389 SET(sc->sc_mcr, MCR_RTS); 1390 else 1391 CLR(sc->sc_mcr, MCR_RTS); 1392 } 1393 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1394 1395 #if 0 1396 if (ospeed == 0) 1397 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1398 else 1399 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1400 #endif 1401 1402 sc->sc_dlbl = ospeed; 1403 sc->sc_dlbh = ospeed >> 8; 1404 1405 /* 1406 * Set the FIFO threshold based on the receive speed. 1407 * 1408 * * If it's a low speed, it's probably a mouse or some other 1409 * interactive device, so set the threshold low. 1410 * * If it's a high speed, trim the trigger level down to prevent 1411 * overflows. 1412 * * Otherwise set it a bit higher. 1413 */ 1414 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1415 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1416 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1417 sc->sc_fifo = FIFO_ENABLE | 1418 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1419 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1420 else 1421 sc->sc_fifo = 0; 1422 1423 /* And copy to tty. */ 1424 tp->t_ispeed = 0; 1425 tp->t_ospeed = t->c_ospeed; 1426 tp->t_cflag = t->c_cflag; 1427 1428 if (!sc->sc_heldchange) { 1429 if (sc->sc_tx_busy) { 1430 sc->sc_heldtbc = sc->sc_tbc; 1431 sc->sc_tbc = 0; 1432 sc->sc_heldchange = 1; 1433 } else 1434 com_loadchannelregs(sc); 1435 } 1436 1437 if (!ISSET(t->c_cflag, CHWFLOW)) { 1438 /* Disable the high water mark. */ 1439 sc->sc_r_hiwat = 0; 1440 sc->sc_r_lowat = 0; 1441 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1442 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1443 com_schedrx(sc); 1444 } 1445 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1446 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1447 com_hwiflow(sc); 1448 } 1449 } else { 1450 sc->sc_r_hiwat = com_rbuf_hiwat; 1451 sc->sc_r_lowat = com_rbuf_lowat; 1452 } 1453 1454 splx(s); 1455 1456 /* 1457 * Update the tty layer's idea of the carrier bit, in case we changed 1458 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1459 * explicit request. 1460 */ 1461 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1462 1463 #ifdef COM_DEBUG 1464 if (com_debug) 1465 comstatus(sc, "comparam "); 1466 #endif 1467 1468 if (!ISSET(t->c_cflag, CHWFLOW)) { 1469 if (sc->sc_tx_stopped) { 1470 sc->sc_tx_stopped = 0; 1471 comstart(tp); 1472 } 1473 } 1474 1475 return (0); 1476 } 1477 1478 void 1479 com_iflush(sc) 1480 struct com_softc *sc; 1481 { 1482 bus_space_tag_t iot = sc->sc_iot; 1483 bus_space_handle_t ioh = sc->sc_ioh; 1484 #ifdef DIAGNOSTIC 1485 int reg; 1486 #endif 1487 int timo; 1488 1489 #ifdef DIAGNOSTIC 1490 reg = 0xffff; 1491 #endif 1492 timo = 50000; 1493 /* flush any pending I/O */ 1494 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1495 && --timo) 1496 #ifdef DIAGNOSTIC 1497 reg = 1498 #else 1499 (void) 1500 #endif 1501 bus_space_read_1(iot, ioh, com_data); 1502 #ifdef DIAGNOSTIC 1503 if (!timo) 1504 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1505 reg); 1506 #endif 1507 } 1508 1509 void 1510 com_loadchannelregs(sc) 1511 struct com_softc *sc; 1512 { 1513 bus_space_tag_t iot = sc->sc_iot; 1514 bus_space_handle_t ioh = sc->sc_ioh; 1515 1516 /* XXXXX necessary? */ 1517 com_iflush(sc); 1518 1519 bus_space_write_1(iot, ioh, com_ier, 0); 1520 1521 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1522 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1523 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1524 } 1525 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1526 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1527 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1528 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1529 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1530 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1531 1532 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1533 } 1534 1535 int 1536 comhwiflow(tp, block) 1537 struct tty *tp; 1538 int block; 1539 { 1540 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1541 int s; 1542 1543 if (COM_ISALIVE(sc) == 0) 1544 return (0); 1545 1546 if (sc->sc_mcr_rts == 0) 1547 return (0); 1548 1549 s = splserial(); 1550 if (block) { 1551 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1552 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1553 com_hwiflow(sc); 1554 } 1555 } else { 1556 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1557 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1558 com_schedrx(sc); 1559 } 1560 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1561 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1562 com_hwiflow(sc); 1563 } 1564 } 1565 splx(s); 1566 return (1); 1567 } 1568 1569 /* 1570 * (un)block input via hw flowcontrol 1571 */ 1572 void 1573 com_hwiflow(sc) 1574 struct com_softc *sc; 1575 { 1576 bus_space_tag_t iot = sc->sc_iot; 1577 bus_space_handle_t ioh = sc->sc_ioh; 1578 1579 if (sc->sc_mcr_rts == 0) 1580 return; 1581 1582 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1583 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1584 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1585 } else { 1586 SET(sc->sc_mcr, sc->sc_mcr_rts); 1587 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1588 } 1589 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1590 } 1591 1592 1593 void 1594 comstart(tp) 1595 struct tty *tp; 1596 { 1597 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1598 bus_space_tag_t iot = sc->sc_iot; 1599 bus_space_handle_t ioh = sc->sc_ioh; 1600 int s; 1601 1602 if (COM_ISALIVE(sc) == 0) 1603 return; 1604 1605 s = spltty(); 1606 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1607 goto out; 1608 if (sc->sc_tx_stopped) 1609 goto out; 1610 1611 if (tp->t_outq.c_cc <= tp->t_lowat) { 1612 if (ISSET(tp->t_state, TS_ASLEEP)) { 1613 CLR(tp->t_state, TS_ASLEEP); 1614 wakeup(&tp->t_outq); 1615 } 1616 selwakeup(&tp->t_wsel); 1617 if (tp->t_outq.c_cc == 0) 1618 goto out; 1619 } 1620 1621 /* Grab the first contiguous region of buffer space. */ 1622 { 1623 u_char *tba; 1624 int tbc; 1625 1626 tba = tp->t_outq.c_cf; 1627 tbc = ndqb(&tp->t_outq, 0); 1628 1629 (void)splserial(); 1630 1631 sc->sc_tba = tba; 1632 sc->sc_tbc = tbc; 1633 } 1634 1635 SET(tp->t_state, TS_BUSY); 1636 sc->sc_tx_busy = 1; 1637 1638 /* Enable transmit completion interrupts if necessary. */ 1639 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1640 SET(sc->sc_ier, IER_ETXRDY); 1641 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1642 } 1643 1644 /* Output the first chunk of the contiguous buffer. */ 1645 { 1646 int n; 1647 1648 n = sc->sc_tbc; 1649 if (n > sc->sc_fifolen) 1650 n = sc->sc_fifolen; 1651 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1652 sc->sc_tbc -= n; 1653 sc->sc_tba += n; 1654 } 1655 out: 1656 splx(s); 1657 return; 1658 } 1659 1660 /* 1661 * Stop output on a line. 1662 */ 1663 void 1664 comstop(tp, flag) 1665 struct tty *tp; 1666 int flag; 1667 { 1668 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1669 int s; 1670 1671 s = splserial(); 1672 if (ISSET(tp->t_state, TS_BUSY)) { 1673 /* Stop transmitting at the next chunk. */ 1674 sc->sc_tbc = 0; 1675 sc->sc_heldtbc = 0; 1676 if (!ISSET(tp->t_state, TS_TTSTOP)) 1677 SET(tp->t_state, TS_FLUSH); 1678 } 1679 splx(s); 1680 } 1681 1682 void 1683 comdiag(arg) 1684 void *arg; 1685 { 1686 struct com_softc *sc = arg; 1687 int overflows, floods; 1688 int s; 1689 1690 s = splserial(); 1691 overflows = sc->sc_overflows; 1692 sc->sc_overflows = 0; 1693 floods = sc->sc_floods; 1694 sc->sc_floods = 0; 1695 sc->sc_errors = 0; 1696 splx(s); 1697 1698 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1699 sc->sc_dev.dv_xname, 1700 overflows, overflows == 1 ? "" : "s", 1701 floods, floods == 1 ? "" : "s"); 1702 } 1703 1704 integrate void 1705 com_rxsoft(sc, tp) 1706 struct com_softc *sc; 1707 struct tty *tp; 1708 { 1709 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1710 u_char *get, *end; 1711 u_int cc, scc; 1712 u_char lsr; 1713 int code; 1714 int s; 1715 1716 end = sc->sc_ebuf; 1717 get = sc->sc_rbget; 1718 scc = cc = com_rbuf_size - sc->sc_rbavail; 1719 1720 if (cc == com_rbuf_size) { 1721 sc->sc_floods++; 1722 if (sc->sc_errors++ == 0) 1723 callout_reset(&sc->sc_diag_callout, 60 * hz, 1724 comdiag, sc); 1725 } 1726 1727 while (cc) { 1728 code = get[0]; 1729 lsr = get[1]; 1730 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1731 if (ISSET(lsr, LSR_OE)) { 1732 sc->sc_overflows++; 1733 if (sc->sc_errors++ == 0) 1734 callout_reset(&sc->sc_diag_callout, 1735 60 * hz, comdiag, sc); 1736 } 1737 if (ISSET(lsr, LSR_BI | LSR_FE)) 1738 SET(code, TTY_FE); 1739 if (ISSET(lsr, LSR_PE)) 1740 SET(code, TTY_PE); 1741 } 1742 if ((*rint)(code, tp) == -1) { 1743 /* 1744 * The line discipline's buffer is out of space. 1745 */ 1746 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1747 /* 1748 * We're either not using flow control, or the 1749 * line discipline didn't tell us to block for 1750 * some reason. Either way, we have no way to 1751 * know when there's more space available, so 1752 * just drop the rest of the data. 1753 */ 1754 get += cc << 1; 1755 if (get >= end) 1756 get -= com_rbuf_size << 1; 1757 cc = 0; 1758 } else { 1759 /* 1760 * Don't schedule any more receive processing 1761 * until the line discipline tells us there's 1762 * space available (through comhwiflow()). 1763 * Leave the rest of the data in the input 1764 * buffer. 1765 */ 1766 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1767 } 1768 break; 1769 } 1770 get += 2; 1771 if (get >= end) 1772 get = sc->sc_rbuf; 1773 cc--; 1774 } 1775 1776 if (cc != scc) { 1777 sc->sc_rbget = get; 1778 s = splserial(); 1779 cc = sc->sc_rbavail += scc - cc; 1780 /* Buffers should be ok again, release possible block. */ 1781 if (cc >= sc->sc_r_lowat) { 1782 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1783 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1784 SET(sc->sc_ier, IER_ERXRDY); 1785 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1786 } 1787 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1788 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1789 com_hwiflow(sc); 1790 } 1791 } 1792 splx(s); 1793 } 1794 } 1795 1796 integrate void 1797 com_txsoft(sc, tp) 1798 struct com_softc *sc; 1799 struct tty *tp; 1800 { 1801 1802 CLR(tp->t_state, TS_BUSY); 1803 if (ISSET(tp->t_state, TS_FLUSH)) 1804 CLR(tp->t_state, TS_FLUSH); 1805 else 1806 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1807 (*linesw[tp->t_line].l_start)(tp); 1808 } 1809 1810 integrate void 1811 com_stsoft(sc, tp) 1812 struct com_softc *sc; 1813 struct tty *tp; 1814 { 1815 u_char msr, delta; 1816 int s; 1817 1818 s = splserial(); 1819 msr = sc->sc_msr; 1820 delta = sc->sc_msr_delta; 1821 sc->sc_msr_delta = 0; 1822 splx(s); 1823 1824 if (ISSET(delta, sc->sc_msr_dcd)) { 1825 /* 1826 * Inform the tty layer that carrier detect changed. 1827 */ 1828 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1829 } 1830 1831 if (ISSET(delta, sc->sc_msr_cts)) { 1832 /* Block or unblock output according to flow control. */ 1833 if (ISSET(msr, sc->sc_msr_cts)) { 1834 sc->sc_tx_stopped = 0; 1835 (*linesw[tp->t_line].l_start)(tp); 1836 } else { 1837 sc->sc_tx_stopped = 1; 1838 } 1839 } 1840 1841 #ifdef COM_DEBUG 1842 if (com_debug) 1843 comstatus(sc, "com_stsoft"); 1844 #endif 1845 } 1846 1847 #ifdef __GENERIC_SOFT_INTERRUPTS 1848 void 1849 comsoft(arg) 1850 void *arg; 1851 { 1852 struct com_softc *sc = arg; 1853 struct tty *tp; 1854 1855 if (COM_ISALIVE(sc) == 0) 1856 return; 1857 1858 { 1859 #else 1860 void 1861 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1862 comsoft() 1863 #else 1864 comsoft(arg) 1865 void *arg; 1866 #endif 1867 { 1868 struct com_softc *sc; 1869 struct tty *tp; 1870 int unit; 1871 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1872 int s; 1873 1874 s = splsoftserial(); 1875 com_softintr_scheduled = 0; 1876 #endif 1877 1878 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1879 sc = device_lookup(&com_cd, unit); 1880 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1881 continue; 1882 1883 if (COM_ISALIVE(sc) == 0) 1884 continue; 1885 1886 tp = sc->sc_tty; 1887 if (tp == NULL) 1888 continue; 1889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1890 continue; 1891 #endif 1892 tp = sc->sc_tty; 1893 1894 if (sc->sc_rx_ready) { 1895 sc->sc_rx_ready = 0; 1896 com_rxsoft(sc, tp); 1897 } 1898 1899 if (sc->sc_st_check) { 1900 sc->sc_st_check = 0; 1901 com_stsoft(sc, tp); 1902 } 1903 1904 if (sc->sc_tx_done) { 1905 sc->sc_tx_done = 0; 1906 com_txsoft(sc, tp); 1907 } 1908 } 1909 1910 #ifndef __GENERIC_SOFT_INTERRUPTS 1911 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1912 splx(s); 1913 #endif 1914 #endif 1915 } 1916 1917 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1918 /* there has got to be a better way to do comsoft() */ 1919 }} 1920 #endif 1921 1922 int 1923 comintr(arg) 1924 void *arg; 1925 { 1926 struct com_softc *sc = arg; 1927 bus_space_tag_t iot = sc->sc_iot; 1928 bus_space_handle_t ioh = sc->sc_ioh; 1929 u_char *put, *end; 1930 u_int cc; 1931 u_char lsr, iir; 1932 1933 if (COM_ISALIVE(sc) == 0) 1934 return (0); 1935 1936 iir = bus_space_read_1(iot, ioh, com_iir); 1937 if (ISSET(iir, IIR_NOPEND)) 1938 return (0); 1939 1940 end = sc->sc_ebuf; 1941 put = sc->sc_rbput; 1942 cc = sc->sc_rbavail; 1943 1944 do { 1945 u_char msr, delta; 1946 1947 lsr = bus_space_read_1(iot, ioh, com_lsr); 1948 #if defined(DDB) || defined(KGDB) 1949 if (ISSET(lsr, LSR_BI)) { 1950 #ifndef DDB_BREAK_CHAR 1951 #ifdef DDB 1952 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1953 console_debugger(); 1954 continue; 1955 } 1956 #endif 1957 #ifdef KGDB 1958 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1959 kgdb_connect(1); 1960 continue; 1961 } 1962 #endif 1963 #endif 1964 } 1965 #endif /* DDB || KGDB */ 1966 1967 if (ISSET(lsr, LSR_RCV_MASK) && 1968 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1969 while (cc > 0) { 1970 put[0] = bus_space_read_1(iot, ioh, com_data); 1971 put[1] = lsr; 1972 #if defined(DDB) && defined(DDB_BREAKCHAR) 1973 if (put[0] == DDB_BREAK_CHAR && 1974 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1975 console_debugger(); 1976 1977 lsr = bus_space_read_1(iot, ioh, com_lsr); 1978 if (!ISSET(lsr, LSR_RCV_MASK)) 1979 break; 1980 1981 continue; 1982 } 1983 #endif 1984 put += 2; 1985 if (put >= end) 1986 put = sc->sc_rbuf; 1987 cc--; 1988 1989 lsr = bus_space_read_1(iot, ioh, com_lsr); 1990 if (!ISSET(lsr, LSR_RCV_MASK)) 1991 break; 1992 } 1993 1994 /* 1995 * Current string of incoming characters ended because 1996 * no more data was available or we ran out of space. 1997 * Schedule a receive event if any data was received. 1998 * If we're out of space, turn off receive interrupts. 1999 */ 2000 sc->sc_rbput = put; 2001 sc->sc_rbavail = cc; 2002 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2003 sc->sc_rx_ready = 1; 2004 2005 /* 2006 * See if we are in danger of overflowing a buffer. If 2007 * so, use hardware flow control to ease the pressure. 2008 */ 2009 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2010 cc < sc->sc_r_hiwat) { 2011 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2012 com_hwiflow(sc); 2013 } 2014 2015 /* 2016 * If we're out of space, disable receive interrupts 2017 * until the queue has drained a bit. 2018 */ 2019 if (!cc) { 2020 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2021 CLR(sc->sc_ier, IER_ERXRDY); 2022 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2023 } 2024 } else { 2025 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2026 bus_space_write_1(iot, ioh, com_ier, 0); 2027 delay(10); 2028 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2029 iir = IIR_NOPEND; 2030 continue; 2031 } 2032 } 2033 2034 msr = bus_space_read_1(iot, ioh, com_msr); 2035 delta = msr ^ sc->sc_msr; 2036 sc->sc_msr = msr; 2037 /* 2038 * Pulse-per-second (PSS) signals on edge of DCD? 2039 * Process these even if line discipline is ignoring DCD. 2040 */ 2041 if (delta & sc->sc_ppsmask) { 2042 struct timeval tv; 2043 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2044 /* XXX nanotime() */ 2045 microtime(&tv); 2046 TIMEVAL_TO_TIMESPEC(&tv, 2047 &sc->ppsinfo.assert_timestamp); 2048 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2049 timespecadd(&sc->ppsinfo.assert_timestamp, 2050 &sc->ppsparam.assert_offset, 2051 &sc->ppsinfo.assert_timestamp); 2052 } 2053 2054 #ifdef PPS_SYNC 2055 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2056 hardpps(&tv, tv.tv_usec); 2057 #endif 2058 sc->ppsinfo.assert_sequence++; 2059 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2060 2061 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2062 /* XXX nanotime() */ 2063 microtime(&tv); 2064 TIMEVAL_TO_TIMESPEC(&tv, 2065 &sc->ppsinfo.clear_timestamp); 2066 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2067 timespecadd(&sc->ppsinfo.clear_timestamp, 2068 &sc->ppsparam.clear_offset, 2069 &sc->ppsinfo.clear_timestamp); 2070 } 2071 2072 #ifdef PPS_SYNC 2073 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2074 hardpps(&tv, tv.tv_usec); 2075 #endif 2076 sc->ppsinfo.clear_sequence++; 2077 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2078 } 2079 } 2080 2081 /* 2082 * Process normal status changes 2083 */ 2084 if (ISSET(delta, sc->sc_msr_mask)) { 2085 SET(sc->sc_msr_delta, delta); 2086 2087 /* 2088 * Stop output immediately if we lose the output 2089 * flow control signal or carrier detect. 2090 */ 2091 if (ISSET(~msr, sc->sc_msr_mask)) { 2092 sc->sc_tbc = 0; 2093 sc->sc_heldtbc = 0; 2094 #ifdef COM_DEBUG 2095 if (com_debug) 2096 comstatus(sc, "comintr "); 2097 #endif 2098 } 2099 2100 sc->sc_st_check = 1; 2101 } 2102 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2103 2104 /* 2105 * Done handling any receive interrupts. See if data can be 2106 * transmitted as well. Schedule tx done event if no data left 2107 * and tty was marked busy. 2108 */ 2109 if (ISSET(lsr, LSR_TXRDY)) { 2110 /* 2111 * If we've delayed a parameter change, do it now, and restart 2112 * output. 2113 */ 2114 if (sc->sc_heldchange) { 2115 com_loadchannelregs(sc); 2116 sc->sc_heldchange = 0; 2117 sc->sc_tbc = sc->sc_heldtbc; 2118 sc->sc_heldtbc = 0; 2119 } 2120 2121 /* Output the next chunk of the contiguous buffer, if any. */ 2122 if (sc->sc_tbc > 0) { 2123 int n; 2124 2125 n = sc->sc_tbc; 2126 if (n > sc->sc_fifolen) 2127 n = sc->sc_fifolen; 2128 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2129 sc->sc_tbc -= n; 2130 sc->sc_tba += n; 2131 } else { 2132 /* Disable transmit completion interrupts if necessary. */ 2133 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2134 CLR(sc->sc_ier, IER_ETXRDY); 2135 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2136 } 2137 if (sc->sc_tx_busy) { 2138 sc->sc_tx_busy = 0; 2139 sc->sc_tx_done = 1; 2140 } 2141 } 2142 } 2143 2144 /* Wake up the poller. */ 2145 #ifdef __GENERIC_SOFT_INTERRUPTS 2146 softintr_schedule(sc->sc_si); 2147 #else 2148 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2149 setsoftserial(); 2150 #else 2151 if (!com_softintr_scheduled) { 2152 com_softintr_scheduled = 1; 2153 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2154 } 2155 #endif 2156 #endif 2157 2158 #if NRND > 0 && defined(RND_COM) 2159 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2160 #endif 2161 2162 return (1); 2163 } 2164 2165 /* 2166 * The following functions are polled getc and putc routines, shared 2167 * by the console and kgdb glue. 2168 */ 2169 2170 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2171 #define MAX_UNGETC 20 2172 static int com_ungetc[MAX_UNGETC]; 2173 static int com_ungetccount = 0; 2174 #endif 2175 2176 int 2177 com_common_getc(iot, ioh) 2178 bus_space_tag_t iot; 2179 bus_space_handle_t ioh; 2180 { 2181 int s = splserial(); 2182 u_char stat, c; 2183 2184 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2185 /* got a character from reading things earlier */ 2186 if (com_ungetccount > 0) { 2187 int i; 2188 2189 c = com_ungetc[0]; 2190 for (i = 1; i < com_ungetccount; i++) { 2191 com_ungetc[i -1] = com_ungetc[i]; 2192 } 2193 com_ungetccount--; 2194 splx(s); 2195 return (c); 2196 } 2197 #endif 2198 2199 /* block until a character becomes available */ 2200 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2201 ; 2202 2203 c = bus_space_read_1(iot, ioh, com_data); 2204 stat = bus_space_read_1(iot, ioh, com_iir); 2205 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2206 if (c == DDB_BREAK_CHAR) { 2207 extern int db_active; 2208 2209 if (db_active == 0) { 2210 console_debugger(); 2211 } 2212 } 2213 #endif 2214 splx(s); 2215 return (c); 2216 } 2217 2218 void 2219 com_common_putc(iot, ioh, c) 2220 bus_space_tag_t iot; 2221 bus_space_handle_t ioh; 2222 int c; 2223 { 2224 int s = splserial(); 2225 int timo; 2226 2227 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2228 int cin, stat; 2229 if (com_ungetccount < MAX_UNGETC 2230 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2231 cin = bus_space_read_1(iot, ioh, com_data); 2232 stat = bus_space_read_1(iot, ioh, com_iir); 2233 if (cin == DDB_BREAK_CHAR) { 2234 console_debugger(); 2235 } 2236 com_ungetc[com_ungetccount++] = cin; 2237 } 2238 #endif 2239 2240 /* wait for any pending transmission to finish */ 2241 timo = 150000; 2242 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2243 continue; 2244 2245 bus_space_write_1(iot, ioh, com_data, c); 2246 COM_BARRIER(iot, ioh, BR | BW); 2247 2248 /* wait for this transmission to complete */ 2249 timo = 1500000; 2250 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2251 continue; 2252 2253 splx(s); 2254 } 2255 2256 /* 2257 * Initialize UART for use as console or KGDB line. 2258 */ 2259 int 2260 cominit(iot, iobase, rate, frequency, cflag, iohp) 2261 bus_space_tag_t iot; 2262 int iobase; 2263 int rate, frequency; 2264 tcflag_t cflag; 2265 bus_space_handle_t *iohp; 2266 { 2267 bus_space_handle_t ioh; 2268 2269 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2270 return (ENOMEM); /* ??? */ 2271 2272 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2273 bus_space_write_1(iot, ioh, com_efr, 0); 2274 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2275 rate = comspeed(rate, frequency); 2276 bus_space_write_1(iot, ioh, com_dlbl, rate); 2277 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2278 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2279 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2280 bus_space_write_1(iot, ioh, com_fifo, 2281 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2282 bus_space_write_1(iot, ioh, com_ier, 0); 2283 2284 *iohp = ioh; 2285 return (0); 2286 } 2287 2288 /* 2289 * Following are all routines needed for COM to act as console 2290 */ 2291 2292 int 2293 comcnattach(iot, iobase, rate, frequency, cflag) 2294 bus_space_tag_t iot; 2295 int iobase; 2296 int rate, frequency; 2297 tcflag_t cflag; 2298 { 2299 int res; 2300 static struct consdev comcons = { 2301 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2302 NODEV, CN_NORMAL 2303 }; 2304 2305 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2306 if (res) 2307 return (res); 2308 2309 cn_tab = &comcons; 2310 2311 comconstag = iot; 2312 comconsaddr = iobase; 2313 comconsrate = rate; 2314 comconscflag = cflag; 2315 2316 return (0); 2317 } 2318 2319 int 2320 comcngetc(dev) 2321 dev_t dev; 2322 { 2323 2324 return (com_common_getc(comconstag, comconsioh)); 2325 } 2326 2327 /* 2328 * Console kernel output character routine. 2329 */ 2330 void 2331 comcnputc(dev, c) 2332 dev_t dev; 2333 int c; 2334 { 2335 2336 com_common_putc(comconstag, comconsioh, c); 2337 } 2338 2339 void 2340 comcnpollc(dev, on) 2341 dev_t dev; 2342 int on; 2343 { 2344 2345 } 2346 2347 #ifdef KGDB 2348 int 2349 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2350 bus_space_tag_t iot; 2351 int iobase; 2352 int rate, frequency; 2353 tcflag_t cflag; 2354 { 2355 int res; 2356 2357 if (iot == comconstag && iobase == comconsaddr) 2358 return (EBUSY); /* cannot share with console */ 2359 2360 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2361 if (res) 2362 return (res); 2363 2364 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2365 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2366 2367 com_kgdb_iot = iot; 2368 com_kgdb_addr = iobase; 2369 2370 return (0); 2371 } 2372 2373 /* ARGSUSED */ 2374 int 2375 com_kgdb_getc(arg) 2376 void *arg; 2377 { 2378 2379 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2380 } 2381 2382 /* ARGSUSED */ 2383 void 2384 com_kgdb_putc(arg, c) 2385 void *arg; 2386 int c; 2387 { 2388 2389 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2390 } 2391 #endif /* KGDB */ 2392 2393 /* helper function to identify the com ports used by 2394 console or KGDB (and not yet autoconf attached) */ 2395 int 2396 com_is_console(iot, iobase, ioh) 2397 bus_space_tag_t iot; 2398 int iobase; 2399 bus_space_handle_t *ioh; 2400 { 2401 bus_space_handle_t help; 2402 2403 if (!comconsattached && 2404 iot == comconstag && iobase == comconsaddr) 2405 help = comconsioh; 2406 #ifdef KGDB 2407 else if (!com_kgdb_attached && 2408 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2409 help = com_kgdb_ioh; 2410 #endif 2411 else 2412 return (0); 2413 2414 if (ioh) 2415 *ioh = help; 2416 return (1); 2417 } 2418
Indexes created Thu Sep 25 16:09:42 GMT 2025