com.c revision 1.176
1 /* $NetBSD: com.c,v 1.176 2000/09/17 22:07:39 toshii Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_ddbparam.h" 81 #include "opt_com.h" 82 83 #include "rnd.h" 84 #if NRND > 0 && defined(RND_COM) 85 #include <sys/rnd.h> 86 #endif 87 88 #include <sys/param.h> 89 #include <sys/systm.h> 90 #include <sys/ioctl.h> 91 #include <sys/select.h> 92 #include <sys/tty.h> 93 #include <sys/proc.h> 94 #include <sys/user.h> 95 #include <sys/conf.h> 96 #include <sys/file.h> 97 #include <sys/uio.h> 98 #include <sys/kernel.h> 99 #include <sys/syslog.h> 100 #include <sys/types.h> 101 #include <sys/device.h> 102 #include <sys/malloc.h> 103 #include <sys/timepps.h> 104 #include <sys/vnode.h> 105 106 #include <machine/intr.h> 107 #include <machine/bus.h> 108 109 #include <dev/ic/comreg.h> 110 #include <dev/ic/comvar.h> 111 #include <dev/ic/ns16550reg.h> 112 #include <dev/ic/st16650reg.h> 113 #ifdef COM_HAYESP 114 #include <dev/ic/hayespreg.h> 115 #endif 116 #define com_lcr com_cfcr 117 #include <dev/cons.h> 118 119 #include "com.h" 120 121 #ifdef COM_HAYESP 122 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 123 #endif 124 125 #if defined(DDB) || defined(KGDB) 126 static void com_enable_debugport __P((struct com_softc *)); 127 #endif 128 void com_config __P((struct com_softc *)); 129 void com_shutdown __P((struct com_softc *)); 130 int comspeed __P((long, long)); 131 static u_char cflag2lcr __P((tcflag_t)); 132 int comparam __P((struct tty *, struct termios *)); 133 void comstart __P((struct tty *)); 134 void comstop __P((struct tty *, int)); 135 int comhwiflow __P((struct tty *, int)); 136 137 void com_loadchannelregs __P((struct com_softc *)); 138 void com_hwiflow __P((struct com_softc *)); 139 void com_break __P((struct com_softc *, int)); 140 void com_modem __P((struct com_softc *, int)); 141 void tiocm_to_com __P((struct com_softc *, u_long, int)); 142 int com_to_tiocm __P((struct com_softc *)); 143 void com_iflush __P((struct com_softc *)); 144 145 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 146 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 147 148 /* XXX: These belong elsewhere */ 149 cdev_decl(com); 150 bdev_decl(com); 151 152 int comcngetc __P((dev_t)); 153 void comcnputc __P((dev_t, int)); 154 void comcnpollc __P((dev_t, int)); 155 156 #define integrate static inline 157 #ifdef __GENERIC_SOFT_INTERRUPTS 158 void comsoft __P((void *)); 159 #else 160 #ifndef __NO_SOFT_SERIAL_INTERRUPT 161 void comsoft __P((void)); 162 #else 163 void comsoft __P((void *)); 164 struct callout comsoft_callout = CALLOUT_INITIALIZER; 165 #endif 166 #endif 167 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 170 integrate void com_schedrx __P((struct com_softc *)); 171 void comdiag __P((void *)); 172 173 extern struct cfdriver com_cd; 174 175 /* 176 * Make this an option variable one can patch. 177 * But be warned: this must be a power of 2! 178 */ 179 u_int com_rbuf_size = COM_RING_SIZE; 180 181 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 182 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 183 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 184 185 static int comconsaddr; 186 static bus_space_tag_t comconstag; 187 static bus_space_handle_t comconsioh; 188 static int comconsattached; 189 static int comconsrate; 190 static tcflag_t comconscflag; 191 192 static int ppscap = 193 PPS_TSFMT_TSPEC | 194 PPS_CAPTUREASSERT | 195 PPS_CAPTURECLEAR | 196 #ifdef PPS_SYNC 197 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 198 #endif /* PPS_SYNC */ 199 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 200 201 #ifndef __GENERIC_SOFT_INTERRUPTS 202 #ifdef __NO_SOFT_SERIAL_INTERRUPT 203 volatile int com_softintr_scheduled; 204 #endif 205 #endif 206 207 #ifdef KGDB 208 #include <sys/kgdb.h> 209 210 static int com_kgdb_addr; 211 static bus_space_tag_t com_kgdb_iot; 212 static bus_space_handle_t com_kgdb_ioh; 213 static int com_kgdb_attached; 214 215 int com_kgdb_getc __P((void *)); 216 void com_kgdb_putc __P((void *, int)); 217 #endif /* KGDB */ 218 219 #define COMUNIT_MASK 0x7ffff 220 #define COMDIALOUT_MASK 0x80000 221 222 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 223 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 224 225 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 226 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 227 228 #define BR BUS_SPACE_BARRIER_READ 229 #define BW BUS_SPACE_BARRIER_WRITE 230 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 231 232 int 233 comspeed(speed, frequency) 234 long speed, frequency; 235 { 236 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 237 238 int x, err; 239 240 #if 0 241 if (speed == 0) 242 return (0); 243 #endif 244 if (speed <= 0) 245 return (-1); 246 x = divrnd(frequency / 16, speed); 247 if (x <= 0) 248 return (-1); 249 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 250 if (err < 0) 251 err = -err; 252 if (err > COM_TOLERANCE) 253 return (-1); 254 return (x); 255 256 #undef divrnd 257 } 258 259 #ifdef COM_DEBUG 260 int com_debug = 0; 261 262 void comstatus __P((struct com_softc *, char *)); 263 void 264 comstatus(sc, str) 265 struct com_softc *sc; 266 char *str; 267 { 268 struct tty *tp = sc->sc_tty; 269 270 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 271 sc->sc_dev.dv_xname, str, 272 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 273 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 274 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 275 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 276 sc->sc_tx_stopped ? "+" : "-"); 277 278 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 279 sc->sc_dev.dv_xname, str, 280 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 281 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 282 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 283 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 284 sc->sc_rx_flags); 285 } 286 #endif 287 288 int 289 comprobe1(iot, ioh) 290 bus_space_tag_t iot; 291 bus_space_handle_t ioh; 292 { 293 294 /* force access to id reg */ 295 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 296 bus_space_write_1(iot, ioh, com_iir, 0); 297 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 298 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 299 return (0); 300 301 return (1); 302 } 303 304 #ifdef COM_HAYESP 305 int 306 comprobeHAYESP(hayespioh, sc) 307 bus_space_handle_t hayespioh; 308 struct com_softc *sc; 309 { 310 char val, dips; 311 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 312 bus_space_tag_t iot = sc->sc_iot; 313 314 /* 315 * Hayes ESP cards have two iobases. One is for compatibility with 316 * 16550 serial chips, and at the same ISA PC base addresses. The 317 * other is for ESP-specific enhanced features, and lies at a 318 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 319 */ 320 321 /* Test for ESP signature */ 322 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 323 return (0); 324 325 /* 326 * ESP is present at ESP enhanced base address; unknown com port 327 */ 328 329 /* Get the dip-switch configurations */ 330 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 331 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 332 333 /* Determine which com port this ESP card services: bits 0,1 of */ 334 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 335 if (sc->sc_iobase != combaselist[dips & 0x03]) 336 return (0); 337 338 printf(": ESP"); 339 340 /* Check ESP Self Test bits. */ 341 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 342 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 344 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 345 if ((val & 0x70) < 0x20) { 346 printf("-old (%o)", val & 0x70); 347 /* we do not support the necessary features */ 348 return (0); 349 } 350 351 /* Check for ability to emulate 16550: bit 8 == 1 */ 352 if ((dips & 0x80) == 0) { 353 printf(" slave"); 354 /* XXX Does slave really mean no 16550 support?? */ 355 return (0); 356 } 357 358 /* 359 * If we made it this far, we are a full-featured ESP v2.0 (or 360 * better), at the correct com port address. 361 */ 362 363 SET(sc->sc_hwflags, COM_HW_HAYESP); 364 printf(", 1024 byte fifo\n"); 365 return (1); 366 } 367 #endif 368 369 #if defined(DDB) || defined(KGDB) 370 static void 371 com_enable_debugport(sc) 372 struct com_softc *sc; 373 { 374 int s; 375 376 /* Turn on line break interrupt, set carrier. */ 377 s = splserial(); 378 sc->sc_ier = IER_ERXRDY; 379 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 380 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 381 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 382 splx(s); 383 } 384 #endif 385 386 void 387 com_attach_subr(sc) 388 struct com_softc *sc; 389 { 390 int iobase = sc->sc_iobase; 391 bus_space_tag_t iot = sc->sc_iot; 392 bus_space_handle_t ioh = sc->sc_ioh; 393 struct tty *tp; 394 #ifdef COM16650 395 u_int8_t lcr; 396 #endif 397 #ifdef COM_HAYESP 398 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 399 int *hayespp; 400 #endif 401 402 callout_init(&sc->sc_diag_callout); 403 404 /* Disable interrupts before configuring the device. */ 405 sc->sc_ier = 0; 406 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 407 408 if (iot == comconstag && iobase == comconsaddr) { 409 comconsattached = 1; 410 411 /* Make sure the console is always "hardwired". */ 412 delay(1000); /* wait for output to finish */ 413 SET(sc->sc_hwflags, COM_HW_CONSOLE); 414 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 415 } 416 417 #ifdef COM_HAYESP 418 /* Look for a Hayes ESP board. */ 419 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 420 bus_space_handle_t hayespioh; 421 422 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 423 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 424 continue; 425 if (comprobeHAYESP(hayespioh, sc)) { 426 sc->sc_hayespioh = hayespioh; 427 sc->sc_fifolen = 1024; 428 429 break; 430 } 431 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 432 } 433 /* No ESP; look for other things. */ 434 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 435 #endif 436 sc->sc_fifolen = 1; 437 /* look for a NS 16550AF UART with FIFOs */ 438 bus_space_write_1(iot, ioh, com_fifo, 439 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 440 delay(100); 441 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 442 == IIR_FIFO_MASK) 443 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 444 == FIFO_TRIGGER_14) { 445 SET(sc->sc_hwflags, COM_HW_FIFO); 446 447 #ifdef COM16650 448 /* 449 * IIR changes into the EFR if LCR is set to LCR_EERS 450 * on 16650s. We also know IIR != 0 at this point. 451 * Write 0 into the EFR, and read it. If the result 452 * is 0, we have a 16650. 453 * 454 * Older 16650s were broken; the test to detect them 455 * is taken from the Linux driver. Apparently 456 * setting DLAB enable gives access to the EFR on 457 * these chips. 458 */ 459 lcr = bus_space_read_1(iot, ioh, com_lcr); 460 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 461 bus_space_write_1(iot, ioh, com_efr, 0); 462 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 463 bus_space_write_1(iot, ioh, com_lcr, 464 lcr | LCR_DLAB); 465 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 466 CLR(sc->sc_hwflags, COM_HW_FIFO); 467 sc->sc_fifolen = 0; 468 } else { 469 SET(sc->sc_hwflags, COM_HW_FLOW); 470 sc->sc_fifolen = 32; 471 } 472 } else 473 #endif 474 sc->sc_fifolen = 16; 475 476 #ifdef COM16650 477 bus_space_write_1(iot, ioh, com_lcr, lcr); 478 if (sc->sc_fifolen == 0) 479 printf(": st16650, broken fifo\n"); 480 else if (sc->sc_fifolen == 32) 481 printf(": st16650a, working fifo\n"); 482 else 483 #endif 484 printf(": ns16550a, working fifo\n"); 485 } else 486 printf(": ns16550, broken fifo\n"); 487 else 488 printf(": ns8250 or ns16450, no fifo\n"); 489 bus_space_write_1(iot, ioh, com_fifo, 0); 490 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 491 sc->sc_fifolen = 1; 492 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 493 } 494 #ifdef COM_HAYESP 495 } 496 #endif 497 498 tp = ttymalloc(); 499 tp->t_oproc = comstart; 500 tp->t_param = comparam; 501 tp->t_hwiflow = comhwiflow; 502 503 sc->sc_tty = tp; 504 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 505 if (sc->sc_rbuf == NULL) { 506 printf("%s: unable to allocate ring buffer\n", 507 sc->sc_dev.dv_xname); 508 return; 509 } 510 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 511 512 tty_attach(tp); 513 514 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 515 SET(sc->sc_mcr, MCR_IENABLE); 516 517 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 518 int maj; 519 520 /* locate the major number */ 521 for (maj = 0; maj < nchrdev; maj++) 522 if (cdevsw[maj].d_open == comopen) 523 break; 524 525 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 526 527 printf("%s: console\n", sc->sc_dev.dv_xname); 528 } 529 530 #ifdef KGDB 531 /* 532 * Allow kgdb to "take over" this port. If this is 533 * the kgdb device, it has exclusive use. 534 */ 535 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 536 com_kgdb_attached = 1; 537 538 SET(sc->sc_hwflags, COM_HW_KGDB); 539 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 540 } 541 #endif 542 543 #ifdef __GENERIC_SOFT_INTERRUPTS 544 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 545 #endif 546 547 #if NRND > 0 && defined(RND_COM) 548 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 549 RND_TYPE_TTY, 0); 550 #endif 551 552 /* if there are no enable/disable functions, assume the device 553 is always enabled */ 554 if (!sc->enable) 555 sc->enabled = 1; 556 557 com_config(sc); 558 559 SET(sc->sc_hwflags, COM_HW_DEV_OK); 560 } 561 562 void 563 com_config(sc) 564 struct com_softc *sc; 565 { 566 bus_space_tag_t iot = sc->sc_iot; 567 bus_space_handle_t ioh = sc->sc_ioh; 568 569 /* Disable interrupts before configuring the device. */ 570 sc->sc_ier = 0; 571 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 572 573 #ifdef COM_HAYESP 574 /* Look for a Hayes ESP board. */ 575 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 576 sc->sc_fifolen = 1024; 577 578 /* Set 16550 compatibility mode */ 579 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 580 HAYESP_SETMODE); 581 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 582 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 583 HAYESP_MODE_SCALE); 584 585 /* Set RTS/CTS flow control */ 586 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 587 HAYESP_SETFLOWTYPE); 588 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 589 HAYESP_FLOW_RTS); 590 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 591 HAYESP_FLOW_CTS); 592 593 /* Set flow control levels */ 594 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 595 HAYESP_SETRXFLOW); 596 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 597 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 598 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 599 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 600 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 601 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 603 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 604 } 605 #endif 606 607 #ifdef DDB 608 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 609 com_enable_debugport(sc); 610 #endif 611 612 #ifdef KGDB 613 /* 614 * Allow kgdb to "take over" this port. If this is 615 * the kgdb device, it has exclusive use. 616 */ 617 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 618 com_enable_debugport(sc); 619 #endif 620 } 621 622 int 623 com_detach(self, flags) 624 struct device *self; 625 int flags; 626 { 627 struct com_softc *sc = (struct com_softc *)self; 628 int maj, mn; 629 630 /* locate the major number */ 631 for (maj = 0; maj < nchrdev; maj++) 632 if (cdevsw[maj].d_open == comopen) 633 break; 634 635 /* Nuke the vnodes for any open instances. */ 636 mn = self->dv_unit; 637 vdevgone(maj, mn, mn, VCHR); 638 639 mn |= COMDIALOUT_MASK; 640 vdevgone(maj, mn, mn, VCHR); 641 642 /* Free the receive buffer. */ 643 free(sc->sc_rbuf, M_DEVBUF); 644 645 /* Detach and free the tty. */ 646 tty_detach(sc->sc_tty); 647 ttyfree(sc->sc_tty); 648 649 #ifdef __GENERIC_SOFT_INTERRUPTS 650 /* Unhook the soft interrupt handler. */ 651 softintr_disestablish(sc->sc_si); 652 #endif 653 654 #if NRND > 0 && defined(RND_COM) 655 /* Unhook the entropy source. */ 656 rnd_detach_source(&sc->rnd_source); 657 #endif 658 659 return (0); 660 } 661 662 int 663 com_activate(self, act) 664 struct device *self; 665 enum devact act; 666 { 667 struct com_softc *sc = (struct com_softc *)self; 668 int s, rv = 0; 669 670 s = splserial(); 671 switch (act) { 672 case DVACT_ACTIVATE: 673 rv = EOPNOTSUPP; 674 break; 675 676 case DVACT_DEACTIVATE: 677 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 678 rv = EBUSY; 679 break; 680 } 681 682 if (sc->disable != NULL && sc->enabled != 0) { 683 (*sc->disable)(sc); 684 sc->enabled = 0; 685 } 686 break; 687 } 688 splx(s); 689 return (rv); 690 } 691 692 void 693 com_shutdown(sc) 694 struct com_softc *sc; 695 { 696 struct tty *tp = sc->sc_tty; 697 int s; 698 699 s = splserial(); 700 701 /* If we were asserting flow control, then deassert it. */ 702 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 703 com_hwiflow(sc); 704 705 /* Clear any break condition set with TIOCSBRK. */ 706 com_break(sc, 0); 707 708 /* Turn off PPS capture on last close. */ 709 sc->sc_ppsmask = 0; 710 sc->ppsparam.mode = 0; 711 712 /* 713 * Hang up if necessary. Wait a bit, so the other side has time to 714 * notice even if we immediately open the port again. 715 * Avoid tsleeping above splhigh(). 716 */ 717 if (ISSET(tp->t_cflag, HUPCL)) { 718 com_modem(sc, 0); 719 splx(s); 720 /* XXX tsleep will only timeout */ 721 (void) tsleep(sc, TTIPRI, ttclos, hz); 722 s = splserial(); 723 } 724 725 /* Turn off interrupts. */ 726 #ifdef DDB 727 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 728 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 729 else 730 #endif 731 sc->sc_ier = 0; 732 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 733 734 if (sc->disable) { 735 #ifdef DIAGNOSTIC 736 if (!sc->enabled) 737 panic("com_shutdown: not enabled?"); 738 #endif 739 (*sc->disable)(sc); 740 sc->enabled = 0; 741 } 742 743 splx(s); 744 } 745 746 int 747 comopen(dev, flag, mode, p) 748 dev_t dev; 749 int flag, mode; 750 struct proc *p; 751 { 752 struct com_softc *sc; 753 struct tty *tp; 754 int s, s2; 755 int error; 756 757 sc = device_lookup(&com_cd, COMUNIT(dev)); 758 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 759 sc->sc_rbuf == NULL) 760 return (ENXIO); 761 762 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 763 return (ENXIO); 764 765 #ifdef KGDB 766 /* 767 * If this is the kgdb port, no other use is permitted. 768 */ 769 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 770 return (EBUSY); 771 #endif 772 773 tp = sc->sc_tty; 774 775 if (ISSET(tp->t_state, TS_ISOPEN) && 776 ISSET(tp->t_state, TS_XCLUDE) && 777 p->p_ucred->cr_uid != 0) 778 return (EBUSY); 779 780 s = spltty(); 781 782 /* 783 * Do the following iff this is a first open. 784 */ 785 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 786 struct termios t; 787 788 tp->t_dev = dev; 789 790 s2 = splserial(); 791 792 if (sc->enable) { 793 if ((*sc->enable)(sc)) { 794 splx(s2); 795 splx(s); 796 printf("%s: device enable failed\n", 797 sc->sc_dev.dv_xname); 798 return (EIO); 799 } 800 sc->enabled = 1; 801 com_config(sc); 802 } 803 804 /* Turn on interrupts. */ 805 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 806 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 807 808 /* Fetch the current modem control status, needed later. */ 809 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 810 811 /* Clear PPS capture state on first open. */ 812 sc->sc_ppsmask = 0; 813 sc->ppsparam.mode = 0; 814 815 splx(s2); 816 817 /* 818 * Initialize the termios status to the defaults. Add in the 819 * sticky bits from TIOCSFLAGS. 820 */ 821 t.c_ispeed = 0; 822 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 823 t.c_ospeed = comconsrate; 824 t.c_cflag = comconscflag; 825 } else { 826 t.c_ospeed = TTYDEF_SPEED; 827 t.c_cflag = TTYDEF_CFLAG; 828 } 829 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 830 SET(t.c_cflag, CLOCAL); 831 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 832 SET(t.c_cflag, CRTSCTS); 833 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 834 SET(t.c_cflag, MDMBUF); 835 /* Make sure comparam() will do something. */ 836 tp->t_ospeed = 0; 837 (void) comparam(tp, &t); 838 tp->t_iflag = TTYDEF_IFLAG; 839 tp->t_oflag = TTYDEF_OFLAG; 840 tp->t_lflag = TTYDEF_LFLAG; 841 ttychars(tp); 842 ttsetwater(tp); 843 844 s2 = splserial(); 845 846 /* 847 * Turn on DTR. We must always do this, even if carrier is not 848 * present, because otherwise we'd have to use TIOCSDTR 849 * immediately after setting CLOCAL, which applications do not 850 * expect. We always assert DTR while the device is open 851 * unless explicitly requested to deassert it. 852 */ 853 com_modem(sc, 1); 854 855 /* Clear the input ring, and unblock. */ 856 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 857 sc->sc_rbavail = com_rbuf_size; 858 com_iflush(sc); 859 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 860 com_hwiflow(sc); 861 862 #ifdef COM_DEBUG 863 if (com_debug) 864 comstatus(sc, "comopen "); 865 #endif 866 867 splx(s2); 868 } 869 870 splx(s); 871 872 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 873 if (error) 874 goto bad; 875 876 error = (*linesw[tp->t_line].l_open)(dev, tp); 877 if (error) 878 goto bad; 879 880 return (0); 881 882 bad: 883 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 884 /* 885 * We failed to open the device, and nobody else had it opened. 886 * Clean up the state as appropriate. 887 */ 888 com_shutdown(sc); 889 } 890 891 return (error); 892 } 893 894 int 895 comclose(dev, flag, mode, p) 896 dev_t dev; 897 int flag, mode; 898 struct proc *p; 899 { 900 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 901 struct tty *tp = sc->sc_tty; 902 903 /* XXX This is for cons.c. */ 904 if (!ISSET(tp->t_state, TS_ISOPEN)) 905 return (0); 906 907 (*linesw[tp->t_line].l_close)(tp, flag); 908 ttyclose(tp); 909 910 if (COM_ISALIVE(sc) == 0) 911 return (0); 912 913 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 914 /* 915 * Although we got a last close, the device may still be in 916 * use; e.g. if this was the dialout node, and there are still 917 * processes waiting for carrier on the non-dialout node. 918 */ 919 com_shutdown(sc); 920 } 921 922 return (0); 923 } 924 925 int 926 comread(dev, uio, flag) 927 dev_t dev; 928 struct uio *uio; 929 int flag; 930 { 931 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 932 struct tty *tp = sc->sc_tty; 933 934 if (COM_ISALIVE(sc) == 0) 935 return (EIO); 936 937 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 938 } 939 940 int 941 comwrite(dev, uio, flag) 942 dev_t dev; 943 struct uio *uio; 944 int flag; 945 { 946 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 if (COM_ISALIVE(sc) == 0) 950 return (EIO); 951 952 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 953 } 954 955 struct tty * 956 comtty(dev) 957 dev_t dev; 958 { 959 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 return (tp); 963 } 964 965 int 966 comioctl(dev, cmd, data, flag, p) 967 dev_t dev; 968 u_long cmd; 969 caddr_t data; 970 int flag; 971 struct proc *p; 972 { 973 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 974 struct tty *tp = sc->sc_tty; 975 int error; 976 int s; 977 978 if (COM_ISALIVE(sc) == 0) 979 return (EIO); 980 981 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 982 if (error >= 0) 983 return (error); 984 985 error = ttioctl(tp, cmd, data, flag, p); 986 if (error >= 0) 987 return (error); 988 989 error = 0; 990 991 s = splserial(); 992 993 switch (cmd) { 994 case TIOCSBRK: 995 com_break(sc, 1); 996 break; 997 998 case TIOCCBRK: 999 com_break(sc, 0); 1000 break; 1001 1002 case TIOCSDTR: 1003 com_modem(sc, 1); 1004 break; 1005 1006 case TIOCCDTR: 1007 com_modem(sc, 0); 1008 break; 1009 1010 case TIOCGFLAGS: 1011 *(int *)data = sc->sc_swflags; 1012 break; 1013 1014 case TIOCSFLAGS: 1015 error = suser(p->p_ucred, &p->p_acflag); 1016 if (error) 1017 break; 1018 sc->sc_swflags = *(int *)data; 1019 break; 1020 1021 case TIOCMSET: 1022 case TIOCMBIS: 1023 case TIOCMBIC: 1024 tiocm_to_com(sc, cmd, *(int *)data); 1025 break; 1026 1027 case TIOCMGET: 1028 *(int *)data = com_to_tiocm(sc); 1029 break; 1030 1031 case PPS_IOC_CREATE: 1032 break; 1033 1034 case PPS_IOC_DESTROY: 1035 break; 1036 1037 case PPS_IOC_GETPARAMS: { 1038 pps_params_t *pp; 1039 pp = (pps_params_t *)data; 1040 *pp = sc->ppsparam; 1041 break; 1042 } 1043 1044 case PPS_IOC_SETPARAMS: { 1045 pps_params_t *pp; 1046 int mode; 1047 pp = (pps_params_t *)data; 1048 if (pp->mode & ~ppscap) { 1049 error = EINVAL; 1050 break; 1051 } 1052 sc->ppsparam = *pp; 1053 /* 1054 * Compute msr masks from user-specified timestamp state. 1055 */ 1056 mode = sc->ppsparam.mode; 1057 #ifdef PPS_SYNC 1058 if (mode & PPS_HARDPPSONASSERT) { 1059 mode |= PPS_CAPTUREASSERT; 1060 /* XXX revoke any previous HARDPPS source */ 1061 } 1062 if (mode & PPS_HARDPPSONCLEAR) { 1063 mode |= PPS_CAPTURECLEAR; 1064 /* XXX revoke any previous HARDPPS source */ 1065 } 1066 #endif /* PPS_SYNC */ 1067 switch (mode & PPS_CAPTUREBOTH) { 1068 case 0: 1069 sc->sc_ppsmask = 0; 1070 break; 1071 1072 case PPS_CAPTUREASSERT: 1073 sc->sc_ppsmask = MSR_DCD; 1074 sc->sc_ppsassert = MSR_DCD; 1075 sc->sc_ppsclear = -1; 1076 break; 1077 1078 case PPS_CAPTURECLEAR: 1079 sc->sc_ppsmask = MSR_DCD; 1080 sc->sc_ppsassert = -1; 1081 sc->sc_ppsclear = 0; 1082 break; 1083 1084 case PPS_CAPTUREBOTH: 1085 sc->sc_ppsmask = MSR_DCD; 1086 sc->sc_ppsassert = MSR_DCD; 1087 sc->sc_ppsclear = 0; 1088 break; 1089 1090 default: 1091 error = EINVAL; 1092 break; 1093 } 1094 break; 1095 } 1096 1097 case PPS_IOC_GETCAP: 1098 *(int*)data = ppscap; 1099 break; 1100 1101 case PPS_IOC_FETCH: { 1102 pps_info_t *pi; 1103 pi = (pps_info_t *)data; 1104 *pi = sc->ppsinfo; 1105 break; 1106 } 1107 1108 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1109 /* 1110 * Some GPS clocks models use the falling rather than 1111 * rising edge as the on-the-second signal. 1112 * The old API has no way to specify PPS polarity. 1113 */ 1114 sc->sc_ppsmask = MSR_DCD; 1115 #ifndef PPS_TRAILING_EDGE 1116 sc->sc_ppsassert = MSR_DCD; 1117 sc->sc_ppsclear = -1; 1118 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1119 &sc->ppsinfo.assert_timestamp); 1120 #else 1121 sc->sc_ppsassert = -1 1122 sc->sc_ppsclear = 0; 1123 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1124 &sc->ppsinfo.clear_timestamp); 1125 #endif 1126 break; 1127 1128 default: 1129 error = ENOTTY; 1130 break; 1131 } 1132 1133 splx(s); 1134 1135 #ifdef COM_DEBUG 1136 if (com_debug) 1137 comstatus(sc, "comioctl "); 1138 #endif 1139 1140 return (error); 1141 } 1142 1143 integrate void 1144 com_schedrx(sc) 1145 struct com_softc *sc; 1146 { 1147 1148 sc->sc_rx_ready = 1; 1149 1150 /* Wake up the poller. */ 1151 #ifdef __GENERIC_SOFT_INTERRUPTS 1152 softintr_schedule(sc->sc_si); 1153 #else 1154 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1155 setsoftserial(); 1156 #else 1157 if (!com_softintr_scheduled) { 1158 com_softintr_scheduled = 1; 1159 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1160 } 1161 #endif 1162 #endif 1163 } 1164 1165 void 1166 com_break(sc, onoff) 1167 struct com_softc *sc; 1168 int onoff; 1169 { 1170 1171 if (onoff) 1172 SET(sc->sc_lcr, LCR_SBREAK); 1173 else 1174 CLR(sc->sc_lcr, LCR_SBREAK); 1175 1176 if (!sc->sc_heldchange) { 1177 if (sc->sc_tx_busy) { 1178 sc->sc_heldtbc = sc->sc_tbc; 1179 sc->sc_tbc = 0; 1180 sc->sc_heldchange = 1; 1181 } else 1182 com_loadchannelregs(sc); 1183 } 1184 } 1185 1186 void 1187 com_modem(sc, onoff) 1188 struct com_softc *sc; 1189 int onoff; 1190 { 1191 1192 if (sc->sc_mcr_dtr == 0) 1193 return; 1194 1195 if (onoff) 1196 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1197 else 1198 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1199 1200 if (!sc->sc_heldchange) { 1201 if (sc->sc_tx_busy) { 1202 sc->sc_heldtbc = sc->sc_tbc; 1203 sc->sc_tbc = 0; 1204 sc->sc_heldchange = 1; 1205 } else 1206 com_loadchannelregs(sc); 1207 } 1208 } 1209 1210 void 1211 tiocm_to_com(sc, how, ttybits) 1212 struct com_softc *sc; 1213 u_long how; 1214 int ttybits; 1215 { 1216 u_char combits; 1217 1218 combits = 0; 1219 if (ISSET(ttybits, TIOCM_DTR)) 1220 SET(combits, MCR_DTR); 1221 if (ISSET(ttybits, TIOCM_RTS)) 1222 SET(combits, MCR_RTS); 1223 1224 switch (how) { 1225 case TIOCMBIC: 1226 CLR(sc->sc_mcr, combits); 1227 break; 1228 1229 case TIOCMBIS: 1230 SET(sc->sc_mcr, combits); 1231 break; 1232 1233 case TIOCMSET: 1234 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1235 SET(sc->sc_mcr, combits); 1236 break; 1237 } 1238 1239 if (!sc->sc_heldchange) { 1240 if (sc->sc_tx_busy) { 1241 sc->sc_heldtbc = sc->sc_tbc; 1242 sc->sc_tbc = 0; 1243 sc->sc_heldchange = 1; 1244 } else 1245 com_loadchannelregs(sc); 1246 } 1247 } 1248 1249 int 1250 com_to_tiocm(sc) 1251 struct com_softc *sc; 1252 { 1253 u_char combits; 1254 int ttybits = 0; 1255 1256 combits = sc->sc_mcr; 1257 if (ISSET(combits, MCR_DTR)) 1258 SET(ttybits, TIOCM_DTR); 1259 if (ISSET(combits, MCR_RTS)) 1260 SET(ttybits, TIOCM_RTS); 1261 1262 combits = sc->sc_msr; 1263 if (ISSET(combits, MSR_DCD)) 1264 SET(ttybits, TIOCM_CD); 1265 if (ISSET(combits, MSR_CTS)) 1266 SET(ttybits, TIOCM_CTS); 1267 if (ISSET(combits, MSR_DSR)) 1268 SET(ttybits, TIOCM_DSR); 1269 if (ISSET(combits, MSR_RI | MSR_TERI)) 1270 SET(ttybits, TIOCM_RI); 1271 1272 if (sc->sc_ier != 0) 1273 SET(ttybits, TIOCM_LE); 1274 1275 return (ttybits); 1276 } 1277 1278 static u_char 1279 cflag2lcr(cflag) 1280 tcflag_t cflag; 1281 { 1282 u_char lcr = 0; 1283 1284 switch (ISSET(cflag, CSIZE)) { 1285 case CS5: 1286 SET(lcr, LCR_5BITS); 1287 break; 1288 case CS6: 1289 SET(lcr, LCR_6BITS); 1290 break; 1291 case CS7: 1292 SET(lcr, LCR_7BITS); 1293 break; 1294 case CS8: 1295 SET(lcr, LCR_8BITS); 1296 break; 1297 } 1298 if (ISSET(cflag, PARENB)) { 1299 SET(lcr, LCR_PENAB); 1300 if (!ISSET(cflag, PARODD)) 1301 SET(lcr, LCR_PEVEN); 1302 } 1303 if (ISSET(cflag, CSTOPB)) 1304 SET(lcr, LCR_STOPB); 1305 1306 return (lcr); 1307 } 1308 1309 int 1310 comparam(tp, t) 1311 struct tty *tp; 1312 struct termios *t; 1313 { 1314 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1315 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1316 u_char lcr; 1317 int s; 1318 1319 if (COM_ISALIVE(sc) == 0) 1320 return (EIO); 1321 1322 /* Check requested parameters. */ 1323 if (ospeed < 0) 1324 return (EINVAL); 1325 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1326 return (EINVAL); 1327 1328 /* 1329 * For the console, always force CLOCAL and !HUPCL, so that the port 1330 * is always active. 1331 */ 1332 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1333 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1334 SET(t->c_cflag, CLOCAL); 1335 CLR(t->c_cflag, HUPCL); 1336 } 1337 1338 /* 1339 * If there were no changes, don't do anything. This avoids dropping 1340 * input and improves performance when all we did was frob things like 1341 * VMIN and VTIME. 1342 */ 1343 if (tp->t_ospeed == t->c_ospeed && 1344 tp->t_cflag == t->c_cflag) 1345 return (0); 1346 1347 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1348 1349 s = splserial(); 1350 1351 sc->sc_lcr = lcr; 1352 1353 /* 1354 * If we're not in a mode that assumes a connection is present, then 1355 * ignore carrier changes. 1356 */ 1357 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1358 sc->sc_msr_dcd = 0; 1359 else 1360 sc->sc_msr_dcd = MSR_DCD; 1361 /* 1362 * Set the flow control pins depending on the current flow control 1363 * mode. 1364 */ 1365 if (ISSET(t->c_cflag, CRTSCTS)) { 1366 sc->sc_mcr_dtr = MCR_DTR; 1367 sc->sc_mcr_rts = MCR_RTS; 1368 sc->sc_msr_cts = MSR_CTS; 1369 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1370 } else if (ISSET(t->c_cflag, MDMBUF)) { 1371 /* 1372 * For DTR/DCD flow control, make sure we don't toggle DTR for 1373 * carrier detection. 1374 */ 1375 sc->sc_mcr_dtr = 0; 1376 sc->sc_mcr_rts = MCR_DTR; 1377 sc->sc_msr_cts = MSR_DCD; 1378 sc->sc_efr = 0; 1379 } else { 1380 /* 1381 * If no flow control, then always set RTS. This will make 1382 * the other side happy if it mistakenly thinks we're doing 1383 * RTS/CTS flow control. 1384 */ 1385 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1386 sc->sc_mcr_rts = 0; 1387 sc->sc_msr_cts = 0; 1388 sc->sc_efr = 0; 1389 if (ISSET(sc->sc_mcr, MCR_DTR)) 1390 SET(sc->sc_mcr, MCR_RTS); 1391 else 1392 CLR(sc->sc_mcr, MCR_RTS); 1393 } 1394 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1395 1396 #if 0 1397 if (ospeed == 0) 1398 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1399 else 1400 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1401 #endif 1402 1403 sc->sc_dlbl = ospeed; 1404 sc->sc_dlbh = ospeed >> 8; 1405 1406 /* 1407 * Set the FIFO threshold based on the receive speed. 1408 * 1409 * * If it's a low speed, it's probably a mouse or some other 1410 * interactive device, so set the threshold low. 1411 * * If it's a high speed, trim the trigger level down to prevent 1412 * overflows. 1413 * * Otherwise set it a bit higher. 1414 */ 1415 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1416 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1417 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1418 sc->sc_fifo = FIFO_ENABLE | 1419 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1420 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1421 else 1422 sc->sc_fifo = 0; 1423 1424 /* And copy to tty. */ 1425 tp->t_ispeed = 0; 1426 tp->t_ospeed = t->c_ospeed; 1427 tp->t_cflag = t->c_cflag; 1428 1429 if (!sc->sc_heldchange) { 1430 if (sc->sc_tx_busy) { 1431 sc->sc_heldtbc = sc->sc_tbc; 1432 sc->sc_tbc = 0; 1433 sc->sc_heldchange = 1; 1434 } else 1435 com_loadchannelregs(sc); 1436 } 1437 1438 if (!ISSET(t->c_cflag, CHWFLOW)) { 1439 /* Disable the high water mark. */ 1440 sc->sc_r_hiwat = 0; 1441 sc->sc_r_lowat = 0; 1442 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1443 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1444 com_schedrx(sc); 1445 } 1446 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1447 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1448 com_hwiflow(sc); 1449 } 1450 } else { 1451 sc->sc_r_hiwat = com_rbuf_hiwat; 1452 sc->sc_r_lowat = com_rbuf_lowat; 1453 } 1454 1455 splx(s); 1456 1457 /* 1458 * Update the tty layer's idea of the carrier bit, in case we changed 1459 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1460 * explicit request. 1461 */ 1462 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1463 1464 #ifdef COM_DEBUG 1465 if (com_debug) 1466 comstatus(sc, "comparam "); 1467 #endif 1468 1469 if (!ISSET(t->c_cflag, CHWFLOW)) { 1470 if (sc->sc_tx_stopped) { 1471 sc->sc_tx_stopped = 0; 1472 comstart(tp); 1473 } 1474 } 1475 1476 return (0); 1477 } 1478 1479 void 1480 com_iflush(sc) 1481 struct com_softc *sc; 1482 { 1483 bus_space_tag_t iot = sc->sc_iot; 1484 bus_space_handle_t ioh = sc->sc_ioh; 1485 #ifdef DIAGNOSTIC 1486 int reg; 1487 #endif 1488 int timo; 1489 1490 #ifdef DIAGNOSTIC 1491 reg = 0xffff; 1492 #endif 1493 timo = 50000; 1494 /* flush any pending I/O */ 1495 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1496 && --timo) 1497 #ifdef DIAGNOSTIC 1498 reg = 1499 #else 1500 (void) 1501 #endif 1502 bus_space_read_1(iot, ioh, com_data); 1503 #ifdef DIAGNOSTIC 1504 if (!timo) 1505 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1506 reg); 1507 #endif 1508 } 1509 1510 void 1511 com_loadchannelregs(sc) 1512 struct com_softc *sc; 1513 { 1514 bus_space_tag_t iot = sc->sc_iot; 1515 bus_space_handle_t ioh = sc->sc_ioh; 1516 1517 /* XXXXX necessary? */ 1518 com_iflush(sc); 1519 1520 bus_space_write_1(iot, ioh, com_ier, 0); 1521 1522 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1523 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1524 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1525 } 1526 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1527 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1528 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1529 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1530 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1531 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1532 1533 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1534 } 1535 1536 int 1537 comhwiflow(tp, block) 1538 struct tty *tp; 1539 int block; 1540 { 1541 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1542 int s; 1543 1544 if (COM_ISALIVE(sc) == 0) 1545 return (0); 1546 1547 if (sc->sc_mcr_rts == 0) 1548 return (0); 1549 1550 s = splserial(); 1551 if (block) { 1552 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1553 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1554 com_hwiflow(sc); 1555 } 1556 } else { 1557 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1558 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1559 com_schedrx(sc); 1560 } 1561 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1562 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1563 com_hwiflow(sc); 1564 } 1565 } 1566 splx(s); 1567 return (1); 1568 } 1569 1570 /* 1571 * (un)block input via hw flowcontrol 1572 */ 1573 void 1574 com_hwiflow(sc) 1575 struct com_softc *sc; 1576 { 1577 bus_space_tag_t iot = sc->sc_iot; 1578 bus_space_handle_t ioh = sc->sc_ioh; 1579 1580 if (sc->sc_mcr_rts == 0) 1581 return; 1582 1583 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1584 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1585 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1586 } else { 1587 SET(sc->sc_mcr, sc->sc_mcr_rts); 1588 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1589 } 1590 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1591 } 1592 1593 1594 void 1595 comstart(tp) 1596 struct tty *tp; 1597 { 1598 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1599 bus_space_tag_t iot = sc->sc_iot; 1600 bus_space_handle_t ioh = sc->sc_ioh; 1601 int s; 1602 1603 if (COM_ISALIVE(sc) == 0) 1604 return; 1605 1606 s = spltty(); 1607 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1608 goto out; 1609 if (sc->sc_tx_stopped) 1610 goto out; 1611 1612 if (tp->t_outq.c_cc <= tp->t_lowat) { 1613 if (ISSET(tp->t_state, TS_ASLEEP)) { 1614 CLR(tp->t_state, TS_ASLEEP); 1615 wakeup(&tp->t_outq); 1616 } 1617 selwakeup(&tp->t_wsel); 1618 if (tp->t_outq.c_cc == 0) 1619 goto out; 1620 } 1621 1622 /* Grab the first contiguous region of buffer space. */ 1623 { 1624 u_char *tba; 1625 int tbc; 1626 1627 tba = tp->t_outq.c_cf; 1628 tbc = ndqb(&tp->t_outq, 0); 1629 1630 (void)splserial(); 1631 1632 sc->sc_tba = tba; 1633 sc->sc_tbc = tbc; 1634 } 1635 1636 SET(tp->t_state, TS_BUSY); 1637 sc->sc_tx_busy = 1; 1638 1639 /* Enable transmit completion interrupts if necessary. */ 1640 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1641 SET(sc->sc_ier, IER_ETXRDY); 1642 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1643 } 1644 1645 /* Output the first chunk of the contiguous buffer. */ 1646 { 1647 int n; 1648 1649 n = sc->sc_tbc; 1650 if (n > sc->sc_fifolen) 1651 n = sc->sc_fifolen; 1652 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1653 sc->sc_tbc -= n; 1654 sc->sc_tba += n; 1655 } 1656 out: 1657 splx(s); 1658 return; 1659 } 1660 1661 /* 1662 * Stop output on a line. 1663 */ 1664 void 1665 comstop(tp, flag) 1666 struct tty *tp; 1667 int flag; 1668 { 1669 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1670 int s; 1671 1672 s = splserial(); 1673 if (ISSET(tp->t_state, TS_BUSY)) { 1674 /* Stop transmitting at the next chunk. */ 1675 sc->sc_tbc = 0; 1676 sc->sc_heldtbc = 0; 1677 if (!ISSET(tp->t_state, TS_TTSTOP)) 1678 SET(tp->t_state, TS_FLUSH); 1679 } 1680 splx(s); 1681 } 1682 1683 void 1684 comdiag(arg) 1685 void *arg; 1686 { 1687 struct com_softc *sc = arg; 1688 int overflows, floods; 1689 int s; 1690 1691 s = splserial(); 1692 overflows = sc->sc_overflows; 1693 sc->sc_overflows = 0; 1694 floods = sc->sc_floods; 1695 sc->sc_floods = 0; 1696 sc->sc_errors = 0; 1697 splx(s); 1698 1699 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1700 sc->sc_dev.dv_xname, 1701 overflows, overflows == 1 ? "" : "s", 1702 floods, floods == 1 ? "" : "s"); 1703 } 1704 1705 integrate void 1706 com_rxsoft(sc, tp) 1707 struct com_softc *sc; 1708 struct tty *tp; 1709 { 1710 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1711 u_char *get, *end; 1712 u_int cc, scc; 1713 u_char lsr; 1714 int code; 1715 int s; 1716 1717 end = sc->sc_ebuf; 1718 get = sc->sc_rbget; 1719 scc = cc = com_rbuf_size - sc->sc_rbavail; 1720 1721 if (cc == com_rbuf_size) { 1722 sc->sc_floods++; 1723 if (sc->sc_errors++ == 0) 1724 callout_reset(&sc->sc_diag_callout, 60 * hz, 1725 comdiag, sc); 1726 } 1727 1728 while (cc) { 1729 code = get[0]; 1730 lsr = get[1]; 1731 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1732 if (ISSET(lsr, LSR_OE)) { 1733 sc->sc_overflows++; 1734 if (sc->sc_errors++ == 0) 1735 callout_reset(&sc->sc_diag_callout, 1736 60 * hz, comdiag, sc); 1737 } 1738 if (ISSET(lsr, LSR_BI | LSR_FE)) 1739 SET(code, TTY_FE); 1740 if (ISSET(lsr, LSR_PE)) 1741 SET(code, TTY_PE); 1742 } 1743 if ((*rint)(code, tp) == -1) { 1744 /* 1745 * The line discipline's buffer is out of space. 1746 */ 1747 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1748 /* 1749 * We're either not using flow control, or the 1750 * line discipline didn't tell us to block for 1751 * some reason. Either way, we have no way to 1752 * know when there's more space available, so 1753 * just drop the rest of the data. 1754 */ 1755 get += cc << 1; 1756 if (get >= end) 1757 get -= com_rbuf_size << 1; 1758 cc = 0; 1759 } else { 1760 /* 1761 * Don't schedule any more receive processing 1762 * until the line discipline tells us there's 1763 * space available (through comhwiflow()). 1764 * Leave the rest of the data in the input 1765 * buffer. 1766 */ 1767 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1768 } 1769 break; 1770 } 1771 get += 2; 1772 if (get >= end) 1773 get = sc->sc_rbuf; 1774 cc--; 1775 } 1776 1777 if (cc != scc) { 1778 sc->sc_rbget = get; 1779 s = splserial(); 1780 cc = sc->sc_rbavail += scc - cc; 1781 /* Buffers should be ok again, release possible block. */ 1782 if (cc >= sc->sc_r_lowat) { 1783 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1784 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1785 SET(sc->sc_ier, IER_ERXRDY); 1786 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1787 } 1788 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1789 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1790 com_hwiflow(sc); 1791 } 1792 } 1793 splx(s); 1794 } 1795 } 1796 1797 integrate void 1798 com_txsoft(sc, tp) 1799 struct com_softc *sc; 1800 struct tty *tp; 1801 { 1802 1803 CLR(tp->t_state, TS_BUSY); 1804 if (ISSET(tp->t_state, TS_FLUSH)) 1805 CLR(tp->t_state, TS_FLUSH); 1806 else 1807 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1808 (*linesw[tp->t_line].l_start)(tp); 1809 } 1810 1811 integrate void 1812 com_stsoft(sc, tp) 1813 struct com_softc *sc; 1814 struct tty *tp; 1815 { 1816 u_char msr, delta; 1817 int s; 1818 1819 s = splserial(); 1820 msr = sc->sc_msr; 1821 delta = sc->sc_msr_delta; 1822 sc->sc_msr_delta = 0; 1823 splx(s); 1824 1825 if (ISSET(delta, sc->sc_msr_dcd)) { 1826 /* 1827 * Inform the tty layer that carrier detect changed. 1828 */ 1829 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1830 } 1831 1832 if (ISSET(delta, sc->sc_msr_cts)) { 1833 /* Block or unblock output according to flow control. */ 1834 if (ISSET(msr, sc->sc_msr_cts)) { 1835 sc->sc_tx_stopped = 0; 1836 (*linesw[tp->t_line].l_start)(tp); 1837 } else { 1838 sc->sc_tx_stopped = 1; 1839 } 1840 } 1841 1842 #ifdef COM_DEBUG 1843 if (com_debug) 1844 comstatus(sc, "com_stsoft"); 1845 #endif 1846 } 1847 1848 #ifdef __GENERIC_SOFT_INTERRUPTS 1849 void 1850 comsoft(arg) 1851 void *arg; 1852 { 1853 struct com_softc *sc = arg; 1854 struct tty *tp; 1855 1856 if (COM_ISALIVE(sc) == 0) 1857 return; 1858 1859 { 1860 #else 1861 void 1862 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1863 comsoft() 1864 #else 1865 comsoft(arg) 1866 void *arg; 1867 #endif 1868 { 1869 struct com_softc *sc; 1870 struct tty *tp; 1871 int unit; 1872 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1873 int s; 1874 1875 s = splsoftserial(); 1876 com_softintr_scheduled = 0; 1877 #endif 1878 1879 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1880 sc = device_lookup(&com_cd, unit); 1881 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1882 continue; 1883 1884 if (COM_ISALIVE(sc) == 0) 1885 continue; 1886 1887 tp = sc->sc_tty; 1888 if (tp == NULL) 1889 continue; 1890 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1891 continue; 1892 #endif 1893 tp = sc->sc_tty; 1894 1895 if (sc->sc_rx_ready) { 1896 sc->sc_rx_ready = 0; 1897 com_rxsoft(sc, tp); 1898 } 1899 1900 if (sc->sc_st_check) { 1901 sc->sc_st_check = 0; 1902 com_stsoft(sc, tp); 1903 } 1904 1905 if (sc->sc_tx_done) { 1906 sc->sc_tx_done = 0; 1907 com_txsoft(sc, tp); 1908 } 1909 } 1910 1911 #ifndef __GENERIC_SOFT_INTERRUPTS 1912 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1913 splx(s); 1914 #endif 1915 #endif 1916 } 1917 1918 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1919 /* there has got to be a better way to do comsoft() */ 1920 }} 1921 #endif 1922 1923 int 1924 comintr(arg) 1925 void *arg; 1926 { 1927 struct com_softc *sc = arg; 1928 bus_space_tag_t iot = sc->sc_iot; 1929 bus_space_handle_t ioh = sc->sc_ioh; 1930 u_char *put, *end; 1931 u_int cc; 1932 u_char lsr, iir; 1933 1934 if (COM_ISALIVE(sc) == 0) 1935 return (0); 1936 1937 iir = bus_space_read_1(iot, ioh, com_iir); 1938 if (ISSET(iir, IIR_NOPEND)) 1939 return (0); 1940 1941 end = sc->sc_ebuf; 1942 put = sc->sc_rbput; 1943 cc = sc->sc_rbavail; 1944 1945 do { 1946 u_char msr, delta; 1947 1948 lsr = bus_space_read_1(iot, ioh, com_lsr); 1949 #if defined(DDB) || defined(KGDB) 1950 if (ISSET(lsr, LSR_BI)) { 1951 #ifndef DDB_BREAK_CHAR 1952 #ifdef DDB 1953 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1954 console_debugger(); 1955 continue; 1956 } 1957 #endif 1958 #ifdef KGDB 1959 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1960 kgdb_connect(1); 1961 continue; 1962 } 1963 #endif 1964 #endif 1965 } 1966 #endif /* DDB || KGDB */ 1967 1968 if (ISSET(lsr, LSR_RCV_MASK) && 1969 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1970 while (cc > 0) { 1971 put[0] = bus_space_read_1(iot, ioh, com_data); 1972 put[1] = lsr; 1973 #if defined(DDB) && defined(DDB_BREAKCHAR) 1974 if (put[0] == DDB_BREAK_CHAR && 1975 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1976 console_debugger(); 1977 1978 lsr = bus_space_read_1(iot, ioh, com_lsr); 1979 if (!ISSET(lsr, LSR_RCV_MASK)) 1980 break; 1981 1982 continue; 1983 } 1984 #endif 1985 put += 2; 1986 if (put >= end) 1987 put = sc->sc_rbuf; 1988 cc--; 1989 1990 lsr = bus_space_read_1(iot, ioh, com_lsr); 1991 if (!ISSET(lsr, LSR_RCV_MASK)) 1992 break; 1993 } 1994 1995 /* 1996 * Current string of incoming characters ended because 1997 * no more data was available or we ran out of space. 1998 * Schedule a receive event if any data was received. 1999 * If we're out of space, turn off receive interrupts. 2000 */ 2001 sc->sc_rbput = put; 2002 sc->sc_rbavail = cc; 2003 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2004 sc->sc_rx_ready = 1; 2005 2006 /* 2007 * See if we are in danger of overflowing a buffer. If 2008 * so, use hardware flow control to ease the pressure. 2009 */ 2010 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2011 cc < sc->sc_r_hiwat) { 2012 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2013 com_hwiflow(sc); 2014 } 2015 2016 /* 2017 * If we're out of space, disable receive interrupts 2018 * until the queue has drained a bit. 2019 */ 2020 if (!cc) { 2021 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2022 CLR(sc->sc_ier, IER_ERXRDY); 2023 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2024 } 2025 } else { 2026 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2027 bus_space_write_1(iot, ioh, com_ier, 0); 2028 delay(10); 2029 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2030 iir = IIR_NOPEND; 2031 continue; 2032 } 2033 } 2034 2035 msr = bus_space_read_1(iot, ioh, com_msr); 2036 delta = msr ^ sc->sc_msr; 2037 sc->sc_msr = msr; 2038 /* 2039 * Pulse-per-second (PSS) signals on edge of DCD? 2040 * Process these even if line discipline is ignoring DCD. 2041 */ 2042 if (delta & sc->sc_ppsmask) { 2043 struct timeval tv; 2044 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2045 /* XXX nanotime() */ 2046 microtime(&tv); 2047 TIMEVAL_TO_TIMESPEC(&tv, 2048 &sc->ppsinfo.assert_timestamp); 2049 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2050 timespecadd(&sc->ppsinfo.assert_timestamp, 2051 &sc->ppsparam.assert_offset, 2052 &sc->ppsinfo.assert_timestamp); 2053 } 2054 2055 #ifdef PPS_SYNC 2056 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2057 hardpps(&tv, tv.tv_usec); 2058 #endif 2059 sc->ppsinfo.assert_sequence++; 2060 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2061 2062 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2063 /* XXX nanotime() */ 2064 microtime(&tv); 2065 TIMEVAL_TO_TIMESPEC(&tv, 2066 &sc->ppsinfo.clear_timestamp); 2067 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2068 timespecadd(&sc->ppsinfo.clear_timestamp, 2069 &sc->ppsparam.clear_offset, 2070 &sc->ppsinfo.clear_timestamp); 2071 } 2072 2073 #ifdef PPS_SYNC 2074 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2075 hardpps(&tv, tv.tv_usec); 2076 #endif 2077 sc->ppsinfo.clear_sequence++; 2078 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2079 } 2080 } 2081 2082 /* 2083 * Process normal status changes 2084 */ 2085 if (ISSET(delta, sc->sc_msr_mask)) { 2086 SET(sc->sc_msr_delta, delta); 2087 2088 /* 2089 * Stop output immediately if we lose the output 2090 * flow control signal or carrier detect. 2091 */ 2092 if (ISSET(~msr, sc->sc_msr_mask)) { 2093 sc->sc_tbc = 0; 2094 sc->sc_heldtbc = 0; 2095 #ifdef COM_DEBUG 2096 if (com_debug) 2097 comstatus(sc, "comintr "); 2098 #endif 2099 } 2100 2101 sc->sc_st_check = 1; 2102 } 2103 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2104 2105 /* 2106 * Done handling any receive interrupts. See if data can be 2107 * transmitted as well. Schedule tx done event if no data left 2108 * and tty was marked busy. 2109 */ 2110 if (ISSET(lsr, LSR_TXRDY)) { 2111 /* 2112 * If we've delayed a parameter change, do it now, and restart 2113 * output. 2114 */ 2115 if (sc->sc_heldchange) { 2116 com_loadchannelregs(sc); 2117 sc->sc_heldchange = 0; 2118 sc->sc_tbc = sc->sc_heldtbc; 2119 sc->sc_heldtbc = 0; 2120 } 2121 2122 /* Output the next chunk of the contiguous buffer, if any. */ 2123 if (sc->sc_tbc > 0) { 2124 int n; 2125 2126 n = sc->sc_tbc; 2127 if (n > sc->sc_fifolen) 2128 n = sc->sc_fifolen; 2129 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2130 sc->sc_tbc -= n; 2131 sc->sc_tba += n; 2132 } else { 2133 /* Disable transmit completion interrupts if necessary. */ 2134 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2135 CLR(sc->sc_ier, IER_ETXRDY); 2136 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2137 } 2138 if (sc->sc_tx_busy) { 2139 sc->sc_tx_busy = 0; 2140 sc->sc_tx_done = 1; 2141 } 2142 } 2143 } 2144 2145 /* Wake up the poller. */ 2146 #ifdef __GENERIC_SOFT_INTERRUPTS 2147 softintr_schedule(sc->sc_si); 2148 #else 2149 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2150 setsoftserial(); 2151 #else 2152 if (!com_softintr_scheduled) { 2153 com_softintr_scheduled = 1; 2154 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2155 } 2156 #endif 2157 #endif 2158 2159 #if NRND > 0 && defined(RND_COM) 2160 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2161 #endif 2162 2163 return (1); 2164 } 2165 2166 /* 2167 * The following functions are polled getc and putc routines, shared 2168 * by the console and kgdb glue. 2169 */ 2170 2171 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2172 #define MAX_UNGETC 20 2173 static int com_ungetc[MAX_UNGETC]; 2174 static int com_ungetccount = 0; 2175 #endif 2176 2177 int 2178 com_common_getc(iot, ioh) 2179 bus_space_tag_t iot; 2180 bus_space_handle_t ioh; 2181 { 2182 int s = splserial(); 2183 u_char stat, c; 2184 2185 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2186 /* got a character from reading things earlier */ 2187 if (com_ungetccount > 0) { 2188 int i; 2189 2190 c = com_ungetc[0]; 2191 for (i = 1; i < com_ungetccount; i++) { 2192 com_ungetc[i -1] = com_ungetc[i]; 2193 } 2194 com_ungetccount--; 2195 splx(s); 2196 return (c); 2197 } 2198 #endif 2199 2200 /* block until a character becomes available */ 2201 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2202 ; 2203 2204 c = bus_space_read_1(iot, ioh, com_data); 2205 stat = bus_space_read_1(iot, ioh, com_iir); 2206 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2207 if (c == DDB_BREAK_CHAR) { 2208 extern int db_active; 2209 2210 if (db_active == 0) { 2211 console_debugger(); 2212 } 2213 } 2214 #endif 2215 splx(s); 2216 return (c); 2217 } 2218 2219 void 2220 com_common_putc(iot, ioh, c) 2221 bus_space_tag_t iot; 2222 bus_space_handle_t ioh; 2223 int c; 2224 { 2225 int s = splserial(); 2226 int timo; 2227 2228 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2229 int cin, stat; 2230 if (com_ungetccount < MAX_UNGETC 2231 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2232 cin = bus_space_read_1(iot, ioh, com_data); 2233 stat = bus_space_read_1(iot, ioh, com_iir); 2234 if (cin == DDB_BREAK_CHAR) { 2235 console_debugger(); 2236 } 2237 com_ungetc[com_ungetccount++] = cin; 2238 } 2239 #endif 2240 2241 /* wait for any pending transmission to finish */ 2242 timo = 150000; 2243 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2244 continue; 2245 2246 bus_space_write_1(iot, ioh, com_data, c); 2247 COM_BARRIER(iot, ioh, BR | BW); 2248 2249 /* wait for this transmission to complete */ 2250 timo = 1500000; 2251 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2252 continue; 2253 2254 splx(s); 2255 } 2256 2257 /* 2258 * Initialize UART for use as console or KGDB line. 2259 */ 2260 int 2261 cominit(iot, iobase, rate, frequency, cflag, iohp) 2262 bus_space_tag_t iot; 2263 int iobase; 2264 int rate, frequency; 2265 tcflag_t cflag; 2266 bus_space_handle_t *iohp; 2267 { 2268 bus_space_handle_t ioh; 2269 2270 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2271 return (ENOMEM); /* ??? */ 2272 2273 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2274 bus_space_write_1(iot, ioh, com_efr, 0); 2275 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2276 rate = comspeed(rate, frequency); 2277 bus_space_write_1(iot, ioh, com_dlbl, rate); 2278 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2279 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2280 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2281 bus_space_write_1(iot, ioh, com_fifo, 2282 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2283 bus_space_write_1(iot, ioh, com_ier, 0); 2284 2285 *iohp = ioh; 2286 return (0); 2287 } 2288 2289 /* 2290 * Following are all routines needed for COM to act as console 2291 */ 2292 2293 int 2294 comcnattach(iot, iobase, rate, frequency, cflag) 2295 bus_space_tag_t iot; 2296 int iobase; 2297 int rate, frequency; 2298 tcflag_t cflag; 2299 { 2300 int res; 2301 static struct consdev comcons = { 2302 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2303 NODEV, CN_NORMAL 2304 }; 2305 2306 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2307 if (res) 2308 return (res); 2309 2310 cn_tab = &comcons; 2311 2312 comconstag = iot; 2313 comconsaddr = iobase; 2314 comconsrate = rate; 2315 comconscflag = cflag; 2316 2317 return (0); 2318 } 2319 2320 int 2321 comcngetc(dev) 2322 dev_t dev; 2323 { 2324 2325 return (com_common_getc(comconstag, comconsioh)); 2326 } 2327 2328 /* 2329 * Console kernel output character routine. 2330 */ 2331 void 2332 comcnputc(dev, c) 2333 dev_t dev; 2334 int c; 2335 { 2336 2337 com_common_putc(comconstag, comconsioh, c); 2338 } 2339 2340 void 2341 comcnpollc(dev, on) 2342 dev_t dev; 2343 int on; 2344 { 2345 2346 } 2347 2348 #ifdef KGDB 2349 int 2350 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2351 bus_space_tag_t iot; 2352 int iobase; 2353 int rate, frequency; 2354 tcflag_t cflag; 2355 { 2356 int res; 2357 2358 if (iot == comconstag && iobase == comconsaddr) 2359 return (EBUSY); /* cannot share with console */ 2360 2361 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2362 if (res) 2363 return (res); 2364 2365 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2366 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2367 2368 com_kgdb_iot = iot; 2369 com_kgdb_addr = iobase; 2370 2371 return (0); 2372 } 2373 2374 /* ARGSUSED */ 2375 int 2376 com_kgdb_getc(arg) 2377 void *arg; 2378 { 2379 2380 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2381 } 2382 2383 /* ARGSUSED */ 2384 void 2385 com_kgdb_putc(arg, c) 2386 void *arg; 2387 int c; 2388 { 2389 2390 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2391 } 2392 #endif /* KGDB */ 2393 2394 /* helper function to identify the com ports used by 2395 console or KGDB (and not yet autoconf attached) */ 2396 int 2397 com_is_console(iot, iobase, ioh) 2398 bus_space_tag_t iot; 2399 int iobase; 2400 bus_space_handle_t *ioh; 2401 { 2402 bus_space_handle_t help; 2403 2404 if (!comconsattached && 2405 iot == comconstag && iobase == comconsaddr) 2406 help = comconsioh; 2407 #ifdef KGDB 2408 else if (!com_kgdb_attached && 2409 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2410 help = com_kgdb_ioh; 2411 #endif 2412 else 2413 return (0); 2414 2415 if (ioh) 2416 *ioh = help; 2417 return (1); 2418 } 2419
Indexes created Fri Sep 26 20:09:58 GMT 2025