com.c revision 1.177
1 /* $NetBSD: com.c,v 1.177 2000/09/21 23:27:32 eeh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 #if defined(__sparc__) || defined(__sparc_v9__) 75 #define DDB_BREAK_CHAR 1 /* L1 or Stop key */ 76 #endif 77 78 /* 79 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 80 * Supports automatic hardware flow control on StarTech ST16C650A UART 81 */ 82 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_com.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/ioctl.h> 95 #include <sys/select.h> 96 #include <sys/tty.h> 97 #include <sys/proc.h> 98 #include <sys/user.h> 99 #include <sys/conf.h> 100 #include <sys/file.h> 101 #include <sys/uio.h> 102 #include <sys/kernel.h> 103 #include <sys/syslog.h> 104 #include <sys/types.h> 105 #include <sys/device.h> 106 #include <sys/malloc.h> 107 #include <sys/timepps.h> 108 #include <sys/vnode.h> 109 110 #include <machine/intr.h> 111 #include <machine/bus.h> 112 113 #include <dev/ic/comreg.h> 114 #include <dev/ic/comvar.h> 115 #include <dev/ic/ns16550reg.h> 116 #include <dev/ic/st16650reg.h> 117 #ifdef COM_HAYESP 118 #include <dev/ic/hayespreg.h> 119 #endif 120 #define com_lcr com_cfcr 121 #include <dev/cons.h> 122 123 #include "com.h" 124 125 #ifdef COM_HAYESP 126 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 127 #endif 128 129 #if defined(DDB) || defined(KGDB) 130 static void com_enable_debugport __P((struct com_softc *)); 131 #endif 132 void com_config __P((struct com_softc *)); 133 void com_shutdown __P((struct com_softc *)); 134 int comspeed __P((long, long)); 135 static u_char cflag2lcr __P((tcflag_t)); 136 int comparam __P((struct tty *, struct termios *)); 137 void comstart __P((struct tty *)); 138 void comstop __P((struct tty *, int)); 139 int comhwiflow __P((struct tty *, int)); 140 141 void com_loadchannelregs __P((struct com_softc *)); 142 void com_hwiflow __P((struct com_softc *)); 143 void com_break __P((struct com_softc *, int)); 144 void com_modem __P((struct com_softc *, int)); 145 void tiocm_to_com __P((struct com_softc *, u_long, int)); 146 int com_to_tiocm __P((struct com_softc *)); 147 void com_iflush __P((struct com_softc *)); 148 149 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 150 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 151 152 /* XXX: These belong elsewhere */ 153 cdev_decl(com); 154 bdev_decl(com); 155 156 int comcngetc __P((dev_t)); 157 void comcnputc __P((dev_t, int)); 158 void comcnpollc __P((dev_t, int)); 159 160 #define integrate static inline 161 #ifdef __GENERIC_SOFT_INTERRUPTS 162 void comsoft __P((void *)); 163 #else 164 #ifndef __NO_SOFT_SERIAL_INTERRUPT 165 void comsoft __P((void)); 166 #else 167 void comsoft __P((void *)); 168 struct callout comsoft_callout = CALLOUT_INITIALIZER; 169 #endif 170 #endif 171 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 172 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 173 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 174 integrate void com_schedrx __P((struct com_softc *)); 175 void comdiag __P((void *)); 176 177 extern struct cfdriver com_cd; 178 179 /* 180 * Make this an option variable one can patch. 181 * But be warned: this must be a power of 2! 182 */ 183 u_int com_rbuf_size = COM_RING_SIZE; 184 185 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 186 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 187 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 188 189 static paddr_t comconsaddr; 190 static bus_space_tag_t comconstag; 191 static bus_space_handle_t comconsioh; 192 static int comconsattached; 193 static int comconsrate; 194 static tcflag_t comconscflag; 195 196 static int ppscap = 197 PPS_TSFMT_TSPEC | 198 PPS_CAPTUREASSERT | 199 PPS_CAPTURECLEAR | 200 #ifdef PPS_SYNC 201 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 202 #endif /* PPS_SYNC */ 203 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 204 205 #ifndef __GENERIC_SOFT_INTERRUPTS 206 #ifdef __NO_SOFT_SERIAL_INTERRUPT 207 volatile int com_softintr_scheduled; 208 #endif 209 #endif 210 211 #ifdef KGDB 212 #include <sys/kgdb.h> 213 214 static paddr_t com_kgdb_addr; 215 static bus_space_tag_t com_kgdb_iot; 216 static bus_space_handle_t com_kgdb_ioh; 217 static int com_kgdb_attached; 218 219 int com_kgdb_getc __P((void *)); 220 void com_kgdb_putc __P((void *, int)); 221 #endif /* KGDB */ 222 223 #define COMUNIT_MASK 0x7ffff 224 #define COMDIALOUT_MASK 0x80000 225 226 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 227 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 228 229 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 230 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 231 232 #define BR BUS_SPACE_BARRIER_READ 233 #define BW BUS_SPACE_BARRIER_WRITE 234 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 235 236 int 237 comspeed(speed, frequency) 238 long speed, frequency; 239 { 240 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 241 242 int x, err; 243 244 #if 0 245 if (speed == 0) 246 return (0); 247 #endif 248 if (speed <= 0) 249 return (-1); 250 x = divrnd(frequency / 16, speed); 251 if (x <= 0) 252 return (-1); 253 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 254 if (err < 0) 255 err = -err; 256 if (err > COM_TOLERANCE) 257 return (-1); 258 return (x); 259 260 #undef divrnd 261 } 262 263 #ifdef COM_DEBUG 264 int com_debug = 0; 265 266 void comstatus __P((struct com_softc *, char *)); 267 void 268 comstatus(sc, str) 269 struct com_softc *sc; 270 char *str; 271 { 272 struct tty *tp = sc->sc_tty; 273 274 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 275 sc->sc_dev.dv_xname, str, 276 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 277 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 278 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 279 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 280 sc->sc_tx_stopped ? "+" : "-"); 281 282 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 283 sc->sc_dev.dv_xname, str, 284 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 285 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 286 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 287 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 288 sc->sc_rx_flags); 289 } 290 #endif 291 292 int 293 comprobe1(iot, ioh) 294 bus_space_tag_t iot; 295 bus_space_handle_t ioh; 296 { 297 298 /* force access to id reg */ 299 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 300 bus_space_write_1(iot, ioh, com_iir, 0); 301 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 302 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 303 return (0); 304 305 return (1); 306 } 307 308 #ifdef COM_HAYESP 309 int 310 comprobeHAYESP(hayespioh, sc) 311 bus_space_handle_t hayespioh; 312 struct com_softc *sc; 313 { 314 char val, dips; 315 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 316 bus_space_tag_t iot = sc->sc_iot; 317 318 /* 319 * Hayes ESP cards have two iobases. One is for compatibility with 320 * 16550 serial chips, and at the same ISA PC base addresses. The 321 * other is for ESP-specific enhanced features, and lies at a 322 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 323 */ 324 325 /* Test for ESP signature */ 326 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 327 return (0); 328 329 /* 330 * ESP is present at ESP enhanced base address; unknown com port 331 */ 332 333 /* Get the dip-switch configurations */ 334 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 335 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 336 337 /* Determine which com port this ESP card services: bits 0,1 of */ 338 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 339 if (sc->sc_iobase != combaselist[dips & 0x03]) 340 return (0); 341 342 printf(": ESP"); 343 344 /* Check ESP Self Test bits. */ 345 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 346 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 347 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 348 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 349 if ((val & 0x70) < 0x20) { 350 printf("-old (%o)", val & 0x70); 351 /* we do not support the necessary features */ 352 return (0); 353 } 354 355 /* Check for ability to emulate 16550: bit 8 == 1 */ 356 if ((dips & 0x80) == 0) { 357 printf(" slave"); 358 /* XXX Does slave really mean no 16550 support?? */ 359 return (0); 360 } 361 362 /* 363 * If we made it this far, we are a full-featured ESP v2.0 (or 364 * better), at the correct com port address. 365 */ 366 367 SET(sc->sc_hwflags, COM_HW_HAYESP); 368 printf(", 1024 byte fifo\n"); 369 return (1); 370 } 371 #endif 372 373 #if defined(DDB) || defined(KGDB) 374 static void 375 com_enable_debugport(sc) 376 struct com_softc *sc; 377 { 378 int s; 379 380 /* Turn on line break interrupt, set carrier. */ 381 s = splserial(); 382 sc->sc_ier = IER_ERXRDY; 383 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 384 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 385 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 386 splx(s); 387 } 388 #endif 389 390 void 391 com_attach_subr(sc) 392 struct com_softc *sc; 393 { 394 paddr_t iobase = sc->sc_iobase; 395 bus_space_tag_t iot = sc->sc_iot; 396 bus_space_handle_t ioh = sc->sc_ioh; 397 struct tty *tp; 398 #ifdef COM16650 399 u_int8_t lcr; 400 #endif 401 #ifdef COM_HAYESP 402 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 403 int *hayespp; 404 #endif 405 406 callout_init(&sc->sc_diag_callout); 407 408 /* Disable interrupts before configuring the device. */ 409 sc->sc_ier = 0; 410 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 411 412 if (iot == comconstag && iobase == comconsaddr) { 413 comconsattached = 1; 414 415 /* Make sure the console is always "hardwired". */ 416 delay(1000); /* wait for output to finish */ 417 SET(sc->sc_hwflags, COM_HW_CONSOLE); 418 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 419 } 420 421 #ifdef COM_HAYESP 422 /* Look for a Hayes ESP board. */ 423 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 424 bus_space_handle_t hayespioh; 425 426 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 427 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 428 continue; 429 if (comprobeHAYESP(hayespioh, sc)) { 430 sc->sc_hayespioh = hayespioh; 431 sc->sc_fifolen = 1024; 432 433 break; 434 } 435 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 436 } 437 /* No ESP; look for other things. */ 438 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 439 #endif 440 sc->sc_fifolen = 1; 441 /* look for a NS 16550AF UART with FIFOs */ 442 bus_space_write_1(iot, ioh, com_fifo, 443 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 444 delay(100); 445 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 446 == IIR_FIFO_MASK) 447 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 448 == FIFO_TRIGGER_14) { 449 SET(sc->sc_hwflags, COM_HW_FIFO); 450 451 #ifdef COM16650 452 /* 453 * IIR changes into the EFR if LCR is set to LCR_EERS 454 * on 16650s. We also know IIR != 0 at this point. 455 * Write 0 into the EFR, and read it. If the result 456 * is 0, we have a 16650. 457 * 458 * Older 16650s were broken; the test to detect them 459 * is taken from the Linux driver. Apparently 460 * setting DLAB enable gives access to the EFR on 461 * these chips. 462 */ 463 lcr = bus_space_read_1(iot, ioh, com_lcr); 464 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 465 bus_space_write_1(iot, ioh, com_efr, 0); 466 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 467 bus_space_write_1(iot, ioh, com_lcr, 468 lcr | LCR_DLAB); 469 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 470 CLR(sc->sc_hwflags, COM_HW_FIFO); 471 sc->sc_fifolen = 0; 472 } else { 473 SET(sc->sc_hwflags, COM_HW_FLOW); 474 sc->sc_fifolen = 32; 475 } 476 } else 477 #endif 478 sc->sc_fifolen = 16; 479 480 #ifdef COM16650 481 bus_space_write_1(iot, ioh, com_lcr, lcr); 482 if (sc->sc_fifolen == 0) 483 printf(": st16650, broken fifo\n"); 484 else if (sc->sc_fifolen == 32) 485 printf(": st16650a, working fifo\n"); 486 else 487 #endif 488 printf(": ns16550a, working fifo\n"); 489 } else 490 printf(": ns16550, broken fifo\n"); 491 else 492 printf(": ns8250 or ns16450, no fifo\n"); 493 bus_space_write_1(iot, ioh, com_fifo, 0); 494 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 495 sc->sc_fifolen = 1; 496 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 497 } 498 #ifdef COM_HAYESP 499 } 500 #endif 501 502 tp = ttymalloc(); 503 tp->t_oproc = comstart; 504 tp->t_param = comparam; 505 tp->t_hwiflow = comhwiflow; 506 507 sc->sc_tty = tp; 508 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 509 if (sc->sc_rbuf == NULL) { 510 printf("%s: unable to allocate ring buffer\n", 511 sc->sc_dev.dv_xname); 512 return; 513 } 514 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 515 516 tty_attach(tp); 517 518 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 519 SET(sc->sc_mcr, MCR_IENABLE); 520 521 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 522 int maj; 523 524 /* locate the major number */ 525 for (maj = 0; maj < nchrdev; maj++) 526 if (cdevsw[maj].d_open == comopen) 527 break; 528 529 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 530 531 printf("%s: console\n", sc->sc_dev.dv_xname); 532 } 533 534 #ifdef KGDB 535 /* 536 * Allow kgdb to "take over" this port. If this is 537 * the kgdb device, it has exclusive use. 538 */ 539 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 540 com_kgdb_attached = 1; 541 542 SET(sc->sc_hwflags, COM_HW_KGDB); 543 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 544 } 545 #endif 546 547 #ifdef __GENERIC_SOFT_INTERRUPTS 548 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 549 #endif 550 551 #if NRND > 0 && defined(RND_COM) 552 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 553 RND_TYPE_TTY, 0); 554 #endif 555 556 /* if there are no enable/disable functions, assume the device 557 is always enabled */ 558 if (!sc->enable) 559 sc->enabled = 1; 560 561 com_config(sc); 562 563 SET(sc->sc_hwflags, COM_HW_DEV_OK); 564 } 565 566 void 567 com_config(sc) 568 struct com_softc *sc; 569 { 570 bus_space_tag_t iot = sc->sc_iot; 571 bus_space_handle_t ioh = sc->sc_ioh; 572 573 /* Disable interrupts before configuring the device. */ 574 sc->sc_ier = 0; 575 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 576 577 #ifdef COM_HAYESP 578 /* Look for a Hayes ESP board. */ 579 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 580 sc->sc_fifolen = 1024; 581 582 /* Set 16550 compatibility mode */ 583 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 584 HAYESP_SETMODE); 585 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 587 HAYESP_MODE_SCALE); 588 589 /* Set RTS/CTS flow control */ 590 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 591 HAYESP_SETFLOWTYPE); 592 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 593 HAYESP_FLOW_RTS); 594 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 595 HAYESP_FLOW_CTS); 596 597 /* Set flow control levels */ 598 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 599 HAYESP_SETRXFLOW); 600 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 601 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 603 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 604 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 605 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 606 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 607 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 608 } 609 #endif 610 611 #ifdef DDB 612 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 613 com_enable_debugport(sc); 614 #endif 615 616 #ifdef KGDB 617 /* 618 * Allow kgdb to "take over" this port. If this is 619 * the kgdb device, it has exclusive use. 620 */ 621 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 622 com_enable_debugport(sc); 623 #endif 624 } 625 626 int 627 com_detach(self, flags) 628 struct device *self; 629 int flags; 630 { 631 struct com_softc *sc = (struct com_softc *)self; 632 int maj, mn; 633 634 /* locate the major number */ 635 for (maj = 0; maj < nchrdev; maj++) 636 if (cdevsw[maj].d_open == comopen) 637 break; 638 639 /* Nuke the vnodes for any open instances. */ 640 mn = self->dv_unit; 641 vdevgone(maj, mn, mn, VCHR); 642 643 mn |= COMDIALOUT_MASK; 644 vdevgone(maj, mn, mn, VCHR); 645 646 /* Free the receive buffer. */ 647 free(sc->sc_rbuf, M_DEVBUF); 648 649 /* Detach and free the tty. */ 650 tty_detach(sc->sc_tty); 651 ttyfree(sc->sc_tty); 652 653 #ifdef __GENERIC_SOFT_INTERRUPTS 654 /* Unhook the soft interrupt handler. */ 655 softintr_disestablish(sc->sc_si); 656 #endif 657 658 #if NRND > 0 && defined(RND_COM) 659 /* Unhook the entropy source. */ 660 rnd_detach_source(&sc->rnd_source); 661 #endif 662 663 return (0); 664 } 665 666 int 667 com_activate(self, act) 668 struct device *self; 669 enum devact act; 670 { 671 struct com_softc *sc = (struct com_softc *)self; 672 int s, rv = 0; 673 674 s = splserial(); 675 switch (act) { 676 case DVACT_ACTIVATE: 677 rv = EOPNOTSUPP; 678 break; 679 680 case DVACT_DEACTIVATE: 681 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 682 rv = EBUSY; 683 break; 684 } 685 686 if (sc->disable != NULL && sc->enabled != 0) { 687 (*sc->disable)(sc); 688 sc->enabled = 0; 689 } 690 break; 691 } 692 splx(s); 693 return (rv); 694 } 695 696 void 697 com_shutdown(sc) 698 struct com_softc *sc; 699 { 700 struct tty *tp = sc->sc_tty; 701 int s; 702 703 s = splserial(); 704 705 /* If we were asserting flow control, then deassert it. */ 706 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 707 com_hwiflow(sc); 708 709 /* Clear any break condition set with TIOCSBRK. */ 710 com_break(sc, 0); 711 712 /* Turn off PPS capture on last close. */ 713 sc->sc_ppsmask = 0; 714 sc->ppsparam.mode = 0; 715 716 /* 717 * Hang up if necessary. Wait a bit, so the other side has time to 718 * notice even if we immediately open the port again. 719 * Avoid tsleeping above splhigh(). 720 */ 721 if (ISSET(tp->t_cflag, HUPCL)) { 722 com_modem(sc, 0); 723 splx(s); 724 /* XXX tsleep will only timeout */ 725 (void) tsleep(sc, TTIPRI, ttclos, hz); 726 s = splserial(); 727 } 728 729 /* Turn off interrupts. */ 730 #ifdef DDB 731 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 732 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 733 else 734 #endif 735 sc->sc_ier = 0; 736 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 737 738 if (sc->disable) { 739 #ifdef DIAGNOSTIC 740 if (!sc->enabled) 741 panic("com_shutdown: not enabled?"); 742 #endif 743 (*sc->disable)(sc); 744 sc->enabled = 0; 745 } 746 747 splx(s); 748 } 749 750 int 751 comopen(dev, flag, mode, p) 752 dev_t dev; 753 int flag, mode; 754 struct proc *p; 755 { 756 struct com_softc *sc; 757 struct tty *tp; 758 int s, s2; 759 int error; 760 761 sc = device_lookup(&com_cd, COMUNIT(dev)); 762 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 763 sc->sc_rbuf == NULL) 764 return (ENXIO); 765 766 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 767 return (ENXIO); 768 769 #ifdef KGDB 770 /* 771 * If this is the kgdb port, no other use is permitted. 772 */ 773 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 774 return (EBUSY); 775 #endif 776 777 tp = sc->sc_tty; 778 779 if (ISSET(tp->t_state, TS_ISOPEN) && 780 ISSET(tp->t_state, TS_XCLUDE) && 781 p->p_ucred->cr_uid != 0) 782 return (EBUSY); 783 784 s = spltty(); 785 786 /* 787 * Do the following iff this is a first open. 788 */ 789 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 790 struct termios t; 791 792 tp->t_dev = dev; 793 794 s2 = splserial(); 795 796 if (sc->enable) { 797 if ((*sc->enable)(sc)) { 798 splx(s2); 799 splx(s); 800 printf("%s: device enable failed\n", 801 sc->sc_dev.dv_xname); 802 return (EIO); 803 } 804 sc->enabled = 1; 805 com_config(sc); 806 } 807 808 /* Turn on interrupts. */ 809 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 810 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 811 812 /* Fetch the current modem control status, needed later. */ 813 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 814 815 /* Clear PPS capture state on first open. */ 816 sc->sc_ppsmask = 0; 817 sc->ppsparam.mode = 0; 818 819 splx(s2); 820 821 /* 822 * Initialize the termios status to the defaults. Add in the 823 * sticky bits from TIOCSFLAGS. 824 */ 825 t.c_ispeed = 0; 826 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 827 t.c_ospeed = comconsrate; 828 t.c_cflag = comconscflag; 829 } else { 830 t.c_ospeed = TTYDEF_SPEED; 831 t.c_cflag = TTYDEF_CFLAG; 832 } 833 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 834 SET(t.c_cflag, CLOCAL); 835 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 836 SET(t.c_cflag, CRTSCTS); 837 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 838 SET(t.c_cflag, MDMBUF); 839 /* Make sure comparam() will do something. */ 840 tp->t_ospeed = 0; 841 (void) comparam(tp, &t); 842 tp->t_iflag = TTYDEF_IFLAG; 843 tp->t_oflag = TTYDEF_OFLAG; 844 tp->t_lflag = TTYDEF_LFLAG; 845 ttychars(tp); 846 ttsetwater(tp); 847 848 s2 = splserial(); 849 850 /* 851 * Turn on DTR. We must always do this, even if carrier is not 852 * present, because otherwise we'd have to use TIOCSDTR 853 * immediately after setting CLOCAL, which applications do not 854 * expect. We always assert DTR while the device is open 855 * unless explicitly requested to deassert it. 856 */ 857 com_modem(sc, 1); 858 859 /* Clear the input ring, and unblock. */ 860 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 861 sc->sc_rbavail = com_rbuf_size; 862 com_iflush(sc); 863 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 864 com_hwiflow(sc); 865 866 #ifdef COM_DEBUG 867 if (com_debug) 868 comstatus(sc, "comopen "); 869 #endif 870 871 splx(s2); 872 } 873 874 splx(s); 875 876 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 877 if (error) 878 goto bad; 879 880 error = (*linesw[tp->t_line].l_open)(dev, tp); 881 if (error) 882 goto bad; 883 884 return (0); 885 886 bad: 887 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 888 /* 889 * We failed to open the device, and nobody else had it opened. 890 * Clean up the state as appropriate. 891 */ 892 com_shutdown(sc); 893 } 894 895 return (error); 896 } 897 898 int 899 comclose(dev, flag, mode, p) 900 dev_t dev; 901 int flag, mode; 902 struct proc *p; 903 { 904 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 905 struct tty *tp = sc->sc_tty; 906 907 /* XXX This is for cons.c. */ 908 if (!ISSET(tp->t_state, TS_ISOPEN)) 909 return (0); 910 911 (*linesw[tp->t_line].l_close)(tp, flag); 912 ttyclose(tp); 913 914 if (COM_ISALIVE(sc) == 0) 915 return (0); 916 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * Although we got a last close, the device may still be in 920 * use; e.g. if this was the dialout node, and there are still 921 * processes waiting for carrier on the non-dialout node. 922 */ 923 com_shutdown(sc); 924 } 925 926 return (0); 927 } 928 929 int 930 comread(dev, uio, flag) 931 dev_t dev; 932 struct uio *uio; 933 int flag; 934 { 935 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 936 struct tty *tp = sc->sc_tty; 937 938 if (COM_ISALIVE(sc) == 0) 939 return (EIO); 940 941 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 942 } 943 944 int 945 comwrite(dev, uio, flag) 946 dev_t dev; 947 struct uio *uio; 948 int flag; 949 { 950 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 951 struct tty *tp = sc->sc_tty; 952 953 if (COM_ISALIVE(sc) == 0) 954 return (EIO); 955 956 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 957 } 958 959 struct tty * 960 comtty(dev) 961 dev_t dev; 962 { 963 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 return (tp); 967 } 968 969 int 970 comioctl(dev, cmd, data, flag, p) 971 dev_t dev; 972 u_long cmd; 973 caddr_t data; 974 int flag; 975 struct proc *p; 976 { 977 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 978 struct tty *tp = sc->sc_tty; 979 int error; 980 int s; 981 982 if (COM_ISALIVE(sc) == 0) 983 return (EIO); 984 985 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 986 if (error >= 0) 987 return (error); 988 989 error = ttioctl(tp, cmd, data, flag, p); 990 if (error >= 0) 991 return (error); 992 993 error = 0; 994 995 s = splserial(); 996 997 switch (cmd) { 998 case TIOCSBRK: 999 com_break(sc, 1); 1000 break; 1001 1002 case TIOCCBRK: 1003 com_break(sc, 0); 1004 break; 1005 1006 case TIOCSDTR: 1007 com_modem(sc, 1); 1008 break; 1009 1010 case TIOCCDTR: 1011 com_modem(sc, 0); 1012 break; 1013 1014 case TIOCGFLAGS: 1015 *(int *)data = sc->sc_swflags; 1016 break; 1017 1018 case TIOCSFLAGS: 1019 error = suser(p->p_ucred, &p->p_acflag); 1020 if (error) 1021 break; 1022 sc->sc_swflags = *(int *)data; 1023 break; 1024 1025 case TIOCMSET: 1026 case TIOCMBIS: 1027 case TIOCMBIC: 1028 tiocm_to_com(sc, cmd, *(int *)data); 1029 break; 1030 1031 case TIOCMGET: 1032 *(int *)data = com_to_tiocm(sc); 1033 break; 1034 1035 case PPS_IOC_CREATE: 1036 break; 1037 1038 case PPS_IOC_DESTROY: 1039 break; 1040 1041 case PPS_IOC_GETPARAMS: { 1042 pps_params_t *pp; 1043 pp = (pps_params_t *)data; 1044 *pp = sc->ppsparam; 1045 break; 1046 } 1047 1048 case PPS_IOC_SETPARAMS: { 1049 pps_params_t *pp; 1050 int mode; 1051 pp = (pps_params_t *)data; 1052 if (pp->mode & ~ppscap) { 1053 error = EINVAL; 1054 break; 1055 } 1056 sc->ppsparam = *pp; 1057 /* 1058 * Compute msr masks from user-specified timestamp state. 1059 */ 1060 mode = sc->ppsparam.mode; 1061 #ifdef PPS_SYNC 1062 if (mode & PPS_HARDPPSONASSERT) { 1063 mode |= PPS_CAPTUREASSERT; 1064 /* XXX revoke any previous HARDPPS source */ 1065 } 1066 if (mode & PPS_HARDPPSONCLEAR) { 1067 mode |= PPS_CAPTURECLEAR; 1068 /* XXX revoke any previous HARDPPS source */ 1069 } 1070 #endif /* PPS_SYNC */ 1071 switch (mode & PPS_CAPTUREBOTH) { 1072 case 0: 1073 sc->sc_ppsmask = 0; 1074 break; 1075 1076 case PPS_CAPTUREASSERT: 1077 sc->sc_ppsmask = MSR_DCD; 1078 sc->sc_ppsassert = MSR_DCD; 1079 sc->sc_ppsclear = -1; 1080 break; 1081 1082 case PPS_CAPTURECLEAR: 1083 sc->sc_ppsmask = MSR_DCD; 1084 sc->sc_ppsassert = -1; 1085 sc->sc_ppsclear = 0; 1086 break; 1087 1088 case PPS_CAPTUREBOTH: 1089 sc->sc_ppsmask = MSR_DCD; 1090 sc->sc_ppsassert = MSR_DCD; 1091 sc->sc_ppsclear = 0; 1092 break; 1093 1094 default: 1095 error = EINVAL; 1096 break; 1097 } 1098 break; 1099 } 1100 1101 case PPS_IOC_GETCAP: 1102 *(int*)data = ppscap; 1103 break; 1104 1105 case PPS_IOC_FETCH: { 1106 pps_info_t *pi; 1107 pi = (pps_info_t *)data; 1108 *pi = sc->ppsinfo; 1109 break; 1110 } 1111 1112 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1113 /* 1114 * Some GPS clocks models use the falling rather than 1115 * rising edge as the on-the-second signal. 1116 * The old API has no way to specify PPS polarity. 1117 */ 1118 sc->sc_ppsmask = MSR_DCD; 1119 #ifndef PPS_TRAILING_EDGE 1120 sc->sc_ppsassert = MSR_DCD; 1121 sc->sc_ppsclear = -1; 1122 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1123 &sc->ppsinfo.assert_timestamp); 1124 #else 1125 sc->sc_ppsassert = -1 1126 sc->sc_ppsclear = 0; 1127 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1128 &sc->ppsinfo.clear_timestamp); 1129 #endif 1130 break; 1131 1132 default: 1133 error = ENOTTY; 1134 break; 1135 } 1136 1137 splx(s); 1138 1139 #ifdef COM_DEBUG 1140 if (com_debug) 1141 comstatus(sc, "comioctl "); 1142 #endif 1143 1144 return (error); 1145 } 1146 1147 integrate void 1148 com_schedrx(sc) 1149 struct com_softc *sc; 1150 { 1151 1152 sc->sc_rx_ready = 1; 1153 1154 /* Wake up the poller. */ 1155 #ifdef __GENERIC_SOFT_INTERRUPTS 1156 softintr_schedule(sc->sc_si); 1157 #else 1158 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1159 setsoftserial(); 1160 #else 1161 if (!com_softintr_scheduled) { 1162 com_softintr_scheduled = 1; 1163 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1164 } 1165 #endif 1166 #endif 1167 } 1168 1169 void 1170 com_break(sc, onoff) 1171 struct com_softc *sc; 1172 int onoff; 1173 { 1174 1175 if (onoff) 1176 SET(sc->sc_lcr, LCR_SBREAK); 1177 else 1178 CLR(sc->sc_lcr, LCR_SBREAK); 1179 1180 if (!sc->sc_heldchange) { 1181 if (sc->sc_tx_busy) { 1182 sc->sc_heldtbc = sc->sc_tbc; 1183 sc->sc_tbc = 0; 1184 sc->sc_heldchange = 1; 1185 } else 1186 com_loadchannelregs(sc); 1187 } 1188 } 1189 1190 void 1191 com_modem(sc, onoff) 1192 struct com_softc *sc; 1193 int onoff; 1194 { 1195 1196 if (sc->sc_mcr_dtr == 0) 1197 return; 1198 1199 if (onoff) 1200 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1201 else 1202 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1203 1204 if (!sc->sc_heldchange) { 1205 if (sc->sc_tx_busy) { 1206 sc->sc_heldtbc = sc->sc_tbc; 1207 sc->sc_tbc = 0; 1208 sc->sc_heldchange = 1; 1209 } else 1210 com_loadchannelregs(sc); 1211 } 1212 } 1213 1214 void 1215 tiocm_to_com(sc, how, ttybits) 1216 struct com_softc *sc; 1217 u_long how; 1218 int ttybits; 1219 { 1220 u_char combits; 1221 1222 combits = 0; 1223 if (ISSET(ttybits, TIOCM_DTR)) 1224 SET(combits, MCR_DTR); 1225 if (ISSET(ttybits, TIOCM_RTS)) 1226 SET(combits, MCR_RTS); 1227 1228 switch (how) { 1229 case TIOCMBIC: 1230 CLR(sc->sc_mcr, combits); 1231 break; 1232 1233 case TIOCMBIS: 1234 SET(sc->sc_mcr, combits); 1235 break; 1236 1237 case TIOCMSET: 1238 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1239 SET(sc->sc_mcr, combits); 1240 break; 1241 } 1242 1243 if (!sc->sc_heldchange) { 1244 if (sc->sc_tx_busy) { 1245 sc->sc_heldtbc = sc->sc_tbc; 1246 sc->sc_tbc = 0; 1247 sc->sc_heldchange = 1; 1248 } else 1249 com_loadchannelregs(sc); 1250 } 1251 } 1252 1253 int 1254 com_to_tiocm(sc) 1255 struct com_softc *sc; 1256 { 1257 u_char combits; 1258 int ttybits = 0; 1259 1260 combits = sc->sc_mcr; 1261 if (ISSET(combits, MCR_DTR)) 1262 SET(ttybits, TIOCM_DTR); 1263 if (ISSET(combits, MCR_RTS)) 1264 SET(ttybits, TIOCM_RTS); 1265 1266 combits = sc->sc_msr; 1267 if (ISSET(combits, MSR_DCD)) 1268 SET(ttybits, TIOCM_CD); 1269 if (ISSET(combits, MSR_CTS)) 1270 SET(ttybits, TIOCM_CTS); 1271 if (ISSET(combits, MSR_DSR)) 1272 SET(ttybits, TIOCM_DSR); 1273 if (ISSET(combits, MSR_RI | MSR_TERI)) 1274 SET(ttybits, TIOCM_RI); 1275 1276 if (sc->sc_ier != 0) 1277 SET(ttybits, TIOCM_LE); 1278 1279 return (ttybits); 1280 } 1281 1282 static u_char 1283 cflag2lcr(cflag) 1284 tcflag_t cflag; 1285 { 1286 u_char lcr = 0; 1287 1288 switch (ISSET(cflag, CSIZE)) { 1289 case CS5: 1290 SET(lcr, LCR_5BITS); 1291 break; 1292 case CS6: 1293 SET(lcr, LCR_6BITS); 1294 break; 1295 case CS7: 1296 SET(lcr, LCR_7BITS); 1297 break; 1298 case CS8: 1299 SET(lcr, LCR_8BITS); 1300 break; 1301 } 1302 if (ISSET(cflag, PARENB)) { 1303 SET(lcr, LCR_PENAB); 1304 if (!ISSET(cflag, PARODD)) 1305 SET(lcr, LCR_PEVEN); 1306 } 1307 if (ISSET(cflag, CSTOPB)) 1308 SET(lcr, LCR_STOPB); 1309 1310 return (lcr); 1311 } 1312 1313 int 1314 comparam(tp, t) 1315 struct tty *tp; 1316 struct termios *t; 1317 { 1318 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1319 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1320 u_char lcr; 1321 int s; 1322 1323 if (COM_ISALIVE(sc) == 0) 1324 return (EIO); 1325 1326 /* Check requested parameters. */ 1327 if (ospeed < 0) 1328 return (EINVAL); 1329 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1330 return (EINVAL); 1331 1332 /* 1333 * For the console, always force CLOCAL and !HUPCL, so that the port 1334 * is always active. 1335 */ 1336 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1337 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1338 SET(t->c_cflag, CLOCAL); 1339 CLR(t->c_cflag, HUPCL); 1340 } 1341 1342 /* 1343 * If there were no changes, don't do anything. This avoids dropping 1344 * input and improves performance when all we did was frob things like 1345 * VMIN and VTIME. 1346 */ 1347 if (tp->t_ospeed == t->c_ospeed && 1348 tp->t_cflag == t->c_cflag) 1349 return (0); 1350 1351 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1352 1353 s = splserial(); 1354 1355 sc->sc_lcr = lcr; 1356 1357 /* 1358 * If we're not in a mode that assumes a connection is present, then 1359 * ignore carrier changes. 1360 */ 1361 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1362 sc->sc_msr_dcd = 0; 1363 else 1364 sc->sc_msr_dcd = MSR_DCD; 1365 /* 1366 * Set the flow control pins depending on the current flow control 1367 * mode. 1368 */ 1369 if (ISSET(t->c_cflag, CRTSCTS)) { 1370 sc->sc_mcr_dtr = MCR_DTR; 1371 sc->sc_mcr_rts = MCR_RTS; 1372 sc->sc_msr_cts = MSR_CTS; 1373 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1374 } else if (ISSET(t->c_cflag, MDMBUF)) { 1375 /* 1376 * For DTR/DCD flow control, make sure we don't toggle DTR for 1377 * carrier detection. 1378 */ 1379 sc->sc_mcr_dtr = 0; 1380 sc->sc_mcr_rts = MCR_DTR; 1381 sc->sc_msr_cts = MSR_DCD; 1382 sc->sc_efr = 0; 1383 } else { 1384 /* 1385 * If no flow control, then always set RTS. This will make 1386 * the other side happy if it mistakenly thinks we're doing 1387 * RTS/CTS flow control. 1388 */ 1389 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1390 sc->sc_mcr_rts = 0; 1391 sc->sc_msr_cts = 0; 1392 sc->sc_efr = 0; 1393 if (ISSET(sc->sc_mcr, MCR_DTR)) 1394 SET(sc->sc_mcr, MCR_RTS); 1395 else 1396 CLR(sc->sc_mcr, MCR_RTS); 1397 } 1398 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1399 1400 #if 0 1401 if (ospeed == 0) 1402 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1403 else 1404 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1405 #endif 1406 1407 sc->sc_dlbl = ospeed; 1408 sc->sc_dlbh = ospeed >> 8; 1409 1410 /* 1411 * Set the FIFO threshold based on the receive speed. 1412 * 1413 * * If it's a low speed, it's probably a mouse or some other 1414 * interactive device, so set the threshold low. 1415 * * If it's a high speed, trim the trigger level down to prevent 1416 * overflows. 1417 * * Otherwise set it a bit higher. 1418 */ 1419 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1420 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1421 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1422 sc->sc_fifo = FIFO_ENABLE | 1423 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1424 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1425 else 1426 sc->sc_fifo = 0; 1427 1428 /* And copy to tty. */ 1429 tp->t_ispeed = 0; 1430 tp->t_ospeed = t->c_ospeed; 1431 tp->t_cflag = t->c_cflag; 1432 1433 if (!sc->sc_heldchange) { 1434 if (sc->sc_tx_busy) { 1435 sc->sc_heldtbc = sc->sc_tbc; 1436 sc->sc_tbc = 0; 1437 sc->sc_heldchange = 1; 1438 } else 1439 com_loadchannelregs(sc); 1440 } 1441 1442 if (!ISSET(t->c_cflag, CHWFLOW)) { 1443 /* Disable the high water mark. */ 1444 sc->sc_r_hiwat = 0; 1445 sc->sc_r_lowat = 0; 1446 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1447 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1448 com_schedrx(sc); 1449 } 1450 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1451 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1452 com_hwiflow(sc); 1453 } 1454 } else { 1455 sc->sc_r_hiwat = com_rbuf_hiwat; 1456 sc->sc_r_lowat = com_rbuf_lowat; 1457 } 1458 1459 splx(s); 1460 1461 /* 1462 * Update the tty layer's idea of the carrier bit, in case we changed 1463 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1464 * explicit request. 1465 */ 1466 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1467 1468 #ifdef COM_DEBUG 1469 if (com_debug) 1470 comstatus(sc, "comparam "); 1471 #endif 1472 1473 if (!ISSET(t->c_cflag, CHWFLOW)) { 1474 if (sc->sc_tx_stopped) { 1475 sc->sc_tx_stopped = 0; 1476 comstart(tp); 1477 } 1478 } 1479 1480 return (0); 1481 } 1482 1483 void 1484 com_iflush(sc) 1485 struct com_softc *sc; 1486 { 1487 bus_space_tag_t iot = sc->sc_iot; 1488 bus_space_handle_t ioh = sc->sc_ioh; 1489 #ifdef DIAGNOSTIC 1490 int reg; 1491 #endif 1492 int timo; 1493 1494 #ifdef DIAGNOSTIC 1495 reg = 0xffff; 1496 #endif 1497 timo = 50000; 1498 /* flush any pending I/O */ 1499 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1500 && --timo) 1501 #ifdef DIAGNOSTIC 1502 reg = 1503 #else 1504 (void) 1505 #endif 1506 bus_space_read_1(iot, ioh, com_data); 1507 #ifdef DIAGNOSTIC 1508 if (!timo) 1509 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1510 reg); 1511 #endif 1512 } 1513 1514 void 1515 com_loadchannelregs(sc) 1516 struct com_softc *sc; 1517 { 1518 bus_space_tag_t iot = sc->sc_iot; 1519 bus_space_handle_t ioh = sc->sc_ioh; 1520 1521 /* XXXXX necessary? */ 1522 com_iflush(sc); 1523 1524 bus_space_write_1(iot, ioh, com_ier, 0); 1525 1526 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1527 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1528 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1529 } 1530 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1531 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1532 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1533 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1534 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1535 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1536 1537 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1538 } 1539 1540 int 1541 comhwiflow(tp, block) 1542 struct tty *tp; 1543 int block; 1544 { 1545 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1546 int s; 1547 1548 if (COM_ISALIVE(sc) == 0) 1549 return (0); 1550 1551 if (sc->sc_mcr_rts == 0) 1552 return (0); 1553 1554 s = splserial(); 1555 if (block) { 1556 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1557 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1558 com_hwiflow(sc); 1559 } 1560 } else { 1561 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1562 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1563 com_schedrx(sc); 1564 } 1565 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1566 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1567 com_hwiflow(sc); 1568 } 1569 } 1570 splx(s); 1571 return (1); 1572 } 1573 1574 /* 1575 * (un)block input via hw flowcontrol 1576 */ 1577 void 1578 com_hwiflow(sc) 1579 struct com_softc *sc; 1580 { 1581 bus_space_tag_t iot = sc->sc_iot; 1582 bus_space_handle_t ioh = sc->sc_ioh; 1583 1584 if (sc->sc_mcr_rts == 0) 1585 return; 1586 1587 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1588 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1589 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1590 } else { 1591 SET(sc->sc_mcr, sc->sc_mcr_rts); 1592 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1593 } 1594 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1595 } 1596 1597 1598 void 1599 comstart(tp) 1600 struct tty *tp; 1601 { 1602 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1603 bus_space_tag_t iot = sc->sc_iot; 1604 bus_space_handle_t ioh = sc->sc_ioh; 1605 int s; 1606 1607 if (COM_ISALIVE(sc) == 0) 1608 return; 1609 1610 s = spltty(); 1611 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) { 1612 goto out; 1613 } 1614 if (sc->sc_tx_stopped) { 1615 goto out; 1616 } 1617 if (tp->t_outq.c_cc <= tp->t_lowat) { 1618 if (ISSET(tp->t_state, TS_ASLEEP)) { 1619 CLR(tp->t_state, TS_ASLEEP); 1620 wakeup(&tp->t_outq); 1621 } 1622 selwakeup(&tp->t_wsel); 1623 if (tp->t_outq.c_cc == 0) { 1624 goto out; 1625 } 1626 } 1627 1628 /* Grab the first contiguous region of buffer space. */ 1629 { 1630 u_char *tba; 1631 int tbc; 1632 1633 tba = tp->t_outq.c_cf; 1634 tbc = ndqb(&tp->t_outq, 0); 1635 1636 (void)splserial(); 1637 1638 sc->sc_tba = tba; 1639 sc->sc_tbc = tbc; 1640 } 1641 1642 SET(tp->t_state, TS_BUSY); 1643 sc->sc_tx_busy = 1; 1644 1645 /* Enable transmit completion interrupts if necessary. */ 1646 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1647 SET(sc->sc_ier, IER_ETXRDY); 1648 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1649 } 1650 1651 /* Output the first chunk of the contiguous buffer. */ 1652 { 1653 int n; 1654 1655 n = sc->sc_tbc; 1656 if (n > sc->sc_fifolen) 1657 n = sc->sc_fifolen; 1658 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1659 sc->sc_tbc -= n; 1660 sc->sc_tba += n; 1661 } 1662 out: 1663 splx(s); 1664 return; 1665 } 1666 1667 /* 1668 * Stop output on a line. 1669 */ 1670 void 1671 comstop(tp, flag) 1672 struct tty *tp; 1673 int flag; 1674 { 1675 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1676 int s; 1677 1678 s = splserial(); 1679 if (ISSET(tp->t_state, TS_BUSY)) { 1680 /* Stop transmitting at the next chunk. */ 1681 sc->sc_tbc = 0; 1682 sc->sc_heldtbc = 0; 1683 if (!ISSET(tp->t_state, TS_TTSTOP)) 1684 SET(tp->t_state, TS_FLUSH); 1685 } 1686 splx(s); 1687 } 1688 1689 void 1690 comdiag(arg) 1691 void *arg; 1692 { 1693 struct com_softc *sc = arg; 1694 int overflows, floods; 1695 int s; 1696 1697 s = splserial(); 1698 overflows = sc->sc_overflows; 1699 sc->sc_overflows = 0; 1700 floods = sc->sc_floods; 1701 sc->sc_floods = 0; 1702 sc->sc_errors = 0; 1703 splx(s); 1704 1705 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1706 sc->sc_dev.dv_xname, 1707 overflows, overflows == 1 ? "" : "s", 1708 floods, floods == 1 ? "" : "s"); 1709 } 1710 1711 integrate void 1712 com_rxsoft(sc, tp) 1713 struct com_softc *sc; 1714 struct tty *tp; 1715 { 1716 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1717 u_char *get, *end; 1718 u_int cc, scc; 1719 u_char lsr; 1720 int code; 1721 int s; 1722 1723 end = sc->sc_ebuf; 1724 get = sc->sc_rbget; 1725 scc = cc = com_rbuf_size - sc->sc_rbavail; 1726 1727 if (cc == com_rbuf_size) { 1728 sc->sc_floods++; 1729 if (sc->sc_errors++ == 0) 1730 callout_reset(&sc->sc_diag_callout, 60 * hz, 1731 comdiag, sc); 1732 } 1733 1734 while (cc) { 1735 code = get[0]; 1736 lsr = get[1]; 1737 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1738 if (ISSET(lsr, LSR_OE)) { 1739 sc->sc_overflows++; 1740 if (sc->sc_errors++ == 0) 1741 callout_reset(&sc->sc_diag_callout, 1742 60 * hz, comdiag, sc); 1743 } 1744 if (ISSET(lsr, LSR_BI | LSR_FE)) 1745 SET(code, TTY_FE); 1746 if (ISSET(lsr, LSR_PE)) 1747 SET(code, TTY_PE); 1748 } 1749 if ((*rint)(code, tp) == -1) { 1750 /* 1751 * The line discipline's buffer is out of space. 1752 */ 1753 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1754 /* 1755 * We're either not using flow control, or the 1756 * line discipline didn't tell us to block for 1757 * some reason. Either way, we have no way to 1758 * know when there's more space available, so 1759 * just drop the rest of the data. 1760 */ 1761 get += cc << 1; 1762 if (get >= end) 1763 get -= com_rbuf_size << 1; 1764 cc = 0; 1765 } else { 1766 /* 1767 * Don't schedule any more receive processing 1768 * until the line discipline tells us there's 1769 * space available (through comhwiflow()). 1770 * Leave the rest of the data in the input 1771 * buffer. 1772 */ 1773 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1774 } 1775 break; 1776 } 1777 get += 2; 1778 if (get >= end) 1779 get = sc->sc_rbuf; 1780 cc--; 1781 } 1782 1783 if (cc != scc) { 1784 sc->sc_rbget = get; 1785 s = splserial(); 1786 cc = sc->sc_rbavail += scc - cc; 1787 /* Buffers should be ok again, release possible block. */ 1788 if (cc >= sc->sc_r_lowat) { 1789 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1790 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1791 SET(sc->sc_ier, IER_ERXRDY); 1792 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1793 } 1794 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1795 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1796 com_hwiflow(sc); 1797 } 1798 } 1799 splx(s); 1800 } 1801 } 1802 1803 integrate void 1804 com_txsoft(sc, tp) 1805 struct com_softc *sc; 1806 struct tty *tp; 1807 { 1808 1809 CLR(tp->t_state, TS_BUSY); 1810 if (ISSET(tp->t_state, TS_FLUSH)) 1811 CLR(tp->t_state, TS_FLUSH); 1812 else 1813 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1814 (*linesw[tp->t_line].l_start)(tp); 1815 } 1816 1817 integrate void 1818 com_stsoft(sc, tp) 1819 struct com_softc *sc; 1820 struct tty *tp; 1821 { 1822 u_char msr, delta; 1823 int s; 1824 1825 s = splserial(); 1826 msr = sc->sc_msr; 1827 delta = sc->sc_msr_delta; 1828 sc->sc_msr_delta = 0; 1829 splx(s); 1830 1831 if (ISSET(delta, sc->sc_msr_dcd)) { 1832 /* 1833 * Inform the tty layer that carrier detect changed. 1834 */ 1835 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1836 } 1837 1838 if (ISSET(delta, sc->sc_msr_cts)) { 1839 /* Block or unblock output according to flow control. */ 1840 if (ISSET(msr, sc->sc_msr_cts)) { 1841 sc->sc_tx_stopped = 0; 1842 (*linesw[tp->t_line].l_start)(tp); 1843 } else { 1844 sc->sc_tx_stopped = 1; 1845 } 1846 } 1847 1848 #ifdef COM_DEBUG 1849 if (com_debug) 1850 comstatus(sc, "com_stsoft"); 1851 #endif 1852 } 1853 1854 #ifdef __GENERIC_SOFT_INTERRUPTS 1855 void 1856 comsoft(arg) 1857 void *arg; 1858 { 1859 struct com_softc *sc = arg; 1860 struct tty *tp; 1861 1862 if (COM_ISALIVE(sc) == 0) 1863 return; 1864 1865 { 1866 #else 1867 void 1868 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1869 comsoft() 1870 #else 1871 comsoft(arg) 1872 void *arg; 1873 #endif 1874 { 1875 struct com_softc *sc; 1876 struct tty *tp; 1877 int unit; 1878 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1879 int s; 1880 1881 s = splsoftserial(); 1882 com_softintr_scheduled = 0; 1883 #endif 1884 1885 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1886 sc = device_lookup(&com_cd, unit); 1887 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1888 continue; 1889 1890 if (COM_ISALIVE(sc) == 0) 1891 continue; 1892 1893 tp = sc->sc_tty; 1894 if (tp == NULL) 1895 continue; 1896 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1897 continue; 1898 #endif 1899 tp = sc->sc_tty; 1900 1901 if (sc->sc_rx_ready) { 1902 sc->sc_rx_ready = 0; 1903 com_rxsoft(sc, tp); 1904 } 1905 1906 if (sc->sc_st_check) { 1907 sc->sc_st_check = 0; 1908 com_stsoft(sc, tp); 1909 } 1910 1911 if (sc->sc_tx_done) { 1912 sc->sc_tx_done = 0; 1913 com_txsoft(sc, tp); 1914 } 1915 } 1916 1917 #ifndef __GENERIC_SOFT_INTERRUPTS 1918 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1919 splx(s); 1920 #endif 1921 #endif 1922 } 1923 1924 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1925 /* there has got to be a better way to do comsoft() */ 1926 }} 1927 #endif 1928 1929 int 1930 comintr(arg) 1931 void *arg; 1932 { 1933 struct com_softc *sc = arg; 1934 bus_space_tag_t iot = sc->sc_iot; 1935 bus_space_handle_t ioh = sc->sc_ioh; 1936 u_char *put, *end; 1937 u_int cc; 1938 u_char lsr, iir; 1939 1940 if (COM_ISALIVE(sc) == 0) 1941 return (0); 1942 1943 iir = bus_space_read_1(iot, ioh, com_iir); 1944 if (ISSET(iir, IIR_NOPEND)) 1945 return (0); 1946 1947 end = sc->sc_ebuf; 1948 put = sc->sc_rbput; 1949 cc = sc->sc_rbavail; 1950 1951 do { 1952 u_char msr, delta; 1953 1954 lsr = bus_space_read_1(iot, ioh, com_lsr); 1955 #if defined(DDB) || defined(KGDB) 1956 if (ISSET(lsr, LSR_BI)) { 1957 #ifndef DDB_BREAK_CHAR 1958 #ifdef DDB 1959 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1960 console_debugger(); 1961 continue; 1962 } 1963 #endif 1964 #ifdef KGDB 1965 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1966 kgdb_connect(1); 1967 continue; 1968 } 1969 #endif 1970 #endif 1971 } 1972 #endif /* DDB || KGDB */ 1973 1974 if (ISSET(lsr, LSR_RCV_MASK) && 1975 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1976 while (cc > 0) { 1977 put[0] = bus_space_read_1(iot, ioh, com_data); 1978 put[1] = lsr; 1979 #if defined(DDB) && defined(DDB_BREAK_CHAR) 1980 if (put[0] == DDB_BREAK_CHAR && 1981 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1982 console_debugger(); 1983 1984 lsr = bus_space_read_1(iot, ioh, com_lsr); 1985 if (!ISSET(lsr, LSR_RCV_MASK)) 1986 break; 1987 1988 continue; 1989 } 1990 #endif 1991 put += 2; 1992 if (put >= end) 1993 put = sc->sc_rbuf; 1994 cc--; 1995 1996 lsr = bus_space_read_1(iot, ioh, com_lsr); 1997 if (!ISSET(lsr, LSR_RCV_MASK)) 1998 break; 1999 } 2000 2001 /* 2002 * Current string of incoming characters ended because 2003 * no more data was available or we ran out of space. 2004 * Schedule a receive event if any data was received. 2005 * If we're out of space, turn off receive interrupts. 2006 */ 2007 sc->sc_rbput = put; 2008 sc->sc_rbavail = cc; 2009 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2010 sc->sc_rx_ready = 1; 2011 2012 /* 2013 * See if we are in danger of overflowing a buffer. If 2014 * so, use hardware flow control to ease the pressure. 2015 */ 2016 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2017 cc < sc->sc_r_hiwat) { 2018 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2019 com_hwiflow(sc); 2020 } 2021 2022 /* 2023 * If we're out of space, disable receive interrupts 2024 * until the queue has drained a bit. 2025 */ 2026 if (!cc) { 2027 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2028 CLR(sc->sc_ier, IER_ERXRDY); 2029 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2030 } 2031 } else { 2032 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2033 bus_space_write_1(iot, ioh, com_ier, 0); 2034 delay(10); 2035 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2036 iir = IIR_NOPEND; 2037 continue; 2038 } 2039 } 2040 2041 msr = bus_space_read_1(iot, ioh, com_msr); 2042 delta = msr ^ sc->sc_msr; 2043 sc->sc_msr = msr; 2044 /* 2045 * Pulse-per-second (PSS) signals on edge of DCD? 2046 * Process these even if line discipline is ignoring DCD. 2047 */ 2048 if (delta & sc->sc_ppsmask) { 2049 struct timeval tv; 2050 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2051 /* XXX nanotime() */ 2052 microtime(&tv); 2053 TIMEVAL_TO_TIMESPEC(&tv, 2054 &sc->ppsinfo.assert_timestamp); 2055 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2056 timespecadd(&sc->ppsinfo.assert_timestamp, 2057 &sc->ppsparam.assert_offset, 2058 &sc->ppsinfo.assert_timestamp); 2059 } 2060 2061 #ifdef PPS_SYNC 2062 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2063 hardpps(&tv, tv.tv_usec); 2064 #endif 2065 sc->ppsinfo.assert_sequence++; 2066 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2067 2068 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2069 /* XXX nanotime() */ 2070 microtime(&tv); 2071 TIMEVAL_TO_TIMESPEC(&tv, 2072 &sc->ppsinfo.clear_timestamp); 2073 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2074 timespecadd(&sc->ppsinfo.clear_timestamp, 2075 &sc->ppsparam.clear_offset, 2076 &sc->ppsinfo.clear_timestamp); 2077 } 2078 2079 #ifdef PPS_SYNC 2080 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2081 hardpps(&tv, tv.tv_usec); 2082 #endif 2083 sc->ppsinfo.clear_sequence++; 2084 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2085 } 2086 } 2087 2088 /* 2089 * Process normal status changes 2090 */ 2091 if (ISSET(delta, sc->sc_msr_mask)) { 2092 SET(sc->sc_msr_delta, delta); 2093 2094 /* 2095 * Stop output immediately if we lose the output 2096 * flow control signal or carrier detect. 2097 */ 2098 if (ISSET(~msr, sc->sc_msr_mask)) { 2099 sc->sc_tbc = 0; 2100 sc->sc_heldtbc = 0; 2101 #ifdef COM_DEBUG 2102 if (com_debug) 2103 comstatus(sc, "comintr "); 2104 #endif 2105 } 2106 2107 sc->sc_st_check = 1; 2108 } 2109 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2110 2111 /* 2112 * Done handling any receive interrupts. See if data can be 2113 * transmitted as well. Schedule tx done event if no data left 2114 * and tty was marked busy. 2115 */ 2116 if (ISSET(lsr, LSR_TXRDY)) { 2117 /* 2118 * If we've delayed a parameter change, do it now, and restart 2119 * output. 2120 */ 2121 if (sc->sc_heldchange) { 2122 com_loadchannelregs(sc); 2123 sc->sc_heldchange = 0; 2124 sc->sc_tbc = sc->sc_heldtbc; 2125 sc->sc_heldtbc = 0; 2126 } 2127 2128 /* Output the next chunk of the contiguous buffer, if any. */ 2129 if (sc->sc_tbc > 0) { 2130 int n; 2131 2132 n = sc->sc_tbc; 2133 if (n > sc->sc_fifolen) 2134 n = sc->sc_fifolen; 2135 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2136 sc->sc_tbc -= n; 2137 sc->sc_tba += n; 2138 } else { 2139 /* Disable transmit completion interrupts if necessary. */ 2140 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2141 CLR(sc->sc_ier, IER_ETXRDY); 2142 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2143 } 2144 if (sc->sc_tx_busy) { 2145 sc->sc_tx_busy = 0; 2146 sc->sc_tx_done = 1; 2147 } 2148 } 2149 } 2150 2151 /* Wake up the poller. */ 2152 #ifdef __GENERIC_SOFT_INTERRUPTS 2153 softintr_schedule(sc->sc_si); 2154 #else 2155 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2156 setsoftserial(); 2157 #else 2158 if (!com_softintr_scheduled) { 2159 com_softintr_scheduled = 1; 2160 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2161 } 2162 #endif 2163 #endif 2164 2165 #if NRND > 0 && defined(RND_COM) 2166 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2167 #endif 2168 2169 return (1); 2170 } 2171 2172 /* 2173 * The following functions are polled getc and putc routines, shared 2174 * by the console and kgdb glue. 2175 */ 2176 2177 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2178 #define MAX_UNGETC 20 2179 static int com_ungetc[MAX_UNGETC]; 2180 static int com_ungetccount = 0; 2181 #endif 2182 2183 int 2184 com_common_getc(iot, ioh) 2185 bus_space_tag_t iot; 2186 bus_space_handle_t ioh; 2187 { 2188 int s = splserial(); 2189 u_char stat, c; 2190 2191 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2192 /* got a character from reading things earlier */ 2193 if (com_ungetccount > 0) { 2194 int i; 2195 2196 c = com_ungetc[0]; 2197 for (i = 1; i < com_ungetccount; i++) { 2198 com_ungetc[i -1] = com_ungetc[i]; 2199 } 2200 com_ungetccount--; 2201 splx(s); 2202 return (c); 2203 } 2204 #endif 2205 2206 /* block until a character becomes available */ 2207 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2208 ; 2209 2210 c = bus_space_read_1(iot, ioh, com_data); 2211 stat = bus_space_read_1(iot, ioh, com_iir); 2212 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2213 if (c == DDB_BREAK_CHAR) { 2214 extern int db_active; 2215 2216 if (db_active == 0) { 2217 console_debugger(); 2218 } 2219 } 2220 #endif 2221 splx(s); 2222 return (c); 2223 } 2224 2225 void 2226 com_common_putc(iot, ioh, c) 2227 bus_space_tag_t iot; 2228 bus_space_handle_t ioh; 2229 int c; 2230 { 2231 int s = splserial(); 2232 int timo; 2233 2234 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2235 int cin, stat; 2236 if (com_ungetccount < MAX_UNGETC 2237 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2238 cin = bus_space_read_1(iot, ioh, com_data); 2239 stat = bus_space_read_1(iot, ioh, com_iir); 2240 if (cin == DDB_BREAK_CHAR) { 2241 console_debugger(); 2242 } 2243 com_ungetc[com_ungetccount++] = cin; 2244 } 2245 #endif 2246 2247 /* wait for any pending transmission to finish */ 2248 timo = 150000; 2249 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2250 continue; 2251 2252 bus_space_write_1(iot, ioh, com_data, c); 2253 COM_BARRIER(iot, ioh, BR | BW); 2254 2255 /* wait for this transmission to complete */ 2256 timo = 1500000; 2257 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2258 continue; 2259 2260 splx(s); 2261 } 2262 2263 /* 2264 * Initialize UART for use as console or KGDB line. 2265 */ 2266 int 2267 cominit(iot, iobase, rate, frequency, cflag, iohp) 2268 bus_space_tag_t iot; 2269 paddr_t iobase; 2270 int rate, frequency; 2271 tcflag_t cflag; 2272 bus_space_handle_t *iohp; 2273 { 2274 bus_space_handle_t ioh; 2275 2276 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2277 return (ENOMEM); /* ??? */ 2278 2279 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2280 bus_space_write_1(iot, ioh, com_efr, 0); 2281 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2282 rate = comspeed(rate, frequency); 2283 bus_space_write_1(iot, ioh, com_dlbl, rate); 2284 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2285 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2286 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2287 bus_space_write_1(iot, ioh, com_fifo, 2288 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2289 bus_space_write_1(iot, ioh, com_ier, 0); 2290 2291 *iohp = ioh; 2292 return (0); 2293 } 2294 2295 /* 2296 * Following are all routines needed for COM to act as console 2297 */ 2298 struct consdev comcons = { 2299 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2300 NODEV, CN_NORMAL 2301 }; 2302 2303 2304 int 2305 comcnattach(iot, iobase, rate, frequency, cflag) 2306 bus_space_tag_t iot; 2307 paddr_t iobase; 2308 int rate, frequency; 2309 tcflag_t cflag; 2310 { 2311 int res; 2312 2313 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2314 if (res) 2315 return (res); 2316 2317 cn_tab = &comcons; 2318 2319 comconstag = iot; 2320 comconsaddr = iobase; 2321 comconsrate = rate; 2322 comconscflag = cflag; 2323 2324 return (0); 2325 } 2326 2327 int 2328 comcngetc(dev) 2329 dev_t dev; 2330 { 2331 2332 return (com_common_getc(comconstag, comconsioh)); 2333 } 2334 2335 /* 2336 * Console kernel output character routine. 2337 */ 2338 void 2339 comcnputc(dev, c) 2340 dev_t dev; 2341 int c; 2342 { 2343 2344 com_common_putc(comconstag, comconsioh, c); 2345 } 2346 2347 void 2348 comcnpollc(dev, on) 2349 dev_t dev; 2350 int on; 2351 { 2352 2353 } 2354 2355 #ifdef KGDB 2356 int 2357 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2358 bus_space_tag_t iot; 2359 paddr_t iobase; 2360 int rate, frequency; 2361 tcflag_t cflag; 2362 { 2363 int res; 2364 2365 if (iot == comconstag && iobase == comconsaddr) 2366 return (EBUSY); /* cannot share with console */ 2367 2368 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2369 if (res) 2370 return (res); 2371 2372 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2373 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2374 2375 com_kgdb_iot = iot; 2376 com_kgdb_addr = iobase; 2377 2378 return (0); 2379 } 2380 2381 /* ARGSUSED */ 2382 int 2383 com_kgdb_getc(arg) 2384 void *arg; 2385 { 2386 2387 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2388 } 2389 2390 /* ARGSUSED */ 2391 void 2392 com_kgdb_putc(arg, c) 2393 void *arg; 2394 int c; 2395 { 2396 2397 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2398 } 2399 #endif /* KGDB */ 2400 2401 /* helper function to identify the com ports used by 2402 console or KGDB (and not yet autoconf attached) */ 2403 int 2404 com_is_console(iot, iobase, ioh) 2405 bus_space_tag_t iot; 2406 paddr_t iobase; 2407 bus_space_handle_t *ioh; 2408 { 2409 bus_space_handle_t help; 2410 2411 if (!comconsattached && 2412 iot == comconstag && iobase == comconsaddr) 2413 help = comconsioh; 2414 #ifdef KGDB 2415 else if (!com_kgdb_attached && 2416 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2417 help = com_kgdb_ioh; 2418 #endif 2419 else 2420 return (0); 2421 2422 if (ioh) 2423 *ioh = help; 2424 return (1); 2425 } 2426
Indexes created Thu Sep 25 16:09:42 GMT 2025