com.c revision 1.180
1 /* $NetBSD: com.c,v 1.180 2000/09/26 14:12:42 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 #if defined(__sparc__) || defined(__sparc_v9__) 75 #define DDB_BREAK_CHAR 1 /* L1 or Stop key */ 76 #endif 77 78 /* 79 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 80 * Supports automatic hardware flow control on StarTech ST16C650A UART 81 */ 82 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_com.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/ioctl.h> 95 #include <sys/select.h> 96 #include <sys/tty.h> 97 #include <sys/proc.h> 98 #include <sys/user.h> 99 #include <sys/conf.h> 100 #include <sys/file.h> 101 #include <sys/uio.h> 102 #include <sys/kernel.h> 103 #include <sys/syslog.h> 104 #include <sys/types.h> 105 #include <sys/device.h> 106 #include <sys/malloc.h> 107 #include <sys/timepps.h> 108 #include <sys/vnode.h> 109 110 #include <machine/intr.h> 111 #include <machine/bus.h> 112 113 #include <dev/ic/comreg.h> 114 #include <dev/ic/comvar.h> 115 #include <dev/ic/ns16550reg.h> 116 #include <dev/ic/st16650reg.h> 117 #ifdef COM_HAYESP 118 #include <dev/ic/hayespreg.h> 119 #endif 120 #define com_lcr com_cfcr 121 #include <dev/cons.h> 122 123 #include "com.h" 124 125 #ifdef COM_HAYESP 126 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 127 #endif 128 129 #if defined(DDB) || defined(KGDB) 130 static void com_enable_debugport __P((struct com_softc *)); 131 #endif 132 void com_config __P((struct com_softc *)); 133 void com_shutdown __P((struct com_softc *)); 134 int comspeed __P((long, long)); 135 static u_char cflag2lcr __P((tcflag_t)); 136 int comparam __P((struct tty *, struct termios *)); 137 void comstart __P((struct tty *)); 138 void comstop __P((struct tty *, int)); 139 int comhwiflow __P((struct tty *, int)); 140 141 void com_loadchannelregs __P((struct com_softc *)); 142 void com_hwiflow __P((struct com_softc *)); 143 void com_break __P((struct com_softc *, int)); 144 void com_modem __P((struct com_softc *, int)); 145 void tiocm_to_com __P((struct com_softc *, u_long, int)); 146 int com_to_tiocm __P((struct com_softc *)); 147 void com_iflush __P((struct com_softc *)); 148 149 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 150 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 151 152 /* XXX: These belong elsewhere */ 153 cdev_decl(com); 154 bdev_decl(com); 155 156 int comcngetc __P((dev_t)); 157 void comcnputc __P((dev_t, int)); 158 void comcnpollc __P((dev_t, int)); 159 160 #define integrate static inline 161 #ifdef __GENERIC_SOFT_INTERRUPTS 162 void comsoft __P((void *)); 163 #else 164 #ifndef __NO_SOFT_SERIAL_INTERRUPT 165 void comsoft __P((void)); 166 #else 167 void comsoft __P((void *)); 168 struct callout comsoft_callout = CALLOUT_INITIALIZER; 169 #endif 170 #endif 171 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 172 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 173 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 174 integrate void com_schedrx __P((struct com_softc *)); 175 void comdiag __P((void *)); 176 177 extern struct cfdriver com_cd; 178 179 /* 180 * Make this an option variable one can patch. 181 * But be warned: this must be a power of 2! 182 */ 183 u_int com_rbuf_size = COM_RING_SIZE; 184 185 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 186 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 187 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 188 189 static bus_addr_t comconsaddr; 190 static bus_space_tag_t comconstag; 191 static bus_space_handle_t comconsioh; 192 static int comconsattached; 193 static int comconsrate; 194 static tcflag_t comconscflag; 195 196 static int ppscap = 197 PPS_TSFMT_TSPEC | 198 PPS_CAPTUREASSERT | 199 PPS_CAPTURECLEAR | 200 #ifdef PPS_SYNC 201 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 202 #endif /* PPS_SYNC */ 203 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 204 205 #ifndef __GENERIC_SOFT_INTERRUPTS 206 #ifdef __NO_SOFT_SERIAL_INTERRUPT 207 volatile int com_softintr_scheduled; 208 #endif 209 #endif 210 211 #ifdef KGDB 212 #include <sys/kgdb.h> 213 214 static bus_addr_t com_kgdb_addr; 215 static bus_space_tag_t com_kgdb_iot; 216 static bus_space_handle_t com_kgdb_ioh; 217 static int com_kgdb_attached; 218 219 int com_kgdb_getc __P((void *)); 220 void com_kgdb_putc __P((void *, int)); 221 #endif /* KGDB */ 222 223 #define COMUNIT_MASK 0x7ffff 224 #define COMDIALOUT_MASK 0x80000 225 226 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 227 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 228 229 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 230 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 231 232 #define BR BUS_SPACE_BARRIER_READ 233 #define BW BUS_SPACE_BARRIER_WRITE 234 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 235 236 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 237 238 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 239 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 240 241 #else 242 243 #define COM_LOCK(sc) 244 #define COM_UNLOCK(sc) 245 246 #endif 247 248 int 249 comspeed(speed, frequency) 250 long speed, frequency; 251 { 252 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 253 254 int x, err; 255 256 #if 0 257 if (speed == 0) 258 return (0); 259 #endif 260 if (speed <= 0) 261 return (-1); 262 x = divrnd(frequency / 16, speed); 263 if (x <= 0) 264 return (-1); 265 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 266 if (err < 0) 267 err = -err; 268 if (err > COM_TOLERANCE) 269 return (-1); 270 return (x); 271 272 #undef divrnd 273 } 274 275 #ifdef COM_DEBUG 276 int com_debug = 0; 277 278 void comstatus __P((struct com_softc *, char *)); 279 void 280 comstatus(sc, str) 281 struct com_softc *sc; 282 char *str; 283 { 284 struct tty *tp = sc->sc_tty; 285 286 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 287 sc->sc_dev.dv_xname, str, 288 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 289 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 290 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 291 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 292 sc->sc_tx_stopped ? "+" : "-"); 293 294 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 295 sc->sc_dev.dv_xname, str, 296 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 297 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 298 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 299 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 300 sc->sc_rx_flags); 301 } 302 #endif 303 304 int 305 comprobe1(iot, ioh) 306 bus_space_tag_t iot; 307 bus_space_handle_t ioh; 308 { 309 310 /* force access to id reg */ 311 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 312 bus_space_write_1(iot, ioh, com_iir, 0); 313 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 314 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 315 return (0); 316 317 return (1); 318 } 319 320 #ifdef COM_HAYESP 321 int 322 comprobeHAYESP(hayespioh, sc) 323 bus_space_handle_t hayespioh; 324 struct com_softc *sc; 325 { 326 char val, dips; 327 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 328 bus_space_tag_t iot = sc->sc_iot; 329 330 /* 331 * Hayes ESP cards have two iobases. One is for compatibility with 332 * 16550 serial chips, and at the same ISA PC base addresses. The 333 * other is for ESP-specific enhanced features, and lies at a 334 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 335 */ 336 337 /* Test for ESP signature */ 338 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 339 return (0); 340 341 /* 342 * ESP is present at ESP enhanced base address; unknown com port 343 */ 344 345 /* Get the dip-switch configurations */ 346 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 347 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 348 349 /* Determine which com port this ESP card services: bits 0,1 of */ 350 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 351 if (sc->sc_iobase != combaselist[dips & 0x03]) 352 return (0); 353 354 printf(": ESP"); 355 356 /* Check ESP Self Test bits. */ 357 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 358 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 359 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 360 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 361 if ((val & 0x70) < 0x20) { 362 printf("-old (%o)", val & 0x70); 363 /* we do not support the necessary features */ 364 return (0); 365 } 366 367 /* Check for ability to emulate 16550: bit 8 == 1 */ 368 if ((dips & 0x80) == 0) { 369 printf(" slave"); 370 /* XXX Does slave really mean no 16550 support?? */ 371 return (0); 372 } 373 374 /* 375 * If we made it this far, we are a full-featured ESP v2.0 (or 376 * better), at the correct com port address. 377 */ 378 379 SET(sc->sc_hwflags, COM_HW_HAYESP); 380 printf(", 1024 byte fifo\n"); 381 return (1); 382 } 383 #endif 384 385 #if defined(DDB) || defined(KGDB) 386 static void 387 com_enable_debugport(sc) 388 struct com_softc *sc; 389 { 390 int s; 391 392 /* Turn on line break interrupt, set carrier. */ 393 s = splserial(); 394 COM_LOCK(sc); 395 sc->sc_ier = IER_ERXRDY; 396 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 397 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 398 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 399 COM_UNLOCK(sc); 400 splx(s); 401 } 402 #endif 403 404 void 405 com_attach_subr(sc) 406 struct com_softc *sc; 407 { 408 bus_addr_t iobase = sc->sc_iobase; 409 bus_space_tag_t iot = sc->sc_iot; 410 bus_space_handle_t ioh = sc->sc_ioh; 411 struct tty *tp; 412 #ifdef COM16650 413 u_int8_t lcr; 414 #endif 415 #ifdef COM_HAYESP 416 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 417 int *hayespp; 418 #endif 419 420 callout_init(&sc->sc_diag_callout); 421 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 422 simple_lock_init(&sc->sc_lock); 423 #endif 424 425 /* Disable interrupts before configuring the device. */ 426 sc->sc_ier = 0; 427 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 428 429 if (iot == comconstag && iobase == comconsaddr) { 430 comconsattached = 1; 431 432 /* Make sure the console is always "hardwired". */ 433 delay(1000); /* wait for output to finish */ 434 SET(sc->sc_hwflags, COM_HW_CONSOLE); 435 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 436 } 437 438 #ifdef COM_HAYESP 439 /* Look for a Hayes ESP board. */ 440 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 441 bus_space_handle_t hayespioh; 442 443 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 444 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 445 continue; 446 if (comprobeHAYESP(hayespioh, sc)) { 447 sc->sc_hayespioh = hayespioh; 448 sc->sc_fifolen = 1024; 449 450 break; 451 } 452 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 453 } 454 /* No ESP; look for other things. */ 455 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 456 #endif 457 sc->sc_fifolen = 1; 458 /* look for a NS 16550AF UART with FIFOs */ 459 bus_space_write_1(iot, ioh, com_fifo, 460 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 461 delay(100); 462 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 463 == IIR_FIFO_MASK) 464 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 465 == FIFO_TRIGGER_14) { 466 SET(sc->sc_hwflags, COM_HW_FIFO); 467 468 #ifdef COM16650 469 /* 470 * IIR changes into the EFR if LCR is set to LCR_EERS 471 * on 16650s. We also know IIR != 0 at this point. 472 * Write 0 into the EFR, and read it. If the result 473 * is 0, we have a 16650. 474 * 475 * Older 16650s were broken; the test to detect them 476 * is taken from the Linux driver. Apparently 477 * setting DLAB enable gives access to the EFR on 478 * these chips. 479 */ 480 lcr = bus_space_read_1(iot, ioh, com_lcr); 481 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 482 bus_space_write_1(iot, ioh, com_efr, 0); 483 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 484 bus_space_write_1(iot, ioh, com_lcr, 485 lcr | LCR_DLAB); 486 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 487 CLR(sc->sc_hwflags, COM_HW_FIFO); 488 sc->sc_fifolen = 0; 489 } else { 490 SET(sc->sc_hwflags, COM_HW_FLOW); 491 sc->sc_fifolen = 32; 492 } 493 } else 494 #endif 495 sc->sc_fifolen = 16; 496 497 #ifdef COM16650 498 bus_space_write_1(iot, ioh, com_lcr, lcr); 499 if (sc->sc_fifolen == 0) 500 printf(": st16650, broken fifo\n"); 501 else if (sc->sc_fifolen == 32) 502 printf(": st16650a, working fifo\n"); 503 else 504 #endif 505 printf(": ns16550a, working fifo\n"); 506 } else 507 printf(": ns16550, broken fifo\n"); 508 else 509 printf(": ns8250 or ns16450, no fifo\n"); 510 bus_space_write_1(iot, ioh, com_fifo, 0); 511 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 512 sc->sc_fifolen = 1; 513 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 514 } 515 #ifdef COM_HAYESP 516 } 517 #endif 518 519 tp = ttymalloc(); 520 tp->t_oproc = comstart; 521 tp->t_param = comparam; 522 tp->t_hwiflow = comhwiflow; 523 524 sc->sc_tty = tp; 525 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 526 if (sc->sc_rbuf == NULL) { 527 printf("%s: unable to allocate ring buffer\n", 528 sc->sc_dev.dv_xname); 529 return; 530 } 531 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 532 533 tty_attach(tp); 534 535 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 536 SET(sc->sc_mcr, MCR_IENABLE); 537 538 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 539 int maj; 540 541 /* locate the major number */ 542 for (maj = 0; maj < nchrdev; maj++) 543 if (cdevsw[maj].d_open == comopen) 544 break; 545 546 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 547 548 printf("%s: console\n", sc->sc_dev.dv_xname); 549 } 550 551 #ifdef KGDB 552 /* 553 * Allow kgdb to "take over" this port. If this is 554 * the kgdb device, it has exclusive use. 555 */ 556 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 557 com_kgdb_attached = 1; 558 559 SET(sc->sc_hwflags, COM_HW_KGDB); 560 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 561 } 562 #endif 563 564 #ifdef __GENERIC_SOFT_INTERRUPTS 565 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 566 #endif 567 568 #if NRND > 0 && defined(RND_COM) 569 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 570 RND_TYPE_TTY, 0); 571 #endif 572 573 /* if there are no enable/disable functions, assume the device 574 is always enabled */ 575 if (!sc->enable) 576 sc->enabled = 1; 577 578 com_config(sc); 579 580 SET(sc->sc_hwflags, COM_HW_DEV_OK); 581 } 582 583 void 584 com_config(sc) 585 struct com_softc *sc; 586 { 587 bus_space_tag_t iot = sc->sc_iot; 588 bus_space_handle_t ioh = sc->sc_ioh; 589 590 /* Disable interrupts before configuring the device. */ 591 sc->sc_ier = 0; 592 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 593 594 #ifdef COM_HAYESP 595 /* Look for a Hayes ESP board. */ 596 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 597 sc->sc_fifolen = 1024; 598 599 /* Set 16550 compatibility mode */ 600 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 601 HAYESP_SETMODE); 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 603 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 604 HAYESP_MODE_SCALE); 605 606 /* Set RTS/CTS flow control */ 607 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 608 HAYESP_SETFLOWTYPE); 609 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 610 HAYESP_FLOW_RTS); 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 612 HAYESP_FLOW_CTS); 613 614 /* Set flow control levels */ 615 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 616 HAYESP_SETRXFLOW); 617 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 618 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 620 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 622 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 624 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 625 } 626 #endif 627 628 #ifdef DDB 629 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 630 com_enable_debugport(sc); 631 #endif 632 633 #ifdef KGDB 634 /* 635 * Allow kgdb to "take over" this port. If this is 636 * the kgdb device, it has exclusive use. 637 */ 638 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 639 com_enable_debugport(sc); 640 #endif 641 } 642 643 int 644 com_detach(self, flags) 645 struct device *self; 646 int flags; 647 { 648 struct com_softc *sc = (struct com_softc *)self; 649 int maj, mn; 650 651 /* locate the major number */ 652 for (maj = 0; maj < nchrdev; maj++) 653 if (cdevsw[maj].d_open == comopen) 654 break; 655 656 /* Nuke the vnodes for any open instances. */ 657 mn = self->dv_unit; 658 vdevgone(maj, mn, mn, VCHR); 659 660 mn |= COMDIALOUT_MASK; 661 vdevgone(maj, mn, mn, VCHR); 662 663 /* Free the receive buffer. */ 664 free(sc->sc_rbuf, M_DEVBUF); 665 666 /* Detach and free the tty. */ 667 tty_detach(sc->sc_tty); 668 ttyfree(sc->sc_tty); 669 670 #ifdef __GENERIC_SOFT_INTERRUPTS 671 /* Unhook the soft interrupt handler. */ 672 softintr_disestablish(sc->sc_si); 673 #endif 674 675 #if NRND > 0 && defined(RND_COM) 676 /* Unhook the entropy source. */ 677 rnd_detach_source(&sc->rnd_source); 678 #endif 679 680 return (0); 681 } 682 683 int 684 com_activate(self, act) 685 struct device *self; 686 enum devact act; 687 { 688 struct com_softc *sc = (struct com_softc *)self; 689 int s, rv = 0; 690 691 s = splserial(); 692 COM_LOCK(sc); 693 switch (act) { 694 case DVACT_ACTIVATE: 695 rv = EOPNOTSUPP; 696 break; 697 698 case DVACT_DEACTIVATE: 699 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 700 rv = EBUSY; 701 break; 702 } 703 704 if (sc->disable != NULL && sc->enabled != 0) { 705 (*sc->disable)(sc); 706 sc->enabled = 0; 707 } 708 break; 709 } 710 711 COM_UNLOCK(sc); 712 splx(s); 713 return (rv); 714 } 715 716 void 717 com_shutdown(sc) 718 struct com_softc *sc; 719 { 720 struct tty *tp = sc->sc_tty; 721 int s; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 726 /* If we were asserting flow control, then deassert it. */ 727 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 728 com_hwiflow(sc); 729 730 /* Clear any break condition set with TIOCSBRK. */ 731 com_break(sc, 0); 732 733 /* Turn off PPS capture on last close. */ 734 sc->sc_ppsmask = 0; 735 sc->ppsparam.mode = 0; 736 737 /* 738 * Hang up if necessary. Wait a bit, so the other side has time to 739 * notice even if we immediately open the port again. 740 * Avoid tsleeping above splhigh(). 741 */ 742 if (ISSET(tp->t_cflag, HUPCL)) { 743 com_modem(sc, 0); 744 COM_UNLOCK(sc); 745 splx(s); 746 /* XXX tsleep will only timeout */ 747 (void) tsleep(sc, TTIPRI, ttclos, hz); 748 s = splserial(); 749 COM_LOCK(sc); 750 } 751 752 /* Turn off interrupts. */ 753 #ifdef DDB 754 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 755 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 756 else 757 #endif 758 sc->sc_ier = 0; 759 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 760 761 if (sc->disable) { 762 #ifdef DIAGNOSTIC 763 if (!sc->enabled) 764 panic("com_shutdown: not enabled?"); 765 #endif 766 (*sc->disable)(sc); 767 sc->enabled = 0; 768 } 769 COM_UNLOCK(sc); 770 splx(s); 771 } 772 773 int 774 comopen(dev, flag, mode, p) 775 dev_t dev; 776 int flag, mode; 777 struct proc *p; 778 { 779 struct com_softc *sc; 780 struct tty *tp; 781 int s, s2; 782 int error; 783 784 sc = device_lookup(&com_cd, COMUNIT(dev)); 785 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 786 sc->sc_rbuf == NULL) 787 return (ENXIO); 788 789 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 790 return (ENXIO); 791 792 #ifdef KGDB 793 /* 794 * If this is the kgdb port, no other use is permitted. 795 */ 796 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 797 return (EBUSY); 798 #endif 799 800 tp = sc->sc_tty; 801 802 if (ISSET(tp->t_state, TS_ISOPEN) && 803 ISSET(tp->t_state, TS_XCLUDE) && 804 p->p_ucred->cr_uid != 0) 805 return (EBUSY); 806 807 s = spltty(); 808 809 /* 810 * Do the following iff this is a first open. 811 */ 812 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 813 struct termios t; 814 815 tp->t_dev = dev; 816 817 s2 = splserial(); 818 COM_LOCK(sc); 819 820 if (sc->enable) { 821 if ((*sc->enable)(sc)) { 822 COM_UNLOCK(sc); 823 splx(s2); 824 splx(s); 825 printf("%s: device enable failed\n", 826 sc->sc_dev.dv_xname); 827 return (EIO); 828 } 829 sc->enabled = 1; 830 com_config(sc); 831 } 832 833 /* Turn on interrupts. */ 834 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 835 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 836 837 /* Fetch the current modem control status, needed later. */ 838 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 839 840 /* Clear PPS capture state on first open. */ 841 sc->sc_ppsmask = 0; 842 sc->ppsparam.mode = 0; 843 844 COM_UNLOCK(sc); 845 splx(s2); 846 847 /* 848 * Initialize the termios status to the defaults. Add in the 849 * sticky bits from TIOCSFLAGS. 850 */ 851 t.c_ispeed = 0; 852 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 853 t.c_ospeed = comconsrate; 854 t.c_cflag = comconscflag; 855 } else { 856 t.c_ospeed = TTYDEF_SPEED; 857 t.c_cflag = TTYDEF_CFLAG; 858 } 859 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 860 SET(t.c_cflag, CLOCAL); 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 862 SET(t.c_cflag, CRTSCTS); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 864 SET(t.c_cflag, MDMBUF); 865 /* Make sure comparam() will do something. */ 866 tp->t_ospeed = 0; 867 (void) comparam(tp, &t); 868 tp->t_iflag = TTYDEF_IFLAG; 869 tp->t_oflag = TTYDEF_OFLAG; 870 tp->t_lflag = TTYDEF_LFLAG; 871 ttychars(tp); 872 ttsetwater(tp); 873 874 s2 = splserial(); 875 COM_LOCK(sc); 876 877 /* 878 * Turn on DTR. We must always do this, even if carrier is not 879 * present, because otherwise we'd have to use TIOCSDTR 880 * immediately after setting CLOCAL, which applications do not 881 * expect. We always assert DTR while the device is open 882 * unless explicitly requested to deassert it. 883 */ 884 com_modem(sc, 1); 885 886 /* Clear the input ring, and unblock. */ 887 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 888 sc->sc_rbavail = com_rbuf_size; 889 com_iflush(sc); 890 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 891 com_hwiflow(sc); 892 893 #ifdef COM_DEBUG 894 if (com_debug) 895 comstatus(sc, "comopen "); 896 #endif 897 898 COM_UNLOCK(sc); 899 splx(s2); 900 } 901 902 splx(s); 903 904 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 905 if (error) 906 goto bad; 907 908 error = (*linesw[tp->t_line].l_open)(dev, tp); 909 if (error) 910 goto bad; 911 912 return (0); 913 914 bad: 915 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 916 /* 917 * We failed to open the device, and nobody else had it opened. 918 * Clean up the state as appropriate. 919 */ 920 com_shutdown(sc); 921 } 922 923 return (error); 924 } 925 926 int 927 comclose(dev, flag, mode, p) 928 dev_t dev; 929 int flag, mode; 930 struct proc *p; 931 { 932 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 933 struct tty *tp = sc->sc_tty; 934 935 /* XXX This is for cons.c. */ 936 if (!ISSET(tp->t_state, TS_ISOPEN)) 937 return (0); 938 939 (*linesw[tp->t_line].l_close)(tp, flag); 940 ttyclose(tp); 941 942 if (COM_ISALIVE(sc) == 0) 943 return (0); 944 945 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 946 /* 947 * Although we got a last close, the device may still be in 948 * use; e.g. if this was the dialout node, and there are still 949 * processes waiting for carrier on the non-dialout node. 950 */ 951 com_shutdown(sc); 952 } 953 954 return (0); 955 } 956 957 int 958 comread(dev, uio, flag) 959 dev_t dev; 960 struct uio *uio; 961 int flag; 962 { 963 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 if (COM_ISALIVE(sc) == 0) 967 return (EIO); 968 969 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 970 } 971 972 int 973 comwrite(dev, uio, flag) 974 dev_t dev; 975 struct uio *uio; 976 int flag; 977 { 978 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 979 struct tty *tp = sc->sc_tty; 980 981 if (COM_ISALIVE(sc) == 0) 982 return (EIO); 983 984 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 985 } 986 987 struct tty * 988 comtty(dev) 989 dev_t dev; 990 { 991 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 992 struct tty *tp = sc->sc_tty; 993 994 return (tp); 995 } 996 997 int 998 comioctl(dev, cmd, data, flag, p) 999 dev_t dev; 1000 u_long cmd; 1001 caddr_t data; 1002 int flag; 1003 struct proc *p; 1004 { 1005 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1006 struct tty *tp = sc->sc_tty; 1007 int error; 1008 int s; 1009 1010 if (COM_ISALIVE(sc) == 0) 1011 return (EIO); 1012 1013 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 1014 if (error >= 0) 1015 return (error); 1016 1017 error = ttioctl(tp, cmd, data, flag, p); 1018 if (error >= 0) 1019 return (error); 1020 1021 error = 0; 1022 1023 s = splserial(); 1024 COM_LOCK(sc); 1025 1026 switch (cmd) { 1027 case TIOCSBRK: 1028 com_break(sc, 1); 1029 break; 1030 1031 case TIOCCBRK: 1032 com_break(sc, 0); 1033 break; 1034 1035 case TIOCSDTR: 1036 com_modem(sc, 1); 1037 break; 1038 1039 case TIOCCDTR: 1040 com_modem(sc, 0); 1041 break; 1042 1043 case TIOCGFLAGS: 1044 *(int *)data = sc->sc_swflags; 1045 break; 1046 1047 case TIOCSFLAGS: 1048 error = suser(p->p_ucred, &p->p_acflag); 1049 if (error) 1050 break; 1051 sc->sc_swflags = *(int *)data; 1052 break; 1053 1054 case TIOCMSET: 1055 case TIOCMBIS: 1056 case TIOCMBIC: 1057 tiocm_to_com(sc, cmd, *(int *)data); 1058 break; 1059 1060 case TIOCMGET: 1061 *(int *)data = com_to_tiocm(sc); 1062 break; 1063 1064 case PPS_IOC_CREATE: 1065 break; 1066 1067 case PPS_IOC_DESTROY: 1068 break; 1069 1070 case PPS_IOC_GETPARAMS: { 1071 pps_params_t *pp; 1072 pp = (pps_params_t *)data; 1073 *pp = sc->ppsparam; 1074 break; 1075 } 1076 1077 case PPS_IOC_SETPARAMS: { 1078 pps_params_t *pp; 1079 int mode; 1080 pp = (pps_params_t *)data; 1081 if (pp->mode & ~ppscap) { 1082 error = EINVAL; 1083 break; 1084 } 1085 sc->ppsparam = *pp; 1086 /* 1087 * Compute msr masks from user-specified timestamp state. 1088 */ 1089 mode = sc->ppsparam.mode; 1090 #ifdef PPS_SYNC 1091 if (mode & PPS_HARDPPSONASSERT) { 1092 mode |= PPS_CAPTUREASSERT; 1093 /* XXX revoke any previous HARDPPS source */ 1094 } 1095 if (mode & PPS_HARDPPSONCLEAR) { 1096 mode |= PPS_CAPTURECLEAR; 1097 /* XXX revoke any previous HARDPPS source */ 1098 } 1099 #endif /* PPS_SYNC */ 1100 switch (mode & PPS_CAPTUREBOTH) { 1101 case 0: 1102 sc->sc_ppsmask = 0; 1103 break; 1104 1105 case PPS_CAPTUREASSERT: 1106 sc->sc_ppsmask = MSR_DCD; 1107 sc->sc_ppsassert = MSR_DCD; 1108 sc->sc_ppsclear = -1; 1109 break; 1110 1111 case PPS_CAPTURECLEAR: 1112 sc->sc_ppsmask = MSR_DCD; 1113 sc->sc_ppsassert = -1; 1114 sc->sc_ppsclear = 0; 1115 break; 1116 1117 case PPS_CAPTUREBOTH: 1118 sc->sc_ppsmask = MSR_DCD; 1119 sc->sc_ppsassert = MSR_DCD; 1120 sc->sc_ppsclear = 0; 1121 break; 1122 1123 default: 1124 error = EINVAL; 1125 break; 1126 } 1127 break; 1128 } 1129 1130 case PPS_IOC_GETCAP: 1131 *(int*)data = ppscap; 1132 break; 1133 1134 case PPS_IOC_FETCH: { 1135 pps_info_t *pi; 1136 pi = (pps_info_t *)data; 1137 *pi = sc->ppsinfo; 1138 break; 1139 } 1140 1141 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1142 /* 1143 * Some GPS clocks models use the falling rather than 1144 * rising edge as the on-the-second signal. 1145 * The old API has no way to specify PPS polarity. 1146 */ 1147 sc->sc_ppsmask = MSR_DCD; 1148 #ifndef PPS_TRAILING_EDGE 1149 sc->sc_ppsassert = MSR_DCD; 1150 sc->sc_ppsclear = -1; 1151 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1152 &sc->ppsinfo.assert_timestamp); 1153 #else 1154 sc->sc_ppsassert = -1 1155 sc->sc_ppsclear = 0; 1156 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1157 &sc->ppsinfo.clear_timestamp); 1158 #endif 1159 break; 1160 1161 default: 1162 error = ENOTTY; 1163 break; 1164 } 1165 1166 COM_UNLOCK(sc); 1167 splx(s); 1168 1169 #ifdef COM_DEBUG 1170 if (com_debug) 1171 comstatus(sc, "comioctl "); 1172 #endif 1173 1174 return (error); 1175 } 1176 1177 integrate void 1178 com_schedrx(sc) 1179 struct com_softc *sc; 1180 { 1181 1182 sc->sc_rx_ready = 1; 1183 1184 /* Wake up the poller. */ 1185 #ifdef __GENERIC_SOFT_INTERRUPTS 1186 softintr_schedule(sc->sc_si); 1187 #else 1188 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1189 setsoftserial(); 1190 #else 1191 if (!com_softintr_scheduled) { 1192 com_softintr_scheduled = 1; 1193 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1194 } 1195 #endif 1196 #endif 1197 } 1198 1199 void 1200 com_break(sc, onoff) 1201 struct com_softc *sc; 1202 int onoff; 1203 { 1204 1205 if (onoff) 1206 SET(sc->sc_lcr, LCR_SBREAK); 1207 else 1208 CLR(sc->sc_lcr, LCR_SBREAK); 1209 1210 if (!sc->sc_heldchange) { 1211 if (sc->sc_tx_busy) { 1212 sc->sc_heldtbc = sc->sc_tbc; 1213 sc->sc_tbc = 0; 1214 sc->sc_heldchange = 1; 1215 } else 1216 com_loadchannelregs(sc); 1217 } 1218 } 1219 1220 void 1221 com_modem(sc, onoff) 1222 struct com_softc *sc; 1223 int onoff; 1224 { 1225 1226 if (sc->sc_mcr_dtr == 0) 1227 return; 1228 1229 if (onoff) 1230 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1231 else 1232 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1233 1234 if (!sc->sc_heldchange) { 1235 if (sc->sc_tx_busy) { 1236 sc->sc_heldtbc = sc->sc_tbc; 1237 sc->sc_tbc = 0; 1238 sc->sc_heldchange = 1; 1239 } else 1240 com_loadchannelregs(sc); 1241 } 1242 } 1243 1244 void 1245 tiocm_to_com(sc, how, ttybits) 1246 struct com_softc *sc; 1247 u_long how; 1248 int ttybits; 1249 { 1250 u_char combits; 1251 1252 combits = 0; 1253 if (ISSET(ttybits, TIOCM_DTR)) 1254 SET(combits, MCR_DTR); 1255 if (ISSET(ttybits, TIOCM_RTS)) 1256 SET(combits, MCR_RTS); 1257 1258 switch (how) { 1259 case TIOCMBIC: 1260 CLR(sc->sc_mcr, combits); 1261 break; 1262 1263 case TIOCMBIS: 1264 SET(sc->sc_mcr, combits); 1265 break; 1266 1267 case TIOCMSET: 1268 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1269 SET(sc->sc_mcr, combits); 1270 break; 1271 } 1272 1273 if (!sc->sc_heldchange) { 1274 if (sc->sc_tx_busy) { 1275 sc->sc_heldtbc = sc->sc_tbc; 1276 sc->sc_tbc = 0; 1277 sc->sc_heldchange = 1; 1278 } else 1279 com_loadchannelregs(sc); 1280 } 1281 } 1282 1283 int 1284 com_to_tiocm(sc) 1285 struct com_softc *sc; 1286 { 1287 u_char combits; 1288 int ttybits = 0; 1289 1290 combits = sc->sc_mcr; 1291 if (ISSET(combits, MCR_DTR)) 1292 SET(ttybits, TIOCM_DTR); 1293 if (ISSET(combits, MCR_RTS)) 1294 SET(ttybits, TIOCM_RTS); 1295 1296 combits = sc->sc_msr; 1297 if (ISSET(combits, MSR_DCD)) 1298 SET(ttybits, TIOCM_CD); 1299 if (ISSET(combits, MSR_CTS)) 1300 SET(ttybits, TIOCM_CTS); 1301 if (ISSET(combits, MSR_DSR)) 1302 SET(ttybits, TIOCM_DSR); 1303 if (ISSET(combits, MSR_RI | MSR_TERI)) 1304 SET(ttybits, TIOCM_RI); 1305 1306 if (sc->sc_ier != 0) 1307 SET(ttybits, TIOCM_LE); 1308 1309 return (ttybits); 1310 } 1311 1312 static u_char 1313 cflag2lcr(cflag) 1314 tcflag_t cflag; 1315 { 1316 u_char lcr = 0; 1317 1318 switch (ISSET(cflag, CSIZE)) { 1319 case CS5: 1320 SET(lcr, LCR_5BITS); 1321 break; 1322 case CS6: 1323 SET(lcr, LCR_6BITS); 1324 break; 1325 case CS7: 1326 SET(lcr, LCR_7BITS); 1327 break; 1328 case CS8: 1329 SET(lcr, LCR_8BITS); 1330 break; 1331 } 1332 if (ISSET(cflag, PARENB)) { 1333 SET(lcr, LCR_PENAB); 1334 if (!ISSET(cflag, PARODD)) 1335 SET(lcr, LCR_PEVEN); 1336 } 1337 if (ISSET(cflag, CSTOPB)) 1338 SET(lcr, LCR_STOPB); 1339 1340 return (lcr); 1341 } 1342 1343 int 1344 comparam(tp, t) 1345 struct tty *tp; 1346 struct termios *t; 1347 { 1348 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1349 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1350 u_char lcr; 1351 int s; 1352 1353 if (COM_ISALIVE(sc) == 0) 1354 return (EIO); 1355 1356 /* Check requested parameters. */ 1357 if (ospeed < 0) 1358 return (EINVAL); 1359 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1360 return (EINVAL); 1361 1362 /* 1363 * For the console, always force CLOCAL and !HUPCL, so that the port 1364 * is always active. 1365 */ 1366 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1367 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1368 SET(t->c_cflag, CLOCAL); 1369 CLR(t->c_cflag, HUPCL); 1370 } 1371 1372 /* 1373 * If there were no changes, don't do anything. This avoids dropping 1374 * input and improves performance when all we did was frob things like 1375 * VMIN and VTIME. 1376 */ 1377 if (tp->t_ospeed == t->c_ospeed && 1378 tp->t_cflag == t->c_cflag) 1379 return (0); 1380 1381 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1382 1383 s = splserial(); 1384 COM_LOCK(sc); 1385 1386 sc->sc_lcr = lcr; 1387 1388 /* 1389 * If we're not in a mode that assumes a connection is present, then 1390 * ignore carrier changes. 1391 */ 1392 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1393 sc->sc_msr_dcd = 0; 1394 else 1395 sc->sc_msr_dcd = MSR_DCD; 1396 /* 1397 * Set the flow control pins depending on the current flow control 1398 * mode. 1399 */ 1400 if (ISSET(t->c_cflag, CRTSCTS)) { 1401 sc->sc_mcr_dtr = MCR_DTR; 1402 sc->sc_mcr_rts = MCR_RTS; 1403 sc->sc_msr_cts = MSR_CTS; 1404 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1405 } else if (ISSET(t->c_cflag, MDMBUF)) { 1406 /* 1407 * For DTR/DCD flow control, make sure we don't toggle DTR for 1408 * carrier detection. 1409 */ 1410 sc->sc_mcr_dtr = 0; 1411 sc->sc_mcr_rts = MCR_DTR; 1412 sc->sc_msr_cts = MSR_DCD; 1413 sc->sc_efr = 0; 1414 } else { 1415 /* 1416 * If no flow control, then always set RTS. This will make 1417 * the other side happy if it mistakenly thinks we're doing 1418 * RTS/CTS flow control. 1419 */ 1420 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1421 sc->sc_mcr_rts = 0; 1422 sc->sc_msr_cts = 0; 1423 sc->sc_efr = 0; 1424 if (ISSET(sc->sc_mcr, MCR_DTR)) 1425 SET(sc->sc_mcr, MCR_RTS); 1426 else 1427 CLR(sc->sc_mcr, MCR_RTS); 1428 } 1429 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1430 1431 #if 0 1432 if (ospeed == 0) 1433 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1434 else 1435 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1436 #endif 1437 1438 sc->sc_dlbl = ospeed; 1439 sc->sc_dlbh = ospeed >> 8; 1440 1441 /* 1442 * Set the FIFO threshold based on the receive speed. 1443 * 1444 * * If it's a low speed, it's probably a mouse or some other 1445 * interactive device, so set the threshold low. 1446 * * If it's a high speed, trim the trigger level down to prevent 1447 * overflows. 1448 * * Otherwise set it a bit higher. 1449 */ 1450 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1451 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1452 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1453 sc->sc_fifo = FIFO_ENABLE | 1454 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1455 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1456 else 1457 sc->sc_fifo = 0; 1458 1459 /* And copy to tty. */ 1460 tp->t_ispeed = 0; 1461 tp->t_ospeed = t->c_ospeed; 1462 tp->t_cflag = t->c_cflag; 1463 1464 if (!sc->sc_heldchange) { 1465 if (sc->sc_tx_busy) { 1466 sc->sc_heldtbc = sc->sc_tbc; 1467 sc->sc_tbc = 0; 1468 sc->sc_heldchange = 1; 1469 } else 1470 com_loadchannelregs(sc); 1471 } 1472 1473 if (!ISSET(t->c_cflag, CHWFLOW)) { 1474 /* Disable the high water mark. */ 1475 sc->sc_r_hiwat = 0; 1476 sc->sc_r_lowat = 0; 1477 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1478 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1479 com_schedrx(sc); 1480 } 1481 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1482 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1483 com_hwiflow(sc); 1484 } 1485 } else { 1486 sc->sc_r_hiwat = com_rbuf_hiwat; 1487 sc->sc_r_lowat = com_rbuf_lowat; 1488 } 1489 1490 COM_UNLOCK(sc); 1491 splx(s); 1492 1493 /* 1494 * Update the tty layer's idea of the carrier bit, in case we changed 1495 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1496 * explicit request. 1497 */ 1498 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1499 1500 #ifdef COM_DEBUG 1501 if (com_debug) 1502 comstatus(sc, "comparam "); 1503 #endif 1504 1505 if (!ISSET(t->c_cflag, CHWFLOW)) { 1506 if (sc->sc_tx_stopped) { 1507 sc->sc_tx_stopped = 0; 1508 comstart(tp); 1509 } 1510 } 1511 1512 return (0); 1513 } 1514 1515 void 1516 com_iflush(sc) 1517 struct com_softc *sc; 1518 { 1519 bus_space_tag_t iot = sc->sc_iot; 1520 bus_space_handle_t ioh = sc->sc_ioh; 1521 #ifdef DIAGNOSTIC 1522 int reg; 1523 #endif 1524 int timo; 1525 1526 #ifdef DIAGNOSTIC 1527 reg = 0xffff; 1528 #endif 1529 timo = 50000; 1530 /* flush any pending I/O */ 1531 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1532 && --timo) 1533 #ifdef DIAGNOSTIC 1534 reg = 1535 #else 1536 (void) 1537 #endif 1538 bus_space_read_1(iot, ioh, com_data); 1539 #ifdef DIAGNOSTIC 1540 if (!timo) 1541 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1542 reg); 1543 #endif 1544 } 1545 1546 void 1547 com_loadchannelregs(sc) 1548 struct com_softc *sc; 1549 { 1550 bus_space_tag_t iot = sc->sc_iot; 1551 bus_space_handle_t ioh = sc->sc_ioh; 1552 1553 /* XXXXX necessary? */ 1554 com_iflush(sc); 1555 1556 bus_space_write_1(iot, ioh, com_ier, 0); 1557 1558 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1559 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1560 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1561 } 1562 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1563 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1564 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1565 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1566 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1567 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1568 1569 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1570 } 1571 1572 int 1573 comhwiflow(tp, block) 1574 struct tty *tp; 1575 int block; 1576 { 1577 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1578 int s; 1579 1580 if (COM_ISALIVE(sc) == 0) 1581 return (0); 1582 1583 if (sc->sc_mcr_rts == 0) 1584 return (0); 1585 1586 s = splserial(); 1587 COM_LOCK(sc); 1588 1589 if (block) { 1590 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1591 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1592 com_hwiflow(sc); 1593 } 1594 } else { 1595 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1596 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1597 com_schedrx(sc); 1598 } 1599 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1600 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1601 com_hwiflow(sc); 1602 } 1603 } 1604 1605 COM_UNLOCK(sc); 1606 splx(s); 1607 return (1); 1608 } 1609 1610 /* 1611 * (un)block input via hw flowcontrol 1612 */ 1613 void 1614 com_hwiflow(sc) 1615 struct com_softc *sc; 1616 { 1617 bus_space_tag_t iot = sc->sc_iot; 1618 bus_space_handle_t ioh = sc->sc_ioh; 1619 1620 if (sc->sc_mcr_rts == 0) 1621 return; 1622 1623 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1624 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1625 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1626 } else { 1627 SET(sc->sc_mcr, sc->sc_mcr_rts); 1628 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1629 } 1630 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1631 } 1632 1633 1634 void 1635 comstart(tp) 1636 struct tty *tp; 1637 { 1638 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1639 bus_space_tag_t iot = sc->sc_iot; 1640 bus_space_handle_t ioh = sc->sc_ioh; 1641 int s; 1642 1643 if (COM_ISALIVE(sc) == 0) 1644 return; 1645 1646 s = spltty(); 1647 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1648 goto out; 1649 if (sc->sc_tx_stopped) 1650 goto out; 1651 1652 if (tp->t_outq.c_cc <= tp->t_lowat) { 1653 if (ISSET(tp->t_state, TS_ASLEEP)) { 1654 CLR(tp->t_state, TS_ASLEEP); 1655 wakeup(&tp->t_outq); 1656 } 1657 selwakeup(&tp->t_wsel); 1658 if (tp->t_outq.c_cc == 0) 1659 goto out; 1660 } 1661 1662 /* Grab the first contiguous region of buffer space. */ 1663 { 1664 u_char *tba; 1665 int tbc; 1666 1667 tba = tp->t_outq.c_cf; 1668 tbc = ndqb(&tp->t_outq, 0); 1669 1670 (void)splserial(); 1671 COM_LOCK(sc); 1672 1673 sc->sc_tba = tba; 1674 sc->sc_tbc = tbc; 1675 } 1676 1677 SET(tp->t_state, TS_BUSY); 1678 sc->sc_tx_busy = 1; 1679 1680 /* Enable transmit completion interrupts if necessary. */ 1681 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1682 SET(sc->sc_ier, IER_ETXRDY); 1683 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1684 } 1685 1686 /* Output the first chunk of the contiguous buffer. */ 1687 { 1688 int n; 1689 1690 n = sc->sc_tbc; 1691 if (n > sc->sc_fifolen) 1692 n = sc->sc_fifolen; 1693 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1694 sc->sc_tbc -= n; 1695 sc->sc_tba += n; 1696 } 1697 COM_UNLOCK(sc); 1698 out: 1699 splx(s); 1700 return; 1701 } 1702 1703 /* 1704 * Stop output on a line. 1705 */ 1706 void 1707 comstop(tp, flag) 1708 struct tty *tp; 1709 int flag; 1710 { 1711 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1712 int s; 1713 1714 s = splserial(); 1715 COM_LOCK(sc); 1716 if (ISSET(tp->t_state, TS_BUSY)) { 1717 /* Stop transmitting at the next chunk. */ 1718 sc->sc_tbc = 0; 1719 sc->sc_heldtbc = 0; 1720 if (!ISSET(tp->t_state, TS_TTSTOP)) 1721 SET(tp->t_state, TS_FLUSH); 1722 } 1723 COM_UNLOCK(sc); 1724 splx(s); 1725 } 1726 1727 void 1728 comdiag(arg) 1729 void *arg; 1730 { 1731 struct com_softc *sc = arg; 1732 int overflows, floods; 1733 int s; 1734 1735 s = splserial(); 1736 COM_LOCK(sc); 1737 overflows = sc->sc_overflows; 1738 sc->sc_overflows = 0; 1739 floods = sc->sc_floods; 1740 sc->sc_floods = 0; 1741 sc->sc_errors = 0; 1742 COM_UNLOCK(sc); 1743 splx(s); 1744 1745 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1746 sc->sc_dev.dv_xname, 1747 overflows, overflows == 1 ? "" : "s", 1748 floods, floods == 1 ? "" : "s"); 1749 } 1750 1751 integrate void 1752 com_rxsoft(sc, tp) 1753 struct com_softc *sc; 1754 struct tty *tp; 1755 { 1756 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1757 u_char *get, *end; 1758 u_int cc, scc; 1759 u_char lsr; 1760 int code; 1761 int s; 1762 1763 end = sc->sc_ebuf; 1764 get = sc->sc_rbget; 1765 scc = cc = com_rbuf_size - sc->sc_rbavail; 1766 1767 if (cc == com_rbuf_size) { 1768 sc->sc_floods++; 1769 if (sc->sc_errors++ == 0) 1770 callout_reset(&sc->sc_diag_callout, 60 * hz, 1771 comdiag, sc); 1772 } 1773 1774 while (cc) { 1775 code = get[0]; 1776 lsr = get[1]; 1777 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1778 if (ISSET(lsr, LSR_OE)) { 1779 sc->sc_overflows++; 1780 if (sc->sc_errors++ == 0) 1781 callout_reset(&sc->sc_diag_callout, 1782 60 * hz, comdiag, sc); 1783 } 1784 if (ISSET(lsr, LSR_BI | LSR_FE)) 1785 SET(code, TTY_FE); 1786 if (ISSET(lsr, LSR_PE)) 1787 SET(code, TTY_PE); 1788 } 1789 if ((*rint)(code, tp) == -1) { 1790 /* 1791 * The line discipline's buffer is out of space. 1792 */ 1793 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1794 /* 1795 * We're either not using flow control, or the 1796 * line discipline didn't tell us to block for 1797 * some reason. Either way, we have no way to 1798 * know when there's more space available, so 1799 * just drop the rest of the data. 1800 */ 1801 get += cc << 1; 1802 if (get >= end) 1803 get -= com_rbuf_size << 1; 1804 cc = 0; 1805 } else { 1806 /* 1807 * Don't schedule any more receive processing 1808 * until the line discipline tells us there's 1809 * space available (through comhwiflow()). 1810 * Leave the rest of the data in the input 1811 * buffer. 1812 */ 1813 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1814 } 1815 break; 1816 } 1817 get += 2; 1818 if (get >= end) 1819 get = sc->sc_rbuf; 1820 cc--; 1821 } 1822 1823 if (cc != scc) { 1824 sc->sc_rbget = get; 1825 s = splserial(); 1826 COM_LOCK(sc); 1827 1828 cc = sc->sc_rbavail += scc - cc; 1829 /* Buffers should be ok again, release possible block. */ 1830 if (cc >= sc->sc_r_lowat) { 1831 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1832 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1833 SET(sc->sc_ier, IER_ERXRDY); 1834 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1835 } 1836 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1837 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1838 com_hwiflow(sc); 1839 } 1840 } 1841 COM_UNLOCK(sc); 1842 splx(s); 1843 } 1844 } 1845 1846 integrate void 1847 com_txsoft(sc, tp) 1848 struct com_softc *sc; 1849 struct tty *tp; 1850 { 1851 1852 CLR(tp->t_state, TS_BUSY); 1853 if (ISSET(tp->t_state, TS_FLUSH)) 1854 CLR(tp->t_state, TS_FLUSH); 1855 else 1856 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1857 (*linesw[tp->t_line].l_start)(tp); 1858 } 1859 1860 integrate void 1861 com_stsoft(sc, tp) 1862 struct com_softc *sc; 1863 struct tty *tp; 1864 { 1865 u_char msr, delta; 1866 int s; 1867 1868 s = splserial(); 1869 COM_LOCK(sc); 1870 msr = sc->sc_msr; 1871 delta = sc->sc_msr_delta; 1872 sc->sc_msr_delta = 0; 1873 COM_UNLOCK(sc); 1874 splx(s); 1875 1876 if (ISSET(delta, sc->sc_msr_dcd)) { 1877 /* 1878 * Inform the tty layer that carrier detect changed. 1879 */ 1880 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1881 } 1882 1883 if (ISSET(delta, sc->sc_msr_cts)) { 1884 /* Block or unblock output according to flow control. */ 1885 if (ISSET(msr, sc->sc_msr_cts)) { 1886 sc->sc_tx_stopped = 0; 1887 (*linesw[tp->t_line].l_start)(tp); 1888 } else { 1889 sc->sc_tx_stopped = 1; 1890 } 1891 } 1892 1893 #ifdef COM_DEBUG 1894 if (com_debug) 1895 comstatus(sc, "com_stsoft"); 1896 #endif 1897 } 1898 1899 #ifdef __GENERIC_SOFT_INTERRUPTS 1900 void 1901 comsoft(arg) 1902 void *arg; 1903 { 1904 struct com_softc *sc = arg; 1905 struct tty *tp; 1906 1907 if (COM_ISALIVE(sc) == 0) 1908 return; 1909 1910 { 1911 #else 1912 void 1913 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1914 comsoft() 1915 #else 1916 comsoft(arg) 1917 void *arg; 1918 #endif 1919 { 1920 struct com_softc *sc; 1921 struct tty *tp; 1922 int unit; 1923 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1924 int s; 1925 1926 s = splsoftserial(); 1927 com_softintr_scheduled = 0; 1928 #endif 1929 1930 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1931 sc = device_lookup(&com_cd, unit); 1932 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1933 continue; 1934 1935 if (COM_ISALIVE(sc) == 0) 1936 continue; 1937 1938 tp = sc->sc_tty; 1939 if (tp == NULL) 1940 continue; 1941 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1942 continue; 1943 #endif 1944 tp = sc->sc_tty; 1945 1946 if (sc->sc_rx_ready) { 1947 sc->sc_rx_ready = 0; 1948 com_rxsoft(sc, tp); 1949 } 1950 1951 if (sc->sc_st_check) { 1952 sc->sc_st_check = 0; 1953 com_stsoft(sc, tp); 1954 } 1955 1956 if (sc->sc_tx_done) { 1957 sc->sc_tx_done = 0; 1958 com_txsoft(sc, tp); 1959 } 1960 } 1961 1962 #ifndef __GENERIC_SOFT_INTERRUPTS 1963 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1964 splx(s); 1965 #endif 1966 #endif 1967 } 1968 1969 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1970 /* there has got to be a better way to do comsoft() */ 1971 }} 1972 #endif 1973 1974 int 1975 comintr(arg) 1976 void *arg; 1977 { 1978 struct com_softc *sc = arg; 1979 bus_space_tag_t iot = sc->sc_iot; 1980 bus_space_handle_t ioh = sc->sc_ioh; 1981 u_char *put, *end; 1982 u_int cc; 1983 u_char lsr, iir; 1984 1985 if (COM_ISALIVE(sc) == 0) 1986 return (0); 1987 1988 COM_LOCK(sc); 1989 iir = bus_space_read_1(iot, ioh, com_iir); 1990 if (ISSET(iir, IIR_NOPEND)) { 1991 COM_UNLOCK(sc); 1992 return (0); 1993 } 1994 1995 end = sc->sc_ebuf; 1996 put = sc->sc_rbput; 1997 cc = sc->sc_rbavail; 1998 1999 do { 2000 u_char msr, delta; 2001 2002 lsr = bus_space_read_1(iot, ioh, com_lsr); 2003 #if defined(DDB) || defined(KGDB) 2004 if (ISSET(lsr, LSR_BI)) { 2005 #ifndef DDB_BREAK_CHAR 2006 #ifdef DDB 2007 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2008 console_debugger(); 2009 continue; 2010 } 2011 #endif 2012 #ifdef KGDB 2013 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2014 kgdb_connect(1); 2015 continue; 2016 } 2017 #endif 2018 #endif 2019 } 2020 #endif /* DDB || KGDB */ 2021 2022 if (ISSET(lsr, LSR_RCV_MASK) && 2023 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2024 while (cc > 0) { 2025 put[0] = bus_space_read_1(iot, ioh, com_data); 2026 put[1] = lsr; 2027 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2028 if (put[0] == DDB_BREAK_CHAR && 2029 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2030 console_debugger(); 2031 2032 lsr = bus_space_read_1(iot, ioh, com_lsr); 2033 if (!ISSET(lsr, LSR_RCV_MASK)) 2034 break; 2035 2036 continue; 2037 } 2038 #endif 2039 put += 2; 2040 if (put >= end) 2041 put = sc->sc_rbuf; 2042 cc--; 2043 2044 lsr = bus_space_read_1(iot, ioh, com_lsr); 2045 if (!ISSET(lsr, LSR_RCV_MASK)) 2046 break; 2047 } 2048 2049 /* 2050 * Current string of incoming characters ended because 2051 * no more data was available or we ran out of space. 2052 * Schedule a receive event if any data was received. 2053 * If we're out of space, turn off receive interrupts. 2054 */ 2055 sc->sc_rbput = put; 2056 sc->sc_rbavail = cc; 2057 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2058 sc->sc_rx_ready = 1; 2059 2060 /* 2061 * See if we are in danger of overflowing a buffer. If 2062 * so, use hardware flow control to ease the pressure. 2063 */ 2064 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2065 cc < sc->sc_r_hiwat) { 2066 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2067 com_hwiflow(sc); 2068 } 2069 2070 /* 2071 * If we're out of space, disable receive interrupts 2072 * until the queue has drained a bit. 2073 */ 2074 if (!cc) { 2075 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2076 CLR(sc->sc_ier, IER_ERXRDY); 2077 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2078 } 2079 } else { 2080 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2081 bus_space_write_1(iot, ioh, com_ier, 0); 2082 delay(10); 2083 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2084 iir = IIR_NOPEND; 2085 continue; 2086 } 2087 } 2088 2089 msr = bus_space_read_1(iot, ioh, com_msr); 2090 delta = msr ^ sc->sc_msr; 2091 sc->sc_msr = msr; 2092 /* 2093 * Pulse-per-second (PSS) signals on edge of DCD? 2094 * Process these even if line discipline is ignoring DCD. 2095 */ 2096 if (delta & sc->sc_ppsmask) { 2097 struct timeval tv; 2098 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2099 /* XXX nanotime() */ 2100 microtime(&tv); 2101 TIMEVAL_TO_TIMESPEC(&tv, 2102 &sc->ppsinfo.assert_timestamp); 2103 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2104 timespecadd(&sc->ppsinfo.assert_timestamp, 2105 &sc->ppsparam.assert_offset, 2106 &sc->ppsinfo.assert_timestamp); 2107 } 2108 2109 #ifdef PPS_SYNC 2110 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2111 hardpps(&tv, tv.tv_usec); 2112 #endif 2113 sc->ppsinfo.assert_sequence++; 2114 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2115 2116 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2117 /* XXX nanotime() */ 2118 microtime(&tv); 2119 TIMEVAL_TO_TIMESPEC(&tv, 2120 &sc->ppsinfo.clear_timestamp); 2121 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2122 timespecadd(&sc->ppsinfo.clear_timestamp, 2123 &sc->ppsparam.clear_offset, 2124 &sc->ppsinfo.clear_timestamp); 2125 } 2126 2127 #ifdef PPS_SYNC 2128 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2129 hardpps(&tv, tv.tv_usec); 2130 #endif 2131 sc->ppsinfo.clear_sequence++; 2132 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2133 } 2134 } 2135 2136 /* 2137 * Process normal status changes 2138 */ 2139 if (ISSET(delta, sc->sc_msr_mask)) { 2140 SET(sc->sc_msr_delta, delta); 2141 2142 /* 2143 * Stop output immediately if we lose the output 2144 * flow control signal or carrier detect. 2145 */ 2146 if (ISSET(~msr, sc->sc_msr_mask)) { 2147 sc->sc_tbc = 0; 2148 sc->sc_heldtbc = 0; 2149 #ifdef COM_DEBUG 2150 if (com_debug) 2151 comstatus(sc, "comintr "); 2152 #endif 2153 } 2154 2155 sc->sc_st_check = 1; 2156 } 2157 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2158 2159 /* 2160 * Done handling any receive interrupts. See if data can be 2161 * transmitted as well. Schedule tx done event if no data left 2162 * and tty was marked busy. 2163 */ 2164 if (ISSET(lsr, LSR_TXRDY)) { 2165 /* 2166 * If we've delayed a parameter change, do it now, and restart 2167 * output. 2168 */ 2169 if (sc->sc_heldchange) { 2170 com_loadchannelregs(sc); 2171 sc->sc_heldchange = 0; 2172 sc->sc_tbc = sc->sc_heldtbc; 2173 sc->sc_heldtbc = 0; 2174 } 2175 2176 /* Output the next chunk of the contiguous buffer, if any. */ 2177 if (sc->sc_tbc > 0) { 2178 int n; 2179 2180 n = sc->sc_tbc; 2181 if (n > sc->sc_fifolen) 2182 n = sc->sc_fifolen; 2183 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2184 sc->sc_tbc -= n; 2185 sc->sc_tba += n; 2186 } else { 2187 /* Disable transmit completion interrupts if necessary. */ 2188 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2189 CLR(sc->sc_ier, IER_ETXRDY); 2190 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2191 } 2192 if (sc->sc_tx_busy) { 2193 sc->sc_tx_busy = 0; 2194 sc->sc_tx_done = 1; 2195 } 2196 } 2197 } 2198 COM_UNLOCK(sc); 2199 2200 /* Wake up the poller. */ 2201 #ifdef __GENERIC_SOFT_INTERRUPTS 2202 softintr_schedule(sc->sc_si); 2203 #else 2204 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2205 setsoftserial(); 2206 #else 2207 if (!com_softintr_scheduled) { 2208 com_softintr_scheduled = 1; 2209 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2210 } 2211 #endif 2212 #endif 2213 2214 #if NRND > 0 && defined(RND_COM) 2215 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2216 #endif 2217 2218 return (1); 2219 } 2220 2221 /* 2222 * The following functions are polled getc and putc routines, shared 2223 * by the console and kgdb glue. 2224 */ 2225 2226 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2227 #define MAX_UNGETC 20 2228 static int com_ungetc[MAX_UNGETC]; 2229 static int com_ungetccount = 0; 2230 #endif 2231 2232 int 2233 com_common_getc(iot, ioh) 2234 bus_space_tag_t iot; 2235 bus_space_handle_t ioh; 2236 { 2237 int s = splserial(); 2238 u_char stat, c; 2239 2240 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2241 /* got a character from reading things earlier */ 2242 if (com_ungetccount > 0) { 2243 int i; 2244 2245 c = com_ungetc[0]; 2246 for (i = 1; i < com_ungetccount; i++) { 2247 com_ungetc[i -1] = com_ungetc[i]; 2248 } 2249 com_ungetccount--; 2250 splx(s); 2251 return (c); 2252 } 2253 #endif 2254 2255 /* block until a character becomes available */ 2256 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2257 ; 2258 2259 c = bus_space_read_1(iot, ioh, com_data); 2260 stat = bus_space_read_1(iot, ioh, com_iir); 2261 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2262 if (c == DDB_BREAK_CHAR) { 2263 extern int db_active; 2264 2265 if (db_active == 0) { 2266 console_debugger(); 2267 } 2268 } 2269 #endif 2270 splx(s); 2271 return (c); 2272 } 2273 2274 void 2275 com_common_putc(iot, ioh, c) 2276 bus_space_tag_t iot; 2277 bus_space_handle_t ioh; 2278 int c; 2279 { 2280 int s = splserial(); 2281 int timo; 2282 2283 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2284 int cin, stat; 2285 if (com_ungetccount < MAX_UNGETC 2286 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2287 cin = bus_space_read_1(iot, ioh, com_data); 2288 stat = bus_space_read_1(iot, ioh, com_iir); 2289 if (cin == DDB_BREAK_CHAR) { 2290 console_debugger(); 2291 } 2292 com_ungetc[com_ungetccount++] = cin; 2293 } 2294 #endif 2295 2296 /* wait for any pending transmission to finish */ 2297 timo = 150000; 2298 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2299 continue; 2300 2301 bus_space_write_1(iot, ioh, com_data, c); 2302 COM_BARRIER(iot, ioh, BR | BW); 2303 2304 /* wait for this transmission to complete */ 2305 timo = 1500000; 2306 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2307 continue; 2308 2309 splx(s); 2310 } 2311 2312 /* 2313 * Initialize UART for use as console or KGDB line. 2314 */ 2315 int 2316 cominit(iot, iobase, rate, frequency, cflag, iohp) 2317 bus_space_tag_t iot; 2318 bus_addr_t iobase; 2319 int rate, frequency; 2320 tcflag_t cflag; 2321 bus_space_handle_t *iohp; 2322 { 2323 bus_space_handle_t ioh; 2324 2325 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2326 return (ENOMEM); /* ??? */ 2327 2328 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2329 bus_space_write_1(iot, ioh, com_efr, 0); 2330 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2331 rate = comspeed(rate, frequency); 2332 bus_space_write_1(iot, ioh, com_dlbl, rate); 2333 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2334 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2335 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2336 bus_space_write_1(iot, ioh, com_fifo, 2337 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2338 bus_space_write_1(iot, ioh, com_ier, 0); 2339 2340 *iohp = ioh; 2341 return (0); 2342 } 2343 2344 /* 2345 * Following are all routines needed for COM to act as console 2346 */ 2347 struct consdev comcons = { 2348 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2349 NODEV, CN_NORMAL 2350 }; 2351 2352 2353 int 2354 comcnattach(iot, iobase, rate, frequency, cflag) 2355 bus_space_tag_t iot; 2356 bus_addr_t iobase; 2357 int rate, frequency; 2358 tcflag_t cflag; 2359 { 2360 int res; 2361 2362 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2363 if (res) 2364 return (res); 2365 2366 cn_tab = &comcons; 2367 2368 comconstag = iot; 2369 comconsaddr = iobase; 2370 comconsrate = rate; 2371 comconscflag = cflag; 2372 2373 return (0); 2374 } 2375 2376 int 2377 comcngetc(dev) 2378 dev_t dev; 2379 { 2380 2381 return (com_common_getc(comconstag, comconsioh)); 2382 } 2383 2384 /* 2385 * Console kernel output character routine. 2386 */ 2387 void 2388 comcnputc(dev, c) 2389 dev_t dev; 2390 int c; 2391 { 2392 2393 com_common_putc(comconstag, comconsioh, c); 2394 } 2395 2396 void 2397 comcnpollc(dev, on) 2398 dev_t dev; 2399 int on; 2400 { 2401 2402 } 2403 2404 #ifdef KGDB 2405 int 2406 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2407 bus_space_tag_t iot; 2408 bus_addr_t iobase; 2409 int rate, frequency; 2410 tcflag_t cflag; 2411 { 2412 int res; 2413 2414 if (iot == comconstag && iobase == comconsaddr) 2415 return (EBUSY); /* cannot share with console */ 2416 2417 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2418 if (res) 2419 return (res); 2420 2421 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2422 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2423 2424 com_kgdb_iot = iot; 2425 com_kgdb_addr = iobase; 2426 2427 return (0); 2428 } 2429 2430 /* ARGSUSED */ 2431 int 2432 com_kgdb_getc(arg) 2433 void *arg; 2434 { 2435 2436 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2437 } 2438 2439 /* ARGSUSED */ 2440 void 2441 com_kgdb_putc(arg, c) 2442 void *arg; 2443 int c; 2444 { 2445 2446 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2447 } 2448 #endif /* KGDB */ 2449 2450 /* helper function to identify the com ports used by 2451 console or KGDB (and not yet autoconf attached) */ 2452 int 2453 com_is_console(iot, iobase, ioh) 2454 bus_space_tag_t iot; 2455 bus_addr_t iobase; 2456 bus_space_handle_t *ioh; 2457 { 2458 bus_space_handle_t help; 2459 2460 if (!comconsattached && 2461 iot == comconstag && iobase == comconsaddr) 2462 help = comconsioh; 2463 #ifdef KGDB 2464 else if (!com_kgdb_attached && 2465 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2466 help = com_kgdb_ioh; 2467 #endif 2468 else 2469 return (0); 2470 2471 if (ioh) 2472 *ioh = help; 2473 return (1); 2474 } 2475
Indexes created Tue Sep 23 07:09:52 GMT 2025