com.c revision 1.182
1 /* $NetBSD: com.c,v 1.182 2000/11/18 15:46:23 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 #if defined(__sparc__) || defined(__sparc_v9__) 75 #define DDB_BREAK_CHAR 1 /* L1 or Stop key */ 76 #endif 77 78 /* 79 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 80 * Supports automatic hardware flow control on StarTech ST16C650A UART 81 */ 82 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_com.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/ioctl.h> 95 #include <sys/select.h> 96 #include <sys/tty.h> 97 #include <sys/proc.h> 98 #include <sys/user.h> 99 #include <sys/conf.h> 100 #include <sys/file.h> 101 #include <sys/uio.h> 102 #include <sys/kernel.h> 103 #include <sys/syslog.h> 104 #include <sys/types.h> 105 #include <sys/device.h> 106 #include <sys/malloc.h> 107 #include <sys/timepps.h> 108 #include <sys/vnode.h> 109 110 #include <machine/intr.h> 111 #include <machine/bus.h> 112 113 #include <dev/ic/comreg.h> 114 #include <dev/ic/comvar.h> 115 #include <dev/ic/ns16550reg.h> 116 #include <dev/ic/st16650reg.h> 117 #ifdef COM_HAYESP 118 #include <dev/ic/hayespreg.h> 119 #endif 120 #define com_lcr com_cfcr 121 #include <dev/cons.h> 122 123 #include "com.h" 124 125 #ifdef COM_HAYESP 126 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 127 #endif 128 129 #if defined(DDB) || defined(KGDB) 130 static void com_enable_debugport __P((struct com_softc *)); 131 #endif 132 void com_config __P((struct com_softc *)); 133 void com_shutdown __P((struct com_softc *)); 134 int comspeed __P((long, long)); 135 static u_char cflag2lcr __P((tcflag_t)); 136 int comparam __P((struct tty *, struct termios *)); 137 void comstart __P((struct tty *)); 138 void comstop __P((struct tty *, int)); 139 int comhwiflow __P((struct tty *, int)); 140 141 void com_loadchannelregs __P((struct com_softc *)); 142 void com_hwiflow __P((struct com_softc *)); 143 void com_break __P((struct com_softc *, int)); 144 void com_modem __P((struct com_softc *, int)); 145 void tiocm_to_com __P((struct com_softc *, u_long, int)); 146 int com_to_tiocm __P((struct com_softc *)); 147 void com_iflush __P((struct com_softc *)); 148 149 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 150 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 151 152 /* XXX: These belong elsewhere */ 153 cdev_decl(com); 154 bdev_decl(com); 155 156 int comcngetc __P((dev_t)); 157 void comcnputc __P((dev_t, int)); 158 void comcnpollc __P((dev_t, int)); 159 160 #define integrate static inline 161 #ifdef __GENERIC_SOFT_INTERRUPTS 162 void comsoft __P((void *)); 163 #else 164 #ifndef __NO_SOFT_SERIAL_INTERRUPT 165 void comsoft __P((void)); 166 #else 167 void comsoft __P((void *)); 168 struct callout comsoft_callout = CALLOUT_INITIALIZER; 169 #endif 170 #endif 171 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 172 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 173 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 174 integrate void com_schedrx __P((struct com_softc *)); 175 void comdiag __P((void *)); 176 177 extern struct cfdriver com_cd; 178 179 /* 180 * Make this an option variable one can patch. 181 * But be warned: this must be a power of 2! 182 */ 183 u_int com_rbuf_size = COM_RING_SIZE; 184 185 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 186 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 187 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 188 189 static bus_addr_t comconsaddr; 190 static bus_space_tag_t comconstag; 191 static bus_space_handle_t comconsioh; 192 static int comconsattached; 193 static int comconsrate; 194 static tcflag_t comconscflag; 195 196 static int ppscap = 197 PPS_TSFMT_TSPEC | 198 PPS_CAPTUREASSERT | 199 PPS_CAPTURECLEAR | 200 #ifdef PPS_SYNC 201 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 202 #endif /* PPS_SYNC */ 203 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 204 205 #ifndef __GENERIC_SOFT_INTERRUPTS 206 #ifdef __NO_SOFT_SERIAL_INTERRUPT 207 volatile int com_softintr_scheduled; 208 #endif 209 #endif 210 211 #ifdef KGDB 212 #include <sys/kgdb.h> 213 214 static bus_addr_t com_kgdb_addr; 215 static bus_space_tag_t com_kgdb_iot; 216 static bus_space_handle_t com_kgdb_ioh; 217 static int com_kgdb_attached; 218 219 int com_kgdb_getc __P((void *)); 220 void com_kgdb_putc __P((void *, int)); 221 #endif /* KGDB */ 222 223 #define COMUNIT_MASK 0x7ffff 224 #define COMDIALOUT_MASK 0x80000 225 226 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 227 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 228 229 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 230 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 231 232 #define BR BUS_SPACE_BARRIER_READ 233 #define BW BUS_SPACE_BARRIER_WRITE 234 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 235 236 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 237 238 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 239 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 240 241 #else 242 243 #define COM_LOCK(sc) 244 #define COM_UNLOCK(sc) 245 246 #endif 247 248 int 249 comspeed(speed, frequency) 250 long speed, frequency; 251 { 252 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 253 254 int x, err; 255 256 #if 0 257 if (speed == 0) 258 return (0); 259 #endif 260 if (speed <= 0) 261 return (-1); 262 x = divrnd(frequency / 16, speed); 263 if (x <= 0) 264 return (-1); 265 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 266 if (err < 0) 267 err = -err; 268 if (err > COM_TOLERANCE) 269 return (-1); 270 return (x); 271 272 #undef divrnd 273 } 274 275 #ifdef COM_DEBUG 276 int com_debug = 0; 277 278 void comstatus __P((struct com_softc *, char *)); 279 void 280 comstatus(sc, str) 281 struct com_softc *sc; 282 char *str; 283 { 284 struct tty *tp = sc->sc_tty; 285 286 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 287 sc->sc_dev.dv_xname, str, 288 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 289 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 290 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 291 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 292 sc->sc_tx_stopped ? "+" : "-"); 293 294 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 295 sc->sc_dev.dv_xname, str, 296 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 297 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 298 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 299 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 300 sc->sc_rx_flags); 301 } 302 #endif 303 304 int 305 comprobe1(iot, ioh) 306 bus_space_tag_t iot; 307 bus_space_handle_t ioh; 308 { 309 310 /* force access to id reg */ 311 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 312 bus_space_write_1(iot, ioh, com_iir, 0); 313 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 314 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 315 return (0); 316 317 return (1); 318 } 319 320 #ifdef COM_HAYESP 321 int 322 comprobeHAYESP(hayespioh, sc) 323 bus_space_handle_t hayespioh; 324 struct com_softc *sc; 325 { 326 char val, dips; 327 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 328 bus_space_tag_t iot = sc->sc_iot; 329 330 /* 331 * Hayes ESP cards have two iobases. One is for compatibility with 332 * 16550 serial chips, and at the same ISA PC base addresses. The 333 * other is for ESP-specific enhanced features, and lies at a 334 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 335 */ 336 337 /* Test for ESP signature */ 338 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 339 return (0); 340 341 /* 342 * ESP is present at ESP enhanced base address; unknown com port 343 */ 344 345 /* Get the dip-switch configurations */ 346 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 347 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 348 349 /* Determine which com port this ESP card services: bits 0,1 of */ 350 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 351 if (sc->sc_iobase != combaselist[dips & 0x03]) 352 return (0); 353 354 printf(": ESP"); 355 356 /* Check ESP Self Test bits. */ 357 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 358 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 359 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 360 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 361 if ((val & 0x70) < 0x20) { 362 printf("-old (%o)", val & 0x70); 363 /* we do not support the necessary features */ 364 return (0); 365 } 366 367 /* Check for ability to emulate 16550: bit 8 == 1 */ 368 if ((dips & 0x80) == 0) { 369 printf(" slave"); 370 /* XXX Does slave really mean no 16550 support?? */ 371 return (0); 372 } 373 374 /* 375 * If we made it this far, we are a full-featured ESP v2.0 (or 376 * better), at the correct com port address. 377 */ 378 379 SET(sc->sc_hwflags, COM_HW_HAYESP); 380 printf(", 1024 byte fifo\n"); 381 return (1); 382 } 383 #endif 384 385 #if defined(DDB) || defined(KGDB) 386 static void 387 com_enable_debugport(sc) 388 struct com_softc *sc; 389 { 390 int s; 391 392 /* Turn on line break interrupt, set carrier. */ 393 s = splserial(); 394 COM_LOCK(sc); 395 sc->sc_ier = IER_ERXRDY; 396 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 397 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 398 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 399 COM_UNLOCK(sc); 400 splx(s); 401 } 402 #endif 403 404 void 405 com_attach_subr(sc) 406 struct com_softc *sc; 407 { 408 bus_addr_t iobase = sc->sc_iobase; 409 bus_space_tag_t iot = sc->sc_iot; 410 bus_space_handle_t ioh = sc->sc_ioh; 411 struct tty *tp; 412 #ifdef COM16650 413 u_int8_t lcr; 414 #endif 415 #ifdef COM_HAYESP 416 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 417 int *hayespp; 418 #endif 419 420 callout_init(&sc->sc_diag_callout); 421 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 422 simple_lock_init(&sc->sc_lock); 423 #endif 424 425 /* Disable interrupts before configuring the device. */ 426 sc->sc_ier = 0; 427 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 428 429 if (iot == comconstag && iobase == comconsaddr) { 430 comconsattached = 1; 431 432 /* Make sure the console is always "hardwired". */ 433 delay(1000); /* wait for output to finish */ 434 SET(sc->sc_hwflags, COM_HW_CONSOLE); 435 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 436 } 437 438 #ifdef COM_HAYESP 439 /* Look for a Hayes ESP board. */ 440 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 441 bus_space_handle_t hayespioh; 442 443 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 444 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 445 continue; 446 if (comprobeHAYESP(hayespioh, sc)) { 447 sc->sc_hayespioh = hayespioh; 448 sc->sc_fifolen = 1024; 449 450 break; 451 } 452 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 453 } 454 /* No ESP; look for other things. */ 455 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 456 #endif 457 sc->sc_fifolen = 1; 458 /* look for a NS 16550AF UART with FIFOs */ 459 bus_space_write_1(iot, ioh, com_fifo, 460 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 461 delay(100); 462 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 463 == IIR_FIFO_MASK) 464 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 465 == FIFO_TRIGGER_14) { 466 SET(sc->sc_hwflags, COM_HW_FIFO); 467 468 #ifdef COM16650 469 /* 470 * IIR changes into the EFR if LCR is set to LCR_EERS 471 * on 16650s. We also know IIR != 0 at this point. 472 * Write 0 into the EFR, and read it. If the result 473 * is 0, we have a 16650. 474 * 475 * Older 16650s were broken; the test to detect them 476 * is taken from the Linux driver. Apparently 477 * setting DLAB enable gives access to the EFR on 478 * these chips. 479 */ 480 lcr = bus_space_read_1(iot, ioh, com_lcr); 481 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 482 bus_space_write_1(iot, ioh, com_efr, 0); 483 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 484 bus_space_write_1(iot, ioh, com_lcr, 485 lcr | LCR_DLAB); 486 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 487 CLR(sc->sc_hwflags, COM_HW_FIFO); 488 sc->sc_fifolen = 0; 489 } else { 490 SET(sc->sc_hwflags, COM_HW_FLOW); 491 sc->sc_fifolen = 32; 492 } 493 } else 494 #endif 495 sc->sc_fifolen = 16; 496 497 #ifdef COM16650 498 bus_space_write_1(iot, ioh, com_lcr, lcr); 499 if (sc->sc_fifolen == 0) 500 printf(": st16650, broken fifo\n"); 501 else if (sc->sc_fifolen == 32) 502 printf(": st16650a, working fifo\n"); 503 else 504 #endif 505 printf(": ns16550a, working fifo\n"); 506 } else 507 printf(": ns16550, broken fifo\n"); 508 else 509 printf(": ns8250 or ns16450, no fifo\n"); 510 bus_space_write_1(iot, ioh, com_fifo, 0); 511 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 512 sc->sc_fifolen = 1; 513 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 514 } 515 #ifdef COM_HAYESP 516 } 517 #endif 518 519 tp = ttymalloc(); 520 tp->t_oproc = comstart; 521 tp->t_param = comparam; 522 tp->t_hwiflow = comhwiflow; 523 524 sc->sc_tty = tp; 525 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 526 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 527 sc->sc_rbavail = com_rbuf_size; 528 if (sc->sc_rbuf == NULL) { 529 printf("%s: unable to allocate ring buffer\n", 530 sc->sc_dev.dv_xname); 531 return; 532 } 533 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 534 535 tty_attach(tp); 536 537 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 538 SET(sc->sc_mcr, MCR_IENABLE); 539 540 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 541 int maj; 542 543 /* locate the major number */ 544 for (maj = 0; maj < nchrdev; maj++) 545 if (cdevsw[maj].d_open == comopen) 546 break; 547 548 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 549 550 printf("%s: console\n", sc->sc_dev.dv_xname); 551 } 552 553 #ifdef KGDB 554 /* 555 * Allow kgdb to "take over" this port. If this is 556 * the kgdb device, it has exclusive use. 557 */ 558 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 559 com_kgdb_attached = 1; 560 561 SET(sc->sc_hwflags, COM_HW_KGDB); 562 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 563 } 564 #endif 565 566 #ifdef __GENERIC_SOFT_INTERRUPTS 567 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 568 #endif 569 570 #if NRND > 0 && defined(RND_COM) 571 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 572 RND_TYPE_TTY, 0); 573 #endif 574 575 /* if there are no enable/disable functions, assume the device 576 is always enabled */ 577 if (!sc->enable) 578 sc->enabled = 1; 579 580 com_config(sc); 581 582 SET(sc->sc_hwflags, COM_HW_DEV_OK); 583 } 584 585 void 586 com_config(sc) 587 struct com_softc *sc; 588 { 589 bus_space_tag_t iot = sc->sc_iot; 590 bus_space_handle_t ioh = sc->sc_ioh; 591 592 /* Disable interrupts before configuring the device. */ 593 sc->sc_ier = 0; 594 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 595 596 #ifdef COM_HAYESP 597 /* Look for a Hayes ESP board. */ 598 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 599 sc->sc_fifolen = 1024; 600 601 /* Set 16550 compatibility mode */ 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 603 HAYESP_SETMODE); 604 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 605 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 606 HAYESP_MODE_SCALE); 607 608 /* Set RTS/CTS flow control */ 609 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 610 HAYESP_SETFLOWTYPE); 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 612 HAYESP_FLOW_RTS); 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 614 HAYESP_FLOW_CTS); 615 616 /* Set flow control levels */ 617 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 618 HAYESP_SETRXFLOW); 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 620 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 622 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 624 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 626 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 627 } 628 #endif 629 630 #ifdef DDB 631 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 632 com_enable_debugport(sc); 633 #endif 634 635 #ifdef KGDB 636 /* 637 * Allow kgdb to "take over" this port. If this is 638 * the kgdb device, it has exclusive use. 639 */ 640 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 641 com_enable_debugport(sc); 642 #endif 643 } 644 645 int 646 com_detach(self, flags) 647 struct device *self; 648 int flags; 649 { 650 struct com_softc *sc = (struct com_softc *)self; 651 int maj, mn; 652 653 /* locate the major number */ 654 for (maj = 0; maj < nchrdev; maj++) 655 if (cdevsw[maj].d_open == comopen) 656 break; 657 658 /* Nuke the vnodes for any open instances. */ 659 mn = self->dv_unit; 660 vdevgone(maj, mn, mn, VCHR); 661 662 mn |= COMDIALOUT_MASK; 663 vdevgone(maj, mn, mn, VCHR); 664 665 /* Free the receive buffer. */ 666 free(sc->sc_rbuf, M_DEVBUF); 667 668 /* Detach and free the tty. */ 669 tty_detach(sc->sc_tty); 670 ttyfree(sc->sc_tty); 671 672 #ifdef __GENERIC_SOFT_INTERRUPTS 673 /* Unhook the soft interrupt handler. */ 674 softintr_disestablish(sc->sc_si); 675 #endif 676 677 #if NRND > 0 && defined(RND_COM) 678 /* Unhook the entropy source. */ 679 rnd_detach_source(&sc->rnd_source); 680 #endif 681 682 return (0); 683 } 684 685 int 686 com_activate(self, act) 687 struct device *self; 688 enum devact act; 689 { 690 struct com_softc *sc = (struct com_softc *)self; 691 int s, rv = 0; 692 693 s = splserial(); 694 COM_LOCK(sc); 695 switch (act) { 696 case DVACT_ACTIVATE: 697 rv = EOPNOTSUPP; 698 break; 699 700 case DVACT_DEACTIVATE: 701 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 702 rv = EBUSY; 703 break; 704 } 705 706 if (sc->disable != NULL && sc->enabled != 0) { 707 (*sc->disable)(sc); 708 sc->enabled = 0; 709 } 710 break; 711 } 712 713 COM_UNLOCK(sc); 714 splx(s); 715 return (rv); 716 } 717 718 void 719 com_shutdown(sc) 720 struct com_softc *sc; 721 { 722 struct tty *tp = sc->sc_tty; 723 int s; 724 725 s = splserial(); 726 COM_LOCK(sc); 727 728 /* If we were asserting flow control, then deassert it. */ 729 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 730 com_hwiflow(sc); 731 732 /* Clear any break condition set with TIOCSBRK. */ 733 com_break(sc, 0); 734 735 /* Turn off PPS capture on last close. */ 736 sc->sc_ppsmask = 0; 737 sc->ppsparam.mode = 0; 738 739 /* 740 * Hang up if necessary. Wait a bit, so the other side has time to 741 * notice even if we immediately open the port again. 742 * Avoid tsleeping above splhigh(). 743 */ 744 if (ISSET(tp->t_cflag, HUPCL)) { 745 com_modem(sc, 0); 746 COM_UNLOCK(sc); 747 splx(s); 748 /* XXX tsleep will only timeout */ 749 (void) tsleep(sc, TTIPRI, ttclos, hz); 750 s = splserial(); 751 COM_LOCK(sc); 752 } 753 754 /* Turn off interrupts. */ 755 #ifdef DDB 756 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 757 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 758 else 759 #endif 760 sc->sc_ier = 0; 761 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 762 763 if (sc->disable) { 764 #ifdef DIAGNOSTIC 765 if (!sc->enabled) 766 panic("com_shutdown: not enabled?"); 767 #endif 768 (*sc->disable)(sc); 769 sc->enabled = 0; 770 } 771 COM_UNLOCK(sc); 772 splx(s); 773 } 774 775 int 776 comopen(dev, flag, mode, p) 777 dev_t dev; 778 int flag, mode; 779 struct proc *p; 780 { 781 struct com_softc *sc; 782 struct tty *tp; 783 int s, s2; 784 int error; 785 786 sc = device_lookup(&com_cd, COMUNIT(dev)); 787 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 788 sc->sc_rbuf == NULL) 789 return (ENXIO); 790 791 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 792 return (ENXIO); 793 794 #ifdef KGDB 795 /* 796 * If this is the kgdb port, no other use is permitted. 797 */ 798 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 799 return (EBUSY); 800 #endif 801 802 tp = sc->sc_tty; 803 804 if (ISSET(tp->t_state, TS_ISOPEN) && 805 ISSET(tp->t_state, TS_XCLUDE) && 806 p->p_ucred->cr_uid != 0) 807 return (EBUSY); 808 809 s = spltty(); 810 811 /* 812 * Do the following iff this is a first open. 813 */ 814 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 815 struct termios t; 816 817 tp->t_dev = dev; 818 819 s2 = splserial(); 820 COM_LOCK(sc); 821 822 if (sc->enable) { 823 if ((*sc->enable)(sc)) { 824 COM_UNLOCK(sc); 825 splx(s2); 826 splx(s); 827 printf("%s: device enable failed\n", 828 sc->sc_dev.dv_xname); 829 return (EIO); 830 } 831 sc->enabled = 1; 832 com_config(sc); 833 } 834 835 /* Turn on interrupts. */ 836 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 837 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 838 839 /* Fetch the current modem control status, needed later. */ 840 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 841 842 /* Clear PPS capture state on first open. */ 843 sc->sc_ppsmask = 0; 844 sc->ppsparam.mode = 0; 845 846 COM_UNLOCK(sc); 847 splx(s2); 848 849 /* 850 * Initialize the termios status to the defaults. Add in the 851 * sticky bits from TIOCSFLAGS. 852 */ 853 t.c_ispeed = 0; 854 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 855 t.c_ospeed = comconsrate; 856 t.c_cflag = comconscflag; 857 } else { 858 t.c_ospeed = TTYDEF_SPEED; 859 t.c_cflag = TTYDEF_CFLAG; 860 } 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 862 SET(t.c_cflag, CLOCAL); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 864 SET(t.c_cflag, CRTSCTS); 865 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 866 SET(t.c_cflag, MDMBUF); 867 /* Make sure comparam() will do something. */ 868 tp->t_ospeed = 0; 869 (void) comparam(tp, &t); 870 tp->t_iflag = TTYDEF_IFLAG; 871 tp->t_oflag = TTYDEF_OFLAG; 872 tp->t_lflag = TTYDEF_LFLAG; 873 ttychars(tp); 874 ttsetwater(tp); 875 876 s2 = splserial(); 877 COM_LOCK(sc); 878 879 /* 880 * Turn on DTR. We must always do this, even if carrier is not 881 * present, because otherwise we'd have to use TIOCSDTR 882 * immediately after setting CLOCAL, which applications do not 883 * expect. We always assert DTR while the device is open 884 * unless explicitly requested to deassert it. 885 */ 886 com_modem(sc, 1); 887 888 /* Clear the input ring, and unblock. */ 889 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 890 sc->sc_rbavail = com_rbuf_size; 891 com_iflush(sc); 892 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 893 com_hwiflow(sc); 894 895 #ifdef COM_DEBUG 896 if (com_debug) 897 comstatus(sc, "comopen "); 898 #endif 899 900 COM_UNLOCK(sc); 901 splx(s2); 902 } 903 904 splx(s); 905 906 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 907 if (error) 908 goto bad; 909 910 error = (*tp->t_linesw->l_open)(dev, tp); 911 if (error) 912 goto bad; 913 914 return (0); 915 916 bad: 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * We failed to open the device, and nobody else had it opened. 920 * Clean up the state as appropriate. 921 */ 922 com_shutdown(sc); 923 } 924 925 return (error); 926 } 927 928 int 929 comclose(dev, flag, mode, p) 930 dev_t dev; 931 int flag, mode; 932 struct proc *p; 933 { 934 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 935 struct tty *tp = sc->sc_tty; 936 937 /* XXX This is for cons.c. */ 938 if (!ISSET(tp->t_state, TS_ISOPEN)) 939 return (0); 940 941 (*tp->t_linesw->l_close)(tp, flag); 942 ttyclose(tp); 943 944 if (COM_ISALIVE(sc) == 0) 945 return (0); 946 947 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 948 /* 949 * Although we got a last close, the device may still be in 950 * use; e.g. if this was the dialout node, and there are still 951 * processes waiting for carrier on the non-dialout node. 952 */ 953 com_shutdown(sc); 954 } 955 956 return (0); 957 } 958 959 int 960 comread(dev, uio, flag) 961 dev_t dev; 962 struct uio *uio; 963 int flag; 964 { 965 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 966 struct tty *tp = sc->sc_tty; 967 968 if (COM_ISALIVE(sc) == 0) 969 return (EIO); 970 971 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 972 } 973 974 int 975 comwrite(dev, uio, flag) 976 dev_t dev; 977 struct uio *uio; 978 int flag; 979 { 980 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 981 struct tty *tp = sc->sc_tty; 982 983 if (COM_ISALIVE(sc) == 0) 984 return (EIO); 985 986 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 987 } 988 989 struct tty * 990 comtty(dev) 991 dev_t dev; 992 { 993 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 994 struct tty *tp = sc->sc_tty; 995 996 return (tp); 997 } 998 999 int 1000 comioctl(dev, cmd, data, flag, p) 1001 dev_t dev; 1002 u_long cmd; 1003 caddr_t data; 1004 int flag; 1005 struct proc *p; 1006 { 1007 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1008 struct tty *tp = sc->sc_tty; 1009 int error; 1010 int s; 1011 1012 if (COM_ISALIVE(sc) == 0) 1013 return (EIO); 1014 1015 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1016 if (error >= 0) 1017 return (error); 1018 1019 error = ttioctl(tp, cmd, data, flag, p); 1020 if (error >= 0) 1021 return (error); 1022 1023 error = 0; 1024 1025 s = splserial(); 1026 COM_LOCK(sc); 1027 1028 switch (cmd) { 1029 case TIOCSBRK: 1030 com_break(sc, 1); 1031 break; 1032 1033 case TIOCCBRK: 1034 com_break(sc, 0); 1035 break; 1036 1037 case TIOCSDTR: 1038 com_modem(sc, 1); 1039 break; 1040 1041 case TIOCCDTR: 1042 com_modem(sc, 0); 1043 break; 1044 1045 case TIOCGFLAGS: 1046 *(int *)data = sc->sc_swflags; 1047 break; 1048 1049 case TIOCSFLAGS: 1050 error = suser(p->p_ucred, &p->p_acflag); 1051 if (error) 1052 break; 1053 sc->sc_swflags = *(int *)data; 1054 break; 1055 1056 case TIOCMSET: 1057 case TIOCMBIS: 1058 case TIOCMBIC: 1059 tiocm_to_com(sc, cmd, *(int *)data); 1060 break; 1061 1062 case TIOCMGET: 1063 *(int *)data = com_to_tiocm(sc); 1064 break; 1065 1066 case PPS_IOC_CREATE: 1067 break; 1068 1069 case PPS_IOC_DESTROY: 1070 break; 1071 1072 case PPS_IOC_GETPARAMS: { 1073 pps_params_t *pp; 1074 pp = (pps_params_t *)data; 1075 *pp = sc->ppsparam; 1076 break; 1077 } 1078 1079 case PPS_IOC_SETPARAMS: { 1080 pps_params_t *pp; 1081 int mode; 1082 pp = (pps_params_t *)data; 1083 if (pp->mode & ~ppscap) { 1084 error = EINVAL; 1085 break; 1086 } 1087 sc->ppsparam = *pp; 1088 /* 1089 * Compute msr masks from user-specified timestamp state. 1090 */ 1091 mode = sc->ppsparam.mode; 1092 #ifdef PPS_SYNC 1093 if (mode & PPS_HARDPPSONASSERT) { 1094 mode |= PPS_CAPTUREASSERT; 1095 /* XXX revoke any previous HARDPPS source */ 1096 } 1097 if (mode & PPS_HARDPPSONCLEAR) { 1098 mode |= PPS_CAPTURECLEAR; 1099 /* XXX revoke any previous HARDPPS source */ 1100 } 1101 #endif /* PPS_SYNC */ 1102 switch (mode & PPS_CAPTUREBOTH) { 1103 case 0: 1104 sc->sc_ppsmask = 0; 1105 break; 1106 1107 case PPS_CAPTUREASSERT: 1108 sc->sc_ppsmask = MSR_DCD; 1109 sc->sc_ppsassert = MSR_DCD; 1110 sc->sc_ppsclear = -1; 1111 break; 1112 1113 case PPS_CAPTURECLEAR: 1114 sc->sc_ppsmask = MSR_DCD; 1115 sc->sc_ppsassert = -1; 1116 sc->sc_ppsclear = 0; 1117 break; 1118 1119 case PPS_CAPTUREBOTH: 1120 sc->sc_ppsmask = MSR_DCD; 1121 sc->sc_ppsassert = MSR_DCD; 1122 sc->sc_ppsclear = 0; 1123 break; 1124 1125 default: 1126 error = EINVAL; 1127 break; 1128 } 1129 break; 1130 } 1131 1132 case PPS_IOC_GETCAP: 1133 *(int*)data = ppscap; 1134 break; 1135 1136 case PPS_IOC_FETCH: { 1137 pps_info_t *pi; 1138 pi = (pps_info_t *)data; 1139 *pi = sc->ppsinfo; 1140 break; 1141 } 1142 1143 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1144 /* 1145 * Some GPS clocks models use the falling rather than 1146 * rising edge as the on-the-second signal. 1147 * The old API has no way to specify PPS polarity. 1148 */ 1149 sc->sc_ppsmask = MSR_DCD; 1150 #ifndef PPS_TRAILING_EDGE 1151 sc->sc_ppsassert = MSR_DCD; 1152 sc->sc_ppsclear = -1; 1153 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1154 &sc->ppsinfo.assert_timestamp); 1155 #else 1156 sc->sc_ppsassert = -1 1157 sc->sc_ppsclear = 0; 1158 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1159 &sc->ppsinfo.clear_timestamp); 1160 #endif 1161 break; 1162 1163 default: 1164 error = ENOTTY; 1165 break; 1166 } 1167 1168 COM_UNLOCK(sc); 1169 splx(s); 1170 1171 #ifdef COM_DEBUG 1172 if (com_debug) 1173 comstatus(sc, "comioctl "); 1174 #endif 1175 1176 return (error); 1177 } 1178 1179 integrate void 1180 com_schedrx(sc) 1181 struct com_softc *sc; 1182 { 1183 1184 sc->sc_rx_ready = 1; 1185 1186 /* Wake up the poller. */ 1187 #ifdef __GENERIC_SOFT_INTERRUPTS 1188 softintr_schedule(sc->sc_si); 1189 #else 1190 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1191 setsoftserial(); 1192 #else 1193 if (!com_softintr_scheduled) { 1194 com_softintr_scheduled = 1; 1195 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1196 } 1197 #endif 1198 #endif 1199 } 1200 1201 void 1202 com_break(sc, onoff) 1203 struct com_softc *sc; 1204 int onoff; 1205 { 1206 1207 if (onoff) 1208 SET(sc->sc_lcr, LCR_SBREAK); 1209 else 1210 CLR(sc->sc_lcr, LCR_SBREAK); 1211 1212 if (!sc->sc_heldchange) { 1213 if (sc->sc_tx_busy) { 1214 sc->sc_heldtbc = sc->sc_tbc; 1215 sc->sc_tbc = 0; 1216 sc->sc_heldchange = 1; 1217 } else 1218 com_loadchannelregs(sc); 1219 } 1220 } 1221 1222 void 1223 com_modem(sc, onoff) 1224 struct com_softc *sc; 1225 int onoff; 1226 { 1227 1228 if (sc->sc_mcr_dtr == 0) 1229 return; 1230 1231 if (onoff) 1232 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1233 else 1234 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1235 1236 if (!sc->sc_heldchange) { 1237 if (sc->sc_tx_busy) { 1238 sc->sc_heldtbc = sc->sc_tbc; 1239 sc->sc_tbc = 0; 1240 sc->sc_heldchange = 1; 1241 } else 1242 com_loadchannelregs(sc); 1243 } 1244 } 1245 1246 void 1247 tiocm_to_com(sc, how, ttybits) 1248 struct com_softc *sc; 1249 u_long how; 1250 int ttybits; 1251 { 1252 u_char combits; 1253 1254 combits = 0; 1255 if (ISSET(ttybits, TIOCM_DTR)) 1256 SET(combits, MCR_DTR); 1257 if (ISSET(ttybits, TIOCM_RTS)) 1258 SET(combits, MCR_RTS); 1259 1260 switch (how) { 1261 case TIOCMBIC: 1262 CLR(sc->sc_mcr, combits); 1263 break; 1264 1265 case TIOCMBIS: 1266 SET(sc->sc_mcr, combits); 1267 break; 1268 1269 case TIOCMSET: 1270 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1271 SET(sc->sc_mcr, combits); 1272 break; 1273 } 1274 1275 if (!sc->sc_heldchange) { 1276 if (sc->sc_tx_busy) { 1277 sc->sc_heldtbc = sc->sc_tbc; 1278 sc->sc_tbc = 0; 1279 sc->sc_heldchange = 1; 1280 } else 1281 com_loadchannelregs(sc); 1282 } 1283 } 1284 1285 int 1286 com_to_tiocm(sc) 1287 struct com_softc *sc; 1288 { 1289 u_char combits; 1290 int ttybits = 0; 1291 1292 combits = sc->sc_mcr; 1293 if (ISSET(combits, MCR_DTR)) 1294 SET(ttybits, TIOCM_DTR); 1295 if (ISSET(combits, MCR_RTS)) 1296 SET(ttybits, TIOCM_RTS); 1297 1298 combits = sc->sc_msr; 1299 if (ISSET(combits, MSR_DCD)) 1300 SET(ttybits, TIOCM_CD); 1301 if (ISSET(combits, MSR_CTS)) 1302 SET(ttybits, TIOCM_CTS); 1303 if (ISSET(combits, MSR_DSR)) 1304 SET(ttybits, TIOCM_DSR); 1305 if (ISSET(combits, MSR_RI | MSR_TERI)) 1306 SET(ttybits, TIOCM_RI); 1307 1308 if (sc->sc_ier != 0) 1309 SET(ttybits, TIOCM_LE); 1310 1311 return (ttybits); 1312 } 1313 1314 static u_char 1315 cflag2lcr(cflag) 1316 tcflag_t cflag; 1317 { 1318 u_char lcr = 0; 1319 1320 switch (ISSET(cflag, CSIZE)) { 1321 case CS5: 1322 SET(lcr, LCR_5BITS); 1323 break; 1324 case CS6: 1325 SET(lcr, LCR_6BITS); 1326 break; 1327 case CS7: 1328 SET(lcr, LCR_7BITS); 1329 break; 1330 case CS8: 1331 SET(lcr, LCR_8BITS); 1332 break; 1333 } 1334 if (ISSET(cflag, PARENB)) { 1335 SET(lcr, LCR_PENAB); 1336 if (!ISSET(cflag, PARODD)) 1337 SET(lcr, LCR_PEVEN); 1338 } 1339 if (ISSET(cflag, CSTOPB)) 1340 SET(lcr, LCR_STOPB); 1341 1342 return (lcr); 1343 } 1344 1345 int 1346 comparam(tp, t) 1347 struct tty *tp; 1348 struct termios *t; 1349 { 1350 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1351 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1352 u_char lcr; 1353 int s; 1354 1355 if (COM_ISALIVE(sc) == 0) 1356 return (EIO); 1357 1358 /* Check requested parameters. */ 1359 if (ospeed < 0) 1360 return (EINVAL); 1361 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1362 return (EINVAL); 1363 1364 /* 1365 * For the console, always force CLOCAL and !HUPCL, so that the port 1366 * is always active. 1367 */ 1368 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1369 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1370 SET(t->c_cflag, CLOCAL); 1371 CLR(t->c_cflag, HUPCL); 1372 } 1373 1374 /* 1375 * If there were no changes, don't do anything. This avoids dropping 1376 * input and improves performance when all we did was frob things like 1377 * VMIN and VTIME. 1378 */ 1379 if (tp->t_ospeed == t->c_ospeed && 1380 tp->t_cflag == t->c_cflag) 1381 return (0); 1382 1383 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1384 1385 s = splserial(); 1386 COM_LOCK(sc); 1387 1388 sc->sc_lcr = lcr; 1389 1390 /* 1391 * If we're not in a mode that assumes a connection is present, then 1392 * ignore carrier changes. 1393 */ 1394 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1395 sc->sc_msr_dcd = 0; 1396 else 1397 sc->sc_msr_dcd = MSR_DCD; 1398 /* 1399 * Set the flow control pins depending on the current flow control 1400 * mode. 1401 */ 1402 if (ISSET(t->c_cflag, CRTSCTS)) { 1403 sc->sc_mcr_dtr = MCR_DTR; 1404 sc->sc_mcr_rts = MCR_RTS; 1405 sc->sc_msr_cts = MSR_CTS; 1406 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1407 } else if (ISSET(t->c_cflag, MDMBUF)) { 1408 /* 1409 * For DTR/DCD flow control, make sure we don't toggle DTR for 1410 * carrier detection. 1411 */ 1412 sc->sc_mcr_dtr = 0; 1413 sc->sc_mcr_rts = MCR_DTR; 1414 sc->sc_msr_cts = MSR_DCD; 1415 sc->sc_efr = 0; 1416 } else { 1417 /* 1418 * If no flow control, then always set RTS. This will make 1419 * the other side happy if it mistakenly thinks we're doing 1420 * RTS/CTS flow control. 1421 */ 1422 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1423 sc->sc_mcr_rts = 0; 1424 sc->sc_msr_cts = 0; 1425 sc->sc_efr = 0; 1426 if (ISSET(sc->sc_mcr, MCR_DTR)) 1427 SET(sc->sc_mcr, MCR_RTS); 1428 else 1429 CLR(sc->sc_mcr, MCR_RTS); 1430 } 1431 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1432 1433 #if 0 1434 if (ospeed == 0) 1435 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1436 else 1437 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1438 #endif 1439 1440 sc->sc_dlbl = ospeed; 1441 sc->sc_dlbh = ospeed >> 8; 1442 1443 /* 1444 * Set the FIFO threshold based on the receive speed. 1445 * 1446 * * If it's a low speed, it's probably a mouse or some other 1447 * interactive device, so set the threshold low. 1448 * * If it's a high speed, trim the trigger level down to prevent 1449 * overflows. 1450 * * Otherwise set it a bit higher. 1451 */ 1452 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1453 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1454 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1455 sc->sc_fifo = FIFO_ENABLE | 1456 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1457 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1458 else 1459 sc->sc_fifo = 0; 1460 1461 /* And copy to tty. */ 1462 tp->t_ispeed = 0; 1463 tp->t_ospeed = t->c_ospeed; 1464 tp->t_cflag = t->c_cflag; 1465 1466 if (!sc->sc_heldchange) { 1467 if (sc->sc_tx_busy) { 1468 sc->sc_heldtbc = sc->sc_tbc; 1469 sc->sc_tbc = 0; 1470 sc->sc_heldchange = 1; 1471 } else 1472 com_loadchannelregs(sc); 1473 } 1474 1475 if (!ISSET(t->c_cflag, CHWFLOW)) { 1476 /* Disable the high water mark. */ 1477 sc->sc_r_hiwat = 0; 1478 sc->sc_r_lowat = 0; 1479 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1480 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1481 com_schedrx(sc); 1482 } 1483 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1484 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1485 com_hwiflow(sc); 1486 } 1487 } else { 1488 sc->sc_r_hiwat = com_rbuf_hiwat; 1489 sc->sc_r_lowat = com_rbuf_lowat; 1490 } 1491 1492 COM_UNLOCK(sc); 1493 splx(s); 1494 1495 /* 1496 * Update the tty layer's idea of the carrier bit, in case we changed 1497 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1498 * explicit request. 1499 */ 1500 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1501 1502 #ifdef COM_DEBUG 1503 if (com_debug) 1504 comstatus(sc, "comparam "); 1505 #endif 1506 1507 if (!ISSET(t->c_cflag, CHWFLOW)) { 1508 if (sc->sc_tx_stopped) { 1509 sc->sc_tx_stopped = 0; 1510 comstart(tp); 1511 } 1512 } 1513 1514 return (0); 1515 } 1516 1517 void 1518 com_iflush(sc) 1519 struct com_softc *sc; 1520 { 1521 bus_space_tag_t iot = sc->sc_iot; 1522 bus_space_handle_t ioh = sc->sc_ioh; 1523 #ifdef DIAGNOSTIC 1524 int reg; 1525 #endif 1526 int timo; 1527 1528 #ifdef DIAGNOSTIC 1529 reg = 0xffff; 1530 #endif 1531 timo = 50000; 1532 /* flush any pending I/O */ 1533 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1534 && --timo) 1535 #ifdef DIAGNOSTIC 1536 reg = 1537 #else 1538 (void) 1539 #endif 1540 bus_space_read_1(iot, ioh, com_data); 1541 #ifdef DIAGNOSTIC 1542 if (!timo) 1543 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1544 reg); 1545 #endif 1546 } 1547 1548 void 1549 com_loadchannelregs(sc) 1550 struct com_softc *sc; 1551 { 1552 bus_space_tag_t iot = sc->sc_iot; 1553 bus_space_handle_t ioh = sc->sc_ioh; 1554 1555 /* XXXXX necessary? */ 1556 com_iflush(sc); 1557 1558 bus_space_write_1(iot, ioh, com_ier, 0); 1559 1560 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1561 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1562 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1563 } 1564 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1565 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1566 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1567 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1568 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1569 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1570 1571 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1572 } 1573 1574 int 1575 comhwiflow(tp, block) 1576 struct tty *tp; 1577 int block; 1578 { 1579 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1580 int s; 1581 1582 if (COM_ISALIVE(sc) == 0) 1583 return (0); 1584 1585 if (sc->sc_mcr_rts == 0) 1586 return (0); 1587 1588 s = splserial(); 1589 COM_LOCK(sc); 1590 1591 if (block) { 1592 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1593 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1594 com_hwiflow(sc); 1595 } 1596 } else { 1597 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1598 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1599 com_schedrx(sc); 1600 } 1601 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1602 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1603 com_hwiflow(sc); 1604 } 1605 } 1606 1607 COM_UNLOCK(sc); 1608 splx(s); 1609 return (1); 1610 } 1611 1612 /* 1613 * (un)block input via hw flowcontrol 1614 */ 1615 void 1616 com_hwiflow(sc) 1617 struct com_softc *sc; 1618 { 1619 bus_space_tag_t iot = sc->sc_iot; 1620 bus_space_handle_t ioh = sc->sc_ioh; 1621 1622 if (sc->sc_mcr_rts == 0) 1623 return; 1624 1625 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1626 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1627 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1628 } else { 1629 SET(sc->sc_mcr, sc->sc_mcr_rts); 1630 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1631 } 1632 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1633 } 1634 1635 1636 void 1637 comstart(tp) 1638 struct tty *tp; 1639 { 1640 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1641 bus_space_tag_t iot = sc->sc_iot; 1642 bus_space_handle_t ioh = sc->sc_ioh; 1643 int s; 1644 1645 if (COM_ISALIVE(sc) == 0) 1646 return; 1647 1648 s = spltty(); 1649 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1650 goto out; 1651 if (sc->sc_tx_stopped) 1652 goto out; 1653 1654 if (tp->t_outq.c_cc <= tp->t_lowat) { 1655 if (ISSET(tp->t_state, TS_ASLEEP)) { 1656 CLR(tp->t_state, TS_ASLEEP); 1657 wakeup(&tp->t_outq); 1658 } 1659 selwakeup(&tp->t_wsel); 1660 if (tp->t_outq.c_cc == 0) 1661 goto out; 1662 } 1663 1664 /* Grab the first contiguous region of buffer space. */ 1665 { 1666 u_char *tba; 1667 int tbc; 1668 1669 tba = tp->t_outq.c_cf; 1670 tbc = ndqb(&tp->t_outq, 0); 1671 1672 (void)splserial(); 1673 COM_LOCK(sc); 1674 1675 sc->sc_tba = tba; 1676 sc->sc_tbc = tbc; 1677 } 1678 1679 SET(tp->t_state, TS_BUSY); 1680 sc->sc_tx_busy = 1; 1681 1682 /* Enable transmit completion interrupts if necessary. */ 1683 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1684 SET(sc->sc_ier, IER_ETXRDY); 1685 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1686 } 1687 1688 /* Output the first chunk of the contiguous buffer. */ 1689 { 1690 int n; 1691 1692 n = sc->sc_tbc; 1693 if (n > sc->sc_fifolen) 1694 n = sc->sc_fifolen; 1695 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1696 sc->sc_tbc -= n; 1697 sc->sc_tba += n; 1698 } 1699 COM_UNLOCK(sc); 1700 out: 1701 splx(s); 1702 return; 1703 } 1704 1705 /* 1706 * Stop output on a line. 1707 */ 1708 void 1709 comstop(tp, flag) 1710 struct tty *tp; 1711 int flag; 1712 { 1713 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1714 int s; 1715 1716 s = splserial(); 1717 COM_LOCK(sc); 1718 if (ISSET(tp->t_state, TS_BUSY)) { 1719 /* Stop transmitting at the next chunk. */ 1720 sc->sc_tbc = 0; 1721 sc->sc_heldtbc = 0; 1722 if (!ISSET(tp->t_state, TS_TTSTOP)) 1723 SET(tp->t_state, TS_FLUSH); 1724 } 1725 COM_UNLOCK(sc); 1726 splx(s); 1727 } 1728 1729 void 1730 comdiag(arg) 1731 void *arg; 1732 { 1733 struct com_softc *sc = arg; 1734 int overflows, floods; 1735 int s; 1736 1737 s = splserial(); 1738 COM_LOCK(sc); 1739 overflows = sc->sc_overflows; 1740 sc->sc_overflows = 0; 1741 floods = sc->sc_floods; 1742 sc->sc_floods = 0; 1743 sc->sc_errors = 0; 1744 COM_UNLOCK(sc); 1745 splx(s); 1746 1747 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1748 sc->sc_dev.dv_xname, 1749 overflows, overflows == 1 ? "" : "s", 1750 floods, floods == 1 ? "" : "s"); 1751 } 1752 1753 integrate void 1754 com_rxsoft(sc, tp) 1755 struct com_softc *sc; 1756 struct tty *tp; 1757 { 1758 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1759 u_char *get, *end; 1760 u_int cc, scc; 1761 u_char lsr; 1762 int code; 1763 int s; 1764 1765 end = sc->sc_ebuf; 1766 get = sc->sc_rbget; 1767 scc = cc = com_rbuf_size - sc->sc_rbavail; 1768 1769 if (cc == com_rbuf_size) { 1770 sc->sc_floods++; 1771 if (sc->sc_errors++ == 0) 1772 callout_reset(&sc->sc_diag_callout, 60 * hz, 1773 comdiag, sc); 1774 } 1775 1776 while (cc) { 1777 code = get[0]; 1778 lsr = get[1]; 1779 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1780 if (ISSET(lsr, LSR_OE)) { 1781 sc->sc_overflows++; 1782 if (sc->sc_errors++ == 0) 1783 callout_reset(&sc->sc_diag_callout, 1784 60 * hz, comdiag, sc); 1785 } 1786 if (ISSET(lsr, LSR_BI | LSR_FE)) 1787 SET(code, TTY_FE); 1788 if (ISSET(lsr, LSR_PE)) 1789 SET(code, TTY_PE); 1790 } 1791 if ((*rint)(code, tp) == -1) { 1792 /* 1793 * The line discipline's buffer is out of space. 1794 */ 1795 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1796 /* 1797 * We're either not using flow control, or the 1798 * line discipline didn't tell us to block for 1799 * some reason. Either way, we have no way to 1800 * know when there's more space available, so 1801 * just drop the rest of the data. 1802 */ 1803 get += cc << 1; 1804 if (get >= end) 1805 get -= com_rbuf_size << 1; 1806 cc = 0; 1807 } else { 1808 /* 1809 * Don't schedule any more receive processing 1810 * until the line discipline tells us there's 1811 * space available (through comhwiflow()). 1812 * Leave the rest of the data in the input 1813 * buffer. 1814 */ 1815 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1816 } 1817 break; 1818 } 1819 get += 2; 1820 if (get >= end) 1821 get = sc->sc_rbuf; 1822 cc--; 1823 } 1824 1825 if (cc != scc) { 1826 sc->sc_rbget = get; 1827 s = splserial(); 1828 COM_LOCK(sc); 1829 1830 cc = sc->sc_rbavail += scc - cc; 1831 /* Buffers should be ok again, release possible block. */ 1832 if (cc >= sc->sc_r_lowat) { 1833 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1834 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1835 SET(sc->sc_ier, IER_ERXRDY); 1836 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1837 } 1838 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1839 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1840 com_hwiflow(sc); 1841 } 1842 } 1843 COM_UNLOCK(sc); 1844 splx(s); 1845 } 1846 } 1847 1848 integrate void 1849 com_txsoft(sc, tp) 1850 struct com_softc *sc; 1851 struct tty *tp; 1852 { 1853 1854 CLR(tp->t_state, TS_BUSY); 1855 if (ISSET(tp->t_state, TS_FLUSH)) 1856 CLR(tp->t_state, TS_FLUSH); 1857 else 1858 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1859 (*tp->t_linesw->l_start)(tp); 1860 } 1861 1862 integrate void 1863 com_stsoft(sc, tp) 1864 struct com_softc *sc; 1865 struct tty *tp; 1866 { 1867 u_char msr, delta; 1868 int s; 1869 1870 s = splserial(); 1871 COM_LOCK(sc); 1872 msr = sc->sc_msr; 1873 delta = sc->sc_msr_delta; 1874 sc->sc_msr_delta = 0; 1875 COM_UNLOCK(sc); 1876 splx(s); 1877 1878 if (ISSET(delta, sc->sc_msr_dcd)) { 1879 /* 1880 * Inform the tty layer that carrier detect changed. 1881 */ 1882 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1883 } 1884 1885 if (ISSET(delta, sc->sc_msr_cts)) { 1886 /* Block or unblock output according to flow control. */ 1887 if (ISSET(msr, sc->sc_msr_cts)) { 1888 sc->sc_tx_stopped = 0; 1889 (*tp->t_linesw->l_start)(tp); 1890 } else { 1891 sc->sc_tx_stopped = 1; 1892 } 1893 } 1894 1895 #ifdef COM_DEBUG 1896 if (com_debug) 1897 comstatus(sc, "com_stsoft"); 1898 #endif 1899 } 1900 1901 #ifdef __GENERIC_SOFT_INTERRUPTS 1902 void 1903 comsoft(arg) 1904 void *arg; 1905 { 1906 struct com_softc *sc = arg; 1907 struct tty *tp; 1908 1909 if (COM_ISALIVE(sc) == 0) 1910 return; 1911 1912 { 1913 #else 1914 void 1915 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1916 comsoft() 1917 #else 1918 comsoft(arg) 1919 void *arg; 1920 #endif 1921 { 1922 struct com_softc *sc; 1923 struct tty *tp; 1924 int unit; 1925 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1926 int s; 1927 1928 s = splsoftserial(); 1929 com_softintr_scheduled = 0; 1930 #endif 1931 1932 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1933 sc = device_lookup(&com_cd, unit); 1934 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1935 continue; 1936 1937 if (COM_ISALIVE(sc) == 0) 1938 continue; 1939 1940 tp = sc->sc_tty; 1941 if (tp == NULL) 1942 continue; 1943 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1944 continue; 1945 #endif 1946 tp = sc->sc_tty; 1947 1948 if (sc->sc_rx_ready) { 1949 sc->sc_rx_ready = 0; 1950 com_rxsoft(sc, tp); 1951 } 1952 1953 if (sc->sc_st_check) { 1954 sc->sc_st_check = 0; 1955 com_stsoft(sc, tp); 1956 } 1957 1958 if (sc->sc_tx_done) { 1959 sc->sc_tx_done = 0; 1960 com_txsoft(sc, tp); 1961 } 1962 } 1963 1964 #ifndef __GENERIC_SOFT_INTERRUPTS 1965 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1966 splx(s); 1967 #endif 1968 #endif 1969 } 1970 1971 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1972 /* there has got to be a better way to do comsoft() */ 1973 }} 1974 #endif 1975 1976 int 1977 comintr(arg) 1978 void *arg; 1979 { 1980 struct com_softc *sc = arg; 1981 bus_space_tag_t iot = sc->sc_iot; 1982 bus_space_handle_t ioh = sc->sc_ioh; 1983 u_char *put, *end; 1984 u_int cc; 1985 u_char lsr, iir; 1986 1987 if (COM_ISALIVE(sc) == 0) 1988 return (0); 1989 1990 COM_LOCK(sc); 1991 iir = bus_space_read_1(iot, ioh, com_iir); 1992 if (ISSET(iir, IIR_NOPEND)) { 1993 COM_UNLOCK(sc); 1994 return (0); 1995 } 1996 1997 end = sc->sc_ebuf; 1998 put = sc->sc_rbput; 1999 cc = sc->sc_rbavail; 2000 2001 do { 2002 u_char msr, delta; 2003 2004 lsr = bus_space_read_1(iot, ioh, com_lsr); 2005 #if defined(DDB) || defined(KGDB) 2006 if (ISSET(lsr, LSR_BI)) { 2007 #ifndef DDB_BREAK_CHAR 2008 #ifdef DDB 2009 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2010 console_debugger(); 2011 continue; 2012 } 2013 #endif 2014 #ifdef KGDB 2015 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2016 kgdb_connect(1); 2017 continue; 2018 } 2019 #endif 2020 #endif 2021 } 2022 #endif /* DDB || KGDB */ 2023 2024 if (ISSET(lsr, LSR_RCV_MASK) && 2025 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2026 while (cc > 0) { 2027 put[0] = bus_space_read_1(iot, ioh, com_data); 2028 put[1] = lsr; 2029 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2030 if (put[0] == DDB_BREAK_CHAR && 2031 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2032 console_debugger(); 2033 2034 lsr = bus_space_read_1(iot, ioh, com_lsr); 2035 if (!ISSET(lsr, LSR_RCV_MASK)) 2036 break; 2037 2038 continue; 2039 } 2040 #endif 2041 put += 2; 2042 if (put >= end) 2043 put = sc->sc_rbuf; 2044 cc--; 2045 2046 lsr = bus_space_read_1(iot, ioh, com_lsr); 2047 if (!ISSET(lsr, LSR_RCV_MASK)) 2048 break; 2049 } 2050 2051 /* 2052 * Current string of incoming characters ended because 2053 * no more data was available or we ran out of space. 2054 * Schedule a receive event if any data was received. 2055 * If we're out of space, turn off receive interrupts. 2056 */ 2057 sc->sc_rbput = put; 2058 sc->sc_rbavail = cc; 2059 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2060 sc->sc_rx_ready = 1; 2061 2062 /* 2063 * See if we are in danger of overflowing a buffer. If 2064 * so, use hardware flow control to ease the pressure. 2065 */ 2066 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2067 cc < sc->sc_r_hiwat) { 2068 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2069 com_hwiflow(sc); 2070 } 2071 2072 /* 2073 * If we're out of space, disable receive interrupts 2074 * until the queue has drained a bit. 2075 */ 2076 if (!cc) { 2077 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2078 CLR(sc->sc_ier, IER_ERXRDY); 2079 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2080 } 2081 } else { 2082 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2083 bus_space_write_1(iot, ioh, com_ier, 0); 2084 delay(10); 2085 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2086 iir = IIR_NOPEND; 2087 continue; 2088 } 2089 } 2090 2091 msr = bus_space_read_1(iot, ioh, com_msr); 2092 delta = msr ^ sc->sc_msr; 2093 sc->sc_msr = msr; 2094 /* 2095 * Pulse-per-second (PSS) signals on edge of DCD? 2096 * Process these even if line discipline is ignoring DCD. 2097 */ 2098 if (delta & sc->sc_ppsmask) { 2099 struct timeval tv; 2100 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2101 /* XXX nanotime() */ 2102 microtime(&tv); 2103 TIMEVAL_TO_TIMESPEC(&tv, 2104 &sc->ppsinfo.assert_timestamp); 2105 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2106 timespecadd(&sc->ppsinfo.assert_timestamp, 2107 &sc->ppsparam.assert_offset, 2108 &sc->ppsinfo.assert_timestamp); 2109 } 2110 2111 #ifdef PPS_SYNC 2112 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2113 hardpps(&tv, tv.tv_usec); 2114 #endif 2115 sc->ppsinfo.assert_sequence++; 2116 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2117 2118 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2119 /* XXX nanotime() */ 2120 microtime(&tv); 2121 TIMEVAL_TO_TIMESPEC(&tv, 2122 &sc->ppsinfo.clear_timestamp); 2123 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2124 timespecadd(&sc->ppsinfo.clear_timestamp, 2125 &sc->ppsparam.clear_offset, 2126 &sc->ppsinfo.clear_timestamp); 2127 } 2128 2129 #ifdef PPS_SYNC 2130 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2131 hardpps(&tv, tv.tv_usec); 2132 #endif 2133 sc->ppsinfo.clear_sequence++; 2134 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2135 } 2136 } 2137 2138 /* 2139 * Process normal status changes 2140 */ 2141 if (ISSET(delta, sc->sc_msr_mask)) { 2142 SET(sc->sc_msr_delta, delta); 2143 2144 /* 2145 * Stop output immediately if we lose the output 2146 * flow control signal or carrier detect. 2147 */ 2148 if (ISSET(~msr, sc->sc_msr_mask)) { 2149 sc->sc_tbc = 0; 2150 sc->sc_heldtbc = 0; 2151 #ifdef COM_DEBUG 2152 if (com_debug) 2153 comstatus(sc, "comintr "); 2154 #endif 2155 } 2156 2157 sc->sc_st_check = 1; 2158 } 2159 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2160 2161 /* 2162 * Done handling any receive interrupts. See if data can be 2163 * transmitted as well. Schedule tx done event if no data left 2164 * and tty was marked busy. 2165 */ 2166 if (ISSET(lsr, LSR_TXRDY)) { 2167 /* 2168 * If we've delayed a parameter change, do it now, and restart 2169 * output. 2170 */ 2171 if (sc->sc_heldchange) { 2172 com_loadchannelregs(sc); 2173 sc->sc_heldchange = 0; 2174 sc->sc_tbc = sc->sc_heldtbc; 2175 sc->sc_heldtbc = 0; 2176 } 2177 2178 /* Output the next chunk of the contiguous buffer, if any. */ 2179 if (sc->sc_tbc > 0) { 2180 int n; 2181 2182 n = sc->sc_tbc; 2183 if (n > sc->sc_fifolen) 2184 n = sc->sc_fifolen; 2185 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2186 sc->sc_tbc -= n; 2187 sc->sc_tba += n; 2188 } else { 2189 /* Disable transmit completion interrupts if necessary. */ 2190 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2191 CLR(sc->sc_ier, IER_ETXRDY); 2192 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2193 } 2194 if (sc->sc_tx_busy) { 2195 sc->sc_tx_busy = 0; 2196 sc->sc_tx_done = 1; 2197 } 2198 } 2199 } 2200 COM_UNLOCK(sc); 2201 2202 /* Wake up the poller. */ 2203 #ifdef __GENERIC_SOFT_INTERRUPTS 2204 softintr_schedule(sc->sc_si); 2205 #else 2206 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2207 setsoftserial(); 2208 #else 2209 if (!com_softintr_scheduled) { 2210 com_softintr_scheduled = 1; 2211 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2212 } 2213 #endif 2214 #endif 2215 2216 #if NRND > 0 && defined(RND_COM) 2217 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2218 #endif 2219 2220 return (1); 2221 } 2222 2223 /* 2224 * The following functions are polled getc and putc routines, shared 2225 * by the console and kgdb glue. 2226 */ 2227 2228 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2229 #define MAX_UNGETC 20 2230 static int com_ungetc[MAX_UNGETC]; 2231 static int com_ungetccount = 0; 2232 #endif 2233 2234 int 2235 com_common_getc(iot, ioh) 2236 bus_space_tag_t iot; 2237 bus_space_handle_t ioh; 2238 { 2239 int s = splserial(); 2240 u_char stat, c; 2241 2242 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2243 /* got a character from reading things earlier */ 2244 if (com_ungetccount > 0) { 2245 int i; 2246 2247 c = com_ungetc[0]; 2248 for (i = 1; i < com_ungetccount; i++) { 2249 com_ungetc[i -1] = com_ungetc[i]; 2250 } 2251 com_ungetccount--; 2252 splx(s); 2253 return (c); 2254 } 2255 #endif 2256 2257 /* block until a character becomes available */ 2258 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2259 ; 2260 2261 c = bus_space_read_1(iot, ioh, com_data); 2262 stat = bus_space_read_1(iot, ioh, com_iir); 2263 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2264 if (c == DDB_BREAK_CHAR) { 2265 extern int db_active; 2266 2267 if (db_active == 0) { 2268 console_debugger(); 2269 } 2270 } 2271 #endif 2272 splx(s); 2273 return (c); 2274 } 2275 2276 void 2277 com_common_putc(iot, ioh, c) 2278 bus_space_tag_t iot; 2279 bus_space_handle_t ioh; 2280 int c; 2281 { 2282 int s = splserial(); 2283 int timo; 2284 2285 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2286 int cin, stat; 2287 if (com_ungetccount < MAX_UNGETC 2288 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2289 cin = bus_space_read_1(iot, ioh, com_data); 2290 stat = bus_space_read_1(iot, ioh, com_iir); 2291 if (cin == DDB_BREAK_CHAR) { 2292 console_debugger(); 2293 } 2294 com_ungetc[com_ungetccount++] = cin; 2295 } 2296 #endif 2297 2298 /* wait for any pending transmission to finish */ 2299 timo = 150000; 2300 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2301 continue; 2302 2303 bus_space_write_1(iot, ioh, com_data, c); 2304 COM_BARRIER(iot, ioh, BR | BW); 2305 2306 /* wait for this transmission to complete */ 2307 timo = 1500000; 2308 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2309 continue; 2310 2311 splx(s); 2312 } 2313 2314 /* 2315 * Initialize UART for use as console or KGDB line. 2316 */ 2317 int 2318 cominit(iot, iobase, rate, frequency, cflag, iohp) 2319 bus_space_tag_t iot; 2320 bus_addr_t iobase; 2321 int rate, frequency; 2322 tcflag_t cflag; 2323 bus_space_handle_t *iohp; 2324 { 2325 bus_space_handle_t ioh; 2326 2327 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2328 return (ENOMEM); /* ??? */ 2329 2330 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2331 bus_space_write_1(iot, ioh, com_efr, 0); 2332 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2333 rate = comspeed(rate, frequency); 2334 bus_space_write_1(iot, ioh, com_dlbl, rate); 2335 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2336 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2337 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2338 bus_space_write_1(iot, ioh, com_fifo, 2339 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2340 bus_space_write_1(iot, ioh, com_ier, 0); 2341 2342 *iohp = ioh; 2343 return (0); 2344 } 2345 2346 /* 2347 * Following are all routines needed for COM to act as console 2348 */ 2349 struct consdev comcons = { 2350 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2351 NODEV, CN_NORMAL 2352 }; 2353 2354 2355 int 2356 comcnattach(iot, iobase, rate, frequency, cflag) 2357 bus_space_tag_t iot; 2358 bus_addr_t iobase; 2359 int rate, frequency; 2360 tcflag_t cflag; 2361 { 2362 int res; 2363 2364 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2365 if (res) 2366 return (res); 2367 2368 cn_tab = &comcons; 2369 2370 comconstag = iot; 2371 comconsaddr = iobase; 2372 comconsrate = rate; 2373 comconscflag = cflag; 2374 2375 return (0); 2376 } 2377 2378 int 2379 comcngetc(dev) 2380 dev_t dev; 2381 { 2382 2383 return (com_common_getc(comconstag, comconsioh)); 2384 } 2385 2386 /* 2387 * Console kernel output character routine. 2388 */ 2389 void 2390 comcnputc(dev, c) 2391 dev_t dev; 2392 int c; 2393 { 2394 2395 com_common_putc(comconstag, comconsioh, c); 2396 } 2397 2398 void 2399 comcnpollc(dev, on) 2400 dev_t dev; 2401 int on; 2402 { 2403 2404 } 2405 2406 #ifdef KGDB 2407 int 2408 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2409 bus_space_tag_t iot; 2410 bus_addr_t iobase; 2411 int rate, frequency; 2412 tcflag_t cflag; 2413 { 2414 int res; 2415 2416 if (iot == comconstag && iobase == comconsaddr) 2417 return (EBUSY); /* cannot share with console */ 2418 2419 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2420 if (res) 2421 return (res); 2422 2423 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2424 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2425 2426 com_kgdb_iot = iot; 2427 com_kgdb_addr = iobase; 2428 2429 return (0); 2430 } 2431 2432 /* ARGSUSED */ 2433 int 2434 com_kgdb_getc(arg) 2435 void *arg; 2436 { 2437 2438 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2439 } 2440 2441 /* ARGSUSED */ 2442 void 2443 com_kgdb_putc(arg, c) 2444 void *arg; 2445 int c; 2446 { 2447 2448 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2449 } 2450 #endif /* KGDB */ 2451 2452 /* helper function to identify the com ports used by 2453 console or KGDB (and not yet autoconf attached) */ 2454 int 2455 com_is_console(iot, iobase, ioh) 2456 bus_space_tag_t iot; 2457 bus_addr_t iobase; 2458 bus_space_handle_t *ioh; 2459 { 2460 bus_space_handle_t help; 2461 2462 if (!comconsattached && 2463 iot == comconstag && iobase == comconsaddr) 2464 help = comconsioh; 2465 #ifdef KGDB 2466 else if (!com_kgdb_attached && 2467 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2468 help = com_kgdb_ioh; 2469 #endif 2470 else 2471 return (0); 2472 2473 if (ioh) 2474 *ioh = help; 2475 return (1); 2476 } 2477
Indexes created Thu Sep 25 16:09:42 GMT 2025