com.c revision 1.184
1 /* $NetBSD: com.c,v 1.184 2001/05/02 10:32:09 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 #if defined(__sparc__) || defined(__sparc_v9__) 75 #define DDB_BREAK_CHAR 1 /* L1 or Stop key */ 76 #endif 77 78 /* 79 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 80 * Supports automatic hardware flow control on StarTech ST16C650A UART 81 */ 82 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_com.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/ioctl.h> 95 #include <sys/select.h> 96 #include <sys/tty.h> 97 #include <sys/proc.h> 98 #include <sys/user.h> 99 #include <sys/conf.h> 100 #include <sys/file.h> 101 #include <sys/uio.h> 102 #include <sys/kernel.h> 103 #include <sys/syslog.h> 104 #include <sys/types.h> 105 #include <sys/device.h> 106 #include <sys/malloc.h> 107 #include <sys/timepps.h> 108 #include <sys/vnode.h> 109 110 #include <machine/intr.h> 111 #include <machine/bus.h> 112 113 #include <dev/ic/comreg.h> 114 #include <dev/ic/comvar.h> 115 #include <dev/ic/ns16550reg.h> 116 #include <dev/ic/st16650reg.h> 117 #ifdef COM_HAYESP 118 #include <dev/ic/hayespreg.h> 119 #endif 120 #define com_lcr com_cfcr 121 #include <dev/cons.h> 122 123 #include "com.h" 124 125 #ifdef COM_HAYESP 126 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 127 #endif 128 129 #if defined(DDB) || defined(KGDB) 130 static void com_enable_debugport __P((struct com_softc *)); 131 #endif 132 void com_config __P((struct com_softc *)); 133 void com_shutdown __P((struct com_softc *)); 134 int comspeed __P((long, long)); 135 static u_char cflag2lcr __P((tcflag_t)); 136 int comparam __P((struct tty *, struct termios *)); 137 void comstart __P((struct tty *)); 138 void comstop __P((struct tty *, int)); 139 int comhwiflow __P((struct tty *, int)); 140 141 void com_loadchannelregs __P((struct com_softc *)); 142 void com_hwiflow __P((struct com_softc *)); 143 void com_break __P((struct com_softc *, int)); 144 void com_modem __P((struct com_softc *, int)); 145 void tiocm_to_com __P((struct com_softc *, u_long, int)); 146 int com_to_tiocm __P((struct com_softc *)); 147 void com_iflush __P((struct com_softc *)); 148 149 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 150 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 151 152 /* XXX: These belong elsewhere */ 153 cdev_decl(com); 154 bdev_decl(com); 155 156 int comcngetc __P((dev_t)); 157 void comcnputc __P((dev_t, int)); 158 void comcnpollc __P((dev_t, int)); 159 160 #define integrate static inline 161 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 162 void comsoft __P((void *)); 163 #else 164 #ifndef __NO_SOFT_SERIAL_INTERRUPT 165 void comsoft __P((void)); 166 #else 167 void comsoft __P((void *)); 168 struct callout comsoft_callout = CALLOUT_INITIALIZER; 169 #endif 170 #endif 171 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 172 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 173 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 174 integrate void com_schedrx __P((struct com_softc *)); 175 void comdiag __P((void *)); 176 177 extern struct cfdriver com_cd; 178 179 /* 180 * Make this an option variable one can patch. 181 * But be warned: this must be a power of 2! 182 */ 183 u_int com_rbuf_size = COM_RING_SIZE; 184 185 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 186 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 187 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 188 189 static bus_addr_t comconsaddr; 190 static bus_space_tag_t comconstag; 191 static bus_space_handle_t comconsioh; 192 static int comconsattached; 193 static int comconsrate; 194 static tcflag_t comconscflag; 195 196 static int ppscap = 197 PPS_TSFMT_TSPEC | 198 PPS_CAPTUREASSERT | 199 PPS_CAPTURECLEAR | 200 #ifdef PPS_SYNC 201 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 202 #endif /* PPS_SYNC */ 203 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 204 205 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 206 #ifdef __NO_SOFT_SERIAL_INTERRUPT 207 volatile int com_softintr_scheduled; 208 #endif 209 #endif 210 211 #ifdef KGDB 212 #include <sys/kgdb.h> 213 214 static bus_addr_t com_kgdb_addr; 215 static bus_space_tag_t com_kgdb_iot; 216 static bus_space_handle_t com_kgdb_ioh; 217 static int com_kgdb_attached; 218 219 int com_kgdb_getc __P((void *)); 220 void com_kgdb_putc __P((void *, int)); 221 #endif /* KGDB */ 222 223 #define COMUNIT_MASK 0x7ffff 224 #define COMDIALOUT_MASK 0x80000 225 226 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 227 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 228 229 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 230 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 231 232 #define BR BUS_SPACE_BARRIER_READ 233 #define BW BUS_SPACE_BARRIER_WRITE 234 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 235 236 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 237 238 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 239 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 240 241 #else 242 243 #define COM_LOCK(sc) 244 #define COM_UNLOCK(sc) 245 246 #endif 247 248 int 249 comspeed(speed, frequency) 250 long speed, frequency; 251 { 252 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 253 254 int x, err; 255 256 #if 0 257 if (speed == 0) 258 return (0); 259 #endif 260 if (speed <= 0) 261 return (-1); 262 x = divrnd(frequency / 16, speed); 263 if (x <= 0) 264 return (-1); 265 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 266 if (err < 0) 267 err = -err; 268 if (err > COM_TOLERANCE) 269 return (-1); 270 return (x); 271 272 #undef divrnd 273 } 274 275 #ifdef COM_DEBUG 276 int com_debug = 0; 277 278 void comstatus __P((struct com_softc *, char *)); 279 void 280 comstatus(sc, str) 281 struct com_softc *sc; 282 char *str; 283 { 284 struct tty *tp = sc->sc_tty; 285 286 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 287 sc->sc_dev.dv_xname, str, 288 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 289 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 290 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 291 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 292 sc->sc_tx_stopped ? "+" : "-"); 293 294 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 295 sc->sc_dev.dv_xname, str, 296 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 297 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 298 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 299 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 300 sc->sc_rx_flags); 301 } 302 #endif 303 304 int 305 comprobe1(iot, ioh) 306 bus_space_tag_t iot; 307 bus_space_handle_t ioh; 308 { 309 310 /* force access to id reg */ 311 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 312 bus_space_write_1(iot, ioh, com_iir, 0); 313 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 314 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 315 return (0); 316 317 return (1); 318 } 319 320 #ifdef COM_HAYESP 321 int 322 comprobeHAYESP(hayespioh, sc) 323 bus_space_handle_t hayespioh; 324 struct com_softc *sc; 325 { 326 char val, dips; 327 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 328 bus_space_tag_t iot = sc->sc_iot; 329 330 /* 331 * Hayes ESP cards have two iobases. One is for compatibility with 332 * 16550 serial chips, and at the same ISA PC base addresses. The 333 * other is for ESP-specific enhanced features, and lies at a 334 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 335 */ 336 337 /* Test for ESP signature */ 338 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 339 return (0); 340 341 /* 342 * ESP is present at ESP enhanced base address; unknown com port 343 */ 344 345 /* Get the dip-switch configurations */ 346 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 347 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 348 349 /* Determine which com port this ESP card services: bits 0,1 of */ 350 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 351 if (sc->sc_iobase != combaselist[dips & 0x03]) 352 return (0); 353 354 printf(": ESP"); 355 356 /* Check ESP Self Test bits. */ 357 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 358 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 359 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 360 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 361 if ((val & 0x70) < 0x20) { 362 printf("-old (%o)", val & 0x70); 363 /* we do not support the necessary features */ 364 return (0); 365 } 366 367 /* Check for ability to emulate 16550: bit 8 == 1 */ 368 if ((dips & 0x80) == 0) { 369 printf(" slave"); 370 /* XXX Does slave really mean no 16550 support?? */ 371 return (0); 372 } 373 374 /* 375 * If we made it this far, we are a full-featured ESP v2.0 (or 376 * better), at the correct com port address. 377 */ 378 379 SET(sc->sc_hwflags, COM_HW_HAYESP); 380 printf(", 1024 byte fifo\n"); 381 return (1); 382 } 383 #endif 384 385 #if defined(DDB) || defined(KGDB) 386 static void 387 com_enable_debugport(sc) 388 struct com_softc *sc; 389 { 390 int s; 391 392 /* Turn on line break interrupt, set carrier. */ 393 s = splserial(); 394 COM_LOCK(sc); 395 sc->sc_ier = IER_ERXRDY; 396 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 397 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 398 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 399 COM_UNLOCK(sc); 400 splx(s); 401 } 402 #endif 403 404 void 405 com_attach_subr(sc) 406 struct com_softc *sc; 407 { 408 bus_addr_t iobase = sc->sc_iobase; 409 bus_space_tag_t iot = sc->sc_iot; 410 bus_space_handle_t ioh = sc->sc_ioh; 411 struct tty *tp; 412 #ifdef COM16650 413 u_int8_t lcr; 414 #endif 415 #ifdef COM_HAYESP 416 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 417 int *hayespp; 418 #endif 419 420 callout_init(&sc->sc_diag_callout); 421 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 422 simple_lock_init(&sc->sc_lock); 423 #endif 424 425 /* Disable interrupts before configuring the device. */ 426 sc->sc_ier = 0; 427 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 428 429 if (iot == comconstag && iobase == comconsaddr) { 430 comconsattached = 1; 431 432 /* Make sure the console is always "hardwired". */ 433 delay(1000); /* wait for output to finish */ 434 SET(sc->sc_hwflags, COM_HW_CONSOLE); 435 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 436 } 437 438 #ifdef COM_HAYESP 439 /* Look for a Hayes ESP board. */ 440 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 441 bus_space_handle_t hayespioh; 442 443 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 444 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 445 continue; 446 if (comprobeHAYESP(hayespioh, sc)) { 447 sc->sc_hayespioh = hayespioh; 448 sc->sc_fifolen = 1024; 449 450 break; 451 } 452 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 453 } 454 /* No ESP; look for other things. */ 455 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 456 #endif 457 sc->sc_fifolen = 1; 458 /* look for a NS 16550AF UART with FIFOs */ 459 bus_space_write_1(iot, ioh, com_fifo, 460 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 461 delay(100); 462 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 463 == IIR_FIFO_MASK) 464 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 465 == FIFO_TRIGGER_14) { 466 SET(sc->sc_hwflags, COM_HW_FIFO); 467 468 #ifdef COM16650 469 /* 470 * IIR changes into the EFR if LCR is set to LCR_EERS 471 * on 16650s. We also know IIR != 0 at this point. 472 * Write 0 into the EFR, and read it. If the result 473 * is 0, we have a 16650. 474 * 475 * Older 16650s were broken; the test to detect them 476 * is taken from the Linux driver. Apparently 477 * setting DLAB enable gives access to the EFR on 478 * these chips. 479 */ 480 lcr = bus_space_read_1(iot, ioh, com_lcr); 481 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 482 bus_space_write_1(iot, ioh, com_efr, 0); 483 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 484 bus_space_write_1(iot, ioh, com_lcr, 485 lcr | LCR_DLAB); 486 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 487 CLR(sc->sc_hwflags, COM_HW_FIFO); 488 sc->sc_fifolen = 0; 489 } else { 490 SET(sc->sc_hwflags, COM_HW_FLOW); 491 sc->sc_fifolen = 32; 492 } 493 } else 494 #endif 495 sc->sc_fifolen = 16; 496 497 #ifdef COM16650 498 bus_space_write_1(iot, ioh, com_lcr, lcr); 499 if (sc->sc_fifolen == 0) 500 printf(": st16650, broken fifo\n"); 501 else if (sc->sc_fifolen == 32) 502 printf(": st16650a, working fifo\n"); 503 else 504 #endif 505 printf(": ns16550a, working fifo\n"); 506 } else 507 printf(": ns16550, broken fifo\n"); 508 else 509 printf(": ns8250 or ns16450, no fifo\n"); 510 bus_space_write_1(iot, ioh, com_fifo, 0); 511 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 512 sc->sc_fifolen = 1; 513 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 514 } 515 #ifdef COM_HAYESP 516 } 517 #endif 518 519 tp = ttymalloc(); 520 tp->t_oproc = comstart; 521 tp->t_param = comparam; 522 tp->t_hwiflow = comhwiflow; 523 524 sc->sc_tty = tp; 525 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 526 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 527 sc->sc_rbavail = com_rbuf_size; 528 if (sc->sc_rbuf == NULL) { 529 printf("%s: unable to allocate ring buffer\n", 530 sc->sc_dev.dv_xname); 531 return; 532 } 533 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 534 535 tty_attach(tp); 536 537 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 538 SET(sc->sc_mcr, MCR_IENABLE); 539 540 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 541 int maj; 542 543 /* locate the major number */ 544 for (maj = 0; maj < nchrdev; maj++) 545 if (cdevsw[maj].d_open == comopen) 546 break; 547 548 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 549 550 printf("%s: console\n", sc->sc_dev.dv_xname); 551 } 552 553 #ifdef KGDB 554 /* 555 * Allow kgdb to "take over" this port. If this is 556 * the kgdb device, it has exclusive use. 557 */ 558 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 559 com_kgdb_attached = 1; 560 561 SET(sc->sc_hwflags, COM_HW_KGDB); 562 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 563 } 564 #endif 565 566 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 567 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 568 #endif 569 570 #if NRND > 0 && defined(RND_COM) 571 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 572 RND_TYPE_TTY, 0); 573 #endif 574 575 /* if there are no enable/disable functions, assume the device 576 is always enabled */ 577 if (!sc->enable) 578 sc->enabled = 1; 579 580 com_config(sc); 581 582 SET(sc->sc_hwflags, COM_HW_DEV_OK); 583 } 584 585 void 586 com_config(sc) 587 struct com_softc *sc; 588 { 589 bus_space_tag_t iot = sc->sc_iot; 590 bus_space_handle_t ioh = sc->sc_ioh; 591 592 /* Disable interrupts before configuring the device. */ 593 sc->sc_ier = 0; 594 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 595 596 #ifdef COM_HAYESP 597 /* Look for a Hayes ESP board. */ 598 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 599 sc->sc_fifolen = 1024; 600 601 /* Set 16550 compatibility mode */ 602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 603 HAYESP_SETMODE); 604 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 605 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 606 HAYESP_MODE_SCALE); 607 608 /* Set RTS/CTS flow control */ 609 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 610 HAYESP_SETFLOWTYPE); 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 612 HAYESP_FLOW_RTS); 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 614 HAYESP_FLOW_CTS); 615 616 /* Set flow control levels */ 617 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 618 HAYESP_SETRXFLOW); 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 620 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 622 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 624 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 626 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 627 } 628 #endif 629 630 #ifdef DDB 631 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 632 com_enable_debugport(sc); 633 #endif 634 635 #ifdef KGDB 636 /* 637 * Allow kgdb to "take over" this port. If this is 638 * the kgdb device, it has exclusive use. 639 */ 640 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 641 com_enable_debugport(sc); 642 #endif 643 } 644 645 int 646 com_detach(self, flags) 647 struct device *self; 648 int flags; 649 { 650 struct com_softc *sc = (struct com_softc *)self; 651 int maj, mn; 652 653 /* locate the major number */ 654 for (maj = 0; maj < nchrdev; maj++) 655 if (cdevsw[maj].d_open == comopen) 656 break; 657 658 /* Nuke the vnodes for any open instances. */ 659 mn = self->dv_unit; 660 vdevgone(maj, mn, mn, VCHR); 661 662 mn |= COMDIALOUT_MASK; 663 vdevgone(maj, mn, mn, VCHR); 664 665 /* Free the receive buffer. */ 666 free(sc->sc_rbuf, M_DEVBUF); 667 668 /* Detach and free the tty. */ 669 tty_detach(sc->sc_tty); 670 ttyfree(sc->sc_tty); 671 672 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 673 /* Unhook the soft interrupt handler. */ 674 softintr_disestablish(sc->sc_si); 675 #endif 676 677 #if NRND > 0 && defined(RND_COM) 678 /* Unhook the entropy source. */ 679 rnd_detach_source(&sc->rnd_source); 680 #endif 681 682 return (0); 683 } 684 685 int 686 com_activate(self, act) 687 struct device *self; 688 enum devact act; 689 { 690 struct com_softc *sc = (struct com_softc *)self; 691 int s, rv = 0; 692 693 s = splserial(); 694 COM_LOCK(sc); 695 switch (act) { 696 case DVACT_ACTIVATE: 697 rv = EOPNOTSUPP; 698 break; 699 700 case DVACT_DEACTIVATE: 701 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 702 rv = EBUSY; 703 break; 704 } 705 706 if (sc->disable != NULL && sc->enabled != 0) { 707 (*sc->disable)(sc); 708 sc->enabled = 0; 709 } 710 break; 711 } 712 713 COM_UNLOCK(sc); 714 splx(s); 715 return (rv); 716 } 717 718 void 719 com_shutdown(sc) 720 struct com_softc *sc; 721 { 722 struct tty *tp = sc->sc_tty; 723 int s; 724 725 s = splserial(); 726 COM_LOCK(sc); 727 728 /* If we were asserting flow control, then deassert it. */ 729 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 730 com_hwiflow(sc); 731 732 /* Clear any break condition set with TIOCSBRK. */ 733 com_break(sc, 0); 734 735 /* Turn off PPS capture on last close. */ 736 sc->sc_ppsmask = 0; 737 sc->ppsparam.mode = 0; 738 739 /* 740 * Hang up if necessary. Wait a bit, so the other side has time to 741 * notice even if we immediately open the port again. 742 * Avoid tsleeping above splhigh(). 743 */ 744 if (ISSET(tp->t_cflag, HUPCL)) { 745 com_modem(sc, 0); 746 COM_UNLOCK(sc); 747 splx(s); 748 /* XXX tsleep will only timeout */ 749 (void) tsleep(sc, TTIPRI, ttclos, hz); 750 s = splserial(); 751 COM_LOCK(sc); 752 } 753 754 /* Turn off interrupts. */ 755 #ifdef DDB 756 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 757 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 758 else 759 #endif 760 sc->sc_ier = 0; 761 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 762 763 if (sc->disable) { 764 #ifdef DIAGNOSTIC 765 if (!sc->enabled) 766 panic("com_shutdown: not enabled?"); 767 #endif 768 (*sc->disable)(sc); 769 sc->enabled = 0; 770 } 771 COM_UNLOCK(sc); 772 splx(s); 773 } 774 775 int 776 comopen(dev, flag, mode, p) 777 dev_t dev; 778 int flag, mode; 779 struct proc *p; 780 { 781 struct com_softc *sc; 782 struct tty *tp; 783 int s, s2; 784 int error; 785 786 sc = device_lookup(&com_cd, COMUNIT(dev)); 787 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 788 sc->sc_rbuf == NULL) 789 return (ENXIO); 790 791 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 792 return (ENXIO); 793 794 #ifdef KGDB 795 /* 796 * If this is the kgdb port, no other use is permitted. 797 */ 798 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 799 return (EBUSY); 800 #endif 801 802 tp = sc->sc_tty; 803 804 if (ISSET(tp->t_state, TS_ISOPEN) && 805 ISSET(tp->t_state, TS_XCLUDE) && 806 p->p_ucred->cr_uid != 0) 807 return (EBUSY); 808 809 s = spltty(); 810 811 /* 812 * Do the following iff this is a first open. 813 */ 814 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 815 struct termios t; 816 817 tp->t_dev = dev; 818 819 s2 = splserial(); 820 COM_LOCK(sc); 821 822 if (sc->enable) { 823 if ((*sc->enable)(sc)) { 824 COM_UNLOCK(sc); 825 splx(s2); 826 splx(s); 827 printf("%s: device enable failed\n", 828 sc->sc_dev.dv_xname); 829 return (EIO); 830 } 831 sc->enabled = 1; 832 com_config(sc); 833 } 834 835 /* Turn on interrupts. */ 836 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 837 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 838 839 /* Fetch the current modem control status, needed later. */ 840 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 841 842 /* Clear PPS capture state on first open. */ 843 sc->sc_ppsmask = 0; 844 sc->ppsparam.mode = 0; 845 846 COM_UNLOCK(sc); 847 splx(s2); 848 849 /* 850 * Initialize the termios status to the defaults. Add in the 851 * sticky bits from TIOCSFLAGS. 852 */ 853 t.c_ispeed = 0; 854 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 855 t.c_ospeed = comconsrate; 856 t.c_cflag = comconscflag; 857 } else { 858 t.c_ospeed = TTYDEF_SPEED; 859 t.c_cflag = TTYDEF_CFLAG; 860 } 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 862 SET(t.c_cflag, CLOCAL); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 864 SET(t.c_cflag, CRTSCTS); 865 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 866 SET(t.c_cflag, MDMBUF); 867 /* Make sure comparam() will do something. */ 868 tp->t_ospeed = 0; 869 (void) comparam(tp, &t); 870 tp->t_iflag = TTYDEF_IFLAG; 871 tp->t_oflag = TTYDEF_OFLAG; 872 tp->t_lflag = TTYDEF_LFLAG; 873 ttychars(tp); 874 ttsetwater(tp); 875 876 s2 = splserial(); 877 COM_LOCK(sc); 878 879 /* 880 * Turn on DTR. We must always do this, even if carrier is not 881 * present, because otherwise we'd have to use TIOCSDTR 882 * immediately after setting CLOCAL, which applications do not 883 * expect. We always assert DTR while the device is open 884 * unless explicitly requested to deassert it. 885 */ 886 com_modem(sc, 1); 887 888 /* Clear the input ring, and unblock. */ 889 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 890 sc->sc_rbavail = com_rbuf_size; 891 com_iflush(sc); 892 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 893 com_hwiflow(sc); 894 895 #ifdef COM_DEBUG 896 if (com_debug) 897 comstatus(sc, "comopen "); 898 #endif 899 900 COM_UNLOCK(sc); 901 splx(s2); 902 } 903 904 splx(s); 905 906 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 907 if (error) 908 goto bad; 909 910 error = (*tp->t_linesw->l_open)(dev, tp); 911 if (error) 912 goto bad; 913 914 return (0); 915 916 bad: 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * We failed to open the device, and nobody else had it opened. 920 * Clean up the state as appropriate. 921 */ 922 com_shutdown(sc); 923 } 924 925 return (error); 926 } 927 928 int 929 comclose(dev, flag, mode, p) 930 dev_t dev; 931 int flag, mode; 932 struct proc *p; 933 { 934 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 935 struct tty *tp = sc->sc_tty; 936 937 /* XXX This is for cons.c. */ 938 if (!ISSET(tp->t_state, TS_ISOPEN)) 939 return (0); 940 941 (*tp->t_linesw->l_close)(tp, flag); 942 ttyclose(tp); 943 944 if (COM_ISALIVE(sc) == 0) 945 return (0); 946 947 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 948 /* 949 * Although we got a last close, the device may still be in 950 * use; e.g. if this was the dialout node, and there are still 951 * processes waiting for carrier on the non-dialout node. 952 */ 953 com_shutdown(sc); 954 } 955 956 return (0); 957 } 958 959 int 960 comread(dev, uio, flag) 961 dev_t dev; 962 struct uio *uio; 963 int flag; 964 { 965 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 966 struct tty *tp = sc->sc_tty; 967 968 if (COM_ISALIVE(sc) == 0) 969 return (EIO); 970 971 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 972 } 973 974 int 975 comwrite(dev, uio, flag) 976 dev_t dev; 977 struct uio *uio; 978 int flag; 979 { 980 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 981 struct tty *tp = sc->sc_tty; 982 983 if (COM_ISALIVE(sc) == 0) 984 return (EIO); 985 986 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 987 } 988 989 int 990 compoll(dev, events, p) 991 dev_t dev; 992 int events; 993 struct proc *p; 994 { 995 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 996 struct tty *tp = sc->sc_tty; 997 998 if (COM_ISALIVE(sc) == 0) 999 return (EIO); 1000 1001 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1002 } 1003 1004 struct tty * 1005 comtty(dev) 1006 dev_t dev; 1007 { 1008 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1009 struct tty *tp = sc->sc_tty; 1010 1011 return (tp); 1012 } 1013 1014 int 1015 comioctl(dev, cmd, data, flag, p) 1016 dev_t dev; 1017 u_long cmd; 1018 caddr_t data; 1019 int flag; 1020 struct proc *p; 1021 { 1022 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1023 struct tty *tp = sc->sc_tty; 1024 int error; 1025 int s; 1026 1027 if (COM_ISALIVE(sc) == 0) 1028 return (EIO); 1029 1030 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1031 if (error >= 0) 1032 return (error); 1033 1034 error = ttioctl(tp, cmd, data, flag, p); 1035 if (error >= 0) 1036 return (error); 1037 1038 error = 0; 1039 1040 s = splserial(); 1041 COM_LOCK(sc); 1042 1043 switch (cmd) { 1044 case TIOCSBRK: 1045 com_break(sc, 1); 1046 break; 1047 1048 case TIOCCBRK: 1049 com_break(sc, 0); 1050 break; 1051 1052 case TIOCSDTR: 1053 com_modem(sc, 1); 1054 break; 1055 1056 case TIOCCDTR: 1057 com_modem(sc, 0); 1058 break; 1059 1060 case TIOCGFLAGS: 1061 *(int *)data = sc->sc_swflags; 1062 break; 1063 1064 case TIOCSFLAGS: 1065 error = suser(p->p_ucred, &p->p_acflag); 1066 if (error) 1067 break; 1068 sc->sc_swflags = *(int *)data; 1069 break; 1070 1071 case TIOCMSET: 1072 case TIOCMBIS: 1073 case TIOCMBIC: 1074 tiocm_to_com(sc, cmd, *(int *)data); 1075 break; 1076 1077 case TIOCMGET: 1078 *(int *)data = com_to_tiocm(sc); 1079 break; 1080 1081 case PPS_IOC_CREATE: 1082 break; 1083 1084 case PPS_IOC_DESTROY: 1085 break; 1086 1087 case PPS_IOC_GETPARAMS: { 1088 pps_params_t *pp; 1089 pp = (pps_params_t *)data; 1090 *pp = sc->ppsparam; 1091 break; 1092 } 1093 1094 case PPS_IOC_SETPARAMS: { 1095 pps_params_t *pp; 1096 int mode; 1097 pp = (pps_params_t *)data; 1098 if (pp->mode & ~ppscap) { 1099 error = EINVAL; 1100 break; 1101 } 1102 sc->ppsparam = *pp; 1103 /* 1104 * Compute msr masks from user-specified timestamp state. 1105 */ 1106 mode = sc->ppsparam.mode; 1107 #ifdef PPS_SYNC 1108 if (mode & PPS_HARDPPSONASSERT) { 1109 mode |= PPS_CAPTUREASSERT; 1110 /* XXX revoke any previous HARDPPS source */ 1111 } 1112 if (mode & PPS_HARDPPSONCLEAR) { 1113 mode |= PPS_CAPTURECLEAR; 1114 /* XXX revoke any previous HARDPPS source */ 1115 } 1116 #endif /* PPS_SYNC */ 1117 switch (mode & PPS_CAPTUREBOTH) { 1118 case 0: 1119 sc->sc_ppsmask = 0; 1120 break; 1121 1122 case PPS_CAPTUREASSERT: 1123 sc->sc_ppsmask = MSR_DCD; 1124 sc->sc_ppsassert = MSR_DCD; 1125 sc->sc_ppsclear = -1; 1126 break; 1127 1128 case PPS_CAPTURECLEAR: 1129 sc->sc_ppsmask = MSR_DCD; 1130 sc->sc_ppsassert = -1; 1131 sc->sc_ppsclear = 0; 1132 break; 1133 1134 case PPS_CAPTUREBOTH: 1135 sc->sc_ppsmask = MSR_DCD; 1136 sc->sc_ppsassert = MSR_DCD; 1137 sc->sc_ppsclear = 0; 1138 break; 1139 1140 default: 1141 error = EINVAL; 1142 break; 1143 } 1144 break; 1145 } 1146 1147 case PPS_IOC_GETCAP: 1148 *(int*)data = ppscap; 1149 break; 1150 1151 case PPS_IOC_FETCH: { 1152 pps_info_t *pi; 1153 pi = (pps_info_t *)data; 1154 *pi = sc->ppsinfo; 1155 break; 1156 } 1157 1158 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1159 /* 1160 * Some GPS clocks models use the falling rather than 1161 * rising edge as the on-the-second signal. 1162 * The old API has no way to specify PPS polarity. 1163 */ 1164 sc->sc_ppsmask = MSR_DCD; 1165 #ifndef PPS_TRAILING_EDGE 1166 sc->sc_ppsassert = MSR_DCD; 1167 sc->sc_ppsclear = -1; 1168 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1169 &sc->ppsinfo.assert_timestamp); 1170 #else 1171 sc->sc_ppsassert = -1 1172 sc->sc_ppsclear = 0; 1173 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1174 &sc->ppsinfo.clear_timestamp); 1175 #endif 1176 break; 1177 1178 default: 1179 error = ENOTTY; 1180 break; 1181 } 1182 1183 COM_UNLOCK(sc); 1184 splx(s); 1185 1186 #ifdef COM_DEBUG 1187 if (com_debug) 1188 comstatus(sc, "comioctl "); 1189 #endif 1190 1191 return (error); 1192 } 1193 1194 integrate void 1195 com_schedrx(sc) 1196 struct com_softc *sc; 1197 { 1198 1199 sc->sc_rx_ready = 1; 1200 1201 /* Wake up the poller. */ 1202 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1203 softintr_schedule(sc->sc_si); 1204 #else 1205 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1206 setsoftserial(); 1207 #else 1208 if (!com_softintr_scheduled) { 1209 com_softintr_scheduled = 1; 1210 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1211 } 1212 #endif 1213 #endif 1214 } 1215 1216 void 1217 com_break(sc, onoff) 1218 struct com_softc *sc; 1219 int onoff; 1220 { 1221 1222 if (onoff) 1223 SET(sc->sc_lcr, LCR_SBREAK); 1224 else 1225 CLR(sc->sc_lcr, LCR_SBREAK); 1226 1227 if (!sc->sc_heldchange) { 1228 if (sc->sc_tx_busy) { 1229 sc->sc_heldtbc = sc->sc_tbc; 1230 sc->sc_tbc = 0; 1231 sc->sc_heldchange = 1; 1232 } else 1233 com_loadchannelregs(sc); 1234 } 1235 } 1236 1237 void 1238 com_modem(sc, onoff) 1239 struct com_softc *sc; 1240 int onoff; 1241 { 1242 1243 if (sc->sc_mcr_dtr == 0) 1244 return; 1245 1246 if (onoff) 1247 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1248 else 1249 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1250 1251 if (!sc->sc_heldchange) { 1252 if (sc->sc_tx_busy) { 1253 sc->sc_heldtbc = sc->sc_tbc; 1254 sc->sc_tbc = 0; 1255 sc->sc_heldchange = 1; 1256 } else 1257 com_loadchannelregs(sc); 1258 } 1259 } 1260 1261 void 1262 tiocm_to_com(sc, how, ttybits) 1263 struct com_softc *sc; 1264 u_long how; 1265 int ttybits; 1266 { 1267 u_char combits; 1268 1269 combits = 0; 1270 if (ISSET(ttybits, TIOCM_DTR)) 1271 SET(combits, MCR_DTR); 1272 if (ISSET(ttybits, TIOCM_RTS)) 1273 SET(combits, MCR_RTS); 1274 1275 switch (how) { 1276 case TIOCMBIC: 1277 CLR(sc->sc_mcr, combits); 1278 break; 1279 1280 case TIOCMBIS: 1281 SET(sc->sc_mcr, combits); 1282 break; 1283 1284 case TIOCMSET: 1285 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1286 SET(sc->sc_mcr, combits); 1287 break; 1288 } 1289 1290 if (!sc->sc_heldchange) { 1291 if (sc->sc_tx_busy) { 1292 sc->sc_heldtbc = sc->sc_tbc; 1293 sc->sc_tbc = 0; 1294 sc->sc_heldchange = 1; 1295 } else 1296 com_loadchannelregs(sc); 1297 } 1298 } 1299 1300 int 1301 com_to_tiocm(sc) 1302 struct com_softc *sc; 1303 { 1304 u_char combits; 1305 int ttybits = 0; 1306 1307 combits = sc->sc_mcr; 1308 if (ISSET(combits, MCR_DTR)) 1309 SET(ttybits, TIOCM_DTR); 1310 if (ISSET(combits, MCR_RTS)) 1311 SET(ttybits, TIOCM_RTS); 1312 1313 combits = sc->sc_msr; 1314 if (ISSET(combits, MSR_DCD)) 1315 SET(ttybits, TIOCM_CD); 1316 if (ISSET(combits, MSR_CTS)) 1317 SET(ttybits, TIOCM_CTS); 1318 if (ISSET(combits, MSR_DSR)) 1319 SET(ttybits, TIOCM_DSR); 1320 if (ISSET(combits, MSR_RI | MSR_TERI)) 1321 SET(ttybits, TIOCM_RI); 1322 1323 if (sc->sc_ier != 0) 1324 SET(ttybits, TIOCM_LE); 1325 1326 return (ttybits); 1327 } 1328 1329 static u_char 1330 cflag2lcr(cflag) 1331 tcflag_t cflag; 1332 { 1333 u_char lcr = 0; 1334 1335 switch (ISSET(cflag, CSIZE)) { 1336 case CS5: 1337 SET(lcr, LCR_5BITS); 1338 break; 1339 case CS6: 1340 SET(lcr, LCR_6BITS); 1341 break; 1342 case CS7: 1343 SET(lcr, LCR_7BITS); 1344 break; 1345 case CS8: 1346 SET(lcr, LCR_8BITS); 1347 break; 1348 } 1349 if (ISSET(cflag, PARENB)) { 1350 SET(lcr, LCR_PENAB); 1351 if (!ISSET(cflag, PARODD)) 1352 SET(lcr, LCR_PEVEN); 1353 } 1354 if (ISSET(cflag, CSTOPB)) 1355 SET(lcr, LCR_STOPB); 1356 1357 return (lcr); 1358 } 1359 1360 int 1361 comparam(tp, t) 1362 struct tty *tp; 1363 struct termios *t; 1364 { 1365 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1366 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1367 u_char lcr; 1368 int s; 1369 1370 if (COM_ISALIVE(sc) == 0) 1371 return (EIO); 1372 1373 /* Check requested parameters. */ 1374 if (ospeed < 0) 1375 return (EINVAL); 1376 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1377 return (EINVAL); 1378 1379 /* 1380 * For the console, always force CLOCAL and !HUPCL, so that the port 1381 * is always active. 1382 */ 1383 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1384 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1385 SET(t->c_cflag, CLOCAL); 1386 CLR(t->c_cflag, HUPCL); 1387 } 1388 1389 /* 1390 * If there were no changes, don't do anything. This avoids dropping 1391 * input and improves performance when all we did was frob things like 1392 * VMIN and VTIME. 1393 */ 1394 if (tp->t_ospeed == t->c_ospeed && 1395 tp->t_cflag == t->c_cflag) 1396 return (0); 1397 1398 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1399 1400 s = splserial(); 1401 COM_LOCK(sc); 1402 1403 sc->sc_lcr = lcr; 1404 1405 /* 1406 * If we're not in a mode that assumes a connection is present, then 1407 * ignore carrier changes. 1408 */ 1409 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1410 sc->sc_msr_dcd = 0; 1411 else 1412 sc->sc_msr_dcd = MSR_DCD; 1413 /* 1414 * Set the flow control pins depending on the current flow control 1415 * mode. 1416 */ 1417 if (ISSET(t->c_cflag, CRTSCTS)) { 1418 sc->sc_mcr_dtr = MCR_DTR; 1419 sc->sc_mcr_rts = MCR_RTS; 1420 sc->sc_msr_cts = MSR_CTS; 1421 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1422 } else if (ISSET(t->c_cflag, MDMBUF)) { 1423 /* 1424 * For DTR/DCD flow control, make sure we don't toggle DTR for 1425 * carrier detection. 1426 */ 1427 sc->sc_mcr_dtr = 0; 1428 sc->sc_mcr_rts = MCR_DTR; 1429 sc->sc_msr_cts = MSR_DCD; 1430 sc->sc_efr = 0; 1431 } else { 1432 /* 1433 * If no flow control, then always set RTS. This will make 1434 * the other side happy if it mistakenly thinks we're doing 1435 * RTS/CTS flow control. 1436 */ 1437 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1438 sc->sc_mcr_rts = 0; 1439 sc->sc_msr_cts = 0; 1440 sc->sc_efr = 0; 1441 if (ISSET(sc->sc_mcr, MCR_DTR)) 1442 SET(sc->sc_mcr, MCR_RTS); 1443 else 1444 CLR(sc->sc_mcr, MCR_RTS); 1445 } 1446 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1447 1448 #if 0 1449 if (ospeed == 0) 1450 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1451 else 1452 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1453 #endif 1454 1455 sc->sc_dlbl = ospeed; 1456 sc->sc_dlbh = ospeed >> 8; 1457 1458 /* 1459 * Set the FIFO threshold based on the receive speed. 1460 * 1461 * * If it's a low speed, it's probably a mouse or some other 1462 * interactive device, so set the threshold low. 1463 * * If it's a high speed, trim the trigger level down to prevent 1464 * overflows. 1465 * * Otherwise set it a bit higher. 1466 */ 1467 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1468 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1469 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1470 sc->sc_fifo = FIFO_ENABLE | 1471 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1472 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1473 else 1474 sc->sc_fifo = 0; 1475 1476 /* And copy to tty. */ 1477 tp->t_ispeed = 0; 1478 tp->t_ospeed = t->c_ospeed; 1479 tp->t_cflag = t->c_cflag; 1480 1481 if (!sc->sc_heldchange) { 1482 if (sc->sc_tx_busy) { 1483 sc->sc_heldtbc = sc->sc_tbc; 1484 sc->sc_tbc = 0; 1485 sc->sc_heldchange = 1; 1486 } else 1487 com_loadchannelregs(sc); 1488 } 1489 1490 if (!ISSET(t->c_cflag, CHWFLOW)) { 1491 /* Disable the high water mark. */ 1492 sc->sc_r_hiwat = 0; 1493 sc->sc_r_lowat = 0; 1494 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1495 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1496 com_schedrx(sc); 1497 } 1498 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1499 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1500 com_hwiflow(sc); 1501 } 1502 } else { 1503 sc->sc_r_hiwat = com_rbuf_hiwat; 1504 sc->sc_r_lowat = com_rbuf_lowat; 1505 } 1506 1507 COM_UNLOCK(sc); 1508 splx(s); 1509 1510 /* 1511 * Update the tty layer's idea of the carrier bit, in case we changed 1512 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1513 * explicit request. 1514 */ 1515 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1516 1517 #ifdef COM_DEBUG 1518 if (com_debug) 1519 comstatus(sc, "comparam "); 1520 #endif 1521 1522 if (!ISSET(t->c_cflag, CHWFLOW)) { 1523 if (sc->sc_tx_stopped) { 1524 sc->sc_tx_stopped = 0; 1525 comstart(tp); 1526 } 1527 } 1528 1529 return (0); 1530 } 1531 1532 void 1533 com_iflush(sc) 1534 struct com_softc *sc; 1535 { 1536 bus_space_tag_t iot = sc->sc_iot; 1537 bus_space_handle_t ioh = sc->sc_ioh; 1538 #ifdef DIAGNOSTIC 1539 int reg; 1540 #endif 1541 int timo; 1542 1543 #ifdef DIAGNOSTIC 1544 reg = 0xffff; 1545 #endif 1546 timo = 50000; 1547 /* flush any pending I/O */ 1548 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1549 && --timo) 1550 #ifdef DIAGNOSTIC 1551 reg = 1552 #else 1553 (void) 1554 #endif 1555 bus_space_read_1(iot, ioh, com_data); 1556 #ifdef DIAGNOSTIC 1557 if (!timo) 1558 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1559 reg); 1560 #endif 1561 } 1562 1563 void 1564 com_loadchannelregs(sc) 1565 struct com_softc *sc; 1566 { 1567 bus_space_tag_t iot = sc->sc_iot; 1568 bus_space_handle_t ioh = sc->sc_ioh; 1569 1570 /* XXXXX necessary? */ 1571 com_iflush(sc); 1572 1573 bus_space_write_1(iot, ioh, com_ier, 0); 1574 1575 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1576 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1577 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1578 } 1579 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1580 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1581 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1582 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1583 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1584 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1585 1586 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1587 } 1588 1589 int 1590 comhwiflow(tp, block) 1591 struct tty *tp; 1592 int block; 1593 { 1594 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1595 int s; 1596 1597 if (COM_ISALIVE(sc) == 0) 1598 return (0); 1599 1600 if (sc->sc_mcr_rts == 0) 1601 return (0); 1602 1603 s = splserial(); 1604 COM_LOCK(sc); 1605 1606 if (block) { 1607 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1608 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1609 com_hwiflow(sc); 1610 } 1611 } else { 1612 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1613 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1614 com_schedrx(sc); 1615 } 1616 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1617 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1618 com_hwiflow(sc); 1619 } 1620 } 1621 1622 COM_UNLOCK(sc); 1623 splx(s); 1624 return (1); 1625 } 1626 1627 /* 1628 * (un)block input via hw flowcontrol 1629 */ 1630 void 1631 com_hwiflow(sc) 1632 struct com_softc *sc; 1633 { 1634 bus_space_tag_t iot = sc->sc_iot; 1635 bus_space_handle_t ioh = sc->sc_ioh; 1636 1637 if (sc->sc_mcr_rts == 0) 1638 return; 1639 1640 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1641 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1642 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1643 } else { 1644 SET(sc->sc_mcr, sc->sc_mcr_rts); 1645 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1646 } 1647 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1648 } 1649 1650 1651 void 1652 comstart(tp) 1653 struct tty *tp; 1654 { 1655 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1656 bus_space_tag_t iot = sc->sc_iot; 1657 bus_space_handle_t ioh = sc->sc_ioh; 1658 int s; 1659 1660 if (COM_ISALIVE(sc) == 0) 1661 return; 1662 1663 s = spltty(); 1664 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1665 goto out; 1666 if (sc->sc_tx_stopped) 1667 goto out; 1668 1669 if (tp->t_outq.c_cc <= tp->t_lowat) { 1670 if (ISSET(tp->t_state, TS_ASLEEP)) { 1671 CLR(tp->t_state, TS_ASLEEP); 1672 wakeup(&tp->t_outq); 1673 } 1674 selwakeup(&tp->t_wsel); 1675 if (tp->t_outq.c_cc == 0) 1676 goto out; 1677 } 1678 1679 /* Grab the first contiguous region of buffer space. */ 1680 { 1681 u_char *tba; 1682 int tbc; 1683 1684 tba = tp->t_outq.c_cf; 1685 tbc = ndqb(&tp->t_outq, 0); 1686 1687 (void)splserial(); 1688 COM_LOCK(sc); 1689 1690 sc->sc_tba = tba; 1691 sc->sc_tbc = tbc; 1692 } 1693 1694 SET(tp->t_state, TS_BUSY); 1695 sc->sc_tx_busy = 1; 1696 1697 /* Enable transmit completion interrupts if necessary. */ 1698 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1699 SET(sc->sc_ier, IER_ETXRDY); 1700 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1701 } 1702 1703 /* Output the first chunk of the contiguous buffer. */ 1704 { 1705 int n; 1706 1707 n = sc->sc_tbc; 1708 if (n > sc->sc_fifolen) 1709 n = sc->sc_fifolen; 1710 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1711 sc->sc_tbc -= n; 1712 sc->sc_tba += n; 1713 } 1714 COM_UNLOCK(sc); 1715 out: 1716 splx(s); 1717 return; 1718 } 1719 1720 /* 1721 * Stop output on a line. 1722 */ 1723 void 1724 comstop(tp, flag) 1725 struct tty *tp; 1726 int flag; 1727 { 1728 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1729 int s; 1730 1731 s = splserial(); 1732 COM_LOCK(sc); 1733 if (ISSET(tp->t_state, TS_BUSY)) { 1734 /* Stop transmitting at the next chunk. */ 1735 sc->sc_tbc = 0; 1736 sc->sc_heldtbc = 0; 1737 if (!ISSET(tp->t_state, TS_TTSTOP)) 1738 SET(tp->t_state, TS_FLUSH); 1739 } 1740 COM_UNLOCK(sc); 1741 splx(s); 1742 } 1743 1744 void 1745 comdiag(arg) 1746 void *arg; 1747 { 1748 struct com_softc *sc = arg; 1749 int overflows, floods; 1750 int s; 1751 1752 s = splserial(); 1753 COM_LOCK(sc); 1754 overflows = sc->sc_overflows; 1755 sc->sc_overflows = 0; 1756 floods = sc->sc_floods; 1757 sc->sc_floods = 0; 1758 sc->sc_errors = 0; 1759 COM_UNLOCK(sc); 1760 splx(s); 1761 1762 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1763 sc->sc_dev.dv_xname, 1764 overflows, overflows == 1 ? "" : "s", 1765 floods, floods == 1 ? "" : "s"); 1766 } 1767 1768 integrate void 1769 com_rxsoft(sc, tp) 1770 struct com_softc *sc; 1771 struct tty *tp; 1772 { 1773 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1774 u_char *get, *end; 1775 u_int cc, scc; 1776 u_char lsr; 1777 int code; 1778 int s; 1779 1780 end = sc->sc_ebuf; 1781 get = sc->sc_rbget; 1782 scc = cc = com_rbuf_size - sc->sc_rbavail; 1783 1784 if (cc == com_rbuf_size) { 1785 sc->sc_floods++; 1786 if (sc->sc_errors++ == 0) 1787 callout_reset(&sc->sc_diag_callout, 60 * hz, 1788 comdiag, sc); 1789 } 1790 1791 while (cc) { 1792 code = get[0]; 1793 lsr = get[1]; 1794 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1795 if (ISSET(lsr, LSR_OE)) { 1796 sc->sc_overflows++; 1797 if (sc->sc_errors++ == 0) 1798 callout_reset(&sc->sc_diag_callout, 1799 60 * hz, comdiag, sc); 1800 } 1801 if (ISSET(lsr, LSR_BI | LSR_FE)) 1802 SET(code, TTY_FE); 1803 if (ISSET(lsr, LSR_PE)) 1804 SET(code, TTY_PE); 1805 } 1806 if ((*rint)(code, tp) == -1) { 1807 /* 1808 * The line discipline's buffer is out of space. 1809 */ 1810 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1811 /* 1812 * We're either not using flow control, or the 1813 * line discipline didn't tell us to block for 1814 * some reason. Either way, we have no way to 1815 * know when there's more space available, so 1816 * just drop the rest of the data. 1817 */ 1818 get += cc << 1; 1819 if (get >= end) 1820 get -= com_rbuf_size << 1; 1821 cc = 0; 1822 } else { 1823 /* 1824 * Don't schedule any more receive processing 1825 * until the line discipline tells us there's 1826 * space available (through comhwiflow()). 1827 * Leave the rest of the data in the input 1828 * buffer. 1829 */ 1830 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1831 } 1832 break; 1833 } 1834 get += 2; 1835 if (get >= end) 1836 get = sc->sc_rbuf; 1837 cc--; 1838 } 1839 1840 if (cc != scc) { 1841 sc->sc_rbget = get; 1842 s = splserial(); 1843 COM_LOCK(sc); 1844 1845 cc = sc->sc_rbavail += scc - cc; 1846 /* Buffers should be ok again, release possible block. */ 1847 if (cc >= sc->sc_r_lowat) { 1848 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1849 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1850 SET(sc->sc_ier, IER_ERXRDY); 1851 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1852 } 1853 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1854 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1855 com_hwiflow(sc); 1856 } 1857 } 1858 COM_UNLOCK(sc); 1859 splx(s); 1860 } 1861 } 1862 1863 integrate void 1864 com_txsoft(sc, tp) 1865 struct com_softc *sc; 1866 struct tty *tp; 1867 { 1868 1869 CLR(tp->t_state, TS_BUSY); 1870 if (ISSET(tp->t_state, TS_FLUSH)) 1871 CLR(tp->t_state, TS_FLUSH); 1872 else 1873 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1874 (*tp->t_linesw->l_start)(tp); 1875 } 1876 1877 integrate void 1878 com_stsoft(sc, tp) 1879 struct com_softc *sc; 1880 struct tty *tp; 1881 { 1882 u_char msr, delta; 1883 int s; 1884 1885 s = splserial(); 1886 COM_LOCK(sc); 1887 msr = sc->sc_msr; 1888 delta = sc->sc_msr_delta; 1889 sc->sc_msr_delta = 0; 1890 COM_UNLOCK(sc); 1891 splx(s); 1892 1893 if (ISSET(delta, sc->sc_msr_dcd)) { 1894 /* 1895 * Inform the tty layer that carrier detect changed. 1896 */ 1897 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1898 } 1899 1900 if (ISSET(delta, sc->sc_msr_cts)) { 1901 /* Block or unblock output according to flow control. */ 1902 if (ISSET(msr, sc->sc_msr_cts)) { 1903 sc->sc_tx_stopped = 0; 1904 (*tp->t_linesw->l_start)(tp); 1905 } else { 1906 sc->sc_tx_stopped = 1; 1907 } 1908 } 1909 1910 #ifdef COM_DEBUG 1911 if (com_debug) 1912 comstatus(sc, "com_stsoft"); 1913 #endif 1914 } 1915 1916 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1917 void 1918 comsoft(arg) 1919 void *arg; 1920 { 1921 struct com_softc *sc = arg; 1922 struct tty *tp; 1923 1924 if (COM_ISALIVE(sc) == 0) 1925 return; 1926 1927 { 1928 #else 1929 void 1930 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1931 comsoft() 1932 #else 1933 comsoft(arg) 1934 void *arg; 1935 #endif 1936 { 1937 struct com_softc *sc; 1938 struct tty *tp; 1939 int unit; 1940 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1941 int s; 1942 1943 s = splsoftserial(); 1944 com_softintr_scheduled = 0; 1945 #endif 1946 1947 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1948 sc = device_lookup(&com_cd, unit); 1949 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1950 continue; 1951 1952 if (COM_ISALIVE(sc) == 0) 1953 continue; 1954 1955 tp = sc->sc_tty; 1956 if (tp == NULL) 1957 continue; 1958 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1959 continue; 1960 #endif 1961 tp = sc->sc_tty; 1962 1963 if (sc->sc_rx_ready) { 1964 sc->sc_rx_ready = 0; 1965 com_rxsoft(sc, tp); 1966 } 1967 1968 if (sc->sc_st_check) { 1969 sc->sc_st_check = 0; 1970 com_stsoft(sc, tp); 1971 } 1972 1973 if (sc->sc_tx_done) { 1974 sc->sc_tx_done = 0; 1975 com_txsoft(sc, tp); 1976 } 1977 } 1978 1979 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1980 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1981 splx(s); 1982 #endif 1983 #endif 1984 } 1985 1986 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1987 /* there has got to be a better way to do comsoft() */ 1988 }} 1989 #endif 1990 1991 int 1992 comintr(arg) 1993 void *arg; 1994 { 1995 struct com_softc *sc = arg; 1996 bus_space_tag_t iot = sc->sc_iot; 1997 bus_space_handle_t ioh = sc->sc_ioh; 1998 u_char *put, *end; 1999 u_int cc; 2000 u_char lsr, iir; 2001 2002 if (COM_ISALIVE(sc) == 0) 2003 return (0); 2004 2005 COM_LOCK(sc); 2006 iir = bus_space_read_1(iot, ioh, com_iir); 2007 if (ISSET(iir, IIR_NOPEND)) { 2008 COM_UNLOCK(sc); 2009 return (0); 2010 } 2011 2012 end = sc->sc_ebuf; 2013 put = sc->sc_rbput; 2014 cc = sc->sc_rbavail; 2015 2016 do { 2017 u_char msr, delta; 2018 2019 lsr = bus_space_read_1(iot, ioh, com_lsr); 2020 #if defined(DDB) || defined(KGDB) 2021 if (ISSET(lsr, LSR_BI)) { 2022 #ifndef DDB_BREAK_CHAR 2023 #ifdef DDB 2024 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2025 console_debugger(); 2026 continue; 2027 } 2028 #endif 2029 #ifdef KGDB 2030 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2031 kgdb_connect(1); 2032 continue; 2033 } 2034 #endif 2035 #endif 2036 } 2037 #endif /* DDB || KGDB */ 2038 2039 if (ISSET(lsr, LSR_RCV_MASK) && 2040 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2041 while (cc > 0) { 2042 put[0] = bus_space_read_1(iot, ioh, com_data); 2043 put[1] = lsr; 2044 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2045 if (put[0] == DDB_BREAK_CHAR && 2046 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 2047 console_debugger(); 2048 2049 lsr = bus_space_read_1(iot, ioh, com_lsr); 2050 if (!ISSET(lsr, LSR_RCV_MASK)) 2051 break; 2052 2053 continue; 2054 } 2055 #endif 2056 put += 2; 2057 if (put >= end) 2058 put = sc->sc_rbuf; 2059 cc--; 2060 2061 lsr = bus_space_read_1(iot, ioh, com_lsr); 2062 if (!ISSET(lsr, LSR_RCV_MASK)) 2063 break; 2064 } 2065 2066 /* 2067 * Current string of incoming characters ended because 2068 * no more data was available or we ran out of space. 2069 * Schedule a receive event if any data was received. 2070 * If we're out of space, turn off receive interrupts. 2071 */ 2072 sc->sc_rbput = put; 2073 sc->sc_rbavail = cc; 2074 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2075 sc->sc_rx_ready = 1; 2076 2077 /* 2078 * See if we are in danger of overflowing a buffer. If 2079 * so, use hardware flow control to ease the pressure. 2080 */ 2081 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2082 cc < sc->sc_r_hiwat) { 2083 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2084 com_hwiflow(sc); 2085 } 2086 2087 /* 2088 * If we're out of space, disable receive interrupts 2089 * until the queue has drained a bit. 2090 */ 2091 if (!cc) { 2092 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2093 CLR(sc->sc_ier, IER_ERXRDY); 2094 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2095 } 2096 } else { 2097 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2098 bus_space_write_1(iot, ioh, com_ier, 0); 2099 delay(10); 2100 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2101 iir = IIR_NOPEND; 2102 continue; 2103 } 2104 } 2105 2106 msr = bus_space_read_1(iot, ioh, com_msr); 2107 delta = msr ^ sc->sc_msr; 2108 sc->sc_msr = msr; 2109 /* 2110 * Pulse-per-second (PSS) signals on edge of DCD? 2111 * Process these even if line discipline is ignoring DCD. 2112 */ 2113 if (delta & sc->sc_ppsmask) { 2114 struct timeval tv; 2115 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2116 /* XXX nanotime() */ 2117 microtime(&tv); 2118 TIMEVAL_TO_TIMESPEC(&tv, 2119 &sc->ppsinfo.assert_timestamp); 2120 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2121 timespecadd(&sc->ppsinfo.assert_timestamp, 2122 &sc->ppsparam.assert_offset, 2123 &sc->ppsinfo.assert_timestamp); 2124 } 2125 2126 #ifdef PPS_SYNC 2127 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2128 hardpps(&tv, tv.tv_usec); 2129 #endif 2130 sc->ppsinfo.assert_sequence++; 2131 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2132 2133 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2134 /* XXX nanotime() */ 2135 microtime(&tv); 2136 TIMEVAL_TO_TIMESPEC(&tv, 2137 &sc->ppsinfo.clear_timestamp); 2138 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2139 timespecadd(&sc->ppsinfo.clear_timestamp, 2140 &sc->ppsparam.clear_offset, 2141 &sc->ppsinfo.clear_timestamp); 2142 } 2143 2144 #ifdef PPS_SYNC 2145 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2146 hardpps(&tv, tv.tv_usec); 2147 #endif 2148 sc->ppsinfo.clear_sequence++; 2149 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2150 } 2151 } 2152 2153 /* 2154 * Process normal status changes 2155 */ 2156 if (ISSET(delta, sc->sc_msr_mask)) { 2157 SET(sc->sc_msr_delta, delta); 2158 2159 /* 2160 * Stop output immediately if we lose the output 2161 * flow control signal or carrier detect. 2162 */ 2163 if (ISSET(~msr, sc->sc_msr_mask)) { 2164 sc->sc_tbc = 0; 2165 sc->sc_heldtbc = 0; 2166 #ifdef COM_DEBUG 2167 if (com_debug) 2168 comstatus(sc, "comintr "); 2169 #endif 2170 } 2171 2172 sc->sc_st_check = 1; 2173 } 2174 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2175 2176 /* 2177 * Done handling any receive interrupts. See if data can be 2178 * transmitted as well. Schedule tx done event if no data left 2179 * and tty was marked busy. 2180 */ 2181 if (ISSET(lsr, LSR_TXRDY)) { 2182 /* 2183 * If we've delayed a parameter change, do it now, and restart 2184 * output. 2185 */ 2186 if (sc->sc_heldchange) { 2187 com_loadchannelregs(sc); 2188 sc->sc_heldchange = 0; 2189 sc->sc_tbc = sc->sc_heldtbc; 2190 sc->sc_heldtbc = 0; 2191 } 2192 2193 /* Output the next chunk of the contiguous buffer, if any. */ 2194 if (sc->sc_tbc > 0) { 2195 int n; 2196 2197 n = sc->sc_tbc; 2198 if (n > sc->sc_fifolen) 2199 n = sc->sc_fifolen; 2200 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2201 sc->sc_tbc -= n; 2202 sc->sc_tba += n; 2203 } else { 2204 /* Disable transmit completion interrupts if necessary. */ 2205 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2206 CLR(sc->sc_ier, IER_ETXRDY); 2207 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2208 } 2209 if (sc->sc_tx_busy) { 2210 sc->sc_tx_busy = 0; 2211 sc->sc_tx_done = 1; 2212 } 2213 } 2214 } 2215 COM_UNLOCK(sc); 2216 2217 /* Wake up the poller. */ 2218 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2219 softintr_schedule(sc->sc_si); 2220 #else 2221 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2222 setsoftserial(); 2223 #else 2224 if (!com_softintr_scheduled) { 2225 com_softintr_scheduled = 1; 2226 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2227 } 2228 #endif 2229 #endif 2230 2231 #if NRND > 0 && defined(RND_COM) 2232 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2233 #endif 2234 2235 return (1); 2236 } 2237 2238 /* 2239 * The following functions are polled getc and putc routines, shared 2240 * by the console and kgdb glue. 2241 */ 2242 2243 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2244 #define MAX_UNGETC 20 2245 static int com_ungetc[MAX_UNGETC]; 2246 static int com_ungetccount = 0; 2247 #endif 2248 2249 int 2250 com_common_getc(iot, ioh) 2251 bus_space_tag_t iot; 2252 bus_space_handle_t ioh; 2253 { 2254 int s = splserial(); 2255 u_char stat, c; 2256 2257 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2258 /* got a character from reading things earlier */ 2259 if (com_ungetccount > 0) { 2260 int i; 2261 2262 c = com_ungetc[0]; 2263 for (i = 1; i < com_ungetccount; i++) { 2264 com_ungetc[i -1] = com_ungetc[i]; 2265 } 2266 com_ungetccount--; 2267 splx(s); 2268 return (c); 2269 } 2270 #endif 2271 2272 /* block until a character becomes available */ 2273 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2274 ; 2275 2276 c = bus_space_read_1(iot, ioh, com_data); 2277 stat = bus_space_read_1(iot, ioh, com_iir); 2278 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2279 if (c == DDB_BREAK_CHAR) { 2280 extern int db_active; 2281 2282 if (db_active == 0) { 2283 console_debugger(); 2284 } 2285 } 2286 #endif 2287 splx(s); 2288 return (c); 2289 } 2290 2291 void 2292 com_common_putc(iot, ioh, c) 2293 bus_space_tag_t iot; 2294 bus_space_handle_t ioh; 2295 int c; 2296 { 2297 int s = splserial(); 2298 int timo; 2299 2300 #if defined(DDB) && defined(DDB_BREAK_CHAR) 2301 int cin, stat; 2302 if (com_ungetccount < MAX_UNGETC 2303 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2304 cin = bus_space_read_1(iot, ioh, com_data); 2305 stat = bus_space_read_1(iot, ioh, com_iir); 2306 if (cin == DDB_BREAK_CHAR) { 2307 console_debugger(); 2308 } 2309 com_ungetc[com_ungetccount++] = cin; 2310 } 2311 #endif 2312 2313 /* wait for any pending transmission to finish */ 2314 timo = 150000; 2315 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2316 continue; 2317 2318 bus_space_write_1(iot, ioh, com_data, c); 2319 COM_BARRIER(iot, ioh, BR | BW); 2320 2321 /* wait for this transmission to complete */ 2322 timo = 1500000; 2323 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2324 continue; 2325 2326 splx(s); 2327 } 2328 2329 /* 2330 * Initialize UART for use as console or KGDB line. 2331 */ 2332 int 2333 cominit(iot, iobase, rate, frequency, cflag, iohp) 2334 bus_space_tag_t iot; 2335 bus_addr_t iobase; 2336 int rate, frequency; 2337 tcflag_t cflag; 2338 bus_space_handle_t *iohp; 2339 { 2340 bus_space_handle_t ioh; 2341 2342 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2343 return (ENOMEM); /* ??? */ 2344 2345 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2346 bus_space_write_1(iot, ioh, com_efr, 0); 2347 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2348 rate = comspeed(rate, frequency); 2349 bus_space_write_1(iot, ioh, com_dlbl, rate); 2350 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2351 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2352 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2353 bus_space_write_1(iot, ioh, com_fifo, 2354 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2355 bus_space_write_1(iot, ioh, com_ier, 0); 2356 2357 *iohp = ioh; 2358 return (0); 2359 } 2360 2361 /* 2362 * Following are all routines needed for COM to act as console 2363 */ 2364 struct consdev comcons = { 2365 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2366 NODEV, CN_NORMAL 2367 }; 2368 2369 2370 int 2371 comcnattach(iot, iobase, rate, frequency, cflag) 2372 bus_space_tag_t iot; 2373 bus_addr_t iobase; 2374 int rate, frequency; 2375 tcflag_t cflag; 2376 { 2377 int res; 2378 2379 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2380 if (res) 2381 return (res); 2382 2383 cn_tab = &comcons; 2384 2385 comconstag = iot; 2386 comconsaddr = iobase; 2387 comconsrate = rate; 2388 comconscflag = cflag; 2389 2390 return (0); 2391 } 2392 2393 int 2394 comcngetc(dev) 2395 dev_t dev; 2396 { 2397 2398 return (com_common_getc(comconstag, comconsioh)); 2399 } 2400 2401 /* 2402 * Console kernel output character routine. 2403 */ 2404 void 2405 comcnputc(dev, c) 2406 dev_t dev; 2407 int c; 2408 { 2409 2410 com_common_putc(comconstag, comconsioh, c); 2411 } 2412 2413 void 2414 comcnpollc(dev, on) 2415 dev_t dev; 2416 int on; 2417 { 2418 2419 } 2420 2421 #ifdef KGDB 2422 int 2423 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2424 bus_space_tag_t iot; 2425 bus_addr_t iobase; 2426 int rate, frequency; 2427 tcflag_t cflag; 2428 { 2429 int res; 2430 2431 if (iot == comconstag && iobase == comconsaddr) 2432 return (EBUSY); /* cannot share with console */ 2433 2434 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2435 if (res) 2436 return (res); 2437 2438 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2439 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2440 2441 com_kgdb_iot = iot; 2442 com_kgdb_addr = iobase; 2443 2444 return (0); 2445 } 2446 2447 /* ARGSUSED */ 2448 int 2449 com_kgdb_getc(arg) 2450 void *arg; 2451 { 2452 2453 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2454 } 2455 2456 /* ARGSUSED */ 2457 void 2458 com_kgdb_putc(arg, c) 2459 void *arg; 2460 int c; 2461 { 2462 2463 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2464 } 2465 #endif /* KGDB */ 2466 2467 /* helper function to identify the com ports used by 2468 console or KGDB (and not yet autoconf attached) */ 2469 int 2470 com_is_console(iot, iobase, ioh) 2471 bus_space_tag_t iot; 2472 bus_addr_t iobase; 2473 bus_space_handle_t *ioh; 2474 { 2475 bus_space_handle_t help; 2476 2477 if (!comconsattached && 2478 iot == comconstag && iobase == comconsaddr) 2479 help = comconsioh; 2480 #ifdef KGDB 2481 else if (!com_kgdb_attached && 2482 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2483 help = com_kgdb_ioh; 2484 #endif 2485 else 2486 return (0); 2487 2488 if (ioh) 2489 *ioh = help; 2490 return (1); 2491 } 2492
Indexes created Thu Sep 25 16:09:42 GMT 2025