com.c revision 1.186
1 /* $NetBSD: com.c,v 1.186 2001/06/20 03:07:25 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_com.h" 80 #include "opt_ddb.h" 81 #include "opt_ddbparam.h" 82 #include "opt_kgdb.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/types.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 119 #include <machine/intr.h> 120 #include <machine/bus.h> 121 122 #include <dev/ic/comreg.h> 123 #include <dev/ic/comvar.h> 124 #include <dev/ic/ns16550reg.h> 125 #include <dev/ic/st16650reg.h> 126 #ifdef COM_HAYESP 127 #include <dev/ic/hayespreg.h> 128 #endif 129 #define com_lcr com_cfcr 130 #include <dev/cons.h> 131 132 #include "com.h" 133 134 #ifdef COM_HAYESP 135 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 136 #endif 137 138 static void com_enable_debugport __P((struct com_softc *)); 139 140 void com_config __P((struct com_softc *)); 141 void com_shutdown __P((struct com_softc *)); 142 int comspeed __P((long, long)); 143 static u_char cflag2lcr __P((tcflag_t)); 144 int comparam __P((struct tty *, struct termios *)); 145 void comstart __P((struct tty *)); 146 void comstop __P((struct tty *, int)); 147 int comhwiflow __P((struct tty *, int)); 148 149 void com_loadchannelregs __P((struct com_softc *)); 150 void com_hwiflow __P((struct com_softc *)); 151 void com_break __P((struct com_softc *, int)); 152 void com_modem __P((struct com_softc *, int)); 153 void tiocm_to_com __P((struct com_softc *, u_long, int)); 154 int com_to_tiocm __P((struct com_softc *)); 155 void com_iflush __P((struct com_softc *)); 156 157 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 158 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 159 160 /* XXX: These belong elsewhere */ 161 cdev_decl(com); 162 bdev_decl(com); 163 164 int comcngetc __P((dev_t)); 165 void comcnputc __P((dev_t, int)); 166 void comcnpollc __P((dev_t, int)); 167 168 #define integrate static inline 169 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 170 void comsoft __P((void *)); 171 #else 172 #ifndef __NO_SOFT_SERIAL_INTERRUPT 173 void comsoft __P((void)); 174 #else 175 void comsoft __P((void *)); 176 struct callout comsoft_callout = CALLOUT_INITIALIZER; 177 #endif 178 #endif 179 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_schedrx __P((struct com_softc *)); 183 void comdiag __P((void *)); 184 185 extern struct cfdriver com_cd; 186 187 /* 188 * Make this an option variable one can patch. 189 * But be warned: this must be a power of 2! 190 */ 191 u_int com_rbuf_size = COM_RING_SIZE; 192 193 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 194 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 195 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 196 197 static bus_addr_t comconsaddr; 198 static bus_space_tag_t comconstag; 199 static bus_space_handle_t comconsioh; 200 static int comconsattached; 201 static int comconsrate; 202 static tcflag_t comconscflag; 203 static struct cnm_state com_cnm_state; 204 205 static int ppscap = 206 PPS_TSFMT_TSPEC | 207 PPS_CAPTUREASSERT | 208 PPS_CAPTURECLEAR | 209 #ifdef PPS_SYNC 210 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 211 #endif /* PPS_SYNC */ 212 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 213 214 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 215 #ifdef __NO_SOFT_SERIAL_INTERRUPT 216 volatile int com_softintr_scheduled; 217 #endif 218 #endif 219 220 #ifdef KGDB 221 #include <sys/kgdb.h> 222 223 static bus_addr_t com_kgdb_addr; 224 static bus_space_tag_t com_kgdb_iot; 225 static bus_space_handle_t com_kgdb_ioh; 226 static int com_kgdb_attached; 227 228 int com_kgdb_getc __P((void *)); 229 void com_kgdb_putc __P((void *, int)); 230 #endif /* KGDB */ 231 232 #define COMUNIT_MASK 0x7ffff 233 #define COMDIALOUT_MASK 0x80000 234 235 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 236 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 237 238 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 239 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 240 241 #define BR BUS_SPACE_BARRIER_READ 242 #define BW BUS_SPACE_BARRIER_WRITE 243 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 244 245 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 246 247 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 248 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 249 250 #else 251 252 #define COM_LOCK(sc) 253 #define COM_UNLOCK(sc) 254 255 #endif 256 257 int 258 comspeed(speed, frequency) 259 long speed, frequency; 260 { 261 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 262 263 int x, err; 264 265 #if 0 266 if (speed == 0) 267 return (0); 268 #endif 269 if (speed <= 0) 270 return (-1); 271 x = divrnd(frequency / 16, speed); 272 if (x <= 0) 273 return (-1); 274 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 275 if (err < 0) 276 err = -err; 277 if (err > COM_TOLERANCE) 278 return (-1); 279 return (x); 280 281 #undef divrnd 282 } 283 284 #ifdef COM_DEBUG 285 int com_debug = 0; 286 287 void comstatus __P((struct com_softc *, char *)); 288 void 289 comstatus(sc, str) 290 struct com_softc *sc; 291 char *str; 292 { 293 struct tty *tp = sc->sc_tty; 294 295 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 296 sc->sc_dev.dv_xname, str, 297 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 298 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 299 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 300 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 301 sc->sc_tx_stopped ? "+" : "-"); 302 303 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 304 sc->sc_dev.dv_xname, str, 305 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 306 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 307 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 308 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 309 sc->sc_rx_flags); 310 } 311 #endif 312 313 int 314 comprobe1(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(hayespioh, sc) 332 bus_space_handle_t hayespioh; 333 struct com_softc *sc; 334 { 335 char val, dips; 336 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 337 bus_space_tag_t iot = sc->sc_iot; 338 339 /* 340 * Hayes ESP cards have two iobases. One is for compatibility with 341 * 16550 serial chips, and at the same ISA PC base addresses. The 342 * other is for ESP-specific enhanced features, and lies at a 343 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 344 */ 345 346 /* Test for ESP signature */ 347 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 348 return (0); 349 350 /* 351 * ESP is present at ESP enhanced base address; unknown com port 352 */ 353 354 /* Get the dip-switch configurations */ 355 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 356 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 357 358 /* Determine which com port this ESP card services: bits 0,1 of */ 359 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 360 if (sc->sc_iobase != combaselist[dips & 0x03]) 361 return (0); 362 363 printf(": ESP"); 364 365 /* Check ESP Self Test bits. */ 366 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 367 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 370 if ((val & 0x70) < 0x20) { 371 printf("-old (%o)", val & 0x70); 372 /* we do not support the necessary features */ 373 return (0); 374 } 375 376 /* Check for ability to emulate 16550: bit 8 == 1 */ 377 if ((dips & 0x80) == 0) { 378 printf(" slave"); 379 /* XXX Does slave really mean no 16550 support?? */ 380 return (0); 381 } 382 383 /* 384 * If we made it this far, we are a full-featured ESP v2.0 (or 385 * better), at the correct com port address. 386 */ 387 388 SET(sc->sc_hwflags, COM_HW_HAYESP); 389 printf(", 1024 byte fifo\n"); 390 return (1); 391 } 392 #endif 393 394 static void 395 com_enable_debugport(sc) 396 struct com_softc *sc; 397 { 398 int s; 399 400 /* Turn on line break interrupt, set carrier. */ 401 s = splserial(); 402 COM_LOCK(sc); 403 sc->sc_ier = IER_ERXRDY; 404 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 405 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 407 COM_UNLOCK(sc); 408 splx(s); 409 } 410 411 void 412 com_attach_subr(sc) 413 struct com_softc *sc; 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 427 callout_init(&sc->sc_diag_callout); 428 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 429 simple_lock_init(&sc->sc_lock); 430 #endif 431 432 /* Disable interrupts before configuring the device. */ 433 sc->sc_ier = 0; 434 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 435 436 if (iot == comconstag && iobase == comconsaddr) { 437 comconsattached = 1; 438 439 /* Make sure the console is always "hardwired". */ 440 delay(1000); /* wait for output to finish */ 441 SET(sc->sc_hwflags, COM_HW_CONSOLE); 442 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 443 } 444 445 #ifdef COM_HAYESP 446 /* Look for a Hayes ESP board. */ 447 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 448 bus_space_handle_t hayespioh; 449 450 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 451 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 452 continue; 453 if (comprobeHAYESP(hayespioh, sc)) { 454 sc->sc_hayespioh = hayespioh; 455 sc->sc_fifolen = 1024; 456 457 break; 458 } 459 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 460 } 461 /* No ESP; look for other things. */ 462 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 463 #endif 464 sc->sc_fifolen = 1; 465 /* look for a NS 16550AF UART with FIFOs */ 466 bus_space_write_1(iot, ioh, com_fifo, 467 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 468 delay(100); 469 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 470 == IIR_FIFO_MASK) 471 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 472 == FIFO_TRIGGER_14) { 473 SET(sc->sc_hwflags, COM_HW_FIFO); 474 475 #ifdef COM16650 476 /* 477 * IIR changes into the EFR if LCR is set to LCR_EERS 478 * on 16650s. We also know IIR != 0 at this point. 479 * Write 0 into the EFR, and read it. If the result 480 * is 0, we have a 16650. 481 * 482 * Older 16650s were broken; the test to detect them 483 * is taken from the Linux driver. Apparently 484 * setting DLAB enable gives access to the EFR on 485 * these chips. 486 */ 487 lcr = bus_space_read_1(iot, ioh, com_lcr); 488 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 489 bus_space_write_1(iot, ioh, com_efr, 0); 490 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 491 bus_space_write_1(iot, ioh, com_lcr, 492 lcr | LCR_DLAB); 493 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 494 CLR(sc->sc_hwflags, COM_HW_FIFO); 495 sc->sc_fifolen = 0; 496 } else { 497 SET(sc->sc_hwflags, COM_HW_FLOW); 498 sc->sc_fifolen = 32; 499 } 500 } else 501 #endif 502 sc->sc_fifolen = 16; 503 504 #ifdef COM16650 505 bus_space_write_1(iot, ioh, com_lcr, lcr); 506 if (sc->sc_fifolen == 0) 507 printf(": st16650, broken fifo\n"); 508 else if (sc->sc_fifolen == 32) 509 printf(": st16650a, working fifo\n"); 510 else 511 #endif 512 printf(": ns16550a, working fifo\n"); 513 } else 514 printf(": ns16550, broken fifo\n"); 515 else 516 printf(": ns8250 or ns16450, no fifo\n"); 517 bus_space_write_1(iot, ioh, com_fifo, 0); 518 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 519 sc->sc_fifolen = 1; 520 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 521 } 522 #ifdef COM_HAYESP 523 } 524 #endif 525 526 tp = ttymalloc(); 527 tp->t_oproc = comstart; 528 tp->t_param = comparam; 529 tp->t_hwiflow = comhwiflow; 530 531 sc->sc_tty = tp; 532 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 533 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 534 sc->sc_rbavail = com_rbuf_size; 535 if (sc->sc_rbuf == NULL) { 536 printf("%s: unable to allocate ring buffer\n", 537 sc->sc_dev.dv_xname); 538 return; 539 } 540 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 541 542 tty_attach(tp); 543 544 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 545 SET(sc->sc_mcr, MCR_IENABLE); 546 547 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 548 int maj; 549 550 /* locate the major number */ 551 for (maj = 0; maj < nchrdev; maj++) 552 if (cdevsw[maj].d_open == comopen) 553 break; 554 555 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 556 557 printf("%s: console\n", sc->sc_dev.dv_xname); 558 } 559 560 #ifdef KGDB 561 /* 562 * Allow kgdb to "take over" this port. If this is 563 * the kgdb device, it has exclusive use. 564 */ 565 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 566 com_kgdb_attached = 1; 567 568 SET(sc->sc_hwflags, COM_HW_KGDB); 569 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 570 } 571 #endif 572 573 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 574 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 575 #endif 576 577 #if NRND > 0 && defined(RND_COM) 578 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 579 RND_TYPE_TTY, 0); 580 #endif 581 582 /* if there are no enable/disable functions, assume the device 583 is always enabled */ 584 if (!sc->enable) 585 sc->enabled = 1; 586 587 com_config(sc); 588 589 SET(sc->sc_hwflags, COM_HW_DEV_OK); 590 } 591 592 void 593 com_config(sc) 594 struct com_softc *sc; 595 { 596 bus_space_tag_t iot = sc->sc_iot; 597 bus_space_handle_t ioh = sc->sc_ioh; 598 599 /* Disable interrupts before configuring the device. */ 600 sc->sc_ier = 0; 601 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 602 603 #ifdef COM_HAYESP 604 /* Look for a Hayes ESP board. */ 605 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 606 sc->sc_fifolen = 1024; 607 608 /* Set 16550 compatibility mode */ 609 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 610 HAYESP_SETMODE); 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 612 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 613 HAYESP_MODE_SCALE); 614 615 /* Set RTS/CTS flow control */ 616 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 617 HAYESP_SETFLOWTYPE); 618 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 619 HAYESP_FLOW_RTS); 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 621 HAYESP_FLOW_CTS); 622 623 /* Set flow control levels */ 624 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 625 HAYESP_SETRXFLOW); 626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 627 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 629 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 631 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 634 } 635 #endif 636 637 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 638 com_enable_debugport(sc); 639 } 640 641 int 642 com_detach(self, flags) 643 struct device *self; 644 int flags; 645 { 646 struct com_softc *sc = (struct com_softc *)self; 647 int maj, mn; 648 649 /* locate the major number */ 650 for (maj = 0; maj < nchrdev; maj++) 651 if (cdevsw[maj].d_open == comopen) 652 break; 653 654 /* Nuke the vnodes for any open instances. */ 655 mn = self->dv_unit; 656 vdevgone(maj, mn, mn, VCHR); 657 658 mn |= COMDIALOUT_MASK; 659 vdevgone(maj, mn, mn, VCHR); 660 661 /* Free the receive buffer. */ 662 free(sc->sc_rbuf, M_DEVBUF); 663 664 /* Detach and free the tty. */ 665 tty_detach(sc->sc_tty); 666 ttyfree(sc->sc_tty); 667 668 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 669 /* Unhook the soft interrupt handler. */ 670 softintr_disestablish(sc->sc_si); 671 #endif 672 673 #if NRND > 0 && defined(RND_COM) 674 /* Unhook the entropy source. */ 675 rnd_detach_source(&sc->rnd_source); 676 #endif 677 678 return (0); 679 } 680 681 int 682 com_activate(self, act) 683 struct device *self; 684 enum devact act; 685 { 686 struct com_softc *sc = (struct com_softc *)self; 687 int s, rv = 0; 688 689 s = splserial(); 690 COM_LOCK(sc); 691 switch (act) { 692 case DVACT_ACTIVATE: 693 rv = EOPNOTSUPP; 694 break; 695 696 case DVACT_DEACTIVATE: 697 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 698 rv = EBUSY; 699 break; 700 } 701 702 if (sc->disable != NULL && sc->enabled != 0) { 703 (*sc->disable)(sc); 704 sc->enabled = 0; 705 } 706 break; 707 } 708 709 COM_UNLOCK(sc); 710 splx(s); 711 return (rv); 712 } 713 714 void 715 com_shutdown(sc) 716 struct com_softc *sc; 717 { 718 struct tty *tp = sc->sc_tty; 719 int s; 720 721 s = splserial(); 722 COM_LOCK(sc); 723 724 /* If we were asserting flow control, then deassert it. */ 725 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 726 com_hwiflow(sc); 727 728 /* Clear any break condition set with TIOCSBRK. */ 729 com_break(sc, 0); 730 731 /* Turn off PPS capture on last close. */ 732 sc->sc_ppsmask = 0; 733 sc->ppsparam.mode = 0; 734 735 /* 736 * Hang up if necessary. Wait a bit, so the other side has time to 737 * notice even if we immediately open the port again. 738 * Avoid tsleeping above splhigh(). 739 */ 740 if (ISSET(tp->t_cflag, HUPCL)) { 741 com_modem(sc, 0); 742 COM_UNLOCK(sc); 743 splx(s); 744 /* XXX tsleep will only timeout */ 745 (void) tsleep(sc, TTIPRI, ttclos, hz); 746 s = splserial(); 747 COM_LOCK(sc); 748 } 749 750 /* Turn off interrupts. */ 751 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 752 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 753 else 754 sc->sc_ier = 0; 755 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 756 757 if (sc->disable) { 758 #ifdef DIAGNOSTIC 759 if (!sc->enabled) 760 panic("com_shutdown: not enabled?"); 761 #endif 762 (*sc->disable)(sc); 763 sc->enabled = 0; 764 } 765 COM_UNLOCK(sc); 766 splx(s); 767 } 768 769 int 770 comopen(dev, flag, mode, p) 771 dev_t dev; 772 int flag, mode; 773 struct proc *p; 774 { 775 struct com_softc *sc; 776 struct tty *tp; 777 int s, s2; 778 int error; 779 780 sc = device_lookup(&com_cd, COMUNIT(dev)); 781 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 782 sc->sc_rbuf == NULL) 783 return (ENXIO); 784 785 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 786 return (ENXIO); 787 788 #ifdef KGDB 789 /* 790 * If this is the kgdb port, no other use is permitted. 791 */ 792 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 793 return (EBUSY); 794 #endif 795 796 tp = sc->sc_tty; 797 798 if (ISSET(tp->t_state, TS_ISOPEN) && 799 ISSET(tp->t_state, TS_XCLUDE) && 800 p->p_ucred->cr_uid != 0) 801 return (EBUSY); 802 803 s = spltty(); 804 805 /* 806 * Do the following iff this is a first open. 807 */ 808 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 809 struct termios t; 810 811 tp->t_dev = dev; 812 813 s2 = splserial(); 814 COM_LOCK(sc); 815 816 if (sc->enable) { 817 if ((*sc->enable)(sc)) { 818 COM_UNLOCK(sc); 819 splx(s2); 820 splx(s); 821 printf("%s: device enable failed\n", 822 sc->sc_dev.dv_xname); 823 return (EIO); 824 } 825 sc->enabled = 1; 826 com_config(sc); 827 } 828 829 /* Turn on interrupts. */ 830 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 831 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 832 833 /* Fetch the current modem control status, needed later. */ 834 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 835 836 /* Clear PPS capture state on first open. */ 837 sc->sc_ppsmask = 0; 838 sc->ppsparam.mode = 0; 839 840 COM_UNLOCK(sc); 841 splx(s2); 842 843 /* 844 * Initialize the termios status to the defaults. Add in the 845 * sticky bits from TIOCSFLAGS. 846 */ 847 t.c_ispeed = 0; 848 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 849 t.c_ospeed = comconsrate; 850 t.c_cflag = comconscflag; 851 } else { 852 t.c_ospeed = TTYDEF_SPEED; 853 t.c_cflag = TTYDEF_CFLAG; 854 } 855 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 856 SET(t.c_cflag, CLOCAL); 857 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 858 SET(t.c_cflag, CRTSCTS); 859 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 860 SET(t.c_cflag, MDMBUF); 861 /* Make sure comparam() will do something. */ 862 tp->t_ospeed = 0; 863 (void) comparam(tp, &t); 864 tp->t_iflag = TTYDEF_IFLAG; 865 tp->t_oflag = TTYDEF_OFLAG; 866 tp->t_lflag = TTYDEF_LFLAG; 867 ttychars(tp); 868 ttsetwater(tp); 869 870 s2 = splserial(); 871 COM_LOCK(sc); 872 873 /* 874 * Turn on DTR. We must always do this, even if carrier is not 875 * present, because otherwise we'd have to use TIOCSDTR 876 * immediately after setting CLOCAL, which applications do not 877 * expect. We always assert DTR while the device is open 878 * unless explicitly requested to deassert it. 879 */ 880 com_modem(sc, 1); 881 882 /* Clear the input ring, and unblock. */ 883 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 884 sc->sc_rbavail = com_rbuf_size; 885 com_iflush(sc); 886 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 887 com_hwiflow(sc); 888 889 #ifdef COM_DEBUG 890 if (com_debug) 891 comstatus(sc, "comopen "); 892 #endif 893 894 COM_UNLOCK(sc); 895 splx(s2); 896 } 897 898 splx(s); 899 900 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 901 if (error) 902 goto bad; 903 904 error = (*tp->t_linesw->l_open)(dev, tp); 905 if (error) 906 goto bad; 907 908 return (0); 909 910 bad: 911 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 912 /* 913 * We failed to open the device, and nobody else had it opened. 914 * Clean up the state as appropriate. 915 */ 916 com_shutdown(sc); 917 } 918 919 return (error); 920 } 921 922 int 923 comclose(dev, flag, mode, p) 924 dev_t dev; 925 int flag, mode; 926 struct proc *p; 927 { 928 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 929 struct tty *tp = sc->sc_tty; 930 931 /* XXX This is for cons.c. */ 932 if (!ISSET(tp->t_state, TS_ISOPEN)) 933 return (0); 934 935 (*tp->t_linesw->l_close)(tp, flag); 936 ttyclose(tp); 937 938 if (COM_ISALIVE(sc) == 0) 939 return (0); 940 941 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 942 /* 943 * Although we got a last close, the device may still be in 944 * use; e.g. if this was the dialout node, and there are still 945 * processes waiting for carrier on the non-dialout node. 946 */ 947 com_shutdown(sc); 948 } 949 950 return (0); 951 } 952 953 int 954 comread(dev, uio, flag) 955 dev_t dev; 956 struct uio *uio; 957 int flag; 958 { 959 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 if (COM_ISALIVE(sc) == 0) 963 return (EIO); 964 965 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 966 } 967 968 int 969 comwrite(dev, uio, flag) 970 dev_t dev; 971 struct uio *uio; 972 int flag; 973 { 974 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 975 struct tty *tp = sc->sc_tty; 976 977 if (COM_ISALIVE(sc) == 0) 978 return (EIO); 979 980 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 981 } 982 983 int 984 compoll(dev, events, p) 985 dev_t dev; 986 int events; 987 struct proc *p; 988 { 989 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 990 struct tty *tp = sc->sc_tty; 991 992 if (COM_ISALIVE(sc) == 0) 993 return (EIO); 994 995 return ((*tp->t_linesw->l_poll)(tp, events, p)); 996 } 997 998 struct tty * 999 comtty(dev) 1000 dev_t dev; 1001 { 1002 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1003 struct tty *tp = sc->sc_tty; 1004 1005 return (tp); 1006 } 1007 1008 int 1009 comioctl(dev, cmd, data, flag, p) 1010 dev_t dev; 1011 u_long cmd; 1012 caddr_t data; 1013 int flag; 1014 struct proc *p; 1015 { 1016 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1017 struct tty *tp = sc->sc_tty; 1018 int error; 1019 int s; 1020 1021 if (COM_ISALIVE(sc) == 0) 1022 return (EIO); 1023 1024 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1025 if (error >= 0) 1026 return (error); 1027 1028 error = ttioctl(tp, cmd, data, flag, p); 1029 if (error >= 0) 1030 return (error); 1031 1032 error = 0; 1033 1034 s = splserial(); 1035 COM_LOCK(sc); 1036 1037 switch (cmd) { 1038 case TIOCSBRK: 1039 com_break(sc, 1); 1040 break; 1041 1042 case TIOCCBRK: 1043 com_break(sc, 0); 1044 break; 1045 1046 case TIOCSDTR: 1047 com_modem(sc, 1); 1048 break; 1049 1050 case TIOCCDTR: 1051 com_modem(sc, 0); 1052 break; 1053 1054 case TIOCGFLAGS: 1055 *(int *)data = sc->sc_swflags; 1056 break; 1057 1058 case TIOCSFLAGS: 1059 error = suser(p->p_ucred, &p->p_acflag); 1060 if (error) 1061 break; 1062 sc->sc_swflags = *(int *)data; 1063 break; 1064 1065 case TIOCMSET: 1066 case TIOCMBIS: 1067 case TIOCMBIC: 1068 tiocm_to_com(sc, cmd, *(int *)data); 1069 break; 1070 1071 case TIOCMGET: 1072 *(int *)data = com_to_tiocm(sc); 1073 break; 1074 1075 case PPS_IOC_CREATE: 1076 break; 1077 1078 case PPS_IOC_DESTROY: 1079 break; 1080 1081 case PPS_IOC_GETPARAMS: { 1082 pps_params_t *pp; 1083 pp = (pps_params_t *)data; 1084 *pp = sc->ppsparam; 1085 break; 1086 } 1087 1088 case PPS_IOC_SETPARAMS: { 1089 pps_params_t *pp; 1090 int mode; 1091 pp = (pps_params_t *)data; 1092 if (pp->mode & ~ppscap) { 1093 error = EINVAL; 1094 break; 1095 } 1096 sc->ppsparam = *pp; 1097 /* 1098 * Compute msr masks from user-specified timestamp state. 1099 */ 1100 mode = sc->ppsparam.mode; 1101 #ifdef PPS_SYNC 1102 if (mode & PPS_HARDPPSONASSERT) { 1103 mode |= PPS_CAPTUREASSERT; 1104 /* XXX revoke any previous HARDPPS source */ 1105 } 1106 if (mode & PPS_HARDPPSONCLEAR) { 1107 mode |= PPS_CAPTURECLEAR; 1108 /* XXX revoke any previous HARDPPS source */ 1109 } 1110 #endif /* PPS_SYNC */ 1111 switch (mode & PPS_CAPTUREBOTH) { 1112 case 0: 1113 sc->sc_ppsmask = 0; 1114 break; 1115 1116 case PPS_CAPTUREASSERT: 1117 sc->sc_ppsmask = MSR_DCD; 1118 sc->sc_ppsassert = MSR_DCD; 1119 sc->sc_ppsclear = -1; 1120 break; 1121 1122 case PPS_CAPTURECLEAR: 1123 sc->sc_ppsmask = MSR_DCD; 1124 sc->sc_ppsassert = -1; 1125 sc->sc_ppsclear = 0; 1126 break; 1127 1128 case PPS_CAPTUREBOTH: 1129 sc->sc_ppsmask = MSR_DCD; 1130 sc->sc_ppsassert = MSR_DCD; 1131 sc->sc_ppsclear = 0; 1132 break; 1133 1134 default: 1135 error = EINVAL; 1136 break; 1137 } 1138 break; 1139 } 1140 1141 case PPS_IOC_GETCAP: 1142 *(int*)data = ppscap; 1143 break; 1144 1145 case PPS_IOC_FETCH: { 1146 pps_info_t *pi; 1147 pi = (pps_info_t *)data; 1148 *pi = sc->ppsinfo; 1149 break; 1150 } 1151 1152 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1153 /* 1154 * Some GPS clocks models use the falling rather than 1155 * rising edge as the on-the-second signal. 1156 * The old API has no way to specify PPS polarity. 1157 */ 1158 sc->sc_ppsmask = MSR_DCD; 1159 #ifndef PPS_TRAILING_EDGE 1160 sc->sc_ppsassert = MSR_DCD; 1161 sc->sc_ppsclear = -1; 1162 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1163 &sc->ppsinfo.assert_timestamp); 1164 #else 1165 sc->sc_ppsassert = -1 1166 sc->sc_ppsclear = 0; 1167 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1168 &sc->ppsinfo.clear_timestamp); 1169 #endif 1170 break; 1171 1172 default: 1173 error = ENOTTY; 1174 break; 1175 } 1176 1177 COM_UNLOCK(sc); 1178 splx(s); 1179 1180 #ifdef COM_DEBUG 1181 if (com_debug) 1182 comstatus(sc, "comioctl "); 1183 #endif 1184 1185 return (error); 1186 } 1187 1188 integrate void 1189 com_schedrx(sc) 1190 struct com_softc *sc; 1191 { 1192 1193 sc->sc_rx_ready = 1; 1194 1195 /* Wake up the poller. */ 1196 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1197 softintr_schedule(sc->sc_si); 1198 #else 1199 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1200 setsoftserial(); 1201 #else 1202 if (!com_softintr_scheduled) { 1203 com_softintr_scheduled = 1; 1204 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1205 } 1206 #endif 1207 #endif 1208 } 1209 1210 void 1211 com_break(sc, onoff) 1212 struct com_softc *sc; 1213 int onoff; 1214 { 1215 1216 if (onoff) 1217 SET(sc->sc_lcr, LCR_SBREAK); 1218 else 1219 CLR(sc->sc_lcr, LCR_SBREAK); 1220 1221 if (!sc->sc_heldchange) { 1222 if (sc->sc_tx_busy) { 1223 sc->sc_heldtbc = sc->sc_tbc; 1224 sc->sc_tbc = 0; 1225 sc->sc_heldchange = 1; 1226 } else 1227 com_loadchannelregs(sc); 1228 } 1229 } 1230 1231 void 1232 com_modem(sc, onoff) 1233 struct com_softc *sc; 1234 int onoff; 1235 { 1236 1237 if (sc->sc_mcr_dtr == 0) 1238 return; 1239 1240 if (onoff) 1241 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1242 else 1243 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1244 1245 if (!sc->sc_heldchange) { 1246 if (sc->sc_tx_busy) { 1247 sc->sc_heldtbc = sc->sc_tbc; 1248 sc->sc_tbc = 0; 1249 sc->sc_heldchange = 1; 1250 } else 1251 com_loadchannelregs(sc); 1252 } 1253 } 1254 1255 void 1256 tiocm_to_com(sc, how, ttybits) 1257 struct com_softc *sc; 1258 u_long how; 1259 int ttybits; 1260 { 1261 u_char combits; 1262 1263 combits = 0; 1264 if (ISSET(ttybits, TIOCM_DTR)) 1265 SET(combits, MCR_DTR); 1266 if (ISSET(ttybits, TIOCM_RTS)) 1267 SET(combits, MCR_RTS); 1268 1269 switch (how) { 1270 case TIOCMBIC: 1271 CLR(sc->sc_mcr, combits); 1272 break; 1273 1274 case TIOCMBIS: 1275 SET(sc->sc_mcr, combits); 1276 break; 1277 1278 case TIOCMSET: 1279 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1280 SET(sc->sc_mcr, combits); 1281 break; 1282 } 1283 1284 if (!sc->sc_heldchange) { 1285 if (sc->sc_tx_busy) { 1286 sc->sc_heldtbc = sc->sc_tbc; 1287 sc->sc_tbc = 0; 1288 sc->sc_heldchange = 1; 1289 } else 1290 com_loadchannelregs(sc); 1291 } 1292 } 1293 1294 int 1295 com_to_tiocm(sc) 1296 struct com_softc *sc; 1297 { 1298 u_char combits; 1299 int ttybits = 0; 1300 1301 combits = sc->sc_mcr; 1302 if (ISSET(combits, MCR_DTR)) 1303 SET(ttybits, TIOCM_DTR); 1304 if (ISSET(combits, MCR_RTS)) 1305 SET(ttybits, TIOCM_RTS); 1306 1307 combits = sc->sc_msr; 1308 if (ISSET(combits, MSR_DCD)) 1309 SET(ttybits, TIOCM_CD); 1310 if (ISSET(combits, MSR_CTS)) 1311 SET(ttybits, TIOCM_CTS); 1312 if (ISSET(combits, MSR_DSR)) 1313 SET(ttybits, TIOCM_DSR); 1314 if (ISSET(combits, MSR_RI | MSR_TERI)) 1315 SET(ttybits, TIOCM_RI); 1316 1317 if (sc->sc_ier != 0) 1318 SET(ttybits, TIOCM_LE); 1319 1320 return (ttybits); 1321 } 1322 1323 static u_char 1324 cflag2lcr(cflag) 1325 tcflag_t cflag; 1326 { 1327 u_char lcr = 0; 1328 1329 switch (ISSET(cflag, CSIZE)) { 1330 case CS5: 1331 SET(lcr, LCR_5BITS); 1332 break; 1333 case CS6: 1334 SET(lcr, LCR_6BITS); 1335 break; 1336 case CS7: 1337 SET(lcr, LCR_7BITS); 1338 break; 1339 case CS8: 1340 SET(lcr, LCR_8BITS); 1341 break; 1342 } 1343 if (ISSET(cflag, PARENB)) { 1344 SET(lcr, LCR_PENAB); 1345 if (!ISSET(cflag, PARODD)) 1346 SET(lcr, LCR_PEVEN); 1347 } 1348 if (ISSET(cflag, CSTOPB)) 1349 SET(lcr, LCR_STOPB); 1350 1351 return (lcr); 1352 } 1353 1354 int 1355 comparam(tp, t) 1356 struct tty *tp; 1357 struct termios *t; 1358 { 1359 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1360 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1361 u_char lcr; 1362 int s; 1363 1364 if (COM_ISALIVE(sc) == 0) 1365 return (EIO); 1366 1367 /* Check requested parameters. */ 1368 if (ospeed < 0) 1369 return (EINVAL); 1370 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1371 return (EINVAL); 1372 1373 /* 1374 * For the console, always force CLOCAL and !HUPCL, so that the port 1375 * is always active. 1376 */ 1377 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1378 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1379 SET(t->c_cflag, CLOCAL); 1380 CLR(t->c_cflag, HUPCL); 1381 } 1382 1383 /* 1384 * If there were no changes, don't do anything. This avoids dropping 1385 * input and improves performance when all we did was frob things like 1386 * VMIN and VTIME. 1387 */ 1388 if (tp->t_ospeed == t->c_ospeed && 1389 tp->t_cflag == t->c_cflag) 1390 return (0); 1391 1392 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1393 1394 s = splserial(); 1395 COM_LOCK(sc); 1396 1397 sc->sc_lcr = lcr; 1398 1399 /* 1400 * If we're not in a mode that assumes a connection is present, then 1401 * ignore carrier changes. 1402 */ 1403 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1404 sc->sc_msr_dcd = 0; 1405 else 1406 sc->sc_msr_dcd = MSR_DCD; 1407 /* 1408 * Set the flow control pins depending on the current flow control 1409 * mode. 1410 */ 1411 if (ISSET(t->c_cflag, CRTSCTS)) { 1412 sc->sc_mcr_dtr = MCR_DTR; 1413 sc->sc_mcr_rts = MCR_RTS; 1414 sc->sc_msr_cts = MSR_CTS; 1415 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1416 } else if (ISSET(t->c_cflag, MDMBUF)) { 1417 /* 1418 * For DTR/DCD flow control, make sure we don't toggle DTR for 1419 * carrier detection. 1420 */ 1421 sc->sc_mcr_dtr = 0; 1422 sc->sc_mcr_rts = MCR_DTR; 1423 sc->sc_msr_cts = MSR_DCD; 1424 sc->sc_efr = 0; 1425 } else { 1426 /* 1427 * If no flow control, then always set RTS. This will make 1428 * the other side happy if it mistakenly thinks we're doing 1429 * RTS/CTS flow control. 1430 */ 1431 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1432 sc->sc_mcr_rts = 0; 1433 sc->sc_msr_cts = 0; 1434 sc->sc_efr = 0; 1435 if (ISSET(sc->sc_mcr, MCR_DTR)) 1436 SET(sc->sc_mcr, MCR_RTS); 1437 else 1438 CLR(sc->sc_mcr, MCR_RTS); 1439 } 1440 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1441 1442 #if 0 1443 if (ospeed == 0) 1444 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1445 else 1446 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1447 #endif 1448 1449 sc->sc_dlbl = ospeed; 1450 sc->sc_dlbh = ospeed >> 8; 1451 1452 /* 1453 * Set the FIFO threshold based on the receive speed. 1454 * 1455 * * If it's a low speed, it's probably a mouse or some other 1456 * interactive device, so set the threshold low. 1457 * * If it's a high speed, trim the trigger level down to prevent 1458 * overflows. 1459 * * Otherwise set it a bit higher. 1460 */ 1461 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1462 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1463 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1464 sc->sc_fifo = FIFO_ENABLE | 1465 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1466 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1467 else 1468 sc->sc_fifo = 0; 1469 1470 /* And copy to tty. */ 1471 tp->t_ispeed = 0; 1472 tp->t_ospeed = t->c_ospeed; 1473 tp->t_cflag = t->c_cflag; 1474 1475 if (!sc->sc_heldchange) { 1476 if (sc->sc_tx_busy) { 1477 sc->sc_heldtbc = sc->sc_tbc; 1478 sc->sc_tbc = 0; 1479 sc->sc_heldchange = 1; 1480 } else 1481 com_loadchannelregs(sc); 1482 } 1483 1484 if (!ISSET(t->c_cflag, CHWFLOW)) { 1485 /* Disable the high water mark. */ 1486 sc->sc_r_hiwat = 0; 1487 sc->sc_r_lowat = 0; 1488 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1489 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1490 com_schedrx(sc); 1491 } 1492 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1493 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1494 com_hwiflow(sc); 1495 } 1496 } else { 1497 sc->sc_r_hiwat = com_rbuf_hiwat; 1498 sc->sc_r_lowat = com_rbuf_lowat; 1499 } 1500 1501 COM_UNLOCK(sc); 1502 splx(s); 1503 1504 /* 1505 * Update the tty layer's idea of the carrier bit, in case we changed 1506 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1507 * explicit request. 1508 */ 1509 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1510 1511 #ifdef COM_DEBUG 1512 if (com_debug) 1513 comstatus(sc, "comparam "); 1514 #endif 1515 1516 if (!ISSET(t->c_cflag, CHWFLOW)) { 1517 if (sc->sc_tx_stopped) { 1518 sc->sc_tx_stopped = 0; 1519 comstart(tp); 1520 } 1521 } 1522 1523 return (0); 1524 } 1525 1526 void 1527 com_iflush(sc) 1528 struct com_softc *sc; 1529 { 1530 bus_space_tag_t iot = sc->sc_iot; 1531 bus_space_handle_t ioh = sc->sc_ioh; 1532 #ifdef DIAGNOSTIC 1533 int reg; 1534 #endif 1535 int timo; 1536 1537 #ifdef DIAGNOSTIC 1538 reg = 0xffff; 1539 #endif 1540 timo = 50000; 1541 /* flush any pending I/O */ 1542 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1543 && --timo) 1544 #ifdef DIAGNOSTIC 1545 reg = 1546 #else 1547 (void) 1548 #endif 1549 bus_space_read_1(iot, ioh, com_data); 1550 #ifdef DIAGNOSTIC 1551 if (!timo) 1552 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1553 reg); 1554 #endif 1555 } 1556 1557 void 1558 com_loadchannelregs(sc) 1559 struct com_softc *sc; 1560 { 1561 bus_space_tag_t iot = sc->sc_iot; 1562 bus_space_handle_t ioh = sc->sc_ioh; 1563 1564 /* XXXXX necessary? */ 1565 com_iflush(sc); 1566 1567 bus_space_write_1(iot, ioh, com_ier, 0); 1568 1569 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1570 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1571 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1572 } 1573 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1574 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1575 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1576 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1577 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1578 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1579 1580 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1581 } 1582 1583 int 1584 comhwiflow(tp, block) 1585 struct tty *tp; 1586 int block; 1587 { 1588 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1589 int s; 1590 1591 if (COM_ISALIVE(sc) == 0) 1592 return (0); 1593 1594 if (sc->sc_mcr_rts == 0) 1595 return (0); 1596 1597 s = splserial(); 1598 COM_LOCK(sc); 1599 1600 if (block) { 1601 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1602 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1603 com_hwiflow(sc); 1604 } 1605 } else { 1606 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1607 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1608 com_schedrx(sc); 1609 } 1610 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1611 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1612 com_hwiflow(sc); 1613 } 1614 } 1615 1616 COM_UNLOCK(sc); 1617 splx(s); 1618 return (1); 1619 } 1620 1621 /* 1622 * (un)block input via hw flowcontrol 1623 */ 1624 void 1625 com_hwiflow(sc) 1626 struct com_softc *sc; 1627 { 1628 bus_space_tag_t iot = sc->sc_iot; 1629 bus_space_handle_t ioh = sc->sc_ioh; 1630 1631 if (sc->sc_mcr_rts == 0) 1632 return; 1633 1634 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1635 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1636 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1637 } else { 1638 SET(sc->sc_mcr, sc->sc_mcr_rts); 1639 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1640 } 1641 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1642 } 1643 1644 1645 void 1646 comstart(tp) 1647 struct tty *tp; 1648 { 1649 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1650 bus_space_tag_t iot = sc->sc_iot; 1651 bus_space_handle_t ioh = sc->sc_ioh; 1652 int s; 1653 1654 if (COM_ISALIVE(sc) == 0) 1655 return; 1656 1657 s = spltty(); 1658 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1659 goto out; 1660 if (sc->sc_tx_stopped) 1661 goto out; 1662 1663 if (tp->t_outq.c_cc <= tp->t_lowat) { 1664 if (ISSET(tp->t_state, TS_ASLEEP)) { 1665 CLR(tp->t_state, TS_ASLEEP); 1666 wakeup(&tp->t_outq); 1667 } 1668 selwakeup(&tp->t_wsel); 1669 if (tp->t_outq.c_cc == 0) 1670 goto out; 1671 } 1672 1673 /* Grab the first contiguous region of buffer space. */ 1674 { 1675 u_char *tba; 1676 int tbc; 1677 1678 tba = tp->t_outq.c_cf; 1679 tbc = ndqb(&tp->t_outq, 0); 1680 1681 (void)splserial(); 1682 COM_LOCK(sc); 1683 1684 sc->sc_tba = tba; 1685 sc->sc_tbc = tbc; 1686 } 1687 1688 SET(tp->t_state, TS_BUSY); 1689 sc->sc_tx_busy = 1; 1690 1691 /* Enable transmit completion interrupts if necessary. */ 1692 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1693 SET(sc->sc_ier, IER_ETXRDY); 1694 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1695 } 1696 1697 /* Output the first chunk of the contiguous buffer. */ 1698 { 1699 int n; 1700 1701 n = sc->sc_tbc; 1702 if (n > sc->sc_fifolen) 1703 n = sc->sc_fifolen; 1704 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1705 sc->sc_tbc -= n; 1706 sc->sc_tba += n; 1707 } 1708 COM_UNLOCK(sc); 1709 out: 1710 splx(s); 1711 return; 1712 } 1713 1714 /* 1715 * Stop output on a line. 1716 */ 1717 void 1718 comstop(tp, flag) 1719 struct tty *tp; 1720 int flag; 1721 { 1722 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1723 int s; 1724 1725 s = splserial(); 1726 COM_LOCK(sc); 1727 if (ISSET(tp->t_state, TS_BUSY)) { 1728 /* Stop transmitting at the next chunk. */ 1729 sc->sc_tbc = 0; 1730 sc->sc_heldtbc = 0; 1731 if (!ISSET(tp->t_state, TS_TTSTOP)) 1732 SET(tp->t_state, TS_FLUSH); 1733 } 1734 COM_UNLOCK(sc); 1735 splx(s); 1736 } 1737 1738 void 1739 comdiag(arg) 1740 void *arg; 1741 { 1742 struct com_softc *sc = arg; 1743 int overflows, floods; 1744 int s; 1745 1746 s = splserial(); 1747 COM_LOCK(sc); 1748 overflows = sc->sc_overflows; 1749 sc->sc_overflows = 0; 1750 floods = sc->sc_floods; 1751 sc->sc_floods = 0; 1752 sc->sc_errors = 0; 1753 COM_UNLOCK(sc); 1754 splx(s); 1755 1756 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1757 sc->sc_dev.dv_xname, 1758 overflows, overflows == 1 ? "" : "s", 1759 floods, floods == 1 ? "" : "s"); 1760 } 1761 1762 integrate void 1763 com_rxsoft(sc, tp) 1764 struct com_softc *sc; 1765 struct tty *tp; 1766 { 1767 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1768 u_char *get, *end; 1769 u_int cc, scc; 1770 u_char lsr; 1771 int code; 1772 int s; 1773 1774 end = sc->sc_ebuf; 1775 get = sc->sc_rbget; 1776 scc = cc = com_rbuf_size - sc->sc_rbavail; 1777 1778 if (cc == com_rbuf_size) { 1779 sc->sc_floods++; 1780 if (sc->sc_errors++ == 0) 1781 callout_reset(&sc->sc_diag_callout, 60 * hz, 1782 comdiag, sc); 1783 } 1784 1785 while (cc) { 1786 code = get[0]; 1787 lsr = get[1]; 1788 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1789 if (ISSET(lsr, LSR_OE)) { 1790 sc->sc_overflows++; 1791 if (sc->sc_errors++ == 0) 1792 callout_reset(&sc->sc_diag_callout, 1793 60 * hz, comdiag, sc); 1794 } 1795 if (ISSET(lsr, LSR_BI | LSR_FE)) 1796 SET(code, TTY_FE); 1797 if (ISSET(lsr, LSR_PE)) 1798 SET(code, TTY_PE); 1799 } 1800 if ((*rint)(code, tp) == -1) { 1801 /* 1802 * The line discipline's buffer is out of space. 1803 */ 1804 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1805 /* 1806 * We're either not using flow control, or the 1807 * line discipline didn't tell us to block for 1808 * some reason. Either way, we have no way to 1809 * know when there's more space available, so 1810 * just drop the rest of the data. 1811 */ 1812 get += cc << 1; 1813 if (get >= end) 1814 get -= com_rbuf_size << 1; 1815 cc = 0; 1816 } else { 1817 /* 1818 * Don't schedule any more receive processing 1819 * until the line discipline tells us there's 1820 * space available (through comhwiflow()). 1821 * Leave the rest of the data in the input 1822 * buffer. 1823 */ 1824 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1825 } 1826 break; 1827 } 1828 get += 2; 1829 if (get >= end) 1830 get = sc->sc_rbuf; 1831 cc--; 1832 } 1833 1834 if (cc != scc) { 1835 sc->sc_rbget = get; 1836 s = splserial(); 1837 COM_LOCK(sc); 1838 1839 cc = sc->sc_rbavail += scc - cc; 1840 /* Buffers should be ok again, release possible block. */ 1841 if (cc >= sc->sc_r_lowat) { 1842 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1843 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1844 SET(sc->sc_ier, IER_ERXRDY); 1845 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1846 } 1847 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1848 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1849 com_hwiflow(sc); 1850 } 1851 } 1852 COM_UNLOCK(sc); 1853 splx(s); 1854 } 1855 } 1856 1857 integrate void 1858 com_txsoft(sc, tp) 1859 struct com_softc *sc; 1860 struct tty *tp; 1861 { 1862 1863 CLR(tp->t_state, TS_BUSY); 1864 if (ISSET(tp->t_state, TS_FLUSH)) 1865 CLR(tp->t_state, TS_FLUSH); 1866 else 1867 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1868 (*tp->t_linesw->l_start)(tp); 1869 } 1870 1871 integrate void 1872 com_stsoft(sc, tp) 1873 struct com_softc *sc; 1874 struct tty *tp; 1875 { 1876 u_char msr, delta; 1877 int s; 1878 1879 s = splserial(); 1880 COM_LOCK(sc); 1881 msr = sc->sc_msr; 1882 delta = sc->sc_msr_delta; 1883 sc->sc_msr_delta = 0; 1884 COM_UNLOCK(sc); 1885 splx(s); 1886 1887 if (ISSET(delta, sc->sc_msr_dcd)) { 1888 /* 1889 * Inform the tty layer that carrier detect changed. 1890 */ 1891 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1892 } 1893 1894 if (ISSET(delta, sc->sc_msr_cts)) { 1895 /* Block or unblock output according to flow control. */ 1896 if (ISSET(msr, sc->sc_msr_cts)) { 1897 sc->sc_tx_stopped = 0; 1898 (*tp->t_linesw->l_start)(tp); 1899 } else { 1900 sc->sc_tx_stopped = 1; 1901 } 1902 } 1903 1904 #ifdef COM_DEBUG 1905 if (com_debug) 1906 comstatus(sc, "com_stsoft"); 1907 #endif 1908 } 1909 1910 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1911 void 1912 comsoft(arg) 1913 void *arg; 1914 { 1915 struct com_softc *sc = arg; 1916 struct tty *tp; 1917 1918 if (COM_ISALIVE(sc) == 0) 1919 return; 1920 1921 { 1922 #else 1923 void 1924 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1925 comsoft() 1926 #else 1927 comsoft(arg) 1928 void *arg; 1929 #endif 1930 { 1931 struct com_softc *sc; 1932 struct tty *tp; 1933 int unit; 1934 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1935 int s; 1936 1937 s = splsoftserial(); 1938 com_softintr_scheduled = 0; 1939 #endif 1940 1941 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1942 sc = device_lookup(&com_cd, unit); 1943 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1944 continue; 1945 1946 if (COM_ISALIVE(sc) == 0) 1947 continue; 1948 1949 tp = sc->sc_tty; 1950 if (tp == NULL) 1951 continue; 1952 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1953 continue; 1954 #endif 1955 tp = sc->sc_tty; 1956 1957 if (sc->sc_rx_ready) { 1958 sc->sc_rx_ready = 0; 1959 com_rxsoft(sc, tp); 1960 } 1961 1962 if (sc->sc_st_check) { 1963 sc->sc_st_check = 0; 1964 com_stsoft(sc, tp); 1965 } 1966 1967 if (sc->sc_tx_done) { 1968 sc->sc_tx_done = 0; 1969 com_txsoft(sc, tp); 1970 } 1971 } 1972 1973 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1974 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1975 splx(s); 1976 #endif 1977 #endif 1978 } 1979 1980 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1981 /* there has got to be a better way to do comsoft() */ 1982 }} 1983 #endif 1984 1985 int 1986 comintr(arg) 1987 void *arg; 1988 { 1989 struct com_softc *sc = arg; 1990 bus_space_tag_t iot = sc->sc_iot; 1991 bus_space_handle_t ioh = sc->sc_ioh; 1992 u_char *put, *end; 1993 u_int cc; 1994 u_char lsr, iir; 1995 1996 if (COM_ISALIVE(sc) == 0) 1997 return (0); 1998 1999 COM_LOCK(sc); 2000 iir = bus_space_read_1(iot, ioh, com_iir); 2001 if (ISSET(iir, IIR_NOPEND)) { 2002 COM_UNLOCK(sc); 2003 return (0); 2004 } 2005 2006 end = sc->sc_ebuf; 2007 put = sc->sc_rbput; 2008 cc = sc->sc_rbavail; 2009 2010 do { 2011 u_char msr, delta; 2012 2013 lsr = bus_space_read_1(iot, ioh, com_lsr); 2014 if (ISSET(lsr, LSR_BI)) { 2015 int cn_trapped = 0; 2016 cn_check_magic(sc->sc_tty->t_dev, 2017 CNC_BREAK, com_cnm_state); 2018 if (cn_trapped) 2019 continue; 2020 #if defined(KGDB) 2021 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2022 kgdb_connect(1); 2023 continue; 2024 } 2025 #endif 2026 } 2027 2028 if (ISSET(lsr, LSR_RCV_MASK) && 2029 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2030 while (cc > 0) { 2031 int cn_trapped = 0; 2032 put[0] = bus_space_read_1(iot, ioh, com_data); 2033 put[1] = lsr; 2034 cn_check_magic(sc->sc_tty->t_dev, 2035 put[0], com_cnm_state); 2036 if (cn_trapped) { 2037 lsr = bus_space_read_1(iot, ioh, com_lsr); 2038 if (!ISSET(lsr, LSR_RCV_MASK)) 2039 break; 2040 2041 continue; 2042 } 2043 put += 2; 2044 if (put >= end) 2045 put = sc->sc_rbuf; 2046 cc--; 2047 2048 lsr = bus_space_read_1(iot, ioh, com_lsr); 2049 if (!ISSET(lsr, LSR_RCV_MASK)) 2050 break; 2051 } 2052 2053 /* 2054 * Current string of incoming characters ended because 2055 * no more data was available or we ran out of space. 2056 * Schedule a receive event if any data was received. 2057 * If we're out of space, turn off receive interrupts. 2058 */ 2059 sc->sc_rbput = put; 2060 sc->sc_rbavail = cc; 2061 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2062 sc->sc_rx_ready = 1; 2063 2064 /* 2065 * See if we are in danger of overflowing a buffer. If 2066 * so, use hardware flow control to ease the pressure. 2067 */ 2068 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2069 cc < sc->sc_r_hiwat) { 2070 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2071 com_hwiflow(sc); 2072 } 2073 2074 /* 2075 * If we're out of space, disable receive interrupts 2076 * until the queue has drained a bit. 2077 */ 2078 if (!cc) { 2079 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2080 CLR(sc->sc_ier, IER_ERXRDY); 2081 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2082 } 2083 } else { 2084 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2085 bus_space_write_1(iot, ioh, com_ier, 0); 2086 delay(10); 2087 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2088 iir = IIR_NOPEND; 2089 continue; 2090 } 2091 } 2092 2093 msr = bus_space_read_1(iot, ioh, com_msr); 2094 delta = msr ^ sc->sc_msr; 2095 sc->sc_msr = msr; 2096 /* 2097 * Pulse-per-second (PSS) signals on edge of DCD? 2098 * Process these even if line discipline is ignoring DCD. 2099 */ 2100 if (delta & sc->sc_ppsmask) { 2101 struct timeval tv; 2102 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2103 /* XXX nanotime() */ 2104 microtime(&tv); 2105 TIMEVAL_TO_TIMESPEC(&tv, 2106 &sc->ppsinfo.assert_timestamp); 2107 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2108 timespecadd(&sc->ppsinfo.assert_timestamp, 2109 &sc->ppsparam.assert_offset, 2110 &sc->ppsinfo.assert_timestamp); 2111 } 2112 2113 #ifdef PPS_SYNC 2114 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2115 hardpps(&tv, tv.tv_usec); 2116 #endif 2117 sc->ppsinfo.assert_sequence++; 2118 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2119 2120 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2121 /* XXX nanotime() */ 2122 microtime(&tv); 2123 TIMEVAL_TO_TIMESPEC(&tv, 2124 &sc->ppsinfo.clear_timestamp); 2125 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2126 timespecadd(&sc->ppsinfo.clear_timestamp, 2127 &sc->ppsparam.clear_offset, 2128 &sc->ppsinfo.clear_timestamp); 2129 } 2130 2131 #ifdef PPS_SYNC 2132 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2133 hardpps(&tv, tv.tv_usec); 2134 #endif 2135 sc->ppsinfo.clear_sequence++; 2136 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2137 } 2138 } 2139 2140 /* 2141 * Process normal status changes 2142 */ 2143 if (ISSET(delta, sc->sc_msr_mask)) { 2144 SET(sc->sc_msr_delta, delta); 2145 2146 /* 2147 * Stop output immediately if we lose the output 2148 * flow control signal or carrier detect. 2149 */ 2150 if (ISSET(~msr, sc->sc_msr_mask)) { 2151 sc->sc_tbc = 0; 2152 sc->sc_heldtbc = 0; 2153 #ifdef COM_DEBUG 2154 if (com_debug) 2155 comstatus(sc, "comintr "); 2156 #endif 2157 } 2158 2159 sc->sc_st_check = 1; 2160 } 2161 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2162 2163 /* 2164 * Done handling any receive interrupts. See if data can be 2165 * transmitted as well. Schedule tx done event if no data left 2166 * and tty was marked busy. 2167 */ 2168 if (ISSET(lsr, LSR_TXRDY)) { 2169 /* 2170 * If we've delayed a parameter change, do it now, and restart 2171 * output. 2172 */ 2173 if (sc->sc_heldchange) { 2174 com_loadchannelregs(sc); 2175 sc->sc_heldchange = 0; 2176 sc->sc_tbc = sc->sc_heldtbc; 2177 sc->sc_heldtbc = 0; 2178 } 2179 2180 /* Output the next chunk of the contiguous buffer, if any. */ 2181 if (sc->sc_tbc > 0) { 2182 int n; 2183 2184 n = sc->sc_tbc; 2185 if (n > sc->sc_fifolen) 2186 n = sc->sc_fifolen; 2187 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2188 sc->sc_tbc -= n; 2189 sc->sc_tba += n; 2190 } else { 2191 /* Disable transmit completion interrupts if necessary. */ 2192 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2193 CLR(sc->sc_ier, IER_ETXRDY); 2194 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2195 } 2196 if (sc->sc_tx_busy) { 2197 sc->sc_tx_busy = 0; 2198 sc->sc_tx_done = 1; 2199 } 2200 } 2201 } 2202 COM_UNLOCK(sc); 2203 2204 /* Wake up the poller. */ 2205 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2206 softintr_schedule(sc->sc_si); 2207 #else 2208 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2209 setsoftserial(); 2210 #else 2211 if (!com_softintr_scheduled) { 2212 com_softintr_scheduled = 1; 2213 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2214 } 2215 #endif 2216 #endif 2217 2218 #if NRND > 0 && defined(RND_COM) 2219 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2220 #endif 2221 2222 return (1); 2223 } 2224 2225 /* 2226 * The following functions are polled getc and putc routines, shared 2227 * by the console and kgdb glue. 2228 * 2229 * The read-ahead code is so that you can detect pending in-band 2230 * cn_magic in polled mode while doing output rather than having to 2231 * wait until the kernel decides it needs input. 2232 */ 2233 2234 #define MAX_READAHEAD 20 2235 static int com_readahead[MAX_READAHEAD]; 2236 static int com_readaheadcount = 0; 2237 2238 int 2239 com_common_getc(dev, iot, ioh) 2240 dev_t dev; 2241 bus_space_tag_t iot; 2242 bus_space_handle_t ioh; 2243 { 2244 int s = splserial(); 2245 u_char stat, c; 2246 2247 /* got a character from reading things earlier */ 2248 if (com_readaheadcount > 0) { 2249 int i; 2250 2251 c = com_readahead[0]; 2252 for (i = 1; i < com_readaheadcount; i++) { 2253 com_readahead[i-1] = com_readahead[i]; 2254 } 2255 com_readaheadcount--; 2256 splx(s); 2257 return (c); 2258 } 2259 2260 /* block until a character becomes available */ 2261 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2262 ; 2263 2264 c = bus_space_read_1(iot, ioh, com_data); 2265 stat = bus_space_read_1(iot, ioh, com_iir); 2266 { 2267 int cn_trapped = 0; /* unused */ 2268 #ifdef DDB 2269 extern int db_active; 2270 if (!db_active) 2271 #endif 2272 cn_check_magic(dev, c, com_cnm_state); 2273 } 2274 splx(s); 2275 return (c); 2276 } 2277 2278 void 2279 com_common_putc(dev, iot, ioh, c) 2280 dev_t dev; 2281 bus_space_tag_t iot; 2282 bus_space_handle_t ioh; 2283 int c; 2284 { 2285 int s = splserial(); 2286 int timo; 2287 2288 int cin, stat; 2289 if (com_readaheadcount < MAX_READAHEAD 2290 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2291 int cn_trapped = 0; 2292 cin = bus_space_read_1(iot, ioh, com_data); 2293 stat = bus_space_read_1(iot, ioh, com_iir); 2294 cn_check_magic(dev, cin, com_cnm_state); 2295 com_readahead[com_readaheadcount++] = cin; 2296 } 2297 2298 /* wait for any pending transmission to finish */ 2299 timo = 150000; 2300 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2301 continue; 2302 2303 bus_space_write_1(iot, ioh, com_data, c); 2304 COM_BARRIER(iot, ioh, BR | BW); 2305 2306 /* wait for this transmission to complete */ 2307 timo = 1500000; 2308 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2309 continue; 2310 2311 splx(s); 2312 } 2313 2314 /* 2315 * Initialize UART for use as console or KGDB line. 2316 */ 2317 int 2318 cominit(iot, iobase, rate, frequency, cflag, iohp) 2319 bus_space_tag_t iot; 2320 bus_addr_t iobase; 2321 int rate, frequency; 2322 tcflag_t cflag; 2323 bus_space_handle_t *iohp; 2324 { 2325 bus_space_handle_t ioh; 2326 2327 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2328 return (ENOMEM); /* ??? */ 2329 2330 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2331 bus_space_write_1(iot, ioh, com_efr, 0); 2332 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2333 rate = comspeed(rate, frequency); 2334 bus_space_write_1(iot, ioh, com_dlbl, rate); 2335 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2336 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2337 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2338 bus_space_write_1(iot, ioh, com_fifo, 2339 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2340 bus_space_write_1(iot, ioh, com_ier, 0); 2341 2342 *iohp = ioh; 2343 return (0); 2344 } 2345 2346 /* 2347 * Following are all routines needed for COM to act as console 2348 */ 2349 struct consdev comcons = { 2350 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2351 NODEV, CN_NORMAL 2352 }; 2353 2354 2355 int 2356 comcnattach(iot, iobase, rate, frequency, cflag) 2357 bus_space_tag_t iot; 2358 bus_addr_t iobase; 2359 int rate, frequency; 2360 tcflag_t cflag; 2361 { 2362 int res; 2363 2364 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2365 if (res) 2366 return (res); 2367 2368 cn_tab = &comcons; 2369 cn_init_magic(&com_cnm_state); 2370 cn_set_magic("\047\001"); /* default magic is BREAK */ 2371 2372 comconstag = iot; 2373 comconsaddr = iobase; 2374 comconsrate = rate; 2375 comconscflag = cflag; 2376 2377 return (0); 2378 } 2379 2380 int 2381 comcngetc(dev) 2382 dev_t dev; 2383 { 2384 return (com_common_getc(dev, comconstag, comconsioh)); 2385 } 2386 2387 /* 2388 * Console kernel output character routine. 2389 */ 2390 void 2391 comcnputc(dev, c) 2392 dev_t dev; 2393 int c; 2394 { 2395 com_common_putc(dev, comconstag, comconsioh, c); 2396 } 2397 2398 void 2399 comcnpollc(dev, on) 2400 dev_t dev; 2401 int on; 2402 { 2403 2404 } 2405 2406 #ifdef KGDB 2407 int 2408 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2409 bus_space_tag_t iot; 2410 bus_addr_t iobase; 2411 int rate, frequency; 2412 tcflag_t cflag; 2413 { 2414 int res; 2415 2416 if (iot == comconstag && iobase == comconsaddr) 2417 return (EBUSY); /* cannot share with console */ 2418 2419 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2420 if (res) 2421 return (res); 2422 2423 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2424 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2425 2426 com_kgdb_iot = iot; 2427 com_kgdb_addr = iobase; 2428 2429 return (0); 2430 } 2431 2432 /* ARGSUSED */ 2433 int 2434 com_kgdb_getc(arg) 2435 void *arg; 2436 { 2437 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2438 } 2439 2440 /* ARGSUSED */ 2441 void 2442 com_kgdb_putc(arg, c) 2443 void *arg; 2444 int c; 2445 { 2446 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2447 } 2448 #endif /* KGDB */ 2449 2450 /* helper function to identify the com ports used by 2451 console or KGDB (and not yet autoconf attached) */ 2452 int 2453 com_is_console(iot, iobase, ioh) 2454 bus_space_tag_t iot; 2455 bus_addr_t iobase; 2456 bus_space_handle_t *ioh; 2457 { 2458 bus_space_handle_t help; 2459 2460 if (!comconsattached && 2461 iot == comconstag && iobase == comconsaddr) 2462 help = comconsioh; 2463 #ifdef KGDB 2464 else if (!com_kgdb_attached && 2465 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2466 help = com_kgdb_ioh; 2467 #endif 2468 else 2469 return (0); 2470 2471 if (ioh) 2472 *ioh = help; 2473 return (1); 2474 } 2475
Indexes created Thu Sep 25 02:09:54 GMT 2025