com.c revision 1.187
1 /* $NetBSD: com.c,v 1.187 2001/08/22 12:44:10 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_com.h" 80 #include "opt_ddb.h" 81 #include "opt_ddbparam.h" 82 #include "opt_kgdb.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/types.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 119 #include <machine/intr.h> 120 #include <machine/bus.h> 121 122 #include <dev/ic/comreg.h> 123 #include <dev/ic/comvar.h> 124 #include <dev/ic/ns16550reg.h> 125 #include <dev/ic/st16650reg.h> 126 #ifdef COM_HAYESP 127 #include <dev/ic/hayespreg.h> 128 #endif 129 #define com_lcr com_cfcr 130 #include <dev/cons.h> 131 132 #ifdef COM_HAYESP 133 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 134 #endif 135 136 static void com_enable_debugport __P((struct com_softc *)); 137 138 void com_config __P((struct com_softc *)); 139 void com_shutdown __P((struct com_softc *)); 140 int comspeed __P((long, long)); 141 static u_char cflag2lcr __P((tcflag_t)); 142 int comparam __P((struct tty *, struct termios *)); 143 void comstart __P((struct tty *)); 144 int comhwiflow __P((struct tty *, int)); 145 146 void com_loadchannelregs __P((struct com_softc *)); 147 void com_hwiflow __P((struct com_softc *)); 148 void com_break __P((struct com_softc *, int)); 149 void com_modem __P((struct com_softc *, int)); 150 void tiocm_to_com __P((struct com_softc *, u_long, int)); 151 int com_to_tiocm __P((struct com_softc *)); 152 void com_iflush __P((struct com_softc *)); 153 154 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 155 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 156 157 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 158 bus_space_handle_t *)); 159 160 /* XXX: This belongs elsewhere */ 161 cdev_decl(com); 162 163 int comcngetc __P((dev_t)); 164 void comcnputc __P((dev_t, int)); 165 void comcnpollc __P((dev_t, int)); 166 167 #define integrate static inline 168 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 169 void comsoft __P((void *)); 170 #else 171 #ifndef __NO_SOFT_SERIAL_INTERRUPT 172 void comsoft __P((void)); 173 #else 174 void comsoft __P((void *)); 175 struct callout comsoft_callout = CALLOUT_INITIALIZER; 176 #endif 177 #endif 178 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 179 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_schedrx __P((struct com_softc *)); 182 void comdiag __P((void *)); 183 184 extern struct cfdriver com_cd; 185 186 /* 187 * Make this an option variable one can patch. 188 * But be warned: this must be a power of 2! 189 */ 190 u_int com_rbuf_size = COM_RING_SIZE; 191 192 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 193 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 194 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 195 196 static bus_addr_t comconsaddr; 197 static bus_space_tag_t comconstag; 198 static bus_space_handle_t comconsioh; 199 static int comconsattached; 200 static int comconsrate; 201 static tcflag_t comconscflag; 202 static struct cnm_state com_cnm_state; 203 204 static int ppscap = 205 PPS_TSFMT_TSPEC | 206 PPS_CAPTUREASSERT | 207 PPS_CAPTURECLEAR | 208 #ifdef PPS_SYNC 209 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 210 #endif /* PPS_SYNC */ 211 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 212 213 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 214 #ifdef __NO_SOFT_SERIAL_INTERRUPT 215 volatile int com_softintr_scheduled; 216 #endif 217 #endif 218 219 #ifdef KGDB 220 #include <sys/kgdb.h> 221 222 static bus_addr_t com_kgdb_addr; 223 static bus_space_tag_t com_kgdb_iot; 224 static bus_space_handle_t com_kgdb_ioh; 225 static int com_kgdb_attached; 226 227 int com_kgdb_getc __P((void *)); 228 void com_kgdb_putc __P((void *, int)); 229 #endif /* KGDB */ 230 231 #define COMUNIT_MASK 0x7ffff 232 #define COMDIALOUT_MASK 0x80000 233 234 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 235 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 236 237 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 238 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 239 240 #define BR BUS_SPACE_BARRIER_READ 241 #define BW BUS_SPACE_BARRIER_WRITE 242 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 243 244 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 245 246 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 247 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 248 249 #else 250 251 #define COM_LOCK(sc) 252 #define COM_UNLOCK(sc) 253 254 #endif 255 256 int 257 comspeed(speed, frequency) 258 long speed, frequency; 259 { 260 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 261 262 int x, err; 263 264 #if 0 265 if (speed == 0) 266 return (0); 267 #endif 268 if (speed <= 0) 269 return (-1); 270 x = divrnd(frequency / 16, speed); 271 if (x <= 0) 272 return (-1); 273 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 274 if (err < 0) 275 err = -err; 276 if (err > COM_TOLERANCE) 277 return (-1); 278 return (x); 279 280 #undef divrnd 281 } 282 283 #ifdef COM_DEBUG 284 int com_debug = 0; 285 286 void comstatus __P((struct com_softc *, char *)); 287 void 288 comstatus(sc, str) 289 struct com_softc *sc; 290 char *str; 291 { 292 struct tty *tp = sc->sc_tty; 293 294 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 295 sc->sc_dev.dv_xname, str, 296 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 297 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 298 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 299 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 300 sc->sc_tx_stopped ? "+" : "-"); 301 302 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 303 sc->sc_dev.dv_xname, str, 304 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 305 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 306 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 307 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 308 sc->sc_rx_flags); 309 } 310 #endif 311 312 int 313 comprobe1(iot, ioh) 314 bus_space_tag_t iot; 315 bus_space_handle_t ioh; 316 { 317 318 /* force access to id reg */ 319 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 320 bus_space_write_1(iot, ioh, com_iir, 0); 321 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 322 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 323 return (0); 324 325 return (1); 326 } 327 328 #ifdef COM_HAYESP 329 int 330 comprobeHAYESP(hayespioh, sc) 331 bus_space_handle_t hayespioh; 332 struct com_softc *sc; 333 { 334 char val, dips; 335 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 336 bus_space_tag_t iot = sc->sc_iot; 337 338 /* 339 * Hayes ESP cards have two iobases. One is for compatibility with 340 * 16550 serial chips, and at the same ISA PC base addresses. The 341 * other is for ESP-specific enhanced features, and lies at a 342 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 343 */ 344 345 /* Test for ESP signature */ 346 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 347 return (0); 348 349 /* 350 * ESP is present at ESP enhanced base address; unknown com port 351 */ 352 353 /* Get the dip-switch configurations */ 354 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 355 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 356 357 /* Determine which com port this ESP card services: bits 0,1 of */ 358 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 359 if (sc->sc_iobase != combaselist[dips & 0x03]) 360 return (0); 361 362 printf(": ESP"); 363 364 /* Check ESP Self Test bits. */ 365 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 366 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 369 if ((val & 0x70) < 0x20) { 370 printf("-old (%o)", val & 0x70); 371 /* we do not support the necessary features */ 372 return (0); 373 } 374 375 /* Check for ability to emulate 16550: bit 8 == 1 */ 376 if ((dips & 0x80) == 0) { 377 printf(" slave"); 378 /* XXX Does slave really mean no 16550 support?? */ 379 return (0); 380 } 381 382 /* 383 * If we made it this far, we are a full-featured ESP v2.0 (or 384 * better), at the correct com port address. 385 */ 386 387 SET(sc->sc_hwflags, COM_HW_HAYESP); 388 printf(", 1024 byte fifo\n"); 389 return (1); 390 } 391 #endif 392 393 static void 394 com_enable_debugport(sc) 395 struct com_softc *sc; 396 { 397 int s; 398 399 /* Turn on line break interrupt, set carrier. */ 400 s = splserial(); 401 COM_LOCK(sc); 402 sc->sc_ier = IER_ERXRDY; 403 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 404 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 406 COM_UNLOCK(sc); 407 splx(s); 408 } 409 410 void 411 com_attach_subr(sc) 412 struct com_softc *sc; 413 { 414 bus_addr_t iobase = sc->sc_iobase; 415 bus_space_tag_t iot = sc->sc_iot; 416 bus_space_handle_t ioh = sc->sc_ioh; 417 struct tty *tp; 418 #ifdef COM16650 419 u_int8_t lcr; 420 #endif 421 #ifdef COM_HAYESP 422 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 423 int *hayespp; 424 #endif 425 426 callout_init(&sc->sc_diag_callout); 427 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 428 simple_lock_init(&sc->sc_lock); 429 #endif 430 431 /* Disable interrupts before configuring the device. */ 432 sc->sc_ier = 0; 433 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 434 435 if (iot == comconstag && iobase == comconsaddr) { 436 comconsattached = 1; 437 438 /* Make sure the console is always "hardwired". */ 439 delay(1000); /* wait for output to finish */ 440 SET(sc->sc_hwflags, COM_HW_CONSOLE); 441 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 442 } 443 444 #ifdef COM_HAYESP 445 /* Look for a Hayes ESP board. */ 446 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 447 bus_space_handle_t hayespioh; 448 449 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 450 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 451 continue; 452 if (comprobeHAYESP(hayespioh, sc)) { 453 sc->sc_hayespioh = hayespioh; 454 sc->sc_fifolen = 1024; 455 456 break; 457 } 458 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 459 } 460 /* No ESP; look for other things. */ 461 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 462 #endif 463 sc->sc_fifolen = 1; 464 /* look for a NS 16550AF UART with FIFOs */ 465 bus_space_write_1(iot, ioh, com_fifo, 466 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 467 delay(100); 468 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 469 == IIR_FIFO_MASK) 470 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 471 == FIFO_TRIGGER_14) { 472 SET(sc->sc_hwflags, COM_HW_FIFO); 473 474 #ifdef COM16650 475 /* 476 * IIR changes into the EFR if LCR is set to LCR_EERS 477 * on 16650s. We also know IIR != 0 at this point. 478 * Write 0 into the EFR, and read it. If the result 479 * is 0, we have a 16650. 480 * 481 * Older 16650s were broken; the test to detect them 482 * is taken from the Linux driver. Apparently 483 * setting DLAB enable gives access to the EFR on 484 * these chips. 485 */ 486 lcr = bus_space_read_1(iot, ioh, com_lcr); 487 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 488 bus_space_write_1(iot, ioh, com_efr, 0); 489 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 490 bus_space_write_1(iot, ioh, com_lcr, 491 lcr | LCR_DLAB); 492 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 493 CLR(sc->sc_hwflags, COM_HW_FIFO); 494 sc->sc_fifolen = 0; 495 } else { 496 SET(sc->sc_hwflags, COM_HW_FLOW); 497 sc->sc_fifolen = 32; 498 } 499 } else 500 #endif 501 sc->sc_fifolen = 16; 502 503 #ifdef COM16650 504 bus_space_write_1(iot, ioh, com_lcr, lcr); 505 if (sc->sc_fifolen == 0) 506 printf(": st16650, broken fifo\n"); 507 else if (sc->sc_fifolen == 32) 508 printf(": st16650a, working fifo\n"); 509 else 510 #endif 511 printf(": ns16550a, working fifo\n"); 512 } else 513 printf(": ns16550, broken fifo\n"); 514 else 515 printf(": ns8250 or ns16450, no fifo\n"); 516 bus_space_write_1(iot, ioh, com_fifo, 0); 517 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 518 sc->sc_fifolen = 1; 519 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 520 } 521 #ifdef COM_HAYESP 522 } 523 #endif 524 525 tp = ttymalloc(); 526 tp->t_oproc = comstart; 527 tp->t_param = comparam; 528 tp->t_hwiflow = comhwiflow; 529 530 sc->sc_tty = tp; 531 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 532 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 533 sc->sc_rbavail = com_rbuf_size; 534 if (sc->sc_rbuf == NULL) { 535 printf("%s: unable to allocate ring buffer\n", 536 sc->sc_dev.dv_xname); 537 return; 538 } 539 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 540 541 tty_attach(tp); 542 543 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 544 SET(sc->sc_mcr, MCR_IENABLE); 545 546 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 547 int maj; 548 549 /* locate the major number */ 550 for (maj = 0; maj < nchrdev; maj++) 551 if (cdevsw[maj].d_open == comopen) 552 break; 553 554 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 555 556 printf("%s: console\n", sc->sc_dev.dv_xname); 557 } 558 559 #ifdef KGDB 560 /* 561 * Allow kgdb to "take over" this port. If this is 562 * the kgdb device, it has exclusive use. 563 */ 564 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 565 com_kgdb_attached = 1; 566 567 SET(sc->sc_hwflags, COM_HW_KGDB); 568 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 569 } 570 #endif 571 572 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 573 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 574 #endif 575 576 #if NRND > 0 && defined(RND_COM) 577 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 578 RND_TYPE_TTY, 0); 579 #endif 580 581 /* if there are no enable/disable functions, assume the device 582 is always enabled */ 583 if (!sc->enable) 584 sc->enabled = 1; 585 586 com_config(sc); 587 588 SET(sc->sc_hwflags, COM_HW_DEV_OK); 589 } 590 591 void 592 com_config(sc) 593 struct com_softc *sc; 594 { 595 bus_space_tag_t iot = sc->sc_iot; 596 bus_space_handle_t ioh = sc->sc_ioh; 597 598 /* Disable interrupts before configuring the device. */ 599 sc->sc_ier = 0; 600 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 601 602 #ifdef COM_HAYESP 603 /* Look for a Hayes ESP board. */ 604 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 605 sc->sc_fifolen = 1024; 606 607 /* Set 16550 compatibility mode */ 608 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 609 HAYESP_SETMODE); 610 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 611 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 612 HAYESP_MODE_SCALE); 613 614 /* Set RTS/CTS flow control */ 615 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 616 HAYESP_SETFLOWTYPE); 617 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 618 HAYESP_FLOW_RTS); 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 620 HAYESP_FLOW_CTS); 621 622 /* Set flow control levels */ 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 624 HAYESP_SETRXFLOW); 625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 626 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 628 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 630 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 632 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 633 } 634 #endif 635 636 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 637 com_enable_debugport(sc); 638 } 639 640 int 641 com_detach(self, flags) 642 struct device *self; 643 int flags; 644 { 645 struct com_softc *sc = (struct com_softc *)self; 646 int maj, mn; 647 648 /* locate the major number */ 649 for (maj = 0; maj < nchrdev; maj++) 650 if (cdevsw[maj].d_open == comopen) 651 break; 652 653 /* Nuke the vnodes for any open instances. */ 654 mn = self->dv_unit; 655 vdevgone(maj, mn, mn, VCHR); 656 657 mn |= COMDIALOUT_MASK; 658 vdevgone(maj, mn, mn, VCHR); 659 660 /* Free the receive buffer. */ 661 free(sc->sc_rbuf, M_DEVBUF); 662 663 /* Detach and free the tty. */ 664 tty_detach(sc->sc_tty); 665 ttyfree(sc->sc_tty); 666 667 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 668 /* Unhook the soft interrupt handler. */ 669 softintr_disestablish(sc->sc_si); 670 #endif 671 672 #if NRND > 0 && defined(RND_COM) 673 /* Unhook the entropy source. */ 674 rnd_detach_source(&sc->rnd_source); 675 #endif 676 677 return (0); 678 } 679 680 int 681 com_activate(self, act) 682 struct device *self; 683 enum devact act; 684 { 685 struct com_softc *sc = (struct com_softc *)self; 686 int s, rv = 0; 687 688 s = splserial(); 689 COM_LOCK(sc); 690 switch (act) { 691 case DVACT_ACTIVATE: 692 rv = EOPNOTSUPP; 693 break; 694 695 case DVACT_DEACTIVATE: 696 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 697 rv = EBUSY; 698 break; 699 } 700 701 if (sc->disable != NULL && sc->enabled != 0) { 702 (*sc->disable)(sc); 703 sc->enabled = 0; 704 } 705 break; 706 } 707 708 COM_UNLOCK(sc); 709 splx(s); 710 return (rv); 711 } 712 713 void 714 com_shutdown(sc) 715 struct com_softc *sc; 716 { 717 struct tty *tp = sc->sc_tty; 718 int s; 719 720 s = splserial(); 721 COM_LOCK(sc); 722 723 /* If we were asserting flow control, then deassert it. */ 724 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 725 com_hwiflow(sc); 726 727 /* Clear any break condition set with TIOCSBRK. */ 728 com_break(sc, 0); 729 730 /* Turn off PPS capture on last close. */ 731 sc->sc_ppsmask = 0; 732 sc->ppsparam.mode = 0; 733 734 /* 735 * Hang up if necessary. Wait a bit, so the other side has time to 736 * notice even if we immediately open the port again. 737 * Avoid tsleeping above splhigh(). 738 */ 739 if (ISSET(tp->t_cflag, HUPCL)) { 740 com_modem(sc, 0); 741 COM_UNLOCK(sc); 742 splx(s); 743 /* XXX tsleep will only timeout */ 744 (void) tsleep(sc, TTIPRI, ttclos, hz); 745 s = splserial(); 746 COM_LOCK(sc); 747 } 748 749 /* Turn off interrupts. */ 750 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 751 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 752 else 753 sc->sc_ier = 0; 754 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 755 756 if (sc->disable) { 757 #ifdef DIAGNOSTIC 758 if (!sc->enabled) 759 panic("com_shutdown: not enabled?"); 760 #endif 761 (*sc->disable)(sc); 762 sc->enabled = 0; 763 } 764 COM_UNLOCK(sc); 765 splx(s); 766 } 767 768 int 769 comopen(dev, flag, mode, p) 770 dev_t dev; 771 int flag, mode; 772 struct proc *p; 773 { 774 struct com_softc *sc; 775 struct tty *tp; 776 int s, s2; 777 int error; 778 779 sc = device_lookup(&com_cd, COMUNIT(dev)); 780 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 781 sc->sc_rbuf == NULL) 782 return (ENXIO); 783 784 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 785 return (ENXIO); 786 787 #ifdef KGDB 788 /* 789 * If this is the kgdb port, no other use is permitted. 790 */ 791 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 792 return (EBUSY); 793 #endif 794 795 tp = sc->sc_tty; 796 797 if (ISSET(tp->t_state, TS_ISOPEN) && 798 ISSET(tp->t_state, TS_XCLUDE) && 799 p->p_ucred->cr_uid != 0) 800 return (EBUSY); 801 802 s = spltty(); 803 804 /* 805 * Do the following iff this is a first open. 806 */ 807 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 808 struct termios t; 809 810 tp->t_dev = dev; 811 812 s2 = splserial(); 813 COM_LOCK(sc); 814 815 if (sc->enable) { 816 if ((*sc->enable)(sc)) { 817 COM_UNLOCK(sc); 818 splx(s2); 819 splx(s); 820 printf("%s: device enable failed\n", 821 sc->sc_dev.dv_xname); 822 return (EIO); 823 } 824 sc->enabled = 1; 825 com_config(sc); 826 } 827 828 /* Turn on interrupts. */ 829 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 830 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 831 832 /* Fetch the current modem control status, needed later. */ 833 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 834 835 /* Clear PPS capture state on first open. */ 836 sc->sc_ppsmask = 0; 837 sc->ppsparam.mode = 0; 838 839 COM_UNLOCK(sc); 840 splx(s2); 841 842 /* 843 * Initialize the termios status to the defaults. Add in the 844 * sticky bits from TIOCSFLAGS. 845 */ 846 t.c_ispeed = 0; 847 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 848 t.c_ospeed = comconsrate; 849 t.c_cflag = comconscflag; 850 } else { 851 t.c_ospeed = TTYDEF_SPEED; 852 t.c_cflag = TTYDEF_CFLAG; 853 } 854 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 855 SET(t.c_cflag, CLOCAL); 856 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 857 SET(t.c_cflag, CRTSCTS); 858 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 859 SET(t.c_cflag, MDMBUF); 860 /* Make sure comparam() will do something. */ 861 tp->t_ospeed = 0; 862 (void) comparam(tp, &t); 863 tp->t_iflag = TTYDEF_IFLAG; 864 tp->t_oflag = TTYDEF_OFLAG; 865 tp->t_lflag = TTYDEF_LFLAG; 866 ttychars(tp); 867 ttsetwater(tp); 868 869 s2 = splserial(); 870 COM_LOCK(sc); 871 872 /* 873 * Turn on DTR. We must always do this, even if carrier is not 874 * present, because otherwise we'd have to use TIOCSDTR 875 * immediately after setting CLOCAL, which applications do not 876 * expect. We always assert DTR while the device is open 877 * unless explicitly requested to deassert it. 878 */ 879 com_modem(sc, 1); 880 881 /* Clear the input ring, and unblock. */ 882 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 883 sc->sc_rbavail = com_rbuf_size; 884 com_iflush(sc); 885 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 886 com_hwiflow(sc); 887 888 #ifdef COM_DEBUG 889 if (com_debug) 890 comstatus(sc, "comopen "); 891 #endif 892 893 COM_UNLOCK(sc); 894 splx(s2); 895 } 896 897 splx(s); 898 899 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 900 if (error) 901 goto bad; 902 903 error = (*tp->t_linesw->l_open)(dev, tp); 904 if (error) 905 goto bad; 906 907 return (0); 908 909 bad: 910 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 911 /* 912 * We failed to open the device, and nobody else had it opened. 913 * Clean up the state as appropriate. 914 */ 915 com_shutdown(sc); 916 } 917 918 return (error); 919 } 920 921 int 922 comclose(dev, flag, mode, p) 923 dev_t dev; 924 int flag, mode; 925 struct proc *p; 926 { 927 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 928 struct tty *tp = sc->sc_tty; 929 930 /* XXX This is for cons.c. */ 931 if (!ISSET(tp->t_state, TS_ISOPEN)) 932 return (0); 933 934 (*tp->t_linesw->l_close)(tp, flag); 935 ttyclose(tp); 936 937 if (COM_ISALIVE(sc) == 0) 938 return (0); 939 940 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 941 /* 942 * Although we got a last close, the device may still be in 943 * use; e.g. if this was the dialout node, and there are still 944 * processes waiting for carrier on the non-dialout node. 945 */ 946 com_shutdown(sc); 947 } 948 949 return (0); 950 } 951 952 int 953 comread(dev, uio, flag) 954 dev_t dev; 955 struct uio *uio; 956 int flag; 957 { 958 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 959 struct tty *tp = sc->sc_tty; 960 961 if (COM_ISALIVE(sc) == 0) 962 return (EIO); 963 964 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 965 } 966 967 int 968 comwrite(dev, uio, flag) 969 dev_t dev; 970 struct uio *uio; 971 int flag; 972 { 973 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 974 struct tty *tp = sc->sc_tty; 975 976 if (COM_ISALIVE(sc) == 0) 977 return (EIO); 978 979 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 980 } 981 982 int 983 compoll(dev, events, p) 984 dev_t dev; 985 int events; 986 struct proc *p; 987 { 988 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 989 struct tty *tp = sc->sc_tty; 990 991 if (COM_ISALIVE(sc) == 0) 992 return (EIO); 993 994 return ((*tp->t_linesw->l_poll)(tp, events, p)); 995 } 996 997 struct tty * 998 comtty(dev) 999 dev_t dev; 1000 { 1001 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1002 struct tty *tp = sc->sc_tty; 1003 1004 return (tp); 1005 } 1006 1007 int 1008 comioctl(dev, cmd, data, flag, p) 1009 dev_t dev; 1010 u_long cmd; 1011 caddr_t data; 1012 int flag; 1013 struct proc *p; 1014 { 1015 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1016 struct tty *tp = sc->sc_tty; 1017 int error; 1018 int s; 1019 1020 if (COM_ISALIVE(sc) == 0) 1021 return (EIO); 1022 1023 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1024 if (error >= 0) 1025 return (error); 1026 1027 error = ttioctl(tp, cmd, data, flag, p); 1028 if (error >= 0) 1029 return (error); 1030 1031 error = 0; 1032 1033 s = splserial(); 1034 COM_LOCK(sc); 1035 1036 switch (cmd) { 1037 case TIOCSBRK: 1038 com_break(sc, 1); 1039 break; 1040 1041 case TIOCCBRK: 1042 com_break(sc, 0); 1043 break; 1044 1045 case TIOCSDTR: 1046 com_modem(sc, 1); 1047 break; 1048 1049 case TIOCCDTR: 1050 com_modem(sc, 0); 1051 break; 1052 1053 case TIOCGFLAGS: 1054 *(int *)data = sc->sc_swflags; 1055 break; 1056 1057 case TIOCSFLAGS: 1058 error = suser(p->p_ucred, &p->p_acflag); 1059 if (error) 1060 break; 1061 sc->sc_swflags = *(int *)data; 1062 break; 1063 1064 case TIOCMSET: 1065 case TIOCMBIS: 1066 case TIOCMBIC: 1067 tiocm_to_com(sc, cmd, *(int *)data); 1068 break; 1069 1070 case TIOCMGET: 1071 *(int *)data = com_to_tiocm(sc); 1072 break; 1073 1074 case PPS_IOC_CREATE: 1075 break; 1076 1077 case PPS_IOC_DESTROY: 1078 break; 1079 1080 case PPS_IOC_GETPARAMS: { 1081 pps_params_t *pp; 1082 pp = (pps_params_t *)data; 1083 *pp = sc->ppsparam; 1084 break; 1085 } 1086 1087 case PPS_IOC_SETPARAMS: { 1088 pps_params_t *pp; 1089 int mode; 1090 pp = (pps_params_t *)data; 1091 if (pp->mode & ~ppscap) { 1092 error = EINVAL; 1093 break; 1094 } 1095 sc->ppsparam = *pp; 1096 /* 1097 * Compute msr masks from user-specified timestamp state. 1098 */ 1099 mode = sc->ppsparam.mode; 1100 #ifdef PPS_SYNC 1101 if (mode & PPS_HARDPPSONASSERT) { 1102 mode |= PPS_CAPTUREASSERT; 1103 /* XXX revoke any previous HARDPPS source */ 1104 } 1105 if (mode & PPS_HARDPPSONCLEAR) { 1106 mode |= PPS_CAPTURECLEAR; 1107 /* XXX revoke any previous HARDPPS source */ 1108 } 1109 #endif /* PPS_SYNC */ 1110 switch (mode & PPS_CAPTUREBOTH) { 1111 case 0: 1112 sc->sc_ppsmask = 0; 1113 break; 1114 1115 case PPS_CAPTUREASSERT: 1116 sc->sc_ppsmask = MSR_DCD; 1117 sc->sc_ppsassert = MSR_DCD; 1118 sc->sc_ppsclear = -1; 1119 break; 1120 1121 case PPS_CAPTURECLEAR: 1122 sc->sc_ppsmask = MSR_DCD; 1123 sc->sc_ppsassert = -1; 1124 sc->sc_ppsclear = 0; 1125 break; 1126 1127 case PPS_CAPTUREBOTH: 1128 sc->sc_ppsmask = MSR_DCD; 1129 sc->sc_ppsassert = MSR_DCD; 1130 sc->sc_ppsclear = 0; 1131 break; 1132 1133 default: 1134 error = EINVAL; 1135 break; 1136 } 1137 break; 1138 } 1139 1140 case PPS_IOC_GETCAP: 1141 *(int*)data = ppscap; 1142 break; 1143 1144 case PPS_IOC_FETCH: { 1145 pps_info_t *pi; 1146 pi = (pps_info_t *)data; 1147 *pi = sc->ppsinfo; 1148 break; 1149 } 1150 1151 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1152 /* 1153 * Some GPS clocks models use the falling rather than 1154 * rising edge as the on-the-second signal. 1155 * The old API has no way to specify PPS polarity. 1156 */ 1157 sc->sc_ppsmask = MSR_DCD; 1158 #ifndef PPS_TRAILING_EDGE 1159 sc->sc_ppsassert = MSR_DCD; 1160 sc->sc_ppsclear = -1; 1161 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1162 &sc->ppsinfo.assert_timestamp); 1163 #else 1164 sc->sc_ppsassert = -1 1165 sc->sc_ppsclear = 0; 1166 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1167 &sc->ppsinfo.clear_timestamp); 1168 #endif 1169 break; 1170 1171 default: 1172 error = ENOTTY; 1173 break; 1174 } 1175 1176 COM_UNLOCK(sc); 1177 splx(s); 1178 1179 #ifdef COM_DEBUG 1180 if (com_debug) 1181 comstatus(sc, "comioctl "); 1182 #endif 1183 1184 return (error); 1185 } 1186 1187 integrate void 1188 com_schedrx(sc) 1189 struct com_softc *sc; 1190 { 1191 1192 sc->sc_rx_ready = 1; 1193 1194 /* Wake up the poller. */ 1195 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1196 softintr_schedule(sc->sc_si); 1197 #else 1198 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1199 setsoftserial(); 1200 #else 1201 if (!com_softintr_scheduled) { 1202 com_softintr_scheduled = 1; 1203 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1204 } 1205 #endif 1206 #endif 1207 } 1208 1209 void 1210 com_break(sc, onoff) 1211 struct com_softc *sc; 1212 int onoff; 1213 { 1214 1215 if (onoff) 1216 SET(sc->sc_lcr, LCR_SBREAK); 1217 else 1218 CLR(sc->sc_lcr, LCR_SBREAK); 1219 1220 if (!sc->sc_heldchange) { 1221 if (sc->sc_tx_busy) { 1222 sc->sc_heldtbc = sc->sc_tbc; 1223 sc->sc_tbc = 0; 1224 sc->sc_heldchange = 1; 1225 } else 1226 com_loadchannelregs(sc); 1227 } 1228 } 1229 1230 void 1231 com_modem(sc, onoff) 1232 struct com_softc *sc; 1233 int onoff; 1234 { 1235 1236 if (sc->sc_mcr_dtr == 0) 1237 return; 1238 1239 if (onoff) 1240 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1241 else 1242 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1243 1244 if (!sc->sc_heldchange) { 1245 if (sc->sc_tx_busy) { 1246 sc->sc_heldtbc = sc->sc_tbc; 1247 sc->sc_tbc = 0; 1248 sc->sc_heldchange = 1; 1249 } else 1250 com_loadchannelregs(sc); 1251 } 1252 } 1253 1254 void 1255 tiocm_to_com(sc, how, ttybits) 1256 struct com_softc *sc; 1257 u_long how; 1258 int ttybits; 1259 { 1260 u_char combits; 1261 1262 combits = 0; 1263 if (ISSET(ttybits, TIOCM_DTR)) 1264 SET(combits, MCR_DTR); 1265 if (ISSET(ttybits, TIOCM_RTS)) 1266 SET(combits, MCR_RTS); 1267 1268 switch (how) { 1269 case TIOCMBIC: 1270 CLR(sc->sc_mcr, combits); 1271 break; 1272 1273 case TIOCMBIS: 1274 SET(sc->sc_mcr, combits); 1275 break; 1276 1277 case TIOCMSET: 1278 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1279 SET(sc->sc_mcr, combits); 1280 break; 1281 } 1282 1283 if (!sc->sc_heldchange) { 1284 if (sc->sc_tx_busy) { 1285 sc->sc_heldtbc = sc->sc_tbc; 1286 sc->sc_tbc = 0; 1287 sc->sc_heldchange = 1; 1288 } else 1289 com_loadchannelregs(sc); 1290 } 1291 } 1292 1293 int 1294 com_to_tiocm(sc) 1295 struct com_softc *sc; 1296 { 1297 u_char combits; 1298 int ttybits = 0; 1299 1300 combits = sc->sc_mcr; 1301 if (ISSET(combits, MCR_DTR)) 1302 SET(ttybits, TIOCM_DTR); 1303 if (ISSET(combits, MCR_RTS)) 1304 SET(ttybits, TIOCM_RTS); 1305 1306 combits = sc->sc_msr; 1307 if (ISSET(combits, MSR_DCD)) 1308 SET(ttybits, TIOCM_CD); 1309 if (ISSET(combits, MSR_CTS)) 1310 SET(ttybits, TIOCM_CTS); 1311 if (ISSET(combits, MSR_DSR)) 1312 SET(ttybits, TIOCM_DSR); 1313 if (ISSET(combits, MSR_RI | MSR_TERI)) 1314 SET(ttybits, TIOCM_RI); 1315 1316 if (sc->sc_ier != 0) 1317 SET(ttybits, TIOCM_LE); 1318 1319 return (ttybits); 1320 } 1321 1322 static u_char 1323 cflag2lcr(cflag) 1324 tcflag_t cflag; 1325 { 1326 u_char lcr = 0; 1327 1328 switch (ISSET(cflag, CSIZE)) { 1329 case CS5: 1330 SET(lcr, LCR_5BITS); 1331 break; 1332 case CS6: 1333 SET(lcr, LCR_6BITS); 1334 break; 1335 case CS7: 1336 SET(lcr, LCR_7BITS); 1337 break; 1338 case CS8: 1339 SET(lcr, LCR_8BITS); 1340 break; 1341 } 1342 if (ISSET(cflag, PARENB)) { 1343 SET(lcr, LCR_PENAB); 1344 if (!ISSET(cflag, PARODD)) 1345 SET(lcr, LCR_PEVEN); 1346 } 1347 if (ISSET(cflag, CSTOPB)) 1348 SET(lcr, LCR_STOPB); 1349 1350 return (lcr); 1351 } 1352 1353 int 1354 comparam(tp, t) 1355 struct tty *tp; 1356 struct termios *t; 1357 { 1358 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1359 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1360 u_char lcr; 1361 int s; 1362 1363 if (COM_ISALIVE(sc) == 0) 1364 return (EIO); 1365 1366 /* Check requested parameters. */ 1367 if (ospeed < 0) 1368 return (EINVAL); 1369 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1370 return (EINVAL); 1371 1372 /* 1373 * For the console, always force CLOCAL and !HUPCL, so that the port 1374 * is always active. 1375 */ 1376 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1377 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1378 SET(t->c_cflag, CLOCAL); 1379 CLR(t->c_cflag, HUPCL); 1380 } 1381 1382 /* 1383 * If there were no changes, don't do anything. This avoids dropping 1384 * input and improves performance when all we did was frob things like 1385 * VMIN and VTIME. 1386 */ 1387 if (tp->t_ospeed == t->c_ospeed && 1388 tp->t_cflag == t->c_cflag) 1389 return (0); 1390 1391 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1392 1393 s = splserial(); 1394 COM_LOCK(sc); 1395 1396 sc->sc_lcr = lcr; 1397 1398 /* 1399 * If we're not in a mode that assumes a connection is present, then 1400 * ignore carrier changes. 1401 */ 1402 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1403 sc->sc_msr_dcd = 0; 1404 else 1405 sc->sc_msr_dcd = MSR_DCD; 1406 /* 1407 * Set the flow control pins depending on the current flow control 1408 * mode. 1409 */ 1410 if (ISSET(t->c_cflag, CRTSCTS)) { 1411 sc->sc_mcr_dtr = MCR_DTR; 1412 sc->sc_mcr_rts = MCR_RTS; 1413 sc->sc_msr_cts = MSR_CTS; 1414 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1415 } else if (ISSET(t->c_cflag, MDMBUF)) { 1416 /* 1417 * For DTR/DCD flow control, make sure we don't toggle DTR for 1418 * carrier detection. 1419 */ 1420 sc->sc_mcr_dtr = 0; 1421 sc->sc_mcr_rts = MCR_DTR; 1422 sc->sc_msr_cts = MSR_DCD; 1423 sc->sc_efr = 0; 1424 } else { 1425 /* 1426 * If no flow control, then always set RTS. This will make 1427 * the other side happy if it mistakenly thinks we're doing 1428 * RTS/CTS flow control. 1429 */ 1430 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1431 sc->sc_mcr_rts = 0; 1432 sc->sc_msr_cts = 0; 1433 sc->sc_efr = 0; 1434 if (ISSET(sc->sc_mcr, MCR_DTR)) 1435 SET(sc->sc_mcr, MCR_RTS); 1436 else 1437 CLR(sc->sc_mcr, MCR_RTS); 1438 } 1439 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1440 1441 #if 0 1442 if (ospeed == 0) 1443 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1444 else 1445 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1446 #endif 1447 1448 sc->sc_dlbl = ospeed; 1449 sc->sc_dlbh = ospeed >> 8; 1450 1451 /* 1452 * Set the FIFO threshold based on the receive speed. 1453 * 1454 * * If it's a low speed, it's probably a mouse or some other 1455 * interactive device, so set the threshold low. 1456 * * If it's a high speed, trim the trigger level down to prevent 1457 * overflows. 1458 * * Otherwise set it a bit higher. 1459 */ 1460 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1461 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1462 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1463 sc->sc_fifo = FIFO_ENABLE | 1464 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1465 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1466 else 1467 sc->sc_fifo = 0; 1468 1469 /* And copy to tty. */ 1470 tp->t_ispeed = 0; 1471 tp->t_ospeed = t->c_ospeed; 1472 tp->t_cflag = t->c_cflag; 1473 1474 if (!sc->sc_heldchange) { 1475 if (sc->sc_tx_busy) { 1476 sc->sc_heldtbc = sc->sc_tbc; 1477 sc->sc_tbc = 0; 1478 sc->sc_heldchange = 1; 1479 } else 1480 com_loadchannelregs(sc); 1481 } 1482 1483 if (!ISSET(t->c_cflag, CHWFLOW)) { 1484 /* Disable the high water mark. */ 1485 sc->sc_r_hiwat = 0; 1486 sc->sc_r_lowat = 0; 1487 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1488 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1489 com_schedrx(sc); 1490 } 1491 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1492 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1493 com_hwiflow(sc); 1494 } 1495 } else { 1496 sc->sc_r_hiwat = com_rbuf_hiwat; 1497 sc->sc_r_lowat = com_rbuf_lowat; 1498 } 1499 1500 COM_UNLOCK(sc); 1501 splx(s); 1502 1503 /* 1504 * Update the tty layer's idea of the carrier bit, in case we changed 1505 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1506 * explicit request. 1507 */ 1508 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1509 1510 #ifdef COM_DEBUG 1511 if (com_debug) 1512 comstatus(sc, "comparam "); 1513 #endif 1514 1515 if (!ISSET(t->c_cflag, CHWFLOW)) { 1516 if (sc->sc_tx_stopped) { 1517 sc->sc_tx_stopped = 0; 1518 comstart(tp); 1519 } 1520 } 1521 1522 return (0); 1523 } 1524 1525 void 1526 com_iflush(sc) 1527 struct com_softc *sc; 1528 { 1529 bus_space_tag_t iot = sc->sc_iot; 1530 bus_space_handle_t ioh = sc->sc_ioh; 1531 #ifdef DIAGNOSTIC 1532 int reg; 1533 #endif 1534 int timo; 1535 1536 #ifdef DIAGNOSTIC 1537 reg = 0xffff; 1538 #endif 1539 timo = 50000; 1540 /* flush any pending I/O */ 1541 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1542 && --timo) 1543 #ifdef DIAGNOSTIC 1544 reg = 1545 #else 1546 (void) 1547 #endif 1548 bus_space_read_1(iot, ioh, com_data); 1549 #ifdef DIAGNOSTIC 1550 if (!timo) 1551 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1552 reg); 1553 #endif 1554 } 1555 1556 void 1557 com_loadchannelregs(sc) 1558 struct com_softc *sc; 1559 { 1560 bus_space_tag_t iot = sc->sc_iot; 1561 bus_space_handle_t ioh = sc->sc_ioh; 1562 1563 /* XXXXX necessary? */ 1564 com_iflush(sc); 1565 1566 bus_space_write_1(iot, ioh, com_ier, 0); 1567 1568 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1569 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1570 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1571 } 1572 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1573 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1574 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1575 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1576 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1577 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1578 1579 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1580 } 1581 1582 int 1583 comhwiflow(tp, block) 1584 struct tty *tp; 1585 int block; 1586 { 1587 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1588 int s; 1589 1590 if (COM_ISALIVE(sc) == 0) 1591 return (0); 1592 1593 if (sc->sc_mcr_rts == 0) 1594 return (0); 1595 1596 s = splserial(); 1597 COM_LOCK(sc); 1598 1599 if (block) { 1600 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1601 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1602 com_hwiflow(sc); 1603 } 1604 } else { 1605 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1606 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1607 com_schedrx(sc); 1608 } 1609 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1610 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1611 com_hwiflow(sc); 1612 } 1613 } 1614 1615 COM_UNLOCK(sc); 1616 splx(s); 1617 return (1); 1618 } 1619 1620 /* 1621 * (un)block input via hw flowcontrol 1622 */ 1623 void 1624 com_hwiflow(sc) 1625 struct com_softc *sc; 1626 { 1627 bus_space_tag_t iot = sc->sc_iot; 1628 bus_space_handle_t ioh = sc->sc_ioh; 1629 1630 if (sc->sc_mcr_rts == 0) 1631 return; 1632 1633 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1634 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1635 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1636 } else { 1637 SET(sc->sc_mcr, sc->sc_mcr_rts); 1638 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1639 } 1640 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1641 } 1642 1643 1644 void 1645 comstart(tp) 1646 struct tty *tp; 1647 { 1648 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1649 bus_space_tag_t iot = sc->sc_iot; 1650 bus_space_handle_t ioh = sc->sc_ioh; 1651 int s; 1652 1653 if (COM_ISALIVE(sc) == 0) 1654 return; 1655 1656 s = spltty(); 1657 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1658 goto out; 1659 if (sc->sc_tx_stopped) 1660 goto out; 1661 1662 if (tp->t_outq.c_cc <= tp->t_lowat) { 1663 if (ISSET(tp->t_state, TS_ASLEEP)) { 1664 CLR(tp->t_state, TS_ASLEEP); 1665 wakeup(&tp->t_outq); 1666 } 1667 selwakeup(&tp->t_wsel); 1668 if (tp->t_outq.c_cc == 0) 1669 goto out; 1670 } 1671 1672 /* Grab the first contiguous region of buffer space. */ 1673 { 1674 u_char *tba; 1675 int tbc; 1676 1677 tba = tp->t_outq.c_cf; 1678 tbc = ndqb(&tp->t_outq, 0); 1679 1680 (void)splserial(); 1681 COM_LOCK(sc); 1682 1683 sc->sc_tba = tba; 1684 sc->sc_tbc = tbc; 1685 } 1686 1687 SET(tp->t_state, TS_BUSY); 1688 sc->sc_tx_busy = 1; 1689 1690 /* Enable transmit completion interrupts if necessary. */ 1691 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1692 SET(sc->sc_ier, IER_ETXRDY); 1693 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1694 } 1695 1696 /* Output the first chunk of the contiguous buffer. */ 1697 { 1698 int n; 1699 1700 n = sc->sc_tbc; 1701 if (n > sc->sc_fifolen) 1702 n = sc->sc_fifolen; 1703 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1704 sc->sc_tbc -= n; 1705 sc->sc_tba += n; 1706 } 1707 COM_UNLOCK(sc); 1708 out: 1709 splx(s); 1710 return; 1711 } 1712 1713 /* 1714 * Stop output on a line. 1715 */ 1716 void 1717 comstop(tp, flag) 1718 struct tty *tp; 1719 int flag; 1720 { 1721 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1722 int s; 1723 1724 s = splserial(); 1725 COM_LOCK(sc); 1726 if (ISSET(tp->t_state, TS_BUSY)) { 1727 /* Stop transmitting at the next chunk. */ 1728 sc->sc_tbc = 0; 1729 sc->sc_heldtbc = 0; 1730 if (!ISSET(tp->t_state, TS_TTSTOP)) 1731 SET(tp->t_state, TS_FLUSH); 1732 } 1733 COM_UNLOCK(sc); 1734 splx(s); 1735 } 1736 1737 void 1738 comdiag(arg) 1739 void *arg; 1740 { 1741 struct com_softc *sc = arg; 1742 int overflows, floods; 1743 int s; 1744 1745 s = splserial(); 1746 COM_LOCK(sc); 1747 overflows = sc->sc_overflows; 1748 sc->sc_overflows = 0; 1749 floods = sc->sc_floods; 1750 sc->sc_floods = 0; 1751 sc->sc_errors = 0; 1752 COM_UNLOCK(sc); 1753 splx(s); 1754 1755 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1756 sc->sc_dev.dv_xname, 1757 overflows, overflows == 1 ? "" : "s", 1758 floods, floods == 1 ? "" : "s"); 1759 } 1760 1761 integrate void 1762 com_rxsoft(sc, tp) 1763 struct com_softc *sc; 1764 struct tty *tp; 1765 { 1766 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1767 u_char *get, *end; 1768 u_int cc, scc; 1769 u_char lsr; 1770 int code; 1771 int s; 1772 1773 end = sc->sc_ebuf; 1774 get = sc->sc_rbget; 1775 scc = cc = com_rbuf_size - sc->sc_rbavail; 1776 1777 if (cc == com_rbuf_size) { 1778 sc->sc_floods++; 1779 if (sc->sc_errors++ == 0) 1780 callout_reset(&sc->sc_diag_callout, 60 * hz, 1781 comdiag, sc); 1782 } 1783 1784 while (cc) { 1785 code = get[0]; 1786 lsr = get[1]; 1787 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1788 if (ISSET(lsr, LSR_OE)) { 1789 sc->sc_overflows++; 1790 if (sc->sc_errors++ == 0) 1791 callout_reset(&sc->sc_diag_callout, 1792 60 * hz, comdiag, sc); 1793 } 1794 if (ISSET(lsr, LSR_BI | LSR_FE)) 1795 SET(code, TTY_FE); 1796 if (ISSET(lsr, LSR_PE)) 1797 SET(code, TTY_PE); 1798 } 1799 if ((*rint)(code, tp) == -1) { 1800 /* 1801 * The line discipline's buffer is out of space. 1802 */ 1803 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1804 /* 1805 * We're either not using flow control, or the 1806 * line discipline didn't tell us to block for 1807 * some reason. Either way, we have no way to 1808 * know when there's more space available, so 1809 * just drop the rest of the data. 1810 */ 1811 get += cc << 1; 1812 if (get >= end) 1813 get -= com_rbuf_size << 1; 1814 cc = 0; 1815 } else { 1816 /* 1817 * Don't schedule any more receive processing 1818 * until the line discipline tells us there's 1819 * space available (through comhwiflow()). 1820 * Leave the rest of the data in the input 1821 * buffer. 1822 */ 1823 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1824 } 1825 break; 1826 } 1827 get += 2; 1828 if (get >= end) 1829 get = sc->sc_rbuf; 1830 cc--; 1831 } 1832 1833 if (cc != scc) { 1834 sc->sc_rbget = get; 1835 s = splserial(); 1836 COM_LOCK(sc); 1837 1838 cc = sc->sc_rbavail += scc - cc; 1839 /* Buffers should be ok again, release possible block. */ 1840 if (cc >= sc->sc_r_lowat) { 1841 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1842 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1843 SET(sc->sc_ier, IER_ERXRDY); 1844 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1845 } 1846 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1847 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1848 com_hwiflow(sc); 1849 } 1850 } 1851 COM_UNLOCK(sc); 1852 splx(s); 1853 } 1854 } 1855 1856 integrate void 1857 com_txsoft(sc, tp) 1858 struct com_softc *sc; 1859 struct tty *tp; 1860 { 1861 1862 CLR(tp->t_state, TS_BUSY); 1863 if (ISSET(tp->t_state, TS_FLUSH)) 1864 CLR(tp->t_state, TS_FLUSH); 1865 else 1866 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1867 (*tp->t_linesw->l_start)(tp); 1868 } 1869 1870 integrate void 1871 com_stsoft(sc, tp) 1872 struct com_softc *sc; 1873 struct tty *tp; 1874 { 1875 u_char msr, delta; 1876 int s; 1877 1878 s = splserial(); 1879 COM_LOCK(sc); 1880 msr = sc->sc_msr; 1881 delta = sc->sc_msr_delta; 1882 sc->sc_msr_delta = 0; 1883 COM_UNLOCK(sc); 1884 splx(s); 1885 1886 if (ISSET(delta, sc->sc_msr_dcd)) { 1887 /* 1888 * Inform the tty layer that carrier detect changed. 1889 */ 1890 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1891 } 1892 1893 if (ISSET(delta, sc->sc_msr_cts)) { 1894 /* Block or unblock output according to flow control. */ 1895 if (ISSET(msr, sc->sc_msr_cts)) { 1896 sc->sc_tx_stopped = 0; 1897 (*tp->t_linesw->l_start)(tp); 1898 } else { 1899 sc->sc_tx_stopped = 1; 1900 } 1901 } 1902 1903 #ifdef COM_DEBUG 1904 if (com_debug) 1905 comstatus(sc, "com_stsoft"); 1906 #endif 1907 } 1908 1909 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1910 void 1911 comsoft(arg) 1912 void *arg; 1913 { 1914 struct com_softc *sc = arg; 1915 struct tty *tp; 1916 1917 if (COM_ISALIVE(sc) == 0) 1918 return; 1919 1920 { 1921 #else 1922 void 1923 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1924 comsoft() 1925 #else 1926 comsoft(arg) 1927 void *arg; 1928 #endif 1929 { 1930 struct com_softc *sc; 1931 struct tty *tp; 1932 int unit; 1933 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1934 int s; 1935 1936 s = splsoftserial(); 1937 com_softintr_scheduled = 0; 1938 #endif 1939 1940 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1941 sc = device_lookup(&com_cd, unit); 1942 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1943 continue; 1944 1945 if (COM_ISALIVE(sc) == 0) 1946 continue; 1947 1948 tp = sc->sc_tty; 1949 if (tp == NULL) 1950 continue; 1951 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1952 continue; 1953 #endif 1954 tp = sc->sc_tty; 1955 1956 if (sc->sc_rx_ready) { 1957 sc->sc_rx_ready = 0; 1958 com_rxsoft(sc, tp); 1959 } 1960 1961 if (sc->sc_st_check) { 1962 sc->sc_st_check = 0; 1963 com_stsoft(sc, tp); 1964 } 1965 1966 if (sc->sc_tx_done) { 1967 sc->sc_tx_done = 0; 1968 com_txsoft(sc, tp); 1969 } 1970 } 1971 1972 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1973 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1974 splx(s); 1975 #endif 1976 #endif 1977 } 1978 1979 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1980 /* there has got to be a better way to do comsoft() */ 1981 }} 1982 #endif 1983 1984 int 1985 comintr(arg) 1986 void *arg; 1987 { 1988 struct com_softc *sc = arg; 1989 bus_space_tag_t iot = sc->sc_iot; 1990 bus_space_handle_t ioh = sc->sc_ioh; 1991 u_char *put, *end; 1992 u_int cc; 1993 u_char lsr, iir; 1994 1995 if (COM_ISALIVE(sc) == 0) 1996 return (0); 1997 1998 COM_LOCK(sc); 1999 iir = bus_space_read_1(iot, ioh, com_iir); 2000 if (ISSET(iir, IIR_NOPEND)) { 2001 COM_UNLOCK(sc); 2002 return (0); 2003 } 2004 2005 end = sc->sc_ebuf; 2006 put = sc->sc_rbput; 2007 cc = sc->sc_rbavail; 2008 2009 do { 2010 u_char msr, delta; 2011 2012 lsr = bus_space_read_1(iot, ioh, com_lsr); 2013 if (ISSET(lsr, LSR_BI)) { 2014 int cn_trapped = 0; 2015 cn_check_magic(sc->sc_tty->t_dev, 2016 CNC_BREAK, com_cnm_state); 2017 if (cn_trapped) 2018 continue; 2019 #if defined(KGDB) 2020 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2021 kgdb_connect(1); 2022 continue; 2023 } 2024 #endif 2025 } 2026 2027 if (ISSET(lsr, LSR_RCV_MASK) && 2028 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2029 while (cc > 0) { 2030 int cn_trapped = 0; 2031 put[0] = bus_space_read_1(iot, ioh, com_data); 2032 put[1] = lsr; 2033 cn_check_magic(sc->sc_tty->t_dev, 2034 put[0], com_cnm_state); 2035 if (cn_trapped) { 2036 lsr = bus_space_read_1(iot, ioh, com_lsr); 2037 if (!ISSET(lsr, LSR_RCV_MASK)) 2038 break; 2039 2040 continue; 2041 } 2042 put += 2; 2043 if (put >= end) 2044 put = sc->sc_rbuf; 2045 cc--; 2046 2047 lsr = bus_space_read_1(iot, ioh, com_lsr); 2048 if (!ISSET(lsr, LSR_RCV_MASK)) 2049 break; 2050 } 2051 2052 /* 2053 * Current string of incoming characters ended because 2054 * no more data was available or we ran out of space. 2055 * Schedule a receive event if any data was received. 2056 * If we're out of space, turn off receive interrupts. 2057 */ 2058 sc->sc_rbput = put; 2059 sc->sc_rbavail = cc; 2060 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2061 sc->sc_rx_ready = 1; 2062 2063 /* 2064 * See if we are in danger of overflowing a buffer. If 2065 * so, use hardware flow control to ease the pressure. 2066 */ 2067 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2068 cc < sc->sc_r_hiwat) { 2069 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2070 com_hwiflow(sc); 2071 } 2072 2073 /* 2074 * If we're out of space, disable receive interrupts 2075 * until the queue has drained a bit. 2076 */ 2077 if (!cc) { 2078 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2079 CLR(sc->sc_ier, IER_ERXRDY); 2080 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2081 } 2082 } else { 2083 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2084 bus_space_write_1(iot, ioh, com_ier, 0); 2085 delay(10); 2086 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2087 iir = IIR_NOPEND; 2088 continue; 2089 } 2090 } 2091 2092 msr = bus_space_read_1(iot, ioh, com_msr); 2093 delta = msr ^ sc->sc_msr; 2094 sc->sc_msr = msr; 2095 /* 2096 * Pulse-per-second (PSS) signals on edge of DCD? 2097 * Process these even if line discipline is ignoring DCD. 2098 */ 2099 if (delta & sc->sc_ppsmask) { 2100 struct timeval tv; 2101 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2102 /* XXX nanotime() */ 2103 microtime(&tv); 2104 TIMEVAL_TO_TIMESPEC(&tv, 2105 &sc->ppsinfo.assert_timestamp); 2106 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2107 timespecadd(&sc->ppsinfo.assert_timestamp, 2108 &sc->ppsparam.assert_offset, 2109 &sc->ppsinfo.assert_timestamp); 2110 } 2111 2112 #ifdef PPS_SYNC 2113 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2114 hardpps(&tv, tv.tv_usec); 2115 #endif 2116 sc->ppsinfo.assert_sequence++; 2117 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2118 2119 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2120 /* XXX nanotime() */ 2121 microtime(&tv); 2122 TIMEVAL_TO_TIMESPEC(&tv, 2123 &sc->ppsinfo.clear_timestamp); 2124 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2125 timespecadd(&sc->ppsinfo.clear_timestamp, 2126 &sc->ppsparam.clear_offset, 2127 &sc->ppsinfo.clear_timestamp); 2128 } 2129 2130 #ifdef PPS_SYNC 2131 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2132 hardpps(&tv, tv.tv_usec); 2133 #endif 2134 sc->ppsinfo.clear_sequence++; 2135 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2136 } 2137 } 2138 2139 /* 2140 * Process normal status changes 2141 */ 2142 if (ISSET(delta, sc->sc_msr_mask)) { 2143 SET(sc->sc_msr_delta, delta); 2144 2145 /* 2146 * Stop output immediately if we lose the output 2147 * flow control signal or carrier detect. 2148 */ 2149 if (ISSET(~msr, sc->sc_msr_mask)) { 2150 sc->sc_tbc = 0; 2151 sc->sc_heldtbc = 0; 2152 #ifdef COM_DEBUG 2153 if (com_debug) 2154 comstatus(sc, "comintr "); 2155 #endif 2156 } 2157 2158 sc->sc_st_check = 1; 2159 } 2160 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2161 2162 /* 2163 * Done handling any receive interrupts. See if data can be 2164 * transmitted as well. Schedule tx done event if no data left 2165 * and tty was marked busy. 2166 */ 2167 if (ISSET(lsr, LSR_TXRDY)) { 2168 /* 2169 * If we've delayed a parameter change, do it now, and restart 2170 * output. 2171 */ 2172 if (sc->sc_heldchange) { 2173 com_loadchannelregs(sc); 2174 sc->sc_heldchange = 0; 2175 sc->sc_tbc = sc->sc_heldtbc; 2176 sc->sc_heldtbc = 0; 2177 } 2178 2179 /* Output the next chunk of the contiguous buffer, if any. */ 2180 if (sc->sc_tbc > 0) { 2181 int n; 2182 2183 n = sc->sc_tbc; 2184 if (n > sc->sc_fifolen) 2185 n = sc->sc_fifolen; 2186 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2187 sc->sc_tbc -= n; 2188 sc->sc_tba += n; 2189 } else { 2190 /* Disable transmit completion interrupts if necessary. */ 2191 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2192 CLR(sc->sc_ier, IER_ETXRDY); 2193 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2194 } 2195 if (sc->sc_tx_busy) { 2196 sc->sc_tx_busy = 0; 2197 sc->sc_tx_done = 1; 2198 } 2199 } 2200 } 2201 COM_UNLOCK(sc); 2202 2203 /* Wake up the poller. */ 2204 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2205 softintr_schedule(sc->sc_si); 2206 #else 2207 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2208 setsoftserial(); 2209 #else 2210 if (!com_softintr_scheduled) { 2211 com_softintr_scheduled = 1; 2212 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2213 } 2214 #endif 2215 #endif 2216 2217 #if NRND > 0 && defined(RND_COM) 2218 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2219 #endif 2220 2221 return (1); 2222 } 2223 2224 /* 2225 * The following functions are polled getc and putc routines, shared 2226 * by the console and kgdb glue. 2227 * 2228 * The read-ahead code is so that you can detect pending in-band 2229 * cn_magic in polled mode while doing output rather than having to 2230 * wait until the kernel decides it needs input. 2231 */ 2232 2233 #define MAX_READAHEAD 20 2234 static int com_readahead[MAX_READAHEAD]; 2235 static int com_readaheadcount = 0; 2236 2237 int 2238 com_common_getc(dev, iot, ioh) 2239 dev_t dev; 2240 bus_space_tag_t iot; 2241 bus_space_handle_t ioh; 2242 { 2243 int s = splserial(); 2244 u_char stat, c; 2245 2246 /* got a character from reading things earlier */ 2247 if (com_readaheadcount > 0) { 2248 int i; 2249 2250 c = com_readahead[0]; 2251 for (i = 1; i < com_readaheadcount; i++) { 2252 com_readahead[i-1] = com_readahead[i]; 2253 } 2254 com_readaheadcount--; 2255 splx(s); 2256 return (c); 2257 } 2258 2259 /* block until a character becomes available */ 2260 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2261 ; 2262 2263 c = bus_space_read_1(iot, ioh, com_data); 2264 stat = bus_space_read_1(iot, ioh, com_iir); 2265 { 2266 int cn_trapped = 0; /* unused */ 2267 #ifdef DDB 2268 extern int db_active; 2269 if (!db_active) 2270 #endif 2271 cn_check_magic(dev, c, com_cnm_state); 2272 } 2273 splx(s); 2274 return (c); 2275 } 2276 2277 void 2278 com_common_putc(dev, iot, ioh, c) 2279 dev_t dev; 2280 bus_space_tag_t iot; 2281 bus_space_handle_t ioh; 2282 int c; 2283 { 2284 int s = splserial(); 2285 int timo; 2286 2287 int cin, stat; 2288 if (com_readaheadcount < MAX_READAHEAD 2289 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2290 int cn_trapped = 0; 2291 cin = bus_space_read_1(iot, ioh, com_data); 2292 stat = bus_space_read_1(iot, ioh, com_iir); 2293 cn_check_magic(dev, cin, com_cnm_state); 2294 com_readahead[com_readaheadcount++] = cin; 2295 } 2296 2297 /* wait for any pending transmission to finish */ 2298 timo = 150000; 2299 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2300 continue; 2301 2302 bus_space_write_1(iot, ioh, com_data, c); 2303 COM_BARRIER(iot, ioh, BR | BW); 2304 2305 /* wait for this transmission to complete */ 2306 timo = 1500000; 2307 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2308 continue; 2309 2310 splx(s); 2311 } 2312 2313 /* 2314 * Initialize UART for use as console or KGDB line. 2315 */ 2316 int 2317 cominit(iot, iobase, rate, frequency, cflag, iohp) 2318 bus_space_tag_t iot; 2319 bus_addr_t iobase; 2320 int rate, frequency; 2321 tcflag_t cflag; 2322 bus_space_handle_t *iohp; 2323 { 2324 bus_space_handle_t ioh; 2325 2326 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2327 return (ENOMEM); /* ??? */ 2328 2329 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2330 bus_space_write_1(iot, ioh, com_efr, 0); 2331 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2332 rate = comspeed(rate, frequency); 2333 bus_space_write_1(iot, ioh, com_dlbl, rate); 2334 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2335 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2336 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2337 bus_space_write_1(iot, ioh, com_fifo, 2338 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2339 bus_space_write_1(iot, ioh, com_ier, 0); 2340 2341 *iohp = ioh; 2342 return (0); 2343 } 2344 2345 /* 2346 * Following are all routines needed for COM to act as console 2347 */ 2348 struct consdev comcons = { 2349 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2350 NODEV, CN_NORMAL 2351 }; 2352 2353 2354 int 2355 comcnattach(iot, iobase, rate, frequency, cflag) 2356 bus_space_tag_t iot; 2357 bus_addr_t iobase; 2358 int rate, frequency; 2359 tcflag_t cflag; 2360 { 2361 int res; 2362 2363 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2364 if (res) 2365 return (res); 2366 2367 cn_tab = &comcons; 2368 cn_init_magic(&com_cnm_state); 2369 cn_set_magic("\047\001"); /* default magic is BREAK */ 2370 2371 comconstag = iot; 2372 comconsaddr = iobase; 2373 comconsrate = rate; 2374 comconscflag = cflag; 2375 2376 return (0); 2377 } 2378 2379 int 2380 comcngetc(dev) 2381 dev_t dev; 2382 { 2383 return (com_common_getc(dev, comconstag, comconsioh)); 2384 } 2385 2386 /* 2387 * Console kernel output character routine. 2388 */ 2389 void 2390 comcnputc(dev, c) 2391 dev_t dev; 2392 int c; 2393 { 2394 com_common_putc(dev, comconstag, comconsioh, c); 2395 } 2396 2397 void 2398 comcnpollc(dev, on) 2399 dev_t dev; 2400 int on; 2401 { 2402 2403 } 2404 2405 #ifdef KGDB 2406 int 2407 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2408 bus_space_tag_t iot; 2409 bus_addr_t iobase; 2410 int rate, frequency; 2411 tcflag_t cflag; 2412 { 2413 int res; 2414 2415 if (iot == comconstag && iobase == comconsaddr) 2416 return (EBUSY); /* cannot share with console */ 2417 2418 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2419 if (res) 2420 return (res); 2421 2422 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2423 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2424 2425 com_kgdb_iot = iot; 2426 com_kgdb_addr = iobase; 2427 2428 return (0); 2429 } 2430 2431 /* ARGSUSED */ 2432 int 2433 com_kgdb_getc(arg) 2434 void *arg; 2435 { 2436 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2437 } 2438 2439 /* ARGSUSED */ 2440 void 2441 com_kgdb_putc(arg, c) 2442 void *arg; 2443 int c; 2444 { 2445 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2446 } 2447 #endif /* KGDB */ 2448 2449 /* helper function to identify the com ports used by 2450 console or KGDB (and not yet autoconf attached) */ 2451 int 2452 com_is_console(iot, iobase, ioh) 2453 bus_space_tag_t iot; 2454 bus_addr_t iobase; 2455 bus_space_handle_t *ioh; 2456 { 2457 bus_space_handle_t help; 2458 2459 if (!comconsattached && 2460 iot == comconstag && iobase == comconsaddr) 2461 help = comconsioh; 2462 #ifdef KGDB 2463 else if (!com_kgdb_attached && 2464 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2465 help = com_kgdb_ioh; 2466 #endif 2467 else 2468 return (0); 2469 2470 if (ioh) 2471 *ioh = help; 2472 return (1); 2473 } 2474
Indexes created Thu Sep 25 16:09:42 GMT 2025