com.c revision 1.188.2.1
1 /* $NetBSD: com.c,v 1.188.2.1 2001/09/07 04:45:25 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_com.h" 80 #include "opt_ddb.h" 81 #include "opt_ddbparam.h" 82 #include "opt_kgdb.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/types.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 #include <miscfs/specfs/specdev.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 135 #endif 136 137 static void com_enable_debugport __P((struct com_softc *)); 138 139 void com_config __P((struct com_softc *)); 140 void com_shutdown __P((struct com_softc *)); 141 int comspeed __P((long, long)); 142 static u_char cflag2lcr __P((tcflag_t)); 143 int comparam __P((struct tty *, struct termios *)); 144 void comstart __P((struct tty *)); 145 int comhwiflow __P((struct tty *, int)); 146 147 void com_loadchannelregs __P((struct com_softc *)); 148 void com_hwiflow __P((struct com_softc *)); 149 void com_break __P((struct com_softc *, int)); 150 void com_modem __P((struct com_softc *, int)); 151 void tiocm_to_com __P((struct com_softc *, u_long, int)); 152 int com_to_tiocm __P((struct com_softc *)); 153 void com_iflush __P((struct com_softc *)); 154 155 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 156 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 157 158 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 159 bus_space_handle_t *)); 160 161 /* XXX: This belongs elsewhere */ 162 cdev_decl(com); 163 164 int comcngetc __P((dev_t)); 165 void comcnputc __P((dev_t, int)); 166 void comcnpollc __P((dev_t, int)); 167 168 #define integrate static inline 169 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 170 void comsoft __P((void *)); 171 #else 172 #ifndef __NO_SOFT_SERIAL_INTERRUPT 173 void comsoft __P((void)); 174 #else 175 void comsoft __P((void *)); 176 struct callout comsoft_callout = CALLOUT_INITIALIZER; 177 #endif 178 #endif 179 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_schedrx __P((struct com_softc *)); 183 void comdiag __P((void *)); 184 185 extern struct cfdriver com_cd; 186 187 /* 188 * Make this an option variable one can patch. 189 * But be warned: this must be a power of 2! 190 */ 191 u_int com_rbuf_size = COM_RING_SIZE; 192 193 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 194 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 195 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 196 197 static bus_addr_t comconsaddr; 198 static bus_space_tag_t comconstag; 199 static bus_space_handle_t comconsioh; 200 static int comconsattached; 201 static int comconsrate; 202 static tcflag_t comconscflag; 203 static struct cnm_state com_cnm_state; 204 205 static int ppscap = 206 PPS_TSFMT_TSPEC | 207 PPS_CAPTUREASSERT | 208 PPS_CAPTURECLEAR | 209 #ifdef PPS_SYNC 210 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 211 #endif /* PPS_SYNC */ 212 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 213 214 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 215 #ifdef __NO_SOFT_SERIAL_INTERRUPT 216 volatile int com_softintr_scheduled; 217 #endif 218 #endif 219 220 #ifdef KGDB 221 #include <sys/kgdb.h> 222 223 static bus_addr_t com_kgdb_addr; 224 static bus_space_tag_t com_kgdb_iot; 225 static bus_space_handle_t com_kgdb_ioh; 226 static int com_kgdb_attached; 227 228 int com_kgdb_getc __P((void *)); 229 void com_kgdb_putc __P((void *, int)); 230 #endif /* KGDB */ 231 232 #define COMUNIT_MASK 0x7ffff 233 #define COMDIALOUT_MASK 0x80000 234 235 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 236 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 237 238 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 239 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 240 241 #define BR BUS_SPACE_BARRIER_READ 242 #define BW BUS_SPACE_BARRIER_WRITE 243 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 244 245 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 246 247 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 248 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 249 250 #else 251 252 #define COM_LOCK(sc) 253 #define COM_UNLOCK(sc) 254 255 #endif 256 257 int 258 comspeed(speed, frequency) 259 long speed, frequency; 260 { 261 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 262 263 int x, err; 264 265 #if 0 266 if (speed == 0) 267 return (0); 268 #endif 269 if (speed <= 0) 270 return (-1); 271 x = divrnd(frequency / 16, speed); 272 if (x <= 0) 273 return (-1); 274 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 275 if (err < 0) 276 err = -err; 277 if (err > COM_TOLERANCE) 278 return (-1); 279 return (x); 280 281 #undef divrnd 282 } 283 284 #ifdef COM_DEBUG 285 int com_debug = 0; 286 287 void comstatus __P((struct com_softc *, char *)); 288 void 289 comstatus(sc, str) 290 struct com_softc *sc; 291 char *str; 292 { 293 struct tty *tp = sc->sc_tty; 294 295 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 296 sc->sc_dev.dv_xname, str, 297 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 298 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 299 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 300 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 301 sc->sc_tx_stopped ? "+" : "-"); 302 303 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 304 sc->sc_dev.dv_xname, str, 305 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 306 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 307 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 308 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 309 sc->sc_rx_flags); 310 } 311 #endif 312 313 int 314 comprobe1(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(hayespioh, sc) 332 bus_space_handle_t hayespioh; 333 struct com_softc *sc; 334 { 335 char val, dips; 336 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 337 bus_space_tag_t iot = sc->sc_iot; 338 339 /* 340 * Hayes ESP cards have two iobases. One is for compatibility with 341 * 16550 serial chips, and at the same ISA PC base addresses. The 342 * other is for ESP-specific enhanced features, and lies at a 343 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 344 */ 345 346 /* Test for ESP signature */ 347 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 348 return (0); 349 350 /* 351 * ESP is present at ESP enhanced base address; unknown com port 352 */ 353 354 /* Get the dip-switch configurations */ 355 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 356 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 357 358 /* Determine which com port this ESP card services: bits 0,1 of */ 359 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 360 if (sc->sc_iobase != combaselist[dips & 0x03]) 361 return (0); 362 363 printf(": ESP"); 364 365 /* Check ESP Self Test bits. */ 366 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 367 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 370 if ((val & 0x70) < 0x20) { 371 printf("-old (%o)", val & 0x70); 372 /* we do not support the necessary features */ 373 return (0); 374 } 375 376 /* Check for ability to emulate 16550: bit 8 == 1 */ 377 if ((dips & 0x80) == 0) { 378 printf(" slave"); 379 /* XXX Does slave really mean no 16550 support?? */ 380 return (0); 381 } 382 383 /* 384 * If we made it this far, we are a full-featured ESP v2.0 (or 385 * better), at the correct com port address. 386 */ 387 388 SET(sc->sc_hwflags, COM_HW_HAYESP); 389 printf(", 1024 byte fifo\n"); 390 return (1); 391 } 392 #endif 393 394 static void 395 com_enable_debugport(sc) 396 struct com_softc *sc; 397 { 398 int s; 399 400 /* Turn on line break interrupt, set carrier. */ 401 s = splserial(); 402 COM_LOCK(sc); 403 sc->sc_ier = IER_ERXRDY; 404 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 405 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 407 COM_UNLOCK(sc); 408 splx(s); 409 } 410 411 void 412 com_attach_subr(sc) 413 struct com_softc *sc; 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 427 callout_init(&sc->sc_diag_callout); 428 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 429 simple_lock_init(&sc->sc_lock); 430 #endif 431 432 /* Disable interrupts before configuring the device. */ 433 sc->sc_ier = 0; 434 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 435 436 if (iot == comconstag && iobase == comconsaddr) { 437 comconsattached = 1; 438 439 /* Make sure the console is always "hardwired". */ 440 delay(1000); /* wait for output to finish */ 441 SET(sc->sc_hwflags, COM_HW_CONSOLE); 442 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 443 } 444 445 #ifdef COM_HAYESP 446 sc->sc_prescaler = 0; /* set prescaler to x1. */ 447 448 /* Look for a Hayes ESP board. */ 449 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 450 bus_space_handle_t hayespioh; 451 452 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 453 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 454 continue; 455 if (comprobeHAYESP(hayespioh, sc)) { 456 sc->sc_hayespioh = hayespioh; 457 sc->sc_fifolen = 1024; 458 459 break; 460 } 461 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 462 } 463 /* No ESP; look for other things. */ 464 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 465 #endif 466 sc->sc_fifolen = 1; 467 /* look for a NS 16550AF UART with FIFOs */ 468 bus_space_write_1(iot, ioh, com_fifo, 469 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 470 delay(100); 471 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 472 == IIR_FIFO_MASK) 473 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 474 == FIFO_TRIGGER_14) { 475 SET(sc->sc_hwflags, COM_HW_FIFO); 476 477 #ifdef COM16650 478 /* 479 * IIR changes into the EFR if LCR is set to LCR_EERS 480 * on 16650s. We also know IIR != 0 at this point. 481 * Write 0 into the EFR, and read it. If the result 482 * is 0, we have a 16650. 483 * 484 * Older 16650s were broken; the test to detect them 485 * is taken from the Linux driver. Apparently 486 * setting DLAB enable gives access to the EFR on 487 * these chips. 488 */ 489 lcr = bus_space_read_1(iot, ioh, com_lcr); 490 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 491 bus_space_write_1(iot, ioh, com_efr, 0); 492 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 493 bus_space_write_1(iot, ioh, com_lcr, 494 lcr | LCR_DLAB); 495 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 496 CLR(sc->sc_hwflags, COM_HW_FIFO); 497 sc->sc_fifolen = 0; 498 } else { 499 SET(sc->sc_hwflags, COM_HW_FLOW); 500 sc->sc_fifolen = 32; 501 } 502 } else 503 #endif 504 sc->sc_fifolen = 16; 505 506 #ifdef COM16650 507 bus_space_write_1(iot, ioh, com_lcr, lcr); 508 if (sc->sc_fifolen == 0) 509 printf(": st16650, broken fifo\n"); 510 else if (sc->sc_fifolen == 32) 511 printf(": st16650a, working fifo\n"); 512 else 513 #endif 514 printf(": ns16550a, working fifo\n"); 515 } else 516 printf(": ns16550, broken fifo\n"); 517 else 518 printf(": ns8250 or ns16450, no fifo\n"); 519 bus_space_write_1(iot, ioh, com_fifo, 0); 520 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 521 sc->sc_fifolen = 1; 522 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 523 } 524 #ifdef COM_HAYESP 525 } 526 #endif 527 528 tp = ttymalloc(); 529 tp->t_oproc = comstart; 530 tp->t_param = comparam; 531 tp->t_hwiflow = comhwiflow; 532 533 sc->sc_tty = tp; 534 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 535 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 536 sc->sc_rbavail = com_rbuf_size; 537 if (sc->sc_rbuf == NULL) { 538 printf("%s: unable to allocate ring buffer\n", 539 sc->sc_dev.dv_xname); 540 return; 541 } 542 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 543 544 tty_attach(tp); 545 546 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 547 SET(sc->sc_mcr, MCR_IENABLE); 548 549 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 550 int maj; 551 552 /* locate the major number */ 553 for (maj = 0; maj < nchrdev; maj++) 554 if (cdevsw[maj].d_open == comopen) 555 break; 556 557 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 558 559 printf("%s: console\n", sc->sc_dev.dv_xname); 560 } 561 562 #ifdef KGDB 563 /* 564 * Allow kgdb to "take over" this port. If this is 565 * the kgdb device, it has exclusive use. 566 */ 567 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 568 com_kgdb_attached = 1; 569 570 SET(sc->sc_hwflags, COM_HW_KGDB); 571 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 572 } 573 #endif 574 575 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 576 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 577 #endif 578 579 #if NRND > 0 && defined(RND_COM) 580 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 581 RND_TYPE_TTY, 0); 582 #endif 583 584 /* if there are no enable/disable functions, assume the device 585 is always enabled */ 586 if (!sc->enable) 587 sc->enabled = 1; 588 589 com_config(sc); 590 591 SET(sc->sc_hwflags, COM_HW_DEV_OK); 592 } 593 594 void 595 com_config(sc) 596 struct com_softc *sc; 597 { 598 bus_space_tag_t iot = sc->sc_iot; 599 bus_space_handle_t ioh = sc->sc_ioh; 600 601 /* Disable interrupts before configuring the device. */ 602 sc->sc_ier = 0; 603 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 604 605 #ifdef COM_HAYESP 606 /* Look for a Hayes ESP board. */ 607 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 608 sc->sc_fifolen = 1024; 609 610 /* Set 16550 compatibility mode */ 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 612 HAYESP_SETMODE); 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 614 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 615 HAYESP_MODE_SCALE); 616 617 /* Set RTS/CTS flow control */ 618 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 619 HAYESP_SETFLOWTYPE); 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 621 HAYESP_FLOW_RTS); 622 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 623 HAYESP_FLOW_CTS); 624 625 /* Set flow control levels */ 626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 627 HAYESP_SETRXFLOW); 628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 629 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 631 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 635 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 636 } 637 #endif 638 639 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 640 com_enable_debugport(sc); 641 } 642 643 int 644 com_detach(self, flags) 645 struct device *self; 646 int flags; 647 { 648 struct com_softc *sc = (struct com_softc *)self; 649 int maj, mn; 650 651 /* locate the major number */ 652 for (maj = 0; maj < nchrdev; maj++) 653 if (cdevsw[maj].d_open == comopen) 654 break; 655 656 /* Nuke the vnodes for any open instances. */ 657 mn = self->dv_unit; 658 vdevgone(maj, mn, mn, VCHR); 659 660 mn |= COMDIALOUT_MASK; 661 vdevgone(maj, mn, mn, VCHR); 662 663 /* Free the receive buffer. */ 664 free(sc->sc_rbuf, M_DEVBUF); 665 666 /* Detach and free the tty. */ 667 tty_detach(sc->sc_tty); 668 ttyfree(sc->sc_tty); 669 670 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 671 /* Unhook the soft interrupt handler. */ 672 softintr_disestablish(sc->sc_si); 673 #endif 674 675 #if NRND > 0 && defined(RND_COM) 676 /* Unhook the entropy source. */ 677 rnd_detach_source(&sc->rnd_source); 678 #endif 679 680 return (0); 681 } 682 683 int 684 com_activate(self, act) 685 struct device *self; 686 enum devact act; 687 { 688 struct com_softc *sc = (struct com_softc *)self; 689 int s, rv = 0; 690 691 s = splserial(); 692 COM_LOCK(sc); 693 switch (act) { 694 case DVACT_ACTIVATE: 695 rv = EOPNOTSUPP; 696 break; 697 698 case DVACT_DEACTIVATE: 699 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 700 rv = EBUSY; 701 break; 702 } 703 704 if (sc->disable != NULL && sc->enabled != 0) { 705 (*sc->disable)(sc); 706 sc->enabled = 0; 707 } 708 break; 709 } 710 711 COM_UNLOCK(sc); 712 splx(s); 713 return (rv); 714 } 715 716 void 717 com_shutdown(sc) 718 struct com_softc *sc; 719 { 720 struct tty *tp = sc->sc_tty; 721 int s; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 726 /* If we were asserting flow control, then deassert it. */ 727 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 728 com_hwiflow(sc); 729 730 /* Clear any break condition set with TIOCSBRK. */ 731 com_break(sc, 0); 732 733 /* Turn off PPS capture on last close. */ 734 sc->sc_ppsmask = 0; 735 sc->ppsparam.mode = 0; 736 737 /* 738 * Hang up if necessary. Wait a bit, so the other side has time to 739 * notice even if we immediately open the port again. 740 * Avoid tsleeping above splhigh(). 741 */ 742 if (ISSET(tp->t_cflag, HUPCL)) { 743 com_modem(sc, 0); 744 COM_UNLOCK(sc); 745 splx(s); 746 /* XXX tsleep will only timeout */ 747 (void) tsleep(sc, TTIPRI, ttclos, hz); 748 s = splserial(); 749 COM_LOCK(sc); 750 } 751 752 /* Turn off interrupts. */ 753 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 754 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 755 else 756 sc->sc_ier = 0; 757 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 758 759 if (sc->disable) { 760 #ifdef DIAGNOSTIC 761 if (!sc->enabled) 762 panic("com_shutdown: not enabled?"); 763 #endif 764 (*sc->disable)(sc); 765 sc->enabled = 0; 766 } 767 COM_UNLOCK(sc); 768 splx(s); 769 } 770 771 int 772 comopen(devvp, flag, mode, p) 773 struct vnode *devvp; 774 int flag, mode; 775 struct proc *p; 776 { 777 struct com_softc *sc; 778 struct tty *tp; 779 int s, s2; 780 int error; 781 782 sc = device_lookup(&com_cd, COMUNIT(devvp->v_rdev)); 783 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 784 sc->sc_rbuf == NULL) 785 return (ENXIO); 786 787 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 788 return (ENXIO); 789 790 #ifdef KGDB 791 /* 792 * If this is the kgdb port, no other use is permitted. 793 */ 794 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 795 return (EBUSY); 796 #endif 797 798 tp = sc->sc_tty; 799 800 if (ISSET(tp->t_state, TS_ISOPEN) && 801 ISSET(tp->t_state, TS_XCLUDE) && 802 p->p_ucred->cr_uid != 0) 803 return (EBUSY); 804 805 devvp->v_devcookie = sc; 806 807 s = spltty(); 808 809 /* 810 * Do the following iff this is a first open. 811 */ 812 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 813 struct termios t; 814 815 tp->t_devvp = devvp; 816 817 s2 = splserial(); 818 COM_LOCK(sc); 819 820 if (sc->enable) { 821 if ((*sc->enable)(sc)) { 822 COM_UNLOCK(sc); 823 splx(s2); 824 splx(s); 825 printf("%s: device enable failed\n", 826 sc->sc_dev.dv_xname); 827 return (EIO); 828 } 829 sc->enabled = 1; 830 com_config(sc); 831 } 832 833 /* Turn on interrupts. */ 834 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 835 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 836 837 /* Fetch the current modem control status, needed later. */ 838 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 839 840 /* Clear PPS capture state on first open. */ 841 sc->sc_ppsmask = 0; 842 sc->ppsparam.mode = 0; 843 844 COM_UNLOCK(sc); 845 splx(s2); 846 847 /* 848 * Initialize the termios status to the defaults. Add in the 849 * sticky bits from TIOCSFLAGS. 850 */ 851 t.c_ispeed = 0; 852 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 853 t.c_ospeed = comconsrate; 854 t.c_cflag = comconscflag; 855 } else { 856 t.c_ospeed = TTYDEF_SPEED; 857 t.c_cflag = TTYDEF_CFLAG; 858 } 859 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 860 SET(t.c_cflag, CLOCAL); 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 862 SET(t.c_cflag, CRTSCTS); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 864 SET(t.c_cflag, MDMBUF); 865 /* Make sure comparam() will do something. */ 866 tp->t_ospeed = 0; 867 (void) comparam(tp, &t); 868 tp->t_iflag = TTYDEF_IFLAG; 869 tp->t_oflag = TTYDEF_OFLAG; 870 tp->t_lflag = TTYDEF_LFLAG; 871 ttychars(tp); 872 ttsetwater(tp); 873 874 s2 = splserial(); 875 COM_LOCK(sc); 876 877 /* 878 * Turn on DTR. We must always do this, even if carrier is not 879 * present, because otherwise we'd have to use TIOCSDTR 880 * immediately after setting CLOCAL, which applications do not 881 * expect. We always assert DTR while the device is open 882 * unless explicitly requested to deassert it. 883 */ 884 com_modem(sc, 1); 885 886 /* Clear the input ring, and unblock. */ 887 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 888 sc->sc_rbavail = com_rbuf_size; 889 com_iflush(sc); 890 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 891 com_hwiflow(sc); 892 893 #ifdef COM_DEBUG 894 if (com_debug) 895 comstatus(sc, "comopen "); 896 #endif 897 898 COM_UNLOCK(sc); 899 splx(s2); 900 } 901 902 splx(s); 903 904 error = ttyopen(tp, COMDIALOUT(devvp->v_rdev), 905 ISSET(flag, O_NONBLOCK)); 906 if (error) 907 goto bad; 908 909 error = (*tp->t_linesw->l_open)(devvp, tp); 910 if (error) 911 goto bad; 912 913 return (0); 914 915 bad: 916 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 917 /* 918 * We failed to open the device, and nobody else had it opened. 919 * Clean up the state as appropriate. 920 */ 921 com_shutdown(sc); 922 } 923 924 return (error); 925 } 926 927 int 928 comclose(devvp, flag, mode, p) 929 struct vnode *devvp; 930 int flag, mode; 931 struct proc *p; 932 { 933 struct com_softc *sc = devvp->v_devcookie; 934 struct tty *tp = sc->sc_tty; 935 936 /* XXX This is for cons.c. */ 937 if (!ISSET(tp->t_state, TS_ISOPEN)) 938 return (0); 939 940 (*tp->t_linesw->l_close)(tp, flag); 941 ttyclose(tp); 942 943 if (COM_ISALIVE(sc) == 0) 944 return (0); 945 946 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 947 /* 948 * Although we got a last close, the device may still be in 949 * use; e.g. if this was the dialout node, and there are still 950 * processes waiting for carrier on the non-dialout node. 951 */ 952 com_shutdown(sc); 953 } 954 955 return (0); 956 } 957 958 int 959 comread(devvp, uio, flag) 960 struct vnode *devvp; 961 struct uio *uio; 962 int flag; 963 { 964 struct com_softc *sc = devvp->v_devcookie; 965 struct tty *tp = sc->sc_tty; 966 967 if (COM_ISALIVE(sc) == 0) 968 return (EIO); 969 970 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 971 } 972 973 int 974 comwrite(devvp, uio, flag) 975 struct vnode *devvp; 976 struct uio *uio; 977 int flag; 978 { 979 struct com_softc *sc = devvp->v_devcookie; 980 struct tty *tp = sc->sc_tty; 981 982 if (COM_ISALIVE(sc) == 0) 983 return (EIO); 984 985 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 986 } 987 988 int 989 compoll(devvp, events, p) 990 struct vnode *devvp; 991 int events; 992 struct proc *p; 993 { 994 struct com_softc *sc = devvp->v_devcookie; 995 struct tty *tp = sc->sc_tty; 996 997 if (COM_ISALIVE(sc) == 0) 998 return (EIO); 999 1000 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1001 } 1002 1003 struct tty * 1004 comtty(devvp) 1005 struct vnode *devvp; 1006 { 1007 struct com_softc *sc = devvp->v_devcookie; 1008 struct tty *tp = sc->sc_tty; 1009 1010 return (tp); 1011 } 1012 1013 int 1014 comioctl(devvp, cmd, data, flag, p) 1015 struct vnode *devvp; 1016 u_long cmd; 1017 caddr_t data; 1018 int flag; 1019 struct proc *p; 1020 { 1021 struct com_softc *sc = devvp->v_devcookie; 1022 struct tty *tp = sc->sc_tty; 1023 int error; 1024 int s; 1025 1026 if (COM_ISALIVE(sc) == 0) 1027 return (EIO); 1028 1029 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1030 if (error >= 0) 1031 return (error); 1032 1033 error = ttioctl(tp, cmd, data, flag, p); 1034 if (error >= 0) 1035 return (error); 1036 1037 error = 0; 1038 1039 s = splserial(); 1040 COM_LOCK(sc); 1041 1042 switch (cmd) { 1043 case TIOCSBRK: 1044 com_break(sc, 1); 1045 break; 1046 1047 case TIOCCBRK: 1048 com_break(sc, 0); 1049 break; 1050 1051 case TIOCSDTR: 1052 com_modem(sc, 1); 1053 break; 1054 1055 case TIOCCDTR: 1056 com_modem(sc, 0); 1057 break; 1058 1059 case TIOCGFLAGS: 1060 *(int *)data = sc->sc_swflags; 1061 break; 1062 1063 case TIOCSFLAGS: 1064 error = suser(p->p_ucred, &p->p_acflag); 1065 if (error) 1066 break; 1067 sc->sc_swflags = *(int *)data; 1068 break; 1069 1070 case TIOCMSET: 1071 case TIOCMBIS: 1072 case TIOCMBIC: 1073 tiocm_to_com(sc, cmd, *(int *)data); 1074 break; 1075 1076 case TIOCMGET: 1077 *(int *)data = com_to_tiocm(sc); 1078 break; 1079 1080 case PPS_IOC_CREATE: 1081 break; 1082 1083 case PPS_IOC_DESTROY: 1084 break; 1085 1086 case PPS_IOC_GETPARAMS: { 1087 pps_params_t *pp; 1088 pp = (pps_params_t *)data; 1089 *pp = sc->ppsparam; 1090 break; 1091 } 1092 1093 case PPS_IOC_SETPARAMS: { 1094 pps_params_t *pp; 1095 int mode; 1096 pp = (pps_params_t *)data; 1097 if (pp->mode & ~ppscap) { 1098 error = EINVAL; 1099 break; 1100 } 1101 sc->ppsparam = *pp; 1102 /* 1103 * Compute msr masks from user-specified timestamp state. 1104 */ 1105 mode = sc->ppsparam.mode; 1106 #ifdef PPS_SYNC 1107 if (mode & PPS_HARDPPSONASSERT) { 1108 mode |= PPS_CAPTUREASSERT; 1109 /* XXX revoke any previous HARDPPS source */ 1110 } 1111 if (mode & PPS_HARDPPSONCLEAR) { 1112 mode |= PPS_CAPTURECLEAR; 1113 /* XXX revoke any previous HARDPPS source */ 1114 } 1115 #endif /* PPS_SYNC */ 1116 switch (mode & PPS_CAPTUREBOTH) { 1117 case 0: 1118 sc->sc_ppsmask = 0; 1119 break; 1120 1121 case PPS_CAPTUREASSERT: 1122 sc->sc_ppsmask = MSR_DCD; 1123 sc->sc_ppsassert = MSR_DCD; 1124 sc->sc_ppsclear = -1; 1125 break; 1126 1127 case PPS_CAPTURECLEAR: 1128 sc->sc_ppsmask = MSR_DCD; 1129 sc->sc_ppsassert = -1; 1130 sc->sc_ppsclear = 0; 1131 break; 1132 1133 case PPS_CAPTUREBOTH: 1134 sc->sc_ppsmask = MSR_DCD; 1135 sc->sc_ppsassert = MSR_DCD; 1136 sc->sc_ppsclear = 0; 1137 break; 1138 1139 default: 1140 error = EINVAL; 1141 break; 1142 } 1143 break; 1144 } 1145 1146 case PPS_IOC_GETCAP: 1147 *(int*)data = ppscap; 1148 break; 1149 1150 case PPS_IOC_FETCH: { 1151 pps_info_t *pi; 1152 pi = (pps_info_t *)data; 1153 *pi = sc->ppsinfo; 1154 break; 1155 } 1156 1157 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1158 /* 1159 * Some GPS clocks models use the falling rather than 1160 * rising edge as the on-the-second signal. 1161 * The old API has no way to specify PPS polarity. 1162 */ 1163 sc->sc_ppsmask = MSR_DCD; 1164 #ifndef PPS_TRAILING_EDGE 1165 sc->sc_ppsassert = MSR_DCD; 1166 sc->sc_ppsclear = -1; 1167 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1168 &sc->ppsinfo.assert_timestamp); 1169 #else 1170 sc->sc_ppsassert = -1 1171 sc->sc_ppsclear = 0; 1172 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1173 &sc->ppsinfo.clear_timestamp); 1174 #endif 1175 break; 1176 1177 default: 1178 error = ENOTTY; 1179 break; 1180 } 1181 1182 COM_UNLOCK(sc); 1183 splx(s); 1184 1185 #ifdef COM_DEBUG 1186 if (com_debug) 1187 comstatus(sc, "comioctl "); 1188 #endif 1189 1190 return (error); 1191 } 1192 1193 integrate void 1194 com_schedrx(sc) 1195 struct com_softc *sc; 1196 { 1197 1198 sc->sc_rx_ready = 1; 1199 1200 /* Wake up the poller. */ 1201 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1202 softintr_schedule(sc->sc_si); 1203 #else 1204 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1205 setsoftserial(); 1206 #else 1207 if (!com_softintr_scheduled) { 1208 com_softintr_scheduled = 1; 1209 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1210 } 1211 #endif 1212 #endif 1213 } 1214 1215 void 1216 com_break(sc, onoff) 1217 struct com_softc *sc; 1218 int onoff; 1219 { 1220 1221 if (onoff) 1222 SET(sc->sc_lcr, LCR_SBREAK); 1223 else 1224 CLR(sc->sc_lcr, LCR_SBREAK); 1225 1226 if (!sc->sc_heldchange) { 1227 if (sc->sc_tx_busy) { 1228 sc->sc_heldtbc = sc->sc_tbc; 1229 sc->sc_tbc = 0; 1230 sc->sc_heldchange = 1; 1231 } else 1232 com_loadchannelregs(sc); 1233 } 1234 } 1235 1236 void 1237 com_modem(sc, onoff) 1238 struct com_softc *sc; 1239 int onoff; 1240 { 1241 1242 if (sc->sc_mcr_dtr == 0) 1243 return; 1244 1245 if (onoff) 1246 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1247 else 1248 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1249 1250 if (!sc->sc_heldchange) { 1251 if (sc->sc_tx_busy) { 1252 sc->sc_heldtbc = sc->sc_tbc; 1253 sc->sc_tbc = 0; 1254 sc->sc_heldchange = 1; 1255 } else 1256 com_loadchannelregs(sc); 1257 } 1258 } 1259 1260 void 1261 tiocm_to_com(sc, how, ttybits) 1262 struct com_softc *sc; 1263 u_long how; 1264 int ttybits; 1265 { 1266 u_char combits; 1267 1268 combits = 0; 1269 if (ISSET(ttybits, TIOCM_DTR)) 1270 SET(combits, MCR_DTR); 1271 if (ISSET(ttybits, TIOCM_RTS)) 1272 SET(combits, MCR_RTS); 1273 1274 switch (how) { 1275 case TIOCMBIC: 1276 CLR(sc->sc_mcr, combits); 1277 break; 1278 1279 case TIOCMBIS: 1280 SET(sc->sc_mcr, combits); 1281 break; 1282 1283 case TIOCMSET: 1284 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1285 SET(sc->sc_mcr, combits); 1286 break; 1287 } 1288 1289 if (!sc->sc_heldchange) { 1290 if (sc->sc_tx_busy) { 1291 sc->sc_heldtbc = sc->sc_tbc; 1292 sc->sc_tbc = 0; 1293 sc->sc_heldchange = 1; 1294 } else 1295 com_loadchannelregs(sc); 1296 } 1297 } 1298 1299 int 1300 com_to_tiocm(sc) 1301 struct com_softc *sc; 1302 { 1303 u_char combits; 1304 int ttybits = 0; 1305 1306 combits = sc->sc_mcr; 1307 if (ISSET(combits, MCR_DTR)) 1308 SET(ttybits, TIOCM_DTR); 1309 if (ISSET(combits, MCR_RTS)) 1310 SET(ttybits, TIOCM_RTS); 1311 1312 combits = sc->sc_msr; 1313 if (ISSET(combits, MSR_DCD)) 1314 SET(ttybits, TIOCM_CD); 1315 if (ISSET(combits, MSR_CTS)) 1316 SET(ttybits, TIOCM_CTS); 1317 if (ISSET(combits, MSR_DSR)) 1318 SET(ttybits, TIOCM_DSR); 1319 if (ISSET(combits, MSR_RI | MSR_TERI)) 1320 SET(ttybits, TIOCM_RI); 1321 1322 if (sc->sc_ier != 0) 1323 SET(ttybits, TIOCM_LE); 1324 1325 return (ttybits); 1326 } 1327 1328 static u_char 1329 cflag2lcr(cflag) 1330 tcflag_t cflag; 1331 { 1332 u_char lcr = 0; 1333 1334 switch (ISSET(cflag, CSIZE)) { 1335 case CS5: 1336 SET(lcr, LCR_5BITS); 1337 break; 1338 case CS6: 1339 SET(lcr, LCR_6BITS); 1340 break; 1341 case CS7: 1342 SET(lcr, LCR_7BITS); 1343 break; 1344 case CS8: 1345 SET(lcr, LCR_8BITS); 1346 break; 1347 } 1348 if (ISSET(cflag, PARENB)) { 1349 SET(lcr, LCR_PENAB); 1350 if (!ISSET(cflag, PARODD)) 1351 SET(lcr, LCR_PEVEN); 1352 } 1353 if (ISSET(cflag, CSTOPB)) 1354 SET(lcr, LCR_STOPB); 1355 1356 return (lcr); 1357 } 1358 1359 int 1360 comparam(tp, t) 1361 struct tty *tp; 1362 struct termios *t; 1363 { 1364 struct com_softc *sc = tp->t_devvp->v_devcookie; 1365 int ospeed; 1366 u_char lcr; 1367 int s; 1368 1369 if (COM_ISALIVE(sc) == 0) 1370 return (EIO); 1371 1372 #ifdef COM_HAYESP 1373 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1374 int prescaler, speed; 1375 1376 /* 1377 * Calculate UART clock prescaler. It should be in 1378 * range of 0 .. 3. 1379 */ 1380 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1381 prescaler++, speed /= 2) 1382 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1383 break; 1384 1385 if (prescaler == 4) 1386 return (EINVAL); 1387 sc->sc_prescaler = prescaler; 1388 } else 1389 #endif 1390 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1391 1392 /* Check requested parameters. */ 1393 if (ospeed < 0) 1394 return (EINVAL); 1395 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1396 return (EINVAL); 1397 1398 /* 1399 * For the console, always force CLOCAL and !HUPCL, so that the port 1400 * is always active. 1401 */ 1402 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1403 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1404 SET(t->c_cflag, CLOCAL); 1405 CLR(t->c_cflag, HUPCL); 1406 } 1407 1408 /* 1409 * If there were no changes, don't do anything. This avoids dropping 1410 * input and improves performance when all we did was frob things like 1411 * VMIN and VTIME. 1412 */ 1413 if (tp->t_ospeed == t->c_ospeed && 1414 tp->t_cflag == t->c_cflag) 1415 return (0); 1416 1417 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1418 1419 s = splserial(); 1420 COM_LOCK(sc); 1421 1422 sc->sc_lcr = lcr; 1423 1424 /* 1425 * If we're not in a mode that assumes a connection is present, then 1426 * ignore carrier changes. 1427 */ 1428 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1429 sc->sc_msr_dcd = 0; 1430 else 1431 sc->sc_msr_dcd = MSR_DCD; 1432 /* 1433 * Set the flow control pins depending on the current flow control 1434 * mode. 1435 */ 1436 if (ISSET(t->c_cflag, CRTSCTS)) { 1437 sc->sc_mcr_dtr = MCR_DTR; 1438 sc->sc_mcr_rts = MCR_RTS; 1439 sc->sc_msr_cts = MSR_CTS; 1440 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1441 } else if (ISSET(t->c_cflag, MDMBUF)) { 1442 /* 1443 * For DTR/DCD flow control, make sure we don't toggle DTR for 1444 * carrier detection. 1445 */ 1446 sc->sc_mcr_dtr = 0; 1447 sc->sc_mcr_rts = MCR_DTR; 1448 sc->sc_msr_cts = MSR_DCD; 1449 sc->sc_efr = 0; 1450 } else { 1451 /* 1452 * If no flow control, then always set RTS. This will make 1453 * the other side happy if it mistakenly thinks we're doing 1454 * RTS/CTS flow control. 1455 */ 1456 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1457 sc->sc_mcr_rts = 0; 1458 sc->sc_msr_cts = 0; 1459 sc->sc_efr = 0; 1460 if (ISSET(sc->sc_mcr, MCR_DTR)) 1461 SET(sc->sc_mcr, MCR_RTS); 1462 else 1463 CLR(sc->sc_mcr, MCR_RTS); 1464 } 1465 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1466 1467 #if 0 1468 if (ospeed == 0) 1469 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1470 else 1471 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1472 #endif 1473 1474 sc->sc_dlbl = ospeed; 1475 sc->sc_dlbh = ospeed >> 8; 1476 1477 /* 1478 * Set the FIFO threshold based on the receive speed. 1479 * 1480 * * If it's a low speed, it's probably a mouse or some other 1481 * interactive device, so set the threshold low. 1482 * * If it's a high speed, trim the trigger level down to prevent 1483 * overflows. 1484 * * Otherwise set it a bit higher. 1485 */ 1486 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1487 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1488 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1489 sc->sc_fifo = FIFO_ENABLE | 1490 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1491 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1492 else 1493 sc->sc_fifo = 0; 1494 1495 /* And copy to tty. */ 1496 tp->t_ispeed = 0; 1497 tp->t_ospeed = t->c_ospeed; 1498 tp->t_cflag = t->c_cflag; 1499 1500 if (!sc->sc_heldchange) { 1501 if (sc->sc_tx_busy) { 1502 sc->sc_heldtbc = sc->sc_tbc; 1503 sc->sc_tbc = 0; 1504 sc->sc_heldchange = 1; 1505 } else 1506 com_loadchannelregs(sc); 1507 } 1508 1509 if (!ISSET(t->c_cflag, CHWFLOW)) { 1510 /* Disable the high water mark. */ 1511 sc->sc_r_hiwat = 0; 1512 sc->sc_r_lowat = 0; 1513 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1514 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1515 com_schedrx(sc); 1516 } 1517 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1518 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1519 com_hwiflow(sc); 1520 } 1521 } else { 1522 sc->sc_r_hiwat = com_rbuf_hiwat; 1523 sc->sc_r_lowat = com_rbuf_lowat; 1524 } 1525 1526 COM_UNLOCK(sc); 1527 splx(s); 1528 1529 /* 1530 * Update the tty layer's idea of the carrier bit, in case we changed 1531 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1532 * explicit request. 1533 */ 1534 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1535 1536 #ifdef COM_DEBUG 1537 if (com_debug) 1538 comstatus(sc, "comparam "); 1539 #endif 1540 1541 if (!ISSET(t->c_cflag, CHWFLOW)) { 1542 if (sc->sc_tx_stopped) { 1543 sc->sc_tx_stopped = 0; 1544 comstart(tp); 1545 } 1546 } 1547 1548 return (0); 1549 } 1550 1551 void 1552 com_iflush(sc) 1553 struct com_softc *sc; 1554 { 1555 bus_space_tag_t iot = sc->sc_iot; 1556 bus_space_handle_t ioh = sc->sc_ioh; 1557 #ifdef DIAGNOSTIC 1558 int reg; 1559 #endif 1560 int timo; 1561 1562 #ifdef DIAGNOSTIC 1563 reg = 0xffff; 1564 #endif 1565 timo = 50000; 1566 /* flush any pending I/O */ 1567 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1568 && --timo) 1569 #ifdef DIAGNOSTIC 1570 reg = 1571 #else 1572 (void) 1573 #endif 1574 bus_space_read_1(iot, ioh, com_data); 1575 #ifdef DIAGNOSTIC 1576 if (!timo) 1577 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1578 reg); 1579 #endif 1580 } 1581 1582 void 1583 com_loadchannelregs(sc) 1584 struct com_softc *sc; 1585 { 1586 bus_space_tag_t iot = sc->sc_iot; 1587 bus_space_handle_t ioh = sc->sc_ioh; 1588 1589 /* XXXXX necessary? */ 1590 com_iflush(sc); 1591 1592 bus_space_write_1(iot, ioh, com_ier, 0); 1593 1594 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1595 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1596 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1597 } 1598 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1599 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1600 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1601 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1602 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1603 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1604 #ifdef COM_HAYESP 1605 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1606 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1607 HAYESP_SETPRESCALER); 1608 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1609 sc->sc_prescaler); 1610 } 1611 #endif 1612 1613 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1614 } 1615 1616 int 1617 comhwiflow(tp, block) 1618 struct tty *tp; 1619 int block; 1620 { 1621 struct com_softc *sc = tp->t_devvp->v_devcookie; 1622 int s; 1623 1624 if (COM_ISALIVE(sc) == 0) 1625 return (0); 1626 1627 if (sc->sc_mcr_rts == 0) 1628 return (0); 1629 1630 s = splserial(); 1631 COM_LOCK(sc); 1632 1633 if (block) { 1634 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1635 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1636 com_hwiflow(sc); 1637 } 1638 } else { 1639 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1640 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1641 com_schedrx(sc); 1642 } 1643 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1644 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1645 com_hwiflow(sc); 1646 } 1647 } 1648 1649 COM_UNLOCK(sc); 1650 splx(s); 1651 return (1); 1652 } 1653 1654 /* 1655 * (un)block input via hw flowcontrol 1656 */ 1657 void 1658 com_hwiflow(sc) 1659 struct com_softc *sc; 1660 { 1661 bus_space_tag_t iot = sc->sc_iot; 1662 bus_space_handle_t ioh = sc->sc_ioh; 1663 1664 if (sc->sc_mcr_rts == 0) 1665 return; 1666 1667 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1668 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1669 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1670 } else { 1671 SET(sc->sc_mcr, sc->sc_mcr_rts); 1672 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1673 } 1674 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1675 } 1676 1677 1678 void 1679 comstart(tp) 1680 struct tty *tp; 1681 { 1682 struct com_softc *sc = tp->t_devvp->v_devcookie; 1683 bus_space_tag_t iot = sc->sc_iot; 1684 bus_space_handle_t ioh = sc->sc_ioh; 1685 int s; 1686 1687 if (COM_ISALIVE(sc) == 0) 1688 return; 1689 1690 s = spltty(); 1691 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1692 goto out; 1693 if (sc->sc_tx_stopped) 1694 goto out; 1695 1696 if (tp->t_outq.c_cc <= tp->t_lowat) { 1697 if (ISSET(tp->t_state, TS_ASLEEP)) { 1698 CLR(tp->t_state, TS_ASLEEP); 1699 wakeup(&tp->t_outq); 1700 } 1701 selwakeup(&tp->t_wsel); 1702 if (tp->t_outq.c_cc == 0) 1703 goto out; 1704 } 1705 1706 /* Grab the first contiguous region of buffer space. */ 1707 { 1708 u_char *tba; 1709 int tbc; 1710 1711 tba = tp->t_outq.c_cf; 1712 tbc = ndqb(&tp->t_outq, 0); 1713 1714 (void)splserial(); 1715 COM_LOCK(sc); 1716 1717 sc->sc_tba = tba; 1718 sc->sc_tbc = tbc; 1719 } 1720 1721 SET(tp->t_state, TS_BUSY); 1722 sc->sc_tx_busy = 1; 1723 1724 /* Enable transmit completion interrupts if necessary. */ 1725 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1726 SET(sc->sc_ier, IER_ETXRDY); 1727 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1728 } 1729 1730 /* Output the first chunk of the contiguous buffer. */ 1731 { 1732 int n; 1733 1734 n = sc->sc_tbc; 1735 if (n > sc->sc_fifolen) 1736 n = sc->sc_fifolen; 1737 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1738 sc->sc_tbc -= n; 1739 sc->sc_tba += n; 1740 } 1741 COM_UNLOCK(sc); 1742 out: 1743 splx(s); 1744 return; 1745 } 1746 1747 /* 1748 * Stop output on a line. 1749 */ 1750 void 1751 comstop(tp, flag) 1752 struct tty *tp; 1753 int flag; 1754 { 1755 struct com_softc *sc = tp->t_devvp->v_devcookie; 1756 int s; 1757 1758 s = splserial(); 1759 COM_LOCK(sc); 1760 if (ISSET(tp->t_state, TS_BUSY)) { 1761 /* Stop transmitting at the next chunk. */ 1762 sc->sc_tbc = 0; 1763 sc->sc_heldtbc = 0; 1764 if (!ISSET(tp->t_state, TS_TTSTOP)) 1765 SET(tp->t_state, TS_FLUSH); 1766 } 1767 COM_UNLOCK(sc); 1768 splx(s); 1769 } 1770 1771 void 1772 comdiag(arg) 1773 void *arg; 1774 { 1775 struct com_softc *sc = arg; 1776 int overflows, floods; 1777 int s; 1778 1779 s = splserial(); 1780 COM_LOCK(sc); 1781 overflows = sc->sc_overflows; 1782 sc->sc_overflows = 0; 1783 floods = sc->sc_floods; 1784 sc->sc_floods = 0; 1785 sc->sc_errors = 0; 1786 COM_UNLOCK(sc); 1787 splx(s); 1788 1789 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1790 sc->sc_dev.dv_xname, 1791 overflows, overflows == 1 ? "" : "s", 1792 floods, floods == 1 ? "" : "s"); 1793 } 1794 1795 integrate void 1796 com_rxsoft(sc, tp) 1797 struct com_softc *sc; 1798 struct tty *tp; 1799 { 1800 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1801 u_char *get, *end; 1802 u_int cc, scc; 1803 u_char lsr; 1804 int code; 1805 int s; 1806 1807 end = sc->sc_ebuf; 1808 get = sc->sc_rbget; 1809 scc = cc = com_rbuf_size - sc->sc_rbavail; 1810 1811 if (cc == com_rbuf_size) { 1812 sc->sc_floods++; 1813 if (sc->sc_errors++ == 0) 1814 callout_reset(&sc->sc_diag_callout, 60 * hz, 1815 comdiag, sc); 1816 } 1817 1818 while (cc) { 1819 code = get[0]; 1820 lsr = get[1]; 1821 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1822 if (ISSET(lsr, LSR_OE)) { 1823 sc->sc_overflows++; 1824 if (sc->sc_errors++ == 0) 1825 callout_reset(&sc->sc_diag_callout, 1826 60 * hz, comdiag, sc); 1827 } 1828 if (ISSET(lsr, LSR_BI | LSR_FE)) 1829 SET(code, TTY_FE); 1830 if (ISSET(lsr, LSR_PE)) 1831 SET(code, TTY_PE); 1832 } 1833 if ((*rint)(code, tp) == -1) { 1834 /* 1835 * The line discipline's buffer is out of space. 1836 */ 1837 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1838 /* 1839 * We're either not using flow control, or the 1840 * line discipline didn't tell us to block for 1841 * some reason. Either way, we have no way to 1842 * know when there's more space available, so 1843 * just drop the rest of the data. 1844 */ 1845 get += cc << 1; 1846 if (get >= end) 1847 get -= com_rbuf_size << 1; 1848 cc = 0; 1849 } else { 1850 /* 1851 * Don't schedule any more receive processing 1852 * until the line discipline tells us there's 1853 * space available (through comhwiflow()). 1854 * Leave the rest of the data in the input 1855 * buffer. 1856 */ 1857 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1858 } 1859 break; 1860 } 1861 get += 2; 1862 if (get >= end) 1863 get = sc->sc_rbuf; 1864 cc--; 1865 } 1866 1867 if (cc != scc) { 1868 sc->sc_rbget = get; 1869 s = splserial(); 1870 COM_LOCK(sc); 1871 1872 cc = sc->sc_rbavail += scc - cc; 1873 /* Buffers should be ok again, release possible block. */ 1874 if (cc >= sc->sc_r_lowat) { 1875 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1876 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1877 SET(sc->sc_ier, IER_ERXRDY); 1878 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1879 } 1880 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1881 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1882 com_hwiflow(sc); 1883 } 1884 } 1885 COM_UNLOCK(sc); 1886 splx(s); 1887 } 1888 } 1889 1890 integrate void 1891 com_txsoft(sc, tp) 1892 struct com_softc *sc; 1893 struct tty *tp; 1894 { 1895 1896 CLR(tp->t_state, TS_BUSY); 1897 if (ISSET(tp->t_state, TS_FLUSH)) 1898 CLR(tp->t_state, TS_FLUSH); 1899 else 1900 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1901 (*tp->t_linesw->l_start)(tp); 1902 } 1903 1904 integrate void 1905 com_stsoft(sc, tp) 1906 struct com_softc *sc; 1907 struct tty *tp; 1908 { 1909 u_char msr, delta; 1910 int s; 1911 1912 s = splserial(); 1913 COM_LOCK(sc); 1914 msr = sc->sc_msr; 1915 delta = sc->sc_msr_delta; 1916 sc->sc_msr_delta = 0; 1917 COM_UNLOCK(sc); 1918 splx(s); 1919 1920 if (ISSET(delta, sc->sc_msr_dcd)) { 1921 /* 1922 * Inform the tty layer that carrier detect changed. 1923 */ 1924 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1925 } 1926 1927 if (ISSET(delta, sc->sc_msr_cts)) { 1928 /* Block or unblock output according to flow control. */ 1929 if (ISSET(msr, sc->sc_msr_cts)) { 1930 sc->sc_tx_stopped = 0; 1931 (*tp->t_linesw->l_start)(tp); 1932 } else { 1933 sc->sc_tx_stopped = 1; 1934 } 1935 } 1936 1937 #ifdef COM_DEBUG 1938 if (com_debug) 1939 comstatus(sc, "com_stsoft"); 1940 #endif 1941 } 1942 1943 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1944 void 1945 comsoft(arg) 1946 void *arg; 1947 { 1948 struct com_softc *sc = arg; 1949 struct tty *tp; 1950 1951 if (COM_ISALIVE(sc) == 0) 1952 return; 1953 1954 { 1955 #else 1956 void 1957 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1958 comsoft() 1959 #else 1960 comsoft(arg) 1961 void *arg; 1962 #endif 1963 { 1964 struct com_softc *sc; 1965 struct tty *tp; 1966 int unit; 1967 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1968 int s; 1969 1970 s = splsoftserial(); 1971 com_softintr_scheduled = 0; 1972 #endif 1973 1974 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1975 sc = device_lookup(&com_cd, unit); 1976 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1977 continue; 1978 1979 if (COM_ISALIVE(sc) == 0) 1980 continue; 1981 1982 tp = sc->sc_tty; 1983 if (tp == NULL) 1984 continue; 1985 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1986 continue; 1987 #endif 1988 tp = sc->sc_tty; 1989 1990 if (sc->sc_rx_ready) { 1991 sc->sc_rx_ready = 0; 1992 com_rxsoft(sc, tp); 1993 } 1994 1995 if (sc->sc_st_check) { 1996 sc->sc_st_check = 0; 1997 com_stsoft(sc, tp); 1998 } 1999 2000 if (sc->sc_tx_done) { 2001 sc->sc_tx_done = 0; 2002 com_txsoft(sc, tp); 2003 } 2004 } 2005 2006 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2007 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2008 splx(s); 2009 #endif 2010 #endif 2011 } 2012 2013 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2014 /* there has got to be a better way to do comsoft() */ 2015 }} 2016 #endif 2017 2018 int 2019 comintr(arg) 2020 void *arg; 2021 { 2022 struct com_softc *sc = arg; 2023 bus_space_tag_t iot = sc->sc_iot; 2024 bus_space_handle_t ioh = sc->sc_ioh; 2025 u_char *put, *end; 2026 u_int cc; 2027 u_char lsr, iir; 2028 2029 if (COM_ISALIVE(sc) == 0) 2030 return (0); 2031 2032 COM_LOCK(sc); 2033 iir = bus_space_read_1(iot, ioh, com_iir); 2034 if (ISSET(iir, IIR_NOPEND)) { 2035 COM_UNLOCK(sc); 2036 return (0); 2037 } 2038 2039 end = sc->sc_ebuf; 2040 put = sc->sc_rbput; 2041 cc = sc->sc_rbavail; 2042 2043 do { 2044 u_char msr, delta; 2045 2046 lsr = bus_space_read_1(iot, ioh, com_lsr); 2047 if (ISSET(lsr, LSR_BI)) { 2048 int cn_trapped = 0; 2049 cn_check_magic(sc->sc_tty->t_devvp->v_rdev, 2050 CNC_BREAK, com_cnm_state); 2051 if (cn_trapped) 2052 continue; 2053 #if defined(KGDB) 2054 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2055 kgdb_connect(1); 2056 continue; 2057 } 2058 #endif 2059 } 2060 2061 if (ISSET(lsr, LSR_RCV_MASK) && 2062 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2063 while (cc > 0) { 2064 int cn_trapped = 0; 2065 put[0] = bus_space_read_1(iot, ioh, com_data); 2066 put[1] = lsr; 2067 cn_check_magic(sc->sc_tty->t_devvp->v_rdev, 2068 put[0], com_cnm_state); 2069 if (cn_trapped) { 2070 lsr = bus_space_read_1(iot, ioh, com_lsr); 2071 if (!ISSET(lsr, LSR_RCV_MASK)) 2072 break; 2073 2074 continue; 2075 } 2076 put += 2; 2077 if (put >= end) 2078 put = sc->sc_rbuf; 2079 cc--; 2080 2081 lsr = bus_space_read_1(iot, ioh, com_lsr); 2082 if (!ISSET(lsr, LSR_RCV_MASK)) 2083 break; 2084 } 2085 2086 /* 2087 * Current string of incoming characters ended because 2088 * no more data was available or we ran out of space. 2089 * Schedule a receive event if any data was received. 2090 * If we're out of space, turn off receive interrupts. 2091 */ 2092 sc->sc_rbput = put; 2093 sc->sc_rbavail = cc; 2094 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2095 sc->sc_rx_ready = 1; 2096 2097 /* 2098 * See if we are in danger of overflowing a buffer. If 2099 * so, use hardware flow control to ease the pressure. 2100 */ 2101 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2102 cc < sc->sc_r_hiwat) { 2103 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2104 com_hwiflow(sc); 2105 } 2106 2107 /* 2108 * If we're out of space, disable receive interrupts 2109 * until the queue has drained a bit. 2110 */ 2111 if (!cc) { 2112 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2113 CLR(sc->sc_ier, IER_ERXRDY); 2114 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2115 } 2116 } else { 2117 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2118 bus_space_write_1(iot, ioh, com_ier, 0); 2119 delay(10); 2120 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2121 iir = IIR_NOPEND; 2122 continue; 2123 } 2124 } 2125 2126 msr = bus_space_read_1(iot, ioh, com_msr); 2127 delta = msr ^ sc->sc_msr; 2128 sc->sc_msr = msr; 2129 /* 2130 * Pulse-per-second (PSS) signals on edge of DCD? 2131 * Process these even if line discipline is ignoring DCD. 2132 */ 2133 if (delta & sc->sc_ppsmask) { 2134 struct timeval tv; 2135 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2136 /* XXX nanotime() */ 2137 microtime(&tv); 2138 TIMEVAL_TO_TIMESPEC(&tv, 2139 &sc->ppsinfo.assert_timestamp); 2140 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2141 timespecadd(&sc->ppsinfo.assert_timestamp, 2142 &sc->ppsparam.assert_offset, 2143 &sc->ppsinfo.assert_timestamp); 2144 } 2145 2146 #ifdef PPS_SYNC 2147 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2148 hardpps(&tv, tv.tv_usec); 2149 #endif 2150 sc->ppsinfo.assert_sequence++; 2151 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2152 2153 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2154 /* XXX nanotime() */ 2155 microtime(&tv); 2156 TIMEVAL_TO_TIMESPEC(&tv, 2157 &sc->ppsinfo.clear_timestamp); 2158 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2159 timespecadd(&sc->ppsinfo.clear_timestamp, 2160 &sc->ppsparam.clear_offset, 2161 &sc->ppsinfo.clear_timestamp); 2162 } 2163 2164 #ifdef PPS_SYNC 2165 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2166 hardpps(&tv, tv.tv_usec); 2167 #endif 2168 sc->ppsinfo.clear_sequence++; 2169 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2170 } 2171 } 2172 2173 /* 2174 * Process normal status changes 2175 */ 2176 if (ISSET(delta, sc->sc_msr_mask)) { 2177 SET(sc->sc_msr_delta, delta); 2178 2179 /* 2180 * Stop output immediately if we lose the output 2181 * flow control signal or carrier detect. 2182 */ 2183 if (ISSET(~msr, sc->sc_msr_mask)) { 2184 sc->sc_tbc = 0; 2185 sc->sc_heldtbc = 0; 2186 #ifdef COM_DEBUG 2187 if (com_debug) 2188 comstatus(sc, "comintr "); 2189 #endif 2190 } 2191 2192 sc->sc_st_check = 1; 2193 } 2194 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2195 2196 /* 2197 * Done handling any receive interrupts. See if data can be 2198 * transmitted as well. Schedule tx done event if no data left 2199 * and tty was marked busy. 2200 */ 2201 if (ISSET(lsr, LSR_TXRDY)) { 2202 /* 2203 * If we've delayed a parameter change, do it now, and restart 2204 * output. 2205 */ 2206 if (sc->sc_heldchange) { 2207 com_loadchannelregs(sc); 2208 sc->sc_heldchange = 0; 2209 sc->sc_tbc = sc->sc_heldtbc; 2210 sc->sc_heldtbc = 0; 2211 } 2212 2213 /* Output the next chunk of the contiguous buffer, if any. */ 2214 if (sc->sc_tbc > 0) { 2215 int n; 2216 2217 n = sc->sc_tbc; 2218 if (n > sc->sc_fifolen) 2219 n = sc->sc_fifolen; 2220 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2221 sc->sc_tbc -= n; 2222 sc->sc_tba += n; 2223 } else { 2224 /* Disable transmit completion interrupts if necessary. */ 2225 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2226 CLR(sc->sc_ier, IER_ETXRDY); 2227 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2228 } 2229 if (sc->sc_tx_busy) { 2230 sc->sc_tx_busy = 0; 2231 sc->sc_tx_done = 1; 2232 } 2233 } 2234 } 2235 COM_UNLOCK(sc); 2236 2237 /* Wake up the poller. */ 2238 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2239 softintr_schedule(sc->sc_si); 2240 #else 2241 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2242 setsoftserial(); 2243 #else 2244 if (!com_softintr_scheduled) { 2245 com_softintr_scheduled = 1; 2246 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2247 } 2248 #endif 2249 #endif 2250 2251 #if NRND > 0 && defined(RND_COM) 2252 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2253 #endif 2254 2255 return (1); 2256 } 2257 2258 /* 2259 * The following functions are polled getc and putc routines, shared 2260 * by the console and kgdb glue. 2261 * 2262 * The read-ahead code is so that you can detect pending in-band 2263 * cn_magic in polled mode while doing output rather than having to 2264 * wait until the kernel decides it needs input. 2265 */ 2266 2267 #define MAX_READAHEAD 20 2268 static int com_readahead[MAX_READAHEAD]; 2269 static int com_readaheadcount = 0; 2270 2271 int 2272 com_common_getc(dev, iot, ioh) 2273 dev_t dev; 2274 bus_space_tag_t iot; 2275 bus_space_handle_t ioh; 2276 { 2277 int s = splserial(); 2278 u_char stat, c; 2279 2280 /* got a character from reading things earlier */ 2281 if (com_readaheadcount > 0) { 2282 int i; 2283 2284 c = com_readahead[0]; 2285 for (i = 1; i < com_readaheadcount; i++) { 2286 com_readahead[i-1] = com_readahead[i]; 2287 } 2288 com_readaheadcount--; 2289 splx(s); 2290 return (c); 2291 } 2292 2293 /* block until a character becomes available */ 2294 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2295 ; 2296 2297 c = bus_space_read_1(iot, ioh, com_data); 2298 stat = bus_space_read_1(iot, ioh, com_iir); 2299 { 2300 int cn_trapped = 0; /* unused */ 2301 #ifdef DDB 2302 extern int db_active; 2303 if (!db_active) 2304 #endif 2305 cn_check_magic(dev, c, com_cnm_state); 2306 } 2307 splx(s); 2308 return (c); 2309 } 2310 2311 void 2312 com_common_putc(dev, iot, ioh, c) 2313 dev_t dev; 2314 bus_space_tag_t iot; 2315 bus_space_handle_t ioh; 2316 int c; 2317 { 2318 int s = splserial(); 2319 int timo; 2320 2321 int cin, stat; 2322 if (com_readaheadcount < MAX_READAHEAD 2323 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2324 int cn_trapped = 0; 2325 cin = bus_space_read_1(iot, ioh, com_data); 2326 stat = bus_space_read_1(iot, ioh, com_iir); 2327 cn_check_magic(dev, cin, com_cnm_state); 2328 com_readahead[com_readaheadcount++] = cin; 2329 } 2330 2331 /* wait for any pending transmission to finish */ 2332 timo = 150000; 2333 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2334 continue; 2335 2336 bus_space_write_1(iot, ioh, com_data, c); 2337 COM_BARRIER(iot, ioh, BR | BW); 2338 2339 /* wait for this transmission to complete */ 2340 timo = 1500000; 2341 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2342 continue; 2343 2344 splx(s); 2345 } 2346 2347 /* 2348 * Initialize UART for use as console or KGDB line. 2349 */ 2350 int 2351 cominit(iot, iobase, rate, frequency, cflag, iohp) 2352 bus_space_tag_t iot; 2353 bus_addr_t iobase; 2354 int rate, frequency; 2355 tcflag_t cflag; 2356 bus_space_handle_t *iohp; 2357 { 2358 bus_space_handle_t ioh; 2359 2360 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2361 return (ENOMEM); /* ??? */ 2362 2363 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2364 bus_space_write_1(iot, ioh, com_efr, 0); 2365 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2366 rate = comspeed(rate, frequency); 2367 bus_space_write_1(iot, ioh, com_dlbl, rate); 2368 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2369 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2370 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2371 bus_space_write_1(iot, ioh, com_fifo, 2372 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2373 bus_space_write_1(iot, ioh, com_ier, 0); 2374 2375 *iohp = ioh; 2376 return (0); 2377 } 2378 2379 /* 2380 * Following are all routines needed for COM to act as console 2381 */ 2382 struct consdev comcons = { 2383 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2384 NODEV, CN_NORMAL 2385 }; 2386 2387 2388 int 2389 comcnattach(iot, iobase, rate, frequency, cflag) 2390 bus_space_tag_t iot; 2391 bus_addr_t iobase; 2392 int rate, frequency; 2393 tcflag_t cflag; 2394 { 2395 int res; 2396 2397 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2398 if (res) 2399 return (res); 2400 2401 cn_tab = &comcons; 2402 cn_init_magic(&com_cnm_state); 2403 cn_set_magic("\047\001"); /* default magic is BREAK */ 2404 2405 comconstag = iot; 2406 comconsaddr = iobase; 2407 comconsrate = rate; 2408 comconscflag = cflag; 2409 2410 return (0); 2411 } 2412 2413 int 2414 comcngetc(dev) 2415 dev_t dev; 2416 { 2417 return (com_common_getc(dev, comconstag, comconsioh)); 2418 } 2419 2420 /* 2421 * Console kernel output character routine. 2422 */ 2423 void 2424 comcnputc(dev, c) 2425 dev_t dev; 2426 int c; 2427 { 2428 com_common_putc(dev, comconstag, comconsioh, c); 2429 } 2430 2431 void 2432 comcnpollc(dev, on) 2433 dev_t dev; 2434 int on; 2435 { 2436 2437 } 2438 2439 #ifdef KGDB 2440 int 2441 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2442 bus_space_tag_t iot; 2443 bus_addr_t iobase; 2444 int rate, frequency; 2445 tcflag_t cflag; 2446 { 2447 int res; 2448 2449 if (iot == comconstag && iobase == comconsaddr) 2450 return (EBUSY); /* cannot share with console */ 2451 2452 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2453 if (res) 2454 return (res); 2455 2456 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2457 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2458 2459 com_kgdb_iot = iot; 2460 com_kgdb_addr = iobase; 2461 2462 return (0); 2463 } 2464 2465 /* ARGSUSED */ 2466 int 2467 com_kgdb_getc(arg) 2468 void *arg; 2469 { 2470 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2471 } 2472 2473 /* ARGSUSED */ 2474 void 2475 com_kgdb_putc(arg, c) 2476 void *arg; 2477 int c; 2478 { 2479 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2480 } 2481 #endif /* KGDB */ 2482 2483 /* helper function to identify the com ports used by 2484 console or KGDB (and not yet autoconf attached) */ 2485 int 2486 com_is_console(iot, iobase, ioh) 2487 bus_space_tag_t iot; 2488 bus_addr_t iobase; 2489 bus_space_handle_t *ioh; 2490 { 2491 bus_space_handle_t help; 2492 2493 if (!comconsattached && 2494 iot == comconstag && iobase == comconsaddr) 2495 help = comconsioh; 2496 #ifdef KGDB 2497 else if (!com_kgdb_attached && 2498 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2499 help = com_kgdb_ioh; 2500 #endif 2501 else 2502 return (0); 2503 2504 if (ioh) 2505 *ioh = help; 2506 return (1); 2507 } 2508
Indexes created Wed Oct 22 06:10:02 GMT 2025