com.c revision 1.188.2.3
1 /* $NetBSD: com.c,v 1.188.2.3 2001/09/26 15:28:11 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_com.h" 80 #include "opt_ddb.h" 81 #include "opt_ddbparam.h" 82 #include "opt_kgdb.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/types.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 #include <miscfs/specfs/specdev.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 135 #endif 136 137 static void com_enable_debugport __P((struct com_softc *)); 138 139 void com_config __P((struct com_softc *)); 140 void com_shutdown __P((struct com_softc *)); 141 int comspeed __P((long, long)); 142 static u_char cflag2lcr __P((tcflag_t)); 143 int comparam __P((struct tty *, struct termios *)); 144 void comstart __P((struct tty *)); 145 int comhwiflow __P((struct tty *, int)); 146 147 void com_loadchannelregs __P((struct com_softc *)); 148 void com_hwiflow __P((struct com_softc *)); 149 void com_break __P((struct com_softc *, int)); 150 void com_modem __P((struct com_softc *, int)); 151 void tiocm_to_com __P((struct com_softc *, u_long, int)); 152 int com_to_tiocm __P((struct com_softc *)); 153 void com_iflush __P((struct com_softc *)); 154 155 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 156 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 157 158 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 159 bus_space_handle_t *)); 160 161 /* XXX: This belongs elsewhere */ 162 cdev_decl(com); 163 164 int comcngetc __P((dev_t)); 165 void comcnputc __P((dev_t, int)); 166 void comcnpollc __P((dev_t, int)); 167 168 #define integrate static inline 169 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 170 void comsoft __P((void *)); 171 #else 172 #ifndef __NO_SOFT_SERIAL_INTERRUPT 173 void comsoft __P((void)); 174 #else 175 void comsoft __P((void *)); 176 struct callout comsoft_callout = CALLOUT_INITIALIZER; 177 #endif 178 #endif 179 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_schedrx __P((struct com_softc *)); 183 void comdiag __P((void *)); 184 185 extern struct cfdriver com_cd; 186 187 /* 188 * Make this an option variable one can patch. 189 * But be warned: this must be a power of 2! 190 */ 191 u_int com_rbuf_size = COM_RING_SIZE; 192 193 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 194 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 195 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 196 197 static bus_addr_t comconsaddr; 198 static bus_space_tag_t comconstag; 199 static bus_space_handle_t comconsioh; 200 static int comconsattached; 201 static int comconsrate; 202 static tcflag_t comconscflag; 203 static struct cnm_state com_cnm_state; 204 205 static int ppscap = 206 PPS_TSFMT_TSPEC | 207 PPS_CAPTUREASSERT | 208 PPS_CAPTURECLEAR | 209 #ifdef PPS_SYNC 210 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 211 #endif /* PPS_SYNC */ 212 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 213 214 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 215 #ifdef __NO_SOFT_SERIAL_INTERRUPT 216 volatile int com_softintr_scheduled; 217 #endif 218 #endif 219 220 #ifdef KGDB 221 #include <sys/kgdb.h> 222 223 static bus_addr_t com_kgdb_addr; 224 static bus_space_tag_t com_kgdb_iot; 225 static bus_space_handle_t com_kgdb_ioh; 226 static int com_kgdb_attached; 227 228 int com_kgdb_getc __P((void *)); 229 void com_kgdb_putc __P((void *, int)); 230 #endif /* KGDB */ 231 232 #define COMUNIT_MASK 0x7ffff 233 #define COMDIALOUT_MASK 0x80000 234 235 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 236 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 237 238 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 239 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 240 241 #define BR BUS_SPACE_BARRIER_READ 242 #define BW BUS_SPACE_BARRIER_WRITE 243 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 244 245 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 246 247 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 248 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 249 250 #else 251 252 #define COM_LOCK(sc) 253 #define COM_UNLOCK(sc) 254 255 #endif 256 257 int 258 comspeed(speed, frequency) 259 long speed, frequency; 260 { 261 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 262 263 int x, err; 264 265 #if 0 266 if (speed == 0) 267 return (0); 268 #endif 269 if (speed <= 0) 270 return (-1); 271 x = divrnd(frequency / 16, speed); 272 if (x <= 0) 273 return (-1); 274 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 275 if (err < 0) 276 err = -err; 277 if (err > COM_TOLERANCE) 278 return (-1); 279 return (x); 280 281 #undef divrnd 282 } 283 284 #ifdef COM_DEBUG 285 int com_debug = 0; 286 287 void comstatus __P((struct com_softc *, char *)); 288 void 289 comstatus(sc, str) 290 struct com_softc *sc; 291 char *str; 292 { 293 struct tty *tp = sc->sc_tty; 294 295 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 296 sc->sc_dev.dv_xname, str, 297 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 298 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 299 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 300 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 301 sc->sc_tx_stopped ? "+" : "-"); 302 303 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 304 sc->sc_dev.dv_xname, str, 305 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 306 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 307 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 308 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 309 sc->sc_rx_flags); 310 } 311 #endif 312 313 int 314 comprobe1(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(hayespioh, sc) 332 bus_space_handle_t hayespioh; 333 struct com_softc *sc; 334 { 335 char val, dips; 336 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 337 bus_space_tag_t iot = sc->sc_iot; 338 339 /* 340 * Hayes ESP cards have two iobases. One is for compatibility with 341 * 16550 serial chips, and at the same ISA PC base addresses. The 342 * other is for ESP-specific enhanced features, and lies at a 343 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 344 */ 345 346 /* Test for ESP signature */ 347 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 348 return (0); 349 350 /* 351 * ESP is present at ESP enhanced base address; unknown com port 352 */ 353 354 /* Get the dip-switch configurations */ 355 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 356 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 357 358 /* Determine which com port this ESP card services: bits 0,1 of */ 359 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 360 if (sc->sc_iobase != combaselist[dips & 0x03]) 361 return (0); 362 363 printf(": ESP"); 364 365 /* Check ESP Self Test bits. */ 366 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 367 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 370 if ((val & 0x70) < 0x20) { 371 printf("-old (%o)", val & 0x70); 372 /* we do not support the necessary features */ 373 return (0); 374 } 375 376 /* Check for ability to emulate 16550: bit 8 == 1 */ 377 if ((dips & 0x80) == 0) { 378 printf(" slave"); 379 /* XXX Does slave really mean no 16550 support?? */ 380 return (0); 381 } 382 383 /* 384 * If we made it this far, we are a full-featured ESP v2.0 (or 385 * better), at the correct com port address. 386 */ 387 388 SET(sc->sc_hwflags, COM_HW_HAYESP); 389 printf(", 1024 byte fifo\n"); 390 return (1); 391 } 392 #endif 393 394 static void 395 com_enable_debugport(sc) 396 struct com_softc *sc; 397 { 398 int s; 399 400 /* Turn on line break interrupt, set carrier. */ 401 s = splserial(); 402 COM_LOCK(sc); 403 sc->sc_ier = IER_ERXRDY; 404 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 405 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 407 COM_UNLOCK(sc); 408 splx(s); 409 } 410 411 void 412 com_attach_subr(sc) 413 struct com_softc *sc; 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 427 callout_init(&sc->sc_diag_callout); 428 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 429 simple_lock_init(&sc->sc_lock); 430 #endif 431 432 /* Disable interrupts before configuring the device. */ 433 sc->sc_ier = 0; 434 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 435 436 if (iot == comconstag && iobase == comconsaddr) { 437 comconsattached = 1; 438 439 /* Make sure the console is always "hardwired". */ 440 delay(1000); /* wait for output to finish */ 441 SET(sc->sc_hwflags, COM_HW_CONSOLE); 442 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 443 } 444 445 #ifdef COM_HAYESP 446 sc->sc_prescaler = 0; /* set prescaler to x1. */ 447 448 /* Look for a Hayes ESP board. */ 449 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 450 bus_space_handle_t hayespioh; 451 452 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 453 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 454 continue; 455 if (comprobeHAYESP(hayespioh, sc)) { 456 sc->sc_hayespioh = hayespioh; 457 sc->sc_fifolen = 1024; 458 459 break; 460 } 461 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 462 } 463 /* No ESP; look for other things. */ 464 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 465 #endif 466 sc->sc_fifolen = 1; 467 /* look for a NS 16550AF UART with FIFOs */ 468 bus_space_write_1(iot, ioh, com_fifo, 469 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 470 delay(100); 471 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 472 == IIR_FIFO_MASK) 473 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 474 == FIFO_TRIGGER_14) { 475 SET(sc->sc_hwflags, COM_HW_FIFO); 476 477 #ifdef COM16650 478 /* 479 * IIR changes into the EFR if LCR is set to LCR_EERS 480 * on 16650s. We also know IIR != 0 at this point. 481 * Write 0 into the EFR, and read it. If the result 482 * is 0, we have a 16650. 483 * 484 * Older 16650s were broken; the test to detect them 485 * is taken from the Linux driver. Apparently 486 * setting DLAB enable gives access to the EFR on 487 * these chips. 488 */ 489 lcr = bus_space_read_1(iot, ioh, com_lcr); 490 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 491 bus_space_write_1(iot, ioh, com_efr, 0); 492 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 493 bus_space_write_1(iot, ioh, com_lcr, 494 lcr | LCR_DLAB); 495 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 496 CLR(sc->sc_hwflags, COM_HW_FIFO); 497 sc->sc_fifolen = 0; 498 } else { 499 SET(sc->sc_hwflags, COM_HW_FLOW); 500 sc->sc_fifolen = 32; 501 } 502 } else 503 #endif 504 sc->sc_fifolen = 16; 505 506 #ifdef COM16650 507 bus_space_write_1(iot, ioh, com_lcr, lcr); 508 if (sc->sc_fifolen == 0) 509 printf(": st16650, broken fifo\n"); 510 else if (sc->sc_fifolen == 32) 511 printf(": st16650a, working fifo\n"); 512 else 513 #endif 514 printf(": ns16550a, working fifo\n"); 515 } else 516 printf(": ns16550, broken fifo\n"); 517 else 518 printf(": ns8250 or ns16450, no fifo\n"); 519 bus_space_write_1(iot, ioh, com_fifo, 0); 520 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 521 sc->sc_fifolen = 1; 522 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 523 } 524 #ifdef COM_HAYESP 525 } 526 #endif 527 528 tp = ttymalloc(); 529 tp->t_oproc = comstart; 530 tp->t_param = comparam; 531 tp->t_hwiflow = comhwiflow; 532 533 sc->sc_tty = tp; 534 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 535 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 536 sc->sc_rbavail = com_rbuf_size; 537 if (sc->sc_rbuf == NULL) { 538 printf("%s: unable to allocate ring buffer\n", 539 sc->sc_dev.dv_xname); 540 return; 541 } 542 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 543 544 tty_attach(tp); 545 546 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 547 SET(sc->sc_mcr, MCR_IENABLE); 548 549 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 550 int maj; 551 552 /* locate the major number */ 553 for (maj = 0; maj < nchrdev; maj++) 554 if (cdevsw[maj].d_open == comopen) 555 break; 556 557 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 558 559 printf("%s: console\n", sc->sc_dev.dv_xname); 560 } 561 562 #ifdef KGDB 563 /* 564 * Allow kgdb to "take over" this port. If this is 565 * the kgdb device, it has exclusive use. 566 */ 567 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 568 com_kgdb_attached = 1; 569 570 SET(sc->sc_hwflags, COM_HW_KGDB); 571 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 572 } 573 #endif 574 575 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 576 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 577 #endif 578 579 #if NRND > 0 && defined(RND_COM) 580 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 581 RND_TYPE_TTY, 0); 582 #endif 583 584 /* if there are no enable/disable functions, assume the device 585 is always enabled */ 586 if (!sc->enable) 587 sc->enabled = 1; 588 589 com_config(sc); 590 591 SET(sc->sc_hwflags, COM_HW_DEV_OK); 592 } 593 594 void 595 com_config(sc) 596 struct com_softc *sc; 597 { 598 bus_space_tag_t iot = sc->sc_iot; 599 bus_space_handle_t ioh = sc->sc_ioh; 600 601 /* Disable interrupts before configuring the device. */ 602 sc->sc_ier = 0; 603 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 604 605 #ifdef COM_HAYESP 606 /* Look for a Hayes ESP board. */ 607 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 608 sc->sc_fifolen = 1024; 609 610 /* Set 16550 compatibility mode */ 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 612 HAYESP_SETMODE); 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 614 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 615 HAYESP_MODE_SCALE); 616 617 /* Set RTS/CTS flow control */ 618 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 619 HAYESP_SETFLOWTYPE); 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 621 HAYESP_FLOW_RTS); 622 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 623 HAYESP_FLOW_CTS); 624 625 /* Set flow control levels */ 626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 627 HAYESP_SETRXFLOW); 628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 629 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 631 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 635 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 636 } 637 #endif 638 639 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 640 com_enable_debugport(sc); 641 } 642 643 int 644 com_detach(self, flags) 645 struct device *self; 646 int flags; 647 { 648 struct com_softc *sc = (struct com_softc *)self; 649 int maj, mn; 650 651 /* locate the major number */ 652 for (maj = 0; maj < nchrdev; maj++) 653 if (cdevsw[maj].d_open == comopen) 654 break; 655 656 /* Nuke the vnodes for any open instances. */ 657 mn = self->dv_unit; 658 vdevgone(maj, mn, mn, VCHR); 659 660 mn |= COMDIALOUT_MASK; 661 vdevgone(maj, mn, mn, VCHR); 662 663 /* Free the receive buffer. */ 664 free(sc->sc_rbuf, M_DEVBUF); 665 666 /* Detach and free the tty. */ 667 tty_detach(sc->sc_tty); 668 ttyfree(sc->sc_tty); 669 670 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 671 /* Unhook the soft interrupt handler. */ 672 softintr_disestablish(sc->sc_si); 673 #endif 674 675 #if NRND > 0 && defined(RND_COM) 676 /* Unhook the entropy source. */ 677 rnd_detach_source(&sc->rnd_source); 678 #endif 679 680 return (0); 681 } 682 683 int 684 com_activate(self, act) 685 struct device *self; 686 enum devact act; 687 { 688 struct com_softc *sc = (struct com_softc *)self; 689 int s, rv = 0; 690 691 s = splserial(); 692 COM_LOCK(sc); 693 switch (act) { 694 case DVACT_ACTIVATE: 695 rv = EOPNOTSUPP; 696 break; 697 698 case DVACT_DEACTIVATE: 699 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 700 rv = EBUSY; 701 break; 702 } 703 704 if (sc->disable != NULL && sc->enabled != 0) { 705 (*sc->disable)(sc); 706 sc->enabled = 0; 707 } 708 break; 709 } 710 711 COM_UNLOCK(sc); 712 splx(s); 713 return (rv); 714 } 715 716 void 717 com_shutdown(sc) 718 struct com_softc *sc; 719 { 720 struct tty *tp = sc->sc_tty; 721 int s; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 726 /* If we were asserting flow control, then deassert it. */ 727 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 728 com_hwiflow(sc); 729 730 /* Clear any break condition set with TIOCSBRK. */ 731 com_break(sc, 0); 732 733 /* Turn off PPS capture on last close. */ 734 sc->sc_ppsmask = 0; 735 sc->ppsparam.mode = 0; 736 737 /* 738 * Hang up if necessary. Wait a bit, so the other side has time to 739 * notice even if we immediately open the port again. 740 * Avoid tsleeping above splhigh(). 741 */ 742 if (ISSET(tp->t_cflag, HUPCL)) { 743 com_modem(sc, 0); 744 COM_UNLOCK(sc); 745 splx(s); 746 /* XXX tsleep will only timeout */ 747 (void) tsleep(sc, TTIPRI, ttclos, hz); 748 s = splserial(); 749 COM_LOCK(sc); 750 } 751 752 /* Turn off interrupts. */ 753 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 754 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 755 else 756 sc->sc_ier = 0; 757 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 758 759 if (sc->disable) { 760 #ifdef DIAGNOSTIC 761 if (!sc->enabled) 762 panic("com_shutdown: not enabled?"); 763 #endif 764 (*sc->disable)(sc); 765 sc->enabled = 0; 766 } 767 COM_UNLOCK(sc); 768 splx(s); 769 } 770 771 int 772 comopen(devvp, flag, mode, p) 773 struct vnode *devvp; 774 int flag, mode; 775 struct proc *p; 776 { 777 struct com_softc *sc; 778 struct tty *tp; 779 int s, s2; 780 int error; 781 dev_t rdev; 782 783 rdev = vdev_rdev(devvp); 784 sc = device_lookup(&com_cd, COMUNIT(rdev)); 785 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 786 sc->sc_rbuf == NULL) 787 return (ENXIO); 788 789 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 790 return (ENXIO); 791 792 #ifdef KGDB 793 /* 794 * If this is the kgdb port, no other use is permitted. 795 */ 796 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 797 return (EBUSY); 798 #endif 799 800 tp = sc->sc_tty; 801 802 if (ISSET(tp->t_state, TS_ISOPEN) && 803 ISSET(tp->t_state, TS_XCLUDE) && 804 p->p_ucred->cr_uid != 0) 805 return (EBUSY); 806 807 vdev_setprivdata(devvp, sc); 808 809 s = spltty(); 810 811 /* 812 * Do the following iff this is a first open. 813 */ 814 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 815 struct termios t; 816 817 tp->t_devvp = devvp; 818 819 s2 = splserial(); 820 COM_LOCK(sc); 821 822 if (sc->enable) { 823 if ((*sc->enable)(sc)) { 824 COM_UNLOCK(sc); 825 splx(s2); 826 splx(s); 827 printf("%s: device enable failed\n", 828 sc->sc_dev.dv_xname); 829 return (EIO); 830 } 831 sc->enabled = 1; 832 com_config(sc); 833 } 834 835 /* Turn on interrupts. */ 836 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 837 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 838 839 /* Fetch the current modem control status, needed later. */ 840 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 841 842 /* Clear PPS capture state on first open. */ 843 sc->sc_ppsmask = 0; 844 sc->ppsparam.mode = 0; 845 846 COM_UNLOCK(sc); 847 splx(s2); 848 849 /* 850 * Initialize the termios status to the defaults. Add in the 851 * sticky bits from TIOCSFLAGS. 852 */ 853 t.c_ispeed = 0; 854 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 855 t.c_ospeed = comconsrate; 856 t.c_cflag = comconscflag; 857 } else { 858 t.c_ospeed = TTYDEF_SPEED; 859 t.c_cflag = TTYDEF_CFLAG; 860 } 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 862 SET(t.c_cflag, CLOCAL); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 864 SET(t.c_cflag, CRTSCTS); 865 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 866 SET(t.c_cflag, MDMBUF); 867 /* Make sure comparam() will do something. */ 868 tp->t_ospeed = 0; 869 (void) comparam(tp, &t); 870 tp->t_iflag = TTYDEF_IFLAG; 871 tp->t_oflag = TTYDEF_OFLAG; 872 tp->t_lflag = TTYDEF_LFLAG; 873 ttychars(tp); 874 ttsetwater(tp); 875 876 s2 = splserial(); 877 COM_LOCK(sc); 878 879 /* 880 * Turn on DTR. We must always do this, even if carrier is not 881 * present, because otherwise we'd have to use TIOCSDTR 882 * immediately after setting CLOCAL, which applications do not 883 * expect. We always assert DTR while the device is open 884 * unless explicitly requested to deassert it. 885 */ 886 com_modem(sc, 1); 887 888 /* Clear the input ring, and unblock. */ 889 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 890 sc->sc_rbavail = com_rbuf_size; 891 com_iflush(sc); 892 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 893 com_hwiflow(sc); 894 895 #ifdef COM_DEBUG 896 if (com_debug) 897 comstatus(sc, "comopen "); 898 #endif 899 900 COM_UNLOCK(sc); 901 splx(s2); 902 } 903 904 splx(s); 905 906 error = ttyopen(tp, COMDIALOUT(rdev), ISSET(flag, O_NONBLOCK)); 907 if (error) 908 goto bad; 909 910 error = (*tp->t_linesw->l_open)(devvp, tp); 911 if (error) 912 goto bad; 913 914 return (0); 915 916 bad: 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * We failed to open the device, and nobody else had it opened. 920 * Clean up the state as appropriate. 921 */ 922 com_shutdown(sc); 923 } 924 925 return (error); 926 } 927 928 int 929 comclose(devvp, flag, mode, p) 930 struct vnode *devvp; 931 int flag, mode; 932 struct proc *p; 933 { 934 struct com_softc *sc; 935 struct tty *tp; 936 937 sc = vdev_privdata(devvp); 938 939 /* XXX This is for cons.c. */ 940 if (sc == NULL) 941 return (0); 942 tp = sc->sc_tty; 943 if (!ISSET(tp->t_state, TS_ISOPEN)) 944 return (0); 945 946 (*tp->t_linesw->l_close)(tp, flag); 947 ttyclose(tp); 948 949 if (COM_ISALIVE(sc) == 0) 950 return (0); 951 952 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 953 /* 954 * Although we got a last close, the device may still be in 955 * use; e.g. if this was the dialout node, and there are still 956 * processes waiting for carrier on the non-dialout node. 957 */ 958 com_shutdown(sc); 959 } 960 961 return (0); 962 } 963 964 int 965 comread(devvp, uio, flag) 966 struct vnode *devvp; 967 struct uio *uio; 968 int flag; 969 { 970 struct com_softc *sc; 971 struct tty *tp; 972 973 sc = vdev_privdata(devvp); 974 tp = sc->sc_tty; 975 976 if (COM_ISALIVE(sc) == 0) 977 return (EIO); 978 979 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 980 } 981 982 int 983 comwrite(devvp, uio, flag) 984 struct vnode *devvp; 985 struct uio *uio; 986 int flag; 987 { 988 struct com_softc *sc; 989 struct tty *tp; 990 991 sc = vdev_privdata(devvp); 992 tp = sc->sc_tty; 993 994 if (COM_ISALIVE(sc) == 0) 995 return (EIO); 996 997 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 998 } 999 1000 int 1001 compoll(devvp, events, p) 1002 struct vnode *devvp; 1003 int events; 1004 struct proc *p; 1005 { 1006 struct com_softc *sc; 1007 struct tty *tp; 1008 1009 sc = vdev_privdata(devvp); 1010 tp = sc->sc_tty; 1011 1012 if (COM_ISALIVE(sc) == 0) 1013 return (EIO); 1014 1015 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1016 } 1017 1018 struct tty * 1019 comtty(devvp) 1020 struct vnode *devvp; 1021 { 1022 struct com_softc *sc; 1023 struct tty *tp; 1024 1025 sc = vdev_privdata(devvp); 1026 tp = sc->sc_tty; 1027 1028 return (tp); 1029 } 1030 1031 int 1032 comioctl(devvp, cmd, data, flag, p) 1033 struct vnode *devvp; 1034 u_long cmd; 1035 caddr_t data; 1036 int flag; 1037 struct proc *p; 1038 { 1039 struct com_softc *sc; 1040 struct tty *tp; 1041 int error; 1042 int s; 1043 1044 sc = vdev_privdata(devvp); 1045 tp = sc->sc_tty; 1046 1047 if (COM_ISALIVE(sc) == 0) 1048 return (EIO); 1049 1050 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1051 if (error >= 0) 1052 return (error); 1053 1054 error = ttioctl(tp, cmd, data, flag, p); 1055 if (error >= 0) 1056 return (error); 1057 1058 error = 0; 1059 1060 s = splserial(); 1061 COM_LOCK(sc); 1062 1063 switch (cmd) { 1064 case TIOCSBRK: 1065 com_break(sc, 1); 1066 break; 1067 1068 case TIOCCBRK: 1069 com_break(sc, 0); 1070 break; 1071 1072 case TIOCSDTR: 1073 com_modem(sc, 1); 1074 break; 1075 1076 case TIOCCDTR: 1077 com_modem(sc, 0); 1078 break; 1079 1080 case TIOCGFLAGS: 1081 *(int *)data = sc->sc_swflags; 1082 break; 1083 1084 case TIOCSFLAGS: 1085 error = suser(p->p_ucred, &p->p_acflag); 1086 if (error) 1087 break; 1088 sc->sc_swflags = *(int *)data; 1089 break; 1090 1091 case TIOCMSET: 1092 case TIOCMBIS: 1093 case TIOCMBIC: 1094 tiocm_to_com(sc, cmd, *(int *)data); 1095 break; 1096 1097 case TIOCMGET: 1098 *(int *)data = com_to_tiocm(sc); 1099 break; 1100 1101 case PPS_IOC_CREATE: 1102 break; 1103 1104 case PPS_IOC_DESTROY: 1105 break; 1106 1107 case PPS_IOC_GETPARAMS: { 1108 pps_params_t *pp; 1109 pp = (pps_params_t *)data; 1110 *pp = sc->ppsparam; 1111 break; 1112 } 1113 1114 case PPS_IOC_SETPARAMS: { 1115 pps_params_t *pp; 1116 int mode; 1117 pp = (pps_params_t *)data; 1118 if (pp->mode & ~ppscap) { 1119 error = EINVAL; 1120 break; 1121 } 1122 sc->ppsparam = *pp; 1123 /* 1124 * Compute msr masks from user-specified timestamp state. 1125 */ 1126 mode = sc->ppsparam.mode; 1127 #ifdef PPS_SYNC 1128 if (mode & PPS_HARDPPSONASSERT) { 1129 mode |= PPS_CAPTUREASSERT; 1130 /* XXX revoke any previous HARDPPS source */ 1131 } 1132 if (mode & PPS_HARDPPSONCLEAR) { 1133 mode |= PPS_CAPTURECLEAR; 1134 /* XXX revoke any previous HARDPPS source */ 1135 } 1136 #endif /* PPS_SYNC */ 1137 switch (mode & PPS_CAPTUREBOTH) { 1138 case 0: 1139 sc->sc_ppsmask = 0; 1140 break; 1141 1142 case PPS_CAPTUREASSERT: 1143 sc->sc_ppsmask = MSR_DCD; 1144 sc->sc_ppsassert = MSR_DCD; 1145 sc->sc_ppsclear = -1; 1146 break; 1147 1148 case PPS_CAPTURECLEAR: 1149 sc->sc_ppsmask = MSR_DCD; 1150 sc->sc_ppsassert = -1; 1151 sc->sc_ppsclear = 0; 1152 break; 1153 1154 case PPS_CAPTUREBOTH: 1155 sc->sc_ppsmask = MSR_DCD; 1156 sc->sc_ppsassert = MSR_DCD; 1157 sc->sc_ppsclear = 0; 1158 break; 1159 1160 default: 1161 error = EINVAL; 1162 break; 1163 } 1164 break; 1165 } 1166 1167 case PPS_IOC_GETCAP: 1168 *(int*)data = ppscap; 1169 break; 1170 1171 case PPS_IOC_FETCH: { 1172 pps_info_t *pi; 1173 pi = (pps_info_t *)data; 1174 *pi = sc->ppsinfo; 1175 break; 1176 } 1177 1178 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1179 /* 1180 * Some GPS clocks models use the falling rather than 1181 * rising edge as the on-the-second signal. 1182 * The old API has no way to specify PPS polarity. 1183 */ 1184 sc->sc_ppsmask = MSR_DCD; 1185 #ifndef PPS_TRAILING_EDGE 1186 sc->sc_ppsassert = MSR_DCD; 1187 sc->sc_ppsclear = -1; 1188 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1189 &sc->ppsinfo.assert_timestamp); 1190 #else 1191 sc->sc_ppsassert = -1 1192 sc->sc_ppsclear = 0; 1193 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1194 &sc->ppsinfo.clear_timestamp); 1195 #endif 1196 break; 1197 1198 default: 1199 error = ENOTTY; 1200 break; 1201 } 1202 1203 COM_UNLOCK(sc); 1204 splx(s); 1205 1206 #ifdef COM_DEBUG 1207 if (com_debug) 1208 comstatus(sc, "comioctl "); 1209 #endif 1210 1211 return (error); 1212 } 1213 1214 integrate void 1215 com_schedrx(sc) 1216 struct com_softc *sc; 1217 { 1218 1219 sc->sc_rx_ready = 1; 1220 1221 /* Wake up the poller. */ 1222 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1223 softintr_schedule(sc->sc_si); 1224 #else 1225 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1226 setsoftserial(); 1227 #else 1228 if (!com_softintr_scheduled) { 1229 com_softintr_scheduled = 1; 1230 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1231 } 1232 #endif 1233 #endif 1234 } 1235 1236 void 1237 com_break(sc, onoff) 1238 struct com_softc *sc; 1239 int onoff; 1240 { 1241 1242 if (onoff) 1243 SET(sc->sc_lcr, LCR_SBREAK); 1244 else 1245 CLR(sc->sc_lcr, LCR_SBREAK); 1246 1247 if (!sc->sc_heldchange) { 1248 if (sc->sc_tx_busy) { 1249 sc->sc_heldtbc = sc->sc_tbc; 1250 sc->sc_tbc = 0; 1251 sc->sc_heldchange = 1; 1252 } else 1253 com_loadchannelregs(sc); 1254 } 1255 } 1256 1257 void 1258 com_modem(sc, onoff) 1259 struct com_softc *sc; 1260 int onoff; 1261 { 1262 1263 if (sc->sc_mcr_dtr == 0) 1264 return; 1265 1266 if (onoff) 1267 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1268 else 1269 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1270 1271 if (!sc->sc_heldchange) { 1272 if (sc->sc_tx_busy) { 1273 sc->sc_heldtbc = sc->sc_tbc; 1274 sc->sc_tbc = 0; 1275 sc->sc_heldchange = 1; 1276 } else 1277 com_loadchannelregs(sc); 1278 } 1279 } 1280 1281 void 1282 tiocm_to_com(sc, how, ttybits) 1283 struct com_softc *sc; 1284 u_long how; 1285 int ttybits; 1286 { 1287 u_char combits; 1288 1289 combits = 0; 1290 if (ISSET(ttybits, TIOCM_DTR)) 1291 SET(combits, MCR_DTR); 1292 if (ISSET(ttybits, TIOCM_RTS)) 1293 SET(combits, MCR_RTS); 1294 1295 switch (how) { 1296 case TIOCMBIC: 1297 CLR(sc->sc_mcr, combits); 1298 break; 1299 1300 case TIOCMBIS: 1301 SET(sc->sc_mcr, combits); 1302 break; 1303 1304 case TIOCMSET: 1305 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1306 SET(sc->sc_mcr, combits); 1307 break; 1308 } 1309 1310 if (!sc->sc_heldchange) { 1311 if (sc->sc_tx_busy) { 1312 sc->sc_heldtbc = sc->sc_tbc; 1313 sc->sc_tbc = 0; 1314 sc->sc_heldchange = 1; 1315 } else 1316 com_loadchannelregs(sc); 1317 } 1318 } 1319 1320 int 1321 com_to_tiocm(sc) 1322 struct com_softc *sc; 1323 { 1324 u_char combits; 1325 int ttybits = 0; 1326 1327 combits = sc->sc_mcr; 1328 if (ISSET(combits, MCR_DTR)) 1329 SET(ttybits, TIOCM_DTR); 1330 if (ISSET(combits, MCR_RTS)) 1331 SET(ttybits, TIOCM_RTS); 1332 1333 combits = sc->sc_msr; 1334 if (ISSET(combits, MSR_DCD)) 1335 SET(ttybits, TIOCM_CD); 1336 if (ISSET(combits, MSR_CTS)) 1337 SET(ttybits, TIOCM_CTS); 1338 if (ISSET(combits, MSR_DSR)) 1339 SET(ttybits, TIOCM_DSR); 1340 if (ISSET(combits, MSR_RI | MSR_TERI)) 1341 SET(ttybits, TIOCM_RI); 1342 1343 if (sc->sc_ier != 0) 1344 SET(ttybits, TIOCM_LE); 1345 1346 return (ttybits); 1347 } 1348 1349 static u_char 1350 cflag2lcr(cflag) 1351 tcflag_t cflag; 1352 { 1353 u_char lcr = 0; 1354 1355 switch (ISSET(cflag, CSIZE)) { 1356 case CS5: 1357 SET(lcr, LCR_5BITS); 1358 break; 1359 case CS6: 1360 SET(lcr, LCR_6BITS); 1361 break; 1362 case CS7: 1363 SET(lcr, LCR_7BITS); 1364 break; 1365 case CS8: 1366 SET(lcr, LCR_8BITS); 1367 break; 1368 } 1369 if (ISSET(cflag, PARENB)) { 1370 SET(lcr, LCR_PENAB); 1371 if (!ISSET(cflag, PARODD)) 1372 SET(lcr, LCR_PEVEN); 1373 } 1374 if (ISSET(cflag, CSTOPB)) 1375 SET(lcr, LCR_STOPB); 1376 1377 return (lcr); 1378 } 1379 1380 int 1381 comparam(tp, t) 1382 struct tty *tp; 1383 struct termios *t; 1384 { 1385 struct com_softc *sc; 1386 int ospeed; 1387 u_char lcr; 1388 int s; 1389 1390 sc = vdev_privdata(tp->t_devvp); 1391 1392 if (COM_ISALIVE(sc) == 0) 1393 return (EIO); 1394 1395 #ifdef COM_HAYESP 1396 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1397 int prescaler, speed; 1398 1399 /* 1400 * Calculate UART clock prescaler. It should be in 1401 * range of 0 .. 3. 1402 */ 1403 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1404 prescaler++, speed /= 2) 1405 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1406 break; 1407 1408 if (prescaler == 4) 1409 return (EINVAL); 1410 sc->sc_prescaler = prescaler; 1411 } else 1412 #endif 1413 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1414 1415 /* Check requested parameters. */ 1416 if (ospeed < 0) 1417 return (EINVAL); 1418 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1419 return (EINVAL); 1420 1421 /* 1422 * For the console, always force CLOCAL and !HUPCL, so that the port 1423 * is always active. 1424 */ 1425 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1426 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1427 SET(t->c_cflag, CLOCAL); 1428 CLR(t->c_cflag, HUPCL); 1429 } 1430 1431 /* 1432 * If there were no changes, don't do anything. This avoids dropping 1433 * input and improves performance when all we did was frob things like 1434 * VMIN and VTIME. 1435 */ 1436 if (tp->t_ospeed == t->c_ospeed && 1437 tp->t_cflag == t->c_cflag) 1438 return (0); 1439 1440 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1441 1442 s = splserial(); 1443 COM_LOCK(sc); 1444 1445 sc->sc_lcr = lcr; 1446 1447 /* 1448 * If we're not in a mode that assumes a connection is present, then 1449 * ignore carrier changes. 1450 */ 1451 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1452 sc->sc_msr_dcd = 0; 1453 else 1454 sc->sc_msr_dcd = MSR_DCD; 1455 /* 1456 * Set the flow control pins depending on the current flow control 1457 * mode. 1458 */ 1459 if (ISSET(t->c_cflag, CRTSCTS)) { 1460 sc->sc_mcr_dtr = MCR_DTR; 1461 sc->sc_mcr_rts = MCR_RTS; 1462 sc->sc_msr_cts = MSR_CTS; 1463 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1464 } else if (ISSET(t->c_cflag, MDMBUF)) { 1465 /* 1466 * For DTR/DCD flow control, make sure we don't toggle DTR for 1467 * carrier detection. 1468 */ 1469 sc->sc_mcr_dtr = 0; 1470 sc->sc_mcr_rts = MCR_DTR; 1471 sc->sc_msr_cts = MSR_DCD; 1472 sc->sc_efr = 0; 1473 } else { 1474 /* 1475 * If no flow control, then always set RTS. This will make 1476 * the other side happy if it mistakenly thinks we're doing 1477 * RTS/CTS flow control. 1478 */ 1479 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1480 sc->sc_mcr_rts = 0; 1481 sc->sc_msr_cts = 0; 1482 sc->sc_efr = 0; 1483 if (ISSET(sc->sc_mcr, MCR_DTR)) 1484 SET(sc->sc_mcr, MCR_RTS); 1485 else 1486 CLR(sc->sc_mcr, MCR_RTS); 1487 } 1488 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1489 1490 #if 0 1491 if (ospeed == 0) 1492 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1493 else 1494 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1495 #endif 1496 1497 sc->sc_dlbl = ospeed; 1498 sc->sc_dlbh = ospeed >> 8; 1499 1500 /* 1501 * Set the FIFO threshold based on the receive speed. 1502 * 1503 * * If it's a low speed, it's probably a mouse or some other 1504 * interactive device, so set the threshold low. 1505 * * If it's a high speed, trim the trigger level down to prevent 1506 * overflows. 1507 * * Otherwise set it a bit higher. 1508 */ 1509 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1510 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1511 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1512 sc->sc_fifo = FIFO_ENABLE | 1513 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1514 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1515 else 1516 sc->sc_fifo = 0; 1517 1518 /* And copy to tty. */ 1519 tp->t_ispeed = 0; 1520 tp->t_ospeed = t->c_ospeed; 1521 tp->t_cflag = t->c_cflag; 1522 1523 if (!sc->sc_heldchange) { 1524 if (sc->sc_tx_busy) { 1525 sc->sc_heldtbc = sc->sc_tbc; 1526 sc->sc_tbc = 0; 1527 sc->sc_heldchange = 1; 1528 } else 1529 com_loadchannelregs(sc); 1530 } 1531 1532 if (!ISSET(t->c_cflag, CHWFLOW)) { 1533 /* Disable the high water mark. */ 1534 sc->sc_r_hiwat = 0; 1535 sc->sc_r_lowat = 0; 1536 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1537 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1538 com_schedrx(sc); 1539 } 1540 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1541 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1542 com_hwiflow(sc); 1543 } 1544 } else { 1545 sc->sc_r_hiwat = com_rbuf_hiwat; 1546 sc->sc_r_lowat = com_rbuf_lowat; 1547 } 1548 1549 COM_UNLOCK(sc); 1550 splx(s); 1551 1552 /* 1553 * Update the tty layer's idea of the carrier bit, in case we changed 1554 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1555 * explicit request. 1556 */ 1557 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1558 1559 #ifdef COM_DEBUG 1560 if (com_debug) 1561 comstatus(sc, "comparam "); 1562 #endif 1563 1564 if (!ISSET(t->c_cflag, CHWFLOW)) { 1565 if (sc->sc_tx_stopped) { 1566 sc->sc_tx_stopped = 0; 1567 comstart(tp); 1568 } 1569 } 1570 1571 return (0); 1572 } 1573 1574 void 1575 com_iflush(sc) 1576 struct com_softc *sc; 1577 { 1578 bus_space_tag_t iot = sc->sc_iot; 1579 bus_space_handle_t ioh = sc->sc_ioh; 1580 #ifdef DIAGNOSTIC 1581 int reg; 1582 #endif 1583 int timo; 1584 1585 #ifdef DIAGNOSTIC 1586 reg = 0xffff; 1587 #endif 1588 timo = 50000; 1589 /* flush any pending I/O */ 1590 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1591 && --timo) 1592 #ifdef DIAGNOSTIC 1593 reg = 1594 #else 1595 (void) 1596 #endif 1597 bus_space_read_1(iot, ioh, com_data); 1598 #ifdef DIAGNOSTIC 1599 if (!timo) 1600 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1601 reg); 1602 #endif 1603 } 1604 1605 void 1606 com_loadchannelregs(sc) 1607 struct com_softc *sc; 1608 { 1609 bus_space_tag_t iot = sc->sc_iot; 1610 bus_space_handle_t ioh = sc->sc_ioh; 1611 1612 /* XXXXX necessary? */ 1613 com_iflush(sc); 1614 1615 bus_space_write_1(iot, ioh, com_ier, 0); 1616 1617 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1618 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1619 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1620 } 1621 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1622 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1623 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1624 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1625 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1626 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1627 #ifdef COM_HAYESP 1628 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1630 HAYESP_SETPRESCALER); 1631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1632 sc->sc_prescaler); 1633 } 1634 #endif 1635 1636 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1637 } 1638 1639 int 1640 comhwiflow(tp, block) 1641 struct tty *tp; 1642 int block; 1643 { 1644 struct com_softc *sc; 1645 int s; 1646 1647 sc = vdev_privdata(tp->t_devvp); 1648 1649 if (COM_ISALIVE(sc) == 0) 1650 return (0); 1651 1652 if (sc->sc_mcr_rts == 0) 1653 return (0); 1654 1655 s = splserial(); 1656 COM_LOCK(sc); 1657 1658 if (block) { 1659 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1660 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1661 com_hwiflow(sc); 1662 } 1663 } else { 1664 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1665 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1666 com_schedrx(sc); 1667 } 1668 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1669 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1670 com_hwiflow(sc); 1671 } 1672 } 1673 1674 COM_UNLOCK(sc); 1675 splx(s); 1676 return (1); 1677 } 1678 1679 /* 1680 * (un)block input via hw flowcontrol 1681 */ 1682 void 1683 com_hwiflow(sc) 1684 struct com_softc *sc; 1685 { 1686 bus_space_tag_t iot = sc->sc_iot; 1687 bus_space_handle_t ioh = sc->sc_ioh; 1688 1689 if (sc->sc_mcr_rts == 0) 1690 return; 1691 1692 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1693 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1694 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1695 } else { 1696 SET(sc->sc_mcr, sc->sc_mcr_rts); 1697 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1698 } 1699 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1700 } 1701 1702 1703 void 1704 comstart(tp) 1705 struct tty *tp; 1706 { 1707 struct com_softc *sc; 1708 bus_space_tag_t iot; 1709 bus_space_handle_t ioh; 1710 int s; 1711 1712 sc = vdev_privdata(tp->t_devvp); 1713 1714 iot = sc->sc_iot; 1715 ioh = sc->sc_ioh; 1716 1717 if (COM_ISALIVE(sc) == 0) 1718 return; 1719 1720 s = spltty(); 1721 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1722 goto out; 1723 if (sc->sc_tx_stopped) 1724 goto out; 1725 1726 if (tp->t_outq.c_cc <= tp->t_lowat) { 1727 if (ISSET(tp->t_state, TS_ASLEEP)) { 1728 CLR(tp->t_state, TS_ASLEEP); 1729 wakeup(&tp->t_outq); 1730 } 1731 selwakeup(&tp->t_wsel); 1732 if (tp->t_outq.c_cc == 0) 1733 goto out; 1734 } 1735 1736 /* Grab the first contiguous region of buffer space. */ 1737 { 1738 u_char *tba; 1739 int tbc; 1740 1741 tba = tp->t_outq.c_cf; 1742 tbc = ndqb(&tp->t_outq, 0); 1743 1744 (void)splserial(); 1745 COM_LOCK(sc); 1746 1747 sc->sc_tba = tba; 1748 sc->sc_tbc = tbc; 1749 } 1750 1751 SET(tp->t_state, TS_BUSY); 1752 sc->sc_tx_busy = 1; 1753 1754 /* Enable transmit completion interrupts if necessary. */ 1755 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1756 SET(sc->sc_ier, IER_ETXRDY); 1757 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1758 } 1759 1760 /* Output the first chunk of the contiguous buffer. */ 1761 { 1762 int n; 1763 1764 n = sc->sc_tbc; 1765 if (n > sc->sc_fifolen) 1766 n = sc->sc_fifolen; 1767 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1768 sc->sc_tbc -= n; 1769 sc->sc_tba += n; 1770 } 1771 COM_UNLOCK(sc); 1772 out: 1773 splx(s); 1774 return; 1775 } 1776 1777 /* 1778 * Stop output on a line. 1779 */ 1780 void 1781 comstop(tp, flag) 1782 struct tty *tp; 1783 int flag; 1784 { 1785 struct com_softc *sc; 1786 int s; 1787 1788 sc = vdev_privdata(tp->t_devvp); 1789 1790 s = splserial(); 1791 COM_LOCK(sc); 1792 if (ISSET(tp->t_state, TS_BUSY)) { 1793 /* Stop transmitting at the next chunk. */ 1794 sc->sc_tbc = 0; 1795 sc->sc_heldtbc = 0; 1796 if (!ISSET(tp->t_state, TS_TTSTOP)) 1797 SET(tp->t_state, TS_FLUSH); 1798 } 1799 COM_UNLOCK(sc); 1800 splx(s); 1801 } 1802 1803 void 1804 comdiag(arg) 1805 void *arg; 1806 { 1807 struct com_softc *sc = arg; 1808 int overflows, floods; 1809 int s; 1810 1811 s = splserial(); 1812 COM_LOCK(sc); 1813 overflows = sc->sc_overflows; 1814 sc->sc_overflows = 0; 1815 floods = sc->sc_floods; 1816 sc->sc_floods = 0; 1817 sc->sc_errors = 0; 1818 COM_UNLOCK(sc); 1819 splx(s); 1820 1821 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1822 sc->sc_dev.dv_xname, 1823 overflows, overflows == 1 ? "" : "s", 1824 floods, floods == 1 ? "" : "s"); 1825 } 1826 1827 integrate void 1828 com_rxsoft(sc, tp) 1829 struct com_softc *sc; 1830 struct tty *tp; 1831 { 1832 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1833 u_char *get, *end; 1834 u_int cc, scc; 1835 u_char lsr; 1836 int code; 1837 int s; 1838 1839 end = sc->sc_ebuf; 1840 get = sc->sc_rbget; 1841 scc = cc = com_rbuf_size - sc->sc_rbavail; 1842 1843 if (cc == com_rbuf_size) { 1844 sc->sc_floods++; 1845 if (sc->sc_errors++ == 0) 1846 callout_reset(&sc->sc_diag_callout, 60 * hz, 1847 comdiag, sc); 1848 } 1849 1850 while (cc) { 1851 code = get[0]; 1852 lsr = get[1]; 1853 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1854 if (ISSET(lsr, LSR_OE)) { 1855 sc->sc_overflows++; 1856 if (sc->sc_errors++ == 0) 1857 callout_reset(&sc->sc_diag_callout, 1858 60 * hz, comdiag, sc); 1859 } 1860 if (ISSET(lsr, LSR_BI | LSR_FE)) 1861 SET(code, TTY_FE); 1862 if (ISSET(lsr, LSR_PE)) 1863 SET(code, TTY_PE); 1864 } 1865 if ((*rint)(code, tp) == -1) { 1866 /* 1867 * The line discipline's buffer is out of space. 1868 */ 1869 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1870 /* 1871 * We're either not using flow control, or the 1872 * line discipline didn't tell us to block for 1873 * some reason. Either way, we have no way to 1874 * know when there's more space available, so 1875 * just drop the rest of the data. 1876 */ 1877 get += cc << 1; 1878 if (get >= end) 1879 get -= com_rbuf_size << 1; 1880 cc = 0; 1881 } else { 1882 /* 1883 * Don't schedule any more receive processing 1884 * until the line discipline tells us there's 1885 * space available (through comhwiflow()). 1886 * Leave the rest of the data in the input 1887 * buffer. 1888 */ 1889 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1890 } 1891 break; 1892 } 1893 get += 2; 1894 if (get >= end) 1895 get = sc->sc_rbuf; 1896 cc--; 1897 } 1898 1899 if (cc != scc) { 1900 sc->sc_rbget = get; 1901 s = splserial(); 1902 COM_LOCK(sc); 1903 1904 cc = sc->sc_rbavail += scc - cc; 1905 /* Buffers should be ok again, release possible block. */ 1906 if (cc >= sc->sc_r_lowat) { 1907 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1908 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1909 SET(sc->sc_ier, IER_ERXRDY); 1910 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1911 } 1912 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1913 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1914 com_hwiflow(sc); 1915 } 1916 } 1917 COM_UNLOCK(sc); 1918 splx(s); 1919 } 1920 } 1921 1922 integrate void 1923 com_txsoft(sc, tp) 1924 struct com_softc *sc; 1925 struct tty *tp; 1926 { 1927 1928 CLR(tp->t_state, TS_BUSY); 1929 if (ISSET(tp->t_state, TS_FLUSH)) 1930 CLR(tp->t_state, TS_FLUSH); 1931 else 1932 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1933 (*tp->t_linesw->l_start)(tp); 1934 } 1935 1936 integrate void 1937 com_stsoft(sc, tp) 1938 struct com_softc *sc; 1939 struct tty *tp; 1940 { 1941 u_char msr, delta; 1942 int s; 1943 1944 s = splserial(); 1945 COM_LOCK(sc); 1946 msr = sc->sc_msr; 1947 delta = sc->sc_msr_delta; 1948 sc->sc_msr_delta = 0; 1949 COM_UNLOCK(sc); 1950 splx(s); 1951 1952 if (ISSET(delta, sc->sc_msr_dcd)) { 1953 /* 1954 * Inform the tty layer that carrier detect changed. 1955 */ 1956 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1957 } 1958 1959 if (ISSET(delta, sc->sc_msr_cts)) { 1960 /* Block or unblock output according to flow control. */ 1961 if (ISSET(msr, sc->sc_msr_cts)) { 1962 sc->sc_tx_stopped = 0; 1963 (*tp->t_linesw->l_start)(tp); 1964 } else { 1965 sc->sc_tx_stopped = 1; 1966 } 1967 } 1968 1969 #ifdef COM_DEBUG 1970 if (com_debug) 1971 comstatus(sc, "com_stsoft"); 1972 #endif 1973 } 1974 1975 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1976 void 1977 comsoft(arg) 1978 void *arg; 1979 { 1980 struct com_softc *sc = arg; 1981 struct tty *tp; 1982 1983 if (COM_ISALIVE(sc) == 0) 1984 return; 1985 1986 { 1987 #else 1988 void 1989 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1990 comsoft() 1991 #else 1992 comsoft(arg) 1993 void *arg; 1994 #endif 1995 { 1996 struct com_softc *sc; 1997 struct tty *tp; 1998 int unit; 1999 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2000 int s; 2001 2002 s = splsoftserial(); 2003 com_softintr_scheduled = 0; 2004 #endif 2005 2006 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2007 sc = device_lookup(&com_cd, unit); 2008 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2009 continue; 2010 2011 if (COM_ISALIVE(sc) == 0) 2012 continue; 2013 2014 tp = sc->sc_tty; 2015 if (tp == NULL) 2016 continue; 2017 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2018 continue; 2019 #endif 2020 tp = sc->sc_tty; 2021 2022 if (sc->sc_rx_ready) { 2023 sc->sc_rx_ready = 0; 2024 com_rxsoft(sc, tp); 2025 } 2026 2027 if (sc->sc_st_check) { 2028 sc->sc_st_check = 0; 2029 com_stsoft(sc, tp); 2030 } 2031 2032 if (sc->sc_tx_done) { 2033 sc->sc_tx_done = 0; 2034 com_txsoft(sc, tp); 2035 } 2036 } 2037 2038 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2039 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2040 splx(s); 2041 #endif 2042 #endif 2043 } 2044 2045 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2046 /* there has got to be a better way to do comsoft() */ 2047 }} 2048 #endif 2049 2050 int 2051 comintr(arg) 2052 void *arg; 2053 { 2054 struct com_softc *sc = arg; 2055 bus_space_tag_t iot = sc->sc_iot; 2056 bus_space_handle_t ioh = sc->sc_ioh; 2057 u_char *put, *end; 2058 u_int cc; 2059 u_char lsr, iir; 2060 dev_t rdev; 2061 2062 if (COM_ISALIVE(sc) == 0) 2063 return (0); 2064 2065 if (sc->sc_tty->t_devvp->v_type == VBAD) 2066 return (0); 2067 2068 rdev = vdev_rdev(sc->sc_tty->t_devvp); 2069 2070 COM_LOCK(sc); 2071 iir = bus_space_read_1(iot, ioh, com_iir); 2072 if (ISSET(iir, IIR_NOPEND)) { 2073 COM_UNLOCK(sc); 2074 return (0); 2075 } 2076 2077 end = sc->sc_ebuf; 2078 put = sc->sc_rbput; 2079 cc = sc->sc_rbavail; 2080 2081 do { 2082 u_char msr, delta; 2083 2084 lsr = bus_space_read_1(iot, ioh, com_lsr); 2085 if (ISSET(lsr, LSR_BI)) { 2086 int cn_trapped = 0; 2087 cn_check_magic(rdev, CNC_BREAK, com_cnm_state); 2088 if (cn_trapped) 2089 continue; 2090 #if defined(KGDB) 2091 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2092 kgdb_connect(1); 2093 continue; 2094 } 2095 #endif 2096 } 2097 2098 if (ISSET(lsr, LSR_RCV_MASK) && 2099 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2100 while (cc > 0) { 2101 int cn_trapped = 0; 2102 put[0] = bus_space_read_1(iot, ioh, com_data); 2103 put[1] = lsr; 2104 cn_check_magic(rdev, put[0], com_cnm_state); 2105 if (cn_trapped) { 2106 lsr = bus_space_read_1(iot, ioh, com_lsr); 2107 if (!ISSET(lsr, LSR_RCV_MASK)) 2108 break; 2109 2110 continue; 2111 } 2112 put += 2; 2113 if (put >= end) 2114 put = sc->sc_rbuf; 2115 cc--; 2116 2117 lsr = bus_space_read_1(iot, ioh, com_lsr); 2118 if (!ISSET(lsr, LSR_RCV_MASK)) 2119 break; 2120 } 2121 2122 /* 2123 * Current string of incoming characters ended because 2124 * no more data was available or we ran out of space. 2125 * Schedule a receive event if any data was received. 2126 * If we're out of space, turn off receive interrupts. 2127 */ 2128 sc->sc_rbput = put; 2129 sc->sc_rbavail = cc; 2130 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2131 sc->sc_rx_ready = 1; 2132 2133 /* 2134 * See if we are in danger of overflowing a buffer. If 2135 * so, use hardware flow control to ease the pressure. 2136 */ 2137 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2138 cc < sc->sc_r_hiwat) { 2139 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2140 com_hwiflow(sc); 2141 } 2142 2143 /* 2144 * If we're out of space, disable receive interrupts 2145 * until the queue has drained a bit. 2146 */ 2147 if (!cc) { 2148 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2149 CLR(sc->sc_ier, IER_ERXRDY); 2150 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2151 } 2152 } else { 2153 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2154 bus_space_write_1(iot, ioh, com_ier, 0); 2155 delay(10); 2156 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2157 iir = IIR_NOPEND; 2158 continue; 2159 } 2160 } 2161 2162 msr = bus_space_read_1(iot, ioh, com_msr); 2163 delta = msr ^ sc->sc_msr; 2164 sc->sc_msr = msr; 2165 /* 2166 * Pulse-per-second (PSS) signals on edge of DCD? 2167 * Process these even if line discipline is ignoring DCD. 2168 */ 2169 if (delta & sc->sc_ppsmask) { 2170 struct timeval tv; 2171 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2172 /* XXX nanotime() */ 2173 microtime(&tv); 2174 TIMEVAL_TO_TIMESPEC(&tv, 2175 &sc->ppsinfo.assert_timestamp); 2176 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2177 timespecadd(&sc->ppsinfo.assert_timestamp, 2178 &sc->ppsparam.assert_offset, 2179 &sc->ppsinfo.assert_timestamp); 2180 } 2181 2182 #ifdef PPS_SYNC 2183 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2184 hardpps(&tv, tv.tv_usec); 2185 #endif 2186 sc->ppsinfo.assert_sequence++; 2187 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2188 2189 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2190 /* XXX nanotime() */ 2191 microtime(&tv); 2192 TIMEVAL_TO_TIMESPEC(&tv, 2193 &sc->ppsinfo.clear_timestamp); 2194 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2195 timespecadd(&sc->ppsinfo.clear_timestamp, 2196 &sc->ppsparam.clear_offset, 2197 &sc->ppsinfo.clear_timestamp); 2198 } 2199 2200 #ifdef PPS_SYNC 2201 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2202 hardpps(&tv, tv.tv_usec); 2203 #endif 2204 sc->ppsinfo.clear_sequence++; 2205 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2206 } 2207 } 2208 2209 /* 2210 * Process normal status changes 2211 */ 2212 if (ISSET(delta, sc->sc_msr_mask)) { 2213 SET(sc->sc_msr_delta, delta); 2214 2215 /* 2216 * Stop output immediately if we lose the output 2217 * flow control signal or carrier detect. 2218 */ 2219 if (ISSET(~msr, sc->sc_msr_mask)) { 2220 sc->sc_tbc = 0; 2221 sc->sc_heldtbc = 0; 2222 #ifdef COM_DEBUG 2223 if (com_debug) 2224 comstatus(sc, "comintr "); 2225 #endif 2226 } 2227 2228 sc->sc_st_check = 1; 2229 } 2230 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2231 2232 /* 2233 * Done handling any receive interrupts. See if data can be 2234 * transmitted as well. Schedule tx done event if no data left 2235 * and tty was marked busy. 2236 */ 2237 if (ISSET(lsr, LSR_TXRDY)) { 2238 /* 2239 * If we've delayed a parameter change, do it now, and restart 2240 * output. 2241 */ 2242 if (sc->sc_heldchange) { 2243 com_loadchannelregs(sc); 2244 sc->sc_heldchange = 0; 2245 sc->sc_tbc = sc->sc_heldtbc; 2246 sc->sc_heldtbc = 0; 2247 } 2248 2249 /* Output the next chunk of the contiguous buffer, if any. */ 2250 if (sc->sc_tbc > 0) { 2251 int n; 2252 2253 n = sc->sc_tbc; 2254 if (n > sc->sc_fifolen) 2255 n = sc->sc_fifolen; 2256 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2257 sc->sc_tbc -= n; 2258 sc->sc_tba += n; 2259 } else { 2260 /* Disable transmit completion interrupts if necessary. */ 2261 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2262 CLR(sc->sc_ier, IER_ETXRDY); 2263 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2264 } 2265 if (sc->sc_tx_busy) { 2266 sc->sc_tx_busy = 0; 2267 sc->sc_tx_done = 1; 2268 } 2269 } 2270 } 2271 COM_UNLOCK(sc); 2272 2273 /* Wake up the poller. */ 2274 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2275 softintr_schedule(sc->sc_si); 2276 #else 2277 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2278 setsoftserial(); 2279 #else 2280 if (!com_softintr_scheduled) { 2281 com_softintr_scheduled = 1; 2282 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2283 } 2284 #endif 2285 #endif 2286 2287 #if NRND > 0 && defined(RND_COM) 2288 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2289 #endif 2290 2291 return (1); 2292 } 2293 2294 /* 2295 * The following functions are polled getc and putc routines, shared 2296 * by the console and kgdb glue. 2297 * 2298 * The read-ahead code is so that you can detect pending in-band 2299 * cn_magic in polled mode while doing output rather than having to 2300 * wait until the kernel decides it needs input. 2301 */ 2302 2303 #define MAX_READAHEAD 20 2304 static int com_readahead[MAX_READAHEAD]; 2305 static int com_readaheadcount = 0; 2306 2307 int 2308 com_common_getc(dev, iot, ioh) 2309 dev_t dev; 2310 bus_space_tag_t iot; 2311 bus_space_handle_t ioh; 2312 { 2313 int s = splserial(); 2314 u_char stat, c; 2315 2316 /* got a character from reading things earlier */ 2317 if (com_readaheadcount > 0) { 2318 int i; 2319 2320 c = com_readahead[0]; 2321 for (i = 1; i < com_readaheadcount; i++) { 2322 com_readahead[i-1] = com_readahead[i]; 2323 } 2324 com_readaheadcount--; 2325 splx(s); 2326 return (c); 2327 } 2328 2329 /* block until a character becomes available */ 2330 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2331 ; 2332 2333 c = bus_space_read_1(iot, ioh, com_data); 2334 stat = bus_space_read_1(iot, ioh, com_iir); 2335 { 2336 int cn_trapped = 0; /* unused */ 2337 #ifdef DDB 2338 extern int db_active; 2339 if (!db_active) 2340 #endif 2341 cn_check_magic(dev, c, com_cnm_state); 2342 } 2343 splx(s); 2344 return (c); 2345 } 2346 2347 void 2348 com_common_putc(dev, iot, ioh, c) 2349 dev_t dev; 2350 bus_space_tag_t iot; 2351 bus_space_handle_t ioh; 2352 int c; 2353 { 2354 int s = splserial(); 2355 int timo; 2356 2357 int cin, stat; 2358 if (com_readaheadcount < MAX_READAHEAD 2359 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2360 int cn_trapped = 0; 2361 cin = bus_space_read_1(iot, ioh, com_data); 2362 stat = bus_space_read_1(iot, ioh, com_iir); 2363 cn_check_magic(dev, cin, com_cnm_state); 2364 com_readahead[com_readaheadcount++] = cin; 2365 } 2366 2367 /* wait for any pending transmission to finish */ 2368 timo = 150000; 2369 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2370 continue; 2371 2372 bus_space_write_1(iot, ioh, com_data, c); 2373 COM_BARRIER(iot, ioh, BR | BW); 2374 2375 /* wait for this transmission to complete */ 2376 timo = 1500000; 2377 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2378 continue; 2379 2380 splx(s); 2381 } 2382 2383 /* 2384 * Initialize UART for use as console or KGDB line. 2385 */ 2386 int 2387 cominit(iot, iobase, rate, frequency, cflag, iohp) 2388 bus_space_tag_t iot; 2389 bus_addr_t iobase; 2390 int rate, frequency; 2391 tcflag_t cflag; 2392 bus_space_handle_t *iohp; 2393 { 2394 bus_space_handle_t ioh; 2395 2396 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2397 return (ENOMEM); /* ??? */ 2398 2399 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2400 bus_space_write_1(iot, ioh, com_efr, 0); 2401 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2402 rate = comspeed(rate, frequency); 2403 bus_space_write_1(iot, ioh, com_dlbl, rate); 2404 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2405 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2406 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2407 bus_space_write_1(iot, ioh, com_fifo, 2408 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2409 bus_space_write_1(iot, ioh, com_ier, 0); 2410 2411 *iohp = ioh; 2412 return (0); 2413 } 2414 2415 /* 2416 * Following are all routines needed for COM to act as console 2417 */ 2418 struct consdev comcons = { 2419 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2420 NODEV, CN_NORMAL 2421 }; 2422 2423 2424 int 2425 comcnattach(iot, iobase, rate, frequency, cflag) 2426 bus_space_tag_t iot; 2427 bus_addr_t iobase; 2428 int rate, frequency; 2429 tcflag_t cflag; 2430 { 2431 int res; 2432 2433 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2434 if (res) 2435 return (res); 2436 2437 cn_tab = &comcons; 2438 cn_init_magic(&com_cnm_state); 2439 cn_set_magic("\047\001"); /* default magic is BREAK */ 2440 2441 comconstag = iot; 2442 comconsaddr = iobase; 2443 comconsrate = rate; 2444 comconscflag = cflag; 2445 2446 return (0); 2447 } 2448 2449 int 2450 comcngetc(dev) 2451 dev_t dev; 2452 { 2453 return (com_common_getc(dev, comconstag, comconsioh)); 2454 } 2455 2456 /* 2457 * Console kernel output character routine. 2458 */ 2459 void 2460 comcnputc(dev, c) 2461 dev_t dev; 2462 int c; 2463 { 2464 com_common_putc(dev, comconstag, comconsioh, c); 2465 } 2466 2467 void 2468 comcnpollc(dev, on) 2469 dev_t dev; 2470 int on; 2471 { 2472 2473 } 2474 2475 #ifdef KGDB 2476 int 2477 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2478 bus_space_tag_t iot; 2479 bus_addr_t iobase; 2480 int rate, frequency; 2481 tcflag_t cflag; 2482 { 2483 int res; 2484 2485 if (iot == comconstag && iobase == comconsaddr) 2486 return (EBUSY); /* cannot share with console */ 2487 2488 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2489 if (res) 2490 return (res); 2491 2492 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2493 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2494 2495 com_kgdb_iot = iot; 2496 com_kgdb_addr = iobase; 2497 2498 return (0); 2499 } 2500 2501 /* ARGSUSED */ 2502 int 2503 com_kgdb_getc(arg) 2504 void *arg; 2505 { 2506 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2507 } 2508 2509 /* ARGSUSED */ 2510 void 2511 com_kgdb_putc(arg, c) 2512 void *arg; 2513 int c; 2514 { 2515 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2516 } 2517 #endif /* KGDB */ 2518 2519 /* helper function to identify the com ports used by 2520 console or KGDB (and not yet autoconf attached) */ 2521 int 2522 com_is_console(iot, iobase, ioh) 2523 bus_space_tag_t iot; 2524 bus_addr_t iobase; 2525 bus_space_handle_t *ioh; 2526 { 2527 bus_space_handle_t help; 2528 2529 if (!comconsattached && 2530 iot == comconstag && iobase == comconsaddr) 2531 help = comconsioh; 2532 #ifdef KGDB 2533 else if (!com_kgdb_attached && 2534 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2535 help = com_kgdb_ioh; 2536 #endif 2537 else 2538 return (0); 2539 2540 if (ioh) 2541 *ioh = help; 2542 return (1); 2543 } 2544
Indexes created Mon Oct 20 01:09:56 GMT 2025