com.c revision 1.190
1 /* $NetBSD: com.c,v 1.190 2001/11/05 21:39:24 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_com.h" 80 #include "opt_ddb.h" 81 #include "opt_ddbparam.h" 82 #include "opt_kgdb.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/types.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 119 #include <machine/intr.h> 120 #include <machine/bus.h> 121 122 #include <dev/ic/comreg.h> 123 #include <dev/ic/comvar.h> 124 #include <dev/ic/ns16550reg.h> 125 #include <dev/ic/st16650reg.h> 126 #ifdef COM_HAYESP 127 #include <dev/ic/hayespreg.h> 128 #endif 129 #define com_lcr com_cfcr 130 #include <dev/cons.h> 131 132 #ifdef COM_HAYESP 133 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 134 #endif 135 136 static void com_enable_debugport __P((struct com_softc *)); 137 138 void com_config __P((struct com_softc *)); 139 void com_shutdown __P((struct com_softc *)); 140 int comspeed __P((long, long)); 141 static u_char cflag2lcr __P((tcflag_t)); 142 int comparam __P((struct tty *, struct termios *)); 143 void comstart __P((struct tty *)); 144 int comhwiflow __P((struct tty *, int)); 145 146 void com_loadchannelregs __P((struct com_softc *)); 147 void com_hwiflow __P((struct com_softc *)); 148 void com_break __P((struct com_softc *, int)); 149 void com_modem __P((struct com_softc *, int)); 150 void tiocm_to_com __P((struct com_softc *, u_long, int)); 151 int com_to_tiocm __P((struct com_softc *)); 152 void com_iflush __P((struct com_softc *)); 153 154 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 155 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 156 157 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 158 bus_space_handle_t *)); 159 160 /* XXX: This belongs elsewhere */ 161 cdev_decl(com); 162 163 int comcngetc __P((dev_t)); 164 void comcnputc __P((dev_t, int)); 165 void comcnpollc __P((dev_t, int)); 166 167 #define integrate static inline 168 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 169 void comsoft __P((void *)); 170 #else 171 #ifndef __NO_SOFT_SERIAL_INTERRUPT 172 void comsoft __P((void)); 173 #else 174 void comsoft __P((void *)); 175 struct callout comsoft_callout = CALLOUT_INITIALIZER; 176 #endif 177 #endif 178 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 179 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_schedrx __P((struct com_softc *)); 182 void comdiag __P((void *)); 183 184 extern struct cfdriver com_cd; 185 186 /* 187 * Make this an option variable one can patch. 188 * But be warned: this must be a power of 2! 189 */ 190 u_int com_rbuf_size = COM_RING_SIZE; 191 192 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 193 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 194 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 195 196 static bus_addr_t comconsaddr; 197 static bus_space_tag_t comconstag; 198 static bus_space_handle_t comconsioh; 199 static int comconsattached; 200 static int comconsrate; 201 static tcflag_t comconscflag; 202 static struct cnm_state com_cnm_state; 203 204 static int ppscap = 205 PPS_TSFMT_TSPEC | 206 PPS_CAPTUREASSERT | 207 PPS_CAPTURECLEAR | 208 #ifdef PPS_SYNC 209 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 210 #endif /* PPS_SYNC */ 211 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 212 213 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 214 #ifdef __NO_SOFT_SERIAL_INTERRUPT 215 volatile int com_softintr_scheduled; 216 #endif 217 #endif 218 219 #ifdef KGDB 220 #include <sys/kgdb.h> 221 222 static bus_addr_t com_kgdb_addr; 223 static bus_space_tag_t com_kgdb_iot; 224 static bus_space_handle_t com_kgdb_ioh; 225 static int com_kgdb_attached; 226 227 int com_kgdb_getc __P((void *)); 228 void com_kgdb_putc __P((void *, int)); 229 #endif /* KGDB */ 230 231 #define COMUNIT_MASK 0x7ffff 232 #define COMDIALOUT_MASK 0x80000 233 234 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 235 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 236 237 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 238 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 239 240 #define BR BUS_SPACE_BARRIER_READ 241 #define BW BUS_SPACE_BARRIER_WRITE 242 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 243 244 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 245 246 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 247 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 248 249 #else 250 251 #define COM_LOCK(sc) 252 #define COM_UNLOCK(sc) 253 254 #endif 255 256 int 257 comspeed(speed, frequency) 258 long speed, frequency; 259 { 260 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 261 262 int x, err; 263 264 #if 0 265 if (speed == 0) 266 return (0); 267 #endif 268 if (speed <= 0) 269 return (-1); 270 x = divrnd(frequency / 16, speed); 271 if (x <= 0) 272 return (-1); 273 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 274 if (err < 0) 275 err = -err; 276 if (err > COM_TOLERANCE) 277 return (-1); 278 return (x); 279 280 #undef divrnd 281 } 282 283 #ifdef COM_DEBUG 284 int com_debug = 0; 285 286 void comstatus __P((struct com_softc *, char *)); 287 void 288 comstatus(sc, str) 289 struct com_softc *sc; 290 char *str; 291 { 292 struct tty *tp = sc->sc_tty; 293 294 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 295 sc->sc_dev.dv_xname, str, 296 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 297 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 298 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 299 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 300 sc->sc_tx_stopped ? "+" : "-"); 301 302 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 303 sc->sc_dev.dv_xname, str, 304 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 305 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 306 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 307 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 308 sc->sc_rx_flags); 309 } 310 #endif 311 312 int 313 comprobe1(iot, ioh) 314 bus_space_tag_t iot; 315 bus_space_handle_t ioh; 316 { 317 318 /* force access to id reg */ 319 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 320 bus_space_write_1(iot, ioh, com_iir, 0); 321 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 322 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 323 return (0); 324 325 return (1); 326 } 327 328 #ifdef COM_HAYESP 329 int 330 comprobeHAYESP(hayespioh, sc) 331 bus_space_handle_t hayespioh; 332 struct com_softc *sc; 333 { 334 char val, dips; 335 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 336 bus_space_tag_t iot = sc->sc_iot; 337 338 /* 339 * Hayes ESP cards have two iobases. One is for compatibility with 340 * 16550 serial chips, and at the same ISA PC base addresses. The 341 * other is for ESP-specific enhanced features, and lies at a 342 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 343 */ 344 345 /* Test for ESP signature */ 346 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 347 return (0); 348 349 /* 350 * ESP is present at ESP enhanced base address; unknown com port 351 */ 352 353 /* Get the dip-switch configurations */ 354 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 355 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 356 357 /* Determine which com port this ESP card services: bits 0,1 of */ 358 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 359 if (sc->sc_iobase != combaselist[dips & 0x03]) 360 return (0); 361 362 printf(": ESP"); 363 364 /* Check ESP Self Test bits. */ 365 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 366 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 367 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 369 if ((val & 0x70) < 0x20) { 370 printf("-old (%o)", val & 0x70); 371 /* we do not support the necessary features */ 372 return (0); 373 } 374 375 /* Check for ability to emulate 16550: bit 8 == 1 */ 376 if ((dips & 0x80) == 0) { 377 printf(" slave"); 378 /* XXX Does slave really mean no 16550 support?? */ 379 return (0); 380 } 381 382 /* 383 * If we made it this far, we are a full-featured ESP v2.0 (or 384 * better), at the correct com port address. 385 */ 386 387 SET(sc->sc_hwflags, COM_HW_HAYESP); 388 printf(", 1024 byte fifo\n"); 389 return (1); 390 } 391 #endif 392 393 static void 394 com_enable_debugport(sc) 395 struct com_softc *sc; 396 { 397 int s; 398 399 /* Turn on line break interrupt, set carrier. */ 400 s = splserial(); 401 COM_LOCK(sc); 402 sc->sc_ier = IER_ERXRDY; 403 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 404 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 406 COM_UNLOCK(sc); 407 splx(s); 408 } 409 410 void 411 com_attach_subr(sc) 412 struct com_softc *sc; 413 { 414 bus_addr_t iobase = sc->sc_iobase; 415 bus_space_tag_t iot = sc->sc_iot; 416 bus_space_handle_t ioh = sc->sc_ioh; 417 struct tty *tp; 418 #ifdef COM16650 419 u_int8_t lcr; 420 #endif 421 #ifdef COM_HAYESP 422 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 423 int *hayespp; 424 #endif 425 426 callout_init(&sc->sc_diag_callout); 427 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 428 simple_lock_init(&sc->sc_lock); 429 #endif 430 431 /* Disable interrupts before configuring the device. */ 432 sc->sc_ier = 0; 433 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 434 435 if (iot == comconstag && iobase == comconsaddr) { 436 comconsattached = 1; 437 438 /* Make sure the console is always "hardwired". */ 439 delay(1000); /* wait for output to finish */ 440 SET(sc->sc_hwflags, COM_HW_CONSOLE); 441 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 442 } 443 444 #ifdef COM_HAYESP 445 sc->sc_prescaler = 0; /* set prescaler to x1. */ 446 447 /* Look for a Hayes ESP board. */ 448 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 449 bus_space_handle_t hayespioh; 450 451 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 452 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 453 continue; 454 if (comprobeHAYESP(hayespioh, sc)) { 455 sc->sc_hayespioh = hayespioh; 456 sc->sc_fifolen = 1024; 457 458 break; 459 } 460 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 461 } 462 /* No ESP; look for other things. */ 463 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 464 #endif 465 sc->sc_fifolen = 1; 466 /* look for a NS 16550AF UART with FIFOs */ 467 bus_space_write_1(iot, ioh, com_fifo, 468 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 469 delay(100); 470 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 471 == IIR_FIFO_MASK) 472 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 473 == FIFO_TRIGGER_14) { 474 SET(sc->sc_hwflags, COM_HW_FIFO); 475 476 #ifdef COM16650 477 /* 478 * IIR changes into the EFR if LCR is set to LCR_EERS 479 * on 16650s. We also know IIR != 0 at this point. 480 * Write 0 into the EFR, and read it. If the result 481 * is 0, we have a 16650. 482 * 483 * Older 16650s were broken; the test to detect them 484 * is taken from the Linux driver. Apparently 485 * setting DLAB enable gives access to the EFR on 486 * these chips. 487 */ 488 lcr = bus_space_read_1(iot, ioh, com_lcr); 489 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 490 bus_space_write_1(iot, ioh, com_efr, 0); 491 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 492 bus_space_write_1(iot, ioh, com_lcr, 493 lcr | LCR_DLAB); 494 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 495 CLR(sc->sc_hwflags, COM_HW_FIFO); 496 sc->sc_fifolen = 0; 497 } else { 498 SET(sc->sc_hwflags, COM_HW_FLOW); 499 sc->sc_fifolen = 32; 500 } 501 } else 502 #endif 503 sc->sc_fifolen = 16; 504 505 #ifdef COM16650 506 bus_space_write_1(iot, ioh, com_lcr, lcr); 507 if (sc->sc_fifolen == 0) 508 printf(": st16650, broken fifo\n"); 509 else if (sc->sc_fifolen == 32) 510 printf(": st16650a, working fifo\n"); 511 else 512 #endif 513 printf(": ns16550a, working fifo\n"); 514 } else 515 printf(": ns16550, broken fifo\n"); 516 else 517 printf(": ns8250 or ns16450, no fifo\n"); 518 bus_space_write_1(iot, ioh, com_fifo, 0); 519 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 520 sc->sc_fifolen = 1; 521 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 522 } 523 #ifdef COM_HAYESP 524 } 525 #endif 526 527 tp = ttymalloc(); 528 tp->t_oproc = comstart; 529 tp->t_param = comparam; 530 tp->t_hwiflow = comhwiflow; 531 532 sc->sc_tty = tp; 533 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 534 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 535 sc->sc_rbavail = com_rbuf_size; 536 if (sc->sc_rbuf == NULL) { 537 printf("%s: unable to allocate ring buffer\n", 538 sc->sc_dev.dv_xname); 539 return; 540 } 541 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 542 543 tty_attach(tp); 544 545 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 546 SET(sc->sc_mcr, MCR_IENABLE); 547 548 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 549 int maj; 550 551 /* locate the major number */ 552 for (maj = 0; maj < nchrdev; maj++) 553 if (cdevsw[maj].d_open == comopen) 554 break; 555 556 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 557 558 printf("%s: console\n", sc->sc_dev.dv_xname); 559 } 560 561 #ifdef KGDB 562 /* 563 * Allow kgdb to "take over" this port. If this is 564 * the kgdb device, it has exclusive use. 565 */ 566 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 567 com_kgdb_attached = 1; 568 569 SET(sc->sc_hwflags, COM_HW_KGDB); 570 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 571 } 572 #endif 573 574 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 575 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 576 #endif 577 578 #if NRND > 0 && defined(RND_COM) 579 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 580 RND_TYPE_TTY, 0); 581 #endif 582 583 /* if there are no enable/disable functions, assume the device 584 is always enabled */ 585 if (!sc->enable) 586 sc->enabled = 1; 587 588 com_config(sc); 589 590 SET(sc->sc_hwflags, COM_HW_DEV_OK); 591 } 592 593 void 594 com_config(sc) 595 struct com_softc *sc; 596 { 597 bus_space_tag_t iot = sc->sc_iot; 598 bus_space_handle_t ioh = sc->sc_ioh; 599 600 /* Disable interrupts before configuring the device. */ 601 sc->sc_ier = 0; 602 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 603 604 #ifdef COM_HAYESP 605 /* Look for a Hayes ESP board. */ 606 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 607 sc->sc_fifolen = 1024; 608 609 /* Set 16550 compatibility mode */ 610 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 611 HAYESP_SETMODE); 612 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 613 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 614 HAYESP_MODE_SCALE); 615 616 /* Set RTS/CTS flow control */ 617 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 618 HAYESP_SETFLOWTYPE); 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 620 HAYESP_FLOW_RTS); 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 622 HAYESP_FLOW_CTS); 623 624 /* Set flow control levels */ 625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 626 HAYESP_SETRXFLOW); 627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 628 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 630 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 632 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 634 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 635 } 636 #endif 637 638 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 639 com_enable_debugport(sc); 640 } 641 642 int 643 com_detach(self, flags) 644 struct device *self; 645 int flags; 646 { 647 struct com_softc *sc = (struct com_softc *)self; 648 int maj, mn; 649 650 /* locate the major number */ 651 for (maj = 0; maj < nchrdev; maj++) 652 if (cdevsw[maj].d_open == comopen) 653 break; 654 655 /* Nuke the vnodes for any open instances. */ 656 mn = self->dv_unit; 657 vdevgone(maj, mn, mn, VCHR); 658 659 mn |= COMDIALOUT_MASK; 660 vdevgone(maj, mn, mn, VCHR); 661 662 /* Free the receive buffer. */ 663 free(sc->sc_rbuf, M_DEVBUF); 664 665 /* Detach and free the tty. */ 666 tty_detach(sc->sc_tty); 667 ttyfree(sc->sc_tty); 668 669 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 670 /* Unhook the soft interrupt handler. */ 671 softintr_disestablish(sc->sc_si); 672 #endif 673 674 #if NRND > 0 && defined(RND_COM) 675 /* Unhook the entropy source. */ 676 rnd_detach_source(&sc->rnd_source); 677 #endif 678 679 return (0); 680 } 681 682 int 683 com_activate(self, act) 684 struct device *self; 685 enum devact act; 686 { 687 struct com_softc *sc = (struct com_softc *)self; 688 int s, rv = 0; 689 690 s = splserial(); 691 COM_LOCK(sc); 692 switch (act) { 693 case DVACT_ACTIVATE: 694 rv = EOPNOTSUPP; 695 break; 696 697 case DVACT_DEACTIVATE: 698 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 699 rv = EBUSY; 700 break; 701 } 702 703 if (sc->disable != NULL && sc->enabled != 0) { 704 (*sc->disable)(sc); 705 sc->enabled = 0; 706 } 707 break; 708 } 709 710 COM_UNLOCK(sc); 711 splx(s); 712 return (rv); 713 } 714 715 void 716 com_shutdown(sc) 717 struct com_softc *sc; 718 { 719 struct tty *tp = sc->sc_tty; 720 int s; 721 722 s = splserial(); 723 COM_LOCK(sc); 724 725 /* If we were asserting flow control, then deassert it. */ 726 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 727 com_hwiflow(sc); 728 729 /* Clear any break condition set with TIOCSBRK. */ 730 com_break(sc, 0); 731 732 /* Turn off PPS capture on last close. */ 733 sc->sc_ppsmask = 0; 734 sc->ppsparam.mode = 0; 735 736 /* 737 * Hang up if necessary. Wait a bit, so the other side has time to 738 * notice even if we immediately open the port again. 739 * Avoid tsleeping above splhigh(). 740 */ 741 if (ISSET(tp->t_cflag, HUPCL)) { 742 com_modem(sc, 0); 743 COM_UNLOCK(sc); 744 splx(s); 745 /* XXX tsleep will only timeout */ 746 (void) tsleep(sc, TTIPRI, ttclos, hz); 747 s = splserial(); 748 COM_LOCK(sc); 749 } 750 751 /* Turn off interrupts. */ 752 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 753 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 754 else 755 sc->sc_ier = 0; 756 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 757 758 if (sc->disable) { 759 #ifdef DIAGNOSTIC 760 if (!sc->enabled) 761 panic("com_shutdown: not enabled?"); 762 #endif 763 (*sc->disable)(sc); 764 sc->enabled = 0; 765 } 766 COM_UNLOCK(sc); 767 splx(s); 768 } 769 770 int 771 comopen(dev, flag, mode, p) 772 dev_t dev; 773 int flag, mode; 774 struct proc *p; 775 { 776 struct com_softc *sc; 777 struct tty *tp; 778 int s, s2; 779 int error; 780 781 sc = device_lookup(&com_cd, COMUNIT(dev)); 782 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 783 sc->sc_rbuf == NULL) 784 return (ENXIO); 785 786 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 787 return (ENXIO); 788 789 #ifdef KGDB 790 /* 791 * If this is the kgdb port, no other use is permitted. 792 */ 793 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 794 return (EBUSY); 795 #endif 796 797 tp = sc->sc_tty; 798 799 if (ISSET(tp->t_state, TS_ISOPEN) && 800 ISSET(tp->t_state, TS_XCLUDE) && 801 p->p_ucred->cr_uid != 0) 802 return (EBUSY); 803 804 s = spltty(); 805 806 /* 807 * Do the following iff this is a first open. 808 */ 809 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 810 struct termios t; 811 812 tp->t_dev = dev; 813 814 s2 = splserial(); 815 COM_LOCK(sc); 816 817 if (sc->enable) { 818 if ((*sc->enable)(sc)) { 819 COM_UNLOCK(sc); 820 splx(s2); 821 splx(s); 822 printf("%s: device enable failed\n", 823 sc->sc_dev.dv_xname); 824 return (EIO); 825 } 826 sc->enabled = 1; 827 com_config(sc); 828 } 829 830 /* Turn on interrupts. */ 831 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 832 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 833 834 /* Fetch the current modem control status, needed later. */ 835 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 836 837 /* Clear PPS capture state on first open. */ 838 sc->sc_ppsmask = 0; 839 sc->ppsparam.mode = 0; 840 841 COM_UNLOCK(sc); 842 splx(s2); 843 844 /* 845 * Initialize the termios status to the defaults. Add in the 846 * sticky bits from TIOCSFLAGS. 847 */ 848 t.c_ispeed = 0; 849 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 850 t.c_ospeed = comconsrate; 851 t.c_cflag = comconscflag; 852 } else { 853 t.c_ospeed = TTYDEF_SPEED; 854 t.c_cflag = TTYDEF_CFLAG; 855 } 856 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 857 SET(t.c_cflag, CLOCAL); 858 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 859 SET(t.c_cflag, CRTSCTS); 860 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 861 SET(t.c_cflag, MDMBUF); 862 /* Make sure comparam() will do something. */ 863 tp->t_ospeed = 0; 864 (void) comparam(tp, &t); 865 tp->t_iflag = TTYDEF_IFLAG; 866 tp->t_oflag = TTYDEF_OFLAG; 867 tp->t_lflag = TTYDEF_LFLAG; 868 ttychars(tp); 869 ttsetwater(tp); 870 871 s2 = splserial(); 872 COM_LOCK(sc); 873 874 /* 875 * Turn on DTR. We must always do this, even if carrier is not 876 * present, because otherwise we'd have to use TIOCSDTR 877 * immediately after setting CLOCAL, which applications do not 878 * expect. We always assert DTR while the device is open 879 * unless explicitly requested to deassert it. 880 */ 881 com_modem(sc, 1); 882 883 /* Clear the input ring, and unblock. */ 884 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 885 sc->sc_rbavail = com_rbuf_size; 886 com_iflush(sc); 887 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 888 com_hwiflow(sc); 889 890 #ifdef COM_DEBUG 891 if (com_debug) 892 comstatus(sc, "comopen "); 893 #endif 894 895 COM_UNLOCK(sc); 896 splx(s2); 897 } 898 899 splx(s); 900 901 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 902 if (error) 903 goto bad; 904 905 error = (*tp->t_linesw->l_open)(dev, tp); 906 if (error) 907 goto bad; 908 909 return (0); 910 911 bad: 912 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 913 /* 914 * We failed to open the device, and nobody else had it opened. 915 * Clean up the state as appropriate. 916 */ 917 com_shutdown(sc); 918 } 919 920 return (error); 921 } 922 923 int 924 comclose(dev, flag, mode, p) 925 dev_t dev; 926 int flag, mode; 927 struct proc *p; 928 { 929 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 930 struct tty *tp = sc->sc_tty; 931 932 /* XXX This is for cons.c. */ 933 if (!ISSET(tp->t_state, TS_ISOPEN)) 934 return (0); 935 936 (*tp->t_linesw->l_close)(tp, flag); 937 ttyclose(tp); 938 939 if (COM_ISALIVE(sc) == 0) 940 return (0); 941 942 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 943 /* 944 * Although we got a last close, the device may still be in 945 * use; e.g. if this was the dialout node, and there are still 946 * processes waiting for carrier on the non-dialout node. 947 */ 948 com_shutdown(sc); 949 } 950 951 return (0); 952 } 953 954 int 955 comread(dev, uio, flag) 956 dev_t dev; 957 struct uio *uio; 958 int flag; 959 { 960 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 961 struct tty *tp = sc->sc_tty; 962 963 if (COM_ISALIVE(sc) == 0) 964 return (EIO); 965 966 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 967 } 968 969 int 970 comwrite(dev, uio, flag) 971 dev_t dev; 972 struct uio *uio; 973 int flag; 974 { 975 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 976 struct tty *tp = sc->sc_tty; 977 978 if (COM_ISALIVE(sc) == 0) 979 return (EIO); 980 981 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 982 } 983 984 int 985 compoll(dev, events, p) 986 dev_t dev; 987 int events; 988 struct proc *p; 989 { 990 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 991 struct tty *tp = sc->sc_tty; 992 993 if (COM_ISALIVE(sc) == 0) 994 return (EIO); 995 996 return ((*tp->t_linesw->l_poll)(tp, events, p)); 997 } 998 999 struct tty * 1000 comtty(dev) 1001 dev_t dev; 1002 { 1003 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1004 struct tty *tp = sc->sc_tty; 1005 1006 return (tp); 1007 } 1008 1009 int 1010 comioctl(dev, cmd, data, flag, p) 1011 dev_t dev; 1012 u_long cmd; 1013 caddr_t data; 1014 int flag; 1015 struct proc *p; 1016 { 1017 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1018 struct tty *tp = sc->sc_tty; 1019 int error; 1020 int s; 1021 1022 if (COM_ISALIVE(sc) == 0) 1023 return (EIO); 1024 1025 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1026 if (error >= 0) 1027 return (error); 1028 1029 error = ttioctl(tp, cmd, data, flag, p); 1030 if (error >= 0) 1031 return (error); 1032 1033 error = 0; 1034 1035 s = splserial(); 1036 COM_LOCK(sc); 1037 1038 switch (cmd) { 1039 case TIOCSBRK: 1040 com_break(sc, 1); 1041 break; 1042 1043 case TIOCCBRK: 1044 com_break(sc, 0); 1045 break; 1046 1047 case TIOCSDTR: 1048 com_modem(sc, 1); 1049 break; 1050 1051 case TIOCCDTR: 1052 com_modem(sc, 0); 1053 break; 1054 1055 case TIOCGFLAGS: 1056 *(int *)data = sc->sc_swflags; 1057 break; 1058 1059 case TIOCSFLAGS: 1060 error = suser(p->p_ucred, &p->p_acflag); 1061 if (error) 1062 break; 1063 sc->sc_swflags = *(int *)data; 1064 break; 1065 1066 case TIOCMSET: 1067 case TIOCMBIS: 1068 case TIOCMBIC: 1069 tiocm_to_com(sc, cmd, *(int *)data); 1070 break; 1071 1072 case TIOCMGET: 1073 *(int *)data = com_to_tiocm(sc); 1074 break; 1075 1076 case PPS_IOC_CREATE: 1077 break; 1078 1079 case PPS_IOC_DESTROY: 1080 break; 1081 1082 case PPS_IOC_GETPARAMS: { 1083 pps_params_t *pp; 1084 pp = (pps_params_t *)data; 1085 *pp = sc->ppsparam; 1086 break; 1087 } 1088 1089 case PPS_IOC_SETPARAMS: { 1090 pps_params_t *pp; 1091 int mode; 1092 pp = (pps_params_t *)data; 1093 if (pp->mode & ~ppscap) { 1094 error = EINVAL; 1095 break; 1096 } 1097 sc->ppsparam = *pp; 1098 /* 1099 * Compute msr masks from user-specified timestamp state. 1100 */ 1101 mode = sc->ppsparam.mode; 1102 #ifdef PPS_SYNC 1103 if (mode & PPS_HARDPPSONASSERT) { 1104 mode |= PPS_CAPTUREASSERT; 1105 /* XXX revoke any previous HARDPPS source */ 1106 } 1107 if (mode & PPS_HARDPPSONCLEAR) { 1108 mode |= PPS_CAPTURECLEAR; 1109 /* XXX revoke any previous HARDPPS source */ 1110 } 1111 #endif /* PPS_SYNC */ 1112 switch (mode & PPS_CAPTUREBOTH) { 1113 case 0: 1114 sc->sc_ppsmask = 0; 1115 break; 1116 1117 case PPS_CAPTUREASSERT: 1118 sc->sc_ppsmask = MSR_DCD; 1119 sc->sc_ppsassert = MSR_DCD; 1120 sc->sc_ppsclear = -1; 1121 break; 1122 1123 case PPS_CAPTURECLEAR: 1124 sc->sc_ppsmask = MSR_DCD; 1125 sc->sc_ppsassert = -1; 1126 sc->sc_ppsclear = 0; 1127 break; 1128 1129 case PPS_CAPTUREBOTH: 1130 sc->sc_ppsmask = MSR_DCD; 1131 sc->sc_ppsassert = MSR_DCD; 1132 sc->sc_ppsclear = 0; 1133 break; 1134 1135 default: 1136 error = EINVAL; 1137 break; 1138 } 1139 break; 1140 } 1141 1142 case PPS_IOC_GETCAP: 1143 *(int*)data = ppscap; 1144 break; 1145 1146 case PPS_IOC_FETCH: { 1147 pps_info_t *pi; 1148 pi = (pps_info_t *)data; 1149 *pi = sc->ppsinfo; 1150 break; 1151 } 1152 1153 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1154 /* 1155 * Some GPS clocks models use the falling rather than 1156 * rising edge as the on-the-second signal. 1157 * The old API has no way to specify PPS polarity. 1158 */ 1159 sc->sc_ppsmask = MSR_DCD; 1160 #ifndef PPS_TRAILING_EDGE 1161 sc->sc_ppsassert = MSR_DCD; 1162 sc->sc_ppsclear = -1; 1163 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1164 &sc->ppsinfo.assert_timestamp); 1165 #else 1166 sc->sc_ppsassert = -1 1167 sc->sc_ppsclear = 0; 1168 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1169 &sc->ppsinfo.clear_timestamp); 1170 #endif 1171 break; 1172 1173 default: 1174 error = ENOTTY; 1175 break; 1176 } 1177 1178 COM_UNLOCK(sc); 1179 splx(s); 1180 1181 #ifdef COM_DEBUG 1182 if (com_debug) 1183 comstatus(sc, "comioctl "); 1184 #endif 1185 1186 return (error); 1187 } 1188 1189 integrate void 1190 com_schedrx(sc) 1191 struct com_softc *sc; 1192 { 1193 1194 sc->sc_rx_ready = 1; 1195 1196 /* Wake up the poller. */ 1197 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1198 softintr_schedule(sc->sc_si); 1199 #else 1200 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1201 setsoftserial(); 1202 #else 1203 if (!com_softintr_scheduled) { 1204 com_softintr_scheduled = 1; 1205 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1206 } 1207 #endif 1208 #endif 1209 } 1210 1211 void 1212 com_break(sc, onoff) 1213 struct com_softc *sc; 1214 int onoff; 1215 { 1216 1217 if (onoff) 1218 SET(sc->sc_lcr, LCR_SBREAK); 1219 else 1220 CLR(sc->sc_lcr, LCR_SBREAK); 1221 1222 if (!sc->sc_heldchange) { 1223 if (sc->sc_tx_busy) { 1224 sc->sc_heldtbc = sc->sc_tbc; 1225 sc->sc_tbc = 0; 1226 sc->sc_heldchange = 1; 1227 } else 1228 com_loadchannelregs(sc); 1229 } 1230 } 1231 1232 void 1233 com_modem(sc, onoff) 1234 struct com_softc *sc; 1235 int onoff; 1236 { 1237 1238 if (sc->sc_mcr_dtr == 0) 1239 return; 1240 1241 if (onoff) 1242 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1243 else 1244 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1245 1246 if (!sc->sc_heldchange) { 1247 if (sc->sc_tx_busy) { 1248 sc->sc_heldtbc = sc->sc_tbc; 1249 sc->sc_tbc = 0; 1250 sc->sc_heldchange = 1; 1251 } else 1252 com_loadchannelregs(sc); 1253 } 1254 } 1255 1256 void 1257 tiocm_to_com(sc, how, ttybits) 1258 struct com_softc *sc; 1259 u_long how; 1260 int ttybits; 1261 { 1262 u_char combits; 1263 1264 combits = 0; 1265 if (ISSET(ttybits, TIOCM_DTR)) 1266 SET(combits, MCR_DTR); 1267 if (ISSET(ttybits, TIOCM_RTS)) 1268 SET(combits, MCR_RTS); 1269 1270 switch (how) { 1271 case TIOCMBIC: 1272 CLR(sc->sc_mcr, combits); 1273 break; 1274 1275 case TIOCMBIS: 1276 SET(sc->sc_mcr, combits); 1277 break; 1278 1279 case TIOCMSET: 1280 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1281 SET(sc->sc_mcr, combits); 1282 break; 1283 } 1284 1285 if (!sc->sc_heldchange) { 1286 if (sc->sc_tx_busy) { 1287 sc->sc_heldtbc = sc->sc_tbc; 1288 sc->sc_tbc = 0; 1289 sc->sc_heldchange = 1; 1290 } else 1291 com_loadchannelregs(sc); 1292 } 1293 } 1294 1295 int 1296 com_to_tiocm(sc) 1297 struct com_softc *sc; 1298 { 1299 u_char combits; 1300 int ttybits = 0; 1301 1302 combits = sc->sc_mcr; 1303 if (ISSET(combits, MCR_DTR)) 1304 SET(ttybits, TIOCM_DTR); 1305 if (ISSET(combits, MCR_RTS)) 1306 SET(ttybits, TIOCM_RTS); 1307 1308 combits = sc->sc_msr; 1309 if (ISSET(combits, MSR_DCD)) 1310 SET(ttybits, TIOCM_CD); 1311 if (ISSET(combits, MSR_CTS)) 1312 SET(ttybits, TIOCM_CTS); 1313 if (ISSET(combits, MSR_DSR)) 1314 SET(ttybits, TIOCM_DSR); 1315 if (ISSET(combits, MSR_RI | MSR_TERI)) 1316 SET(ttybits, TIOCM_RI); 1317 1318 if (sc->sc_ier != 0) 1319 SET(ttybits, TIOCM_LE); 1320 1321 return (ttybits); 1322 } 1323 1324 static u_char 1325 cflag2lcr(cflag) 1326 tcflag_t cflag; 1327 { 1328 u_char lcr = 0; 1329 1330 switch (ISSET(cflag, CSIZE)) { 1331 case CS5: 1332 SET(lcr, LCR_5BITS); 1333 break; 1334 case CS6: 1335 SET(lcr, LCR_6BITS); 1336 break; 1337 case CS7: 1338 SET(lcr, LCR_7BITS); 1339 break; 1340 case CS8: 1341 SET(lcr, LCR_8BITS); 1342 break; 1343 } 1344 if (ISSET(cflag, PARENB)) { 1345 SET(lcr, LCR_PENAB); 1346 if (!ISSET(cflag, PARODD)) 1347 SET(lcr, LCR_PEVEN); 1348 } 1349 if (ISSET(cflag, CSTOPB)) 1350 SET(lcr, LCR_STOPB); 1351 1352 return (lcr); 1353 } 1354 1355 int 1356 comparam(tp, t) 1357 struct tty *tp; 1358 struct termios *t; 1359 { 1360 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1361 int ospeed; 1362 u_char lcr; 1363 int s; 1364 1365 if (COM_ISALIVE(sc) == 0) 1366 return (EIO); 1367 1368 #ifdef COM_HAYESP 1369 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1370 int prescaler, speed; 1371 1372 /* 1373 * Calculate UART clock prescaler. It should be in 1374 * range of 0 .. 3. 1375 */ 1376 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1377 prescaler++, speed /= 2) 1378 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1379 break; 1380 1381 if (prescaler == 4) 1382 return (EINVAL); 1383 sc->sc_prescaler = prescaler; 1384 } else 1385 #endif 1386 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1387 1388 /* Check requested parameters. */ 1389 if (ospeed < 0) 1390 return (EINVAL); 1391 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1392 return (EINVAL); 1393 1394 /* 1395 * For the console, always force CLOCAL and !HUPCL, so that the port 1396 * is always active. 1397 */ 1398 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1399 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1400 SET(t->c_cflag, CLOCAL); 1401 CLR(t->c_cflag, HUPCL); 1402 } 1403 1404 /* 1405 * If there were no changes, don't do anything. This avoids dropping 1406 * input and improves performance when all we did was frob things like 1407 * VMIN and VTIME. 1408 */ 1409 if (tp->t_ospeed == t->c_ospeed && 1410 tp->t_cflag == t->c_cflag) 1411 return (0); 1412 1413 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1414 1415 s = splserial(); 1416 COM_LOCK(sc); 1417 1418 sc->sc_lcr = lcr; 1419 1420 /* 1421 * If we're not in a mode that assumes a connection is present, then 1422 * ignore carrier changes. 1423 */ 1424 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1425 sc->sc_msr_dcd = 0; 1426 else 1427 sc->sc_msr_dcd = MSR_DCD; 1428 /* 1429 * Set the flow control pins depending on the current flow control 1430 * mode. 1431 */ 1432 if (ISSET(t->c_cflag, CRTSCTS)) { 1433 sc->sc_mcr_dtr = MCR_DTR; 1434 sc->sc_mcr_rts = MCR_RTS; 1435 sc->sc_msr_cts = MSR_CTS; 1436 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1437 } else if (ISSET(t->c_cflag, MDMBUF)) { 1438 /* 1439 * For DTR/DCD flow control, make sure we don't toggle DTR for 1440 * carrier detection. 1441 */ 1442 sc->sc_mcr_dtr = 0; 1443 sc->sc_mcr_rts = MCR_DTR; 1444 sc->sc_msr_cts = MSR_DCD; 1445 sc->sc_efr = 0; 1446 } else { 1447 /* 1448 * If no flow control, then always set RTS. This will make 1449 * the other side happy if it mistakenly thinks we're doing 1450 * RTS/CTS flow control. 1451 */ 1452 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1453 sc->sc_mcr_rts = 0; 1454 sc->sc_msr_cts = 0; 1455 sc->sc_efr = 0; 1456 if (ISSET(sc->sc_mcr, MCR_DTR)) 1457 SET(sc->sc_mcr, MCR_RTS); 1458 else 1459 CLR(sc->sc_mcr, MCR_RTS); 1460 } 1461 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1462 1463 #if 0 1464 if (ospeed == 0) 1465 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1466 else 1467 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1468 #endif 1469 1470 sc->sc_dlbl = ospeed; 1471 sc->sc_dlbh = ospeed >> 8; 1472 1473 /* 1474 * Set the FIFO threshold based on the receive speed. 1475 * 1476 * * If it's a low speed, it's probably a mouse or some other 1477 * interactive device, so set the threshold low. 1478 * * If it's a high speed, trim the trigger level down to prevent 1479 * overflows. 1480 * * Otherwise set it a bit higher. 1481 */ 1482 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1483 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1484 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1485 sc->sc_fifo = FIFO_ENABLE | 1486 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1487 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1488 else 1489 sc->sc_fifo = 0; 1490 1491 /* And copy to tty. */ 1492 tp->t_ispeed = 0; 1493 tp->t_ospeed = t->c_ospeed; 1494 tp->t_cflag = t->c_cflag; 1495 1496 if (!sc->sc_heldchange) { 1497 if (sc->sc_tx_busy) { 1498 sc->sc_heldtbc = sc->sc_tbc; 1499 sc->sc_tbc = 0; 1500 sc->sc_heldchange = 1; 1501 } else 1502 com_loadchannelregs(sc); 1503 } 1504 1505 if (!ISSET(t->c_cflag, CHWFLOW)) { 1506 /* Disable the high water mark. */ 1507 sc->sc_r_hiwat = 0; 1508 sc->sc_r_lowat = 0; 1509 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1510 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1511 com_schedrx(sc); 1512 } 1513 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1514 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1515 com_hwiflow(sc); 1516 } 1517 } else { 1518 sc->sc_r_hiwat = com_rbuf_hiwat; 1519 sc->sc_r_lowat = com_rbuf_lowat; 1520 } 1521 1522 COM_UNLOCK(sc); 1523 splx(s); 1524 1525 /* 1526 * Update the tty layer's idea of the carrier bit, in case we changed 1527 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1528 * explicit request. 1529 */ 1530 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1531 1532 #ifdef COM_DEBUG 1533 if (com_debug) 1534 comstatus(sc, "comparam "); 1535 #endif 1536 1537 if (!ISSET(t->c_cflag, CHWFLOW)) { 1538 if (sc->sc_tx_stopped) { 1539 sc->sc_tx_stopped = 0; 1540 comstart(tp); 1541 } 1542 } 1543 1544 return (0); 1545 } 1546 1547 void 1548 com_iflush(sc) 1549 struct com_softc *sc; 1550 { 1551 bus_space_tag_t iot = sc->sc_iot; 1552 bus_space_handle_t ioh = sc->sc_ioh; 1553 #ifdef DIAGNOSTIC 1554 int reg; 1555 #endif 1556 int timo; 1557 1558 #ifdef DIAGNOSTIC 1559 reg = 0xffff; 1560 #endif 1561 timo = 50000; 1562 /* flush any pending I/O */ 1563 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1564 && --timo) 1565 #ifdef DIAGNOSTIC 1566 reg = 1567 #else 1568 (void) 1569 #endif 1570 bus_space_read_1(iot, ioh, com_data); 1571 #ifdef DIAGNOSTIC 1572 if (!timo) 1573 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1574 reg); 1575 #endif 1576 } 1577 1578 void 1579 com_loadchannelregs(sc) 1580 struct com_softc *sc; 1581 { 1582 bus_space_tag_t iot = sc->sc_iot; 1583 bus_space_handle_t ioh = sc->sc_ioh; 1584 1585 /* XXXXX necessary? */ 1586 com_iflush(sc); 1587 1588 bus_space_write_1(iot, ioh, com_ier, 0); 1589 1590 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1591 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1592 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1593 } 1594 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1595 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1596 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1597 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1598 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1599 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1600 #ifdef COM_HAYESP 1601 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1602 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1603 HAYESP_SETPRESCALER); 1604 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1605 sc->sc_prescaler); 1606 } 1607 #endif 1608 1609 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1610 } 1611 1612 int 1613 comhwiflow(tp, block) 1614 struct tty *tp; 1615 int block; 1616 { 1617 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1618 int s; 1619 1620 if (COM_ISALIVE(sc) == 0) 1621 return (0); 1622 1623 if (sc->sc_mcr_rts == 0) 1624 return (0); 1625 1626 s = splserial(); 1627 COM_LOCK(sc); 1628 1629 if (block) { 1630 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1631 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1632 com_hwiflow(sc); 1633 } 1634 } else { 1635 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1636 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1637 com_schedrx(sc); 1638 } 1639 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1640 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1641 com_hwiflow(sc); 1642 } 1643 } 1644 1645 COM_UNLOCK(sc); 1646 splx(s); 1647 return (1); 1648 } 1649 1650 /* 1651 * (un)block input via hw flowcontrol 1652 */ 1653 void 1654 com_hwiflow(sc) 1655 struct com_softc *sc; 1656 { 1657 bus_space_tag_t iot = sc->sc_iot; 1658 bus_space_handle_t ioh = sc->sc_ioh; 1659 1660 if (sc->sc_mcr_rts == 0) 1661 return; 1662 1663 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1664 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1665 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1666 } else { 1667 SET(sc->sc_mcr, sc->sc_mcr_rts); 1668 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1669 } 1670 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1671 } 1672 1673 1674 void 1675 comstart(tp) 1676 struct tty *tp; 1677 { 1678 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1679 bus_space_tag_t iot = sc->sc_iot; 1680 bus_space_handle_t ioh = sc->sc_ioh; 1681 int s; 1682 1683 if (COM_ISALIVE(sc) == 0) 1684 return; 1685 1686 s = spltty(); 1687 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1688 goto out; 1689 if (sc->sc_tx_stopped) 1690 goto out; 1691 1692 if (tp->t_outq.c_cc <= tp->t_lowat) { 1693 if (ISSET(tp->t_state, TS_ASLEEP)) { 1694 CLR(tp->t_state, TS_ASLEEP); 1695 wakeup(&tp->t_outq); 1696 } 1697 selwakeup(&tp->t_wsel); 1698 if (tp->t_outq.c_cc == 0) 1699 goto out; 1700 } 1701 1702 /* Grab the first contiguous region of buffer space. */ 1703 { 1704 u_char *tba; 1705 int tbc; 1706 1707 tba = tp->t_outq.c_cf; 1708 tbc = ndqb(&tp->t_outq, 0); 1709 1710 (void)splserial(); 1711 COM_LOCK(sc); 1712 1713 sc->sc_tba = tba; 1714 sc->sc_tbc = tbc; 1715 } 1716 1717 SET(tp->t_state, TS_BUSY); 1718 sc->sc_tx_busy = 1; 1719 1720 /* Enable transmit completion interrupts if necessary. */ 1721 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1722 SET(sc->sc_ier, IER_ETXRDY); 1723 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1724 } 1725 1726 /* Output the first chunk of the contiguous buffer. */ 1727 { 1728 int n; 1729 1730 n = sc->sc_tbc; 1731 if (n > sc->sc_fifolen) 1732 n = sc->sc_fifolen; 1733 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1734 sc->sc_tbc -= n; 1735 sc->sc_tba += n; 1736 } 1737 COM_UNLOCK(sc); 1738 out: 1739 splx(s); 1740 return; 1741 } 1742 1743 /* 1744 * Stop output on a line. 1745 */ 1746 void 1747 comstop(tp, flag) 1748 struct tty *tp; 1749 int flag; 1750 { 1751 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1752 int s; 1753 1754 s = splserial(); 1755 COM_LOCK(sc); 1756 if (ISSET(tp->t_state, TS_BUSY)) { 1757 /* Stop transmitting at the next chunk. */ 1758 sc->sc_tbc = 0; 1759 sc->sc_heldtbc = 0; 1760 if (!ISSET(tp->t_state, TS_TTSTOP)) 1761 SET(tp->t_state, TS_FLUSH); 1762 } 1763 COM_UNLOCK(sc); 1764 splx(s); 1765 } 1766 1767 void 1768 comdiag(arg) 1769 void *arg; 1770 { 1771 struct com_softc *sc = arg; 1772 int overflows, floods; 1773 int s; 1774 1775 s = splserial(); 1776 COM_LOCK(sc); 1777 overflows = sc->sc_overflows; 1778 sc->sc_overflows = 0; 1779 floods = sc->sc_floods; 1780 sc->sc_floods = 0; 1781 sc->sc_errors = 0; 1782 COM_UNLOCK(sc); 1783 splx(s); 1784 1785 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1786 sc->sc_dev.dv_xname, 1787 overflows, overflows == 1 ? "" : "s", 1788 floods, floods == 1 ? "" : "s"); 1789 } 1790 1791 integrate void 1792 com_rxsoft(sc, tp) 1793 struct com_softc *sc; 1794 struct tty *tp; 1795 { 1796 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1797 u_char *get, *end; 1798 u_int cc, scc; 1799 u_char lsr; 1800 int code; 1801 int s; 1802 1803 end = sc->sc_ebuf; 1804 get = sc->sc_rbget; 1805 scc = cc = com_rbuf_size - sc->sc_rbavail; 1806 1807 if (cc == com_rbuf_size) { 1808 sc->sc_floods++; 1809 if (sc->sc_errors++ == 0) 1810 callout_reset(&sc->sc_diag_callout, 60 * hz, 1811 comdiag, sc); 1812 } 1813 1814 while (cc) { 1815 code = get[0]; 1816 lsr = get[1]; 1817 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1818 if (ISSET(lsr, LSR_OE)) { 1819 sc->sc_overflows++; 1820 if (sc->sc_errors++ == 0) 1821 callout_reset(&sc->sc_diag_callout, 1822 60 * hz, comdiag, sc); 1823 } 1824 if (ISSET(lsr, LSR_BI | LSR_FE)) 1825 SET(code, TTY_FE); 1826 if (ISSET(lsr, LSR_PE)) 1827 SET(code, TTY_PE); 1828 } 1829 if ((*rint)(code, tp) == -1) { 1830 /* 1831 * The line discipline's buffer is out of space. 1832 */ 1833 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1834 /* 1835 * We're either not using flow control, or the 1836 * line discipline didn't tell us to block for 1837 * some reason. Either way, we have no way to 1838 * know when there's more space available, so 1839 * just drop the rest of the data. 1840 */ 1841 get += cc << 1; 1842 if (get >= end) 1843 get -= com_rbuf_size << 1; 1844 cc = 0; 1845 } else { 1846 /* 1847 * Don't schedule any more receive processing 1848 * until the line discipline tells us there's 1849 * space available (through comhwiflow()). 1850 * Leave the rest of the data in the input 1851 * buffer. 1852 */ 1853 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1854 } 1855 break; 1856 } 1857 get += 2; 1858 if (get >= end) 1859 get = sc->sc_rbuf; 1860 cc--; 1861 } 1862 1863 if (cc != scc) { 1864 sc->sc_rbget = get; 1865 s = splserial(); 1866 COM_LOCK(sc); 1867 1868 cc = sc->sc_rbavail += scc - cc; 1869 /* Buffers should be ok again, release possible block. */ 1870 if (cc >= sc->sc_r_lowat) { 1871 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1872 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1873 SET(sc->sc_ier, IER_ERXRDY); 1874 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1875 } 1876 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1877 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1878 com_hwiflow(sc); 1879 } 1880 } 1881 COM_UNLOCK(sc); 1882 splx(s); 1883 } 1884 } 1885 1886 integrate void 1887 com_txsoft(sc, tp) 1888 struct com_softc *sc; 1889 struct tty *tp; 1890 { 1891 1892 CLR(tp->t_state, TS_BUSY); 1893 if (ISSET(tp->t_state, TS_FLUSH)) 1894 CLR(tp->t_state, TS_FLUSH); 1895 else 1896 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1897 (*tp->t_linesw->l_start)(tp); 1898 } 1899 1900 integrate void 1901 com_stsoft(sc, tp) 1902 struct com_softc *sc; 1903 struct tty *tp; 1904 { 1905 u_char msr, delta; 1906 int s; 1907 1908 s = splserial(); 1909 COM_LOCK(sc); 1910 msr = sc->sc_msr; 1911 delta = sc->sc_msr_delta; 1912 sc->sc_msr_delta = 0; 1913 COM_UNLOCK(sc); 1914 splx(s); 1915 1916 if (ISSET(delta, sc->sc_msr_dcd)) { 1917 /* 1918 * Inform the tty layer that carrier detect changed. 1919 */ 1920 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1921 } 1922 1923 if (ISSET(delta, sc->sc_msr_cts)) { 1924 /* Block or unblock output according to flow control. */ 1925 if (ISSET(msr, sc->sc_msr_cts)) { 1926 sc->sc_tx_stopped = 0; 1927 (*tp->t_linesw->l_start)(tp); 1928 } else { 1929 sc->sc_tx_stopped = 1; 1930 } 1931 } 1932 1933 #ifdef COM_DEBUG 1934 if (com_debug) 1935 comstatus(sc, "com_stsoft"); 1936 #endif 1937 } 1938 1939 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1940 void 1941 comsoft(arg) 1942 void *arg; 1943 { 1944 struct com_softc *sc = arg; 1945 struct tty *tp; 1946 1947 if (COM_ISALIVE(sc) == 0) 1948 return; 1949 1950 { 1951 #else 1952 void 1953 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1954 comsoft() 1955 #else 1956 comsoft(arg) 1957 void *arg; 1958 #endif 1959 { 1960 struct com_softc *sc; 1961 struct tty *tp; 1962 int unit; 1963 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1964 int s; 1965 1966 s = splsoftserial(); 1967 com_softintr_scheduled = 0; 1968 #endif 1969 1970 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1971 sc = device_lookup(&com_cd, unit); 1972 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1973 continue; 1974 1975 if (COM_ISALIVE(sc) == 0) 1976 continue; 1977 1978 tp = sc->sc_tty; 1979 if (tp == NULL) 1980 continue; 1981 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1982 continue; 1983 #endif 1984 tp = sc->sc_tty; 1985 1986 if (sc->sc_rx_ready) { 1987 sc->sc_rx_ready = 0; 1988 com_rxsoft(sc, tp); 1989 } 1990 1991 if (sc->sc_st_check) { 1992 sc->sc_st_check = 0; 1993 com_stsoft(sc, tp); 1994 } 1995 1996 if (sc->sc_tx_done) { 1997 sc->sc_tx_done = 0; 1998 com_txsoft(sc, tp); 1999 } 2000 } 2001 2002 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2003 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2004 splx(s); 2005 #endif 2006 #endif 2007 } 2008 2009 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2010 /* there has got to be a better way to do comsoft() */ 2011 }} 2012 #endif 2013 2014 int 2015 comintr(arg) 2016 void *arg; 2017 { 2018 struct com_softc *sc = arg; 2019 bus_space_tag_t iot = sc->sc_iot; 2020 bus_space_handle_t ioh = sc->sc_ioh; 2021 u_char *put, *end; 2022 u_int cc; 2023 u_char lsr, iir; 2024 2025 if (COM_ISALIVE(sc) == 0) 2026 return (0); 2027 2028 COM_LOCK(sc); 2029 iir = bus_space_read_1(iot, ioh, com_iir); 2030 if (ISSET(iir, IIR_NOPEND)) { 2031 COM_UNLOCK(sc); 2032 return (0); 2033 } 2034 2035 end = sc->sc_ebuf; 2036 put = sc->sc_rbput; 2037 cc = sc->sc_rbavail; 2038 2039 again: do { 2040 u_char msr, delta; 2041 2042 lsr = bus_space_read_1(iot, ioh, com_lsr); 2043 if (ISSET(lsr, LSR_BI)) { 2044 int cn_trapped = 0; 2045 cn_check_magic(sc->sc_tty->t_dev, 2046 CNC_BREAK, com_cnm_state); 2047 if (cn_trapped) 2048 continue; 2049 #if defined(KGDB) 2050 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2051 kgdb_connect(1); 2052 continue; 2053 } 2054 #endif 2055 } 2056 2057 if (ISSET(lsr, LSR_RCV_MASK) && 2058 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2059 while (cc > 0) { 2060 int cn_trapped = 0; 2061 put[0] = bus_space_read_1(iot, ioh, com_data); 2062 put[1] = lsr; 2063 cn_check_magic(sc->sc_tty->t_dev, 2064 put[0], com_cnm_state); 2065 if (cn_trapped) { 2066 lsr = bus_space_read_1(iot, ioh, com_lsr); 2067 if (!ISSET(lsr, LSR_RCV_MASK)) 2068 break; 2069 2070 continue; 2071 } 2072 put += 2; 2073 if (put >= end) 2074 put = sc->sc_rbuf; 2075 cc--; 2076 2077 lsr = bus_space_read_1(iot, ioh, com_lsr); 2078 if (!ISSET(lsr, LSR_RCV_MASK)) 2079 break; 2080 } 2081 2082 /* 2083 * Current string of incoming characters ended because 2084 * no more data was available or we ran out of space. 2085 * Schedule a receive event if any data was received. 2086 * If we're out of space, turn off receive interrupts. 2087 */ 2088 sc->sc_rbput = put; 2089 sc->sc_rbavail = cc; 2090 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2091 sc->sc_rx_ready = 1; 2092 2093 /* 2094 * See if we are in danger of overflowing a buffer. If 2095 * so, use hardware flow control to ease the pressure. 2096 */ 2097 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2098 cc < sc->sc_r_hiwat) { 2099 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2100 com_hwiflow(sc); 2101 } 2102 2103 /* 2104 * If we're out of space, disable receive interrupts 2105 * until the queue has drained a bit. 2106 */ 2107 if (!cc) { 2108 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2109 CLR(sc->sc_ier, IER_ERXRDY); 2110 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2111 } 2112 } else { 2113 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2114 bus_space_write_1(iot, ioh, com_ier, 0); 2115 delay(10); 2116 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2117 continue; 2118 } 2119 } 2120 2121 msr = bus_space_read_1(iot, ioh, com_msr); 2122 delta = msr ^ sc->sc_msr; 2123 sc->sc_msr = msr; 2124 /* 2125 * Pulse-per-second (PSS) signals on edge of DCD? 2126 * Process these even if line discipline is ignoring DCD. 2127 */ 2128 if (delta & sc->sc_ppsmask) { 2129 struct timeval tv; 2130 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2131 /* XXX nanotime() */ 2132 microtime(&tv); 2133 TIMEVAL_TO_TIMESPEC(&tv, 2134 &sc->ppsinfo.assert_timestamp); 2135 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2136 timespecadd(&sc->ppsinfo.assert_timestamp, 2137 &sc->ppsparam.assert_offset, 2138 &sc->ppsinfo.assert_timestamp); 2139 } 2140 2141 #ifdef PPS_SYNC 2142 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2143 hardpps(&tv, tv.tv_usec); 2144 #endif 2145 sc->ppsinfo.assert_sequence++; 2146 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2147 2148 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2149 /* XXX nanotime() */ 2150 microtime(&tv); 2151 TIMEVAL_TO_TIMESPEC(&tv, 2152 &sc->ppsinfo.clear_timestamp); 2153 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2154 timespecadd(&sc->ppsinfo.clear_timestamp, 2155 &sc->ppsparam.clear_offset, 2156 &sc->ppsinfo.clear_timestamp); 2157 } 2158 2159 #ifdef PPS_SYNC 2160 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2161 hardpps(&tv, tv.tv_usec); 2162 #endif 2163 sc->ppsinfo.clear_sequence++; 2164 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2165 } 2166 } 2167 2168 /* 2169 * Process normal status changes 2170 */ 2171 if (ISSET(delta, sc->sc_msr_mask)) { 2172 SET(sc->sc_msr_delta, delta); 2173 2174 /* 2175 * Stop output immediately if we lose the output 2176 * flow control signal or carrier detect. 2177 */ 2178 if (ISSET(~msr, sc->sc_msr_mask)) { 2179 sc->sc_tbc = 0; 2180 sc->sc_heldtbc = 0; 2181 #ifdef COM_DEBUG 2182 if (com_debug) 2183 comstatus(sc, "comintr "); 2184 #endif 2185 } 2186 2187 sc->sc_st_check = 1; 2188 } 2189 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2190 || ((iir & IIR_IMASK) == 0)); 2191 2192 /* 2193 * Done handling any receive interrupts. See if data can be 2194 * transmitted as well. Schedule tx done event if no data left 2195 * and tty was marked busy. 2196 */ 2197 if (ISSET(lsr, LSR_TXRDY)) { 2198 /* 2199 * If we've delayed a parameter change, do it now, and restart 2200 * output. 2201 */ 2202 if (sc->sc_heldchange) { 2203 com_loadchannelregs(sc); 2204 sc->sc_heldchange = 0; 2205 sc->sc_tbc = sc->sc_heldtbc; 2206 sc->sc_heldtbc = 0; 2207 } 2208 2209 /* Output the next chunk of the contiguous buffer, if any. */ 2210 if (sc->sc_tbc > 0) { 2211 int n; 2212 2213 n = sc->sc_tbc; 2214 if (n > sc->sc_fifolen) 2215 n = sc->sc_fifolen; 2216 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2217 sc->sc_tbc -= n; 2218 sc->sc_tba += n; 2219 } else { 2220 /* Disable transmit completion interrupts if necessary. */ 2221 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2222 CLR(sc->sc_ier, IER_ETXRDY); 2223 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2224 } 2225 if (sc->sc_tx_busy) { 2226 sc->sc_tx_busy = 0; 2227 sc->sc_tx_done = 1; 2228 } 2229 } 2230 } 2231 2232 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2233 goto again; 2234 2235 COM_UNLOCK(sc); 2236 2237 /* Wake up the poller. */ 2238 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2239 softintr_schedule(sc->sc_si); 2240 #else 2241 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2242 setsoftserial(); 2243 #else 2244 if (!com_softintr_scheduled) { 2245 com_softintr_scheduled = 1; 2246 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2247 } 2248 #endif 2249 #endif 2250 2251 #if NRND > 0 && defined(RND_COM) 2252 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2253 #endif 2254 2255 return (1); 2256 } 2257 2258 /* 2259 * The following functions are polled getc and putc routines, shared 2260 * by the console and kgdb glue. 2261 * 2262 * The read-ahead code is so that you can detect pending in-band 2263 * cn_magic in polled mode while doing output rather than having to 2264 * wait until the kernel decides it needs input. 2265 */ 2266 2267 #define MAX_READAHEAD 20 2268 static int com_readahead[MAX_READAHEAD]; 2269 static int com_readaheadcount = 0; 2270 2271 int 2272 com_common_getc(dev, iot, ioh) 2273 dev_t dev; 2274 bus_space_tag_t iot; 2275 bus_space_handle_t ioh; 2276 { 2277 int s = splserial(); 2278 u_char stat, c; 2279 2280 /* got a character from reading things earlier */ 2281 if (com_readaheadcount > 0) { 2282 int i; 2283 2284 c = com_readahead[0]; 2285 for (i = 1; i < com_readaheadcount; i++) { 2286 com_readahead[i-1] = com_readahead[i]; 2287 } 2288 com_readaheadcount--; 2289 splx(s); 2290 return (c); 2291 } 2292 2293 /* block until a character becomes available */ 2294 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2295 ; 2296 2297 c = bus_space_read_1(iot, ioh, com_data); 2298 stat = bus_space_read_1(iot, ioh, com_iir); 2299 { 2300 int cn_trapped = 0; /* unused */ 2301 #ifdef DDB 2302 extern int db_active; 2303 if (!db_active) 2304 #endif 2305 cn_check_magic(dev, c, com_cnm_state); 2306 } 2307 splx(s); 2308 return (c); 2309 } 2310 2311 void 2312 com_common_putc(dev, iot, ioh, c) 2313 dev_t dev; 2314 bus_space_tag_t iot; 2315 bus_space_handle_t ioh; 2316 int c; 2317 { 2318 int s = splserial(); 2319 int timo; 2320 2321 int cin, stat; 2322 if (com_readaheadcount < MAX_READAHEAD 2323 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2324 int cn_trapped = 0; 2325 cin = bus_space_read_1(iot, ioh, com_data); 2326 stat = bus_space_read_1(iot, ioh, com_iir); 2327 cn_check_magic(dev, cin, com_cnm_state); 2328 com_readahead[com_readaheadcount++] = cin; 2329 } 2330 2331 /* wait for any pending transmission to finish */ 2332 timo = 150000; 2333 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2334 continue; 2335 2336 bus_space_write_1(iot, ioh, com_data, c); 2337 COM_BARRIER(iot, ioh, BR | BW); 2338 2339 /* wait for this transmission to complete */ 2340 timo = 1500000; 2341 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2342 continue; 2343 2344 splx(s); 2345 } 2346 2347 /* 2348 * Initialize UART for use as console or KGDB line. 2349 */ 2350 int 2351 cominit(iot, iobase, rate, frequency, cflag, iohp) 2352 bus_space_tag_t iot; 2353 bus_addr_t iobase; 2354 int rate, frequency; 2355 tcflag_t cflag; 2356 bus_space_handle_t *iohp; 2357 { 2358 bus_space_handle_t ioh; 2359 2360 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2361 return (ENOMEM); /* ??? */ 2362 2363 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2364 bus_space_write_1(iot, ioh, com_efr, 0); 2365 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2366 rate = comspeed(rate, frequency); 2367 bus_space_write_1(iot, ioh, com_dlbl, rate); 2368 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2369 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2370 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2371 bus_space_write_1(iot, ioh, com_fifo, 2372 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2373 bus_space_write_1(iot, ioh, com_ier, 0); 2374 2375 *iohp = ioh; 2376 return (0); 2377 } 2378 2379 /* 2380 * Following are all routines needed for COM to act as console 2381 */ 2382 struct consdev comcons = { 2383 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2384 NODEV, CN_NORMAL 2385 }; 2386 2387 2388 int 2389 comcnattach(iot, iobase, rate, frequency, cflag) 2390 bus_space_tag_t iot; 2391 bus_addr_t iobase; 2392 int rate, frequency; 2393 tcflag_t cflag; 2394 { 2395 int res; 2396 2397 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2398 if (res) 2399 return (res); 2400 2401 cn_tab = &comcons; 2402 cn_init_magic(&com_cnm_state); 2403 cn_set_magic("\047\001"); /* default magic is BREAK */ 2404 2405 comconstag = iot; 2406 comconsaddr = iobase; 2407 comconsrate = rate; 2408 comconscflag = cflag; 2409 2410 return (0); 2411 } 2412 2413 int 2414 comcngetc(dev) 2415 dev_t dev; 2416 { 2417 return (com_common_getc(dev, comconstag, comconsioh)); 2418 } 2419 2420 /* 2421 * Console kernel output character routine. 2422 */ 2423 void 2424 comcnputc(dev, c) 2425 dev_t dev; 2426 int c; 2427 { 2428 com_common_putc(dev, comconstag, comconsioh, c); 2429 } 2430 2431 void 2432 comcnpollc(dev, on) 2433 dev_t dev; 2434 int on; 2435 { 2436 2437 } 2438 2439 #ifdef KGDB 2440 int 2441 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2442 bus_space_tag_t iot; 2443 bus_addr_t iobase; 2444 int rate, frequency; 2445 tcflag_t cflag; 2446 { 2447 int res; 2448 2449 if (iot == comconstag && iobase == comconsaddr) 2450 return (EBUSY); /* cannot share with console */ 2451 2452 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2453 if (res) 2454 return (res); 2455 2456 /* 2457 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2458 * expects this to be initialized 2459 */ 2460 cn_init_magic(&com_cnm_state); 2461 cn_set_magic("\047\001"); 2462 2463 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2464 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2465 2466 com_kgdb_iot = iot; 2467 com_kgdb_addr = iobase; 2468 2469 return (0); 2470 } 2471 2472 /* ARGSUSED */ 2473 int 2474 com_kgdb_getc(arg) 2475 void *arg; 2476 { 2477 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2478 } 2479 2480 /* ARGSUSED */ 2481 void 2482 com_kgdb_putc(arg, c) 2483 void *arg; 2484 int c; 2485 { 2486 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2487 } 2488 #endif /* KGDB */ 2489 2490 /* helper function to identify the com ports used by 2491 console or KGDB (and not yet autoconf attached) */ 2492 int 2493 com_is_console(iot, iobase, ioh) 2494 bus_space_tag_t iot; 2495 bus_addr_t iobase; 2496 bus_space_handle_t *ioh; 2497 { 2498 bus_space_handle_t help; 2499 2500 if (!comconsattached && 2501 iot == comconstag && iobase == comconsaddr) 2502 help = comconsioh; 2503 #ifdef KGDB 2504 else if (!com_kgdb_attached && 2505 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2506 help = com_kgdb_ioh; 2507 #endif 2508 else 2509 return (0); 2510 2511 if (ioh) 2512 *ioh = help; 2513 return (1); 2514 } 2515
Indexes created Thu Sep 25 16:09:42 GMT 2025