com.c revision 1.191
1 /* $NetBSD: com.c,v 1.191 2001/11/13 13:14:36 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.191 2001/11/13 13:14:36 lukem Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_kgdb.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 /* 93 * Override cnmagic(9) macro before including <sys/systm.h>. 94 * We need to know if cn_check_magic triggered debugger, so set a flag. 95 * Callers of cn_check_magic must declare int cn_trapped = 0; 96 * XXX: this is *ugly*! 97 */ 98 #define cn_trap() \ 99 do { \ 100 console_debugger(); \ 101 cn_trapped = 1; \ 102 } while (/* CONSTCOND */ 0) 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/ioctl.h> 107 #include <sys/select.h> 108 #include <sys/tty.h> 109 #include <sys/proc.h> 110 #include <sys/user.h> 111 #include <sys/conf.h> 112 #include <sys/file.h> 113 #include <sys/uio.h> 114 #include <sys/kernel.h> 115 #include <sys/syslog.h> 116 #include <sys/types.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 #include <sys/timepps.h> 120 #include <sys/vnode.h> 121 122 #include <machine/intr.h> 123 #include <machine/bus.h> 124 125 #include <dev/ic/comreg.h> 126 #include <dev/ic/comvar.h> 127 #include <dev/ic/ns16550reg.h> 128 #include <dev/ic/st16650reg.h> 129 #ifdef COM_HAYESP 130 #include <dev/ic/hayespreg.h> 131 #endif 132 #define com_lcr com_cfcr 133 #include <dev/cons.h> 134 135 #ifdef COM_HAYESP 136 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 137 #endif 138 139 static void com_enable_debugport __P((struct com_softc *)); 140 141 void com_config __P((struct com_softc *)); 142 void com_shutdown __P((struct com_softc *)); 143 int comspeed __P((long, long)); 144 static u_char cflag2lcr __P((tcflag_t)); 145 int comparam __P((struct tty *, struct termios *)); 146 void comstart __P((struct tty *)); 147 int comhwiflow __P((struct tty *, int)); 148 149 void com_loadchannelregs __P((struct com_softc *)); 150 void com_hwiflow __P((struct com_softc *)); 151 void com_break __P((struct com_softc *, int)); 152 void com_modem __P((struct com_softc *, int)); 153 void tiocm_to_com __P((struct com_softc *, u_long, int)); 154 int com_to_tiocm __P((struct com_softc *)); 155 void com_iflush __P((struct com_softc *)); 156 157 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 158 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 159 160 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 161 bus_space_handle_t *)); 162 163 /* XXX: This belongs elsewhere */ 164 cdev_decl(com); 165 166 int comcngetc __P((dev_t)); 167 void comcnputc __P((dev_t, int)); 168 void comcnpollc __P((dev_t, int)); 169 170 #define integrate static inline 171 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 172 void comsoft __P((void *)); 173 #else 174 #ifndef __NO_SOFT_SERIAL_INTERRUPT 175 void comsoft __P((void)); 176 #else 177 void comsoft __P((void *)); 178 struct callout comsoft_callout = CALLOUT_INITIALIZER; 179 #endif 180 #endif 181 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 183 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 184 integrate void com_schedrx __P((struct com_softc *)); 185 void comdiag __P((void *)); 186 187 extern struct cfdriver com_cd; 188 189 /* 190 * Make this an option variable one can patch. 191 * But be warned: this must be a power of 2! 192 */ 193 u_int com_rbuf_size = COM_RING_SIZE; 194 195 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 196 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 197 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 198 199 static bus_addr_t comconsaddr; 200 static bus_space_tag_t comconstag; 201 static bus_space_handle_t comconsioh; 202 static int comconsattached; 203 static int comconsrate; 204 static tcflag_t comconscflag; 205 static struct cnm_state com_cnm_state; 206 207 static int ppscap = 208 PPS_TSFMT_TSPEC | 209 PPS_CAPTUREASSERT | 210 PPS_CAPTURECLEAR | 211 #ifdef PPS_SYNC 212 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 213 #endif /* PPS_SYNC */ 214 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 215 216 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 217 #ifdef __NO_SOFT_SERIAL_INTERRUPT 218 volatile int com_softintr_scheduled; 219 #endif 220 #endif 221 222 #ifdef KGDB 223 #include <sys/kgdb.h> 224 225 static bus_addr_t com_kgdb_addr; 226 static bus_space_tag_t com_kgdb_iot; 227 static bus_space_handle_t com_kgdb_ioh; 228 static int com_kgdb_attached; 229 230 int com_kgdb_getc __P((void *)); 231 void com_kgdb_putc __P((void *, int)); 232 #endif /* KGDB */ 233 234 #define COMUNIT_MASK 0x7ffff 235 #define COMDIALOUT_MASK 0x80000 236 237 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 238 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 239 240 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 241 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 242 243 #define BR BUS_SPACE_BARRIER_READ 244 #define BW BUS_SPACE_BARRIER_WRITE 245 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 246 247 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 248 249 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 250 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 251 252 #else 253 254 #define COM_LOCK(sc) 255 #define COM_UNLOCK(sc) 256 257 #endif 258 259 int 260 comspeed(speed, frequency) 261 long speed, frequency; 262 { 263 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 264 265 int x, err; 266 267 #if 0 268 if (speed == 0) 269 return (0); 270 #endif 271 if (speed <= 0) 272 return (-1); 273 x = divrnd(frequency / 16, speed); 274 if (x <= 0) 275 return (-1); 276 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 277 if (err < 0) 278 err = -err; 279 if (err > COM_TOLERANCE) 280 return (-1); 281 return (x); 282 283 #undef divrnd 284 } 285 286 #ifdef COM_DEBUG 287 int com_debug = 0; 288 289 void comstatus __P((struct com_softc *, char *)); 290 void 291 comstatus(sc, str) 292 struct com_softc *sc; 293 char *str; 294 { 295 struct tty *tp = sc->sc_tty; 296 297 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 298 sc->sc_dev.dv_xname, str, 299 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 300 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 301 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 302 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 303 sc->sc_tx_stopped ? "+" : "-"); 304 305 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 306 sc->sc_dev.dv_xname, str, 307 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 308 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 309 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 310 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 311 sc->sc_rx_flags); 312 } 313 #endif 314 315 int 316 comprobe1(iot, ioh) 317 bus_space_tag_t iot; 318 bus_space_handle_t ioh; 319 { 320 321 /* force access to id reg */ 322 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 323 bus_space_write_1(iot, ioh, com_iir, 0); 324 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 325 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 326 return (0); 327 328 return (1); 329 } 330 331 #ifdef COM_HAYESP 332 int 333 comprobeHAYESP(hayespioh, sc) 334 bus_space_handle_t hayespioh; 335 struct com_softc *sc; 336 { 337 char val, dips; 338 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 339 bus_space_tag_t iot = sc->sc_iot; 340 341 /* 342 * Hayes ESP cards have two iobases. One is for compatibility with 343 * 16550 serial chips, and at the same ISA PC base addresses. The 344 * other is for ESP-specific enhanced features, and lies at a 345 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 346 */ 347 348 /* Test for ESP signature */ 349 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 350 return (0); 351 352 /* 353 * ESP is present at ESP enhanced base address; unknown com port 354 */ 355 356 /* Get the dip-switch configurations */ 357 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 358 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 359 360 /* Determine which com port this ESP card services: bits 0,1 of */ 361 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 362 if (sc->sc_iobase != combaselist[dips & 0x03]) 363 return (0); 364 365 printf(": ESP"); 366 367 /* Check ESP Self Test bits. */ 368 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 369 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 370 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 371 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 372 if ((val & 0x70) < 0x20) { 373 printf("-old (%o)", val & 0x70); 374 /* we do not support the necessary features */ 375 return (0); 376 } 377 378 /* Check for ability to emulate 16550: bit 8 == 1 */ 379 if ((dips & 0x80) == 0) { 380 printf(" slave"); 381 /* XXX Does slave really mean no 16550 support?? */ 382 return (0); 383 } 384 385 /* 386 * If we made it this far, we are a full-featured ESP v2.0 (or 387 * better), at the correct com port address. 388 */ 389 390 SET(sc->sc_hwflags, COM_HW_HAYESP); 391 printf(", 1024 byte fifo\n"); 392 return (1); 393 } 394 #endif 395 396 static void 397 com_enable_debugport(sc) 398 struct com_softc *sc; 399 { 400 int s; 401 402 /* Turn on line break interrupt, set carrier. */ 403 s = splserial(); 404 COM_LOCK(sc); 405 sc->sc_ier = IER_ERXRDY; 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 407 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 408 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 409 COM_UNLOCK(sc); 410 splx(s); 411 } 412 413 void 414 com_attach_subr(sc) 415 struct com_softc *sc; 416 { 417 bus_addr_t iobase = sc->sc_iobase; 418 bus_space_tag_t iot = sc->sc_iot; 419 bus_space_handle_t ioh = sc->sc_ioh; 420 struct tty *tp; 421 #ifdef COM16650 422 u_int8_t lcr; 423 #endif 424 #ifdef COM_HAYESP 425 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 426 int *hayespp; 427 #endif 428 429 callout_init(&sc->sc_diag_callout); 430 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 431 simple_lock_init(&sc->sc_lock); 432 #endif 433 434 /* Disable interrupts before configuring the device. */ 435 sc->sc_ier = 0; 436 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 437 438 if (iot == comconstag && iobase == comconsaddr) { 439 comconsattached = 1; 440 441 /* Make sure the console is always "hardwired". */ 442 delay(1000); /* wait for output to finish */ 443 SET(sc->sc_hwflags, COM_HW_CONSOLE); 444 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 445 } 446 447 #ifdef COM_HAYESP 448 sc->sc_prescaler = 0; /* set prescaler to x1. */ 449 450 /* Look for a Hayes ESP board. */ 451 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 452 bus_space_handle_t hayespioh; 453 454 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 455 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 456 continue; 457 if (comprobeHAYESP(hayespioh, sc)) { 458 sc->sc_hayespioh = hayespioh; 459 sc->sc_fifolen = 1024; 460 461 break; 462 } 463 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 464 } 465 /* No ESP; look for other things. */ 466 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 467 #endif 468 sc->sc_fifolen = 1; 469 /* look for a NS 16550AF UART with FIFOs */ 470 bus_space_write_1(iot, ioh, com_fifo, 471 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 472 delay(100); 473 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 474 == IIR_FIFO_MASK) 475 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 476 == FIFO_TRIGGER_14) { 477 SET(sc->sc_hwflags, COM_HW_FIFO); 478 479 #ifdef COM16650 480 /* 481 * IIR changes into the EFR if LCR is set to LCR_EERS 482 * on 16650s. We also know IIR != 0 at this point. 483 * Write 0 into the EFR, and read it. If the result 484 * is 0, we have a 16650. 485 * 486 * Older 16650s were broken; the test to detect them 487 * is taken from the Linux driver. Apparently 488 * setting DLAB enable gives access to the EFR on 489 * these chips. 490 */ 491 lcr = bus_space_read_1(iot, ioh, com_lcr); 492 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 493 bus_space_write_1(iot, ioh, com_efr, 0); 494 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 495 bus_space_write_1(iot, ioh, com_lcr, 496 lcr | LCR_DLAB); 497 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 498 CLR(sc->sc_hwflags, COM_HW_FIFO); 499 sc->sc_fifolen = 0; 500 } else { 501 SET(sc->sc_hwflags, COM_HW_FLOW); 502 sc->sc_fifolen = 32; 503 } 504 } else 505 #endif 506 sc->sc_fifolen = 16; 507 508 #ifdef COM16650 509 bus_space_write_1(iot, ioh, com_lcr, lcr); 510 if (sc->sc_fifolen == 0) 511 printf(": st16650, broken fifo\n"); 512 else if (sc->sc_fifolen == 32) 513 printf(": st16650a, working fifo\n"); 514 else 515 #endif 516 printf(": ns16550a, working fifo\n"); 517 } else 518 printf(": ns16550, broken fifo\n"); 519 else 520 printf(": ns8250 or ns16450, no fifo\n"); 521 bus_space_write_1(iot, ioh, com_fifo, 0); 522 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 523 sc->sc_fifolen = 1; 524 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 525 } 526 #ifdef COM_HAYESP 527 } 528 #endif 529 530 tp = ttymalloc(); 531 tp->t_oproc = comstart; 532 tp->t_param = comparam; 533 tp->t_hwiflow = comhwiflow; 534 535 sc->sc_tty = tp; 536 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 537 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 538 sc->sc_rbavail = com_rbuf_size; 539 if (sc->sc_rbuf == NULL) { 540 printf("%s: unable to allocate ring buffer\n", 541 sc->sc_dev.dv_xname); 542 return; 543 } 544 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 545 546 tty_attach(tp); 547 548 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 549 SET(sc->sc_mcr, MCR_IENABLE); 550 551 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 552 int maj; 553 554 /* locate the major number */ 555 for (maj = 0; maj < nchrdev; maj++) 556 if (cdevsw[maj].d_open == comopen) 557 break; 558 559 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 560 561 printf("%s: console\n", sc->sc_dev.dv_xname); 562 } 563 564 #ifdef KGDB 565 /* 566 * Allow kgdb to "take over" this port. If this is 567 * the kgdb device, it has exclusive use. 568 */ 569 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 570 com_kgdb_attached = 1; 571 572 SET(sc->sc_hwflags, COM_HW_KGDB); 573 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 574 } 575 #endif 576 577 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 578 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 579 #endif 580 581 #if NRND > 0 && defined(RND_COM) 582 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 583 RND_TYPE_TTY, 0); 584 #endif 585 586 /* if there are no enable/disable functions, assume the device 587 is always enabled */ 588 if (!sc->enable) 589 sc->enabled = 1; 590 591 com_config(sc); 592 593 SET(sc->sc_hwflags, COM_HW_DEV_OK); 594 } 595 596 void 597 com_config(sc) 598 struct com_softc *sc; 599 { 600 bus_space_tag_t iot = sc->sc_iot; 601 bus_space_handle_t ioh = sc->sc_ioh; 602 603 /* Disable interrupts before configuring the device. */ 604 sc->sc_ier = 0; 605 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 606 607 #ifdef COM_HAYESP 608 /* Look for a Hayes ESP board. */ 609 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 610 sc->sc_fifolen = 1024; 611 612 /* Set 16550 compatibility mode */ 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 614 HAYESP_SETMODE); 615 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 616 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 617 HAYESP_MODE_SCALE); 618 619 /* Set RTS/CTS flow control */ 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 621 HAYESP_SETFLOWTYPE); 622 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 623 HAYESP_FLOW_RTS); 624 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 625 HAYESP_FLOW_CTS); 626 627 /* Set flow control levels */ 628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 629 HAYESP_SETRXFLOW); 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 631 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 635 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 636 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 637 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 638 } 639 #endif 640 641 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 642 com_enable_debugport(sc); 643 } 644 645 int 646 com_detach(self, flags) 647 struct device *self; 648 int flags; 649 { 650 struct com_softc *sc = (struct com_softc *)self; 651 int maj, mn; 652 653 /* locate the major number */ 654 for (maj = 0; maj < nchrdev; maj++) 655 if (cdevsw[maj].d_open == comopen) 656 break; 657 658 /* Nuke the vnodes for any open instances. */ 659 mn = self->dv_unit; 660 vdevgone(maj, mn, mn, VCHR); 661 662 mn |= COMDIALOUT_MASK; 663 vdevgone(maj, mn, mn, VCHR); 664 665 /* Free the receive buffer. */ 666 free(sc->sc_rbuf, M_DEVBUF); 667 668 /* Detach and free the tty. */ 669 tty_detach(sc->sc_tty); 670 ttyfree(sc->sc_tty); 671 672 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 673 /* Unhook the soft interrupt handler. */ 674 softintr_disestablish(sc->sc_si); 675 #endif 676 677 #if NRND > 0 && defined(RND_COM) 678 /* Unhook the entropy source. */ 679 rnd_detach_source(&sc->rnd_source); 680 #endif 681 682 return (0); 683 } 684 685 int 686 com_activate(self, act) 687 struct device *self; 688 enum devact act; 689 { 690 struct com_softc *sc = (struct com_softc *)self; 691 int s, rv = 0; 692 693 s = splserial(); 694 COM_LOCK(sc); 695 switch (act) { 696 case DVACT_ACTIVATE: 697 rv = EOPNOTSUPP; 698 break; 699 700 case DVACT_DEACTIVATE: 701 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 702 rv = EBUSY; 703 break; 704 } 705 706 if (sc->disable != NULL && sc->enabled != 0) { 707 (*sc->disable)(sc); 708 sc->enabled = 0; 709 } 710 break; 711 } 712 713 COM_UNLOCK(sc); 714 splx(s); 715 return (rv); 716 } 717 718 void 719 com_shutdown(sc) 720 struct com_softc *sc; 721 { 722 struct tty *tp = sc->sc_tty; 723 int s; 724 725 s = splserial(); 726 COM_LOCK(sc); 727 728 /* If we were asserting flow control, then deassert it. */ 729 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 730 com_hwiflow(sc); 731 732 /* Clear any break condition set with TIOCSBRK. */ 733 com_break(sc, 0); 734 735 /* Turn off PPS capture on last close. */ 736 sc->sc_ppsmask = 0; 737 sc->ppsparam.mode = 0; 738 739 /* 740 * Hang up if necessary. Wait a bit, so the other side has time to 741 * notice even if we immediately open the port again. 742 * Avoid tsleeping above splhigh(). 743 */ 744 if (ISSET(tp->t_cflag, HUPCL)) { 745 com_modem(sc, 0); 746 COM_UNLOCK(sc); 747 splx(s); 748 /* XXX tsleep will only timeout */ 749 (void) tsleep(sc, TTIPRI, ttclos, hz); 750 s = splserial(); 751 COM_LOCK(sc); 752 } 753 754 /* Turn off interrupts. */ 755 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 756 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 757 else 758 sc->sc_ier = 0; 759 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 760 761 if (sc->disable) { 762 #ifdef DIAGNOSTIC 763 if (!sc->enabled) 764 panic("com_shutdown: not enabled?"); 765 #endif 766 (*sc->disable)(sc); 767 sc->enabled = 0; 768 } 769 COM_UNLOCK(sc); 770 splx(s); 771 } 772 773 int 774 comopen(dev, flag, mode, p) 775 dev_t dev; 776 int flag, mode; 777 struct proc *p; 778 { 779 struct com_softc *sc; 780 struct tty *tp; 781 int s, s2; 782 int error; 783 784 sc = device_lookup(&com_cd, COMUNIT(dev)); 785 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 786 sc->sc_rbuf == NULL) 787 return (ENXIO); 788 789 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 790 return (ENXIO); 791 792 #ifdef KGDB 793 /* 794 * If this is the kgdb port, no other use is permitted. 795 */ 796 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 797 return (EBUSY); 798 #endif 799 800 tp = sc->sc_tty; 801 802 if (ISSET(tp->t_state, TS_ISOPEN) && 803 ISSET(tp->t_state, TS_XCLUDE) && 804 p->p_ucred->cr_uid != 0) 805 return (EBUSY); 806 807 s = spltty(); 808 809 /* 810 * Do the following iff this is a first open. 811 */ 812 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 813 struct termios t; 814 815 tp->t_dev = dev; 816 817 s2 = splserial(); 818 COM_LOCK(sc); 819 820 if (sc->enable) { 821 if ((*sc->enable)(sc)) { 822 COM_UNLOCK(sc); 823 splx(s2); 824 splx(s); 825 printf("%s: device enable failed\n", 826 sc->sc_dev.dv_xname); 827 return (EIO); 828 } 829 sc->enabled = 1; 830 com_config(sc); 831 } 832 833 /* Turn on interrupts. */ 834 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 835 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 836 837 /* Fetch the current modem control status, needed later. */ 838 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 839 840 /* Clear PPS capture state on first open. */ 841 sc->sc_ppsmask = 0; 842 sc->ppsparam.mode = 0; 843 844 COM_UNLOCK(sc); 845 splx(s2); 846 847 /* 848 * Initialize the termios status to the defaults. Add in the 849 * sticky bits from TIOCSFLAGS. 850 */ 851 t.c_ispeed = 0; 852 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 853 t.c_ospeed = comconsrate; 854 t.c_cflag = comconscflag; 855 } else { 856 t.c_ospeed = TTYDEF_SPEED; 857 t.c_cflag = TTYDEF_CFLAG; 858 } 859 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 860 SET(t.c_cflag, CLOCAL); 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 862 SET(t.c_cflag, CRTSCTS); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 864 SET(t.c_cflag, MDMBUF); 865 /* Make sure comparam() will do something. */ 866 tp->t_ospeed = 0; 867 (void) comparam(tp, &t); 868 tp->t_iflag = TTYDEF_IFLAG; 869 tp->t_oflag = TTYDEF_OFLAG; 870 tp->t_lflag = TTYDEF_LFLAG; 871 ttychars(tp); 872 ttsetwater(tp); 873 874 s2 = splserial(); 875 COM_LOCK(sc); 876 877 /* 878 * Turn on DTR. We must always do this, even if carrier is not 879 * present, because otherwise we'd have to use TIOCSDTR 880 * immediately after setting CLOCAL, which applications do not 881 * expect. We always assert DTR while the device is open 882 * unless explicitly requested to deassert it. 883 */ 884 com_modem(sc, 1); 885 886 /* Clear the input ring, and unblock. */ 887 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 888 sc->sc_rbavail = com_rbuf_size; 889 com_iflush(sc); 890 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 891 com_hwiflow(sc); 892 893 #ifdef COM_DEBUG 894 if (com_debug) 895 comstatus(sc, "comopen "); 896 #endif 897 898 COM_UNLOCK(sc); 899 splx(s2); 900 } 901 902 splx(s); 903 904 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 905 if (error) 906 goto bad; 907 908 error = (*tp->t_linesw->l_open)(dev, tp); 909 if (error) 910 goto bad; 911 912 return (0); 913 914 bad: 915 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 916 /* 917 * We failed to open the device, and nobody else had it opened. 918 * Clean up the state as appropriate. 919 */ 920 com_shutdown(sc); 921 } 922 923 return (error); 924 } 925 926 int 927 comclose(dev, flag, mode, p) 928 dev_t dev; 929 int flag, mode; 930 struct proc *p; 931 { 932 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 933 struct tty *tp = sc->sc_tty; 934 935 /* XXX This is for cons.c. */ 936 if (!ISSET(tp->t_state, TS_ISOPEN)) 937 return (0); 938 939 (*tp->t_linesw->l_close)(tp, flag); 940 ttyclose(tp); 941 942 if (COM_ISALIVE(sc) == 0) 943 return (0); 944 945 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 946 /* 947 * Although we got a last close, the device may still be in 948 * use; e.g. if this was the dialout node, and there are still 949 * processes waiting for carrier on the non-dialout node. 950 */ 951 com_shutdown(sc); 952 } 953 954 return (0); 955 } 956 957 int 958 comread(dev, uio, flag) 959 dev_t dev; 960 struct uio *uio; 961 int flag; 962 { 963 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 if (COM_ISALIVE(sc) == 0) 967 return (EIO); 968 969 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 970 } 971 972 int 973 comwrite(dev, uio, flag) 974 dev_t dev; 975 struct uio *uio; 976 int flag; 977 { 978 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 979 struct tty *tp = sc->sc_tty; 980 981 if (COM_ISALIVE(sc) == 0) 982 return (EIO); 983 984 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 985 } 986 987 int 988 compoll(dev, events, p) 989 dev_t dev; 990 int events; 991 struct proc *p; 992 { 993 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 994 struct tty *tp = sc->sc_tty; 995 996 if (COM_ISALIVE(sc) == 0) 997 return (EIO); 998 999 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1000 } 1001 1002 struct tty * 1003 comtty(dev) 1004 dev_t dev; 1005 { 1006 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1007 struct tty *tp = sc->sc_tty; 1008 1009 return (tp); 1010 } 1011 1012 int 1013 comioctl(dev, cmd, data, flag, p) 1014 dev_t dev; 1015 u_long cmd; 1016 caddr_t data; 1017 int flag; 1018 struct proc *p; 1019 { 1020 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1021 struct tty *tp = sc->sc_tty; 1022 int error; 1023 int s; 1024 1025 if (COM_ISALIVE(sc) == 0) 1026 return (EIO); 1027 1028 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1029 if (error >= 0) 1030 return (error); 1031 1032 error = ttioctl(tp, cmd, data, flag, p); 1033 if (error >= 0) 1034 return (error); 1035 1036 error = 0; 1037 1038 s = splserial(); 1039 COM_LOCK(sc); 1040 1041 switch (cmd) { 1042 case TIOCSBRK: 1043 com_break(sc, 1); 1044 break; 1045 1046 case TIOCCBRK: 1047 com_break(sc, 0); 1048 break; 1049 1050 case TIOCSDTR: 1051 com_modem(sc, 1); 1052 break; 1053 1054 case TIOCCDTR: 1055 com_modem(sc, 0); 1056 break; 1057 1058 case TIOCGFLAGS: 1059 *(int *)data = sc->sc_swflags; 1060 break; 1061 1062 case TIOCSFLAGS: 1063 error = suser(p->p_ucred, &p->p_acflag); 1064 if (error) 1065 break; 1066 sc->sc_swflags = *(int *)data; 1067 break; 1068 1069 case TIOCMSET: 1070 case TIOCMBIS: 1071 case TIOCMBIC: 1072 tiocm_to_com(sc, cmd, *(int *)data); 1073 break; 1074 1075 case TIOCMGET: 1076 *(int *)data = com_to_tiocm(sc); 1077 break; 1078 1079 case PPS_IOC_CREATE: 1080 break; 1081 1082 case PPS_IOC_DESTROY: 1083 break; 1084 1085 case PPS_IOC_GETPARAMS: { 1086 pps_params_t *pp; 1087 pp = (pps_params_t *)data; 1088 *pp = sc->ppsparam; 1089 break; 1090 } 1091 1092 case PPS_IOC_SETPARAMS: { 1093 pps_params_t *pp; 1094 int mode; 1095 pp = (pps_params_t *)data; 1096 if (pp->mode & ~ppscap) { 1097 error = EINVAL; 1098 break; 1099 } 1100 sc->ppsparam = *pp; 1101 /* 1102 * Compute msr masks from user-specified timestamp state. 1103 */ 1104 mode = sc->ppsparam.mode; 1105 #ifdef PPS_SYNC 1106 if (mode & PPS_HARDPPSONASSERT) { 1107 mode |= PPS_CAPTUREASSERT; 1108 /* XXX revoke any previous HARDPPS source */ 1109 } 1110 if (mode & PPS_HARDPPSONCLEAR) { 1111 mode |= PPS_CAPTURECLEAR; 1112 /* XXX revoke any previous HARDPPS source */ 1113 } 1114 #endif /* PPS_SYNC */ 1115 switch (mode & PPS_CAPTUREBOTH) { 1116 case 0: 1117 sc->sc_ppsmask = 0; 1118 break; 1119 1120 case PPS_CAPTUREASSERT: 1121 sc->sc_ppsmask = MSR_DCD; 1122 sc->sc_ppsassert = MSR_DCD; 1123 sc->sc_ppsclear = -1; 1124 break; 1125 1126 case PPS_CAPTURECLEAR: 1127 sc->sc_ppsmask = MSR_DCD; 1128 sc->sc_ppsassert = -1; 1129 sc->sc_ppsclear = 0; 1130 break; 1131 1132 case PPS_CAPTUREBOTH: 1133 sc->sc_ppsmask = MSR_DCD; 1134 sc->sc_ppsassert = MSR_DCD; 1135 sc->sc_ppsclear = 0; 1136 break; 1137 1138 default: 1139 error = EINVAL; 1140 break; 1141 } 1142 break; 1143 } 1144 1145 case PPS_IOC_GETCAP: 1146 *(int*)data = ppscap; 1147 break; 1148 1149 case PPS_IOC_FETCH: { 1150 pps_info_t *pi; 1151 pi = (pps_info_t *)data; 1152 *pi = sc->ppsinfo; 1153 break; 1154 } 1155 1156 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1157 /* 1158 * Some GPS clocks models use the falling rather than 1159 * rising edge as the on-the-second signal. 1160 * The old API has no way to specify PPS polarity. 1161 */ 1162 sc->sc_ppsmask = MSR_DCD; 1163 #ifndef PPS_TRAILING_EDGE 1164 sc->sc_ppsassert = MSR_DCD; 1165 sc->sc_ppsclear = -1; 1166 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1167 &sc->ppsinfo.assert_timestamp); 1168 #else 1169 sc->sc_ppsassert = -1 1170 sc->sc_ppsclear = 0; 1171 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1172 &sc->ppsinfo.clear_timestamp); 1173 #endif 1174 break; 1175 1176 default: 1177 error = ENOTTY; 1178 break; 1179 } 1180 1181 COM_UNLOCK(sc); 1182 splx(s); 1183 1184 #ifdef COM_DEBUG 1185 if (com_debug) 1186 comstatus(sc, "comioctl "); 1187 #endif 1188 1189 return (error); 1190 } 1191 1192 integrate void 1193 com_schedrx(sc) 1194 struct com_softc *sc; 1195 { 1196 1197 sc->sc_rx_ready = 1; 1198 1199 /* Wake up the poller. */ 1200 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1201 softintr_schedule(sc->sc_si); 1202 #else 1203 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1204 setsoftserial(); 1205 #else 1206 if (!com_softintr_scheduled) { 1207 com_softintr_scheduled = 1; 1208 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1209 } 1210 #endif 1211 #endif 1212 } 1213 1214 void 1215 com_break(sc, onoff) 1216 struct com_softc *sc; 1217 int onoff; 1218 { 1219 1220 if (onoff) 1221 SET(sc->sc_lcr, LCR_SBREAK); 1222 else 1223 CLR(sc->sc_lcr, LCR_SBREAK); 1224 1225 if (!sc->sc_heldchange) { 1226 if (sc->sc_tx_busy) { 1227 sc->sc_heldtbc = sc->sc_tbc; 1228 sc->sc_tbc = 0; 1229 sc->sc_heldchange = 1; 1230 } else 1231 com_loadchannelregs(sc); 1232 } 1233 } 1234 1235 void 1236 com_modem(sc, onoff) 1237 struct com_softc *sc; 1238 int onoff; 1239 { 1240 1241 if (sc->sc_mcr_dtr == 0) 1242 return; 1243 1244 if (onoff) 1245 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1246 else 1247 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1248 1249 if (!sc->sc_heldchange) { 1250 if (sc->sc_tx_busy) { 1251 sc->sc_heldtbc = sc->sc_tbc; 1252 sc->sc_tbc = 0; 1253 sc->sc_heldchange = 1; 1254 } else 1255 com_loadchannelregs(sc); 1256 } 1257 } 1258 1259 void 1260 tiocm_to_com(sc, how, ttybits) 1261 struct com_softc *sc; 1262 u_long how; 1263 int ttybits; 1264 { 1265 u_char combits; 1266 1267 combits = 0; 1268 if (ISSET(ttybits, TIOCM_DTR)) 1269 SET(combits, MCR_DTR); 1270 if (ISSET(ttybits, TIOCM_RTS)) 1271 SET(combits, MCR_RTS); 1272 1273 switch (how) { 1274 case TIOCMBIC: 1275 CLR(sc->sc_mcr, combits); 1276 break; 1277 1278 case TIOCMBIS: 1279 SET(sc->sc_mcr, combits); 1280 break; 1281 1282 case TIOCMSET: 1283 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1284 SET(sc->sc_mcr, combits); 1285 break; 1286 } 1287 1288 if (!sc->sc_heldchange) { 1289 if (sc->sc_tx_busy) { 1290 sc->sc_heldtbc = sc->sc_tbc; 1291 sc->sc_tbc = 0; 1292 sc->sc_heldchange = 1; 1293 } else 1294 com_loadchannelregs(sc); 1295 } 1296 } 1297 1298 int 1299 com_to_tiocm(sc) 1300 struct com_softc *sc; 1301 { 1302 u_char combits; 1303 int ttybits = 0; 1304 1305 combits = sc->sc_mcr; 1306 if (ISSET(combits, MCR_DTR)) 1307 SET(ttybits, TIOCM_DTR); 1308 if (ISSET(combits, MCR_RTS)) 1309 SET(ttybits, TIOCM_RTS); 1310 1311 combits = sc->sc_msr; 1312 if (ISSET(combits, MSR_DCD)) 1313 SET(ttybits, TIOCM_CD); 1314 if (ISSET(combits, MSR_CTS)) 1315 SET(ttybits, TIOCM_CTS); 1316 if (ISSET(combits, MSR_DSR)) 1317 SET(ttybits, TIOCM_DSR); 1318 if (ISSET(combits, MSR_RI | MSR_TERI)) 1319 SET(ttybits, TIOCM_RI); 1320 1321 if (sc->sc_ier != 0) 1322 SET(ttybits, TIOCM_LE); 1323 1324 return (ttybits); 1325 } 1326 1327 static u_char 1328 cflag2lcr(cflag) 1329 tcflag_t cflag; 1330 { 1331 u_char lcr = 0; 1332 1333 switch (ISSET(cflag, CSIZE)) { 1334 case CS5: 1335 SET(lcr, LCR_5BITS); 1336 break; 1337 case CS6: 1338 SET(lcr, LCR_6BITS); 1339 break; 1340 case CS7: 1341 SET(lcr, LCR_7BITS); 1342 break; 1343 case CS8: 1344 SET(lcr, LCR_8BITS); 1345 break; 1346 } 1347 if (ISSET(cflag, PARENB)) { 1348 SET(lcr, LCR_PENAB); 1349 if (!ISSET(cflag, PARODD)) 1350 SET(lcr, LCR_PEVEN); 1351 } 1352 if (ISSET(cflag, CSTOPB)) 1353 SET(lcr, LCR_STOPB); 1354 1355 return (lcr); 1356 } 1357 1358 int 1359 comparam(tp, t) 1360 struct tty *tp; 1361 struct termios *t; 1362 { 1363 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1364 int ospeed; 1365 u_char lcr; 1366 int s; 1367 1368 if (COM_ISALIVE(sc) == 0) 1369 return (EIO); 1370 1371 #ifdef COM_HAYESP 1372 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1373 int prescaler, speed; 1374 1375 /* 1376 * Calculate UART clock prescaler. It should be in 1377 * range of 0 .. 3. 1378 */ 1379 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1380 prescaler++, speed /= 2) 1381 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1382 break; 1383 1384 if (prescaler == 4) 1385 return (EINVAL); 1386 sc->sc_prescaler = prescaler; 1387 } else 1388 #endif 1389 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1390 1391 /* Check requested parameters. */ 1392 if (ospeed < 0) 1393 return (EINVAL); 1394 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1395 return (EINVAL); 1396 1397 /* 1398 * For the console, always force CLOCAL and !HUPCL, so that the port 1399 * is always active. 1400 */ 1401 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1402 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1403 SET(t->c_cflag, CLOCAL); 1404 CLR(t->c_cflag, HUPCL); 1405 } 1406 1407 /* 1408 * If there were no changes, don't do anything. This avoids dropping 1409 * input and improves performance when all we did was frob things like 1410 * VMIN and VTIME. 1411 */ 1412 if (tp->t_ospeed == t->c_ospeed && 1413 tp->t_cflag == t->c_cflag) 1414 return (0); 1415 1416 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1417 1418 s = splserial(); 1419 COM_LOCK(sc); 1420 1421 sc->sc_lcr = lcr; 1422 1423 /* 1424 * If we're not in a mode that assumes a connection is present, then 1425 * ignore carrier changes. 1426 */ 1427 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1428 sc->sc_msr_dcd = 0; 1429 else 1430 sc->sc_msr_dcd = MSR_DCD; 1431 /* 1432 * Set the flow control pins depending on the current flow control 1433 * mode. 1434 */ 1435 if (ISSET(t->c_cflag, CRTSCTS)) { 1436 sc->sc_mcr_dtr = MCR_DTR; 1437 sc->sc_mcr_rts = MCR_RTS; 1438 sc->sc_msr_cts = MSR_CTS; 1439 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1440 } else if (ISSET(t->c_cflag, MDMBUF)) { 1441 /* 1442 * For DTR/DCD flow control, make sure we don't toggle DTR for 1443 * carrier detection. 1444 */ 1445 sc->sc_mcr_dtr = 0; 1446 sc->sc_mcr_rts = MCR_DTR; 1447 sc->sc_msr_cts = MSR_DCD; 1448 sc->sc_efr = 0; 1449 } else { 1450 /* 1451 * If no flow control, then always set RTS. This will make 1452 * the other side happy if it mistakenly thinks we're doing 1453 * RTS/CTS flow control. 1454 */ 1455 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1456 sc->sc_mcr_rts = 0; 1457 sc->sc_msr_cts = 0; 1458 sc->sc_efr = 0; 1459 if (ISSET(sc->sc_mcr, MCR_DTR)) 1460 SET(sc->sc_mcr, MCR_RTS); 1461 else 1462 CLR(sc->sc_mcr, MCR_RTS); 1463 } 1464 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1465 1466 #if 0 1467 if (ospeed == 0) 1468 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1469 else 1470 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1471 #endif 1472 1473 sc->sc_dlbl = ospeed; 1474 sc->sc_dlbh = ospeed >> 8; 1475 1476 /* 1477 * Set the FIFO threshold based on the receive speed. 1478 * 1479 * * If it's a low speed, it's probably a mouse or some other 1480 * interactive device, so set the threshold low. 1481 * * If it's a high speed, trim the trigger level down to prevent 1482 * overflows. 1483 * * Otherwise set it a bit higher. 1484 */ 1485 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1486 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1487 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1488 sc->sc_fifo = FIFO_ENABLE | 1489 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1490 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1491 else 1492 sc->sc_fifo = 0; 1493 1494 /* And copy to tty. */ 1495 tp->t_ispeed = 0; 1496 tp->t_ospeed = t->c_ospeed; 1497 tp->t_cflag = t->c_cflag; 1498 1499 if (!sc->sc_heldchange) { 1500 if (sc->sc_tx_busy) { 1501 sc->sc_heldtbc = sc->sc_tbc; 1502 sc->sc_tbc = 0; 1503 sc->sc_heldchange = 1; 1504 } else 1505 com_loadchannelregs(sc); 1506 } 1507 1508 if (!ISSET(t->c_cflag, CHWFLOW)) { 1509 /* Disable the high water mark. */ 1510 sc->sc_r_hiwat = 0; 1511 sc->sc_r_lowat = 0; 1512 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1513 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1514 com_schedrx(sc); 1515 } 1516 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1517 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1518 com_hwiflow(sc); 1519 } 1520 } else { 1521 sc->sc_r_hiwat = com_rbuf_hiwat; 1522 sc->sc_r_lowat = com_rbuf_lowat; 1523 } 1524 1525 COM_UNLOCK(sc); 1526 splx(s); 1527 1528 /* 1529 * Update the tty layer's idea of the carrier bit, in case we changed 1530 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1531 * explicit request. 1532 */ 1533 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1534 1535 #ifdef COM_DEBUG 1536 if (com_debug) 1537 comstatus(sc, "comparam "); 1538 #endif 1539 1540 if (!ISSET(t->c_cflag, CHWFLOW)) { 1541 if (sc->sc_tx_stopped) { 1542 sc->sc_tx_stopped = 0; 1543 comstart(tp); 1544 } 1545 } 1546 1547 return (0); 1548 } 1549 1550 void 1551 com_iflush(sc) 1552 struct com_softc *sc; 1553 { 1554 bus_space_tag_t iot = sc->sc_iot; 1555 bus_space_handle_t ioh = sc->sc_ioh; 1556 #ifdef DIAGNOSTIC 1557 int reg; 1558 #endif 1559 int timo; 1560 1561 #ifdef DIAGNOSTIC 1562 reg = 0xffff; 1563 #endif 1564 timo = 50000; 1565 /* flush any pending I/O */ 1566 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1567 && --timo) 1568 #ifdef DIAGNOSTIC 1569 reg = 1570 #else 1571 (void) 1572 #endif 1573 bus_space_read_1(iot, ioh, com_data); 1574 #ifdef DIAGNOSTIC 1575 if (!timo) 1576 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1577 reg); 1578 #endif 1579 } 1580 1581 void 1582 com_loadchannelregs(sc) 1583 struct com_softc *sc; 1584 { 1585 bus_space_tag_t iot = sc->sc_iot; 1586 bus_space_handle_t ioh = sc->sc_ioh; 1587 1588 /* XXXXX necessary? */ 1589 com_iflush(sc); 1590 1591 bus_space_write_1(iot, ioh, com_ier, 0); 1592 1593 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1594 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1595 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1596 } 1597 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1598 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1599 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1600 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1601 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1602 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1603 #ifdef COM_HAYESP 1604 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1605 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1606 HAYESP_SETPRESCALER); 1607 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1608 sc->sc_prescaler); 1609 } 1610 #endif 1611 1612 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1613 } 1614 1615 int 1616 comhwiflow(tp, block) 1617 struct tty *tp; 1618 int block; 1619 { 1620 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1621 int s; 1622 1623 if (COM_ISALIVE(sc) == 0) 1624 return (0); 1625 1626 if (sc->sc_mcr_rts == 0) 1627 return (0); 1628 1629 s = splserial(); 1630 COM_LOCK(sc); 1631 1632 if (block) { 1633 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1634 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1635 com_hwiflow(sc); 1636 } 1637 } else { 1638 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1639 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1640 com_schedrx(sc); 1641 } 1642 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1643 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1644 com_hwiflow(sc); 1645 } 1646 } 1647 1648 COM_UNLOCK(sc); 1649 splx(s); 1650 return (1); 1651 } 1652 1653 /* 1654 * (un)block input via hw flowcontrol 1655 */ 1656 void 1657 com_hwiflow(sc) 1658 struct com_softc *sc; 1659 { 1660 bus_space_tag_t iot = sc->sc_iot; 1661 bus_space_handle_t ioh = sc->sc_ioh; 1662 1663 if (sc->sc_mcr_rts == 0) 1664 return; 1665 1666 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1667 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1668 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1669 } else { 1670 SET(sc->sc_mcr, sc->sc_mcr_rts); 1671 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1672 } 1673 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1674 } 1675 1676 1677 void 1678 comstart(tp) 1679 struct tty *tp; 1680 { 1681 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1682 bus_space_tag_t iot = sc->sc_iot; 1683 bus_space_handle_t ioh = sc->sc_ioh; 1684 int s; 1685 1686 if (COM_ISALIVE(sc) == 0) 1687 return; 1688 1689 s = spltty(); 1690 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1691 goto out; 1692 if (sc->sc_tx_stopped) 1693 goto out; 1694 1695 if (tp->t_outq.c_cc <= tp->t_lowat) { 1696 if (ISSET(tp->t_state, TS_ASLEEP)) { 1697 CLR(tp->t_state, TS_ASLEEP); 1698 wakeup(&tp->t_outq); 1699 } 1700 selwakeup(&tp->t_wsel); 1701 if (tp->t_outq.c_cc == 0) 1702 goto out; 1703 } 1704 1705 /* Grab the first contiguous region of buffer space. */ 1706 { 1707 u_char *tba; 1708 int tbc; 1709 1710 tba = tp->t_outq.c_cf; 1711 tbc = ndqb(&tp->t_outq, 0); 1712 1713 (void)splserial(); 1714 COM_LOCK(sc); 1715 1716 sc->sc_tba = tba; 1717 sc->sc_tbc = tbc; 1718 } 1719 1720 SET(tp->t_state, TS_BUSY); 1721 sc->sc_tx_busy = 1; 1722 1723 /* Enable transmit completion interrupts if necessary. */ 1724 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1725 SET(sc->sc_ier, IER_ETXRDY); 1726 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1727 } 1728 1729 /* Output the first chunk of the contiguous buffer. */ 1730 { 1731 int n; 1732 1733 n = sc->sc_tbc; 1734 if (n > sc->sc_fifolen) 1735 n = sc->sc_fifolen; 1736 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1737 sc->sc_tbc -= n; 1738 sc->sc_tba += n; 1739 } 1740 COM_UNLOCK(sc); 1741 out: 1742 splx(s); 1743 return; 1744 } 1745 1746 /* 1747 * Stop output on a line. 1748 */ 1749 void 1750 comstop(tp, flag) 1751 struct tty *tp; 1752 int flag; 1753 { 1754 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1755 int s; 1756 1757 s = splserial(); 1758 COM_LOCK(sc); 1759 if (ISSET(tp->t_state, TS_BUSY)) { 1760 /* Stop transmitting at the next chunk. */ 1761 sc->sc_tbc = 0; 1762 sc->sc_heldtbc = 0; 1763 if (!ISSET(tp->t_state, TS_TTSTOP)) 1764 SET(tp->t_state, TS_FLUSH); 1765 } 1766 COM_UNLOCK(sc); 1767 splx(s); 1768 } 1769 1770 void 1771 comdiag(arg) 1772 void *arg; 1773 { 1774 struct com_softc *sc = arg; 1775 int overflows, floods; 1776 int s; 1777 1778 s = splserial(); 1779 COM_LOCK(sc); 1780 overflows = sc->sc_overflows; 1781 sc->sc_overflows = 0; 1782 floods = sc->sc_floods; 1783 sc->sc_floods = 0; 1784 sc->sc_errors = 0; 1785 COM_UNLOCK(sc); 1786 splx(s); 1787 1788 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1789 sc->sc_dev.dv_xname, 1790 overflows, overflows == 1 ? "" : "s", 1791 floods, floods == 1 ? "" : "s"); 1792 } 1793 1794 integrate void 1795 com_rxsoft(sc, tp) 1796 struct com_softc *sc; 1797 struct tty *tp; 1798 { 1799 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1800 u_char *get, *end; 1801 u_int cc, scc; 1802 u_char lsr; 1803 int code; 1804 int s; 1805 1806 end = sc->sc_ebuf; 1807 get = sc->sc_rbget; 1808 scc = cc = com_rbuf_size - sc->sc_rbavail; 1809 1810 if (cc == com_rbuf_size) { 1811 sc->sc_floods++; 1812 if (sc->sc_errors++ == 0) 1813 callout_reset(&sc->sc_diag_callout, 60 * hz, 1814 comdiag, sc); 1815 } 1816 1817 while (cc) { 1818 code = get[0]; 1819 lsr = get[1]; 1820 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1821 if (ISSET(lsr, LSR_OE)) { 1822 sc->sc_overflows++; 1823 if (sc->sc_errors++ == 0) 1824 callout_reset(&sc->sc_diag_callout, 1825 60 * hz, comdiag, sc); 1826 } 1827 if (ISSET(lsr, LSR_BI | LSR_FE)) 1828 SET(code, TTY_FE); 1829 if (ISSET(lsr, LSR_PE)) 1830 SET(code, TTY_PE); 1831 } 1832 if ((*rint)(code, tp) == -1) { 1833 /* 1834 * The line discipline's buffer is out of space. 1835 */ 1836 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1837 /* 1838 * We're either not using flow control, or the 1839 * line discipline didn't tell us to block for 1840 * some reason. Either way, we have no way to 1841 * know when there's more space available, so 1842 * just drop the rest of the data. 1843 */ 1844 get += cc << 1; 1845 if (get >= end) 1846 get -= com_rbuf_size << 1; 1847 cc = 0; 1848 } else { 1849 /* 1850 * Don't schedule any more receive processing 1851 * until the line discipline tells us there's 1852 * space available (through comhwiflow()). 1853 * Leave the rest of the data in the input 1854 * buffer. 1855 */ 1856 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1857 } 1858 break; 1859 } 1860 get += 2; 1861 if (get >= end) 1862 get = sc->sc_rbuf; 1863 cc--; 1864 } 1865 1866 if (cc != scc) { 1867 sc->sc_rbget = get; 1868 s = splserial(); 1869 COM_LOCK(sc); 1870 1871 cc = sc->sc_rbavail += scc - cc; 1872 /* Buffers should be ok again, release possible block. */ 1873 if (cc >= sc->sc_r_lowat) { 1874 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1875 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1876 SET(sc->sc_ier, IER_ERXRDY); 1877 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1878 } 1879 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1880 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1881 com_hwiflow(sc); 1882 } 1883 } 1884 COM_UNLOCK(sc); 1885 splx(s); 1886 } 1887 } 1888 1889 integrate void 1890 com_txsoft(sc, tp) 1891 struct com_softc *sc; 1892 struct tty *tp; 1893 { 1894 1895 CLR(tp->t_state, TS_BUSY); 1896 if (ISSET(tp->t_state, TS_FLUSH)) 1897 CLR(tp->t_state, TS_FLUSH); 1898 else 1899 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1900 (*tp->t_linesw->l_start)(tp); 1901 } 1902 1903 integrate void 1904 com_stsoft(sc, tp) 1905 struct com_softc *sc; 1906 struct tty *tp; 1907 { 1908 u_char msr, delta; 1909 int s; 1910 1911 s = splserial(); 1912 COM_LOCK(sc); 1913 msr = sc->sc_msr; 1914 delta = sc->sc_msr_delta; 1915 sc->sc_msr_delta = 0; 1916 COM_UNLOCK(sc); 1917 splx(s); 1918 1919 if (ISSET(delta, sc->sc_msr_dcd)) { 1920 /* 1921 * Inform the tty layer that carrier detect changed. 1922 */ 1923 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1924 } 1925 1926 if (ISSET(delta, sc->sc_msr_cts)) { 1927 /* Block or unblock output according to flow control. */ 1928 if (ISSET(msr, sc->sc_msr_cts)) { 1929 sc->sc_tx_stopped = 0; 1930 (*tp->t_linesw->l_start)(tp); 1931 } else { 1932 sc->sc_tx_stopped = 1; 1933 } 1934 } 1935 1936 #ifdef COM_DEBUG 1937 if (com_debug) 1938 comstatus(sc, "com_stsoft"); 1939 #endif 1940 } 1941 1942 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1943 void 1944 comsoft(arg) 1945 void *arg; 1946 { 1947 struct com_softc *sc = arg; 1948 struct tty *tp; 1949 1950 if (COM_ISALIVE(sc) == 0) 1951 return; 1952 1953 { 1954 #else 1955 void 1956 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1957 comsoft() 1958 #else 1959 comsoft(arg) 1960 void *arg; 1961 #endif 1962 { 1963 struct com_softc *sc; 1964 struct tty *tp; 1965 int unit; 1966 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1967 int s; 1968 1969 s = splsoftserial(); 1970 com_softintr_scheduled = 0; 1971 #endif 1972 1973 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1974 sc = device_lookup(&com_cd, unit); 1975 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1976 continue; 1977 1978 if (COM_ISALIVE(sc) == 0) 1979 continue; 1980 1981 tp = sc->sc_tty; 1982 if (tp == NULL) 1983 continue; 1984 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1985 continue; 1986 #endif 1987 tp = sc->sc_tty; 1988 1989 if (sc->sc_rx_ready) { 1990 sc->sc_rx_ready = 0; 1991 com_rxsoft(sc, tp); 1992 } 1993 1994 if (sc->sc_st_check) { 1995 sc->sc_st_check = 0; 1996 com_stsoft(sc, tp); 1997 } 1998 1999 if (sc->sc_tx_done) { 2000 sc->sc_tx_done = 0; 2001 com_txsoft(sc, tp); 2002 } 2003 } 2004 2005 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2006 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2007 splx(s); 2008 #endif 2009 #endif 2010 } 2011 2012 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2013 /* there has got to be a better way to do comsoft() */ 2014 }} 2015 #endif 2016 2017 int 2018 comintr(arg) 2019 void *arg; 2020 { 2021 struct com_softc *sc = arg; 2022 bus_space_tag_t iot = sc->sc_iot; 2023 bus_space_handle_t ioh = sc->sc_ioh; 2024 u_char *put, *end; 2025 u_int cc; 2026 u_char lsr, iir; 2027 2028 if (COM_ISALIVE(sc) == 0) 2029 return (0); 2030 2031 COM_LOCK(sc); 2032 iir = bus_space_read_1(iot, ioh, com_iir); 2033 if (ISSET(iir, IIR_NOPEND)) { 2034 COM_UNLOCK(sc); 2035 return (0); 2036 } 2037 2038 end = sc->sc_ebuf; 2039 put = sc->sc_rbput; 2040 cc = sc->sc_rbavail; 2041 2042 again: do { 2043 u_char msr, delta; 2044 2045 lsr = bus_space_read_1(iot, ioh, com_lsr); 2046 if (ISSET(lsr, LSR_BI)) { 2047 int cn_trapped = 0; 2048 cn_check_magic(sc->sc_tty->t_dev, 2049 CNC_BREAK, com_cnm_state); 2050 if (cn_trapped) 2051 continue; 2052 #if defined(KGDB) 2053 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2054 kgdb_connect(1); 2055 continue; 2056 } 2057 #endif 2058 } 2059 2060 if (ISSET(lsr, LSR_RCV_MASK) && 2061 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2062 while (cc > 0) { 2063 int cn_trapped = 0; 2064 put[0] = bus_space_read_1(iot, ioh, com_data); 2065 put[1] = lsr; 2066 cn_check_magic(sc->sc_tty->t_dev, 2067 put[0], com_cnm_state); 2068 if (cn_trapped) { 2069 lsr = bus_space_read_1(iot, ioh, com_lsr); 2070 if (!ISSET(lsr, LSR_RCV_MASK)) 2071 break; 2072 2073 continue; 2074 } 2075 put += 2; 2076 if (put >= end) 2077 put = sc->sc_rbuf; 2078 cc--; 2079 2080 lsr = bus_space_read_1(iot, ioh, com_lsr); 2081 if (!ISSET(lsr, LSR_RCV_MASK)) 2082 break; 2083 } 2084 2085 /* 2086 * Current string of incoming characters ended because 2087 * no more data was available or we ran out of space. 2088 * Schedule a receive event if any data was received. 2089 * If we're out of space, turn off receive interrupts. 2090 */ 2091 sc->sc_rbput = put; 2092 sc->sc_rbavail = cc; 2093 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2094 sc->sc_rx_ready = 1; 2095 2096 /* 2097 * See if we are in danger of overflowing a buffer. If 2098 * so, use hardware flow control to ease the pressure. 2099 */ 2100 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2101 cc < sc->sc_r_hiwat) { 2102 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2103 com_hwiflow(sc); 2104 } 2105 2106 /* 2107 * If we're out of space, disable receive interrupts 2108 * until the queue has drained a bit. 2109 */ 2110 if (!cc) { 2111 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2112 CLR(sc->sc_ier, IER_ERXRDY); 2113 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2114 } 2115 } else { 2116 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2117 bus_space_write_1(iot, ioh, com_ier, 0); 2118 delay(10); 2119 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2120 continue; 2121 } 2122 } 2123 2124 msr = bus_space_read_1(iot, ioh, com_msr); 2125 delta = msr ^ sc->sc_msr; 2126 sc->sc_msr = msr; 2127 /* 2128 * Pulse-per-second (PSS) signals on edge of DCD? 2129 * Process these even if line discipline is ignoring DCD. 2130 */ 2131 if (delta & sc->sc_ppsmask) { 2132 struct timeval tv; 2133 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2134 /* XXX nanotime() */ 2135 microtime(&tv); 2136 TIMEVAL_TO_TIMESPEC(&tv, 2137 &sc->ppsinfo.assert_timestamp); 2138 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2139 timespecadd(&sc->ppsinfo.assert_timestamp, 2140 &sc->ppsparam.assert_offset, 2141 &sc->ppsinfo.assert_timestamp); 2142 } 2143 2144 #ifdef PPS_SYNC 2145 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2146 hardpps(&tv, tv.tv_usec); 2147 #endif 2148 sc->ppsinfo.assert_sequence++; 2149 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2150 2151 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2152 /* XXX nanotime() */ 2153 microtime(&tv); 2154 TIMEVAL_TO_TIMESPEC(&tv, 2155 &sc->ppsinfo.clear_timestamp); 2156 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2157 timespecadd(&sc->ppsinfo.clear_timestamp, 2158 &sc->ppsparam.clear_offset, 2159 &sc->ppsinfo.clear_timestamp); 2160 } 2161 2162 #ifdef PPS_SYNC 2163 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2164 hardpps(&tv, tv.tv_usec); 2165 #endif 2166 sc->ppsinfo.clear_sequence++; 2167 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2168 } 2169 } 2170 2171 /* 2172 * Process normal status changes 2173 */ 2174 if (ISSET(delta, sc->sc_msr_mask)) { 2175 SET(sc->sc_msr_delta, delta); 2176 2177 /* 2178 * Stop output immediately if we lose the output 2179 * flow control signal or carrier detect. 2180 */ 2181 if (ISSET(~msr, sc->sc_msr_mask)) { 2182 sc->sc_tbc = 0; 2183 sc->sc_heldtbc = 0; 2184 #ifdef COM_DEBUG 2185 if (com_debug) 2186 comstatus(sc, "comintr "); 2187 #endif 2188 } 2189 2190 sc->sc_st_check = 1; 2191 } 2192 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2193 || ((iir & IIR_IMASK) == 0)); 2194 2195 /* 2196 * Done handling any receive interrupts. See if data can be 2197 * transmitted as well. Schedule tx done event if no data left 2198 * and tty was marked busy. 2199 */ 2200 if (ISSET(lsr, LSR_TXRDY)) { 2201 /* 2202 * If we've delayed a parameter change, do it now, and restart 2203 * output. 2204 */ 2205 if (sc->sc_heldchange) { 2206 com_loadchannelregs(sc); 2207 sc->sc_heldchange = 0; 2208 sc->sc_tbc = sc->sc_heldtbc; 2209 sc->sc_heldtbc = 0; 2210 } 2211 2212 /* Output the next chunk of the contiguous buffer, if any. */ 2213 if (sc->sc_tbc > 0) { 2214 int n; 2215 2216 n = sc->sc_tbc; 2217 if (n > sc->sc_fifolen) 2218 n = sc->sc_fifolen; 2219 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2220 sc->sc_tbc -= n; 2221 sc->sc_tba += n; 2222 } else { 2223 /* Disable transmit completion interrupts if necessary. */ 2224 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2225 CLR(sc->sc_ier, IER_ETXRDY); 2226 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2227 } 2228 if (sc->sc_tx_busy) { 2229 sc->sc_tx_busy = 0; 2230 sc->sc_tx_done = 1; 2231 } 2232 } 2233 } 2234 2235 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2236 goto again; 2237 2238 COM_UNLOCK(sc); 2239 2240 /* Wake up the poller. */ 2241 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2242 softintr_schedule(sc->sc_si); 2243 #else 2244 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2245 setsoftserial(); 2246 #else 2247 if (!com_softintr_scheduled) { 2248 com_softintr_scheduled = 1; 2249 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2250 } 2251 #endif 2252 #endif 2253 2254 #if NRND > 0 && defined(RND_COM) 2255 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2256 #endif 2257 2258 return (1); 2259 } 2260 2261 /* 2262 * The following functions are polled getc and putc routines, shared 2263 * by the console and kgdb glue. 2264 * 2265 * The read-ahead code is so that you can detect pending in-band 2266 * cn_magic in polled mode while doing output rather than having to 2267 * wait until the kernel decides it needs input. 2268 */ 2269 2270 #define MAX_READAHEAD 20 2271 static int com_readahead[MAX_READAHEAD]; 2272 static int com_readaheadcount = 0; 2273 2274 int 2275 com_common_getc(dev, iot, ioh) 2276 dev_t dev; 2277 bus_space_tag_t iot; 2278 bus_space_handle_t ioh; 2279 { 2280 int s = splserial(); 2281 u_char stat, c; 2282 2283 /* got a character from reading things earlier */ 2284 if (com_readaheadcount > 0) { 2285 int i; 2286 2287 c = com_readahead[0]; 2288 for (i = 1; i < com_readaheadcount; i++) { 2289 com_readahead[i-1] = com_readahead[i]; 2290 } 2291 com_readaheadcount--; 2292 splx(s); 2293 return (c); 2294 } 2295 2296 /* block until a character becomes available */ 2297 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2298 ; 2299 2300 c = bus_space_read_1(iot, ioh, com_data); 2301 stat = bus_space_read_1(iot, ioh, com_iir); 2302 { 2303 int cn_trapped = 0; /* unused */ 2304 #ifdef DDB 2305 extern int db_active; 2306 if (!db_active) 2307 #endif 2308 cn_check_magic(dev, c, com_cnm_state); 2309 } 2310 splx(s); 2311 return (c); 2312 } 2313 2314 void 2315 com_common_putc(dev, iot, ioh, c) 2316 dev_t dev; 2317 bus_space_tag_t iot; 2318 bus_space_handle_t ioh; 2319 int c; 2320 { 2321 int s = splserial(); 2322 int timo; 2323 2324 int cin, stat; 2325 if (com_readaheadcount < MAX_READAHEAD 2326 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2327 int cn_trapped = 0; 2328 cin = bus_space_read_1(iot, ioh, com_data); 2329 stat = bus_space_read_1(iot, ioh, com_iir); 2330 cn_check_magic(dev, cin, com_cnm_state); 2331 com_readahead[com_readaheadcount++] = cin; 2332 } 2333 2334 /* wait for any pending transmission to finish */ 2335 timo = 150000; 2336 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2337 continue; 2338 2339 bus_space_write_1(iot, ioh, com_data, c); 2340 COM_BARRIER(iot, ioh, BR | BW); 2341 2342 /* wait for this transmission to complete */ 2343 timo = 1500000; 2344 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2345 continue; 2346 2347 splx(s); 2348 } 2349 2350 /* 2351 * Initialize UART for use as console or KGDB line. 2352 */ 2353 int 2354 cominit(iot, iobase, rate, frequency, cflag, iohp) 2355 bus_space_tag_t iot; 2356 bus_addr_t iobase; 2357 int rate, frequency; 2358 tcflag_t cflag; 2359 bus_space_handle_t *iohp; 2360 { 2361 bus_space_handle_t ioh; 2362 2363 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2364 return (ENOMEM); /* ??? */ 2365 2366 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2367 bus_space_write_1(iot, ioh, com_efr, 0); 2368 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2369 rate = comspeed(rate, frequency); 2370 bus_space_write_1(iot, ioh, com_dlbl, rate); 2371 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2372 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2373 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2374 bus_space_write_1(iot, ioh, com_fifo, 2375 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2376 bus_space_write_1(iot, ioh, com_ier, 0); 2377 2378 *iohp = ioh; 2379 return (0); 2380 } 2381 2382 /* 2383 * Following are all routines needed for COM to act as console 2384 */ 2385 struct consdev comcons = { 2386 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2387 NODEV, CN_NORMAL 2388 }; 2389 2390 2391 int 2392 comcnattach(iot, iobase, rate, frequency, cflag) 2393 bus_space_tag_t iot; 2394 bus_addr_t iobase; 2395 int rate, frequency; 2396 tcflag_t cflag; 2397 { 2398 int res; 2399 2400 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2401 if (res) 2402 return (res); 2403 2404 cn_tab = &comcons; 2405 cn_init_magic(&com_cnm_state); 2406 cn_set_magic("\047\001"); /* default magic is BREAK */ 2407 2408 comconstag = iot; 2409 comconsaddr = iobase; 2410 comconsrate = rate; 2411 comconscflag = cflag; 2412 2413 return (0); 2414 } 2415 2416 int 2417 comcngetc(dev) 2418 dev_t dev; 2419 { 2420 return (com_common_getc(dev, comconstag, comconsioh)); 2421 } 2422 2423 /* 2424 * Console kernel output character routine. 2425 */ 2426 void 2427 comcnputc(dev, c) 2428 dev_t dev; 2429 int c; 2430 { 2431 com_common_putc(dev, comconstag, comconsioh, c); 2432 } 2433 2434 void 2435 comcnpollc(dev, on) 2436 dev_t dev; 2437 int on; 2438 { 2439 2440 } 2441 2442 #ifdef KGDB 2443 int 2444 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2445 bus_space_tag_t iot; 2446 bus_addr_t iobase; 2447 int rate, frequency; 2448 tcflag_t cflag; 2449 { 2450 int res; 2451 2452 if (iot == comconstag && iobase == comconsaddr) 2453 return (EBUSY); /* cannot share with console */ 2454 2455 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2456 if (res) 2457 return (res); 2458 2459 /* 2460 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2461 * expects this to be initialized 2462 */ 2463 cn_init_magic(&com_cnm_state); 2464 cn_set_magic("\047\001"); 2465 2466 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2467 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2468 2469 com_kgdb_iot = iot; 2470 com_kgdb_addr = iobase; 2471 2472 return (0); 2473 } 2474 2475 /* ARGSUSED */ 2476 int 2477 com_kgdb_getc(arg) 2478 void *arg; 2479 { 2480 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2481 } 2482 2483 /* ARGSUSED */ 2484 void 2485 com_kgdb_putc(arg, c) 2486 void *arg; 2487 int c; 2488 { 2489 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2490 } 2491 #endif /* KGDB */ 2492 2493 /* helper function to identify the com ports used by 2494 console or KGDB (and not yet autoconf attached) */ 2495 int 2496 com_is_console(iot, iobase, ioh) 2497 bus_space_tag_t iot; 2498 bus_addr_t iobase; 2499 bus_space_handle_t *ioh; 2500 { 2501 bus_space_handle_t help; 2502 2503 if (!comconsattached && 2504 iot == comconstag && iobase == comconsaddr) 2505 help = comconsioh; 2506 #ifdef KGDB 2507 else if (!com_kgdb_attached && 2508 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2509 help = com_kgdb_ioh; 2510 #endif 2511 else 2512 return (0); 2513 2514 if (ioh) 2515 *ioh = help; 2516 return (1); 2517 } 2518
Indexes created Tue Sep 23 01:09:51 GMT 2025