com.c revision 1.192
1 /* $NetBSD: com.c,v 1.192 2001/11/15 09:48:06 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.192 2001/11/15 09:48:06 lukem Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_ddbparam.h" 85 #include "opt_kgdb.h" 86 87 #include "rnd.h" 88 #if NRND > 0 && defined(RND_COM) 89 #include <sys/rnd.h> 90 #endif 91 92 /* 93 * Override cnmagic(9) macro before including <sys/systm.h>. 94 * We need to know if cn_check_magic triggered debugger, so set a flag. 95 * Callers of cn_check_magic must declare int cn_trapped = 0; 96 * XXX: this is *ugly*! 97 */ 98 #define cn_trap() \ 99 do { \ 100 console_debugger(); \ 101 cn_trapped = 1; \ 102 } while (/* CONSTCOND */ 0) 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/ioctl.h> 107 #include <sys/select.h> 108 #include <sys/tty.h> 109 #include <sys/proc.h> 110 #include <sys/user.h> 111 #include <sys/conf.h> 112 #include <sys/file.h> 113 #include <sys/uio.h> 114 #include <sys/kernel.h> 115 #include <sys/syslog.h> 116 #include <sys/device.h> 117 #include <sys/malloc.h> 118 #include <sys/timepps.h> 119 #include <sys/vnode.h> 120 121 #include <machine/intr.h> 122 #include <machine/bus.h> 123 124 #include <dev/ic/comreg.h> 125 #include <dev/ic/comvar.h> 126 #include <dev/ic/ns16550reg.h> 127 #include <dev/ic/st16650reg.h> 128 #ifdef COM_HAYESP 129 #include <dev/ic/hayespreg.h> 130 #endif 131 #define com_lcr com_cfcr 132 #include <dev/cons.h> 133 134 #ifdef COM_HAYESP 135 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 136 #endif 137 138 static void com_enable_debugport __P((struct com_softc *)); 139 140 void com_config __P((struct com_softc *)); 141 void com_shutdown __P((struct com_softc *)); 142 int comspeed __P((long, long)); 143 static u_char cflag2lcr __P((tcflag_t)); 144 int comparam __P((struct tty *, struct termios *)); 145 void comstart __P((struct tty *)); 146 int comhwiflow __P((struct tty *, int)); 147 148 void com_loadchannelregs __P((struct com_softc *)); 149 void com_hwiflow __P((struct com_softc *)); 150 void com_break __P((struct com_softc *, int)); 151 void com_modem __P((struct com_softc *, int)); 152 void tiocm_to_com __P((struct com_softc *, u_long, int)); 153 int com_to_tiocm __P((struct com_softc *)); 154 void com_iflush __P((struct com_softc *)); 155 156 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 157 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 158 159 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 160 bus_space_handle_t *)); 161 162 /* XXX: This belongs elsewhere */ 163 cdev_decl(com); 164 165 int comcngetc __P((dev_t)); 166 void comcnputc __P((dev_t, int)); 167 void comcnpollc __P((dev_t, int)); 168 169 #define integrate static inline 170 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 171 void comsoft __P((void *)); 172 #else 173 #ifndef __NO_SOFT_SERIAL_INTERRUPT 174 void comsoft __P((void)); 175 #else 176 void comsoft __P((void *)); 177 struct callout comsoft_callout = CALLOUT_INITIALIZER; 178 #endif 179 #endif 180 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 183 integrate void com_schedrx __P((struct com_softc *)); 184 void comdiag __P((void *)); 185 186 extern struct cfdriver com_cd; 187 188 /* 189 * Make this an option variable one can patch. 190 * But be warned: this must be a power of 2! 191 */ 192 u_int com_rbuf_size = COM_RING_SIZE; 193 194 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 195 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 196 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 197 198 static bus_addr_t comconsaddr; 199 static bus_space_tag_t comconstag; 200 static bus_space_handle_t comconsioh; 201 static int comconsattached; 202 static int comconsrate; 203 static tcflag_t comconscflag; 204 static struct cnm_state com_cnm_state; 205 206 static int ppscap = 207 PPS_TSFMT_TSPEC | 208 PPS_CAPTUREASSERT | 209 PPS_CAPTURECLEAR | 210 #ifdef PPS_SYNC 211 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 212 #endif /* PPS_SYNC */ 213 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 214 215 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 216 #ifdef __NO_SOFT_SERIAL_INTERRUPT 217 volatile int com_softintr_scheduled; 218 #endif 219 #endif 220 221 #ifdef KGDB 222 #include <sys/kgdb.h> 223 224 static bus_addr_t com_kgdb_addr; 225 static bus_space_tag_t com_kgdb_iot; 226 static bus_space_handle_t com_kgdb_ioh; 227 static int com_kgdb_attached; 228 229 int com_kgdb_getc __P((void *)); 230 void com_kgdb_putc __P((void *, int)); 231 #endif /* KGDB */ 232 233 #define COMUNIT_MASK 0x7ffff 234 #define COMDIALOUT_MASK 0x80000 235 236 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 237 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 238 239 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 240 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 241 242 #define BR BUS_SPACE_BARRIER_READ 243 #define BW BUS_SPACE_BARRIER_WRITE 244 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 245 246 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 247 248 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 249 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 250 251 #else 252 253 #define COM_LOCK(sc) 254 #define COM_UNLOCK(sc) 255 256 #endif 257 258 int 259 comspeed(speed, frequency) 260 long speed, frequency; 261 { 262 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 263 264 int x, err; 265 266 #if 0 267 if (speed == 0) 268 return (0); 269 #endif 270 if (speed <= 0) 271 return (-1); 272 x = divrnd(frequency / 16, speed); 273 if (x <= 0) 274 return (-1); 275 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 276 if (err < 0) 277 err = -err; 278 if (err > COM_TOLERANCE) 279 return (-1); 280 return (x); 281 282 #undef divrnd 283 } 284 285 #ifdef COM_DEBUG 286 int com_debug = 0; 287 288 void comstatus __P((struct com_softc *, char *)); 289 void 290 comstatus(sc, str) 291 struct com_softc *sc; 292 char *str; 293 { 294 struct tty *tp = sc->sc_tty; 295 296 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 297 sc->sc_dev.dv_xname, str, 298 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 299 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 300 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 301 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 302 sc->sc_tx_stopped ? "+" : "-"); 303 304 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 305 sc->sc_dev.dv_xname, str, 306 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 307 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 308 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 309 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 310 sc->sc_rx_flags); 311 } 312 #endif 313 314 int 315 comprobe1(iot, ioh) 316 bus_space_tag_t iot; 317 bus_space_handle_t ioh; 318 { 319 320 /* force access to id reg */ 321 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 322 bus_space_write_1(iot, ioh, com_iir, 0); 323 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 324 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 325 return (0); 326 327 return (1); 328 } 329 330 #ifdef COM_HAYESP 331 int 332 comprobeHAYESP(hayespioh, sc) 333 bus_space_handle_t hayespioh; 334 struct com_softc *sc; 335 { 336 char val, dips; 337 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 338 bus_space_tag_t iot = sc->sc_iot; 339 340 /* 341 * Hayes ESP cards have two iobases. One is for compatibility with 342 * 16550 serial chips, and at the same ISA PC base addresses. The 343 * other is for ESP-specific enhanced features, and lies at a 344 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 345 */ 346 347 /* Test for ESP signature */ 348 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 349 return (0); 350 351 /* 352 * ESP is present at ESP enhanced base address; unknown com port 353 */ 354 355 /* Get the dip-switch configurations */ 356 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 357 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 358 359 /* Determine which com port this ESP card services: bits 0,1 of */ 360 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 361 if (sc->sc_iobase != combaselist[dips & 0x03]) 362 return (0); 363 364 printf(": ESP"); 365 366 /* Check ESP Self Test bits. */ 367 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 368 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 370 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 371 if ((val & 0x70) < 0x20) { 372 printf("-old (%o)", val & 0x70); 373 /* we do not support the necessary features */ 374 return (0); 375 } 376 377 /* Check for ability to emulate 16550: bit 8 == 1 */ 378 if ((dips & 0x80) == 0) { 379 printf(" slave"); 380 /* XXX Does slave really mean no 16550 support?? */ 381 return (0); 382 } 383 384 /* 385 * If we made it this far, we are a full-featured ESP v2.0 (or 386 * better), at the correct com port address. 387 */ 388 389 SET(sc->sc_hwflags, COM_HW_HAYESP); 390 printf(", 1024 byte fifo\n"); 391 return (1); 392 } 393 #endif 394 395 static void 396 com_enable_debugport(sc) 397 struct com_softc *sc; 398 { 399 int s; 400 401 /* Turn on line break interrupt, set carrier. */ 402 s = splserial(); 403 COM_LOCK(sc); 404 sc->sc_ier = IER_ERXRDY; 405 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 406 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 407 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 408 COM_UNLOCK(sc); 409 splx(s); 410 } 411 412 void 413 com_attach_subr(sc) 414 struct com_softc *sc; 415 { 416 bus_addr_t iobase = sc->sc_iobase; 417 bus_space_tag_t iot = sc->sc_iot; 418 bus_space_handle_t ioh = sc->sc_ioh; 419 struct tty *tp; 420 #ifdef COM16650 421 u_int8_t lcr; 422 #endif 423 #ifdef COM_HAYESP 424 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 425 int *hayespp; 426 #endif 427 428 callout_init(&sc->sc_diag_callout); 429 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 430 simple_lock_init(&sc->sc_lock); 431 #endif 432 433 /* Disable interrupts before configuring the device. */ 434 sc->sc_ier = 0; 435 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 436 437 if (iot == comconstag && iobase == comconsaddr) { 438 comconsattached = 1; 439 440 /* Make sure the console is always "hardwired". */ 441 delay(1000); /* wait for output to finish */ 442 SET(sc->sc_hwflags, COM_HW_CONSOLE); 443 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 444 } 445 446 #ifdef COM_HAYESP 447 sc->sc_prescaler = 0; /* set prescaler to x1. */ 448 449 /* Look for a Hayes ESP board. */ 450 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 451 bus_space_handle_t hayespioh; 452 453 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 454 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 455 continue; 456 if (comprobeHAYESP(hayespioh, sc)) { 457 sc->sc_hayespioh = hayespioh; 458 sc->sc_fifolen = 1024; 459 460 break; 461 } 462 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 463 } 464 /* No ESP; look for other things. */ 465 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 466 #endif 467 sc->sc_fifolen = 1; 468 /* look for a NS 16550AF UART with FIFOs */ 469 bus_space_write_1(iot, ioh, com_fifo, 470 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 471 delay(100); 472 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 473 == IIR_FIFO_MASK) 474 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 475 == FIFO_TRIGGER_14) { 476 SET(sc->sc_hwflags, COM_HW_FIFO); 477 478 #ifdef COM16650 479 /* 480 * IIR changes into the EFR if LCR is set to LCR_EERS 481 * on 16650s. We also know IIR != 0 at this point. 482 * Write 0 into the EFR, and read it. If the result 483 * is 0, we have a 16650. 484 * 485 * Older 16650s were broken; the test to detect them 486 * is taken from the Linux driver. Apparently 487 * setting DLAB enable gives access to the EFR on 488 * these chips. 489 */ 490 lcr = bus_space_read_1(iot, ioh, com_lcr); 491 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 492 bus_space_write_1(iot, ioh, com_efr, 0); 493 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 494 bus_space_write_1(iot, ioh, com_lcr, 495 lcr | LCR_DLAB); 496 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 497 CLR(sc->sc_hwflags, COM_HW_FIFO); 498 sc->sc_fifolen = 0; 499 } else { 500 SET(sc->sc_hwflags, COM_HW_FLOW); 501 sc->sc_fifolen = 32; 502 } 503 } else 504 #endif 505 sc->sc_fifolen = 16; 506 507 #ifdef COM16650 508 bus_space_write_1(iot, ioh, com_lcr, lcr); 509 if (sc->sc_fifolen == 0) 510 printf(": st16650, broken fifo\n"); 511 else if (sc->sc_fifolen == 32) 512 printf(": st16650a, working fifo\n"); 513 else 514 #endif 515 printf(": ns16550a, working fifo\n"); 516 } else 517 printf(": ns16550, broken fifo\n"); 518 else 519 printf(": ns8250 or ns16450, no fifo\n"); 520 bus_space_write_1(iot, ioh, com_fifo, 0); 521 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 522 sc->sc_fifolen = 1; 523 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 524 } 525 #ifdef COM_HAYESP 526 } 527 #endif 528 529 tp = ttymalloc(); 530 tp->t_oproc = comstart; 531 tp->t_param = comparam; 532 tp->t_hwiflow = comhwiflow; 533 534 sc->sc_tty = tp; 535 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 536 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 537 sc->sc_rbavail = com_rbuf_size; 538 if (sc->sc_rbuf == NULL) { 539 printf("%s: unable to allocate ring buffer\n", 540 sc->sc_dev.dv_xname); 541 return; 542 } 543 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 544 545 tty_attach(tp); 546 547 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 548 SET(sc->sc_mcr, MCR_IENABLE); 549 550 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 551 int maj; 552 553 /* locate the major number */ 554 for (maj = 0; maj < nchrdev; maj++) 555 if (cdevsw[maj].d_open == comopen) 556 break; 557 558 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 559 560 printf("%s: console\n", sc->sc_dev.dv_xname); 561 } 562 563 #ifdef KGDB 564 /* 565 * Allow kgdb to "take over" this port. If this is 566 * the kgdb device, it has exclusive use. 567 */ 568 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 569 com_kgdb_attached = 1; 570 571 SET(sc->sc_hwflags, COM_HW_KGDB); 572 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 573 } 574 #endif 575 576 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 577 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 578 #endif 579 580 #if NRND > 0 && defined(RND_COM) 581 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 582 RND_TYPE_TTY, 0); 583 #endif 584 585 /* if there are no enable/disable functions, assume the device 586 is always enabled */ 587 if (!sc->enable) 588 sc->enabled = 1; 589 590 com_config(sc); 591 592 SET(sc->sc_hwflags, COM_HW_DEV_OK); 593 } 594 595 void 596 com_config(sc) 597 struct com_softc *sc; 598 { 599 bus_space_tag_t iot = sc->sc_iot; 600 bus_space_handle_t ioh = sc->sc_ioh; 601 602 /* Disable interrupts before configuring the device. */ 603 sc->sc_ier = 0; 604 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 605 606 #ifdef COM_HAYESP 607 /* Look for a Hayes ESP board. */ 608 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 609 sc->sc_fifolen = 1024; 610 611 /* Set 16550 compatibility mode */ 612 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 613 HAYESP_SETMODE); 614 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 615 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 616 HAYESP_MODE_SCALE); 617 618 /* Set RTS/CTS flow control */ 619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 620 HAYESP_SETFLOWTYPE); 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 622 HAYESP_FLOW_RTS); 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 624 HAYESP_FLOW_CTS); 625 626 /* Set flow control levels */ 627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 628 HAYESP_SETRXFLOW); 629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 630 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 632 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 634 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 636 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 637 } 638 #endif 639 640 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 641 com_enable_debugport(sc); 642 } 643 644 int 645 com_detach(self, flags) 646 struct device *self; 647 int flags; 648 { 649 struct com_softc *sc = (struct com_softc *)self; 650 int maj, mn; 651 652 /* locate the major number */ 653 for (maj = 0; maj < nchrdev; maj++) 654 if (cdevsw[maj].d_open == comopen) 655 break; 656 657 /* Nuke the vnodes for any open instances. */ 658 mn = self->dv_unit; 659 vdevgone(maj, mn, mn, VCHR); 660 661 mn |= COMDIALOUT_MASK; 662 vdevgone(maj, mn, mn, VCHR); 663 664 /* Free the receive buffer. */ 665 free(sc->sc_rbuf, M_DEVBUF); 666 667 /* Detach and free the tty. */ 668 tty_detach(sc->sc_tty); 669 ttyfree(sc->sc_tty); 670 671 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 672 /* Unhook the soft interrupt handler. */ 673 softintr_disestablish(sc->sc_si); 674 #endif 675 676 #if NRND > 0 && defined(RND_COM) 677 /* Unhook the entropy source. */ 678 rnd_detach_source(&sc->rnd_source); 679 #endif 680 681 return (0); 682 } 683 684 int 685 com_activate(self, act) 686 struct device *self; 687 enum devact act; 688 { 689 struct com_softc *sc = (struct com_softc *)self; 690 int s, rv = 0; 691 692 s = splserial(); 693 COM_LOCK(sc); 694 switch (act) { 695 case DVACT_ACTIVATE: 696 rv = EOPNOTSUPP; 697 break; 698 699 case DVACT_DEACTIVATE: 700 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 701 rv = EBUSY; 702 break; 703 } 704 705 if (sc->disable != NULL && sc->enabled != 0) { 706 (*sc->disable)(sc); 707 sc->enabled = 0; 708 } 709 break; 710 } 711 712 COM_UNLOCK(sc); 713 splx(s); 714 return (rv); 715 } 716 717 void 718 com_shutdown(sc) 719 struct com_softc *sc; 720 { 721 struct tty *tp = sc->sc_tty; 722 int s; 723 724 s = splserial(); 725 COM_LOCK(sc); 726 727 /* If we were asserting flow control, then deassert it. */ 728 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 729 com_hwiflow(sc); 730 731 /* Clear any break condition set with TIOCSBRK. */ 732 com_break(sc, 0); 733 734 /* Turn off PPS capture on last close. */ 735 sc->sc_ppsmask = 0; 736 sc->ppsparam.mode = 0; 737 738 /* 739 * Hang up if necessary. Wait a bit, so the other side has time to 740 * notice even if we immediately open the port again. 741 * Avoid tsleeping above splhigh(). 742 */ 743 if (ISSET(tp->t_cflag, HUPCL)) { 744 com_modem(sc, 0); 745 COM_UNLOCK(sc); 746 splx(s); 747 /* XXX tsleep will only timeout */ 748 (void) tsleep(sc, TTIPRI, ttclos, hz); 749 s = splserial(); 750 COM_LOCK(sc); 751 } 752 753 /* Turn off interrupts. */ 754 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 755 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 756 else 757 sc->sc_ier = 0; 758 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 759 760 if (sc->disable) { 761 #ifdef DIAGNOSTIC 762 if (!sc->enabled) 763 panic("com_shutdown: not enabled?"); 764 #endif 765 (*sc->disable)(sc); 766 sc->enabled = 0; 767 } 768 COM_UNLOCK(sc); 769 splx(s); 770 } 771 772 int 773 comopen(dev, flag, mode, p) 774 dev_t dev; 775 int flag, mode; 776 struct proc *p; 777 { 778 struct com_softc *sc; 779 struct tty *tp; 780 int s, s2; 781 int error; 782 783 sc = device_lookup(&com_cd, COMUNIT(dev)); 784 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 785 sc->sc_rbuf == NULL) 786 return (ENXIO); 787 788 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 789 return (ENXIO); 790 791 #ifdef KGDB 792 /* 793 * If this is the kgdb port, no other use is permitted. 794 */ 795 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 796 return (EBUSY); 797 #endif 798 799 tp = sc->sc_tty; 800 801 if (ISSET(tp->t_state, TS_ISOPEN) && 802 ISSET(tp->t_state, TS_XCLUDE) && 803 p->p_ucred->cr_uid != 0) 804 return (EBUSY); 805 806 s = spltty(); 807 808 /* 809 * Do the following iff this is a first open. 810 */ 811 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 812 struct termios t; 813 814 tp->t_dev = dev; 815 816 s2 = splserial(); 817 COM_LOCK(sc); 818 819 if (sc->enable) { 820 if ((*sc->enable)(sc)) { 821 COM_UNLOCK(sc); 822 splx(s2); 823 splx(s); 824 printf("%s: device enable failed\n", 825 sc->sc_dev.dv_xname); 826 return (EIO); 827 } 828 sc->enabled = 1; 829 com_config(sc); 830 } 831 832 /* Turn on interrupts. */ 833 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 834 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 835 836 /* Fetch the current modem control status, needed later. */ 837 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 838 839 /* Clear PPS capture state on first open. */ 840 sc->sc_ppsmask = 0; 841 sc->ppsparam.mode = 0; 842 843 COM_UNLOCK(sc); 844 splx(s2); 845 846 /* 847 * Initialize the termios status to the defaults. Add in the 848 * sticky bits from TIOCSFLAGS. 849 */ 850 t.c_ispeed = 0; 851 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 852 t.c_ospeed = comconsrate; 853 t.c_cflag = comconscflag; 854 } else { 855 t.c_ospeed = TTYDEF_SPEED; 856 t.c_cflag = TTYDEF_CFLAG; 857 } 858 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 859 SET(t.c_cflag, CLOCAL); 860 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 861 SET(t.c_cflag, CRTSCTS); 862 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 863 SET(t.c_cflag, MDMBUF); 864 /* Make sure comparam() will do something. */ 865 tp->t_ospeed = 0; 866 (void) comparam(tp, &t); 867 tp->t_iflag = TTYDEF_IFLAG; 868 tp->t_oflag = TTYDEF_OFLAG; 869 tp->t_lflag = TTYDEF_LFLAG; 870 ttychars(tp); 871 ttsetwater(tp); 872 873 s2 = splserial(); 874 COM_LOCK(sc); 875 876 /* 877 * Turn on DTR. We must always do this, even if carrier is not 878 * present, because otherwise we'd have to use TIOCSDTR 879 * immediately after setting CLOCAL, which applications do not 880 * expect. We always assert DTR while the device is open 881 * unless explicitly requested to deassert it. 882 */ 883 com_modem(sc, 1); 884 885 /* Clear the input ring, and unblock. */ 886 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 887 sc->sc_rbavail = com_rbuf_size; 888 com_iflush(sc); 889 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 890 com_hwiflow(sc); 891 892 #ifdef COM_DEBUG 893 if (com_debug) 894 comstatus(sc, "comopen "); 895 #endif 896 897 COM_UNLOCK(sc); 898 splx(s2); 899 } 900 901 splx(s); 902 903 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 904 if (error) 905 goto bad; 906 907 error = (*tp->t_linesw->l_open)(dev, tp); 908 if (error) 909 goto bad; 910 911 return (0); 912 913 bad: 914 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 915 /* 916 * We failed to open the device, and nobody else had it opened. 917 * Clean up the state as appropriate. 918 */ 919 com_shutdown(sc); 920 } 921 922 return (error); 923 } 924 925 int 926 comclose(dev, flag, mode, p) 927 dev_t dev; 928 int flag, mode; 929 struct proc *p; 930 { 931 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 932 struct tty *tp = sc->sc_tty; 933 934 /* XXX This is for cons.c. */ 935 if (!ISSET(tp->t_state, TS_ISOPEN)) 936 return (0); 937 938 (*tp->t_linesw->l_close)(tp, flag); 939 ttyclose(tp); 940 941 if (COM_ISALIVE(sc) == 0) 942 return (0); 943 944 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 945 /* 946 * Although we got a last close, the device may still be in 947 * use; e.g. if this was the dialout node, and there are still 948 * processes waiting for carrier on the non-dialout node. 949 */ 950 com_shutdown(sc); 951 } 952 953 return (0); 954 } 955 956 int 957 comread(dev, uio, flag) 958 dev_t dev; 959 struct uio *uio; 960 int flag; 961 { 962 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 963 struct tty *tp = sc->sc_tty; 964 965 if (COM_ISALIVE(sc) == 0) 966 return (EIO); 967 968 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 969 } 970 971 int 972 comwrite(dev, uio, flag) 973 dev_t dev; 974 struct uio *uio; 975 int flag; 976 { 977 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 978 struct tty *tp = sc->sc_tty; 979 980 if (COM_ISALIVE(sc) == 0) 981 return (EIO); 982 983 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 984 } 985 986 int 987 compoll(dev, events, p) 988 dev_t dev; 989 int events; 990 struct proc *p; 991 { 992 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 993 struct tty *tp = sc->sc_tty; 994 995 if (COM_ISALIVE(sc) == 0) 996 return (EIO); 997 998 return ((*tp->t_linesw->l_poll)(tp, events, p)); 999 } 1000 1001 struct tty * 1002 comtty(dev) 1003 dev_t dev; 1004 { 1005 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1006 struct tty *tp = sc->sc_tty; 1007 1008 return (tp); 1009 } 1010 1011 int 1012 comioctl(dev, cmd, data, flag, p) 1013 dev_t dev; 1014 u_long cmd; 1015 caddr_t data; 1016 int flag; 1017 struct proc *p; 1018 { 1019 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1020 struct tty *tp = sc->sc_tty; 1021 int error; 1022 int s; 1023 1024 if (COM_ISALIVE(sc) == 0) 1025 return (EIO); 1026 1027 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1028 if (error >= 0) 1029 return (error); 1030 1031 error = ttioctl(tp, cmd, data, flag, p); 1032 if (error >= 0) 1033 return (error); 1034 1035 error = 0; 1036 1037 s = splserial(); 1038 COM_LOCK(sc); 1039 1040 switch (cmd) { 1041 case TIOCSBRK: 1042 com_break(sc, 1); 1043 break; 1044 1045 case TIOCCBRK: 1046 com_break(sc, 0); 1047 break; 1048 1049 case TIOCSDTR: 1050 com_modem(sc, 1); 1051 break; 1052 1053 case TIOCCDTR: 1054 com_modem(sc, 0); 1055 break; 1056 1057 case TIOCGFLAGS: 1058 *(int *)data = sc->sc_swflags; 1059 break; 1060 1061 case TIOCSFLAGS: 1062 error = suser(p->p_ucred, &p->p_acflag); 1063 if (error) 1064 break; 1065 sc->sc_swflags = *(int *)data; 1066 break; 1067 1068 case TIOCMSET: 1069 case TIOCMBIS: 1070 case TIOCMBIC: 1071 tiocm_to_com(sc, cmd, *(int *)data); 1072 break; 1073 1074 case TIOCMGET: 1075 *(int *)data = com_to_tiocm(sc); 1076 break; 1077 1078 case PPS_IOC_CREATE: 1079 break; 1080 1081 case PPS_IOC_DESTROY: 1082 break; 1083 1084 case PPS_IOC_GETPARAMS: { 1085 pps_params_t *pp; 1086 pp = (pps_params_t *)data; 1087 *pp = sc->ppsparam; 1088 break; 1089 } 1090 1091 case PPS_IOC_SETPARAMS: { 1092 pps_params_t *pp; 1093 int mode; 1094 pp = (pps_params_t *)data; 1095 if (pp->mode & ~ppscap) { 1096 error = EINVAL; 1097 break; 1098 } 1099 sc->ppsparam = *pp; 1100 /* 1101 * Compute msr masks from user-specified timestamp state. 1102 */ 1103 mode = sc->ppsparam.mode; 1104 #ifdef PPS_SYNC 1105 if (mode & PPS_HARDPPSONASSERT) { 1106 mode |= PPS_CAPTUREASSERT; 1107 /* XXX revoke any previous HARDPPS source */ 1108 } 1109 if (mode & PPS_HARDPPSONCLEAR) { 1110 mode |= PPS_CAPTURECLEAR; 1111 /* XXX revoke any previous HARDPPS source */ 1112 } 1113 #endif /* PPS_SYNC */ 1114 switch (mode & PPS_CAPTUREBOTH) { 1115 case 0: 1116 sc->sc_ppsmask = 0; 1117 break; 1118 1119 case PPS_CAPTUREASSERT: 1120 sc->sc_ppsmask = MSR_DCD; 1121 sc->sc_ppsassert = MSR_DCD; 1122 sc->sc_ppsclear = -1; 1123 break; 1124 1125 case PPS_CAPTURECLEAR: 1126 sc->sc_ppsmask = MSR_DCD; 1127 sc->sc_ppsassert = -1; 1128 sc->sc_ppsclear = 0; 1129 break; 1130 1131 case PPS_CAPTUREBOTH: 1132 sc->sc_ppsmask = MSR_DCD; 1133 sc->sc_ppsassert = MSR_DCD; 1134 sc->sc_ppsclear = 0; 1135 break; 1136 1137 default: 1138 error = EINVAL; 1139 break; 1140 } 1141 break; 1142 } 1143 1144 case PPS_IOC_GETCAP: 1145 *(int*)data = ppscap; 1146 break; 1147 1148 case PPS_IOC_FETCH: { 1149 pps_info_t *pi; 1150 pi = (pps_info_t *)data; 1151 *pi = sc->ppsinfo; 1152 break; 1153 } 1154 1155 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1156 /* 1157 * Some GPS clocks models use the falling rather than 1158 * rising edge as the on-the-second signal. 1159 * The old API has no way to specify PPS polarity. 1160 */ 1161 sc->sc_ppsmask = MSR_DCD; 1162 #ifndef PPS_TRAILING_EDGE 1163 sc->sc_ppsassert = MSR_DCD; 1164 sc->sc_ppsclear = -1; 1165 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1166 &sc->ppsinfo.assert_timestamp); 1167 #else 1168 sc->sc_ppsassert = -1 1169 sc->sc_ppsclear = 0; 1170 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1171 &sc->ppsinfo.clear_timestamp); 1172 #endif 1173 break; 1174 1175 default: 1176 error = ENOTTY; 1177 break; 1178 } 1179 1180 COM_UNLOCK(sc); 1181 splx(s); 1182 1183 #ifdef COM_DEBUG 1184 if (com_debug) 1185 comstatus(sc, "comioctl "); 1186 #endif 1187 1188 return (error); 1189 } 1190 1191 integrate void 1192 com_schedrx(sc) 1193 struct com_softc *sc; 1194 { 1195 1196 sc->sc_rx_ready = 1; 1197 1198 /* Wake up the poller. */ 1199 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1200 softintr_schedule(sc->sc_si); 1201 #else 1202 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1203 setsoftserial(); 1204 #else 1205 if (!com_softintr_scheduled) { 1206 com_softintr_scheduled = 1; 1207 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1208 } 1209 #endif 1210 #endif 1211 } 1212 1213 void 1214 com_break(sc, onoff) 1215 struct com_softc *sc; 1216 int onoff; 1217 { 1218 1219 if (onoff) 1220 SET(sc->sc_lcr, LCR_SBREAK); 1221 else 1222 CLR(sc->sc_lcr, LCR_SBREAK); 1223 1224 if (!sc->sc_heldchange) { 1225 if (sc->sc_tx_busy) { 1226 sc->sc_heldtbc = sc->sc_tbc; 1227 sc->sc_tbc = 0; 1228 sc->sc_heldchange = 1; 1229 } else 1230 com_loadchannelregs(sc); 1231 } 1232 } 1233 1234 void 1235 com_modem(sc, onoff) 1236 struct com_softc *sc; 1237 int onoff; 1238 { 1239 1240 if (sc->sc_mcr_dtr == 0) 1241 return; 1242 1243 if (onoff) 1244 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1245 else 1246 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1247 1248 if (!sc->sc_heldchange) { 1249 if (sc->sc_tx_busy) { 1250 sc->sc_heldtbc = sc->sc_tbc; 1251 sc->sc_tbc = 0; 1252 sc->sc_heldchange = 1; 1253 } else 1254 com_loadchannelregs(sc); 1255 } 1256 } 1257 1258 void 1259 tiocm_to_com(sc, how, ttybits) 1260 struct com_softc *sc; 1261 u_long how; 1262 int ttybits; 1263 { 1264 u_char combits; 1265 1266 combits = 0; 1267 if (ISSET(ttybits, TIOCM_DTR)) 1268 SET(combits, MCR_DTR); 1269 if (ISSET(ttybits, TIOCM_RTS)) 1270 SET(combits, MCR_RTS); 1271 1272 switch (how) { 1273 case TIOCMBIC: 1274 CLR(sc->sc_mcr, combits); 1275 break; 1276 1277 case TIOCMBIS: 1278 SET(sc->sc_mcr, combits); 1279 break; 1280 1281 case TIOCMSET: 1282 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1283 SET(sc->sc_mcr, combits); 1284 break; 1285 } 1286 1287 if (!sc->sc_heldchange) { 1288 if (sc->sc_tx_busy) { 1289 sc->sc_heldtbc = sc->sc_tbc; 1290 sc->sc_tbc = 0; 1291 sc->sc_heldchange = 1; 1292 } else 1293 com_loadchannelregs(sc); 1294 } 1295 } 1296 1297 int 1298 com_to_tiocm(sc) 1299 struct com_softc *sc; 1300 { 1301 u_char combits; 1302 int ttybits = 0; 1303 1304 combits = sc->sc_mcr; 1305 if (ISSET(combits, MCR_DTR)) 1306 SET(ttybits, TIOCM_DTR); 1307 if (ISSET(combits, MCR_RTS)) 1308 SET(ttybits, TIOCM_RTS); 1309 1310 combits = sc->sc_msr; 1311 if (ISSET(combits, MSR_DCD)) 1312 SET(ttybits, TIOCM_CD); 1313 if (ISSET(combits, MSR_CTS)) 1314 SET(ttybits, TIOCM_CTS); 1315 if (ISSET(combits, MSR_DSR)) 1316 SET(ttybits, TIOCM_DSR); 1317 if (ISSET(combits, MSR_RI | MSR_TERI)) 1318 SET(ttybits, TIOCM_RI); 1319 1320 if (sc->sc_ier != 0) 1321 SET(ttybits, TIOCM_LE); 1322 1323 return (ttybits); 1324 } 1325 1326 static u_char 1327 cflag2lcr(cflag) 1328 tcflag_t cflag; 1329 { 1330 u_char lcr = 0; 1331 1332 switch (ISSET(cflag, CSIZE)) { 1333 case CS5: 1334 SET(lcr, LCR_5BITS); 1335 break; 1336 case CS6: 1337 SET(lcr, LCR_6BITS); 1338 break; 1339 case CS7: 1340 SET(lcr, LCR_7BITS); 1341 break; 1342 case CS8: 1343 SET(lcr, LCR_8BITS); 1344 break; 1345 } 1346 if (ISSET(cflag, PARENB)) { 1347 SET(lcr, LCR_PENAB); 1348 if (!ISSET(cflag, PARODD)) 1349 SET(lcr, LCR_PEVEN); 1350 } 1351 if (ISSET(cflag, CSTOPB)) 1352 SET(lcr, LCR_STOPB); 1353 1354 return (lcr); 1355 } 1356 1357 int 1358 comparam(tp, t) 1359 struct tty *tp; 1360 struct termios *t; 1361 { 1362 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1363 int ospeed; 1364 u_char lcr; 1365 int s; 1366 1367 if (COM_ISALIVE(sc) == 0) 1368 return (EIO); 1369 1370 #ifdef COM_HAYESP 1371 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1372 int prescaler, speed; 1373 1374 /* 1375 * Calculate UART clock prescaler. It should be in 1376 * range of 0 .. 3. 1377 */ 1378 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1379 prescaler++, speed /= 2) 1380 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1381 break; 1382 1383 if (prescaler == 4) 1384 return (EINVAL); 1385 sc->sc_prescaler = prescaler; 1386 } else 1387 #endif 1388 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1389 1390 /* Check requested parameters. */ 1391 if (ospeed < 0) 1392 return (EINVAL); 1393 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1394 return (EINVAL); 1395 1396 /* 1397 * For the console, always force CLOCAL and !HUPCL, so that the port 1398 * is always active. 1399 */ 1400 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1401 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1402 SET(t->c_cflag, CLOCAL); 1403 CLR(t->c_cflag, HUPCL); 1404 } 1405 1406 /* 1407 * If there were no changes, don't do anything. This avoids dropping 1408 * input and improves performance when all we did was frob things like 1409 * VMIN and VTIME. 1410 */ 1411 if (tp->t_ospeed == t->c_ospeed && 1412 tp->t_cflag == t->c_cflag) 1413 return (0); 1414 1415 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1416 1417 s = splserial(); 1418 COM_LOCK(sc); 1419 1420 sc->sc_lcr = lcr; 1421 1422 /* 1423 * If we're not in a mode that assumes a connection is present, then 1424 * ignore carrier changes. 1425 */ 1426 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1427 sc->sc_msr_dcd = 0; 1428 else 1429 sc->sc_msr_dcd = MSR_DCD; 1430 /* 1431 * Set the flow control pins depending on the current flow control 1432 * mode. 1433 */ 1434 if (ISSET(t->c_cflag, CRTSCTS)) { 1435 sc->sc_mcr_dtr = MCR_DTR; 1436 sc->sc_mcr_rts = MCR_RTS; 1437 sc->sc_msr_cts = MSR_CTS; 1438 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1439 } else if (ISSET(t->c_cflag, MDMBUF)) { 1440 /* 1441 * For DTR/DCD flow control, make sure we don't toggle DTR for 1442 * carrier detection. 1443 */ 1444 sc->sc_mcr_dtr = 0; 1445 sc->sc_mcr_rts = MCR_DTR; 1446 sc->sc_msr_cts = MSR_DCD; 1447 sc->sc_efr = 0; 1448 } else { 1449 /* 1450 * If no flow control, then always set RTS. This will make 1451 * the other side happy if it mistakenly thinks we're doing 1452 * RTS/CTS flow control. 1453 */ 1454 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1455 sc->sc_mcr_rts = 0; 1456 sc->sc_msr_cts = 0; 1457 sc->sc_efr = 0; 1458 if (ISSET(sc->sc_mcr, MCR_DTR)) 1459 SET(sc->sc_mcr, MCR_RTS); 1460 else 1461 CLR(sc->sc_mcr, MCR_RTS); 1462 } 1463 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1464 1465 #if 0 1466 if (ospeed == 0) 1467 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1468 else 1469 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1470 #endif 1471 1472 sc->sc_dlbl = ospeed; 1473 sc->sc_dlbh = ospeed >> 8; 1474 1475 /* 1476 * Set the FIFO threshold based on the receive speed. 1477 * 1478 * * If it's a low speed, it's probably a mouse or some other 1479 * interactive device, so set the threshold low. 1480 * * If it's a high speed, trim the trigger level down to prevent 1481 * overflows. 1482 * * Otherwise set it a bit higher. 1483 */ 1484 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1485 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1486 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1487 sc->sc_fifo = FIFO_ENABLE | 1488 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1489 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1490 else 1491 sc->sc_fifo = 0; 1492 1493 /* And copy to tty. */ 1494 tp->t_ispeed = 0; 1495 tp->t_ospeed = t->c_ospeed; 1496 tp->t_cflag = t->c_cflag; 1497 1498 if (!sc->sc_heldchange) { 1499 if (sc->sc_tx_busy) { 1500 sc->sc_heldtbc = sc->sc_tbc; 1501 sc->sc_tbc = 0; 1502 sc->sc_heldchange = 1; 1503 } else 1504 com_loadchannelregs(sc); 1505 } 1506 1507 if (!ISSET(t->c_cflag, CHWFLOW)) { 1508 /* Disable the high water mark. */ 1509 sc->sc_r_hiwat = 0; 1510 sc->sc_r_lowat = 0; 1511 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1512 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1513 com_schedrx(sc); 1514 } 1515 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1516 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1517 com_hwiflow(sc); 1518 } 1519 } else { 1520 sc->sc_r_hiwat = com_rbuf_hiwat; 1521 sc->sc_r_lowat = com_rbuf_lowat; 1522 } 1523 1524 COM_UNLOCK(sc); 1525 splx(s); 1526 1527 /* 1528 * Update the tty layer's idea of the carrier bit, in case we changed 1529 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1530 * explicit request. 1531 */ 1532 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1533 1534 #ifdef COM_DEBUG 1535 if (com_debug) 1536 comstatus(sc, "comparam "); 1537 #endif 1538 1539 if (!ISSET(t->c_cflag, CHWFLOW)) { 1540 if (sc->sc_tx_stopped) { 1541 sc->sc_tx_stopped = 0; 1542 comstart(tp); 1543 } 1544 } 1545 1546 return (0); 1547 } 1548 1549 void 1550 com_iflush(sc) 1551 struct com_softc *sc; 1552 { 1553 bus_space_tag_t iot = sc->sc_iot; 1554 bus_space_handle_t ioh = sc->sc_ioh; 1555 #ifdef DIAGNOSTIC 1556 int reg; 1557 #endif 1558 int timo; 1559 1560 #ifdef DIAGNOSTIC 1561 reg = 0xffff; 1562 #endif 1563 timo = 50000; 1564 /* flush any pending I/O */ 1565 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1566 && --timo) 1567 #ifdef DIAGNOSTIC 1568 reg = 1569 #else 1570 (void) 1571 #endif 1572 bus_space_read_1(iot, ioh, com_data); 1573 #ifdef DIAGNOSTIC 1574 if (!timo) 1575 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1576 reg); 1577 #endif 1578 } 1579 1580 void 1581 com_loadchannelregs(sc) 1582 struct com_softc *sc; 1583 { 1584 bus_space_tag_t iot = sc->sc_iot; 1585 bus_space_handle_t ioh = sc->sc_ioh; 1586 1587 /* XXXXX necessary? */ 1588 com_iflush(sc); 1589 1590 bus_space_write_1(iot, ioh, com_ier, 0); 1591 1592 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1593 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1594 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1595 } 1596 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1597 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1598 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1599 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1600 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1601 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1602 #ifdef COM_HAYESP 1603 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1604 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1605 HAYESP_SETPRESCALER); 1606 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1607 sc->sc_prescaler); 1608 } 1609 #endif 1610 1611 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1612 } 1613 1614 int 1615 comhwiflow(tp, block) 1616 struct tty *tp; 1617 int block; 1618 { 1619 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1620 int s; 1621 1622 if (COM_ISALIVE(sc) == 0) 1623 return (0); 1624 1625 if (sc->sc_mcr_rts == 0) 1626 return (0); 1627 1628 s = splserial(); 1629 COM_LOCK(sc); 1630 1631 if (block) { 1632 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1633 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1634 com_hwiflow(sc); 1635 } 1636 } else { 1637 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1638 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1639 com_schedrx(sc); 1640 } 1641 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1642 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1643 com_hwiflow(sc); 1644 } 1645 } 1646 1647 COM_UNLOCK(sc); 1648 splx(s); 1649 return (1); 1650 } 1651 1652 /* 1653 * (un)block input via hw flowcontrol 1654 */ 1655 void 1656 com_hwiflow(sc) 1657 struct com_softc *sc; 1658 { 1659 bus_space_tag_t iot = sc->sc_iot; 1660 bus_space_handle_t ioh = sc->sc_ioh; 1661 1662 if (sc->sc_mcr_rts == 0) 1663 return; 1664 1665 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1666 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1667 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1668 } else { 1669 SET(sc->sc_mcr, sc->sc_mcr_rts); 1670 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1671 } 1672 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1673 } 1674 1675 1676 void 1677 comstart(tp) 1678 struct tty *tp; 1679 { 1680 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1681 bus_space_tag_t iot = sc->sc_iot; 1682 bus_space_handle_t ioh = sc->sc_ioh; 1683 int s; 1684 1685 if (COM_ISALIVE(sc) == 0) 1686 return; 1687 1688 s = spltty(); 1689 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1690 goto out; 1691 if (sc->sc_tx_stopped) 1692 goto out; 1693 1694 if (tp->t_outq.c_cc <= tp->t_lowat) { 1695 if (ISSET(tp->t_state, TS_ASLEEP)) { 1696 CLR(tp->t_state, TS_ASLEEP); 1697 wakeup(&tp->t_outq); 1698 } 1699 selwakeup(&tp->t_wsel); 1700 if (tp->t_outq.c_cc == 0) 1701 goto out; 1702 } 1703 1704 /* Grab the first contiguous region of buffer space. */ 1705 { 1706 u_char *tba; 1707 int tbc; 1708 1709 tba = tp->t_outq.c_cf; 1710 tbc = ndqb(&tp->t_outq, 0); 1711 1712 (void)splserial(); 1713 COM_LOCK(sc); 1714 1715 sc->sc_tba = tba; 1716 sc->sc_tbc = tbc; 1717 } 1718 1719 SET(tp->t_state, TS_BUSY); 1720 sc->sc_tx_busy = 1; 1721 1722 /* Enable transmit completion interrupts if necessary. */ 1723 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1724 SET(sc->sc_ier, IER_ETXRDY); 1725 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1726 } 1727 1728 /* Output the first chunk of the contiguous buffer. */ 1729 { 1730 int n; 1731 1732 n = sc->sc_tbc; 1733 if (n > sc->sc_fifolen) 1734 n = sc->sc_fifolen; 1735 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1736 sc->sc_tbc -= n; 1737 sc->sc_tba += n; 1738 } 1739 COM_UNLOCK(sc); 1740 out: 1741 splx(s); 1742 return; 1743 } 1744 1745 /* 1746 * Stop output on a line. 1747 */ 1748 void 1749 comstop(tp, flag) 1750 struct tty *tp; 1751 int flag; 1752 { 1753 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1754 int s; 1755 1756 s = splserial(); 1757 COM_LOCK(sc); 1758 if (ISSET(tp->t_state, TS_BUSY)) { 1759 /* Stop transmitting at the next chunk. */ 1760 sc->sc_tbc = 0; 1761 sc->sc_heldtbc = 0; 1762 if (!ISSET(tp->t_state, TS_TTSTOP)) 1763 SET(tp->t_state, TS_FLUSH); 1764 } 1765 COM_UNLOCK(sc); 1766 splx(s); 1767 } 1768 1769 void 1770 comdiag(arg) 1771 void *arg; 1772 { 1773 struct com_softc *sc = arg; 1774 int overflows, floods; 1775 int s; 1776 1777 s = splserial(); 1778 COM_LOCK(sc); 1779 overflows = sc->sc_overflows; 1780 sc->sc_overflows = 0; 1781 floods = sc->sc_floods; 1782 sc->sc_floods = 0; 1783 sc->sc_errors = 0; 1784 COM_UNLOCK(sc); 1785 splx(s); 1786 1787 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1788 sc->sc_dev.dv_xname, 1789 overflows, overflows == 1 ? "" : "s", 1790 floods, floods == 1 ? "" : "s"); 1791 } 1792 1793 integrate void 1794 com_rxsoft(sc, tp) 1795 struct com_softc *sc; 1796 struct tty *tp; 1797 { 1798 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1799 u_char *get, *end; 1800 u_int cc, scc; 1801 u_char lsr; 1802 int code; 1803 int s; 1804 1805 end = sc->sc_ebuf; 1806 get = sc->sc_rbget; 1807 scc = cc = com_rbuf_size - sc->sc_rbavail; 1808 1809 if (cc == com_rbuf_size) { 1810 sc->sc_floods++; 1811 if (sc->sc_errors++ == 0) 1812 callout_reset(&sc->sc_diag_callout, 60 * hz, 1813 comdiag, sc); 1814 } 1815 1816 while (cc) { 1817 code = get[0]; 1818 lsr = get[1]; 1819 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1820 if (ISSET(lsr, LSR_OE)) { 1821 sc->sc_overflows++; 1822 if (sc->sc_errors++ == 0) 1823 callout_reset(&sc->sc_diag_callout, 1824 60 * hz, comdiag, sc); 1825 } 1826 if (ISSET(lsr, LSR_BI | LSR_FE)) 1827 SET(code, TTY_FE); 1828 if (ISSET(lsr, LSR_PE)) 1829 SET(code, TTY_PE); 1830 } 1831 if ((*rint)(code, tp) == -1) { 1832 /* 1833 * The line discipline's buffer is out of space. 1834 */ 1835 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1836 /* 1837 * We're either not using flow control, or the 1838 * line discipline didn't tell us to block for 1839 * some reason. Either way, we have no way to 1840 * know when there's more space available, so 1841 * just drop the rest of the data. 1842 */ 1843 get += cc << 1; 1844 if (get >= end) 1845 get -= com_rbuf_size << 1; 1846 cc = 0; 1847 } else { 1848 /* 1849 * Don't schedule any more receive processing 1850 * until the line discipline tells us there's 1851 * space available (through comhwiflow()). 1852 * Leave the rest of the data in the input 1853 * buffer. 1854 */ 1855 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1856 } 1857 break; 1858 } 1859 get += 2; 1860 if (get >= end) 1861 get = sc->sc_rbuf; 1862 cc--; 1863 } 1864 1865 if (cc != scc) { 1866 sc->sc_rbget = get; 1867 s = splserial(); 1868 COM_LOCK(sc); 1869 1870 cc = sc->sc_rbavail += scc - cc; 1871 /* Buffers should be ok again, release possible block. */ 1872 if (cc >= sc->sc_r_lowat) { 1873 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1874 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1875 SET(sc->sc_ier, IER_ERXRDY); 1876 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1877 } 1878 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1879 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1880 com_hwiflow(sc); 1881 } 1882 } 1883 COM_UNLOCK(sc); 1884 splx(s); 1885 } 1886 } 1887 1888 integrate void 1889 com_txsoft(sc, tp) 1890 struct com_softc *sc; 1891 struct tty *tp; 1892 { 1893 1894 CLR(tp->t_state, TS_BUSY); 1895 if (ISSET(tp->t_state, TS_FLUSH)) 1896 CLR(tp->t_state, TS_FLUSH); 1897 else 1898 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1899 (*tp->t_linesw->l_start)(tp); 1900 } 1901 1902 integrate void 1903 com_stsoft(sc, tp) 1904 struct com_softc *sc; 1905 struct tty *tp; 1906 { 1907 u_char msr, delta; 1908 int s; 1909 1910 s = splserial(); 1911 COM_LOCK(sc); 1912 msr = sc->sc_msr; 1913 delta = sc->sc_msr_delta; 1914 sc->sc_msr_delta = 0; 1915 COM_UNLOCK(sc); 1916 splx(s); 1917 1918 if (ISSET(delta, sc->sc_msr_dcd)) { 1919 /* 1920 * Inform the tty layer that carrier detect changed. 1921 */ 1922 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1923 } 1924 1925 if (ISSET(delta, sc->sc_msr_cts)) { 1926 /* Block or unblock output according to flow control. */ 1927 if (ISSET(msr, sc->sc_msr_cts)) { 1928 sc->sc_tx_stopped = 0; 1929 (*tp->t_linesw->l_start)(tp); 1930 } else { 1931 sc->sc_tx_stopped = 1; 1932 } 1933 } 1934 1935 #ifdef COM_DEBUG 1936 if (com_debug) 1937 comstatus(sc, "com_stsoft"); 1938 #endif 1939 } 1940 1941 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1942 void 1943 comsoft(arg) 1944 void *arg; 1945 { 1946 struct com_softc *sc = arg; 1947 struct tty *tp; 1948 1949 if (COM_ISALIVE(sc) == 0) 1950 return; 1951 1952 { 1953 #else 1954 void 1955 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1956 comsoft() 1957 #else 1958 comsoft(arg) 1959 void *arg; 1960 #endif 1961 { 1962 struct com_softc *sc; 1963 struct tty *tp; 1964 int unit; 1965 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1966 int s; 1967 1968 s = splsoftserial(); 1969 com_softintr_scheduled = 0; 1970 #endif 1971 1972 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1973 sc = device_lookup(&com_cd, unit); 1974 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1975 continue; 1976 1977 if (COM_ISALIVE(sc) == 0) 1978 continue; 1979 1980 tp = sc->sc_tty; 1981 if (tp == NULL) 1982 continue; 1983 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1984 continue; 1985 #endif 1986 tp = sc->sc_tty; 1987 1988 if (sc->sc_rx_ready) { 1989 sc->sc_rx_ready = 0; 1990 com_rxsoft(sc, tp); 1991 } 1992 1993 if (sc->sc_st_check) { 1994 sc->sc_st_check = 0; 1995 com_stsoft(sc, tp); 1996 } 1997 1998 if (sc->sc_tx_done) { 1999 sc->sc_tx_done = 0; 2000 com_txsoft(sc, tp); 2001 } 2002 } 2003 2004 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2005 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2006 splx(s); 2007 #endif 2008 #endif 2009 } 2010 2011 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2012 /* there has got to be a better way to do comsoft() */ 2013 }} 2014 #endif 2015 2016 int 2017 comintr(arg) 2018 void *arg; 2019 { 2020 struct com_softc *sc = arg; 2021 bus_space_tag_t iot = sc->sc_iot; 2022 bus_space_handle_t ioh = sc->sc_ioh; 2023 u_char *put, *end; 2024 u_int cc; 2025 u_char lsr, iir; 2026 2027 if (COM_ISALIVE(sc) == 0) 2028 return (0); 2029 2030 COM_LOCK(sc); 2031 iir = bus_space_read_1(iot, ioh, com_iir); 2032 if (ISSET(iir, IIR_NOPEND)) { 2033 COM_UNLOCK(sc); 2034 return (0); 2035 } 2036 2037 end = sc->sc_ebuf; 2038 put = sc->sc_rbput; 2039 cc = sc->sc_rbavail; 2040 2041 again: do { 2042 u_char msr, delta; 2043 2044 lsr = bus_space_read_1(iot, ioh, com_lsr); 2045 if (ISSET(lsr, LSR_BI)) { 2046 int cn_trapped = 0; 2047 cn_check_magic(sc->sc_tty->t_dev, 2048 CNC_BREAK, com_cnm_state); 2049 if (cn_trapped) 2050 continue; 2051 #if defined(KGDB) 2052 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2053 kgdb_connect(1); 2054 continue; 2055 } 2056 #endif 2057 } 2058 2059 if (ISSET(lsr, LSR_RCV_MASK) && 2060 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2061 while (cc > 0) { 2062 int cn_trapped = 0; 2063 put[0] = bus_space_read_1(iot, ioh, com_data); 2064 put[1] = lsr; 2065 cn_check_magic(sc->sc_tty->t_dev, 2066 put[0], com_cnm_state); 2067 if (cn_trapped) { 2068 lsr = bus_space_read_1(iot, ioh, com_lsr); 2069 if (!ISSET(lsr, LSR_RCV_MASK)) 2070 break; 2071 2072 continue; 2073 } 2074 put += 2; 2075 if (put >= end) 2076 put = sc->sc_rbuf; 2077 cc--; 2078 2079 lsr = bus_space_read_1(iot, ioh, com_lsr); 2080 if (!ISSET(lsr, LSR_RCV_MASK)) 2081 break; 2082 } 2083 2084 /* 2085 * Current string of incoming characters ended because 2086 * no more data was available or we ran out of space. 2087 * Schedule a receive event if any data was received. 2088 * If we're out of space, turn off receive interrupts. 2089 */ 2090 sc->sc_rbput = put; 2091 sc->sc_rbavail = cc; 2092 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2093 sc->sc_rx_ready = 1; 2094 2095 /* 2096 * See if we are in danger of overflowing a buffer. If 2097 * so, use hardware flow control to ease the pressure. 2098 */ 2099 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2100 cc < sc->sc_r_hiwat) { 2101 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2102 com_hwiflow(sc); 2103 } 2104 2105 /* 2106 * If we're out of space, disable receive interrupts 2107 * until the queue has drained a bit. 2108 */ 2109 if (!cc) { 2110 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2111 CLR(sc->sc_ier, IER_ERXRDY); 2112 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2113 } 2114 } else { 2115 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2116 bus_space_write_1(iot, ioh, com_ier, 0); 2117 delay(10); 2118 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2119 continue; 2120 } 2121 } 2122 2123 msr = bus_space_read_1(iot, ioh, com_msr); 2124 delta = msr ^ sc->sc_msr; 2125 sc->sc_msr = msr; 2126 /* 2127 * Pulse-per-second (PSS) signals on edge of DCD? 2128 * Process these even if line discipline is ignoring DCD. 2129 */ 2130 if (delta & sc->sc_ppsmask) { 2131 struct timeval tv; 2132 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2133 /* XXX nanotime() */ 2134 microtime(&tv); 2135 TIMEVAL_TO_TIMESPEC(&tv, 2136 &sc->ppsinfo.assert_timestamp); 2137 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2138 timespecadd(&sc->ppsinfo.assert_timestamp, 2139 &sc->ppsparam.assert_offset, 2140 &sc->ppsinfo.assert_timestamp); 2141 } 2142 2143 #ifdef PPS_SYNC 2144 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2145 hardpps(&tv, tv.tv_usec); 2146 #endif 2147 sc->ppsinfo.assert_sequence++; 2148 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2149 2150 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2151 /* XXX nanotime() */ 2152 microtime(&tv); 2153 TIMEVAL_TO_TIMESPEC(&tv, 2154 &sc->ppsinfo.clear_timestamp); 2155 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2156 timespecadd(&sc->ppsinfo.clear_timestamp, 2157 &sc->ppsparam.clear_offset, 2158 &sc->ppsinfo.clear_timestamp); 2159 } 2160 2161 #ifdef PPS_SYNC 2162 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2163 hardpps(&tv, tv.tv_usec); 2164 #endif 2165 sc->ppsinfo.clear_sequence++; 2166 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2167 } 2168 } 2169 2170 /* 2171 * Process normal status changes 2172 */ 2173 if (ISSET(delta, sc->sc_msr_mask)) { 2174 SET(sc->sc_msr_delta, delta); 2175 2176 /* 2177 * Stop output immediately if we lose the output 2178 * flow control signal or carrier detect. 2179 */ 2180 if (ISSET(~msr, sc->sc_msr_mask)) { 2181 sc->sc_tbc = 0; 2182 sc->sc_heldtbc = 0; 2183 #ifdef COM_DEBUG 2184 if (com_debug) 2185 comstatus(sc, "comintr "); 2186 #endif 2187 } 2188 2189 sc->sc_st_check = 1; 2190 } 2191 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2192 || ((iir & IIR_IMASK) == 0)); 2193 2194 /* 2195 * Done handling any receive interrupts. See if data can be 2196 * transmitted as well. Schedule tx done event if no data left 2197 * and tty was marked busy. 2198 */ 2199 if (ISSET(lsr, LSR_TXRDY)) { 2200 /* 2201 * If we've delayed a parameter change, do it now, and restart 2202 * output. 2203 */ 2204 if (sc->sc_heldchange) { 2205 com_loadchannelregs(sc); 2206 sc->sc_heldchange = 0; 2207 sc->sc_tbc = sc->sc_heldtbc; 2208 sc->sc_heldtbc = 0; 2209 } 2210 2211 /* Output the next chunk of the contiguous buffer, if any. */ 2212 if (sc->sc_tbc > 0) { 2213 int n; 2214 2215 n = sc->sc_tbc; 2216 if (n > sc->sc_fifolen) 2217 n = sc->sc_fifolen; 2218 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2219 sc->sc_tbc -= n; 2220 sc->sc_tba += n; 2221 } else { 2222 /* Disable transmit completion interrupts if necessary. */ 2223 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2224 CLR(sc->sc_ier, IER_ETXRDY); 2225 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2226 } 2227 if (sc->sc_tx_busy) { 2228 sc->sc_tx_busy = 0; 2229 sc->sc_tx_done = 1; 2230 } 2231 } 2232 } 2233 2234 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2235 goto again; 2236 2237 COM_UNLOCK(sc); 2238 2239 /* Wake up the poller. */ 2240 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2241 softintr_schedule(sc->sc_si); 2242 #else 2243 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2244 setsoftserial(); 2245 #else 2246 if (!com_softintr_scheduled) { 2247 com_softintr_scheduled = 1; 2248 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2249 } 2250 #endif 2251 #endif 2252 2253 #if NRND > 0 && defined(RND_COM) 2254 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2255 #endif 2256 2257 return (1); 2258 } 2259 2260 /* 2261 * The following functions are polled getc and putc routines, shared 2262 * by the console and kgdb glue. 2263 * 2264 * The read-ahead code is so that you can detect pending in-band 2265 * cn_magic in polled mode while doing output rather than having to 2266 * wait until the kernel decides it needs input. 2267 */ 2268 2269 #define MAX_READAHEAD 20 2270 static int com_readahead[MAX_READAHEAD]; 2271 static int com_readaheadcount = 0; 2272 2273 int 2274 com_common_getc(dev, iot, ioh) 2275 dev_t dev; 2276 bus_space_tag_t iot; 2277 bus_space_handle_t ioh; 2278 { 2279 int s = splserial(); 2280 u_char stat, c; 2281 2282 /* got a character from reading things earlier */ 2283 if (com_readaheadcount > 0) { 2284 int i; 2285 2286 c = com_readahead[0]; 2287 for (i = 1; i < com_readaheadcount; i++) { 2288 com_readahead[i-1] = com_readahead[i]; 2289 } 2290 com_readaheadcount--; 2291 splx(s); 2292 return (c); 2293 } 2294 2295 /* block until a character becomes available */ 2296 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2297 ; 2298 2299 c = bus_space_read_1(iot, ioh, com_data); 2300 stat = bus_space_read_1(iot, ioh, com_iir); 2301 { 2302 int cn_trapped = 0; /* unused */ 2303 #ifdef DDB 2304 extern int db_active; 2305 if (!db_active) 2306 #endif 2307 cn_check_magic(dev, c, com_cnm_state); 2308 } 2309 splx(s); 2310 return (c); 2311 } 2312 2313 void 2314 com_common_putc(dev, iot, ioh, c) 2315 dev_t dev; 2316 bus_space_tag_t iot; 2317 bus_space_handle_t ioh; 2318 int c; 2319 { 2320 int s = splserial(); 2321 int timo; 2322 2323 int cin, stat; 2324 if (com_readaheadcount < MAX_READAHEAD 2325 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2326 int cn_trapped = 0; 2327 cin = bus_space_read_1(iot, ioh, com_data); 2328 stat = bus_space_read_1(iot, ioh, com_iir); 2329 cn_check_magic(dev, cin, com_cnm_state); 2330 com_readahead[com_readaheadcount++] = cin; 2331 } 2332 2333 /* wait for any pending transmission to finish */ 2334 timo = 150000; 2335 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2336 continue; 2337 2338 bus_space_write_1(iot, ioh, com_data, c); 2339 COM_BARRIER(iot, ioh, BR | BW); 2340 2341 /* wait for this transmission to complete */ 2342 timo = 1500000; 2343 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2344 continue; 2345 2346 splx(s); 2347 } 2348 2349 /* 2350 * Initialize UART for use as console or KGDB line. 2351 */ 2352 int 2353 cominit(iot, iobase, rate, frequency, cflag, iohp) 2354 bus_space_tag_t iot; 2355 bus_addr_t iobase; 2356 int rate, frequency; 2357 tcflag_t cflag; 2358 bus_space_handle_t *iohp; 2359 { 2360 bus_space_handle_t ioh; 2361 2362 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2363 return (ENOMEM); /* ??? */ 2364 2365 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2366 bus_space_write_1(iot, ioh, com_efr, 0); 2367 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2368 rate = comspeed(rate, frequency); 2369 bus_space_write_1(iot, ioh, com_dlbl, rate); 2370 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2371 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2372 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2373 bus_space_write_1(iot, ioh, com_fifo, 2374 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2375 bus_space_write_1(iot, ioh, com_ier, 0); 2376 2377 *iohp = ioh; 2378 return (0); 2379 } 2380 2381 /* 2382 * Following are all routines needed for COM to act as console 2383 */ 2384 struct consdev comcons = { 2385 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2386 NODEV, CN_NORMAL 2387 }; 2388 2389 2390 int 2391 comcnattach(iot, iobase, rate, frequency, cflag) 2392 bus_space_tag_t iot; 2393 bus_addr_t iobase; 2394 int rate, frequency; 2395 tcflag_t cflag; 2396 { 2397 int res; 2398 2399 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2400 if (res) 2401 return (res); 2402 2403 cn_tab = &comcons; 2404 cn_init_magic(&com_cnm_state); 2405 cn_set_magic("\047\001"); /* default magic is BREAK */ 2406 2407 comconstag = iot; 2408 comconsaddr = iobase; 2409 comconsrate = rate; 2410 comconscflag = cflag; 2411 2412 return (0); 2413 } 2414 2415 int 2416 comcngetc(dev) 2417 dev_t dev; 2418 { 2419 return (com_common_getc(dev, comconstag, comconsioh)); 2420 } 2421 2422 /* 2423 * Console kernel output character routine. 2424 */ 2425 void 2426 comcnputc(dev, c) 2427 dev_t dev; 2428 int c; 2429 { 2430 com_common_putc(dev, comconstag, comconsioh, c); 2431 } 2432 2433 void 2434 comcnpollc(dev, on) 2435 dev_t dev; 2436 int on; 2437 { 2438 2439 } 2440 2441 #ifdef KGDB 2442 int 2443 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2444 bus_space_tag_t iot; 2445 bus_addr_t iobase; 2446 int rate, frequency; 2447 tcflag_t cflag; 2448 { 2449 int res; 2450 2451 if (iot == comconstag && iobase == comconsaddr) 2452 return (EBUSY); /* cannot share with console */ 2453 2454 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2455 if (res) 2456 return (res); 2457 2458 /* 2459 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2460 * expects this to be initialized 2461 */ 2462 cn_init_magic(&com_cnm_state); 2463 cn_set_magic("\047\001"); 2464 2465 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2466 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2467 2468 com_kgdb_iot = iot; 2469 com_kgdb_addr = iobase; 2470 2471 return (0); 2472 } 2473 2474 /* ARGSUSED */ 2475 int 2476 com_kgdb_getc(arg) 2477 void *arg; 2478 { 2479 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2480 } 2481 2482 /* ARGSUSED */ 2483 void 2484 com_kgdb_putc(arg, c) 2485 void *arg; 2486 int c; 2487 { 2488 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2489 } 2490 #endif /* KGDB */ 2491 2492 /* helper function to identify the com ports used by 2493 console or KGDB (and not yet autoconf attached) */ 2494 int 2495 com_is_console(iot, iobase, ioh) 2496 bus_space_tag_t iot; 2497 bus_addr_t iobase; 2498 bus_space_handle_t *ioh; 2499 { 2500 bus_space_handle_t help; 2501 2502 if (!comconsattached && 2503 iot == comconstag && iobase == comconsaddr) 2504 help = comconsioh; 2505 #ifdef KGDB 2506 else if (!com_kgdb_attached && 2507 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2508 help = com_kgdb_ioh; 2509 #endif 2510 else 2511 return (0); 2512 2513 if (ioh) 2514 *ioh = help; 2515 return (1); 2516 } 2517
Indexes created Mon Oct 20 11:09:49 GMT 2025