com.c revision 1.194
1 /* $NetBSD: com.c,v 1.194 2002/03/17 19:40:57 atatat Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.194 2002/03/17 19:40:57 atatat Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 86 #include "rnd.h" 87 #if NRND > 0 && defined(RND_COM) 88 #include <sys/rnd.h> 89 #endif 90 91 /* 92 * Override cnmagic(9) macro before including <sys/systm.h>. 93 * We need to know if cn_check_magic triggered debugger, so set a flag. 94 * Callers of cn_check_magic must declare int cn_trapped = 0; 95 * XXX: this is *ugly*! 96 */ 97 #define cn_trap() \ 98 do { \ 99 console_debugger(); \ 100 cn_trapped = 1; \ 101 } while (/* CONSTCOND */ 0) 102 103 #include <sys/param.h> 104 #include <sys/systm.h> 105 #include <sys/ioctl.h> 106 #include <sys/select.h> 107 #include <sys/tty.h> 108 #include <sys/proc.h> 109 #include <sys/user.h> 110 #include <sys/conf.h> 111 #include <sys/file.h> 112 #include <sys/uio.h> 113 #include <sys/kernel.h> 114 #include <sys/syslog.h> 115 #include <sys/device.h> 116 #include <sys/malloc.h> 117 #include <sys/timepps.h> 118 #include <sys/vnode.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 135 #endif 136 137 static void com_enable_debugport __P((struct com_softc *)); 138 139 void com_config __P((struct com_softc *)); 140 void com_shutdown __P((struct com_softc *)); 141 int comspeed __P((long, long)); 142 static u_char cflag2lcr __P((tcflag_t)); 143 int comparam __P((struct tty *, struct termios *)); 144 void comstart __P((struct tty *)); 145 int comhwiflow __P((struct tty *, int)); 146 147 void com_loadchannelregs __P((struct com_softc *)); 148 void com_hwiflow __P((struct com_softc *)); 149 void com_break __P((struct com_softc *, int)); 150 void com_modem __P((struct com_softc *, int)); 151 void tiocm_to_com __P((struct com_softc *, u_long, int)); 152 int com_to_tiocm __P((struct com_softc *)); 153 void com_iflush __P((struct com_softc *)); 154 155 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 156 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 157 158 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 159 bus_space_handle_t *)); 160 161 /* XXX: This belongs elsewhere */ 162 cdev_decl(com); 163 164 int comcngetc __P((dev_t)); 165 void comcnputc __P((dev_t, int)); 166 void comcnpollc __P((dev_t, int)); 167 168 #define integrate static inline 169 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 170 void comsoft __P((void *)); 171 #else 172 #ifndef __NO_SOFT_SERIAL_INTERRUPT 173 void comsoft __P((void)); 174 #else 175 void comsoft __P((void *)); 176 struct callout comsoft_callout = CALLOUT_INITIALIZER; 177 #endif 178 #endif 179 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 180 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 181 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 182 integrate void com_schedrx __P((struct com_softc *)); 183 void comdiag __P((void *)); 184 185 extern struct cfdriver com_cd; 186 187 /* 188 * Make this an option variable one can patch. 189 * But be warned: this must be a power of 2! 190 */ 191 u_int com_rbuf_size = COM_RING_SIZE; 192 193 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 194 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 195 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 196 197 static bus_addr_t comconsaddr; 198 static bus_space_tag_t comconstag; 199 static bus_space_handle_t comconsioh; 200 static int comconsattached; 201 static int comconsrate; 202 static tcflag_t comconscflag; 203 static struct cnm_state com_cnm_state; 204 205 static int ppscap = 206 PPS_TSFMT_TSPEC | 207 PPS_CAPTUREASSERT | 208 PPS_CAPTURECLEAR | 209 #ifdef PPS_SYNC 210 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 211 #endif /* PPS_SYNC */ 212 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 213 214 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 215 #ifdef __NO_SOFT_SERIAL_INTERRUPT 216 volatile int com_softintr_scheduled; 217 #endif 218 #endif 219 220 #ifdef KGDB 221 #include <sys/kgdb.h> 222 223 static bus_addr_t com_kgdb_addr; 224 static bus_space_tag_t com_kgdb_iot; 225 static bus_space_handle_t com_kgdb_ioh; 226 static int com_kgdb_attached; 227 228 int com_kgdb_getc __P((void *)); 229 void com_kgdb_putc __P((void *, int)); 230 #endif /* KGDB */ 231 232 #define COMUNIT_MASK 0x7ffff 233 #define COMDIALOUT_MASK 0x80000 234 235 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 236 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 237 238 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 239 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 240 241 #define BR BUS_SPACE_BARRIER_READ 242 #define BW BUS_SPACE_BARRIER_WRITE 243 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 244 245 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 246 247 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 248 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 249 250 #else 251 252 #define COM_LOCK(sc) 253 #define COM_UNLOCK(sc) 254 255 #endif 256 257 int 258 comspeed(speed, frequency) 259 long speed, frequency; 260 { 261 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 262 263 int x, err; 264 265 #if 0 266 if (speed == 0) 267 return (0); 268 #endif 269 if (speed <= 0) 270 return (-1); 271 x = divrnd(frequency / 16, speed); 272 if (x <= 0) 273 return (-1); 274 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 275 if (err < 0) 276 err = -err; 277 if (err > COM_TOLERANCE) 278 return (-1); 279 return (x); 280 281 #undef divrnd 282 } 283 284 #ifdef COM_DEBUG 285 int com_debug = 0; 286 287 void comstatus __P((struct com_softc *, char *)); 288 void 289 comstatus(sc, str) 290 struct com_softc *sc; 291 char *str; 292 { 293 struct tty *tp = sc->sc_tty; 294 295 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 296 sc->sc_dev.dv_xname, str, 297 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 298 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 299 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 300 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 301 sc->sc_tx_stopped ? "+" : "-"); 302 303 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 304 sc->sc_dev.dv_xname, str, 305 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 306 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 307 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 308 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 309 sc->sc_rx_flags); 310 } 311 #endif 312 313 int 314 comprobe1(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 319 /* force access to id reg */ 320 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 321 bus_space_write_1(iot, ioh, com_iir, 0); 322 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 323 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 324 return (0); 325 326 return (1); 327 } 328 329 #ifdef COM_HAYESP 330 int 331 comprobeHAYESP(hayespioh, sc) 332 bus_space_handle_t hayespioh; 333 struct com_softc *sc; 334 { 335 char val, dips; 336 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 337 bus_space_tag_t iot = sc->sc_iot; 338 339 /* 340 * Hayes ESP cards have two iobases. One is for compatibility with 341 * 16550 serial chips, and at the same ISA PC base addresses. The 342 * other is for ESP-specific enhanced features, and lies at a 343 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 344 */ 345 346 /* Test for ESP signature */ 347 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 348 return (0); 349 350 /* 351 * ESP is present at ESP enhanced base address; unknown com port 352 */ 353 354 /* Get the dip-switch configurations */ 355 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 356 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 357 358 /* Determine which com port this ESP card services: bits 0,1 of */ 359 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 360 if (sc->sc_iobase != combaselist[dips & 0x03]) 361 return (0); 362 363 printf(": ESP"); 364 365 /* Check ESP Self Test bits. */ 366 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 367 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 368 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 370 if ((val & 0x70) < 0x20) { 371 printf("-old (%o)", val & 0x70); 372 /* we do not support the necessary features */ 373 return (0); 374 } 375 376 /* Check for ability to emulate 16550: bit 8 == 1 */ 377 if ((dips & 0x80) == 0) { 378 printf(" slave"); 379 /* XXX Does slave really mean no 16550 support?? */ 380 return (0); 381 } 382 383 /* 384 * If we made it this far, we are a full-featured ESP v2.0 (or 385 * better), at the correct com port address. 386 */ 387 388 SET(sc->sc_hwflags, COM_HW_HAYESP); 389 printf(", 1024 byte fifo\n"); 390 return (1); 391 } 392 #endif 393 394 static void 395 com_enable_debugport(sc) 396 struct com_softc *sc; 397 { 398 int s; 399 400 /* Turn on line break interrupt, set carrier. */ 401 s = splserial(); 402 COM_LOCK(sc); 403 sc->sc_ier = IER_ERXRDY; 404 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 405 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 406 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 407 COM_UNLOCK(sc); 408 splx(s); 409 } 410 411 void 412 com_attach_subr(sc) 413 struct com_softc *sc; 414 { 415 bus_addr_t iobase = sc->sc_iobase; 416 bus_space_tag_t iot = sc->sc_iot; 417 bus_space_handle_t ioh = sc->sc_ioh; 418 struct tty *tp; 419 #ifdef COM16650 420 u_int8_t lcr; 421 #endif 422 #ifdef COM_HAYESP 423 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 424 int *hayespp; 425 #endif 426 427 callout_init(&sc->sc_diag_callout); 428 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 429 simple_lock_init(&sc->sc_lock); 430 #endif 431 432 /* Disable interrupts before configuring the device. */ 433 sc->sc_ier = 0; 434 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 435 436 if (iot == comconstag && iobase == comconsaddr) { 437 comconsattached = 1; 438 439 /* Make sure the console is always "hardwired". */ 440 delay(1000); /* wait for output to finish */ 441 SET(sc->sc_hwflags, COM_HW_CONSOLE); 442 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 443 } 444 445 #ifdef COM_HAYESP 446 sc->sc_prescaler = 0; /* set prescaler to x1. */ 447 448 /* Look for a Hayes ESP board. */ 449 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 450 bus_space_handle_t hayespioh; 451 452 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 453 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 454 continue; 455 if (comprobeHAYESP(hayespioh, sc)) { 456 sc->sc_hayespioh = hayespioh; 457 sc->sc_fifolen = 1024; 458 459 break; 460 } 461 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 462 } 463 /* No ESP; look for other things. */ 464 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 465 #endif 466 sc->sc_fifolen = 1; 467 /* look for a NS 16550AF UART with FIFOs */ 468 bus_space_write_1(iot, ioh, com_fifo, 469 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 470 delay(100); 471 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 472 == IIR_FIFO_MASK) 473 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 474 == FIFO_TRIGGER_14) { 475 SET(sc->sc_hwflags, COM_HW_FIFO); 476 477 #ifdef COM16650 478 /* 479 * IIR changes into the EFR if LCR is set to LCR_EERS 480 * on 16650s. We also know IIR != 0 at this point. 481 * Write 0 into the EFR, and read it. If the result 482 * is 0, we have a 16650. 483 * 484 * Older 16650s were broken; the test to detect them 485 * is taken from the Linux driver. Apparently 486 * setting DLAB enable gives access to the EFR on 487 * these chips. 488 */ 489 lcr = bus_space_read_1(iot, ioh, com_lcr); 490 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 491 bus_space_write_1(iot, ioh, com_efr, 0); 492 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 493 bus_space_write_1(iot, ioh, com_lcr, 494 lcr | LCR_DLAB); 495 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 496 CLR(sc->sc_hwflags, COM_HW_FIFO); 497 sc->sc_fifolen = 0; 498 } else { 499 SET(sc->sc_hwflags, COM_HW_FLOW); 500 sc->sc_fifolen = 32; 501 } 502 } else 503 #endif 504 sc->sc_fifolen = 16; 505 506 #ifdef COM16650 507 bus_space_write_1(iot, ioh, com_lcr, lcr); 508 if (sc->sc_fifolen == 0) 509 printf(": st16650, broken fifo\n"); 510 else if (sc->sc_fifolen == 32) 511 printf(": st16650a, working fifo\n"); 512 else 513 #endif 514 printf(": ns16550a, working fifo\n"); 515 } else 516 printf(": ns16550, broken fifo\n"); 517 else 518 printf(": ns8250 or ns16450, no fifo\n"); 519 bus_space_write_1(iot, ioh, com_fifo, 0); 520 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 521 sc->sc_fifolen = 1; 522 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 523 } 524 #ifdef COM_HAYESP 525 } 526 #endif 527 528 tp = ttymalloc(); 529 tp->t_oproc = comstart; 530 tp->t_param = comparam; 531 tp->t_hwiflow = comhwiflow; 532 533 sc->sc_tty = tp; 534 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 535 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 536 sc->sc_rbavail = com_rbuf_size; 537 if (sc->sc_rbuf == NULL) { 538 printf("%s: unable to allocate ring buffer\n", 539 sc->sc_dev.dv_xname); 540 return; 541 } 542 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 543 544 tty_attach(tp); 545 546 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 547 SET(sc->sc_mcr, MCR_IENABLE); 548 549 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 550 int maj; 551 552 /* locate the major number */ 553 for (maj = 0; maj < nchrdev; maj++) 554 if (cdevsw[maj].d_open == comopen) 555 break; 556 557 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 558 559 printf("%s: console\n", sc->sc_dev.dv_xname); 560 } 561 562 #ifdef KGDB 563 /* 564 * Allow kgdb to "take over" this port. If this is 565 * the kgdb device, it has exclusive use. 566 */ 567 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 568 com_kgdb_attached = 1; 569 570 SET(sc->sc_hwflags, COM_HW_KGDB); 571 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 572 } 573 #endif 574 575 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 576 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 577 #endif 578 579 #if NRND > 0 && defined(RND_COM) 580 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 581 RND_TYPE_TTY, 0); 582 #endif 583 584 /* if there are no enable/disable functions, assume the device 585 is always enabled */ 586 if (!sc->enable) 587 sc->enabled = 1; 588 589 com_config(sc); 590 591 SET(sc->sc_hwflags, COM_HW_DEV_OK); 592 } 593 594 void 595 com_config(sc) 596 struct com_softc *sc; 597 { 598 bus_space_tag_t iot = sc->sc_iot; 599 bus_space_handle_t ioh = sc->sc_ioh; 600 601 /* Disable interrupts before configuring the device. */ 602 sc->sc_ier = 0; 603 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 604 605 #ifdef COM_HAYESP 606 /* Look for a Hayes ESP board. */ 607 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 608 sc->sc_fifolen = 1024; 609 610 /* Set 16550 compatibility mode */ 611 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 612 HAYESP_SETMODE); 613 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 614 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 615 HAYESP_MODE_SCALE); 616 617 /* Set RTS/CTS flow control */ 618 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 619 HAYESP_SETFLOWTYPE); 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 621 HAYESP_FLOW_RTS); 622 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 623 HAYESP_FLOW_CTS); 624 625 /* Set flow control levels */ 626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 627 HAYESP_SETRXFLOW); 628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 629 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 630 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 631 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 632 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 633 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 635 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 636 } 637 #endif 638 639 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 640 com_enable_debugport(sc); 641 } 642 643 int 644 com_detach(self, flags) 645 struct device *self; 646 int flags; 647 { 648 struct com_softc *sc = (struct com_softc *)self; 649 int maj, mn; 650 651 /* locate the major number */ 652 for (maj = 0; maj < nchrdev; maj++) 653 if (cdevsw[maj].d_open == comopen) 654 break; 655 656 /* Nuke the vnodes for any open instances. */ 657 mn = self->dv_unit; 658 vdevgone(maj, mn, mn, VCHR); 659 660 mn |= COMDIALOUT_MASK; 661 vdevgone(maj, mn, mn, VCHR); 662 663 /* Free the receive buffer. */ 664 free(sc->sc_rbuf, M_DEVBUF); 665 666 /* Detach and free the tty. */ 667 tty_detach(sc->sc_tty); 668 ttyfree(sc->sc_tty); 669 670 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 671 /* Unhook the soft interrupt handler. */ 672 softintr_disestablish(sc->sc_si); 673 #endif 674 675 #if NRND > 0 && defined(RND_COM) 676 /* Unhook the entropy source. */ 677 rnd_detach_source(&sc->rnd_source); 678 #endif 679 680 return (0); 681 } 682 683 int 684 com_activate(self, act) 685 struct device *self; 686 enum devact act; 687 { 688 struct com_softc *sc = (struct com_softc *)self; 689 int s, rv = 0; 690 691 s = splserial(); 692 COM_LOCK(sc); 693 switch (act) { 694 case DVACT_ACTIVATE: 695 rv = EOPNOTSUPP; 696 break; 697 698 case DVACT_DEACTIVATE: 699 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 700 rv = EBUSY; 701 break; 702 } 703 704 if (sc->disable != NULL && sc->enabled != 0) { 705 (*sc->disable)(sc); 706 sc->enabled = 0; 707 } 708 break; 709 } 710 711 COM_UNLOCK(sc); 712 splx(s); 713 return (rv); 714 } 715 716 void 717 com_shutdown(sc) 718 struct com_softc *sc; 719 { 720 struct tty *tp = sc->sc_tty; 721 int s; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 726 /* If we were asserting flow control, then deassert it. */ 727 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 728 com_hwiflow(sc); 729 730 /* Clear any break condition set with TIOCSBRK. */ 731 com_break(sc, 0); 732 733 /* Turn off PPS capture on last close. */ 734 sc->sc_ppsmask = 0; 735 sc->ppsparam.mode = 0; 736 737 /* 738 * Hang up if necessary. Wait a bit, so the other side has time to 739 * notice even if we immediately open the port again. 740 * Avoid tsleeping above splhigh(). 741 */ 742 if (ISSET(tp->t_cflag, HUPCL)) { 743 com_modem(sc, 0); 744 COM_UNLOCK(sc); 745 splx(s); 746 /* XXX tsleep will only timeout */ 747 (void) tsleep(sc, TTIPRI, ttclos, hz); 748 s = splserial(); 749 COM_LOCK(sc); 750 } 751 752 /* Turn off interrupts. */ 753 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 754 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 755 else 756 sc->sc_ier = 0; 757 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 758 759 if (sc->disable) { 760 #ifdef DIAGNOSTIC 761 if (!sc->enabled) 762 panic("com_shutdown: not enabled?"); 763 #endif 764 (*sc->disable)(sc); 765 sc->enabled = 0; 766 } 767 COM_UNLOCK(sc); 768 splx(s); 769 } 770 771 int 772 comopen(dev, flag, mode, p) 773 dev_t dev; 774 int flag, mode; 775 struct proc *p; 776 { 777 struct com_softc *sc; 778 struct tty *tp; 779 int s, s2; 780 int error; 781 782 sc = device_lookup(&com_cd, COMUNIT(dev)); 783 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 784 sc->sc_rbuf == NULL) 785 return (ENXIO); 786 787 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 788 return (ENXIO); 789 790 #ifdef KGDB 791 /* 792 * If this is the kgdb port, no other use is permitted. 793 */ 794 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 795 return (EBUSY); 796 #endif 797 798 tp = sc->sc_tty; 799 800 if (ISSET(tp->t_state, TS_ISOPEN) && 801 ISSET(tp->t_state, TS_XCLUDE) && 802 p->p_ucred->cr_uid != 0) 803 return (EBUSY); 804 805 s = spltty(); 806 807 /* 808 * Do the following iff this is a first open. 809 */ 810 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 811 struct termios t; 812 813 tp->t_dev = dev; 814 815 s2 = splserial(); 816 COM_LOCK(sc); 817 818 if (sc->enable) { 819 if ((*sc->enable)(sc)) { 820 COM_UNLOCK(sc); 821 splx(s2); 822 splx(s); 823 printf("%s: device enable failed\n", 824 sc->sc_dev.dv_xname); 825 return (EIO); 826 } 827 sc->enabled = 1; 828 com_config(sc); 829 } 830 831 /* Turn on interrupts. */ 832 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 833 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 834 835 /* Fetch the current modem control status, needed later. */ 836 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 837 838 /* Clear PPS capture state on first open. */ 839 sc->sc_ppsmask = 0; 840 sc->ppsparam.mode = 0; 841 842 COM_UNLOCK(sc); 843 splx(s2); 844 845 /* 846 * Initialize the termios status to the defaults. Add in the 847 * sticky bits from TIOCSFLAGS. 848 */ 849 t.c_ispeed = 0; 850 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 851 t.c_ospeed = comconsrate; 852 t.c_cflag = comconscflag; 853 } else { 854 t.c_ospeed = TTYDEF_SPEED; 855 t.c_cflag = TTYDEF_CFLAG; 856 } 857 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 858 SET(t.c_cflag, CLOCAL); 859 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 860 SET(t.c_cflag, CRTSCTS); 861 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 862 SET(t.c_cflag, MDMBUF); 863 /* Make sure comparam() will do something. */ 864 tp->t_ospeed = 0; 865 (void) comparam(tp, &t); 866 tp->t_iflag = TTYDEF_IFLAG; 867 tp->t_oflag = TTYDEF_OFLAG; 868 tp->t_lflag = TTYDEF_LFLAG; 869 ttychars(tp); 870 ttsetwater(tp); 871 872 s2 = splserial(); 873 COM_LOCK(sc); 874 875 /* 876 * Turn on DTR. We must always do this, even if carrier is not 877 * present, because otherwise we'd have to use TIOCSDTR 878 * immediately after setting CLOCAL, which applications do not 879 * expect. We always assert DTR while the device is open 880 * unless explicitly requested to deassert it. 881 */ 882 com_modem(sc, 1); 883 884 /* Clear the input ring, and unblock. */ 885 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 886 sc->sc_rbavail = com_rbuf_size; 887 com_iflush(sc); 888 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 889 com_hwiflow(sc); 890 891 #ifdef COM_DEBUG 892 if (com_debug) 893 comstatus(sc, "comopen "); 894 #endif 895 896 COM_UNLOCK(sc); 897 splx(s2); 898 } 899 900 splx(s); 901 902 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 903 if (error) 904 goto bad; 905 906 error = (*tp->t_linesw->l_open)(dev, tp); 907 if (error) 908 goto bad; 909 910 return (0); 911 912 bad: 913 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 914 /* 915 * We failed to open the device, and nobody else had it opened. 916 * Clean up the state as appropriate. 917 */ 918 com_shutdown(sc); 919 } 920 921 return (error); 922 } 923 924 int 925 comclose(dev, flag, mode, p) 926 dev_t dev; 927 int flag, mode; 928 struct proc *p; 929 { 930 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 931 struct tty *tp = sc->sc_tty; 932 933 /* XXX This is for cons.c. */ 934 if (!ISSET(tp->t_state, TS_ISOPEN)) 935 return (0); 936 937 (*tp->t_linesw->l_close)(tp, flag); 938 ttyclose(tp); 939 940 if (COM_ISALIVE(sc) == 0) 941 return (0); 942 943 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 944 /* 945 * Although we got a last close, the device may still be in 946 * use; e.g. if this was the dialout node, and there are still 947 * processes waiting for carrier on the non-dialout node. 948 */ 949 com_shutdown(sc); 950 } 951 952 return (0); 953 } 954 955 int 956 comread(dev, uio, flag) 957 dev_t dev; 958 struct uio *uio; 959 int flag; 960 { 961 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 962 struct tty *tp = sc->sc_tty; 963 964 if (COM_ISALIVE(sc) == 0) 965 return (EIO); 966 967 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 968 } 969 970 int 971 comwrite(dev, uio, flag) 972 dev_t dev; 973 struct uio *uio; 974 int flag; 975 { 976 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 977 struct tty *tp = sc->sc_tty; 978 979 if (COM_ISALIVE(sc) == 0) 980 return (EIO); 981 982 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 983 } 984 985 int 986 compoll(dev, events, p) 987 dev_t dev; 988 int events; 989 struct proc *p; 990 { 991 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 992 struct tty *tp = sc->sc_tty; 993 994 if (COM_ISALIVE(sc) == 0) 995 return (EIO); 996 997 return ((*tp->t_linesw->l_poll)(tp, events, p)); 998 } 999 1000 struct tty * 1001 comtty(dev) 1002 dev_t dev; 1003 { 1004 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1005 struct tty *tp = sc->sc_tty; 1006 1007 return (tp); 1008 } 1009 1010 int 1011 comioctl(dev, cmd, data, flag, p) 1012 dev_t dev; 1013 u_long cmd; 1014 caddr_t data; 1015 int flag; 1016 struct proc *p; 1017 { 1018 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1019 struct tty *tp = sc->sc_tty; 1020 int error; 1021 int s; 1022 1023 if (COM_ISALIVE(sc) == 0) 1024 return (EIO); 1025 1026 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1027 if (error != EPASSTHROUGH) 1028 return (error); 1029 1030 error = ttioctl(tp, cmd, data, flag, p); 1031 if (error != EPASSTHROUGH) 1032 return (error); 1033 1034 error = 0; 1035 1036 s = splserial(); 1037 COM_LOCK(sc); 1038 1039 switch (cmd) { 1040 case TIOCSBRK: 1041 com_break(sc, 1); 1042 break; 1043 1044 case TIOCCBRK: 1045 com_break(sc, 0); 1046 break; 1047 1048 case TIOCSDTR: 1049 com_modem(sc, 1); 1050 break; 1051 1052 case TIOCCDTR: 1053 com_modem(sc, 0); 1054 break; 1055 1056 case TIOCGFLAGS: 1057 *(int *)data = sc->sc_swflags; 1058 break; 1059 1060 case TIOCSFLAGS: 1061 error = suser(p->p_ucred, &p->p_acflag); 1062 if (error) 1063 break; 1064 sc->sc_swflags = *(int *)data; 1065 break; 1066 1067 case TIOCMSET: 1068 case TIOCMBIS: 1069 case TIOCMBIC: 1070 tiocm_to_com(sc, cmd, *(int *)data); 1071 break; 1072 1073 case TIOCMGET: 1074 *(int *)data = com_to_tiocm(sc); 1075 break; 1076 1077 case PPS_IOC_CREATE: 1078 break; 1079 1080 case PPS_IOC_DESTROY: 1081 break; 1082 1083 case PPS_IOC_GETPARAMS: { 1084 pps_params_t *pp; 1085 pp = (pps_params_t *)data; 1086 *pp = sc->ppsparam; 1087 break; 1088 } 1089 1090 case PPS_IOC_SETPARAMS: { 1091 pps_params_t *pp; 1092 int mode; 1093 pp = (pps_params_t *)data; 1094 if (pp->mode & ~ppscap) { 1095 error = EINVAL; 1096 break; 1097 } 1098 sc->ppsparam = *pp; 1099 /* 1100 * Compute msr masks from user-specified timestamp state. 1101 */ 1102 mode = sc->ppsparam.mode; 1103 #ifdef PPS_SYNC 1104 if (mode & PPS_HARDPPSONASSERT) { 1105 mode |= PPS_CAPTUREASSERT; 1106 /* XXX revoke any previous HARDPPS source */ 1107 } 1108 if (mode & PPS_HARDPPSONCLEAR) { 1109 mode |= PPS_CAPTURECLEAR; 1110 /* XXX revoke any previous HARDPPS source */ 1111 } 1112 #endif /* PPS_SYNC */ 1113 switch (mode & PPS_CAPTUREBOTH) { 1114 case 0: 1115 sc->sc_ppsmask = 0; 1116 break; 1117 1118 case PPS_CAPTUREASSERT: 1119 sc->sc_ppsmask = MSR_DCD; 1120 sc->sc_ppsassert = MSR_DCD; 1121 sc->sc_ppsclear = -1; 1122 break; 1123 1124 case PPS_CAPTURECLEAR: 1125 sc->sc_ppsmask = MSR_DCD; 1126 sc->sc_ppsassert = -1; 1127 sc->sc_ppsclear = 0; 1128 break; 1129 1130 case PPS_CAPTUREBOTH: 1131 sc->sc_ppsmask = MSR_DCD; 1132 sc->sc_ppsassert = MSR_DCD; 1133 sc->sc_ppsclear = 0; 1134 break; 1135 1136 default: 1137 error = EINVAL; 1138 break; 1139 } 1140 break; 1141 } 1142 1143 case PPS_IOC_GETCAP: 1144 *(int*)data = ppscap; 1145 break; 1146 1147 case PPS_IOC_FETCH: { 1148 pps_info_t *pi; 1149 pi = (pps_info_t *)data; 1150 *pi = sc->ppsinfo; 1151 break; 1152 } 1153 1154 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1155 /* 1156 * Some GPS clocks models use the falling rather than 1157 * rising edge as the on-the-second signal. 1158 * The old API has no way to specify PPS polarity. 1159 */ 1160 sc->sc_ppsmask = MSR_DCD; 1161 #ifndef PPS_TRAILING_EDGE 1162 sc->sc_ppsassert = MSR_DCD; 1163 sc->sc_ppsclear = -1; 1164 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1165 &sc->ppsinfo.assert_timestamp); 1166 #else 1167 sc->sc_ppsassert = -1 1168 sc->sc_ppsclear = 0; 1169 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1170 &sc->ppsinfo.clear_timestamp); 1171 #endif 1172 break; 1173 1174 default: 1175 error = EPASSTHROUGH; 1176 break; 1177 } 1178 1179 COM_UNLOCK(sc); 1180 splx(s); 1181 1182 #ifdef COM_DEBUG 1183 if (com_debug) 1184 comstatus(sc, "comioctl "); 1185 #endif 1186 1187 return (error); 1188 } 1189 1190 integrate void 1191 com_schedrx(sc) 1192 struct com_softc *sc; 1193 { 1194 1195 sc->sc_rx_ready = 1; 1196 1197 /* Wake up the poller. */ 1198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1199 softintr_schedule(sc->sc_si); 1200 #else 1201 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1202 setsoftserial(); 1203 #else 1204 if (!com_softintr_scheduled) { 1205 com_softintr_scheduled = 1; 1206 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1207 } 1208 #endif 1209 #endif 1210 } 1211 1212 void 1213 com_break(sc, onoff) 1214 struct com_softc *sc; 1215 int onoff; 1216 { 1217 1218 if (onoff) 1219 SET(sc->sc_lcr, LCR_SBREAK); 1220 else 1221 CLR(sc->sc_lcr, LCR_SBREAK); 1222 1223 if (!sc->sc_heldchange) { 1224 if (sc->sc_tx_busy) { 1225 sc->sc_heldtbc = sc->sc_tbc; 1226 sc->sc_tbc = 0; 1227 sc->sc_heldchange = 1; 1228 } else 1229 com_loadchannelregs(sc); 1230 } 1231 } 1232 1233 void 1234 com_modem(sc, onoff) 1235 struct com_softc *sc; 1236 int onoff; 1237 { 1238 1239 if (sc->sc_mcr_dtr == 0) 1240 return; 1241 1242 if (onoff) 1243 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1244 else 1245 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1246 1247 if (!sc->sc_heldchange) { 1248 if (sc->sc_tx_busy) { 1249 sc->sc_heldtbc = sc->sc_tbc; 1250 sc->sc_tbc = 0; 1251 sc->sc_heldchange = 1; 1252 } else 1253 com_loadchannelregs(sc); 1254 } 1255 } 1256 1257 void 1258 tiocm_to_com(sc, how, ttybits) 1259 struct com_softc *sc; 1260 u_long how; 1261 int ttybits; 1262 { 1263 u_char combits; 1264 1265 combits = 0; 1266 if (ISSET(ttybits, TIOCM_DTR)) 1267 SET(combits, MCR_DTR); 1268 if (ISSET(ttybits, TIOCM_RTS)) 1269 SET(combits, MCR_RTS); 1270 1271 switch (how) { 1272 case TIOCMBIC: 1273 CLR(sc->sc_mcr, combits); 1274 break; 1275 1276 case TIOCMBIS: 1277 SET(sc->sc_mcr, combits); 1278 break; 1279 1280 case TIOCMSET: 1281 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1282 SET(sc->sc_mcr, combits); 1283 break; 1284 } 1285 1286 if (!sc->sc_heldchange) { 1287 if (sc->sc_tx_busy) { 1288 sc->sc_heldtbc = sc->sc_tbc; 1289 sc->sc_tbc = 0; 1290 sc->sc_heldchange = 1; 1291 } else 1292 com_loadchannelregs(sc); 1293 } 1294 } 1295 1296 int 1297 com_to_tiocm(sc) 1298 struct com_softc *sc; 1299 { 1300 u_char combits; 1301 int ttybits = 0; 1302 1303 combits = sc->sc_mcr; 1304 if (ISSET(combits, MCR_DTR)) 1305 SET(ttybits, TIOCM_DTR); 1306 if (ISSET(combits, MCR_RTS)) 1307 SET(ttybits, TIOCM_RTS); 1308 1309 combits = sc->sc_msr; 1310 if (ISSET(combits, MSR_DCD)) 1311 SET(ttybits, TIOCM_CD); 1312 if (ISSET(combits, MSR_CTS)) 1313 SET(ttybits, TIOCM_CTS); 1314 if (ISSET(combits, MSR_DSR)) 1315 SET(ttybits, TIOCM_DSR); 1316 if (ISSET(combits, MSR_RI | MSR_TERI)) 1317 SET(ttybits, TIOCM_RI); 1318 1319 if (sc->sc_ier != 0) 1320 SET(ttybits, TIOCM_LE); 1321 1322 return (ttybits); 1323 } 1324 1325 static u_char 1326 cflag2lcr(cflag) 1327 tcflag_t cflag; 1328 { 1329 u_char lcr = 0; 1330 1331 switch (ISSET(cflag, CSIZE)) { 1332 case CS5: 1333 SET(lcr, LCR_5BITS); 1334 break; 1335 case CS6: 1336 SET(lcr, LCR_6BITS); 1337 break; 1338 case CS7: 1339 SET(lcr, LCR_7BITS); 1340 break; 1341 case CS8: 1342 SET(lcr, LCR_8BITS); 1343 break; 1344 } 1345 if (ISSET(cflag, PARENB)) { 1346 SET(lcr, LCR_PENAB); 1347 if (!ISSET(cflag, PARODD)) 1348 SET(lcr, LCR_PEVEN); 1349 } 1350 if (ISSET(cflag, CSTOPB)) 1351 SET(lcr, LCR_STOPB); 1352 1353 return (lcr); 1354 } 1355 1356 int 1357 comparam(tp, t) 1358 struct tty *tp; 1359 struct termios *t; 1360 { 1361 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1362 int ospeed; 1363 u_char lcr; 1364 int s; 1365 1366 if (COM_ISALIVE(sc) == 0) 1367 return (EIO); 1368 1369 #ifdef COM_HAYESP 1370 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1371 int prescaler, speed; 1372 1373 /* 1374 * Calculate UART clock prescaler. It should be in 1375 * range of 0 .. 3. 1376 */ 1377 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1378 prescaler++, speed /= 2) 1379 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1380 break; 1381 1382 if (prescaler == 4) 1383 return (EINVAL); 1384 sc->sc_prescaler = prescaler; 1385 } else 1386 #endif 1387 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1388 1389 /* Check requested parameters. */ 1390 if (ospeed < 0) 1391 return (EINVAL); 1392 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1393 return (EINVAL); 1394 1395 /* 1396 * For the console, always force CLOCAL and !HUPCL, so that the port 1397 * is always active. 1398 */ 1399 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1400 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1401 SET(t->c_cflag, CLOCAL); 1402 CLR(t->c_cflag, HUPCL); 1403 } 1404 1405 /* 1406 * If there were no changes, don't do anything. This avoids dropping 1407 * input and improves performance when all we did was frob things like 1408 * VMIN and VTIME. 1409 */ 1410 if (tp->t_ospeed == t->c_ospeed && 1411 tp->t_cflag == t->c_cflag) 1412 return (0); 1413 1414 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1415 1416 s = splserial(); 1417 COM_LOCK(sc); 1418 1419 sc->sc_lcr = lcr; 1420 1421 /* 1422 * If we're not in a mode that assumes a connection is present, then 1423 * ignore carrier changes. 1424 */ 1425 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1426 sc->sc_msr_dcd = 0; 1427 else 1428 sc->sc_msr_dcd = MSR_DCD; 1429 /* 1430 * Set the flow control pins depending on the current flow control 1431 * mode. 1432 */ 1433 if (ISSET(t->c_cflag, CRTSCTS)) { 1434 sc->sc_mcr_dtr = MCR_DTR; 1435 sc->sc_mcr_rts = MCR_RTS; 1436 sc->sc_msr_cts = MSR_CTS; 1437 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1438 } else if (ISSET(t->c_cflag, MDMBUF)) { 1439 /* 1440 * For DTR/DCD flow control, make sure we don't toggle DTR for 1441 * carrier detection. 1442 */ 1443 sc->sc_mcr_dtr = 0; 1444 sc->sc_mcr_rts = MCR_DTR; 1445 sc->sc_msr_cts = MSR_DCD; 1446 sc->sc_efr = 0; 1447 } else { 1448 /* 1449 * If no flow control, then always set RTS. This will make 1450 * the other side happy if it mistakenly thinks we're doing 1451 * RTS/CTS flow control. 1452 */ 1453 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1454 sc->sc_mcr_rts = 0; 1455 sc->sc_msr_cts = 0; 1456 sc->sc_efr = 0; 1457 if (ISSET(sc->sc_mcr, MCR_DTR)) 1458 SET(sc->sc_mcr, MCR_RTS); 1459 else 1460 CLR(sc->sc_mcr, MCR_RTS); 1461 } 1462 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1463 1464 #if 0 1465 if (ospeed == 0) 1466 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1467 else 1468 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1469 #endif 1470 1471 sc->sc_dlbl = ospeed; 1472 sc->sc_dlbh = ospeed >> 8; 1473 1474 /* 1475 * Set the FIFO threshold based on the receive speed. 1476 * 1477 * * If it's a low speed, it's probably a mouse or some other 1478 * interactive device, so set the threshold low. 1479 * * If it's a high speed, trim the trigger level down to prevent 1480 * overflows. 1481 * * Otherwise set it a bit higher. 1482 */ 1483 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1484 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1485 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1486 sc->sc_fifo = FIFO_ENABLE | 1487 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1488 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1489 else 1490 sc->sc_fifo = 0; 1491 1492 /* And copy to tty. */ 1493 tp->t_ispeed = 0; 1494 tp->t_ospeed = t->c_ospeed; 1495 tp->t_cflag = t->c_cflag; 1496 1497 if (!sc->sc_heldchange) { 1498 if (sc->sc_tx_busy) { 1499 sc->sc_heldtbc = sc->sc_tbc; 1500 sc->sc_tbc = 0; 1501 sc->sc_heldchange = 1; 1502 } else 1503 com_loadchannelregs(sc); 1504 } 1505 1506 if (!ISSET(t->c_cflag, CHWFLOW)) { 1507 /* Disable the high water mark. */ 1508 sc->sc_r_hiwat = 0; 1509 sc->sc_r_lowat = 0; 1510 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1511 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1512 com_schedrx(sc); 1513 } 1514 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1515 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1516 com_hwiflow(sc); 1517 } 1518 } else { 1519 sc->sc_r_hiwat = com_rbuf_hiwat; 1520 sc->sc_r_lowat = com_rbuf_lowat; 1521 } 1522 1523 COM_UNLOCK(sc); 1524 splx(s); 1525 1526 /* 1527 * Update the tty layer's idea of the carrier bit, in case we changed 1528 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1529 * explicit request. 1530 */ 1531 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1532 1533 #ifdef COM_DEBUG 1534 if (com_debug) 1535 comstatus(sc, "comparam "); 1536 #endif 1537 1538 if (!ISSET(t->c_cflag, CHWFLOW)) { 1539 if (sc->sc_tx_stopped) { 1540 sc->sc_tx_stopped = 0; 1541 comstart(tp); 1542 } 1543 } 1544 1545 return (0); 1546 } 1547 1548 void 1549 com_iflush(sc) 1550 struct com_softc *sc; 1551 { 1552 bus_space_tag_t iot = sc->sc_iot; 1553 bus_space_handle_t ioh = sc->sc_ioh; 1554 #ifdef DIAGNOSTIC 1555 int reg; 1556 #endif 1557 int timo; 1558 1559 #ifdef DIAGNOSTIC 1560 reg = 0xffff; 1561 #endif 1562 timo = 50000; 1563 /* flush any pending I/O */ 1564 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1565 && --timo) 1566 #ifdef DIAGNOSTIC 1567 reg = 1568 #else 1569 (void) 1570 #endif 1571 bus_space_read_1(iot, ioh, com_data); 1572 #ifdef DIAGNOSTIC 1573 if (!timo) 1574 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1575 reg); 1576 #endif 1577 } 1578 1579 void 1580 com_loadchannelregs(sc) 1581 struct com_softc *sc; 1582 { 1583 bus_space_tag_t iot = sc->sc_iot; 1584 bus_space_handle_t ioh = sc->sc_ioh; 1585 1586 /* XXXXX necessary? */ 1587 com_iflush(sc); 1588 1589 bus_space_write_1(iot, ioh, com_ier, 0); 1590 1591 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1592 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1593 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1594 } 1595 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1596 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1597 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1598 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1599 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1600 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1601 #ifdef COM_HAYESP 1602 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1603 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1604 HAYESP_SETPRESCALER); 1605 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1606 sc->sc_prescaler); 1607 } 1608 #endif 1609 1610 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1611 } 1612 1613 int 1614 comhwiflow(tp, block) 1615 struct tty *tp; 1616 int block; 1617 { 1618 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1619 int s; 1620 1621 if (COM_ISALIVE(sc) == 0) 1622 return (0); 1623 1624 if (sc->sc_mcr_rts == 0) 1625 return (0); 1626 1627 s = splserial(); 1628 COM_LOCK(sc); 1629 1630 if (block) { 1631 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1632 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1633 com_hwiflow(sc); 1634 } 1635 } else { 1636 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1637 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1638 com_schedrx(sc); 1639 } 1640 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1641 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1642 com_hwiflow(sc); 1643 } 1644 } 1645 1646 COM_UNLOCK(sc); 1647 splx(s); 1648 return (1); 1649 } 1650 1651 /* 1652 * (un)block input via hw flowcontrol 1653 */ 1654 void 1655 com_hwiflow(sc) 1656 struct com_softc *sc; 1657 { 1658 bus_space_tag_t iot = sc->sc_iot; 1659 bus_space_handle_t ioh = sc->sc_ioh; 1660 1661 if (sc->sc_mcr_rts == 0) 1662 return; 1663 1664 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1665 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1666 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1667 } else { 1668 SET(sc->sc_mcr, sc->sc_mcr_rts); 1669 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1670 } 1671 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1672 } 1673 1674 1675 void 1676 comstart(tp) 1677 struct tty *tp; 1678 { 1679 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1680 bus_space_tag_t iot = sc->sc_iot; 1681 bus_space_handle_t ioh = sc->sc_ioh; 1682 int s; 1683 1684 if (COM_ISALIVE(sc) == 0) 1685 return; 1686 1687 s = spltty(); 1688 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1689 goto out; 1690 if (sc->sc_tx_stopped) 1691 goto out; 1692 1693 if (tp->t_outq.c_cc <= tp->t_lowat) { 1694 if (ISSET(tp->t_state, TS_ASLEEP)) { 1695 CLR(tp->t_state, TS_ASLEEP); 1696 wakeup(&tp->t_outq); 1697 } 1698 selwakeup(&tp->t_wsel); 1699 if (tp->t_outq.c_cc == 0) 1700 goto out; 1701 } 1702 1703 /* Grab the first contiguous region of buffer space. */ 1704 { 1705 u_char *tba; 1706 int tbc; 1707 1708 tba = tp->t_outq.c_cf; 1709 tbc = ndqb(&tp->t_outq, 0); 1710 1711 (void)splserial(); 1712 COM_LOCK(sc); 1713 1714 sc->sc_tba = tba; 1715 sc->sc_tbc = tbc; 1716 } 1717 1718 SET(tp->t_state, TS_BUSY); 1719 sc->sc_tx_busy = 1; 1720 1721 /* Enable transmit completion interrupts if necessary. */ 1722 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1723 SET(sc->sc_ier, IER_ETXRDY); 1724 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1725 } 1726 1727 /* Output the first chunk of the contiguous buffer. */ 1728 { 1729 int n; 1730 1731 n = sc->sc_tbc; 1732 if (n > sc->sc_fifolen) 1733 n = sc->sc_fifolen; 1734 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1735 sc->sc_tbc -= n; 1736 sc->sc_tba += n; 1737 } 1738 COM_UNLOCK(sc); 1739 out: 1740 splx(s); 1741 return; 1742 } 1743 1744 /* 1745 * Stop output on a line. 1746 */ 1747 void 1748 comstop(tp, flag) 1749 struct tty *tp; 1750 int flag; 1751 { 1752 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1753 int s; 1754 1755 s = splserial(); 1756 COM_LOCK(sc); 1757 if (ISSET(tp->t_state, TS_BUSY)) { 1758 /* Stop transmitting at the next chunk. */ 1759 sc->sc_tbc = 0; 1760 sc->sc_heldtbc = 0; 1761 if (!ISSET(tp->t_state, TS_TTSTOP)) 1762 SET(tp->t_state, TS_FLUSH); 1763 } 1764 COM_UNLOCK(sc); 1765 splx(s); 1766 } 1767 1768 void 1769 comdiag(arg) 1770 void *arg; 1771 { 1772 struct com_softc *sc = arg; 1773 int overflows, floods; 1774 int s; 1775 1776 s = splserial(); 1777 COM_LOCK(sc); 1778 overflows = sc->sc_overflows; 1779 sc->sc_overflows = 0; 1780 floods = sc->sc_floods; 1781 sc->sc_floods = 0; 1782 sc->sc_errors = 0; 1783 COM_UNLOCK(sc); 1784 splx(s); 1785 1786 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1787 sc->sc_dev.dv_xname, 1788 overflows, overflows == 1 ? "" : "s", 1789 floods, floods == 1 ? "" : "s"); 1790 } 1791 1792 integrate void 1793 com_rxsoft(sc, tp) 1794 struct com_softc *sc; 1795 struct tty *tp; 1796 { 1797 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1798 u_char *get, *end; 1799 u_int cc, scc; 1800 u_char lsr; 1801 int code; 1802 int s; 1803 1804 end = sc->sc_ebuf; 1805 get = sc->sc_rbget; 1806 scc = cc = com_rbuf_size - sc->sc_rbavail; 1807 1808 if (cc == com_rbuf_size) { 1809 sc->sc_floods++; 1810 if (sc->sc_errors++ == 0) 1811 callout_reset(&sc->sc_diag_callout, 60 * hz, 1812 comdiag, sc); 1813 } 1814 1815 while (cc) { 1816 code = get[0]; 1817 lsr = get[1]; 1818 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1819 if (ISSET(lsr, LSR_OE)) { 1820 sc->sc_overflows++; 1821 if (sc->sc_errors++ == 0) 1822 callout_reset(&sc->sc_diag_callout, 1823 60 * hz, comdiag, sc); 1824 } 1825 if (ISSET(lsr, LSR_BI | LSR_FE)) 1826 SET(code, TTY_FE); 1827 if (ISSET(lsr, LSR_PE)) 1828 SET(code, TTY_PE); 1829 } 1830 if ((*rint)(code, tp) == -1) { 1831 /* 1832 * The line discipline's buffer is out of space. 1833 */ 1834 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1835 /* 1836 * We're either not using flow control, or the 1837 * line discipline didn't tell us to block for 1838 * some reason. Either way, we have no way to 1839 * know when there's more space available, so 1840 * just drop the rest of the data. 1841 */ 1842 get += cc << 1; 1843 if (get >= end) 1844 get -= com_rbuf_size << 1; 1845 cc = 0; 1846 } else { 1847 /* 1848 * Don't schedule any more receive processing 1849 * until the line discipline tells us there's 1850 * space available (through comhwiflow()). 1851 * Leave the rest of the data in the input 1852 * buffer. 1853 */ 1854 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1855 } 1856 break; 1857 } 1858 get += 2; 1859 if (get >= end) 1860 get = sc->sc_rbuf; 1861 cc--; 1862 } 1863 1864 if (cc != scc) { 1865 sc->sc_rbget = get; 1866 s = splserial(); 1867 COM_LOCK(sc); 1868 1869 cc = sc->sc_rbavail += scc - cc; 1870 /* Buffers should be ok again, release possible block. */ 1871 if (cc >= sc->sc_r_lowat) { 1872 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1873 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1874 SET(sc->sc_ier, IER_ERXRDY); 1875 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1876 } 1877 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1878 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1879 com_hwiflow(sc); 1880 } 1881 } 1882 COM_UNLOCK(sc); 1883 splx(s); 1884 } 1885 } 1886 1887 integrate void 1888 com_txsoft(sc, tp) 1889 struct com_softc *sc; 1890 struct tty *tp; 1891 { 1892 1893 CLR(tp->t_state, TS_BUSY); 1894 if (ISSET(tp->t_state, TS_FLUSH)) 1895 CLR(tp->t_state, TS_FLUSH); 1896 else 1897 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1898 (*tp->t_linesw->l_start)(tp); 1899 } 1900 1901 integrate void 1902 com_stsoft(sc, tp) 1903 struct com_softc *sc; 1904 struct tty *tp; 1905 { 1906 u_char msr, delta; 1907 int s; 1908 1909 s = splserial(); 1910 COM_LOCK(sc); 1911 msr = sc->sc_msr; 1912 delta = sc->sc_msr_delta; 1913 sc->sc_msr_delta = 0; 1914 COM_UNLOCK(sc); 1915 splx(s); 1916 1917 if (ISSET(delta, sc->sc_msr_dcd)) { 1918 /* 1919 * Inform the tty layer that carrier detect changed. 1920 */ 1921 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1922 } 1923 1924 if (ISSET(delta, sc->sc_msr_cts)) { 1925 /* Block or unblock output according to flow control. */ 1926 if (ISSET(msr, sc->sc_msr_cts)) { 1927 sc->sc_tx_stopped = 0; 1928 (*tp->t_linesw->l_start)(tp); 1929 } else { 1930 sc->sc_tx_stopped = 1; 1931 } 1932 } 1933 1934 #ifdef COM_DEBUG 1935 if (com_debug) 1936 comstatus(sc, "com_stsoft"); 1937 #endif 1938 } 1939 1940 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1941 void 1942 comsoft(arg) 1943 void *arg; 1944 { 1945 struct com_softc *sc = arg; 1946 struct tty *tp; 1947 1948 if (COM_ISALIVE(sc) == 0) 1949 return; 1950 1951 { 1952 #else 1953 void 1954 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1955 comsoft() 1956 #else 1957 comsoft(arg) 1958 void *arg; 1959 #endif 1960 { 1961 struct com_softc *sc; 1962 struct tty *tp; 1963 int unit; 1964 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1965 int s; 1966 1967 s = splsoftserial(); 1968 com_softintr_scheduled = 0; 1969 #endif 1970 1971 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1972 sc = device_lookup(&com_cd, unit); 1973 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1974 continue; 1975 1976 if (COM_ISALIVE(sc) == 0) 1977 continue; 1978 1979 tp = sc->sc_tty; 1980 if (tp == NULL) 1981 continue; 1982 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1983 continue; 1984 #endif 1985 tp = sc->sc_tty; 1986 1987 if (sc->sc_rx_ready) { 1988 sc->sc_rx_ready = 0; 1989 com_rxsoft(sc, tp); 1990 } 1991 1992 if (sc->sc_st_check) { 1993 sc->sc_st_check = 0; 1994 com_stsoft(sc, tp); 1995 } 1996 1997 if (sc->sc_tx_done) { 1998 sc->sc_tx_done = 0; 1999 com_txsoft(sc, tp); 2000 } 2001 } 2002 2003 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2004 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2005 splx(s); 2006 #endif 2007 #endif 2008 } 2009 2010 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2011 /* there has got to be a better way to do comsoft() */ 2012 }} 2013 #endif 2014 2015 int 2016 comintr(arg) 2017 void *arg; 2018 { 2019 struct com_softc *sc = arg; 2020 bus_space_tag_t iot = sc->sc_iot; 2021 bus_space_handle_t ioh = sc->sc_ioh; 2022 u_char *put, *end; 2023 u_int cc; 2024 u_char lsr, iir; 2025 2026 if (COM_ISALIVE(sc) == 0) 2027 return (0); 2028 2029 COM_LOCK(sc); 2030 iir = bus_space_read_1(iot, ioh, com_iir); 2031 if (ISSET(iir, IIR_NOPEND)) { 2032 COM_UNLOCK(sc); 2033 return (0); 2034 } 2035 2036 end = sc->sc_ebuf; 2037 put = sc->sc_rbput; 2038 cc = sc->sc_rbavail; 2039 2040 again: do { 2041 u_char msr, delta; 2042 2043 lsr = bus_space_read_1(iot, ioh, com_lsr); 2044 if (ISSET(lsr, LSR_BI)) { 2045 int cn_trapped = 0; 2046 cn_check_magic(sc->sc_tty->t_dev, 2047 CNC_BREAK, com_cnm_state); 2048 if (cn_trapped) 2049 continue; 2050 #if defined(KGDB) 2051 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2052 kgdb_connect(1); 2053 continue; 2054 } 2055 #endif 2056 } 2057 2058 if (ISSET(lsr, LSR_RCV_MASK) && 2059 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2060 while (cc > 0) { 2061 int cn_trapped = 0; 2062 put[0] = bus_space_read_1(iot, ioh, com_data); 2063 put[1] = lsr; 2064 cn_check_magic(sc->sc_tty->t_dev, 2065 put[0], com_cnm_state); 2066 if (cn_trapped) { 2067 lsr = bus_space_read_1(iot, ioh, com_lsr); 2068 if (!ISSET(lsr, LSR_RCV_MASK)) 2069 break; 2070 2071 continue; 2072 } 2073 put += 2; 2074 if (put >= end) 2075 put = sc->sc_rbuf; 2076 cc--; 2077 2078 lsr = bus_space_read_1(iot, ioh, com_lsr); 2079 if (!ISSET(lsr, LSR_RCV_MASK)) 2080 break; 2081 } 2082 2083 /* 2084 * Current string of incoming characters ended because 2085 * no more data was available or we ran out of space. 2086 * Schedule a receive event if any data was received. 2087 * If we're out of space, turn off receive interrupts. 2088 */ 2089 sc->sc_rbput = put; 2090 sc->sc_rbavail = cc; 2091 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2092 sc->sc_rx_ready = 1; 2093 2094 /* 2095 * See if we are in danger of overflowing a buffer. If 2096 * so, use hardware flow control to ease the pressure. 2097 */ 2098 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2099 cc < sc->sc_r_hiwat) { 2100 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2101 com_hwiflow(sc); 2102 } 2103 2104 /* 2105 * If we're out of space, disable receive interrupts 2106 * until the queue has drained a bit. 2107 */ 2108 if (!cc) { 2109 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2110 CLR(sc->sc_ier, IER_ERXRDY); 2111 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2112 } 2113 } else { 2114 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2115 bus_space_write_1(iot, ioh, com_ier, 0); 2116 delay(10); 2117 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2118 continue; 2119 } 2120 } 2121 2122 msr = bus_space_read_1(iot, ioh, com_msr); 2123 delta = msr ^ sc->sc_msr; 2124 sc->sc_msr = msr; 2125 /* 2126 * Pulse-per-second (PSS) signals on edge of DCD? 2127 * Process these even if line discipline is ignoring DCD. 2128 */ 2129 if (delta & sc->sc_ppsmask) { 2130 struct timeval tv; 2131 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2132 /* XXX nanotime() */ 2133 microtime(&tv); 2134 TIMEVAL_TO_TIMESPEC(&tv, 2135 &sc->ppsinfo.assert_timestamp); 2136 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2137 timespecadd(&sc->ppsinfo.assert_timestamp, 2138 &sc->ppsparam.assert_offset, 2139 &sc->ppsinfo.assert_timestamp); 2140 } 2141 2142 #ifdef PPS_SYNC 2143 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2144 hardpps(&tv, tv.tv_usec); 2145 #endif 2146 sc->ppsinfo.assert_sequence++; 2147 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2148 2149 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2150 /* XXX nanotime() */ 2151 microtime(&tv); 2152 TIMEVAL_TO_TIMESPEC(&tv, 2153 &sc->ppsinfo.clear_timestamp); 2154 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2155 timespecadd(&sc->ppsinfo.clear_timestamp, 2156 &sc->ppsparam.clear_offset, 2157 &sc->ppsinfo.clear_timestamp); 2158 } 2159 2160 #ifdef PPS_SYNC 2161 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2162 hardpps(&tv, tv.tv_usec); 2163 #endif 2164 sc->ppsinfo.clear_sequence++; 2165 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2166 } 2167 } 2168 2169 /* 2170 * Process normal status changes 2171 */ 2172 if (ISSET(delta, sc->sc_msr_mask)) { 2173 SET(sc->sc_msr_delta, delta); 2174 2175 /* 2176 * Stop output immediately if we lose the output 2177 * flow control signal or carrier detect. 2178 */ 2179 if (ISSET(~msr, sc->sc_msr_mask)) { 2180 sc->sc_tbc = 0; 2181 sc->sc_heldtbc = 0; 2182 #ifdef COM_DEBUG 2183 if (com_debug) 2184 comstatus(sc, "comintr "); 2185 #endif 2186 } 2187 2188 sc->sc_st_check = 1; 2189 } 2190 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2191 || ((iir & IIR_IMASK) == 0)); 2192 2193 /* 2194 * Done handling any receive interrupts. See if data can be 2195 * transmitted as well. Schedule tx done event if no data left 2196 * and tty was marked busy. 2197 */ 2198 if (ISSET(lsr, LSR_TXRDY)) { 2199 /* 2200 * If we've delayed a parameter change, do it now, and restart 2201 * output. 2202 */ 2203 if (sc->sc_heldchange) { 2204 com_loadchannelregs(sc); 2205 sc->sc_heldchange = 0; 2206 sc->sc_tbc = sc->sc_heldtbc; 2207 sc->sc_heldtbc = 0; 2208 } 2209 2210 /* Output the next chunk of the contiguous buffer, if any. */ 2211 if (sc->sc_tbc > 0) { 2212 int n; 2213 2214 n = sc->sc_tbc; 2215 if (n > sc->sc_fifolen) 2216 n = sc->sc_fifolen; 2217 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2218 sc->sc_tbc -= n; 2219 sc->sc_tba += n; 2220 } else { 2221 /* Disable transmit completion interrupts if necessary. */ 2222 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2223 CLR(sc->sc_ier, IER_ETXRDY); 2224 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2225 } 2226 if (sc->sc_tx_busy) { 2227 sc->sc_tx_busy = 0; 2228 sc->sc_tx_done = 1; 2229 } 2230 } 2231 } 2232 2233 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2234 goto again; 2235 2236 COM_UNLOCK(sc); 2237 2238 /* Wake up the poller. */ 2239 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2240 softintr_schedule(sc->sc_si); 2241 #else 2242 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2243 setsoftserial(); 2244 #else 2245 if (!com_softintr_scheduled) { 2246 com_softintr_scheduled = 1; 2247 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2248 } 2249 #endif 2250 #endif 2251 2252 #if NRND > 0 && defined(RND_COM) 2253 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2254 #endif 2255 2256 return (1); 2257 } 2258 2259 /* 2260 * The following functions are polled getc and putc routines, shared 2261 * by the console and kgdb glue. 2262 * 2263 * The read-ahead code is so that you can detect pending in-band 2264 * cn_magic in polled mode while doing output rather than having to 2265 * wait until the kernel decides it needs input. 2266 */ 2267 2268 #define MAX_READAHEAD 20 2269 static int com_readahead[MAX_READAHEAD]; 2270 static int com_readaheadcount = 0; 2271 2272 int 2273 com_common_getc(dev, iot, ioh) 2274 dev_t dev; 2275 bus_space_tag_t iot; 2276 bus_space_handle_t ioh; 2277 { 2278 int s = splserial(); 2279 u_char stat, c; 2280 2281 /* got a character from reading things earlier */ 2282 if (com_readaheadcount > 0) { 2283 int i; 2284 2285 c = com_readahead[0]; 2286 for (i = 1; i < com_readaheadcount; i++) { 2287 com_readahead[i-1] = com_readahead[i]; 2288 } 2289 com_readaheadcount--; 2290 splx(s); 2291 return (c); 2292 } 2293 2294 /* block until a character becomes available */ 2295 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2296 ; 2297 2298 c = bus_space_read_1(iot, ioh, com_data); 2299 stat = bus_space_read_1(iot, ioh, com_iir); 2300 { 2301 int cn_trapped = 0; /* unused */ 2302 #ifdef DDB 2303 extern int db_active; 2304 if (!db_active) 2305 #endif 2306 cn_check_magic(dev, c, com_cnm_state); 2307 } 2308 splx(s); 2309 return (c); 2310 } 2311 2312 void 2313 com_common_putc(dev, iot, ioh, c) 2314 dev_t dev; 2315 bus_space_tag_t iot; 2316 bus_space_handle_t ioh; 2317 int c; 2318 { 2319 int s = splserial(); 2320 int timo; 2321 2322 int cin, stat; 2323 if (com_readaheadcount < MAX_READAHEAD 2324 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2325 int cn_trapped = 0; 2326 cin = bus_space_read_1(iot, ioh, com_data); 2327 stat = bus_space_read_1(iot, ioh, com_iir); 2328 cn_check_magic(dev, cin, com_cnm_state); 2329 com_readahead[com_readaheadcount++] = cin; 2330 } 2331 2332 /* wait for any pending transmission to finish */ 2333 timo = 150000; 2334 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2335 continue; 2336 2337 bus_space_write_1(iot, ioh, com_data, c); 2338 COM_BARRIER(iot, ioh, BR | BW); 2339 2340 /* wait for this transmission to complete */ 2341 timo = 1500000; 2342 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2343 continue; 2344 2345 splx(s); 2346 } 2347 2348 /* 2349 * Initialize UART for use as console or KGDB line. 2350 */ 2351 int 2352 cominit(iot, iobase, rate, frequency, cflag, iohp) 2353 bus_space_tag_t iot; 2354 bus_addr_t iobase; 2355 int rate, frequency; 2356 tcflag_t cflag; 2357 bus_space_handle_t *iohp; 2358 { 2359 bus_space_handle_t ioh; 2360 2361 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2362 return (ENOMEM); /* ??? */ 2363 2364 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2365 bus_space_write_1(iot, ioh, com_efr, 0); 2366 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2367 rate = comspeed(rate, frequency); 2368 bus_space_write_1(iot, ioh, com_dlbl, rate); 2369 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2370 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2371 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2372 bus_space_write_1(iot, ioh, com_fifo, 2373 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2374 bus_space_write_1(iot, ioh, com_ier, 0); 2375 2376 *iohp = ioh; 2377 return (0); 2378 } 2379 2380 /* 2381 * Following are all routines needed for COM to act as console 2382 */ 2383 struct consdev comcons = { 2384 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2385 NODEV, CN_NORMAL 2386 }; 2387 2388 2389 int 2390 comcnattach(iot, iobase, rate, frequency, cflag) 2391 bus_space_tag_t iot; 2392 bus_addr_t iobase; 2393 int rate, frequency; 2394 tcflag_t cflag; 2395 { 2396 int res; 2397 2398 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2399 if (res) 2400 return (res); 2401 2402 cn_tab = &comcons; 2403 cn_init_magic(&com_cnm_state); 2404 cn_set_magic("\047\001"); /* default magic is BREAK */ 2405 2406 comconstag = iot; 2407 comconsaddr = iobase; 2408 comconsrate = rate; 2409 comconscflag = cflag; 2410 2411 return (0); 2412 } 2413 2414 int 2415 comcngetc(dev) 2416 dev_t dev; 2417 { 2418 return (com_common_getc(dev, comconstag, comconsioh)); 2419 } 2420 2421 /* 2422 * Console kernel output character routine. 2423 */ 2424 void 2425 comcnputc(dev, c) 2426 dev_t dev; 2427 int c; 2428 { 2429 com_common_putc(dev, comconstag, comconsioh, c); 2430 } 2431 2432 void 2433 comcnpollc(dev, on) 2434 dev_t dev; 2435 int on; 2436 { 2437 2438 } 2439 2440 #ifdef KGDB 2441 int 2442 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2443 bus_space_tag_t iot; 2444 bus_addr_t iobase; 2445 int rate, frequency; 2446 tcflag_t cflag; 2447 { 2448 int res; 2449 2450 if (iot == comconstag && iobase == comconsaddr) 2451 return (EBUSY); /* cannot share with console */ 2452 2453 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2454 if (res) 2455 return (res); 2456 2457 /* 2458 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2459 * expects this to be initialized 2460 */ 2461 cn_init_magic(&com_cnm_state); 2462 cn_set_magic("\047\001"); 2463 2464 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2465 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2466 2467 com_kgdb_iot = iot; 2468 com_kgdb_addr = iobase; 2469 2470 return (0); 2471 } 2472 2473 /* ARGSUSED */ 2474 int 2475 com_kgdb_getc(arg) 2476 void *arg; 2477 { 2478 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2479 } 2480 2481 /* ARGSUSED */ 2482 void 2483 com_kgdb_putc(arg, c) 2484 void *arg; 2485 int c; 2486 { 2487 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2488 } 2489 #endif /* KGDB */ 2490 2491 /* helper function to identify the com ports used by 2492 console or KGDB (and not yet autoconf attached) */ 2493 int 2494 com_is_console(iot, iobase, ioh) 2495 bus_space_tag_t iot; 2496 bus_addr_t iobase; 2497 bus_space_handle_t *ioh; 2498 { 2499 bus_space_handle_t help; 2500 2501 if (!comconsattached && 2502 iot == comconstag && iobase == comconsaddr) 2503 help = comconsioh; 2504 #ifdef KGDB 2505 else if (!com_kgdb_attached && 2506 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2507 help = com_kgdb_ioh; 2508 #endif 2509 else 2510 return (0); 2511 2512 if (ioh) 2513 *ioh = help; 2514 return (1); 2515 } 2516
Indexes created Wed Sep 24 15:09:51 GMT 2025