com.c revision 1.196.2.1
1 /* $NetBSD: com.c,v 1.196.2.1 2002/05/16 12:18:37 gehenna Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.196.2.1 2002/05/16 12:18:37 gehenna Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 86 #include "rnd.h" 87 #if NRND > 0 && defined(RND_COM) 88 #include <sys/rnd.h> 89 #endif 90 91 /* 92 * Override cnmagic(9) macro before including <sys/systm.h>. 93 * We need to know if cn_check_magic triggered debugger, so set a flag. 94 * Callers of cn_check_magic must declare int cn_trapped = 0; 95 * XXX: this is *ugly*! 96 */ 97 #define cn_trap() \ 98 do { \ 99 console_debugger(); \ 100 cn_trapped = 1; \ 101 } while (/* CONSTCOND */ 0) 102 103 #include <sys/param.h> 104 #include <sys/systm.h> 105 #include <sys/ioctl.h> 106 #include <sys/select.h> 107 #include <sys/tty.h> 108 #include <sys/proc.h> 109 #include <sys/user.h> 110 #include <sys/conf.h> 111 #include <sys/file.h> 112 #include <sys/uio.h> 113 #include <sys/kernel.h> 114 #include <sys/syslog.h> 115 #include <sys/device.h> 116 #include <sys/malloc.h> 117 #include <sys/timepps.h> 118 #include <sys/vnode.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 135 #endif 136 137 static void com_enable_debugport __P((struct com_softc *)); 138 139 void com_config __P((struct com_softc *)); 140 void com_shutdown __P((struct com_softc *)); 141 int comspeed __P((long, long)); 142 static u_char cflag2lcr __P((tcflag_t)); 143 int comparam __P((struct tty *, struct termios *)); 144 void comstart __P((struct tty *)); 145 int comhwiflow __P((struct tty *, int)); 146 147 void com_loadchannelregs __P((struct com_softc *)); 148 void com_hwiflow __P((struct com_softc *)); 149 void com_break __P((struct com_softc *, int)); 150 void com_modem __P((struct com_softc *, int)); 151 void tiocm_to_com __P((struct com_softc *, u_long, int)); 152 int com_to_tiocm __P((struct com_softc *)); 153 void com_iflush __P((struct com_softc *)); 154 155 int com_common_getc __P((dev_t, bus_space_tag_t, bus_space_handle_t)); 156 void com_common_putc __P((dev_t, bus_space_tag_t, bus_space_handle_t, int)); 157 158 int cominit __P((bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 159 bus_space_handle_t *)); 160 161 int comcngetc __P((dev_t)); 162 void comcnputc __P((dev_t, int)); 163 void comcnpollc __P((dev_t, int)); 164 165 #define integrate static inline 166 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 167 void comsoft __P((void *)); 168 #else 169 #ifndef __NO_SOFT_SERIAL_INTERRUPT 170 void comsoft __P((void)); 171 #else 172 void comsoft __P((void *)); 173 struct callout comsoft_callout = CALLOUT_INITIALIZER; 174 #endif 175 #endif 176 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 177 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 178 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 179 integrate void com_schedrx __P((struct com_softc *)); 180 void comdiag __P((void *)); 181 182 extern struct cfdriver com_cd; 183 184 dev_type_open(comopen); 185 dev_type_close(comclose); 186 dev_type_read(comread); 187 dev_type_write(comwrite); 188 dev_type_ioctl(comioctl); 189 dev_type_stop(comstop); 190 dev_type_tty(comtty); 191 dev_type_poll(compoll); 192 193 const struct cdevsw com_cdevsw = { 194 comopen, comclose, comread, comwrite, comioctl, 195 comstop, comtty, compoll, nommap, D_TTY 196 }; 197 198 /* 199 * Make this an option variable one can patch. 200 * But be warned: this must be a power of 2! 201 */ 202 u_int com_rbuf_size = COM_RING_SIZE; 203 204 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 205 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 206 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 207 208 static bus_addr_t comconsaddr; 209 static bus_space_tag_t comconstag; 210 static bus_space_handle_t comconsioh; 211 static int comconsattached; 212 static int comconsrate; 213 static tcflag_t comconscflag; 214 static struct cnm_state com_cnm_state; 215 216 static int ppscap = 217 PPS_TSFMT_TSPEC | 218 PPS_CAPTUREASSERT | 219 PPS_CAPTURECLEAR | 220 #ifdef PPS_SYNC 221 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 222 #endif /* PPS_SYNC */ 223 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 224 225 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 226 #ifdef __NO_SOFT_SERIAL_INTERRUPT 227 volatile int com_softintr_scheduled; 228 #endif 229 #endif 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static bus_addr_t com_kgdb_addr; 235 static bus_space_tag_t com_kgdb_iot; 236 static bus_space_handle_t com_kgdb_ioh; 237 static int com_kgdb_attached; 238 239 int com_kgdb_getc __P((void *)); 240 void com_kgdb_putc __P((void *, int)); 241 #endif /* KGDB */ 242 243 #define COMUNIT_MASK 0x7ffff 244 #define COMDIALOUT_MASK 0x80000 245 246 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 247 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 248 249 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 250 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 251 252 #define BR BUS_SPACE_BARRIER_READ 253 #define BW BUS_SPACE_BARRIER_WRITE 254 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 255 256 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 257 258 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 259 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 260 261 #else 262 263 #define COM_LOCK(sc) 264 #define COM_UNLOCK(sc) 265 266 #endif 267 268 int 269 comspeed(speed, frequency) 270 long speed, frequency; 271 { 272 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 273 274 int x, err; 275 276 #if 0 277 if (speed == 0) 278 return (0); 279 #endif 280 if (speed <= 0) 281 return (-1); 282 x = divrnd(frequency / 16, speed); 283 if (x <= 0) 284 return (-1); 285 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 286 if (err < 0) 287 err = -err; 288 if (err > COM_TOLERANCE) 289 return (-1); 290 return (x); 291 292 #undef divrnd 293 } 294 295 #ifdef COM_DEBUG 296 int com_debug = 0; 297 298 void comstatus __P((struct com_softc *, char *)); 299 void 300 comstatus(sc, str) 301 struct com_softc *sc; 302 char *str; 303 { 304 struct tty *tp = sc->sc_tty; 305 306 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 309 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 310 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 311 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 312 sc->sc_tx_stopped ? "+" : "-"); 313 314 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 315 sc->sc_dev.dv_xname, str, 316 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 317 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 318 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 319 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 320 sc->sc_rx_flags); 321 } 322 #endif 323 324 int 325 comprobe1(iot, ioh) 326 bus_space_tag_t iot; 327 bus_space_handle_t ioh; 328 { 329 330 /* force access to id reg */ 331 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 332 bus_space_write_1(iot, ioh, com_iir, 0); 333 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 334 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 335 return (0); 336 337 return (1); 338 } 339 340 #ifdef COM_HAYESP 341 int 342 comprobeHAYESP(hayespioh, sc) 343 bus_space_handle_t hayespioh; 344 struct com_softc *sc; 345 { 346 char val, dips; 347 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 348 bus_space_tag_t iot = sc->sc_iot; 349 350 /* 351 * Hayes ESP cards have two iobases. One is for compatibility with 352 * 16550 serial chips, and at the same ISA PC base addresses. The 353 * other is for ESP-specific enhanced features, and lies at a 354 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 355 */ 356 357 /* Test for ESP signature */ 358 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 359 return (0); 360 361 /* 362 * ESP is present at ESP enhanced base address; unknown com port 363 */ 364 365 /* Get the dip-switch configurations */ 366 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 367 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 368 369 /* Determine which com port this ESP card services: bits 0,1 of */ 370 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 371 if (sc->sc_iobase != combaselist[dips & 0x03]) 372 return (0); 373 374 printf(": ESP"); 375 376 /* Check ESP Self Test bits. */ 377 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 378 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 379 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 380 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 381 if ((val & 0x70) < 0x20) { 382 printf("-old (%o)", val & 0x70); 383 /* we do not support the necessary features */ 384 return (0); 385 } 386 387 /* Check for ability to emulate 16550: bit 8 == 1 */ 388 if ((dips & 0x80) == 0) { 389 printf(" slave"); 390 /* XXX Does slave really mean no 16550 support?? */ 391 return (0); 392 } 393 394 /* 395 * If we made it this far, we are a full-featured ESP v2.0 (or 396 * better), at the correct com port address. 397 */ 398 399 SET(sc->sc_hwflags, COM_HW_HAYESP); 400 printf(", 1024 byte fifo\n"); 401 return (1); 402 } 403 #endif 404 405 static void 406 com_enable_debugport(sc) 407 struct com_softc *sc; 408 { 409 int s; 410 411 /* Turn on line break interrupt, set carrier. */ 412 s = splserial(); 413 COM_LOCK(sc); 414 sc->sc_ier = IER_ERXRDY; 415 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 416 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 417 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 418 COM_UNLOCK(sc); 419 splx(s); 420 } 421 422 void 423 com_attach_subr(sc) 424 struct com_softc *sc; 425 { 426 bus_addr_t iobase = sc->sc_iobase; 427 bus_space_tag_t iot = sc->sc_iot; 428 bus_space_handle_t ioh = sc->sc_ioh; 429 struct tty *tp; 430 #ifdef COM16650 431 u_int8_t lcr; 432 #endif 433 #ifdef COM_HAYESP 434 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 435 int *hayespp; 436 #endif 437 438 callout_init(&sc->sc_diag_callout); 439 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 440 simple_lock_init(&sc->sc_lock); 441 #endif 442 443 /* Disable interrupts before configuring the device. */ 444 sc->sc_ier = 0; 445 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 446 447 if (iot == comconstag && iobase == comconsaddr) { 448 comconsattached = 1; 449 450 /* Make sure the console is always "hardwired". */ 451 delay(1000); /* wait for output to finish */ 452 SET(sc->sc_hwflags, COM_HW_CONSOLE); 453 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 454 } 455 456 #ifdef COM_HAYESP 457 sc->sc_prescaler = 0; /* set prescaler to x1. */ 458 459 /* Look for a Hayes ESP board. */ 460 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 461 bus_space_handle_t hayespioh; 462 463 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 464 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 465 continue; 466 if (comprobeHAYESP(hayespioh, sc)) { 467 sc->sc_hayespioh = hayespioh; 468 sc->sc_fifolen = 1024; 469 470 break; 471 } 472 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 473 } 474 /* No ESP; look for other things. */ 475 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 476 #endif 477 sc->sc_fifolen = 1; 478 /* look for a NS 16550AF UART with FIFOs */ 479 bus_space_write_1(iot, ioh, com_fifo, 480 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 481 delay(100); 482 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 483 == IIR_FIFO_MASK) 484 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 485 == FIFO_TRIGGER_14) { 486 SET(sc->sc_hwflags, COM_HW_FIFO); 487 488 #ifdef COM16650 489 /* 490 * IIR changes into the EFR if LCR is set to LCR_EERS 491 * on 16650s. We also know IIR != 0 at this point. 492 * Write 0 into the EFR, and read it. If the result 493 * is 0, we have a 16650. 494 * 495 * Older 16650s were broken; the test to detect them 496 * is taken from the Linux driver. Apparently 497 * setting DLAB enable gives access to the EFR on 498 * these chips. 499 */ 500 lcr = bus_space_read_1(iot, ioh, com_lcr); 501 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 502 bus_space_write_1(iot, ioh, com_efr, 0); 503 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 504 bus_space_write_1(iot, ioh, com_lcr, 505 lcr | LCR_DLAB); 506 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 507 CLR(sc->sc_hwflags, COM_HW_FIFO); 508 sc->sc_fifolen = 0; 509 } else { 510 SET(sc->sc_hwflags, COM_HW_FLOW); 511 sc->sc_fifolen = 32; 512 } 513 } else 514 #endif 515 sc->sc_fifolen = 16; 516 517 #ifdef COM16650 518 bus_space_write_1(iot, ioh, com_lcr, lcr); 519 if (sc->sc_fifolen == 0) 520 printf(": st16650, broken fifo\n"); 521 else if (sc->sc_fifolen == 32) 522 printf(": st16650a, working fifo\n"); 523 else 524 #endif 525 printf(": ns16550a, working fifo\n"); 526 } else 527 printf(": ns16550, broken fifo\n"); 528 else 529 printf(": ns8250 or ns16450, no fifo\n"); 530 bus_space_write_1(iot, ioh, com_fifo, 0); 531 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 532 sc->sc_fifolen = 1; 533 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 534 } 535 #ifdef COM_HAYESP 536 } 537 #endif 538 539 tp = ttymalloc(); 540 tp->t_oproc = comstart; 541 tp->t_param = comparam; 542 tp->t_hwiflow = comhwiflow; 543 544 sc->sc_tty = tp; 545 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 546 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 547 sc->sc_rbavail = com_rbuf_size; 548 if (sc->sc_rbuf == NULL) { 549 printf("%s: unable to allocate ring buffer\n", 550 sc->sc_dev.dv_xname); 551 return; 552 } 553 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 554 555 tty_attach(tp); 556 557 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 558 SET(sc->sc_mcr, MCR_IENABLE); 559 560 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 561 int maj; 562 563 /* locate the major number */ 564 maj = cdevsw_lookup_major(&com_cdevsw); 565 566 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 567 568 printf("%s: console\n", sc->sc_dev.dv_xname); 569 } 570 571 #ifdef KGDB 572 /* 573 * Allow kgdb to "take over" this port. If this is 574 * the kgdb device, it has exclusive use. 575 */ 576 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 577 com_kgdb_attached = 1; 578 579 SET(sc->sc_hwflags, COM_HW_KGDB); 580 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 581 } 582 #endif 583 584 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 585 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 586 #endif 587 588 #if NRND > 0 && defined(RND_COM) 589 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 590 RND_TYPE_TTY, 0); 591 #endif 592 593 /* if there are no enable/disable functions, assume the device 594 is always enabled */ 595 if (!sc->enable) 596 sc->enabled = 1; 597 598 com_config(sc); 599 600 SET(sc->sc_hwflags, COM_HW_DEV_OK); 601 } 602 603 void 604 com_config(sc) 605 struct com_softc *sc; 606 { 607 bus_space_tag_t iot = sc->sc_iot; 608 bus_space_handle_t ioh = sc->sc_ioh; 609 610 /* Disable interrupts before configuring the device. */ 611 sc->sc_ier = 0; 612 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 613 614 #ifdef COM_HAYESP 615 /* Look for a Hayes ESP board. */ 616 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 617 sc->sc_fifolen = 1024; 618 619 /* Set 16550 compatibility mode */ 620 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 621 HAYESP_SETMODE); 622 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 623 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 624 HAYESP_MODE_SCALE); 625 626 /* Set RTS/CTS flow control */ 627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 628 HAYESP_SETFLOWTYPE); 629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 630 HAYESP_FLOW_RTS); 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 632 HAYESP_FLOW_CTS); 633 634 /* Set flow control levels */ 635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 636 HAYESP_SETRXFLOW); 637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 638 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 639 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 640 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 642 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 644 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 645 } 646 #endif 647 648 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 649 com_enable_debugport(sc); 650 } 651 652 int 653 com_detach(self, flags) 654 struct device *self; 655 int flags; 656 { 657 struct com_softc *sc = (struct com_softc *)self; 658 int maj, mn; 659 660 /* locate the major number */ 661 maj = cdevsw_lookup_major(&com_cdevsw); 662 663 /* Nuke the vnodes for any open instances. */ 664 mn = self->dv_unit; 665 vdevgone(maj, mn, mn, VCHR); 666 667 mn |= COMDIALOUT_MASK; 668 vdevgone(maj, mn, mn, VCHR); 669 670 if (sc->sc_rbuf == NULL) { 671 /* 672 * Ring buffer allocation failed in the com_attach_subr, 673 * only the tty is allocated, and nothing else. 674 */ 675 ttyfree(sc->sc_tty); 676 return 0; 677 } 678 679 /* Free the receive buffer. */ 680 free(sc->sc_rbuf, M_DEVBUF); 681 682 /* Detach and free the tty. */ 683 tty_detach(sc->sc_tty); 684 ttyfree(sc->sc_tty); 685 686 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 687 /* Unhook the soft interrupt handler. */ 688 softintr_disestablish(sc->sc_si); 689 #endif 690 691 #if NRND > 0 && defined(RND_COM) 692 /* Unhook the entropy source. */ 693 rnd_detach_source(&sc->rnd_source); 694 #endif 695 696 return (0); 697 } 698 699 int 700 com_activate(self, act) 701 struct device *self; 702 enum devact act; 703 { 704 struct com_softc *sc = (struct com_softc *)self; 705 int s, rv = 0; 706 707 s = splserial(); 708 COM_LOCK(sc); 709 switch (act) { 710 case DVACT_ACTIVATE: 711 rv = EOPNOTSUPP; 712 break; 713 714 case DVACT_DEACTIVATE: 715 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 716 rv = EBUSY; 717 break; 718 } 719 720 if (sc->disable != NULL && sc->enabled != 0) { 721 (*sc->disable)(sc); 722 sc->enabled = 0; 723 } 724 break; 725 } 726 727 COM_UNLOCK(sc); 728 splx(s); 729 return (rv); 730 } 731 732 void 733 com_shutdown(sc) 734 struct com_softc *sc; 735 { 736 struct tty *tp = sc->sc_tty; 737 int s; 738 739 s = splserial(); 740 COM_LOCK(sc); 741 742 /* If we were asserting flow control, then deassert it. */ 743 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 744 com_hwiflow(sc); 745 746 /* Clear any break condition set with TIOCSBRK. */ 747 com_break(sc, 0); 748 749 /* Turn off PPS capture on last close. */ 750 sc->sc_ppsmask = 0; 751 sc->ppsparam.mode = 0; 752 753 /* 754 * Hang up if necessary. Wait a bit, so the other side has time to 755 * notice even if we immediately open the port again. 756 * Avoid tsleeping above splhigh(). 757 */ 758 if (ISSET(tp->t_cflag, HUPCL)) { 759 com_modem(sc, 0); 760 COM_UNLOCK(sc); 761 splx(s); 762 /* XXX tsleep will only timeout */ 763 (void) tsleep(sc, TTIPRI, ttclos, hz); 764 s = splserial(); 765 COM_LOCK(sc); 766 } 767 768 /* Turn off interrupts. */ 769 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 770 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 771 else 772 sc->sc_ier = 0; 773 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 774 775 if (sc->disable) { 776 #ifdef DIAGNOSTIC 777 if (!sc->enabled) 778 panic("com_shutdown: not enabled?"); 779 #endif 780 (*sc->disable)(sc); 781 sc->enabled = 0; 782 } 783 COM_UNLOCK(sc); 784 splx(s); 785 } 786 787 int 788 comopen(dev, flag, mode, p) 789 dev_t dev; 790 int flag, mode; 791 struct proc *p; 792 { 793 struct com_softc *sc; 794 struct tty *tp; 795 int s, s2; 796 int error; 797 798 sc = device_lookup(&com_cd, COMUNIT(dev)); 799 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 800 sc->sc_rbuf == NULL) 801 return (ENXIO); 802 803 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 804 return (ENXIO); 805 806 #ifdef KGDB 807 /* 808 * If this is the kgdb port, no other use is permitted. 809 */ 810 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 811 return (EBUSY); 812 #endif 813 814 tp = sc->sc_tty; 815 816 if (ISSET(tp->t_state, TS_ISOPEN) && 817 ISSET(tp->t_state, TS_XCLUDE) && 818 p->p_ucred->cr_uid != 0) 819 return (EBUSY); 820 821 s = spltty(); 822 823 /* 824 * Do the following iff this is a first open. 825 */ 826 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 827 struct termios t; 828 829 tp->t_dev = dev; 830 831 s2 = splserial(); 832 COM_LOCK(sc); 833 834 if (sc->enable) { 835 if ((*sc->enable)(sc)) { 836 COM_UNLOCK(sc); 837 splx(s2); 838 splx(s); 839 printf("%s: device enable failed\n", 840 sc->sc_dev.dv_xname); 841 return (EIO); 842 } 843 sc->enabled = 1; 844 com_config(sc); 845 } 846 847 /* Turn on interrupts. */ 848 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 849 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 850 851 /* Fetch the current modem control status, needed later. */ 852 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 853 854 /* Clear PPS capture state on first open. */ 855 sc->sc_ppsmask = 0; 856 sc->ppsparam.mode = 0; 857 858 COM_UNLOCK(sc); 859 splx(s2); 860 861 /* 862 * Initialize the termios status to the defaults. Add in the 863 * sticky bits from TIOCSFLAGS. 864 */ 865 t.c_ispeed = 0; 866 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 867 t.c_ospeed = comconsrate; 868 t.c_cflag = comconscflag; 869 } else { 870 t.c_ospeed = TTYDEF_SPEED; 871 t.c_cflag = TTYDEF_CFLAG; 872 } 873 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 874 SET(t.c_cflag, CLOCAL); 875 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 876 SET(t.c_cflag, CRTSCTS); 877 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 878 SET(t.c_cflag, MDMBUF); 879 /* Make sure comparam() will do something. */ 880 tp->t_ospeed = 0; 881 (void) comparam(tp, &t); 882 tp->t_iflag = TTYDEF_IFLAG; 883 tp->t_oflag = TTYDEF_OFLAG; 884 tp->t_lflag = TTYDEF_LFLAG; 885 ttychars(tp); 886 ttsetwater(tp); 887 888 s2 = splserial(); 889 COM_LOCK(sc); 890 891 /* 892 * Turn on DTR. We must always do this, even if carrier is not 893 * present, because otherwise we'd have to use TIOCSDTR 894 * immediately after setting CLOCAL, which applications do not 895 * expect. We always assert DTR while the device is open 896 * unless explicitly requested to deassert it. 897 */ 898 com_modem(sc, 1); 899 900 /* Clear the input ring, and unblock. */ 901 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 902 sc->sc_rbavail = com_rbuf_size; 903 com_iflush(sc); 904 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 905 com_hwiflow(sc); 906 907 #ifdef COM_DEBUG 908 if (com_debug) 909 comstatus(sc, "comopen "); 910 #endif 911 912 COM_UNLOCK(sc); 913 splx(s2); 914 } 915 916 splx(s); 917 918 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 919 if (error) 920 goto bad; 921 922 error = (*tp->t_linesw->l_open)(dev, tp); 923 if (error) 924 goto bad; 925 926 return (0); 927 928 bad: 929 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 930 /* 931 * We failed to open the device, and nobody else had it opened. 932 * Clean up the state as appropriate. 933 */ 934 com_shutdown(sc); 935 } 936 937 return (error); 938 } 939 940 int 941 comclose(dev, flag, mode, p) 942 dev_t dev; 943 int flag, mode; 944 struct proc *p; 945 { 946 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 /* XXX This is for cons.c. */ 950 if (!ISSET(tp->t_state, TS_ISOPEN)) 951 return (0); 952 953 (*tp->t_linesw->l_close)(tp, flag); 954 ttyclose(tp); 955 956 if (COM_ISALIVE(sc) == 0) 957 return (0); 958 959 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 960 /* 961 * Although we got a last close, the device may still be in 962 * use; e.g. if this was the dialout node, and there are still 963 * processes waiting for carrier on the non-dialout node. 964 */ 965 com_shutdown(sc); 966 } 967 968 return (0); 969 } 970 971 int 972 comread(dev, uio, flag) 973 dev_t dev; 974 struct uio *uio; 975 int flag; 976 { 977 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 978 struct tty *tp = sc->sc_tty; 979 980 if (COM_ISALIVE(sc) == 0) 981 return (EIO); 982 983 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 984 } 985 986 int 987 comwrite(dev, uio, flag) 988 dev_t dev; 989 struct uio *uio; 990 int flag; 991 { 992 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 993 struct tty *tp = sc->sc_tty; 994 995 if (COM_ISALIVE(sc) == 0) 996 return (EIO); 997 998 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 999 } 1000 1001 int 1002 compoll(dev, events, p) 1003 dev_t dev; 1004 int events; 1005 struct proc *p; 1006 { 1007 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1008 struct tty *tp = sc->sc_tty; 1009 1010 if (COM_ISALIVE(sc) == 0) 1011 return (EIO); 1012 1013 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1014 } 1015 1016 struct tty * 1017 comtty(dev) 1018 dev_t dev; 1019 { 1020 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1021 struct tty *tp = sc->sc_tty; 1022 1023 return (tp); 1024 } 1025 1026 int 1027 comioctl(dev, cmd, data, flag, p) 1028 dev_t dev; 1029 u_long cmd; 1030 caddr_t data; 1031 int flag; 1032 struct proc *p; 1033 { 1034 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1035 struct tty *tp = sc->sc_tty; 1036 int error; 1037 int s; 1038 1039 if (COM_ISALIVE(sc) == 0) 1040 return (EIO); 1041 1042 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1043 if (error != EPASSTHROUGH) 1044 return (error); 1045 1046 error = ttioctl(tp, cmd, data, flag, p); 1047 if (error != EPASSTHROUGH) 1048 return (error); 1049 1050 error = 0; 1051 1052 s = splserial(); 1053 COM_LOCK(sc); 1054 1055 switch (cmd) { 1056 case TIOCSBRK: 1057 com_break(sc, 1); 1058 break; 1059 1060 case TIOCCBRK: 1061 com_break(sc, 0); 1062 break; 1063 1064 case TIOCSDTR: 1065 com_modem(sc, 1); 1066 break; 1067 1068 case TIOCCDTR: 1069 com_modem(sc, 0); 1070 break; 1071 1072 case TIOCGFLAGS: 1073 *(int *)data = sc->sc_swflags; 1074 break; 1075 1076 case TIOCSFLAGS: 1077 error = suser(p->p_ucred, &p->p_acflag); 1078 if (error) 1079 break; 1080 sc->sc_swflags = *(int *)data; 1081 break; 1082 1083 case TIOCMSET: 1084 case TIOCMBIS: 1085 case TIOCMBIC: 1086 tiocm_to_com(sc, cmd, *(int *)data); 1087 break; 1088 1089 case TIOCMGET: 1090 *(int *)data = com_to_tiocm(sc); 1091 break; 1092 1093 case PPS_IOC_CREATE: 1094 break; 1095 1096 case PPS_IOC_DESTROY: 1097 break; 1098 1099 case PPS_IOC_GETPARAMS: { 1100 pps_params_t *pp; 1101 pp = (pps_params_t *)data; 1102 *pp = sc->ppsparam; 1103 break; 1104 } 1105 1106 case PPS_IOC_SETPARAMS: { 1107 pps_params_t *pp; 1108 int mode; 1109 pp = (pps_params_t *)data; 1110 if (pp->mode & ~ppscap) { 1111 error = EINVAL; 1112 break; 1113 } 1114 sc->ppsparam = *pp; 1115 /* 1116 * Compute msr masks from user-specified timestamp state. 1117 */ 1118 mode = sc->ppsparam.mode; 1119 #ifdef PPS_SYNC 1120 if (mode & PPS_HARDPPSONASSERT) { 1121 mode |= PPS_CAPTUREASSERT; 1122 /* XXX revoke any previous HARDPPS source */ 1123 } 1124 if (mode & PPS_HARDPPSONCLEAR) { 1125 mode |= PPS_CAPTURECLEAR; 1126 /* XXX revoke any previous HARDPPS source */ 1127 } 1128 #endif /* PPS_SYNC */ 1129 switch (mode & PPS_CAPTUREBOTH) { 1130 case 0: 1131 sc->sc_ppsmask = 0; 1132 break; 1133 1134 case PPS_CAPTUREASSERT: 1135 sc->sc_ppsmask = MSR_DCD; 1136 sc->sc_ppsassert = MSR_DCD; 1137 sc->sc_ppsclear = -1; 1138 break; 1139 1140 case PPS_CAPTURECLEAR: 1141 sc->sc_ppsmask = MSR_DCD; 1142 sc->sc_ppsassert = -1; 1143 sc->sc_ppsclear = 0; 1144 break; 1145 1146 case PPS_CAPTUREBOTH: 1147 sc->sc_ppsmask = MSR_DCD; 1148 sc->sc_ppsassert = MSR_DCD; 1149 sc->sc_ppsclear = 0; 1150 break; 1151 1152 default: 1153 error = EINVAL; 1154 break; 1155 } 1156 break; 1157 } 1158 1159 case PPS_IOC_GETCAP: 1160 *(int*)data = ppscap; 1161 break; 1162 1163 case PPS_IOC_FETCH: { 1164 pps_info_t *pi; 1165 pi = (pps_info_t *)data; 1166 *pi = sc->ppsinfo; 1167 break; 1168 } 1169 1170 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1171 /* 1172 * Some GPS clocks models use the falling rather than 1173 * rising edge as the on-the-second signal. 1174 * The old API has no way to specify PPS polarity. 1175 */ 1176 sc->sc_ppsmask = MSR_DCD; 1177 #ifndef PPS_TRAILING_EDGE 1178 sc->sc_ppsassert = MSR_DCD; 1179 sc->sc_ppsclear = -1; 1180 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1181 &sc->ppsinfo.assert_timestamp); 1182 #else 1183 sc->sc_ppsassert = -1 1184 sc->sc_ppsclear = 0; 1185 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1186 &sc->ppsinfo.clear_timestamp); 1187 #endif 1188 break; 1189 1190 default: 1191 error = EPASSTHROUGH; 1192 break; 1193 } 1194 1195 COM_UNLOCK(sc); 1196 splx(s); 1197 1198 #ifdef COM_DEBUG 1199 if (com_debug) 1200 comstatus(sc, "comioctl "); 1201 #endif 1202 1203 return (error); 1204 } 1205 1206 integrate void 1207 com_schedrx(sc) 1208 struct com_softc *sc; 1209 { 1210 1211 sc->sc_rx_ready = 1; 1212 1213 /* Wake up the poller. */ 1214 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1215 softintr_schedule(sc->sc_si); 1216 #else 1217 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1218 setsoftserial(); 1219 #else 1220 if (!com_softintr_scheduled) { 1221 com_softintr_scheduled = 1; 1222 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1223 } 1224 #endif 1225 #endif 1226 } 1227 1228 void 1229 com_break(sc, onoff) 1230 struct com_softc *sc; 1231 int onoff; 1232 { 1233 1234 if (onoff) 1235 SET(sc->sc_lcr, LCR_SBREAK); 1236 else 1237 CLR(sc->sc_lcr, LCR_SBREAK); 1238 1239 if (!sc->sc_heldchange) { 1240 if (sc->sc_tx_busy) { 1241 sc->sc_heldtbc = sc->sc_tbc; 1242 sc->sc_tbc = 0; 1243 sc->sc_heldchange = 1; 1244 } else 1245 com_loadchannelregs(sc); 1246 } 1247 } 1248 1249 void 1250 com_modem(sc, onoff) 1251 struct com_softc *sc; 1252 int onoff; 1253 { 1254 1255 if (sc->sc_mcr_dtr == 0) 1256 return; 1257 1258 if (onoff) 1259 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1260 else 1261 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1262 1263 if (!sc->sc_heldchange) { 1264 if (sc->sc_tx_busy) { 1265 sc->sc_heldtbc = sc->sc_tbc; 1266 sc->sc_tbc = 0; 1267 sc->sc_heldchange = 1; 1268 } else 1269 com_loadchannelregs(sc); 1270 } 1271 } 1272 1273 void 1274 tiocm_to_com(sc, how, ttybits) 1275 struct com_softc *sc; 1276 u_long how; 1277 int ttybits; 1278 { 1279 u_char combits; 1280 1281 combits = 0; 1282 if (ISSET(ttybits, TIOCM_DTR)) 1283 SET(combits, MCR_DTR); 1284 if (ISSET(ttybits, TIOCM_RTS)) 1285 SET(combits, MCR_RTS); 1286 1287 switch (how) { 1288 case TIOCMBIC: 1289 CLR(sc->sc_mcr, combits); 1290 break; 1291 1292 case TIOCMBIS: 1293 SET(sc->sc_mcr, combits); 1294 break; 1295 1296 case TIOCMSET: 1297 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1298 SET(sc->sc_mcr, combits); 1299 break; 1300 } 1301 1302 if (!sc->sc_heldchange) { 1303 if (sc->sc_tx_busy) { 1304 sc->sc_heldtbc = sc->sc_tbc; 1305 sc->sc_tbc = 0; 1306 sc->sc_heldchange = 1; 1307 } else 1308 com_loadchannelregs(sc); 1309 } 1310 } 1311 1312 int 1313 com_to_tiocm(sc) 1314 struct com_softc *sc; 1315 { 1316 u_char combits; 1317 int ttybits = 0; 1318 1319 combits = sc->sc_mcr; 1320 if (ISSET(combits, MCR_DTR)) 1321 SET(ttybits, TIOCM_DTR); 1322 if (ISSET(combits, MCR_RTS)) 1323 SET(ttybits, TIOCM_RTS); 1324 1325 combits = sc->sc_msr; 1326 if (ISSET(combits, MSR_DCD)) 1327 SET(ttybits, TIOCM_CD); 1328 if (ISSET(combits, MSR_CTS)) 1329 SET(ttybits, TIOCM_CTS); 1330 if (ISSET(combits, MSR_DSR)) 1331 SET(ttybits, TIOCM_DSR); 1332 if (ISSET(combits, MSR_RI | MSR_TERI)) 1333 SET(ttybits, TIOCM_RI); 1334 1335 if (sc->sc_ier != 0) 1336 SET(ttybits, TIOCM_LE); 1337 1338 return (ttybits); 1339 } 1340 1341 static u_char 1342 cflag2lcr(cflag) 1343 tcflag_t cflag; 1344 { 1345 u_char lcr = 0; 1346 1347 switch (ISSET(cflag, CSIZE)) { 1348 case CS5: 1349 SET(lcr, LCR_5BITS); 1350 break; 1351 case CS6: 1352 SET(lcr, LCR_6BITS); 1353 break; 1354 case CS7: 1355 SET(lcr, LCR_7BITS); 1356 break; 1357 case CS8: 1358 SET(lcr, LCR_8BITS); 1359 break; 1360 } 1361 if (ISSET(cflag, PARENB)) { 1362 SET(lcr, LCR_PENAB); 1363 if (!ISSET(cflag, PARODD)) 1364 SET(lcr, LCR_PEVEN); 1365 } 1366 if (ISSET(cflag, CSTOPB)) 1367 SET(lcr, LCR_STOPB); 1368 1369 return (lcr); 1370 } 1371 1372 int 1373 comparam(tp, t) 1374 struct tty *tp; 1375 struct termios *t; 1376 { 1377 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1378 int ospeed; 1379 u_char lcr; 1380 int s; 1381 1382 if (COM_ISALIVE(sc) == 0) 1383 return (EIO); 1384 1385 #ifdef COM_HAYESP 1386 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1387 int prescaler, speed; 1388 1389 /* 1390 * Calculate UART clock prescaler. It should be in 1391 * range of 0 .. 3. 1392 */ 1393 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1394 prescaler++, speed /= 2) 1395 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1396 break; 1397 1398 if (prescaler == 4) 1399 return (EINVAL); 1400 sc->sc_prescaler = prescaler; 1401 } else 1402 #endif 1403 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1404 1405 /* Check requested parameters. */ 1406 if (ospeed < 0) 1407 return (EINVAL); 1408 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1409 return (EINVAL); 1410 1411 /* 1412 * For the console, always force CLOCAL and !HUPCL, so that the port 1413 * is always active. 1414 */ 1415 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1416 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1417 SET(t->c_cflag, CLOCAL); 1418 CLR(t->c_cflag, HUPCL); 1419 } 1420 1421 /* 1422 * If there were no changes, don't do anything. This avoids dropping 1423 * input and improves performance when all we did was frob things like 1424 * VMIN and VTIME. 1425 */ 1426 if (tp->t_ospeed == t->c_ospeed && 1427 tp->t_cflag == t->c_cflag) 1428 return (0); 1429 1430 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1431 1432 s = splserial(); 1433 COM_LOCK(sc); 1434 1435 sc->sc_lcr = lcr; 1436 1437 /* 1438 * If we're not in a mode that assumes a connection is present, then 1439 * ignore carrier changes. 1440 */ 1441 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1442 sc->sc_msr_dcd = 0; 1443 else 1444 sc->sc_msr_dcd = MSR_DCD; 1445 /* 1446 * Set the flow control pins depending on the current flow control 1447 * mode. 1448 */ 1449 if (ISSET(t->c_cflag, CRTSCTS)) { 1450 sc->sc_mcr_dtr = MCR_DTR; 1451 sc->sc_mcr_rts = MCR_RTS; 1452 sc->sc_msr_cts = MSR_CTS; 1453 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1454 } else if (ISSET(t->c_cflag, MDMBUF)) { 1455 /* 1456 * For DTR/DCD flow control, make sure we don't toggle DTR for 1457 * carrier detection. 1458 */ 1459 sc->sc_mcr_dtr = 0; 1460 sc->sc_mcr_rts = MCR_DTR; 1461 sc->sc_msr_cts = MSR_DCD; 1462 sc->sc_efr = 0; 1463 } else { 1464 /* 1465 * If no flow control, then always set RTS. This will make 1466 * the other side happy if it mistakenly thinks we're doing 1467 * RTS/CTS flow control. 1468 */ 1469 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1470 sc->sc_mcr_rts = 0; 1471 sc->sc_msr_cts = 0; 1472 sc->sc_efr = 0; 1473 if (ISSET(sc->sc_mcr, MCR_DTR)) 1474 SET(sc->sc_mcr, MCR_RTS); 1475 else 1476 CLR(sc->sc_mcr, MCR_RTS); 1477 } 1478 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1479 1480 #if 0 1481 if (ospeed == 0) 1482 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1483 else 1484 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1485 #endif 1486 1487 sc->sc_dlbl = ospeed; 1488 sc->sc_dlbh = ospeed >> 8; 1489 1490 /* 1491 * Set the FIFO threshold based on the receive speed. 1492 * 1493 * * If it's a low speed, it's probably a mouse or some other 1494 * interactive device, so set the threshold low. 1495 * * If it's a high speed, trim the trigger level down to prevent 1496 * overflows. 1497 * * Otherwise set it a bit higher. 1498 */ 1499 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1500 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1501 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1502 sc->sc_fifo = FIFO_ENABLE | 1503 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1504 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1505 else 1506 sc->sc_fifo = 0; 1507 1508 /* And copy to tty. */ 1509 tp->t_ispeed = 0; 1510 tp->t_ospeed = t->c_ospeed; 1511 tp->t_cflag = t->c_cflag; 1512 1513 if (!sc->sc_heldchange) { 1514 if (sc->sc_tx_busy) { 1515 sc->sc_heldtbc = sc->sc_tbc; 1516 sc->sc_tbc = 0; 1517 sc->sc_heldchange = 1; 1518 } else 1519 com_loadchannelregs(sc); 1520 } 1521 1522 if (!ISSET(t->c_cflag, CHWFLOW)) { 1523 /* Disable the high water mark. */ 1524 sc->sc_r_hiwat = 0; 1525 sc->sc_r_lowat = 0; 1526 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1527 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1528 com_schedrx(sc); 1529 } 1530 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1531 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1532 com_hwiflow(sc); 1533 } 1534 } else { 1535 sc->sc_r_hiwat = com_rbuf_hiwat; 1536 sc->sc_r_lowat = com_rbuf_lowat; 1537 } 1538 1539 COM_UNLOCK(sc); 1540 splx(s); 1541 1542 /* 1543 * Update the tty layer's idea of the carrier bit, in case we changed 1544 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1545 * explicit request. 1546 */ 1547 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1548 1549 #ifdef COM_DEBUG 1550 if (com_debug) 1551 comstatus(sc, "comparam "); 1552 #endif 1553 1554 if (!ISSET(t->c_cflag, CHWFLOW)) { 1555 if (sc->sc_tx_stopped) { 1556 sc->sc_tx_stopped = 0; 1557 comstart(tp); 1558 } 1559 } 1560 1561 return (0); 1562 } 1563 1564 void 1565 com_iflush(sc) 1566 struct com_softc *sc; 1567 { 1568 bus_space_tag_t iot = sc->sc_iot; 1569 bus_space_handle_t ioh = sc->sc_ioh; 1570 #ifdef DIAGNOSTIC 1571 int reg; 1572 #endif 1573 int timo; 1574 1575 #ifdef DIAGNOSTIC 1576 reg = 0xffff; 1577 #endif 1578 timo = 50000; 1579 /* flush any pending I/O */ 1580 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1581 && --timo) 1582 #ifdef DIAGNOSTIC 1583 reg = 1584 #else 1585 (void) 1586 #endif 1587 bus_space_read_1(iot, ioh, com_data); 1588 #ifdef DIAGNOSTIC 1589 if (!timo) 1590 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1591 reg); 1592 #endif 1593 } 1594 1595 void 1596 com_loadchannelregs(sc) 1597 struct com_softc *sc; 1598 { 1599 bus_space_tag_t iot = sc->sc_iot; 1600 bus_space_handle_t ioh = sc->sc_ioh; 1601 1602 /* XXXXX necessary? */ 1603 com_iflush(sc); 1604 1605 bus_space_write_1(iot, ioh, com_ier, 0); 1606 1607 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1608 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1609 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1610 } 1611 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1612 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1613 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1614 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1615 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1616 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1617 #ifdef COM_HAYESP 1618 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1619 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1620 HAYESP_SETPRESCALER); 1621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1622 sc->sc_prescaler); 1623 } 1624 #endif 1625 1626 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1627 } 1628 1629 int 1630 comhwiflow(tp, block) 1631 struct tty *tp; 1632 int block; 1633 { 1634 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1635 int s; 1636 1637 if (COM_ISALIVE(sc) == 0) 1638 return (0); 1639 1640 if (sc->sc_mcr_rts == 0) 1641 return (0); 1642 1643 s = splserial(); 1644 COM_LOCK(sc); 1645 1646 if (block) { 1647 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1648 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1649 com_hwiflow(sc); 1650 } 1651 } else { 1652 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1653 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1654 com_schedrx(sc); 1655 } 1656 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1657 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1658 com_hwiflow(sc); 1659 } 1660 } 1661 1662 COM_UNLOCK(sc); 1663 splx(s); 1664 return (1); 1665 } 1666 1667 /* 1668 * (un)block input via hw flowcontrol 1669 */ 1670 void 1671 com_hwiflow(sc) 1672 struct com_softc *sc; 1673 { 1674 bus_space_tag_t iot = sc->sc_iot; 1675 bus_space_handle_t ioh = sc->sc_ioh; 1676 1677 if (sc->sc_mcr_rts == 0) 1678 return; 1679 1680 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1681 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1682 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1683 } else { 1684 SET(sc->sc_mcr, sc->sc_mcr_rts); 1685 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1686 } 1687 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1688 } 1689 1690 1691 void 1692 comstart(tp) 1693 struct tty *tp; 1694 { 1695 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1696 bus_space_tag_t iot = sc->sc_iot; 1697 bus_space_handle_t ioh = sc->sc_ioh; 1698 int s; 1699 1700 if (COM_ISALIVE(sc) == 0) 1701 return; 1702 1703 s = spltty(); 1704 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1705 goto out; 1706 if (sc->sc_tx_stopped) 1707 goto out; 1708 1709 if (tp->t_outq.c_cc <= tp->t_lowat) { 1710 if (ISSET(tp->t_state, TS_ASLEEP)) { 1711 CLR(tp->t_state, TS_ASLEEP); 1712 wakeup(&tp->t_outq); 1713 } 1714 selwakeup(&tp->t_wsel); 1715 if (tp->t_outq.c_cc == 0) 1716 goto out; 1717 } 1718 1719 /* Grab the first contiguous region of buffer space. */ 1720 { 1721 u_char *tba; 1722 int tbc; 1723 1724 tba = tp->t_outq.c_cf; 1725 tbc = ndqb(&tp->t_outq, 0); 1726 1727 (void)splserial(); 1728 COM_LOCK(sc); 1729 1730 sc->sc_tba = tba; 1731 sc->sc_tbc = tbc; 1732 } 1733 1734 SET(tp->t_state, TS_BUSY); 1735 sc->sc_tx_busy = 1; 1736 1737 /* Enable transmit completion interrupts if necessary. */ 1738 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1739 SET(sc->sc_ier, IER_ETXRDY); 1740 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1741 } 1742 1743 /* Output the first chunk of the contiguous buffer. */ 1744 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1745 int n; 1746 1747 n = sc->sc_tbc; 1748 if (n > sc->sc_fifolen) 1749 n = sc->sc_fifolen; 1750 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1751 sc->sc_tbc -= n; 1752 sc->sc_tba += n; 1753 } 1754 COM_UNLOCK(sc); 1755 out: 1756 splx(s); 1757 return; 1758 } 1759 1760 /* 1761 * Stop output on a line. 1762 */ 1763 void 1764 comstop(tp, flag) 1765 struct tty *tp; 1766 int flag; 1767 { 1768 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1769 int s; 1770 1771 s = splserial(); 1772 COM_LOCK(sc); 1773 if (ISSET(tp->t_state, TS_BUSY)) { 1774 /* Stop transmitting at the next chunk. */ 1775 sc->sc_tbc = 0; 1776 sc->sc_heldtbc = 0; 1777 if (!ISSET(tp->t_state, TS_TTSTOP)) 1778 SET(tp->t_state, TS_FLUSH); 1779 } 1780 COM_UNLOCK(sc); 1781 splx(s); 1782 } 1783 1784 void 1785 comdiag(arg) 1786 void *arg; 1787 { 1788 struct com_softc *sc = arg; 1789 int overflows, floods; 1790 int s; 1791 1792 s = splserial(); 1793 COM_LOCK(sc); 1794 overflows = sc->sc_overflows; 1795 sc->sc_overflows = 0; 1796 floods = sc->sc_floods; 1797 sc->sc_floods = 0; 1798 sc->sc_errors = 0; 1799 COM_UNLOCK(sc); 1800 splx(s); 1801 1802 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1803 sc->sc_dev.dv_xname, 1804 overflows, overflows == 1 ? "" : "s", 1805 floods, floods == 1 ? "" : "s"); 1806 } 1807 1808 integrate void 1809 com_rxsoft(sc, tp) 1810 struct com_softc *sc; 1811 struct tty *tp; 1812 { 1813 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1814 u_char *get, *end; 1815 u_int cc, scc; 1816 u_char lsr; 1817 int code; 1818 int s; 1819 1820 end = sc->sc_ebuf; 1821 get = sc->sc_rbget; 1822 scc = cc = com_rbuf_size - sc->sc_rbavail; 1823 1824 if (cc == com_rbuf_size) { 1825 sc->sc_floods++; 1826 if (sc->sc_errors++ == 0) 1827 callout_reset(&sc->sc_diag_callout, 60 * hz, 1828 comdiag, sc); 1829 } 1830 1831 while (cc) { 1832 code = get[0]; 1833 lsr = get[1]; 1834 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1835 if (ISSET(lsr, LSR_OE)) { 1836 sc->sc_overflows++; 1837 if (sc->sc_errors++ == 0) 1838 callout_reset(&sc->sc_diag_callout, 1839 60 * hz, comdiag, sc); 1840 } 1841 if (ISSET(lsr, LSR_BI | LSR_FE)) 1842 SET(code, TTY_FE); 1843 if (ISSET(lsr, LSR_PE)) 1844 SET(code, TTY_PE); 1845 } 1846 if ((*rint)(code, tp) == -1) { 1847 /* 1848 * The line discipline's buffer is out of space. 1849 */ 1850 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1851 /* 1852 * We're either not using flow control, or the 1853 * line discipline didn't tell us to block for 1854 * some reason. Either way, we have no way to 1855 * know when there's more space available, so 1856 * just drop the rest of the data. 1857 */ 1858 get += cc << 1; 1859 if (get >= end) 1860 get -= com_rbuf_size << 1; 1861 cc = 0; 1862 } else { 1863 /* 1864 * Don't schedule any more receive processing 1865 * until the line discipline tells us there's 1866 * space available (through comhwiflow()). 1867 * Leave the rest of the data in the input 1868 * buffer. 1869 */ 1870 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1871 } 1872 break; 1873 } 1874 get += 2; 1875 if (get >= end) 1876 get = sc->sc_rbuf; 1877 cc--; 1878 } 1879 1880 if (cc != scc) { 1881 sc->sc_rbget = get; 1882 s = splserial(); 1883 COM_LOCK(sc); 1884 1885 cc = sc->sc_rbavail += scc - cc; 1886 /* Buffers should be ok again, release possible block. */ 1887 if (cc >= sc->sc_r_lowat) { 1888 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1889 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1890 SET(sc->sc_ier, IER_ERXRDY); 1891 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1892 } 1893 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1894 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1895 com_hwiflow(sc); 1896 } 1897 } 1898 COM_UNLOCK(sc); 1899 splx(s); 1900 } 1901 } 1902 1903 integrate void 1904 com_txsoft(sc, tp) 1905 struct com_softc *sc; 1906 struct tty *tp; 1907 { 1908 1909 CLR(tp->t_state, TS_BUSY); 1910 if (ISSET(tp->t_state, TS_FLUSH)) 1911 CLR(tp->t_state, TS_FLUSH); 1912 else 1913 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1914 (*tp->t_linesw->l_start)(tp); 1915 } 1916 1917 integrate void 1918 com_stsoft(sc, tp) 1919 struct com_softc *sc; 1920 struct tty *tp; 1921 { 1922 u_char msr, delta; 1923 int s; 1924 1925 s = splserial(); 1926 COM_LOCK(sc); 1927 msr = sc->sc_msr; 1928 delta = sc->sc_msr_delta; 1929 sc->sc_msr_delta = 0; 1930 COM_UNLOCK(sc); 1931 splx(s); 1932 1933 if (ISSET(delta, sc->sc_msr_dcd)) { 1934 /* 1935 * Inform the tty layer that carrier detect changed. 1936 */ 1937 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1938 } 1939 1940 if (ISSET(delta, sc->sc_msr_cts)) { 1941 /* Block or unblock output according to flow control. */ 1942 if (ISSET(msr, sc->sc_msr_cts)) { 1943 sc->sc_tx_stopped = 0; 1944 (*tp->t_linesw->l_start)(tp); 1945 } else { 1946 sc->sc_tx_stopped = 1; 1947 } 1948 } 1949 1950 #ifdef COM_DEBUG 1951 if (com_debug) 1952 comstatus(sc, "com_stsoft"); 1953 #endif 1954 } 1955 1956 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1957 void 1958 comsoft(arg) 1959 void *arg; 1960 { 1961 struct com_softc *sc = arg; 1962 struct tty *tp; 1963 1964 if (COM_ISALIVE(sc) == 0) 1965 return; 1966 1967 { 1968 #else 1969 void 1970 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1971 comsoft() 1972 #else 1973 comsoft(arg) 1974 void *arg; 1975 #endif 1976 { 1977 struct com_softc *sc; 1978 struct tty *tp; 1979 int unit; 1980 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1981 int s; 1982 1983 s = splsoftserial(); 1984 com_softintr_scheduled = 0; 1985 #endif 1986 1987 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1988 sc = device_lookup(&com_cd, unit); 1989 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1990 continue; 1991 1992 if (COM_ISALIVE(sc) == 0) 1993 continue; 1994 1995 tp = sc->sc_tty; 1996 if (tp == NULL) 1997 continue; 1998 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1999 continue; 2000 #endif 2001 tp = sc->sc_tty; 2002 2003 if (sc->sc_rx_ready) { 2004 sc->sc_rx_ready = 0; 2005 com_rxsoft(sc, tp); 2006 } 2007 2008 if (sc->sc_st_check) { 2009 sc->sc_st_check = 0; 2010 com_stsoft(sc, tp); 2011 } 2012 2013 if (sc->sc_tx_done) { 2014 sc->sc_tx_done = 0; 2015 com_txsoft(sc, tp); 2016 } 2017 } 2018 2019 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2020 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2021 splx(s); 2022 #endif 2023 #endif 2024 } 2025 2026 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2027 /* there has got to be a better way to do comsoft() */ 2028 }} 2029 #endif 2030 2031 int 2032 comintr(arg) 2033 void *arg; 2034 { 2035 struct com_softc *sc = arg; 2036 bus_space_tag_t iot = sc->sc_iot; 2037 bus_space_handle_t ioh = sc->sc_ioh; 2038 u_char *put, *end; 2039 u_int cc; 2040 u_char lsr, iir; 2041 2042 if (COM_ISALIVE(sc) == 0) 2043 return (0); 2044 2045 COM_LOCK(sc); 2046 iir = bus_space_read_1(iot, ioh, com_iir); 2047 if (ISSET(iir, IIR_NOPEND)) { 2048 COM_UNLOCK(sc); 2049 return (0); 2050 } 2051 2052 end = sc->sc_ebuf; 2053 put = sc->sc_rbput; 2054 cc = sc->sc_rbavail; 2055 2056 again: do { 2057 u_char msr, delta; 2058 2059 lsr = bus_space_read_1(iot, ioh, com_lsr); 2060 if (ISSET(lsr, LSR_BI)) { 2061 int cn_trapped = 0; 2062 cn_check_magic(sc->sc_tty->t_dev, 2063 CNC_BREAK, com_cnm_state); 2064 if (cn_trapped) 2065 continue; 2066 #if defined(KGDB) 2067 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2068 kgdb_connect(1); 2069 continue; 2070 } 2071 #endif 2072 } 2073 2074 if (ISSET(lsr, LSR_RCV_MASK) && 2075 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2076 while (cc > 0) { 2077 int cn_trapped = 0; 2078 put[0] = bus_space_read_1(iot, ioh, com_data); 2079 put[1] = lsr; 2080 cn_check_magic(sc->sc_tty->t_dev, 2081 put[0], com_cnm_state); 2082 if (cn_trapped) { 2083 lsr = bus_space_read_1(iot, ioh, com_lsr); 2084 if (!ISSET(lsr, LSR_RCV_MASK)) 2085 break; 2086 2087 continue; 2088 } 2089 put += 2; 2090 if (put >= end) 2091 put = sc->sc_rbuf; 2092 cc--; 2093 2094 lsr = bus_space_read_1(iot, ioh, com_lsr); 2095 if (!ISSET(lsr, LSR_RCV_MASK)) 2096 break; 2097 } 2098 2099 /* 2100 * Current string of incoming characters ended because 2101 * no more data was available or we ran out of space. 2102 * Schedule a receive event if any data was received. 2103 * If we're out of space, turn off receive interrupts. 2104 */ 2105 sc->sc_rbput = put; 2106 sc->sc_rbavail = cc; 2107 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2108 sc->sc_rx_ready = 1; 2109 2110 /* 2111 * See if we are in danger of overflowing a buffer. If 2112 * so, use hardware flow control to ease the pressure. 2113 */ 2114 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2115 cc < sc->sc_r_hiwat) { 2116 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2117 com_hwiflow(sc); 2118 } 2119 2120 /* 2121 * If we're out of space, disable receive interrupts 2122 * until the queue has drained a bit. 2123 */ 2124 if (!cc) { 2125 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2126 CLR(sc->sc_ier, IER_ERXRDY); 2127 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2128 } 2129 } else { 2130 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2131 bus_space_write_1(iot, ioh, com_ier, 0); 2132 delay(10); 2133 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2134 continue; 2135 } 2136 } 2137 2138 msr = bus_space_read_1(iot, ioh, com_msr); 2139 delta = msr ^ sc->sc_msr; 2140 sc->sc_msr = msr; 2141 /* 2142 * Pulse-per-second (PSS) signals on edge of DCD? 2143 * Process these even if line discipline is ignoring DCD. 2144 */ 2145 if (delta & sc->sc_ppsmask) { 2146 struct timeval tv; 2147 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2148 /* XXX nanotime() */ 2149 microtime(&tv); 2150 TIMEVAL_TO_TIMESPEC(&tv, 2151 &sc->ppsinfo.assert_timestamp); 2152 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2153 timespecadd(&sc->ppsinfo.assert_timestamp, 2154 &sc->ppsparam.assert_offset, 2155 &sc->ppsinfo.assert_timestamp); 2156 } 2157 2158 #ifdef PPS_SYNC 2159 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2160 hardpps(&tv, tv.tv_usec); 2161 #endif 2162 sc->ppsinfo.assert_sequence++; 2163 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2164 2165 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2166 /* XXX nanotime() */ 2167 microtime(&tv); 2168 TIMEVAL_TO_TIMESPEC(&tv, 2169 &sc->ppsinfo.clear_timestamp); 2170 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2171 timespecadd(&sc->ppsinfo.clear_timestamp, 2172 &sc->ppsparam.clear_offset, 2173 &sc->ppsinfo.clear_timestamp); 2174 } 2175 2176 #ifdef PPS_SYNC 2177 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2178 hardpps(&tv, tv.tv_usec); 2179 #endif 2180 sc->ppsinfo.clear_sequence++; 2181 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2182 } 2183 } 2184 2185 /* 2186 * Process normal status changes 2187 */ 2188 if (ISSET(delta, sc->sc_msr_mask)) { 2189 SET(sc->sc_msr_delta, delta); 2190 2191 /* 2192 * Stop output immediately if we lose the output 2193 * flow control signal or carrier detect. 2194 */ 2195 if (ISSET(~msr, sc->sc_msr_mask)) { 2196 sc->sc_tbc = 0; 2197 sc->sc_heldtbc = 0; 2198 #ifdef COM_DEBUG 2199 if (com_debug) 2200 comstatus(sc, "comintr "); 2201 #endif 2202 } 2203 2204 sc->sc_st_check = 1; 2205 } 2206 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2207 || ((iir & IIR_IMASK) == 0)); 2208 2209 /* 2210 * Done handling any receive interrupts. See if data can be 2211 * transmitted as well. Schedule tx done event if no data left 2212 * and tty was marked busy. 2213 */ 2214 if (ISSET(lsr, LSR_TXRDY)) { 2215 /* 2216 * If we've delayed a parameter change, do it now, and restart 2217 * output. 2218 */ 2219 if (sc->sc_heldchange) { 2220 com_loadchannelregs(sc); 2221 sc->sc_heldchange = 0; 2222 sc->sc_tbc = sc->sc_heldtbc; 2223 sc->sc_heldtbc = 0; 2224 } 2225 2226 /* Output the next chunk of the contiguous buffer, if any. */ 2227 if (sc->sc_tbc > 0) { 2228 int n; 2229 2230 n = sc->sc_tbc; 2231 if (n > sc->sc_fifolen) 2232 n = sc->sc_fifolen; 2233 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2234 sc->sc_tbc -= n; 2235 sc->sc_tba += n; 2236 } else { 2237 /* Disable transmit completion interrupts if necessary. */ 2238 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2239 CLR(sc->sc_ier, IER_ETXRDY); 2240 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2241 } 2242 if (sc->sc_tx_busy) { 2243 sc->sc_tx_busy = 0; 2244 sc->sc_tx_done = 1; 2245 } 2246 } 2247 } 2248 2249 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2250 goto again; 2251 2252 COM_UNLOCK(sc); 2253 2254 /* Wake up the poller. */ 2255 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2256 softintr_schedule(sc->sc_si); 2257 #else 2258 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2259 setsoftserial(); 2260 #else 2261 if (!com_softintr_scheduled) { 2262 com_softintr_scheduled = 1; 2263 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2264 } 2265 #endif 2266 #endif 2267 2268 #if NRND > 0 && defined(RND_COM) 2269 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2270 #endif 2271 2272 return (1); 2273 } 2274 2275 /* 2276 * The following functions are polled getc and putc routines, shared 2277 * by the console and kgdb glue. 2278 * 2279 * The read-ahead code is so that you can detect pending in-band 2280 * cn_magic in polled mode while doing output rather than having to 2281 * wait until the kernel decides it needs input. 2282 */ 2283 2284 #define MAX_READAHEAD 20 2285 static int com_readahead[MAX_READAHEAD]; 2286 static int com_readaheadcount = 0; 2287 2288 int 2289 com_common_getc(dev, iot, ioh) 2290 dev_t dev; 2291 bus_space_tag_t iot; 2292 bus_space_handle_t ioh; 2293 { 2294 int s = splserial(); 2295 u_char stat, c; 2296 2297 /* got a character from reading things earlier */ 2298 if (com_readaheadcount > 0) { 2299 int i; 2300 2301 c = com_readahead[0]; 2302 for (i = 1; i < com_readaheadcount; i++) { 2303 com_readahead[i-1] = com_readahead[i]; 2304 } 2305 com_readaheadcount--; 2306 splx(s); 2307 return (c); 2308 } 2309 2310 /* block until a character becomes available */ 2311 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2312 ; 2313 2314 c = bus_space_read_1(iot, ioh, com_data); 2315 stat = bus_space_read_1(iot, ioh, com_iir); 2316 { 2317 int cn_trapped = 0; /* unused */ 2318 #ifdef DDB 2319 extern int db_active; 2320 if (!db_active) 2321 #endif 2322 cn_check_magic(dev, c, com_cnm_state); 2323 } 2324 splx(s); 2325 return (c); 2326 } 2327 2328 void 2329 com_common_putc(dev, iot, ioh, c) 2330 dev_t dev; 2331 bus_space_tag_t iot; 2332 bus_space_handle_t ioh; 2333 int c; 2334 { 2335 int s = splserial(); 2336 int timo; 2337 2338 int cin, stat; 2339 if (com_readaheadcount < MAX_READAHEAD 2340 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2341 int cn_trapped = 0; 2342 cin = bus_space_read_1(iot, ioh, com_data); 2343 stat = bus_space_read_1(iot, ioh, com_iir); 2344 cn_check_magic(dev, cin, com_cnm_state); 2345 com_readahead[com_readaheadcount++] = cin; 2346 } 2347 2348 /* wait for any pending transmission to finish */ 2349 timo = 150000; 2350 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2351 continue; 2352 2353 bus_space_write_1(iot, ioh, com_data, c); 2354 COM_BARRIER(iot, ioh, BR | BW); 2355 2356 /* wait for this transmission to complete */ 2357 timo = 1500000; 2358 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2359 continue; 2360 2361 splx(s); 2362 } 2363 2364 /* 2365 * Initialize UART for use as console or KGDB line. 2366 */ 2367 int 2368 cominit(iot, iobase, rate, frequency, cflag, iohp) 2369 bus_space_tag_t iot; 2370 bus_addr_t iobase; 2371 int rate, frequency; 2372 tcflag_t cflag; 2373 bus_space_handle_t *iohp; 2374 { 2375 bus_space_handle_t ioh; 2376 2377 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2378 return (ENOMEM); /* ??? */ 2379 2380 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2381 bus_space_write_1(iot, ioh, com_efr, 0); 2382 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2383 rate = comspeed(rate, frequency); 2384 bus_space_write_1(iot, ioh, com_dlbl, rate); 2385 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2386 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2387 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2388 bus_space_write_1(iot, ioh, com_fifo, 2389 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2390 bus_space_write_1(iot, ioh, com_ier, 0); 2391 2392 *iohp = ioh; 2393 return (0); 2394 } 2395 2396 /* 2397 * Following are all routines needed for COM to act as console 2398 */ 2399 struct consdev comcons = { 2400 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2401 NODEV, CN_NORMAL 2402 }; 2403 2404 2405 int 2406 comcnattach(iot, iobase, rate, frequency, cflag) 2407 bus_space_tag_t iot; 2408 bus_addr_t iobase; 2409 int rate, frequency; 2410 tcflag_t cflag; 2411 { 2412 int res; 2413 2414 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2415 if (res) 2416 return (res); 2417 2418 cn_tab = &comcons; 2419 cn_init_magic(&com_cnm_state); 2420 cn_set_magic("\047\001"); /* default magic is BREAK */ 2421 2422 comconstag = iot; 2423 comconsaddr = iobase; 2424 comconsrate = rate; 2425 comconscflag = cflag; 2426 2427 return (0); 2428 } 2429 2430 int 2431 comcngetc(dev) 2432 dev_t dev; 2433 { 2434 return (com_common_getc(dev, comconstag, comconsioh)); 2435 } 2436 2437 /* 2438 * Console kernel output character routine. 2439 */ 2440 void 2441 comcnputc(dev, c) 2442 dev_t dev; 2443 int c; 2444 { 2445 com_common_putc(dev, comconstag, comconsioh, c); 2446 } 2447 2448 void 2449 comcnpollc(dev, on) 2450 dev_t dev; 2451 int on; 2452 { 2453 2454 } 2455 2456 #ifdef KGDB 2457 int 2458 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2459 bus_space_tag_t iot; 2460 bus_addr_t iobase; 2461 int rate, frequency; 2462 tcflag_t cflag; 2463 { 2464 int res; 2465 2466 if (iot == comconstag && iobase == comconsaddr) 2467 return (EBUSY); /* cannot share with console */ 2468 2469 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2470 if (res) 2471 return (res); 2472 2473 /* 2474 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2475 * expects this to be initialized 2476 */ 2477 cn_init_magic(&com_cnm_state); 2478 cn_set_magic("\047\001"); 2479 2480 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2481 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2482 2483 com_kgdb_iot = iot; 2484 com_kgdb_addr = iobase; 2485 2486 return (0); 2487 } 2488 2489 /* ARGSUSED */ 2490 int 2491 com_kgdb_getc(arg) 2492 void *arg; 2493 { 2494 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2495 } 2496 2497 /* ARGSUSED */ 2498 void 2499 com_kgdb_putc(arg, c) 2500 void *arg; 2501 int c; 2502 { 2503 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2504 } 2505 #endif /* KGDB */ 2506 2507 /* helper function to identify the com ports used by 2508 console or KGDB (and not yet autoconf attached) */ 2509 int 2510 com_is_console(iot, iobase, ioh) 2511 bus_space_tag_t iot; 2512 bus_addr_t iobase; 2513 bus_space_handle_t *ioh; 2514 { 2515 bus_space_handle_t help; 2516 2517 if (!comconsattached && 2518 iot == comconstag && iobase == comconsaddr) 2519 help = comconsioh; 2520 #ifdef KGDB 2521 else if (!com_kgdb_attached && 2522 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2523 help = com_kgdb_ioh; 2524 #endif 2525 else 2526 return (0); 2527 2528 if (ioh) 2529 *ioh = help; 2530 return (1); 2531 } 2532
Indexes created Sun Oct 19 22:09:57 GMT 2025