com.c revision 1.207
1 /* $NetBSD: com.c,v 1.207 2003/05/18 15:10:08 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.207 2003/05/18 15:10:08 fvdl Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 86 #include "rnd.h" 87 #if NRND > 0 && defined(RND_COM) 88 #include <sys/rnd.h> 89 #endif 90 91 /* 92 * Override cnmagic(9) macro before including <sys/systm.h>. 93 * We need to know if cn_check_magic triggered debugger, so set a flag. 94 * Callers of cn_check_magic must declare int cn_trapped = 0; 95 * XXX: this is *ugly*! 96 */ 97 #define cn_trap() \ 98 do { \ 99 console_debugger(); \ 100 cn_trapped = 1; \ 101 } while (/* CONSTCOND */ 0) 102 103 #include <sys/param.h> 104 #include <sys/systm.h> 105 #include <sys/ioctl.h> 106 #include <sys/select.h> 107 #include <sys/tty.h> 108 #include <sys/proc.h> 109 #include <sys/user.h> 110 #include <sys/conf.h> 111 #include <sys/file.h> 112 #include <sys/uio.h> 113 #include <sys/kernel.h> 114 #include <sys/syslog.h> 115 #include <sys/device.h> 116 #include <sys/malloc.h> 117 #include <sys/timepps.h> 118 #include <sys/vnode.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 135 #endif 136 137 static void com_enable_debugport(struct com_softc *); 138 139 void com_config(struct com_softc *); 140 void com_shutdown(struct com_softc *); 141 int comspeed(long, long); 142 static u_char cflag2lcr(tcflag_t); 143 int comparam(struct tty *, struct termios *); 144 void comstart(struct tty *); 145 int comhwiflow(struct tty *, int); 146 147 void com_loadchannelregs(struct com_softc *); 148 void com_hwiflow(struct com_softc *); 149 void com_break(struct com_softc *, int); 150 void com_modem(struct com_softc *, int); 151 void tiocm_to_com(struct com_softc *, u_long, int); 152 int com_to_tiocm(struct com_softc *); 153 void com_iflush(struct com_softc *); 154 155 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 156 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 157 158 int cominit(bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 159 bus_space_handle_t *); 160 161 int comcngetc(dev_t); 162 void comcnputc(dev_t, int); 163 void comcnpollc(dev_t, int); 164 165 #define integrate static inline 166 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 167 void comsoft(void *); 168 #else 169 #ifndef __NO_SOFT_SERIAL_INTERRUPT 170 void comsoft(void); 171 #else 172 void comsoft(void *); 173 struct callout comsoft_callout = CALLOUT_INITIALIZER; 174 #endif 175 #endif 176 integrate void com_rxsoft(struct com_softc *, struct tty *); 177 integrate void com_txsoft(struct com_softc *, struct tty *); 178 integrate void com_stsoft(struct com_softc *, struct tty *); 179 integrate void com_schedrx(struct com_softc *); 180 void comdiag(void *); 181 182 extern struct cfdriver com_cd; 183 184 dev_type_open(comopen); 185 dev_type_close(comclose); 186 dev_type_read(comread); 187 dev_type_write(comwrite); 188 dev_type_ioctl(comioctl); 189 dev_type_stop(comstop); 190 dev_type_tty(comtty); 191 dev_type_poll(compoll); 192 193 const struct cdevsw com_cdevsw = { 194 comopen, comclose, comread, comwrite, comioctl, 195 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 196 }; 197 198 /* 199 * Make this an option variable one can patch. 200 * But be warned: this must be a power of 2! 201 */ 202 u_int com_rbuf_size = COM_RING_SIZE; 203 204 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 205 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 206 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 207 208 static bus_addr_t comconsaddr; 209 static bus_space_tag_t comconstag; 210 static bus_space_handle_t comconsioh; 211 static int comconsattached; 212 static int comconsrate; 213 static tcflag_t comconscflag; 214 static struct cnm_state com_cnm_state; 215 216 static int ppscap = 217 PPS_TSFMT_TSPEC | 218 PPS_CAPTUREASSERT | 219 PPS_CAPTURECLEAR | 220 #ifdef PPS_SYNC 221 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 222 #endif /* PPS_SYNC */ 223 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 224 225 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 226 #ifdef __NO_SOFT_SERIAL_INTERRUPT 227 volatile int com_softintr_scheduled; 228 #endif 229 #endif 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static bus_addr_t com_kgdb_addr; 235 static bus_space_tag_t com_kgdb_iot; 236 static bus_space_handle_t com_kgdb_ioh; 237 static int com_kgdb_attached; 238 239 int com_kgdb_getc(void *); 240 void com_kgdb_putc(void *, int); 241 #endif /* KGDB */ 242 243 #define COMUNIT_MASK 0x7ffff 244 #define COMDIALOUT_MASK 0x80000 245 246 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 247 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 248 249 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 250 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 251 252 #define BR BUS_SPACE_BARRIER_READ 253 #define BW BUS_SPACE_BARRIER_WRITE 254 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 255 256 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 257 258 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 259 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 260 261 #else 262 263 #define COM_LOCK(sc) 264 #define COM_UNLOCK(sc) 265 266 #endif 267 268 int 269 comspeed(long speed, long frequency) 270 { 271 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 272 273 int x, err; 274 275 #if 0 276 if (speed == 0) 277 return (0); 278 #endif 279 if (speed <= 0) 280 return (-1); 281 x = divrnd(frequency / 16, speed); 282 if (x <= 0) 283 return (-1); 284 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 285 if (err < 0) 286 err = -err; 287 if (err > COM_TOLERANCE) 288 return (-1); 289 return (x); 290 291 #undef divrnd 292 } 293 294 #ifdef COM_DEBUG 295 int com_debug = 0; 296 297 void comstatus(struct com_softc *, char *); 298 void 299 comstatus(struct com_softc *sc, char *str) 300 { 301 struct tty *tp = sc->sc_tty; 302 303 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 304 sc->sc_dev.dv_xname, str, 305 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 306 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 307 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 308 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 309 sc->sc_tx_stopped ? "+" : "-"); 310 311 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 312 sc->sc_dev.dv_xname, str, 313 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 314 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 315 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 316 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 317 sc->sc_rx_flags); 318 } 319 #endif 320 321 int 322 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 323 { 324 325 /* force access to id reg */ 326 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 327 bus_space_write_1(iot, ioh, com_iir, 0); 328 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 329 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 330 return (0); 331 332 return (1); 333 } 334 335 #ifdef COM_HAYESP 336 int 337 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 338 { 339 char val, dips; 340 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 341 bus_space_tag_t iot = sc->sc_iot; 342 343 /* 344 * Hayes ESP cards have two iobases. One is for compatibility with 345 * 16550 serial chips, and at the same ISA PC base addresses. The 346 * other is for ESP-specific enhanced features, and lies at a 347 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 348 */ 349 350 /* Test for ESP signature */ 351 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 352 return (0); 353 354 /* 355 * ESP is present at ESP enhanced base address; unknown com port 356 */ 357 358 /* Get the dip-switch configurations */ 359 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 360 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 361 362 /* Determine which com port this ESP card services: bits 0,1 of */ 363 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 364 if (sc->sc_iobase != combaselist[dips & 0x03]) 365 return (0); 366 367 printf(": ESP"); 368 369 /* Check ESP Self Test bits. */ 370 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 371 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 372 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 373 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 374 if ((val & 0x70) < 0x20) { 375 printf("-old (%o)", val & 0x70); 376 /* we do not support the necessary features */ 377 return (0); 378 } 379 380 /* Check for ability to emulate 16550: bit 8 == 1 */ 381 if ((dips & 0x80) == 0) { 382 printf(" slave"); 383 /* XXX Does slave really mean no 16550 support?? */ 384 return (0); 385 } 386 387 /* 388 * If we made it this far, we are a full-featured ESP v2.0 (or 389 * better), at the correct com port address. 390 */ 391 392 SET(sc->sc_hwflags, COM_HW_HAYESP); 393 printf(", 1024 byte fifo\n"); 394 return (1); 395 } 396 #endif 397 398 static void 399 com_enable_debugport(struct com_softc *sc) 400 { 401 int s; 402 403 /* Turn on line break interrupt, set carrier. */ 404 s = splserial(); 405 COM_LOCK(sc); 406 sc->sc_ier = IER_ERXRDY; 407 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 408 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 409 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 410 COM_UNLOCK(sc); 411 splx(s); 412 } 413 414 void 415 com_attach_subr(struct com_softc *sc) 416 { 417 bus_addr_t iobase = sc->sc_iobase; 418 bus_space_tag_t iot = sc->sc_iot; 419 bus_space_handle_t ioh = sc->sc_ioh; 420 struct tty *tp; 421 #ifdef COM16650 422 u_int8_t lcr; 423 #endif 424 #ifdef COM_HAYESP 425 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 426 int *hayespp; 427 #endif 428 429 callout_init(&sc->sc_diag_callout); 430 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 431 simple_lock_init(&sc->sc_lock); 432 #endif 433 434 /* Disable interrupts before configuring the device. */ 435 sc->sc_ier = 0; 436 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 437 438 if (iot == comconstag && iobase == comconsaddr) { 439 comconsattached = 1; 440 441 /* Make sure the console is always "hardwired". */ 442 delay(1000); /* wait for output to finish */ 443 SET(sc->sc_hwflags, COM_HW_CONSOLE); 444 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 445 } 446 447 #ifdef COM_HAYESP 448 sc->sc_prescaler = 0; /* set prescaler to x1. */ 449 450 /* Look for a Hayes ESP board. */ 451 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 452 bus_space_handle_t hayespioh; 453 454 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 455 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 456 continue; 457 if (comprobeHAYESP(hayespioh, sc)) { 458 sc->sc_hayespioh = hayespioh; 459 sc->sc_fifolen = 1024; 460 461 break; 462 } 463 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 464 } 465 /* No ESP; look for other things. */ 466 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 467 #endif 468 sc->sc_fifolen = 1; 469 /* look for a NS 16550AF UART with FIFOs */ 470 bus_space_write_1(iot, ioh, com_fifo, 471 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 472 delay(100); 473 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 474 == IIR_FIFO_MASK) 475 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 476 == FIFO_TRIGGER_14) { 477 SET(sc->sc_hwflags, COM_HW_FIFO); 478 479 #ifdef COM16650 480 /* 481 * IIR changes into the EFR if LCR is set to LCR_EERS 482 * on 16650s. We also know IIR != 0 at this point. 483 * Write 0 into the EFR, and read it. If the result 484 * is 0, we have a 16650. 485 * 486 * Older 16650s were broken; the test to detect them 487 * is taken from the Linux driver. Apparently 488 * setting DLAB enable gives access to the EFR on 489 * these chips. 490 */ 491 lcr = bus_space_read_1(iot, ioh, com_lcr); 492 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 493 bus_space_write_1(iot, ioh, com_efr, 0); 494 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 495 bus_space_write_1(iot, ioh, com_lcr, 496 lcr | LCR_DLAB); 497 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 498 CLR(sc->sc_hwflags, COM_HW_FIFO); 499 sc->sc_fifolen = 0; 500 } else { 501 SET(sc->sc_hwflags, COM_HW_FLOW); 502 sc->sc_fifolen = 32; 503 } 504 } else 505 #endif 506 sc->sc_fifolen = 16; 507 508 #ifdef COM16650 509 bus_space_write_1(iot, ioh, com_lcr, lcr); 510 if (sc->sc_fifolen == 0) 511 aprint_normal(": st16650, broken fifo\n"); 512 else if (sc->sc_fifolen == 32) 513 aprint_normal(": st16650a, working fifo\n"); 514 else 515 #endif 516 aprint_normal(": ns16550a, working fifo\n"); 517 } else 518 aprint_normal(": ns16550, broken fifo\n"); 519 else 520 aprint_normal(": ns8250 or ns16450, no fifo\n"); 521 bus_space_write_1(iot, ioh, com_fifo, 0); 522 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 523 sc->sc_fifolen = 1; 524 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 525 } 526 #ifdef COM_HAYESP 527 } 528 #endif 529 530 tp = ttymalloc(); 531 tp->t_oproc = comstart; 532 tp->t_param = comparam; 533 tp->t_hwiflow = comhwiflow; 534 535 sc->sc_tty = tp; 536 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 537 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 538 sc->sc_rbavail = com_rbuf_size; 539 if (sc->sc_rbuf == NULL) { 540 aprint_error("%s: unable to allocate ring buffer\n", 541 sc->sc_dev.dv_xname); 542 return; 543 } 544 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 545 546 tty_attach(tp); 547 548 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 549 SET(sc->sc_mcr, MCR_IENABLE); 550 551 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 552 int maj; 553 554 /* locate the major number */ 555 maj = cdevsw_lookup_major(&com_cdevsw); 556 557 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 558 559 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 560 } 561 562 #ifdef KGDB 563 /* 564 * Allow kgdb to "take over" this port. If this is 565 * not the console and is the kgdb device, it has 566 * exclusive use. If it's the console _and_ the 567 * kgdb device, it doesn't. 568 */ 569 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 570 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 571 com_kgdb_attached = 1; 572 573 SET(sc->sc_hwflags, COM_HW_KGDB); 574 } 575 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 576 } 577 #endif 578 579 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 580 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 581 #endif 582 583 #if NRND > 0 && defined(RND_COM) 584 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 585 RND_TYPE_TTY, 0); 586 #endif 587 588 /* if there are no enable/disable functions, assume the device 589 is always enabled */ 590 if (!sc->enable) 591 sc->enabled = 1; 592 593 com_config(sc); 594 595 SET(sc->sc_hwflags, COM_HW_DEV_OK); 596 } 597 598 void 599 com_config(struct com_softc *sc) 600 { 601 bus_space_tag_t iot = sc->sc_iot; 602 bus_space_handle_t ioh = sc->sc_ioh; 603 604 /* Disable interrupts before configuring the device. */ 605 sc->sc_ier = 0; 606 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 607 608 #ifdef COM_HAYESP 609 /* Look for a Hayes ESP board. */ 610 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 611 sc->sc_fifolen = 1024; 612 613 /* Set 16550 compatibility mode */ 614 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 615 HAYESP_SETMODE); 616 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 617 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 618 HAYESP_MODE_SCALE); 619 620 /* Set RTS/CTS flow control */ 621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 622 HAYESP_SETFLOWTYPE); 623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 624 HAYESP_FLOW_RTS); 625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 626 HAYESP_FLOW_CTS); 627 628 /* Set flow control levels */ 629 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 630 HAYESP_SETRXFLOW); 631 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 632 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 633 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 634 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 636 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 638 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 639 } 640 #endif 641 642 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 643 com_enable_debugport(sc); 644 } 645 646 int 647 com_detach(struct device *self, int flags) 648 { 649 struct com_softc *sc = (struct com_softc *)self; 650 int maj, mn; 651 652 /* locate the major number */ 653 maj = cdevsw_lookup_major(&com_cdevsw); 654 655 /* Nuke the vnodes for any open instances. */ 656 mn = self->dv_unit; 657 vdevgone(maj, mn, mn, VCHR); 658 659 mn |= COMDIALOUT_MASK; 660 vdevgone(maj, mn, mn, VCHR); 661 662 if (sc->sc_rbuf == NULL) { 663 /* 664 * Ring buffer allocation failed in the com_attach_subr, 665 * only the tty is allocated, and nothing else. 666 */ 667 ttyfree(sc->sc_tty); 668 return 0; 669 } 670 671 /* Free the receive buffer. */ 672 free(sc->sc_rbuf, M_DEVBUF); 673 674 /* Detach and free the tty. */ 675 tty_detach(sc->sc_tty); 676 ttyfree(sc->sc_tty); 677 678 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 679 /* Unhook the soft interrupt handler. */ 680 softintr_disestablish(sc->sc_si); 681 #endif 682 683 #if NRND > 0 && defined(RND_COM) 684 /* Unhook the entropy source. */ 685 rnd_detach_source(&sc->rnd_source); 686 #endif 687 688 return (0); 689 } 690 691 int 692 com_activate(struct device *self, enum devact act) 693 { 694 struct com_softc *sc = (struct com_softc *)self; 695 int s, rv = 0; 696 697 s = splserial(); 698 COM_LOCK(sc); 699 switch (act) { 700 case DVACT_ACTIVATE: 701 rv = EOPNOTSUPP; 702 break; 703 704 case DVACT_DEACTIVATE: 705 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 706 rv = EBUSY; 707 break; 708 } 709 710 if (sc->disable != NULL && sc->enabled != 0) { 711 (*sc->disable)(sc); 712 sc->enabled = 0; 713 } 714 break; 715 } 716 717 COM_UNLOCK(sc); 718 splx(s); 719 return (rv); 720 } 721 722 void 723 com_shutdown(struct com_softc *sc) 724 { 725 struct tty *tp = sc->sc_tty; 726 int s; 727 728 s = splserial(); 729 COM_LOCK(sc); 730 731 /* If we were asserting flow control, then deassert it. */ 732 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 733 com_hwiflow(sc); 734 735 /* Clear any break condition set with TIOCSBRK. */ 736 com_break(sc, 0); 737 738 /* Turn off PPS capture on last close. */ 739 sc->sc_ppsmask = 0; 740 sc->ppsparam.mode = 0; 741 742 /* 743 * Hang up if necessary. Wait a bit, so the other side has time to 744 * notice even if we immediately open the port again. 745 * Avoid tsleeping above splhigh(). 746 */ 747 if (ISSET(tp->t_cflag, HUPCL)) { 748 com_modem(sc, 0); 749 COM_UNLOCK(sc); 750 splx(s); 751 /* XXX tsleep will only timeout */ 752 (void) tsleep(sc, TTIPRI, ttclos, hz); 753 s = splserial(); 754 COM_LOCK(sc); 755 } 756 757 /* Turn off interrupts. */ 758 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 759 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 760 else 761 sc->sc_ier = 0; 762 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 763 764 if (sc->disable) { 765 #ifdef DIAGNOSTIC 766 if (!sc->enabled) 767 panic("com_shutdown: not enabled?"); 768 #endif 769 (*sc->disable)(sc); 770 sc->enabled = 0; 771 } 772 COM_UNLOCK(sc); 773 splx(s); 774 } 775 776 int 777 comopen(dev_t dev, int flag, int mode, struct proc *p) 778 { 779 struct com_softc *sc; 780 struct tty *tp; 781 int s, s2; 782 int error; 783 784 sc = device_lookup(&com_cd, COMUNIT(dev)); 785 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 786 sc->sc_rbuf == NULL) 787 return (ENXIO); 788 789 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 790 return (ENXIO); 791 792 #ifdef KGDB 793 /* 794 * If this is the kgdb port, no other use is permitted. 795 */ 796 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 797 return (EBUSY); 798 #endif 799 800 tp = sc->sc_tty; 801 802 if (ISSET(tp->t_state, TS_ISOPEN) && 803 ISSET(tp->t_state, TS_XCLUDE) && 804 p->p_ucred->cr_uid != 0) 805 return (EBUSY); 806 807 s = spltty(); 808 809 /* 810 * Do the following iff this is a first open. 811 */ 812 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 813 struct termios t; 814 815 tp->t_dev = dev; 816 817 s2 = splserial(); 818 COM_LOCK(sc); 819 820 if (sc->enable) { 821 if ((*sc->enable)(sc)) { 822 COM_UNLOCK(sc); 823 splx(s2); 824 splx(s); 825 printf("%s: device enable failed\n", 826 sc->sc_dev.dv_xname); 827 return (EIO); 828 } 829 sc->enabled = 1; 830 com_config(sc); 831 } 832 833 /* Turn on interrupts. */ 834 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 835 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 836 837 /* Fetch the current modem control status, needed later. */ 838 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 839 840 /* Clear PPS capture state on first open. */ 841 sc->sc_ppsmask = 0; 842 sc->ppsparam.mode = 0; 843 844 COM_UNLOCK(sc); 845 splx(s2); 846 847 /* 848 * Initialize the termios status to the defaults. Add in the 849 * sticky bits from TIOCSFLAGS. 850 */ 851 t.c_ispeed = 0; 852 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 853 t.c_ospeed = comconsrate; 854 t.c_cflag = comconscflag; 855 } else { 856 t.c_ospeed = TTYDEF_SPEED; 857 t.c_cflag = TTYDEF_CFLAG; 858 } 859 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 860 SET(t.c_cflag, CLOCAL); 861 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 862 SET(t.c_cflag, CRTSCTS); 863 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 864 SET(t.c_cflag, MDMBUF); 865 /* Make sure comparam() will do something. */ 866 tp->t_ospeed = 0; 867 (void) comparam(tp, &t); 868 tp->t_iflag = TTYDEF_IFLAG; 869 tp->t_oflag = TTYDEF_OFLAG; 870 tp->t_lflag = TTYDEF_LFLAG; 871 ttychars(tp); 872 ttsetwater(tp); 873 874 s2 = splserial(); 875 COM_LOCK(sc); 876 877 /* 878 * Turn on DTR. We must always do this, even if carrier is not 879 * present, because otherwise we'd have to use TIOCSDTR 880 * immediately after setting CLOCAL, which applications do not 881 * expect. We always assert DTR while the device is open 882 * unless explicitly requested to deassert it. 883 */ 884 com_modem(sc, 1); 885 886 /* Clear the input ring, and unblock. */ 887 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 888 sc->sc_rbavail = com_rbuf_size; 889 com_iflush(sc); 890 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 891 com_hwiflow(sc); 892 893 #ifdef COM_DEBUG 894 if (com_debug) 895 comstatus(sc, "comopen "); 896 #endif 897 898 COM_UNLOCK(sc); 899 splx(s2); 900 } 901 902 splx(s); 903 904 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 905 if (error) 906 goto bad; 907 908 error = (*tp->t_linesw->l_open)(dev, tp); 909 if (error) 910 goto bad; 911 912 return (0); 913 914 bad: 915 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 916 /* 917 * We failed to open the device, and nobody else had it opened. 918 * Clean up the state as appropriate. 919 */ 920 com_shutdown(sc); 921 } 922 923 return (error); 924 } 925 926 int 927 comclose(dev_t dev, int flag, int mode, struct proc *p) 928 { 929 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 930 struct tty *tp = sc->sc_tty; 931 932 /* XXX This is for cons.c. */ 933 if (!ISSET(tp->t_state, TS_ISOPEN)) 934 return (0); 935 936 (*tp->t_linesw->l_close)(tp, flag); 937 ttyclose(tp); 938 939 if (COM_ISALIVE(sc) == 0) 940 return (0); 941 942 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 943 /* 944 * Although we got a last close, the device may still be in 945 * use; e.g. if this was the dialout node, and there are still 946 * processes waiting for carrier on the non-dialout node. 947 */ 948 com_shutdown(sc); 949 } 950 951 return (0); 952 } 953 954 int 955 comread(dev_t dev, struct uio *uio, int flag) 956 { 957 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 958 struct tty *tp = sc->sc_tty; 959 960 if (COM_ISALIVE(sc) == 0) 961 return (EIO); 962 963 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 964 } 965 966 int 967 comwrite(dev_t dev, struct uio *uio, int flag) 968 { 969 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 970 struct tty *tp = sc->sc_tty; 971 972 if (COM_ISALIVE(sc) == 0) 973 return (EIO); 974 975 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 976 } 977 978 int 979 compoll(dev_t dev, int events, struct proc *p) 980 { 981 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 982 struct tty *tp = sc->sc_tty; 983 984 if (COM_ISALIVE(sc) == 0) 985 return (EIO); 986 987 return ((*tp->t_linesw->l_poll)(tp, events, p)); 988 } 989 990 struct tty * 991 comtty(dev_t dev) 992 { 993 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 994 struct tty *tp = sc->sc_tty; 995 996 return (tp); 997 } 998 999 int 1000 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1001 { 1002 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1003 struct tty *tp = sc->sc_tty; 1004 int error; 1005 int s; 1006 1007 if (COM_ISALIVE(sc) == 0) 1008 return (EIO); 1009 1010 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1011 if (error != EPASSTHROUGH) 1012 return (error); 1013 1014 error = ttioctl(tp, cmd, data, flag, p); 1015 if (error != EPASSTHROUGH) 1016 return (error); 1017 1018 error = 0; 1019 1020 s = splserial(); 1021 COM_LOCK(sc); 1022 1023 switch (cmd) { 1024 case TIOCSBRK: 1025 com_break(sc, 1); 1026 break; 1027 1028 case TIOCCBRK: 1029 com_break(sc, 0); 1030 break; 1031 1032 case TIOCSDTR: 1033 com_modem(sc, 1); 1034 break; 1035 1036 case TIOCCDTR: 1037 com_modem(sc, 0); 1038 break; 1039 1040 case TIOCGFLAGS: 1041 *(int *)data = sc->sc_swflags; 1042 break; 1043 1044 case TIOCSFLAGS: 1045 error = suser(p->p_ucred, &p->p_acflag); 1046 if (error) 1047 break; 1048 sc->sc_swflags = *(int *)data; 1049 break; 1050 1051 case TIOCMSET: 1052 case TIOCMBIS: 1053 case TIOCMBIC: 1054 tiocm_to_com(sc, cmd, *(int *)data); 1055 break; 1056 1057 case TIOCMGET: 1058 *(int *)data = com_to_tiocm(sc); 1059 break; 1060 1061 case PPS_IOC_CREATE: 1062 break; 1063 1064 case PPS_IOC_DESTROY: 1065 break; 1066 1067 case PPS_IOC_GETPARAMS: { 1068 pps_params_t *pp; 1069 pp = (pps_params_t *)data; 1070 *pp = sc->ppsparam; 1071 break; 1072 } 1073 1074 case PPS_IOC_SETPARAMS: { 1075 pps_params_t *pp; 1076 int mode; 1077 pp = (pps_params_t *)data; 1078 if (pp->mode & ~ppscap) { 1079 error = EINVAL; 1080 break; 1081 } 1082 sc->ppsparam = *pp; 1083 /* 1084 * Compute msr masks from user-specified timestamp state. 1085 */ 1086 mode = sc->ppsparam.mode; 1087 #ifdef PPS_SYNC 1088 if (mode & PPS_HARDPPSONASSERT) { 1089 mode |= PPS_CAPTUREASSERT; 1090 /* XXX revoke any previous HARDPPS source */ 1091 } 1092 if (mode & PPS_HARDPPSONCLEAR) { 1093 mode |= PPS_CAPTURECLEAR; 1094 /* XXX revoke any previous HARDPPS source */ 1095 } 1096 #endif /* PPS_SYNC */ 1097 switch (mode & PPS_CAPTUREBOTH) { 1098 case 0: 1099 sc->sc_ppsmask = 0; 1100 break; 1101 1102 case PPS_CAPTUREASSERT: 1103 sc->sc_ppsmask = MSR_DCD; 1104 sc->sc_ppsassert = MSR_DCD; 1105 sc->sc_ppsclear = -1; 1106 break; 1107 1108 case PPS_CAPTURECLEAR: 1109 sc->sc_ppsmask = MSR_DCD; 1110 sc->sc_ppsassert = -1; 1111 sc->sc_ppsclear = 0; 1112 break; 1113 1114 case PPS_CAPTUREBOTH: 1115 sc->sc_ppsmask = MSR_DCD; 1116 sc->sc_ppsassert = MSR_DCD; 1117 sc->sc_ppsclear = 0; 1118 break; 1119 1120 default: 1121 error = EINVAL; 1122 break; 1123 } 1124 break; 1125 } 1126 1127 case PPS_IOC_GETCAP: 1128 *(int*)data = ppscap; 1129 break; 1130 1131 case PPS_IOC_FETCH: { 1132 pps_info_t *pi; 1133 pi = (pps_info_t *)data; 1134 *pi = sc->ppsinfo; 1135 break; 1136 } 1137 1138 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1139 /* 1140 * Some GPS clocks models use the falling rather than 1141 * rising edge as the on-the-second signal. 1142 * The old API has no way to specify PPS polarity. 1143 */ 1144 sc->sc_ppsmask = MSR_DCD; 1145 #ifndef PPS_TRAILING_EDGE 1146 sc->sc_ppsassert = MSR_DCD; 1147 sc->sc_ppsclear = -1; 1148 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1149 &sc->ppsinfo.assert_timestamp); 1150 #else 1151 sc->sc_ppsassert = -1 1152 sc->sc_ppsclear = 0; 1153 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1154 &sc->ppsinfo.clear_timestamp); 1155 #endif 1156 break; 1157 1158 default: 1159 error = EPASSTHROUGH; 1160 break; 1161 } 1162 1163 COM_UNLOCK(sc); 1164 splx(s); 1165 1166 #ifdef COM_DEBUG 1167 if (com_debug) 1168 comstatus(sc, "comioctl "); 1169 #endif 1170 1171 return (error); 1172 } 1173 1174 integrate void 1175 com_schedrx(struct com_softc *sc) 1176 { 1177 1178 sc->sc_rx_ready = 1; 1179 1180 /* Wake up the poller. */ 1181 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1182 softintr_schedule(sc->sc_si); 1183 #else 1184 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1185 setsoftserial(); 1186 #else 1187 if (!com_softintr_scheduled) { 1188 com_softintr_scheduled = 1; 1189 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1190 } 1191 #endif 1192 #endif 1193 } 1194 1195 void 1196 com_break(struct com_softc *sc, int onoff) 1197 { 1198 1199 if (onoff) 1200 SET(sc->sc_lcr, LCR_SBREAK); 1201 else 1202 CLR(sc->sc_lcr, LCR_SBREAK); 1203 1204 if (!sc->sc_heldchange) { 1205 if (sc->sc_tx_busy) { 1206 sc->sc_heldtbc = sc->sc_tbc; 1207 sc->sc_tbc = 0; 1208 sc->sc_heldchange = 1; 1209 } else 1210 com_loadchannelregs(sc); 1211 } 1212 } 1213 1214 void 1215 com_modem(struct com_softc *sc, int onoff) 1216 { 1217 1218 if (sc->sc_mcr_dtr == 0) 1219 return; 1220 1221 if (onoff) 1222 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1223 else 1224 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1225 1226 if (!sc->sc_heldchange) { 1227 if (sc->sc_tx_busy) { 1228 sc->sc_heldtbc = sc->sc_tbc; 1229 sc->sc_tbc = 0; 1230 sc->sc_heldchange = 1; 1231 } else 1232 com_loadchannelregs(sc); 1233 } 1234 } 1235 1236 void 1237 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1238 { 1239 u_char combits; 1240 1241 combits = 0; 1242 if (ISSET(ttybits, TIOCM_DTR)) 1243 SET(combits, MCR_DTR); 1244 if (ISSET(ttybits, TIOCM_RTS)) 1245 SET(combits, MCR_RTS); 1246 1247 switch (how) { 1248 case TIOCMBIC: 1249 CLR(sc->sc_mcr, combits); 1250 break; 1251 1252 case TIOCMBIS: 1253 SET(sc->sc_mcr, combits); 1254 break; 1255 1256 case TIOCMSET: 1257 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1258 SET(sc->sc_mcr, combits); 1259 break; 1260 } 1261 1262 if (!sc->sc_heldchange) { 1263 if (sc->sc_tx_busy) { 1264 sc->sc_heldtbc = sc->sc_tbc; 1265 sc->sc_tbc = 0; 1266 sc->sc_heldchange = 1; 1267 } else 1268 com_loadchannelregs(sc); 1269 } 1270 } 1271 1272 int 1273 com_to_tiocm(struct com_softc *sc) 1274 { 1275 u_char combits; 1276 int ttybits = 0; 1277 1278 combits = sc->sc_mcr; 1279 if (ISSET(combits, MCR_DTR)) 1280 SET(ttybits, TIOCM_DTR); 1281 if (ISSET(combits, MCR_RTS)) 1282 SET(ttybits, TIOCM_RTS); 1283 1284 combits = sc->sc_msr; 1285 if (ISSET(combits, MSR_DCD)) 1286 SET(ttybits, TIOCM_CD); 1287 if (ISSET(combits, MSR_CTS)) 1288 SET(ttybits, TIOCM_CTS); 1289 if (ISSET(combits, MSR_DSR)) 1290 SET(ttybits, TIOCM_DSR); 1291 if (ISSET(combits, MSR_RI | MSR_TERI)) 1292 SET(ttybits, TIOCM_RI); 1293 1294 if (sc->sc_ier != 0) 1295 SET(ttybits, TIOCM_LE); 1296 1297 return (ttybits); 1298 } 1299 1300 static u_char 1301 cflag2lcr(tcflag_t cflag) 1302 { 1303 u_char lcr = 0; 1304 1305 switch (ISSET(cflag, CSIZE)) { 1306 case CS5: 1307 SET(lcr, LCR_5BITS); 1308 break; 1309 case CS6: 1310 SET(lcr, LCR_6BITS); 1311 break; 1312 case CS7: 1313 SET(lcr, LCR_7BITS); 1314 break; 1315 case CS8: 1316 SET(lcr, LCR_8BITS); 1317 break; 1318 } 1319 if (ISSET(cflag, PARENB)) { 1320 SET(lcr, LCR_PENAB); 1321 if (!ISSET(cflag, PARODD)) 1322 SET(lcr, LCR_PEVEN); 1323 } 1324 if (ISSET(cflag, CSTOPB)) 1325 SET(lcr, LCR_STOPB); 1326 1327 return (lcr); 1328 } 1329 1330 int 1331 comparam(struct tty *tp, struct termios *t) 1332 { 1333 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1334 int ospeed; 1335 u_char lcr; 1336 int s; 1337 1338 if (COM_ISALIVE(sc) == 0) 1339 return (EIO); 1340 1341 #ifdef COM_HAYESP 1342 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1343 int prescaler, speed; 1344 1345 /* 1346 * Calculate UART clock prescaler. It should be in 1347 * range of 0 .. 3. 1348 */ 1349 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1350 prescaler++, speed /= 2) 1351 if ((ospeed = comspeed(speed, sc->sc_frequency)) > 0) 1352 break; 1353 1354 if (prescaler == 4) 1355 return (EINVAL); 1356 sc->sc_prescaler = prescaler; 1357 } else 1358 #endif 1359 ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1360 1361 /* Check requested parameters. */ 1362 if (ospeed < 0) 1363 return (EINVAL); 1364 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1365 return (EINVAL); 1366 1367 /* 1368 * For the console, always force CLOCAL and !HUPCL, so that the port 1369 * is always active. 1370 */ 1371 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1372 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1373 SET(t->c_cflag, CLOCAL); 1374 CLR(t->c_cflag, HUPCL); 1375 } 1376 1377 /* 1378 * If there were no changes, don't do anything. This avoids dropping 1379 * input and improves performance when all we did was frob things like 1380 * VMIN and VTIME. 1381 */ 1382 if (tp->t_ospeed == t->c_ospeed && 1383 tp->t_cflag == t->c_cflag) 1384 return (0); 1385 1386 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1387 1388 s = splserial(); 1389 COM_LOCK(sc); 1390 1391 sc->sc_lcr = lcr; 1392 1393 /* 1394 * If we're not in a mode that assumes a connection is present, then 1395 * ignore carrier changes. 1396 */ 1397 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1398 sc->sc_msr_dcd = 0; 1399 else 1400 sc->sc_msr_dcd = MSR_DCD; 1401 /* 1402 * Set the flow control pins depending on the current flow control 1403 * mode. 1404 */ 1405 if (ISSET(t->c_cflag, CRTSCTS)) { 1406 sc->sc_mcr_dtr = MCR_DTR; 1407 sc->sc_mcr_rts = MCR_RTS; 1408 sc->sc_msr_cts = MSR_CTS; 1409 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1410 } else if (ISSET(t->c_cflag, MDMBUF)) { 1411 /* 1412 * For DTR/DCD flow control, make sure we don't toggle DTR for 1413 * carrier detection. 1414 */ 1415 sc->sc_mcr_dtr = 0; 1416 sc->sc_mcr_rts = MCR_DTR; 1417 sc->sc_msr_cts = MSR_DCD; 1418 sc->sc_efr = 0; 1419 } else { 1420 /* 1421 * If no flow control, then always set RTS. This will make 1422 * the other side happy if it mistakenly thinks we're doing 1423 * RTS/CTS flow control. 1424 */ 1425 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1426 sc->sc_mcr_rts = 0; 1427 sc->sc_msr_cts = 0; 1428 sc->sc_efr = 0; 1429 if (ISSET(sc->sc_mcr, MCR_DTR)) 1430 SET(sc->sc_mcr, MCR_RTS); 1431 else 1432 CLR(sc->sc_mcr, MCR_RTS); 1433 } 1434 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1435 1436 #if 0 1437 if (ospeed == 0) 1438 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1439 else 1440 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1441 #endif 1442 1443 sc->sc_dlbl = ospeed; 1444 sc->sc_dlbh = ospeed >> 8; 1445 1446 /* 1447 * Set the FIFO threshold based on the receive speed. 1448 * 1449 * * If it's a low speed, it's probably a mouse or some other 1450 * interactive device, so set the threshold low. 1451 * * If it's a high speed, trim the trigger level down to prevent 1452 * overflows. 1453 * * Otherwise set it a bit higher. 1454 */ 1455 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1456 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1457 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1458 sc->sc_fifo = FIFO_ENABLE | 1459 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1460 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1461 else 1462 sc->sc_fifo = 0; 1463 1464 /* And copy to tty. */ 1465 tp->t_ispeed = 0; 1466 tp->t_ospeed = t->c_ospeed; 1467 tp->t_cflag = t->c_cflag; 1468 1469 if (!sc->sc_heldchange) { 1470 if (sc->sc_tx_busy) { 1471 sc->sc_heldtbc = sc->sc_tbc; 1472 sc->sc_tbc = 0; 1473 sc->sc_heldchange = 1; 1474 } else 1475 com_loadchannelregs(sc); 1476 } 1477 1478 if (!ISSET(t->c_cflag, CHWFLOW)) { 1479 /* Disable the high water mark. */ 1480 sc->sc_r_hiwat = 0; 1481 sc->sc_r_lowat = 0; 1482 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1483 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1484 com_schedrx(sc); 1485 } 1486 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1487 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1488 com_hwiflow(sc); 1489 } 1490 } else { 1491 sc->sc_r_hiwat = com_rbuf_hiwat; 1492 sc->sc_r_lowat = com_rbuf_lowat; 1493 } 1494 1495 COM_UNLOCK(sc); 1496 splx(s); 1497 1498 /* 1499 * Update the tty layer's idea of the carrier bit, in case we changed 1500 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1501 * explicit request. 1502 */ 1503 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1504 1505 #ifdef COM_DEBUG 1506 if (com_debug) 1507 comstatus(sc, "comparam "); 1508 #endif 1509 1510 if (!ISSET(t->c_cflag, CHWFLOW)) { 1511 if (sc->sc_tx_stopped) { 1512 sc->sc_tx_stopped = 0; 1513 comstart(tp); 1514 } 1515 } 1516 1517 return (0); 1518 } 1519 1520 void 1521 com_iflush(struct com_softc *sc) 1522 { 1523 bus_space_tag_t iot = sc->sc_iot; 1524 bus_space_handle_t ioh = sc->sc_ioh; 1525 #ifdef DIAGNOSTIC 1526 int reg; 1527 #endif 1528 int timo; 1529 1530 #ifdef DIAGNOSTIC 1531 reg = 0xffff; 1532 #endif 1533 timo = 50000; 1534 /* flush any pending I/O */ 1535 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1536 && --timo) 1537 #ifdef DIAGNOSTIC 1538 reg = 1539 #else 1540 (void) 1541 #endif 1542 bus_space_read_1(iot, ioh, com_data); 1543 #ifdef DIAGNOSTIC 1544 if (!timo) 1545 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1546 reg); 1547 #endif 1548 } 1549 1550 void 1551 com_loadchannelregs(struct com_softc *sc) 1552 { 1553 bus_space_tag_t iot = sc->sc_iot; 1554 bus_space_handle_t ioh = sc->sc_ioh; 1555 1556 /* XXXXX necessary? */ 1557 com_iflush(sc); 1558 1559 bus_space_write_1(iot, ioh, com_ier, 0); 1560 1561 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1562 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1563 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1564 } 1565 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1566 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1567 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1568 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1569 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1570 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1571 #ifdef COM_HAYESP 1572 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 1573 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1574 HAYESP_SETPRESCALER); 1575 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1576 sc->sc_prescaler); 1577 } 1578 #endif 1579 1580 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1581 } 1582 1583 int 1584 comhwiflow(struct tty *tp, int block) 1585 { 1586 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1587 int s; 1588 1589 if (COM_ISALIVE(sc) == 0) 1590 return (0); 1591 1592 if (sc->sc_mcr_rts == 0) 1593 return (0); 1594 1595 s = splserial(); 1596 COM_LOCK(sc); 1597 1598 if (block) { 1599 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1600 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1601 com_hwiflow(sc); 1602 } 1603 } else { 1604 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1605 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1606 com_schedrx(sc); 1607 } 1608 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1609 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1610 com_hwiflow(sc); 1611 } 1612 } 1613 1614 COM_UNLOCK(sc); 1615 splx(s); 1616 return (1); 1617 } 1618 1619 /* 1620 * (un)block input via hw flowcontrol 1621 */ 1622 void 1623 com_hwiflow(struct com_softc *sc) 1624 { 1625 bus_space_tag_t iot = sc->sc_iot; 1626 bus_space_handle_t ioh = sc->sc_ioh; 1627 1628 if (sc->sc_mcr_rts == 0) 1629 return; 1630 1631 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1632 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1633 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1634 } else { 1635 SET(sc->sc_mcr, sc->sc_mcr_rts); 1636 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1637 } 1638 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1639 } 1640 1641 1642 void 1643 comstart(struct tty *tp) 1644 { 1645 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1646 bus_space_tag_t iot = sc->sc_iot; 1647 bus_space_handle_t ioh = sc->sc_ioh; 1648 int s; 1649 1650 if (COM_ISALIVE(sc) == 0) 1651 return; 1652 1653 s = spltty(); 1654 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1655 goto out; 1656 if (sc->sc_tx_stopped) 1657 goto out; 1658 1659 if (tp->t_outq.c_cc <= tp->t_lowat) { 1660 if (ISSET(tp->t_state, TS_ASLEEP)) { 1661 CLR(tp->t_state, TS_ASLEEP); 1662 wakeup(&tp->t_outq); 1663 } 1664 selwakeup(&tp->t_wsel); 1665 if (tp->t_outq.c_cc == 0) 1666 goto out; 1667 } 1668 1669 /* Grab the first contiguous region of buffer space. */ 1670 { 1671 u_char *tba; 1672 int tbc; 1673 1674 tba = tp->t_outq.c_cf; 1675 tbc = ndqb(&tp->t_outq, 0); 1676 1677 (void)splserial(); 1678 COM_LOCK(sc); 1679 1680 sc->sc_tba = tba; 1681 sc->sc_tbc = tbc; 1682 } 1683 1684 SET(tp->t_state, TS_BUSY); 1685 sc->sc_tx_busy = 1; 1686 1687 /* Enable transmit completion interrupts if necessary. */ 1688 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1689 SET(sc->sc_ier, IER_ETXRDY); 1690 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1691 } 1692 1693 /* Output the first chunk of the contiguous buffer. */ 1694 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1695 u_int n; 1696 1697 n = sc->sc_tbc; 1698 if (n > sc->sc_fifolen) 1699 n = sc->sc_fifolen; 1700 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1701 sc->sc_tbc -= n; 1702 sc->sc_tba += n; 1703 } 1704 COM_UNLOCK(sc); 1705 out: 1706 splx(s); 1707 return; 1708 } 1709 1710 /* 1711 * Stop output on a line. 1712 */ 1713 void 1714 comstop(struct tty *tp, int flag) 1715 { 1716 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1717 int s; 1718 1719 s = splserial(); 1720 COM_LOCK(sc); 1721 if (ISSET(tp->t_state, TS_BUSY)) { 1722 /* Stop transmitting at the next chunk. */ 1723 sc->sc_tbc = 0; 1724 sc->sc_heldtbc = 0; 1725 if (!ISSET(tp->t_state, TS_TTSTOP)) 1726 SET(tp->t_state, TS_FLUSH); 1727 } 1728 COM_UNLOCK(sc); 1729 splx(s); 1730 } 1731 1732 void 1733 comdiag(void *arg) 1734 { 1735 struct com_softc *sc = arg; 1736 int overflows, floods; 1737 int s; 1738 1739 s = splserial(); 1740 COM_LOCK(sc); 1741 overflows = sc->sc_overflows; 1742 sc->sc_overflows = 0; 1743 floods = sc->sc_floods; 1744 sc->sc_floods = 0; 1745 sc->sc_errors = 0; 1746 COM_UNLOCK(sc); 1747 splx(s); 1748 1749 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1750 sc->sc_dev.dv_xname, 1751 overflows, overflows == 1 ? "" : "s", 1752 floods, floods == 1 ? "" : "s"); 1753 } 1754 1755 integrate void 1756 com_rxsoft(struct com_softc *sc, struct tty *tp) 1757 { 1758 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1759 u_char *get, *end; 1760 u_int cc, scc; 1761 u_char lsr; 1762 int code; 1763 int s; 1764 1765 end = sc->sc_ebuf; 1766 get = sc->sc_rbget; 1767 scc = cc = com_rbuf_size - sc->sc_rbavail; 1768 1769 if (cc == com_rbuf_size) { 1770 sc->sc_floods++; 1771 if (sc->sc_errors++ == 0) 1772 callout_reset(&sc->sc_diag_callout, 60 * hz, 1773 comdiag, sc); 1774 } 1775 1776 /* If not yet open, drop the entire buffer content here */ 1777 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1778 get += cc << 1; 1779 if (get >= end) 1780 get -= com_rbuf_size << 1; 1781 cc = 0; 1782 } 1783 while (cc) { 1784 code = get[0]; 1785 lsr = get[1]; 1786 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1787 if (ISSET(lsr, LSR_OE)) { 1788 sc->sc_overflows++; 1789 if (sc->sc_errors++ == 0) 1790 callout_reset(&sc->sc_diag_callout, 1791 60 * hz, comdiag, sc); 1792 } 1793 if (ISSET(lsr, LSR_BI | LSR_FE)) 1794 SET(code, TTY_FE); 1795 if (ISSET(lsr, LSR_PE)) 1796 SET(code, TTY_PE); 1797 } 1798 if ((*rint)(code, tp) == -1) { 1799 /* 1800 * The line discipline's buffer is out of space. 1801 */ 1802 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1803 /* 1804 * We're either not using flow control, or the 1805 * line discipline didn't tell us to block for 1806 * some reason. Either way, we have no way to 1807 * know when there's more space available, so 1808 * just drop the rest of the data. 1809 */ 1810 get += cc << 1; 1811 if (get >= end) 1812 get -= com_rbuf_size << 1; 1813 cc = 0; 1814 } else { 1815 /* 1816 * Don't schedule any more receive processing 1817 * until the line discipline tells us there's 1818 * space available (through comhwiflow()). 1819 * Leave the rest of the data in the input 1820 * buffer. 1821 */ 1822 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1823 } 1824 break; 1825 } 1826 get += 2; 1827 if (get >= end) 1828 get = sc->sc_rbuf; 1829 cc--; 1830 } 1831 1832 if (cc != scc) { 1833 sc->sc_rbget = get; 1834 s = splserial(); 1835 COM_LOCK(sc); 1836 1837 cc = sc->sc_rbavail += scc - cc; 1838 /* Buffers should be ok again, release possible block. */ 1839 if (cc >= sc->sc_r_lowat) { 1840 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1841 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1842 SET(sc->sc_ier, IER_ERXRDY); 1843 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1844 } 1845 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1846 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1847 com_hwiflow(sc); 1848 } 1849 } 1850 COM_UNLOCK(sc); 1851 splx(s); 1852 } 1853 } 1854 1855 integrate void 1856 com_txsoft(struct com_softc *sc, struct tty *tp) 1857 { 1858 1859 CLR(tp->t_state, TS_BUSY); 1860 if (ISSET(tp->t_state, TS_FLUSH)) 1861 CLR(tp->t_state, TS_FLUSH); 1862 else 1863 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1864 (*tp->t_linesw->l_start)(tp); 1865 } 1866 1867 integrate void 1868 com_stsoft(struct com_softc *sc, struct tty *tp) 1869 { 1870 u_char msr, delta; 1871 int s; 1872 1873 s = splserial(); 1874 COM_LOCK(sc); 1875 msr = sc->sc_msr; 1876 delta = sc->sc_msr_delta; 1877 sc->sc_msr_delta = 0; 1878 COM_UNLOCK(sc); 1879 splx(s); 1880 1881 if (ISSET(delta, sc->sc_msr_dcd)) { 1882 /* 1883 * Inform the tty layer that carrier detect changed. 1884 */ 1885 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1886 } 1887 1888 if (ISSET(delta, sc->sc_msr_cts)) { 1889 /* Block or unblock output according to flow control. */ 1890 if (ISSET(msr, sc->sc_msr_cts)) { 1891 sc->sc_tx_stopped = 0; 1892 (*tp->t_linesw->l_start)(tp); 1893 } else { 1894 sc->sc_tx_stopped = 1; 1895 } 1896 } 1897 1898 #ifdef COM_DEBUG 1899 if (com_debug) 1900 comstatus(sc, "com_stsoft"); 1901 #endif 1902 } 1903 1904 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1905 void 1906 comsoft(void *arg) 1907 { 1908 struct com_softc *sc = arg; 1909 struct tty *tp; 1910 1911 if (COM_ISALIVE(sc) == 0) 1912 return; 1913 1914 { 1915 #else 1916 void 1917 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1918 comsoft(void) 1919 #else 1920 comsoft(void *arg) 1921 #endif 1922 { 1923 struct com_softc *sc; 1924 struct tty *tp; 1925 int unit; 1926 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1927 int s; 1928 1929 s = splsoftserial(); 1930 com_softintr_scheduled = 0; 1931 #endif 1932 1933 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1934 sc = device_lookup(&com_cd, unit); 1935 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1936 continue; 1937 1938 if (COM_ISALIVE(sc) == 0) 1939 continue; 1940 1941 tp = sc->sc_tty; 1942 if (tp == NULL) 1943 continue; 1944 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1945 continue; 1946 #endif 1947 tp = sc->sc_tty; 1948 1949 if (sc->sc_rx_ready) { 1950 sc->sc_rx_ready = 0; 1951 com_rxsoft(sc, tp); 1952 } 1953 1954 if (sc->sc_st_check) { 1955 sc->sc_st_check = 0; 1956 com_stsoft(sc, tp); 1957 } 1958 1959 if (sc->sc_tx_done) { 1960 sc->sc_tx_done = 0; 1961 com_txsoft(sc, tp); 1962 } 1963 } 1964 1965 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1966 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1967 splx(s); 1968 #endif 1969 #endif 1970 } 1971 1972 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1973 /* there has got to be a better way to do comsoft() */ 1974 }} 1975 #endif 1976 1977 int 1978 comintr(void *arg) 1979 { 1980 struct com_softc *sc = arg; 1981 bus_space_tag_t iot = sc->sc_iot; 1982 bus_space_handle_t ioh = sc->sc_ioh; 1983 u_char *put, *end; 1984 u_int cc; 1985 u_char lsr, iir; 1986 1987 if (COM_ISALIVE(sc) == 0) 1988 return (0); 1989 1990 COM_LOCK(sc); 1991 iir = bus_space_read_1(iot, ioh, com_iir); 1992 if (ISSET(iir, IIR_NOPEND)) { 1993 COM_UNLOCK(sc); 1994 return (0); 1995 } 1996 1997 end = sc->sc_ebuf; 1998 put = sc->sc_rbput; 1999 cc = sc->sc_rbavail; 2000 2001 again: do { 2002 u_char msr, delta; 2003 2004 lsr = bus_space_read_1(iot, ioh, com_lsr); 2005 if (ISSET(lsr, LSR_BI)) { 2006 int cn_trapped = 0; 2007 2008 cn_check_magic(sc->sc_tty->t_dev, 2009 CNC_BREAK, com_cnm_state); 2010 if (cn_trapped) 2011 continue; 2012 #if defined(KGDB) && !defined(DDB) 2013 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2014 kgdb_connect(1); 2015 continue; 2016 } 2017 #endif 2018 } 2019 2020 if (ISSET(lsr, LSR_RCV_MASK) && 2021 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2022 while (cc > 0) { 2023 int cn_trapped = 0; 2024 put[0] = bus_space_read_1(iot, ioh, com_data); 2025 put[1] = lsr; 2026 cn_check_magic(sc->sc_tty->t_dev, 2027 put[0], com_cnm_state); 2028 if (cn_trapped) { 2029 lsr = bus_space_read_1(iot, ioh, com_lsr); 2030 if (!ISSET(lsr, LSR_RCV_MASK)) 2031 break; 2032 2033 continue; 2034 } 2035 put += 2; 2036 if (put >= end) 2037 put = sc->sc_rbuf; 2038 cc--; 2039 2040 lsr = bus_space_read_1(iot, ioh, com_lsr); 2041 if (!ISSET(lsr, LSR_RCV_MASK)) 2042 break; 2043 } 2044 2045 /* 2046 * Current string of incoming characters ended because 2047 * no more data was available or we ran out of space. 2048 * Schedule a receive event if any data was received. 2049 * If we're out of space, turn off receive interrupts. 2050 */ 2051 sc->sc_rbput = put; 2052 sc->sc_rbavail = cc; 2053 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2054 sc->sc_rx_ready = 1; 2055 2056 /* 2057 * See if we are in danger of overflowing a buffer. If 2058 * so, use hardware flow control to ease the pressure. 2059 */ 2060 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2061 cc < sc->sc_r_hiwat) { 2062 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2063 com_hwiflow(sc); 2064 } 2065 2066 /* 2067 * If we're out of space, disable receive interrupts 2068 * until the queue has drained a bit. 2069 */ 2070 if (!cc) { 2071 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2072 CLR(sc->sc_ier, IER_ERXRDY); 2073 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2074 } 2075 } else { 2076 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2077 bus_space_write_1(iot, ioh, com_ier, 0); 2078 delay(10); 2079 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2080 continue; 2081 } 2082 } 2083 2084 msr = bus_space_read_1(iot, ioh, com_msr); 2085 delta = msr ^ sc->sc_msr; 2086 sc->sc_msr = msr; 2087 /* 2088 * Pulse-per-second (PSS) signals on edge of DCD? 2089 * Process these even if line discipline is ignoring DCD. 2090 */ 2091 if (delta & sc->sc_ppsmask) { 2092 struct timeval tv; 2093 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2094 /* XXX nanotime() */ 2095 microtime(&tv); 2096 TIMEVAL_TO_TIMESPEC(&tv, 2097 &sc->ppsinfo.assert_timestamp); 2098 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2099 timespecadd(&sc->ppsinfo.assert_timestamp, 2100 &sc->ppsparam.assert_offset, 2101 &sc->ppsinfo.assert_timestamp); 2102 } 2103 2104 #ifdef PPS_SYNC 2105 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2106 hardpps(&tv, tv.tv_usec); 2107 #endif 2108 sc->ppsinfo.assert_sequence++; 2109 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2110 2111 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2112 /* XXX nanotime() */ 2113 microtime(&tv); 2114 TIMEVAL_TO_TIMESPEC(&tv, 2115 &sc->ppsinfo.clear_timestamp); 2116 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2117 timespecadd(&sc->ppsinfo.clear_timestamp, 2118 &sc->ppsparam.clear_offset, 2119 &sc->ppsinfo.clear_timestamp); 2120 } 2121 2122 #ifdef PPS_SYNC 2123 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2124 hardpps(&tv, tv.tv_usec); 2125 #endif 2126 sc->ppsinfo.clear_sequence++; 2127 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2128 } 2129 } 2130 2131 /* 2132 * Process normal status changes 2133 */ 2134 if (ISSET(delta, sc->sc_msr_mask)) { 2135 SET(sc->sc_msr_delta, delta); 2136 2137 /* 2138 * Stop output immediately if we lose the output 2139 * flow control signal or carrier detect. 2140 */ 2141 if (ISSET(~msr, sc->sc_msr_mask)) { 2142 sc->sc_tbc = 0; 2143 sc->sc_heldtbc = 0; 2144 #ifdef COM_DEBUG 2145 if (com_debug) 2146 comstatus(sc, "comintr "); 2147 #endif 2148 } 2149 2150 sc->sc_st_check = 1; 2151 } 2152 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2153 || ((iir & IIR_IMASK) == 0)); 2154 2155 /* 2156 * Done handling any receive interrupts. See if data can be 2157 * transmitted as well. Schedule tx done event if no data left 2158 * and tty was marked busy. 2159 */ 2160 if (ISSET(lsr, LSR_TXRDY)) { 2161 /* 2162 * If we've delayed a parameter change, do it now, and restart 2163 * output. 2164 */ 2165 if (sc->sc_heldchange) { 2166 com_loadchannelregs(sc); 2167 sc->sc_heldchange = 0; 2168 sc->sc_tbc = sc->sc_heldtbc; 2169 sc->sc_heldtbc = 0; 2170 } 2171 2172 /* Output the next chunk of the contiguous buffer, if any. */ 2173 if (sc->sc_tbc > 0) { 2174 u_int n; 2175 2176 n = sc->sc_tbc; 2177 if (n > sc->sc_fifolen) 2178 n = sc->sc_fifolen; 2179 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2180 sc->sc_tbc -= n; 2181 sc->sc_tba += n; 2182 } else { 2183 /* Disable transmit completion interrupts if necessary. */ 2184 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2185 CLR(sc->sc_ier, IER_ETXRDY); 2186 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2187 } 2188 if (sc->sc_tx_busy) { 2189 sc->sc_tx_busy = 0; 2190 sc->sc_tx_done = 1; 2191 } 2192 } 2193 } 2194 2195 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2196 goto again; 2197 2198 COM_UNLOCK(sc); 2199 2200 /* Wake up the poller. */ 2201 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2202 softintr_schedule(sc->sc_si); 2203 #else 2204 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2205 setsoftserial(); 2206 #else 2207 if (!com_softintr_scheduled) { 2208 com_softintr_scheduled = 1; 2209 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2210 } 2211 #endif 2212 #endif 2213 2214 #if NRND > 0 && defined(RND_COM) 2215 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2216 #endif 2217 2218 return (1); 2219 } 2220 2221 /* 2222 * The following functions are polled getc and putc routines, shared 2223 * by the console and kgdb glue. 2224 * 2225 * The read-ahead code is so that you can detect pending in-band 2226 * cn_magic in polled mode while doing output rather than having to 2227 * wait until the kernel decides it needs input. 2228 */ 2229 2230 #define MAX_READAHEAD 20 2231 static int com_readahead[MAX_READAHEAD]; 2232 static int com_readaheadcount = 0; 2233 2234 int 2235 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2236 { 2237 int s = splserial(); 2238 u_char stat, c; 2239 2240 /* got a character from reading things earlier */ 2241 if (com_readaheadcount > 0) { 2242 int i; 2243 2244 c = com_readahead[0]; 2245 for (i = 1; i < com_readaheadcount; i++) { 2246 com_readahead[i-1] = com_readahead[i]; 2247 } 2248 com_readaheadcount--; 2249 splx(s); 2250 return (c); 2251 } 2252 2253 /* block until a character becomes available */ 2254 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2255 ; 2256 2257 c = bus_space_read_1(iot, ioh, com_data); 2258 stat = bus_space_read_1(iot, ioh, com_iir); 2259 { 2260 int cn_trapped = 0; /* unused */ 2261 #ifdef DDB 2262 extern int db_active; 2263 if (!db_active) 2264 #endif 2265 cn_check_magic(dev, c, com_cnm_state); 2266 } 2267 splx(s); 2268 return (c); 2269 } 2270 2271 void 2272 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2273 { 2274 int s = splserial(); 2275 int cin, stat, timo; 2276 2277 if (com_readaheadcount < MAX_READAHEAD 2278 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2279 int cn_trapped = 0; 2280 cin = bus_space_read_1(iot, ioh, com_data); 2281 stat = bus_space_read_1(iot, ioh, com_iir); 2282 cn_check_magic(dev, cin, com_cnm_state); 2283 com_readahead[com_readaheadcount++] = cin; 2284 } 2285 2286 /* wait for any pending transmission to finish */ 2287 timo = 150000; 2288 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2289 continue; 2290 2291 bus_space_write_1(iot, ioh, com_data, c); 2292 COM_BARRIER(iot, ioh, BR | BW); 2293 2294 /* wait for this transmission to complete */ 2295 timo = 1500000; 2296 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2297 continue; 2298 2299 splx(s); 2300 } 2301 2302 /* 2303 * Initialize UART for use as console or KGDB line. 2304 */ 2305 int 2306 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2307 tcflag_t cflag, bus_space_handle_t *iohp) 2308 { 2309 bus_space_handle_t ioh; 2310 2311 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2312 return (ENOMEM); /* ??? */ 2313 2314 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2315 bus_space_write_1(iot, ioh, com_efr, 0); 2316 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2317 rate = comspeed(rate, frequency); 2318 bus_space_write_1(iot, ioh, com_dlbl, rate); 2319 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2320 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2321 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2322 bus_space_write_1(iot, ioh, com_fifo, 2323 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2324 bus_space_write_1(iot, ioh, com_ier, 0); 2325 2326 *iohp = ioh; 2327 return (0); 2328 } 2329 2330 /* 2331 * Following are all routines needed for COM to act as console 2332 */ 2333 struct consdev comcons = { 2334 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2335 NODEV, CN_NORMAL 2336 }; 2337 2338 2339 int 2340 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2341 tcflag_t cflag) 2342 { 2343 int res; 2344 2345 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2346 if (res) 2347 return (res); 2348 2349 cn_tab = &comcons; 2350 cn_init_magic(&com_cnm_state); 2351 cn_set_magic("\047\001"); /* default magic is BREAK */ 2352 2353 comconstag = iot; 2354 comconsaddr = iobase; 2355 comconsrate = rate; 2356 comconscflag = cflag; 2357 2358 return (0); 2359 } 2360 2361 int 2362 comcngetc(dev_t dev) 2363 { 2364 2365 return (com_common_getc(dev, comconstag, comconsioh)); 2366 } 2367 2368 /* 2369 * Console kernel output character routine. 2370 */ 2371 void 2372 comcnputc(dev_t dev, int c) 2373 { 2374 2375 com_common_putc(dev, comconstag, comconsioh, c); 2376 } 2377 2378 void 2379 comcnpollc(dev_t dev, int on) 2380 { 2381 2382 } 2383 2384 #ifdef KGDB 2385 int 2386 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2387 int frequency, tcflag_t cflag) 2388 { 2389 int res; 2390 2391 if (iot == comconstag && iobase == comconsaddr) { 2392 #if !defined(DDB) 2393 return (EBUSY); /* cannot share with console */ 2394 #else 2395 com_kgdb_ioh = comconsioh; 2396 #endif 2397 } else { 2398 2399 res = cominit(iot, iobase, rate, frequency, cflag, 2400 &com_kgdb_ioh); 2401 if (res) 2402 return (res); 2403 2404 /* 2405 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2406 * expects this to be initialized 2407 */ 2408 cn_init_magic(&com_cnm_state); 2409 cn_set_magic("\047\001"); 2410 } 2411 2412 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2413 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2414 2415 com_kgdb_iot = iot; 2416 com_kgdb_addr = iobase; 2417 2418 return (0); 2419 } 2420 2421 /* ARGSUSED */ 2422 int 2423 com_kgdb_getc(void *arg) 2424 { 2425 2426 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2427 } 2428 2429 /* ARGSUSED */ 2430 void 2431 com_kgdb_putc(void *arg, int c) 2432 { 2433 2434 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2435 } 2436 #endif /* KGDB */ 2437 2438 /* helper function to identify the com ports used by 2439 console or KGDB (and not yet autoconf attached) */ 2440 int 2441 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2442 { 2443 bus_space_handle_t help; 2444 2445 if (!comconsattached && 2446 iot == comconstag && iobase == comconsaddr) 2447 help = comconsioh; 2448 #ifdef KGDB 2449 else if (!com_kgdb_attached && 2450 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2451 help = com_kgdb_ioh; 2452 #endif 2453 else 2454 return (0); 2455 2456 if (ioh) 2457 *ioh = help; 2458 return (1); 2459 } 2460
Indexes created Wed Sep 24 22:09:59 GMT 2025