com.c revision 1.211
1 /* $NetBSD: com.c,v 1.211 2003/06/15 01:34:34 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.211 2003/06/15 01:34:34 simonb Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 86 #include "rnd.h" 87 #if NRND > 0 && defined(RND_COM) 88 #include <sys/rnd.h> 89 #endif 90 91 /* 92 * Override cnmagic(9) macro before including <sys/systm.h>. 93 * We need to know if cn_check_magic triggered debugger, so set a flag. 94 * Callers of cn_check_magic must declare int cn_trapped = 0; 95 * XXX: this is *ugly*! 96 */ 97 #define cn_trap() \ 98 do { \ 99 console_debugger(); \ 100 cn_trapped = 1; \ 101 } while (/* CONSTCOND */ 0) 102 103 #include <sys/param.h> 104 #include <sys/systm.h> 105 #include <sys/ioctl.h> 106 #include <sys/select.h> 107 #include <sys/tty.h> 108 #include <sys/proc.h> 109 #include <sys/user.h> 110 #include <sys/conf.h> 111 #include <sys/file.h> 112 #include <sys/uio.h> 113 #include <sys/kernel.h> 114 #include <sys/syslog.h> 115 #include <sys/device.h> 116 #include <sys/malloc.h> 117 #include <sys/timepps.h> 118 #include <sys/vnode.h> 119 120 #include <machine/intr.h> 121 #include <machine/bus.h> 122 123 #include <dev/ic/comreg.h> 124 #include <dev/ic/comvar.h> 125 #include <dev/ic/ns16550reg.h> 126 #include <dev/ic/st16650reg.h> 127 #ifdef COM_HAYESP 128 #include <dev/ic/hayespreg.h> 129 #endif 130 #define com_lcr com_cfcr 131 #include <dev/cons.h> 132 133 #ifdef COM_HAYESP 134 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 135 #endif 136 137 static void com_enable_debugport(struct com_softc *); 138 139 void com_config(struct com_softc *); 140 void com_shutdown(struct com_softc *); 141 int comspeed(long, long, int); 142 static u_char cflag2lcr(tcflag_t); 143 int comparam(struct tty *, struct termios *); 144 void comstart(struct tty *); 145 int comhwiflow(struct tty *, int); 146 147 void com_loadchannelregs(struct com_softc *); 148 void com_hwiflow(struct com_softc *); 149 void com_break(struct com_softc *, int); 150 void com_modem(struct com_softc *, int); 151 void tiocm_to_com(struct com_softc *, u_long, int); 152 int com_to_tiocm(struct com_softc *); 153 void com_iflush(struct com_softc *); 154 155 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 156 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 157 158 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 159 bus_space_handle_t *); 160 161 int comcngetc(dev_t); 162 void comcnputc(dev_t, int); 163 void comcnpollc(dev_t, int); 164 165 #define integrate static inline 166 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 167 void comsoft(void *); 168 #else 169 #ifndef __NO_SOFT_SERIAL_INTERRUPT 170 void comsoft(void); 171 #else 172 void comsoft(void *); 173 struct callout comsoft_callout = CALLOUT_INITIALIZER; 174 #endif 175 #endif 176 integrate void com_rxsoft(struct com_softc *, struct tty *); 177 integrate void com_txsoft(struct com_softc *, struct tty *); 178 integrate void com_stsoft(struct com_softc *, struct tty *); 179 integrate void com_schedrx(struct com_softc *); 180 void comdiag(void *); 181 182 extern struct cfdriver com_cd; 183 184 dev_type_open(comopen); 185 dev_type_close(comclose); 186 dev_type_read(comread); 187 dev_type_write(comwrite); 188 dev_type_ioctl(comioctl); 189 dev_type_stop(comstop); 190 dev_type_tty(comtty); 191 dev_type_poll(compoll); 192 193 const struct cdevsw com_cdevsw = { 194 comopen, comclose, comread, comwrite, comioctl, 195 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 196 }; 197 198 /* 199 * Make this an option variable one can patch. 200 * But be warned: this must be a power of 2! 201 */ 202 u_int com_rbuf_size = COM_RING_SIZE; 203 204 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 205 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 206 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 207 208 static bus_addr_t comconsaddr; 209 static bus_space_tag_t comconstag; 210 static bus_space_handle_t comconsioh; 211 static int comconsattached; 212 static int comconsrate; 213 static tcflag_t comconscflag; 214 static struct cnm_state com_cnm_state; 215 216 static int ppscap = 217 PPS_TSFMT_TSPEC | 218 PPS_CAPTUREASSERT | 219 PPS_CAPTURECLEAR | 220 #ifdef PPS_SYNC 221 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 222 #endif /* PPS_SYNC */ 223 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 224 225 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 226 #ifdef __NO_SOFT_SERIAL_INTERRUPT 227 volatile int com_softintr_scheduled; 228 #endif 229 #endif 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static bus_addr_t com_kgdb_addr; 235 static bus_space_tag_t com_kgdb_iot; 236 static bus_space_handle_t com_kgdb_ioh; 237 static int com_kgdb_attached; 238 239 int com_kgdb_getc(void *); 240 void com_kgdb_putc(void *, int); 241 #endif /* KGDB */ 242 243 #define COMUNIT_MASK 0x7ffff 244 #define COMDIALOUT_MASK 0x80000 245 246 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 247 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 248 249 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 250 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 251 252 #define BR BUS_SPACE_BARRIER_READ 253 #define BW BUS_SPACE_BARRIER_WRITE 254 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 255 256 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 257 258 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 259 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 260 261 #else 262 263 #define COM_LOCK(sc) 264 #define COM_UNLOCK(sc) 265 266 #endif 267 268 /*ARGSUSED*/ 269 int 270 comspeed(long speed, long frequency, int type) 271 { 272 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 273 274 int x, err; 275 276 #if 0 277 if (speed == 0) 278 return (0); 279 #endif 280 if (speed <= 0) 281 return (-1); 282 x = divrnd(frequency / 16, speed); 283 if (x <= 0) 284 return (-1); 285 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 286 if (err < 0) 287 err = -err; 288 if (err > COM_TOLERANCE) 289 return (-1); 290 return (x); 291 292 #undef divrnd 293 } 294 295 #ifdef COM_DEBUG 296 int com_debug = 0; 297 298 void comstatus(struct com_softc *, char *); 299 void 300 comstatus(struct com_softc *sc, char *str) 301 { 302 struct tty *tp = sc->sc_tty; 303 304 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 305 sc->sc_dev.dv_xname, str, 306 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 307 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 308 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 309 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 310 sc->sc_tx_stopped ? "+" : "-"); 311 312 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 313 sc->sc_dev.dv_xname, str, 314 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 315 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 316 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 317 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 318 sc->sc_rx_flags); 319 } 320 #endif 321 322 int 323 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 324 { 325 326 /* force access to id reg */ 327 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 328 bus_space_write_1(iot, ioh, com_iir, 0); 329 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 330 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 331 return (0); 332 333 return (1); 334 } 335 336 #ifdef COM_HAYESP 337 int 338 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 339 { 340 char val, dips; 341 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 342 bus_space_tag_t iot = sc->sc_iot; 343 344 /* 345 * Hayes ESP cards have two iobases. One is for compatibility with 346 * 16550 serial chips, and at the same ISA PC base addresses. The 347 * other is for ESP-specific enhanced features, and lies at a 348 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 349 */ 350 351 /* Test for ESP signature */ 352 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 353 return (0); 354 355 /* 356 * ESP is present at ESP enhanced base address; unknown com port 357 */ 358 359 /* Get the dip-switch configurations */ 360 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 361 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 362 363 /* Determine which com port this ESP card services: bits 0,1 of */ 364 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 365 if (sc->sc_iobase != combaselist[dips & 0x03]) 366 return (0); 367 368 printf(": ESP"); 369 370 /* Check ESP Self Test bits. */ 371 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 372 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 373 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 374 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 375 if ((val & 0x70) < 0x20) { 376 printf("-old (%o)", val & 0x70); 377 /* we do not support the necessary features */ 378 return (0); 379 } 380 381 /* Check for ability to emulate 16550: bit 8 == 1 */ 382 if ((dips & 0x80) == 0) { 383 printf(" slave"); 384 /* XXX Does slave really mean no 16550 support?? */ 385 return (0); 386 } 387 388 /* 389 * If we made it this far, we are a full-featured ESP v2.0 (or 390 * better), at the correct com port address. 391 */ 392 393 sc->sc_type = COM_TYPE_HAYESP; 394 printf(", 1024 byte fifo\n"); 395 return (1); 396 } 397 #endif 398 399 static void 400 com_enable_debugport(struct com_softc *sc) 401 { 402 int s; 403 404 /* Turn on line break interrupt, set carrier. */ 405 s = splserial(); 406 COM_LOCK(sc); 407 sc->sc_ier = IER_ERXRDY; 408 #ifdef COM_PXA2X0 409 if (sc->sc_type == COM_TYPE_PXA2x0) 410 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 411 #endif 412 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 413 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 414 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 415 COM_UNLOCK(sc); 416 splx(s); 417 } 418 419 void 420 com_attach_subr(struct com_softc *sc) 421 { 422 bus_addr_t iobase = sc->sc_iobase; 423 bus_space_tag_t iot = sc->sc_iot; 424 bus_space_handle_t ioh = sc->sc_ioh; 425 struct tty *tp; 426 #ifdef COM16650 427 u_int8_t lcr; 428 #endif 429 #ifdef COM_HAYESP 430 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 431 int *hayespp; 432 #endif 433 const char *fifo_msg = NULL; 434 435 callout_init(&sc->sc_diag_callout); 436 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 437 simple_lock_init(&sc->sc_lock); 438 #endif 439 440 /* Disable interrupts before configuring the device. */ 441 #ifdef COM_PXA2X0 442 if (sc->sc_type == COM_TYPE_PXA2x0) 443 sc->sc_ier = IER_EUART; 444 else 445 #endif 446 sc->sc_ier = 0; 447 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 448 449 if (iot == comconstag && iobase == comconsaddr) { 450 comconsattached = 1; 451 452 /* Make sure the console is always "hardwired". */ 453 delay(1000); /* wait for output to finish */ 454 SET(sc->sc_hwflags, COM_HW_CONSOLE); 455 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 456 } 457 458 #ifdef COM_HAYESP 459 sc->sc_prescaler = 0; /* set prescaler to x1. */ 460 461 /* Look for a Hayes ESP board. */ 462 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 463 bus_space_handle_t hayespioh; 464 465 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 466 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 467 continue; 468 if (comprobeHAYESP(hayespioh, sc)) { 469 sc->sc_hayespioh = hayespioh; 470 sc->sc_fifolen = 1024; 471 472 break; 473 } 474 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 475 } 476 /* No ESP; look for other things. */ 477 if (sc->sc_type != COM_TYPE_HAYESP) { 478 #endif 479 sc->sc_fifolen = 1; 480 /* look for a NS 16550AF UART with FIFOs */ 481 bus_space_write_1(iot, ioh, com_fifo, 482 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 483 delay(100); 484 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 485 == IIR_FIFO_MASK) 486 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 487 == FIFO_TRIGGER_14) { 488 SET(sc->sc_hwflags, COM_HW_FIFO); 489 490 #ifdef COM16650 491 /* 492 * IIR changes into the EFR if LCR is set to LCR_EERS 493 * on 16650s. We also know IIR != 0 at this point. 494 * Write 0 into the EFR, and read it. If the result 495 * is 0, we have a 16650. 496 * 497 * Older 16650s were broken; the test to detect them 498 * is taken from the Linux driver. Apparently 499 * setting DLAB enable gives access to the EFR on 500 * these chips. 501 */ 502 lcr = bus_space_read_1(iot, ioh, com_lcr); 503 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 504 bus_space_write_1(iot, ioh, com_efr, 0); 505 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 506 bus_space_write_1(iot, ioh, com_lcr, 507 lcr | LCR_DLAB); 508 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 509 CLR(sc->sc_hwflags, COM_HW_FIFO); 510 sc->sc_fifolen = 0; 511 } else { 512 SET(sc->sc_hwflags, COM_HW_FLOW); 513 sc->sc_fifolen = 32; 514 } 515 } else 516 #endif 517 sc->sc_fifolen = 16; 518 519 #ifdef COM16650 520 bus_space_write_1(iot, ioh, com_lcr, lcr); 521 if (sc->sc_fifolen == 0) 522 fifo_msg = "st16650, broken fifo"; 523 else if (sc->sc_fifolen == 32) 524 fifo_msg = "st16650a, working fifo"; 525 else 526 #endif 527 fifo_msg = "ns16550a, working fifo"; 528 } else 529 fifo_msg = "ns16550, broken fifo"; 530 else 531 fifo_msg = "ns8250 or ns16450, no fifo"; 532 bus_space_write_1(iot, ioh, com_fifo, 0); 533 /* 534 * Some chips will clear down both Tx and Rx FIFOs when zero is 535 * written to com_fifo. If this chip is the console, writing zero 536 * results in some of the chip/FIFO description being lost, so delay 537 * printing it until now. 538 */ 539 delay(10); 540 aprint_normal(": %s\n", fifo_msg); 541 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 542 sc->sc_fifolen = 1; 543 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 544 } 545 #ifdef COM_HAYESP 546 } 547 #endif 548 549 tp = ttymalloc(); 550 tp->t_oproc = comstart; 551 tp->t_param = comparam; 552 tp->t_hwiflow = comhwiflow; 553 554 sc->sc_tty = tp; 555 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 556 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 557 sc->sc_rbavail = com_rbuf_size; 558 if (sc->sc_rbuf == NULL) { 559 aprint_error("%s: unable to allocate ring buffer\n", 560 sc->sc_dev.dv_xname); 561 return; 562 } 563 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 564 565 tty_attach(tp); 566 567 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 568 SET(sc->sc_mcr, MCR_IENABLE); 569 570 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 571 int maj; 572 573 /* locate the major number */ 574 maj = cdevsw_lookup_major(&com_cdevsw); 575 576 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 577 578 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 579 } 580 581 #ifdef KGDB 582 /* 583 * Allow kgdb to "take over" this port. If this is 584 * not the console and is the kgdb device, it has 585 * exclusive use. If it's the console _and_ the 586 * kgdb device, it doesn't. 587 */ 588 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 589 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 590 com_kgdb_attached = 1; 591 592 SET(sc->sc_hwflags, COM_HW_KGDB); 593 } 594 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 595 } 596 #endif 597 598 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 599 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 600 #endif 601 602 #if NRND > 0 && defined(RND_COM) 603 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 604 RND_TYPE_TTY, 0); 605 #endif 606 607 /* if there are no enable/disable functions, assume the device 608 is always enabled */ 609 if (!sc->enable) 610 sc->enabled = 1; 611 612 com_config(sc); 613 614 SET(sc->sc_hwflags, COM_HW_DEV_OK); 615 } 616 617 void 618 com_config(struct com_softc *sc) 619 { 620 bus_space_tag_t iot = sc->sc_iot; 621 bus_space_handle_t ioh = sc->sc_ioh; 622 623 /* Disable interrupts before configuring the device. */ 624 #ifdef COM_PXA2X0 625 if (sc->sc_type == COM_TYPE_PXA2x0) 626 sc->sc_ier = IER_EUART; 627 else 628 #endif 629 sc->sc_ier = 0; 630 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 631 632 #ifdef COM_HAYESP 633 /* Look for a Hayes ESP board. */ 634 if (sc->sc_type == COM_TYPE_HAYESP) { 635 sc->sc_fifolen = 1024; 636 637 /* Set 16550 compatibility mode */ 638 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 639 HAYESP_SETMODE); 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 641 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 642 HAYESP_MODE_SCALE); 643 644 /* Set RTS/CTS flow control */ 645 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 646 HAYESP_SETFLOWTYPE); 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 648 HAYESP_FLOW_RTS); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_FLOW_CTS); 651 652 /* Set flow control levels */ 653 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 654 HAYESP_SETRXFLOW); 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 656 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 661 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 662 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 663 } 664 #endif 665 666 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 667 com_enable_debugport(sc); 668 } 669 670 int 671 com_detach(struct device *self, int flags) 672 { 673 struct com_softc *sc = (struct com_softc *)self; 674 int maj, mn; 675 676 /* locate the major number */ 677 maj = cdevsw_lookup_major(&com_cdevsw); 678 679 /* Nuke the vnodes for any open instances. */ 680 mn = self->dv_unit; 681 vdevgone(maj, mn, mn, VCHR); 682 683 mn |= COMDIALOUT_MASK; 684 vdevgone(maj, mn, mn, VCHR); 685 686 if (sc->sc_rbuf == NULL) { 687 /* 688 * Ring buffer allocation failed in the com_attach_subr, 689 * only the tty is allocated, and nothing else. 690 */ 691 ttyfree(sc->sc_tty); 692 return 0; 693 } 694 695 /* Free the receive buffer. */ 696 free(sc->sc_rbuf, M_DEVBUF); 697 698 /* Detach and free the tty. */ 699 tty_detach(sc->sc_tty); 700 ttyfree(sc->sc_tty); 701 702 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 703 /* Unhook the soft interrupt handler. */ 704 softintr_disestablish(sc->sc_si); 705 #endif 706 707 #if NRND > 0 && defined(RND_COM) 708 /* Unhook the entropy source. */ 709 rnd_detach_source(&sc->rnd_source); 710 #endif 711 712 return (0); 713 } 714 715 int 716 com_activate(struct device *self, enum devact act) 717 { 718 struct com_softc *sc = (struct com_softc *)self; 719 int s, rv = 0; 720 721 s = splserial(); 722 COM_LOCK(sc); 723 switch (act) { 724 case DVACT_ACTIVATE: 725 rv = EOPNOTSUPP; 726 break; 727 728 case DVACT_DEACTIVATE: 729 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 730 rv = EBUSY; 731 break; 732 } 733 734 if (sc->disable != NULL && sc->enabled != 0) { 735 (*sc->disable)(sc); 736 sc->enabled = 0; 737 } 738 break; 739 } 740 741 COM_UNLOCK(sc); 742 splx(s); 743 return (rv); 744 } 745 746 void 747 com_shutdown(struct com_softc *sc) 748 { 749 struct tty *tp = sc->sc_tty; 750 int s; 751 752 s = splserial(); 753 COM_LOCK(sc); 754 755 /* If we were asserting flow control, then deassert it. */ 756 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 757 com_hwiflow(sc); 758 759 /* Clear any break condition set with TIOCSBRK. */ 760 com_break(sc, 0); 761 762 /* Turn off PPS capture on last close. */ 763 sc->sc_ppsmask = 0; 764 sc->ppsparam.mode = 0; 765 766 /* 767 * Hang up if necessary. Wait a bit, so the other side has time to 768 * notice even if we immediately open the port again. 769 * Avoid tsleeping above splhigh(). 770 */ 771 if (ISSET(tp->t_cflag, HUPCL)) { 772 com_modem(sc, 0); 773 COM_UNLOCK(sc); 774 splx(s); 775 /* XXX tsleep will only timeout */ 776 (void) tsleep(sc, TTIPRI, ttclos, hz); 777 s = splserial(); 778 COM_LOCK(sc); 779 } 780 781 /* Turn off interrupts. */ 782 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 783 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 784 #ifdef COM_PXA2X0 785 if (sc->sc_type == COM_TYPE_PXA2x0) 786 sc->sc_ier |= IER_ERXTOUT; 787 #endif 788 } else 789 sc->sc_ier = 0; 790 791 #ifdef COM_PXA2X0 792 if (sc->sc_type == COM_TYPE_PXA2x0) 793 sc->sc_ier |= IER_EUART; 794 #endif 795 796 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 797 798 if (sc->disable) { 799 #ifdef DIAGNOSTIC 800 if (!sc->enabled) 801 panic("com_shutdown: not enabled?"); 802 #endif 803 (*sc->disable)(sc); 804 sc->enabled = 0; 805 } 806 COM_UNLOCK(sc); 807 splx(s); 808 } 809 810 int 811 comopen(dev_t dev, int flag, int mode, struct proc *p) 812 { 813 struct com_softc *sc; 814 struct tty *tp; 815 int s, s2; 816 int error; 817 818 sc = device_lookup(&com_cd, COMUNIT(dev)); 819 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 820 sc->sc_rbuf == NULL) 821 return (ENXIO); 822 823 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 824 return (ENXIO); 825 826 #ifdef KGDB 827 /* 828 * If this is the kgdb port, no other use is permitted. 829 */ 830 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 831 return (EBUSY); 832 #endif 833 834 tp = sc->sc_tty; 835 836 if (ISSET(tp->t_state, TS_ISOPEN) && 837 ISSET(tp->t_state, TS_XCLUDE) && 838 p->p_ucred->cr_uid != 0) 839 return (EBUSY); 840 841 s = spltty(); 842 843 /* 844 * Do the following iff this is a first open. 845 */ 846 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 847 struct termios t; 848 849 tp->t_dev = dev; 850 851 s2 = splserial(); 852 COM_LOCK(sc); 853 854 if (sc->enable) { 855 if ((*sc->enable)(sc)) { 856 COM_UNLOCK(sc); 857 splx(s2); 858 splx(s); 859 printf("%s: device enable failed\n", 860 sc->sc_dev.dv_xname); 861 return (EIO); 862 } 863 sc->enabled = 1; 864 com_config(sc); 865 } 866 867 /* Turn on interrupts. */ 868 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 869 #ifdef COM_PXA2X0 870 if (sc->sc_type == COM_TYPE_PXA2x0) 871 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 872 #endif 873 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 874 875 /* Fetch the current modem control status, needed later. */ 876 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 877 878 /* Clear PPS capture state on first open. */ 879 sc->sc_ppsmask = 0; 880 sc->ppsparam.mode = 0; 881 882 COM_UNLOCK(sc); 883 splx(s2); 884 885 /* 886 * Initialize the termios status to the defaults. Add in the 887 * sticky bits from TIOCSFLAGS. 888 */ 889 t.c_ispeed = 0; 890 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 891 t.c_ospeed = comconsrate; 892 t.c_cflag = comconscflag; 893 } else { 894 t.c_ospeed = TTYDEF_SPEED; 895 t.c_cflag = TTYDEF_CFLAG; 896 } 897 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 898 SET(t.c_cflag, CLOCAL); 899 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 900 SET(t.c_cflag, CRTSCTS); 901 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 902 SET(t.c_cflag, MDMBUF); 903 /* Make sure comparam() will do something. */ 904 tp->t_ospeed = 0; 905 (void) comparam(tp, &t); 906 tp->t_iflag = TTYDEF_IFLAG; 907 tp->t_oflag = TTYDEF_OFLAG; 908 tp->t_lflag = TTYDEF_LFLAG; 909 ttychars(tp); 910 ttsetwater(tp); 911 912 s2 = splserial(); 913 COM_LOCK(sc); 914 915 /* 916 * Turn on DTR. We must always do this, even if carrier is not 917 * present, because otherwise we'd have to use TIOCSDTR 918 * immediately after setting CLOCAL, which applications do not 919 * expect. We always assert DTR while the device is open 920 * unless explicitly requested to deassert it. 921 */ 922 com_modem(sc, 1); 923 924 /* Clear the input ring, and unblock. */ 925 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 926 sc->sc_rbavail = com_rbuf_size; 927 com_iflush(sc); 928 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 929 com_hwiflow(sc); 930 931 #ifdef COM_DEBUG 932 if (com_debug) 933 comstatus(sc, "comopen "); 934 #endif 935 936 COM_UNLOCK(sc); 937 splx(s2); 938 } 939 940 splx(s); 941 942 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 943 if (error) 944 goto bad; 945 946 error = (*tp->t_linesw->l_open)(dev, tp); 947 if (error) 948 goto bad; 949 950 return (0); 951 952 bad: 953 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 954 /* 955 * We failed to open the device, and nobody else had it opened. 956 * Clean up the state as appropriate. 957 */ 958 com_shutdown(sc); 959 } 960 961 return (error); 962 } 963 964 int 965 comclose(dev_t dev, int flag, int mode, struct proc *p) 966 { 967 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 968 struct tty *tp = sc->sc_tty; 969 970 /* XXX This is for cons.c. */ 971 if (!ISSET(tp->t_state, TS_ISOPEN)) 972 return (0); 973 974 (*tp->t_linesw->l_close)(tp, flag); 975 ttyclose(tp); 976 977 if (COM_ISALIVE(sc) == 0) 978 return (0); 979 980 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 981 /* 982 * Although we got a last close, the device may still be in 983 * use; e.g. if this was the dialout node, and there are still 984 * processes waiting for carrier on the non-dialout node. 985 */ 986 com_shutdown(sc); 987 } 988 989 return (0); 990 } 991 992 int 993 comread(dev_t dev, struct uio *uio, int flag) 994 { 995 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 996 struct tty *tp = sc->sc_tty; 997 998 if (COM_ISALIVE(sc) == 0) 999 return (EIO); 1000 1001 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1002 } 1003 1004 int 1005 comwrite(dev_t dev, struct uio *uio, int flag) 1006 { 1007 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1008 struct tty *tp = sc->sc_tty; 1009 1010 if (COM_ISALIVE(sc) == 0) 1011 return (EIO); 1012 1013 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1014 } 1015 1016 int 1017 compoll(dev_t dev, int events, struct proc *p) 1018 { 1019 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1020 struct tty *tp = sc->sc_tty; 1021 1022 if (COM_ISALIVE(sc) == 0) 1023 return (EIO); 1024 1025 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1026 } 1027 1028 struct tty * 1029 comtty(dev_t dev) 1030 { 1031 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1032 struct tty *tp = sc->sc_tty; 1033 1034 return (tp); 1035 } 1036 1037 int 1038 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1039 { 1040 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1041 struct tty *tp = sc->sc_tty; 1042 int error; 1043 int s; 1044 1045 if (COM_ISALIVE(sc) == 0) 1046 return (EIO); 1047 1048 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1049 if (error != EPASSTHROUGH) 1050 return (error); 1051 1052 error = ttioctl(tp, cmd, data, flag, p); 1053 if (error != EPASSTHROUGH) 1054 return (error); 1055 1056 error = 0; 1057 1058 s = splserial(); 1059 COM_LOCK(sc); 1060 1061 switch (cmd) { 1062 case TIOCSBRK: 1063 com_break(sc, 1); 1064 break; 1065 1066 case TIOCCBRK: 1067 com_break(sc, 0); 1068 break; 1069 1070 case TIOCSDTR: 1071 com_modem(sc, 1); 1072 break; 1073 1074 case TIOCCDTR: 1075 com_modem(sc, 0); 1076 break; 1077 1078 case TIOCGFLAGS: 1079 *(int *)data = sc->sc_swflags; 1080 break; 1081 1082 case TIOCSFLAGS: 1083 error = suser(p->p_ucred, &p->p_acflag); 1084 if (error) 1085 break; 1086 sc->sc_swflags = *(int *)data; 1087 break; 1088 1089 case TIOCMSET: 1090 case TIOCMBIS: 1091 case TIOCMBIC: 1092 tiocm_to_com(sc, cmd, *(int *)data); 1093 break; 1094 1095 case TIOCMGET: 1096 *(int *)data = com_to_tiocm(sc); 1097 break; 1098 1099 case PPS_IOC_CREATE: 1100 break; 1101 1102 case PPS_IOC_DESTROY: 1103 break; 1104 1105 case PPS_IOC_GETPARAMS: { 1106 pps_params_t *pp; 1107 pp = (pps_params_t *)data; 1108 *pp = sc->ppsparam; 1109 break; 1110 } 1111 1112 case PPS_IOC_SETPARAMS: { 1113 pps_params_t *pp; 1114 int mode; 1115 pp = (pps_params_t *)data; 1116 if (pp->mode & ~ppscap) { 1117 error = EINVAL; 1118 break; 1119 } 1120 sc->ppsparam = *pp; 1121 /* 1122 * Compute msr masks from user-specified timestamp state. 1123 */ 1124 mode = sc->ppsparam.mode; 1125 #ifdef PPS_SYNC 1126 if (mode & PPS_HARDPPSONASSERT) { 1127 mode |= PPS_CAPTUREASSERT; 1128 /* XXX revoke any previous HARDPPS source */ 1129 } 1130 if (mode & PPS_HARDPPSONCLEAR) { 1131 mode |= PPS_CAPTURECLEAR; 1132 /* XXX revoke any previous HARDPPS source */ 1133 } 1134 #endif /* PPS_SYNC */ 1135 switch (mode & PPS_CAPTUREBOTH) { 1136 case 0: 1137 sc->sc_ppsmask = 0; 1138 break; 1139 1140 case PPS_CAPTUREASSERT: 1141 sc->sc_ppsmask = MSR_DCD; 1142 sc->sc_ppsassert = MSR_DCD; 1143 sc->sc_ppsclear = -1; 1144 break; 1145 1146 case PPS_CAPTURECLEAR: 1147 sc->sc_ppsmask = MSR_DCD; 1148 sc->sc_ppsassert = -1; 1149 sc->sc_ppsclear = 0; 1150 break; 1151 1152 case PPS_CAPTUREBOTH: 1153 sc->sc_ppsmask = MSR_DCD; 1154 sc->sc_ppsassert = MSR_DCD; 1155 sc->sc_ppsclear = 0; 1156 break; 1157 1158 default: 1159 error = EINVAL; 1160 break; 1161 } 1162 break; 1163 } 1164 1165 case PPS_IOC_GETCAP: 1166 *(int*)data = ppscap; 1167 break; 1168 1169 case PPS_IOC_FETCH: { 1170 pps_info_t *pi; 1171 pi = (pps_info_t *)data; 1172 *pi = sc->ppsinfo; 1173 break; 1174 } 1175 1176 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1177 /* 1178 * Some GPS clocks models use the falling rather than 1179 * rising edge as the on-the-second signal. 1180 * The old API has no way to specify PPS polarity. 1181 */ 1182 sc->sc_ppsmask = MSR_DCD; 1183 #ifndef PPS_TRAILING_EDGE 1184 sc->sc_ppsassert = MSR_DCD; 1185 sc->sc_ppsclear = -1; 1186 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1187 &sc->ppsinfo.assert_timestamp); 1188 #else 1189 sc->sc_ppsassert = -1 1190 sc->sc_ppsclear = 0; 1191 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1192 &sc->ppsinfo.clear_timestamp); 1193 #endif 1194 break; 1195 1196 default: 1197 error = EPASSTHROUGH; 1198 break; 1199 } 1200 1201 COM_UNLOCK(sc); 1202 splx(s); 1203 1204 #ifdef COM_DEBUG 1205 if (com_debug) 1206 comstatus(sc, "comioctl "); 1207 #endif 1208 1209 return (error); 1210 } 1211 1212 integrate void 1213 com_schedrx(struct com_softc *sc) 1214 { 1215 1216 sc->sc_rx_ready = 1; 1217 1218 /* Wake up the poller. */ 1219 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1220 softintr_schedule(sc->sc_si); 1221 #else 1222 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1223 setsoftserial(); 1224 #else 1225 if (!com_softintr_scheduled) { 1226 com_softintr_scheduled = 1; 1227 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1228 } 1229 #endif 1230 #endif 1231 } 1232 1233 void 1234 com_break(struct com_softc *sc, int onoff) 1235 { 1236 1237 if (onoff) 1238 SET(sc->sc_lcr, LCR_SBREAK); 1239 else 1240 CLR(sc->sc_lcr, LCR_SBREAK); 1241 1242 if (!sc->sc_heldchange) { 1243 if (sc->sc_tx_busy) { 1244 sc->sc_heldtbc = sc->sc_tbc; 1245 sc->sc_tbc = 0; 1246 sc->sc_heldchange = 1; 1247 } else 1248 com_loadchannelregs(sc); 1249 } 1250 } 1251 1252 void 1253 com_modem(struct com_softc *sc, int onoff) 1254 { 1255 1256 if (sc->sc_mcr_dtr == 0) 1257 return; 1258 1259 if (onoff) 1260 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1261 else 1262 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1263 1264 if (!sc->sc_heldchange) { 1265 if (sc->sc_tx_busy) { 1266 sc->sc_heldtbc = sc->sc_tbc; 1267 sc->sc_tbc = 0; 1268 sc->sc_heldchange = 1; 1269 } else 1270 com_loadchannelregs(sc); 1271 } 1272 } 1273 1274 void 1275 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1276 { 1277 u_char combits; 1278 1279 combits = 0; 1280 if (ISSET(ttybits, TIOCM_DTR)) 1281 SET(combits, MCR_DTR); 1282 if (ISSET(ttybits, TIOCM_RTS)) 1283 SET(combits, MCR_RTS); 1284 1285 switch (how) { 1286 case TIOCMBIC: 1287 CLR(sc->sc_mcr, combits); 1288 break; 1289 1290 case TIOCMBIS: 1291 SET(sc->sc_mcr, combits); 1292 break; 1293 1294 case TIOCMSET: 1295 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1296 SET(sc->sc_mcr, combits); 1297 break; 1298 } 1299 1300 if (!sc->sc_heldchange) { 1301 if (sc->sc_tx_busy) { 1302 sc->sc_heldtbc = sc->sc_tbc; 1303 sc->sc_tbc = 0; 1304 sc->sc_heldchange = 1; 1305 } else 1306 com_loadchannelregs(sc); 1307 } 1308 } 1309 1310 int 1311 com_to_tiocm(struct com_softc *sc) 1312 { 1313 u_char combits; 1314 int ttybits = 0; 1315 1316 combits = sc->sc_mcr; 1317 if (ISSET(combits, MCR_DTR)) 1318 SET(ttybits, TIOCM_DTR); 1319 if (ISSET(combits, MCR_RTS)) 1320 SET(ttybits, TIOCM_RTS); 1321 1322 combits = sc->sc_msr; 1323 if (ISSET(combits, MSR_DCD)) 1324 SET(ttybits, TIOCM_CD); 1325 if (ISSET(combits, MSR_CTS)) 1326 SET(ttybits, TIOCM_CTS); 1327 if (ISSET(combits, MSR_DSR)) 1328 SET(ttybits, TIOCM_DSR); 1329 if (ISSET(combits, MSR_RI | MSR_TERI)) 1330 SET(ttybits, TIOCM_RI); 1331 1332 #ifdef COM_PXA2X0 1333 if (sc->sc_type == COM_TYPE_PXA2x0) { 1334 if ((sc->sc_ier & 0x0f) != 0) 1335 SET(ttybits, TIOCM_LE); 1336 } else 1337 #endif 1338 if ((sc->sc_ier & 0xbf) != 0) 1339 SET(ttybits, TIOCM_LE); 1340 1341 return (ttybits); 1342 } 1343 1344 static u_char 1345 cflag2lcr(tcflag_t cflag) 1346 { 1347 u_char lcr = 0; 1348 1349 switch (ISSET(cflag, CSIZE)) { 1350 case CS5: 1351 SET(lcr, LCR_5BITS); 1352 break; 1353 case CS6: 1354 SET(lcr, LCR_6BITS); 1355 break; 1356 case CS7: 1357 SET(lcr, LCR_7BITS); 1358 break; 1359 case CS8: 1360 SET(lcr, LCR_8BITS); 1361 break; 1362 } 1363 if (ISSET(cflag, PARENB)) { 1364 SET(lcr, LCR_PENAB); 1365 if (!ISSET(cflag, PARODD)) 1366 SET(lcr, LCR_PEVEN); 1367 } 1368 if (ISSET(cflag, CSTOPB)) 1369 SET(lcr, LCR_STOPB); 1370 1371 return (lcr); 1372 } 1373 1374 int 1375 comparam(struct tty *tp, struct termios *t) 1376 { 1377 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1378 int ospeed; 1379 u_char lcr; 1380 int s; 1381 1382 if (COM_ISALIVE(sc) == 0) 1383 return (EIO); 1384 1385 #ifdef COM_HAYESP 1386 if (sc->sc_type == COM_TYPE_HAYESP) { 1387 int prescaler, speed; 1388 1389 /* 1390 * Calculate UART clock prescaler. It should be in 1391 * range of 0 .. 3. 1392 */ 1393 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1394 prescaler++, speed /= 2) 1395 if ((ospeed = comspeed(speed, sc->sc_frequency, 1396 sc->sc_type)) > 0) 1397 break; 1398 1399 if (prescaler == 4) 1400 return (EINVAL); 1401 sc->sc_prescaler = prescaler; 1402 } else 1403 #endif 1404 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1405 1406 /* Check requested parameters. */ 1407 if (ospeed < 0) 1408 return (EINVAL); 1409 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1410 return (EINVAL); 1411 1412 /* 1413 * For the console, always force CLOCAL and !HUPCL, so that the port 1414 * is always active. 1415 */ 1416 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1417 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1418 SET(t->c_cflag, CLOCAL); 1419 CLR(t->c_cflag, HUPCL); 1420 } 1421 1422 /* 1423 * If there were no changes, don't do anything. This avoids dropping 1424 * input and improves performance when all we did was frob things like 1425 * VMIN and VTIME. 1426 */ 1427 if (tp->t_ospeed == t->c_ospeed && 1428 tp->t_cflag == t->c_cflag) 1429 return (0); 1430 1431 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1432 1433 s = splserial(); 1434 COM_LOCK(sc); 1435 1436 sc->sc_lcr = lcr; 1437 1438 /* 1439 * If we're not in a mode that assumes a connection is present, then 1440 * ignore carrier changes. 1441 */ 1442 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1443 sc->sc_msr_dcd = 0; 1444 else 1445 sc->sc_msr_dcd = MSR_DCD; 1446 /* 1447 * Set the flow control pins depending on the current flow control 1448 * mode. 1449 */ 1450 if (ISSET(t->c_cflag, CRTSCTS)) { 1451 sc->sc_mcr_dtr = MCR_DTR; 1452 sc->sc_mcr_rts = MCR_RTS; 1453 sc->sc_msr_cts = MSR_CTS; 1454 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1455 } else if (ISSET(t->c_cflag, MDMBUF)) { 1456 /* 1457 * For DTR/DCD flow control, make sure we don't toggle DTR for 1458 * carrier detection. 1459 */ 1460 sc->sc_mcr_dtr = 0; 1461 sc->sc_mcr_rts = MCR_DTR; 1462 sc->sc_msr_cts = MSR_DCD; 1463 sc->sc_efr = 0; 1464 } else { 1465 /* 1466 * If no flow control, then always set RTS. This will make 1467 * the other side happy if it mistakenly thinks we're doing 1468 * RTS/CTS flow control. 1469 */ 1470 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1471 sc->sc_mcr_rts = 0; 1472 sc->sc_msr_cts = 0; 1473 sc->sc_efr = 0; 1474 if (ISSET(sc->sc_mcr, MCR_DTR)) 1475 SET(sc->sc_mcr, MCR_RTS); 1476 else 1477 CLR(sc->sc_mcr, MCR_RTS); 1478 } 1479 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1480 1481 #if 0 1482 if (ospeed == 0) 1483 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1484 else 1485 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1486 #endif 1487 1488 sc->sc_dlbl = ospeed; 1489 sc->sc_dlbh = ospeed >> 8; 1490 1491 /* 1492 * Set the FIFO threshold based on the receive speed. 1493 * 1494 * * If it's a low speed, it's probably a mouse or some other 1495 * interactive device, so set the threshold low. 1496 * * If it's a high speed, trim the trigger level down to prevent 1497 * overflows. 1498 * * Otherwise set it a bit higher. 1499 */ 1500 if (sc->sc_type == COM_TYPE_HAYESP) 1501 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1502 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1503 sc->sc_fifo = FIFO_ENABLE | 1504 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1505 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1506 else 1507 sc->sc_fifo = 0; 1508 1509 /* And copy to tty. */ 1510 tp->t_ispeed = 0; 1511 tp->t_ospeed = t->c_ospeed; 1512 tp->t_cflag = t->c_cflag; 1513 1514 if (!sc->sc_heldchange) { 1515 if (sc->sc_tx_busy) { 1516 sc->sc_heldtbc = sc->sc_tbc; 1517 sc->sc_tbc = 0; 1518 sc->sc_heldchange = 1; 1519 } else 1520 com_loadchannelregs(sc); 1521 } 1522 1523 if (!ISSET(t->c_cflag, CHWFLOW)) { 1524 /* Disable the high water mark. */ 1525 sc->sc_r_hiwat = 0; 1526 sc->sc_r_lowat = 0; 1527 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1528 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1529 com_schedrx(sc); 1530 } 1531 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1532 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1533 com_hwiflow(sc); 1534 } 1535 } else { 1536 sc->sc_r_hiwat = com_rbuf_hiwat; 1537 sc->sc_r_lowat = com_rbuf_lowat; 1538 } 1539 1540 COM_UNLOCK(sc); 1541 splx(s); 1542 1543 /* 1544 * Update the tty layer's idea of the carrier bit, in case we changed 1545 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1546 * explicit request. 1547 */ 1548 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1549 1550 #ifdef COM_DEBUG 1551 if (com_debug) 1552 comstatus(sc, "comparam "); 1553 #endif 1554 1555 if (!ISSET(t->c_cflag, CHWFLOW)) { 1556 if (sc->sc_tx_stopped) { 1557 sc->sc_tx_stopped = 0; 1558 comstart(tp); 1559 } 1560 } 1561 1562 return (0); 1563 } 1564 1565 void 1566 com_iflush(struct com_softc *sc) 1567 { 1568 bus_space_tag_t iot = sc->sc_iot; 1569 bus_space_handle_t ioh = sc->sc_ioh; 1570 #ifdef DIAGNOSTIC 1571 int reg; 1572 #endif 1573 int timo; 1574 1575 #ifdef DIAGNOSTIC 1576 reg = 0xffff; 1577 #endif 1578 timo = 50000; 1579 /* flush any pending I/O */ 1580 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1581 && --timo) 1582 #ifdef DIAGNOSTIC 1583 reg = 1584 #else 1585 (void) 1586 #endif 1587 bus_space_read_1(iot, ioh, com_data); 1588 #ifdef DIAGNOSTIC 1589 if (!timo) 1590 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1591 reg); 1592 #endif 1593 } 1594 1595 void 1596 com_loadchannelregs(struct com_softc *sc) 1597 { 1598 bus_space_tag_t iot = sc->sc_iot; 1599 bus_space_handle_t ioh = sc->sc_ioh; 1600 1601 /* XXXXX necessary? */ 1602 com_iflush(sc); 1603 1604 #ifdef COM_PXA2X0 1605 if (sc->sc_type == COM_TYPE_PXA2x0) 1606 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1607 else 1608 #endif 1609 bus_space_write_1(iot, ioh, com_ier, 0); 1610 1611 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1612 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1613 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1614 } 1615 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1616 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1617 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1618 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1619 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1620 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1621 #ifdef COM_HAYESP 1622 if (sc->sc_type == COM_TYPE_HAYESP) { 1623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1624 HAYESP_SETPRESCALER); 1625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1626 sc->sc_prescaler); 1627 } 1628 #endif 1629 1630 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1631 } 1632 1633 int 1634 comhwiflow(struct tty *tp, int block) 1635 { 1636 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1637 int s; 1638 1639 if (COM_ISALIVE(sc) == 0) 1640 return (0); 1641 1642 if (sc->sc_mcr_rts == 0) 1643 return (0); 1644 1645 s = splserial(); 1646 COM_LOCK(sc); 1647 1648 if (block) { 1649 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1650 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1651 com_hwiflow(sc); 1652 } 1653 } else { 1654 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1655 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1656 com_schedrx(sc); 1657 } 1658 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1659 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1660 com_hwiflow(sc); 1661 } 1662 } 1663 1664 COM_UNLOCK(sc); 1665 splx(s); 1666 return (1); 1667 } 1668 1669 /* 1670 * (un)block input via hw flowcontrol 1671 */ 1672 void 1673 com_hwiflow(struct com_softc *sc) 1674 { 1675 bus_space_tag_t iot = sc->sc_iot; 1676 bus_space_handle_t ioh = sc->sc_ioh; 1677 1678 if (sc->sc_mcr_rts == 0) 1679 return; 1680 1681 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1682 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1683 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1684 } else { 1685 SET(sc->sc_mcr, sc->sc_mcr_rts); 1686 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1687 } 1688 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1689 } 1690 1691 1692 void 1693 comstart(struct tty *tp) 1694 { 1695 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1696 bus_space_tag_t iot = sc->sc_iot; 1697 bus_space_handle_t ioh = sc->sc_ioh; 1698 int s; 1699 1700 if (COM_ISALIVE(sc) == 0) 1701 return; 1702 1703 s = spltty(); 1704 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1705 goto out; 1706 if (sc->sc_tx_stopped) 1707 goto out; 1708 1709 if (tp->t_outq.c_cc <= tp->t_lowat) { 1710 if (ISSET(tp->t_state, TS_ASLEEP)) { 1711 CLR(tp->t_state, TS_ASLEEP); 1712 wakeup(&tp->t_outq); 1713 } 1714 selwakeup(&tp->t_wsel); 1715 if (tp->t_outq.c_cc == 0) 1716 goto out; 1717 } 1718 1719 /* Grab the first contiguous region of buffer space. */ 1720 { 1721 u_char *tba; 1722 int tbc; 1723 1724 tba = tp->t_outq.c_cf; 1725 tbc = ndqb(&tp->t_outq, 0); 1726 1727 (void)splserial(); 1728 COM_LOCK(sc); 1729 1730 sc->sc_tba = tba; 1731 sc->sc_tbc = tbc; 1732 } 1733 1734 SET(tp->t_state, TS_BUSY); 1735 sc->sc_tx_busy = 1; 1736 1737 /* Enable transmit completion interrupts if necessary. */ 1738 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1739 SET(sc->sc_ier, IER_ETXRDY); 1740 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1741 } 1742 1743 /* Output the first chunk of the contiguous buffer. */ 1744 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1745 u_int n; 1746 1747 n = sc->sc_tbc; 1748 if (n > sc->sc_fifolen) 1749 n = sc->sc_fifolen; 1750 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1751 sc->sc_tbc -= n; 1752 sc->sc_tba += n; 1753 } 1754 COM_UNLOCK(sc); 1755 out: 1756 splx(s); 1757 return; 1758 } 1759 1760 /* 1761 * Stop output on a line. 1762 */ 1763 void 1764 comstop(struct tty *tp, int flag) 1765 { 1766 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1767 int s; 1768 1769 s = splserial(); 1770 COM_LOCK(sc); 1771 if (ISSET(tp->t_state, TS_BUSY)) { 1772 /* Stop transmitting at the next chunk. */ 1773 sc->sc_tbc = 0; 1774 sc->sc_heldtbc = 0; 1775 if (!ISSET(tp->t_state, TS_TTSTOP)) 1776 SET(tp->t_state, TS_FLUSH); 1777 } 1778 COM_UNLOCK(sc); 1779 splx(s); 1780 } 1781 1782 void 1783 comdiag(void *arg) 1784 { 1785 struct com_softc *sc = arg; 1786 int overflows, floods; 1787 int s; 1788 1789 s = splserial(); 1790 COM_LOCK(sc); 1791 overflows = sc->sc_overflows; 1792 sc->sc_overflows = 0; 1793 floods = sc->sc_floods; 1794 sc->sc_floods = 0; 1795 sc->sc_errors = 0; 1796 COM_UNLOCK(sc); 1797 splx(s); 1798 1799 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1800 sc->sc_dev.dv_xname, 1801 overflows, overflows == 1 ? "" : "s", 1802 floods, floods == 1 ? "" : "s"); 1803 } 1804 1805 integrate void 1806 com_rxsoft(struct com_softc *sc, struct tty *tp) 1807 { 1808 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1809 u_char *get, *end; 1810 u_int cc, scc; 1811 u_char lsr; 1812 int code; 1813 int s; 1814 1815 end = sc->sc_ebuf; 1816 get = sc->sc_rbget; 1817 scc = cc = com_rbuf_size - sc->sc_rbavail; 1818 1819 if (cc == com_rbuf_size) { 1820 sc->sc_floods++; 1821 if (sc->sc_errors++ == 0) 1822 callout_reset(&sc->sc_diag_callout, 60 * hz, 1823 comdiag, sc); 1824 } 1825 1826 /* If not yet open, drop the entire buffer content here */ 1827 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1828 get += cc << 1; 1829 if (get >= end) 1830 get -= com_rbuf_size << 1; 1831 cc = 0; 1832 } 1833 while (cc) { 1834 code = get[0]; 1835 lsr = get[1]; 1836 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1837 if (ISSET(lsr, LSR_OE)) { 1838 sc->sc_overflows++; 1839 if (sc->sc_errors++ == 0) 1840 callout_reset(&sc->sc_diag_callout, 1841 60 * hz, comdiag, sc); 1842 } 1843 if (ISSET(lsr, LSR_BI | LSR_FE)) 1844 SET(code, TTY_FE); 1845 if (ISSET(lsr, LSR_PE)) 1846 SET(code, TTY_PE); 1847 } 1848 if ((*rint)(code, tp) == -1) { 1849 /* 1850 * The line discipline's buffer is out of space. 1851 */ 1852 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1853 /* 1854 * We're either not using flow control, or the 1855 * line discipline didn't tell us to block for 1856 * some reason. Either way, we have no way to 1857 * know when there's more space available, so 1858 * just drop the rest of the data. 1859 */ 1860 get += cc << 1; 1861 if (get >= end) 1862 get -= com_rbuf_size << 1; 1863 cc = 0; 1864 } else { 1865 /* 1866 * Don't schedule any more receive processing 1867 * until the line discipline tells us there's 1868 * space available (through comhwiflow()). 1869 * Leave the rest of the data in the input 1870 * buffer. 1871 */ 1872 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1873 } 1874 break; 1875 } 1876 get += 2; 1877 if (get >= end) 1878 get = sc->sc_rbuf; 1879 cc--; 1880 } 1881 1882 if (cc != scc) { 1883 sc->sc_rbget = get; 1884 s = splserial(); 1885 COM_LOCK(sc); 1886 1887 cc = sc->sc_rbavail += scc - cc; 1888 /* Buffers should be ok again, release possible block. */ 1889 if (cc >= sc->sc_r_lowat) { 1890 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1891 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1892 SET(sc->sc_ier, IER_ERXRDY); 1893 #ifdef COM_PXA2X0 1894 if (sc->sc_type == COM_TYPE_PXA2x0) 1895 SET(sc->sc_ier, IER_ERXTOUT); 1896 #endif 1897 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1898 com_ier, sc->sc_ier); 1899 } 1900 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1901 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1902 com_hwiflow(sc); 1903 } 1904 } 1905 COM_UNLOCK(sc); 1906 splx(s); 1907 } 1908 } 1909 1910 integrate void 1911 com_txsoft(struct com_softc *sc, struct tty *tp) 1912 { 1913 1914 CLR(tp->t_state, TS_BUSY); 1915 if (ISSET(tp->t_state, TS_FLUSH)) 1916 CLR(tp->t_state, TS_FLUSH); 1917 else 1918 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1919 (*tp->t_linesw->l_start)(tp); 1920 } 1921 1922 integrate void 1923 com_stsoft(struct com_softc *sc, struct tty *tp) 1924 { 1925 u_char msr, delta; 1926 int s; 1927 1928 s = splserial(); 1929 COM_LOCK(sc); 1930 msr = sc->sc_msr; 1931 delta = sc->sc_msr_delta; 1932 sc->sc_msr_delta = 0; 1933 COM_UNLOCK(sc); 1934 splx(s); 1935 1936 if (ISSET(delta, sc->sc_msr_dcd)) { 1937 /* 1938 * Inform the tty layer that carrier detect changed. 1939 */ 1940 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1941 } 1942 1943 if (ISSET(delta, sc->sc_msr_cts)) { 1944 /* Block or unblock output according to flow control. */ 1945 if (ISSET(msr, sc->sc_msr_cts)) { 1946 sc->sc_tx_stopped = 0; 1947 (*tp->t_linesw->l_start)(tp); 1948 } else { 1949 sc->sc_tx_stopped = 1; 1950 } 1951 } 1952 1953 #ifdef COM_DEBUG 1954 if (com_debug) 1955 comstatus(sc, "com_stsoft"); 1956 #endif 1957 } 1958 1959 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1960 void 1961 comsoft(void *arg) 1962 { 1963 struct com_softc *sc = arg; 1964 struct tty *tp; 1965 1966 if (COM_ISALIVE(sc) == 0) 1967 return; 1968 1969 { 1970 #else 1971 void 1972 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1973 comsoft(void) 1974 #else 1975 comsoft(void *arg) 1976 #endif 1977 { 1978 struct com_softc *sc; 1979 struct tty *tp; 1980 int unit; 1981 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1982 int s; 1983 1984 s = splsoftserial(); 1985 com_softintr_scheduled = 0; 1986 #endif 1987 1988 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1989 sc = device_lookup(&com_cd, unit); 1990 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1991 continue; 1992 1993 if (COM_ISALIVE(sc) == 0) 1994 continue; 1995 1996 tp = sc->sc_tty; 1997 if (tp == NULL) 1998 continue; 1999 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2000 continue; 2001 #endif 2002 tp = sc->sc_tty; 2003 2004 if (sc->sc_rx_ready) { 2005 sc->sc_rx_ready = 0; 2006 com_rxsoft(sc, tp); 2007 } 2008 2009 if (sc->sc_st_check) { 2010 sc->sc_st_check = 0; 2011 com_stsoft(sc, tp); 2012 } 2013 2014 if (sc->sc_tx_done) { 2015 sc->sc_tx_done = 0; 2016 com_txsoft(sc, tp); 2017 } 2018 } 2019 2020 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2021 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2022 splx(s); 2023 #endif 2024 #endif 2025 } 2026 2027 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2028 /* there has got to be a better way to do comsoft() */ 2029 }} 2030 #endif 2031 2032 int 2033 comintr(void *arg) 2034 { 2035 struct com_softc *sc = arg; 2036 bus_space_tag_t iot = sc->sc_iot; 2037 bus_space_handle_t ioh = sc->sc_ioh; 2038 u_char *put, *end; 2039 u_int cc; 2040 u_char lsr, iir; 2041 2042 if (COM_ISALIVE(sc) == 0) 2043 return (0); 2044 2045 COM_LOCK(sc); 2046 iir = bus_space_read_1(iot, ioh, com_iir); 2047 if (ISSET(iir, IIR_NOPEND)) { 2048 COM_UNLOCK(sc); 2049 return (0); 2050 } 2051 2052 end = sc->sc_ebuf; 2053 put = sc->sc_rbput; 2054 cc = sc->sc_rbavail; 2055 2056 again: do { 2057 u_char msr, delta; 2058 2059 lsr = bus_space_read_1(iot, ioh, com_lsr); 2060 if (ISSET(lsr, LSR_BI)) { 2061 int cn_trapped = 0; 2062 2063 cn_check_magic(sc->sc_tty->t_dev, 2064 CNC_BREAK, com_cnm_state); 2065 if (cn_trapped) 2066 continue; 2067 #if defined(KGDB) && !defined(DDB) 2068 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2069 kgdb_connect(1); 2070 continue; 2071 } 2072 #endif 2073 } 2074 2075 if (ISSET(lsr, LSR_RCV_MASK) && 2076 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2077 while (cc > 0) { 2078 int cn_trapped = 0; 2079 put[0] = bus_space_read_1(iot, ioh, com_data); 2080 put[1] = lsr; 2081 cn_check_magic(sc->sc_tty->t_dev, 2082 put[0], com_cnm_state); 2083 if (cn_trapped) { 2084 lsr = bus_space_read_1(iot, ioh, com_lsr); 2085 if (!ISSET(lsr, LSR_RCV_MASK)) 2086 break; 2087 2088 continue; 2089 } 2090 put += 2; 2091 if (put >= end) 2092 put = sc->sc_rbuf; 2093 cc--; 2094 2095 lsr = bus_space_read_1(iot, ioh, com_lsr); 2096 if (!ISSET(lsr, LSR_RCV_MASK)) 2097 break; 2098 } 2099 2100 /* 2101 * Current string of incoming characters ended because 2102 * no more data was available or we ran out of space. 2103 * Schedule a receive event if any data was received. 2104 * If we're out of space, turn off receive interrupts. 2105 */ 2106 sc->sc_rbput = put; 2107 sc->sc_rbavail = cc; 2108 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2109 sc->sc_rx_ready = 1; 2110 2111 /* 2112 * See if we are in danger of overflowing a buffer. If 2113 * so, use hardware flow control to ease the pressure. 2114 */ 2115 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2116 cc < sc->sc_r_hiwat) { 2117 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2118 com_hwiflow(sc); 2119 } 2120 2121 /* 2122 * If we're out of space, disable receive interrupts 2123 * until the queue has drained a bit. 2124 */ 2125 if (!cc) { 2126 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2127 CLR(sc->sc_ier, IER_ERXRDY); 2128 #ifdef COM_PXA2X0 2129 if (sc->sc_type == COM_TYPE_PXA2x0) 2130 CLR(sc->sc_ier, IER_ERXTOUT); 2131 #endif 2132 bus_space_write_1(iot, ioh, com_ier, 2133 sc->sc_ier); 2134 } 2135 } else { 2136 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2137 #ifdef COM_PXA2X0 2138 if (sc->sc_type == COM_TYPE_PXA2x0) 2139 bus_space_write_1(iot, ioh, com_ier, 2140 IER_EUART); 2141 else 2142 #endif 2143 bus_space_write_1(iot, ioh, com_ier, 0); 2144 delay(10); 2145 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2146 continue; 2147 } 2148 } 2149 2150 msr = bus_space_read_1(iot, ioh, com_msr); 2151 delta = msr ^ sc->sc_msr; 2152 sc->sc_msr = msr; 2153 /* 2154 * Pulse-per-second (PSS) signals on edge of DCD? 2155 * Process these even if line discipline is ignoring DCD. 2156 */ 2157 if (delta & sc->sc_ppsmask) { 2158 struct timeval tv; 2159 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2160 /* XXX nanotime() */ 2161 microtime(&tv); 2162 TIMEVAL_TO_TIMESPEC(&tv, 2163 &sc->ppsinfo.assert_timestamp); 2164 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2165 timespecadd(&sc->ppsinfo.assert_timestamp, 2166 &sc->ppsparam.assert_offset, 2167 &sc->ppsinfo.assert_timestamp); 2168 } 2169 2170 #ifdef PPS_SYNC 2171 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2172 hardpps(&tv, tv.tv_usec); 2173 #endif 2174 sc->ppsinfo.assert_sequence++; 2175 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2176 2177 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2178 /* XXX nanotime() */ 2179 microtime(&tv); 2180 TIMEVAL_TO_TIMESPEC(&tv, 2181 &sc->ppsinfo.clear_timestamp); 2182 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2183 timespecadd(&sc->ppsinfo.clear_timestamp, 2184 &sc->ppsparam.clear_offset, 2185 &sc->ppsinfo.clear_timestamp); 2186 } 2187 2188 #ifdef PPS_SYNC 2189 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2190 hardpps(&tv, tv.tv_usec); 2191 #endif 2192 sc->ppsinfo.clear_sequence++; 2193 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2194 } 2195 } 2196 2197 /* 2198 * Process normal status changes 2199 */ 2200 if (ISSET(delta, sc->sc_msr_mask)) { 2201 SET(sc->sc_msr_delta, delta); 2202 2203 /* 2204 * Stop output immediately if we lose the output 2205 * flow control signal or carrier detect. 2206 */ 2207 if (ISSET(~msr, sc->sc_msr_mask)) { 2208 sc->sc_tbc = 0; 2209 sc->sc_heldtbc = 0; 2210 #ifdef COM_DEBUG 2211 if (com_debug) 2212 comstatus(sc, "comintr "); 2213 #endif 2214 } 2215 2216 sc->sc_st_check = 1; 2217 } 2218 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2219 || ((iir & IIR_IMASK) == 0)); 2220 2221 /* 2222 * Done handling any receive interrupts. See if data can be 2223 * transmitted as well. Schedule tx done event if no data left 2224 * and tty was marked busy. 2225 */ 2226 if (ISSET(lsr, LSR_TXRDY)) { 2227 /* 2228 * If we've delayed a parameter change, do it now, and restart 2229 * output. 2230 */ 2231 if (sc->sc_heldchange) { 2232 com_loadchannelregs(sc); 2233 sc->sc_heldchange = 0; 2234 sc->sc_tbc = sc->sc_heldtbc; 2235 sc->sc_heldtbc = 0; 2236 } 2237 2238 /* Output the next chunk of the contiguous buffer, if any. */ 2239 if (sc->sc_tbc > 0) { 2240 u_int n; 2241 2242 n = sc->sc_tbc; 2243 if (n > sc->sc_fifolen) 2244 n = sc->sc_fifolen; 2245 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2246 sc->sc_tbc -= n; 2247 sc->sc_tba += n; 2248 } else { 2249 /* Disable transmit completion interrupts if necessary. */ 2250 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2251 CLR(sc->sc_ier, IER_ETXRDY); 2252 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2253 } 2254 if (sc->sc_tx_busy) { 2255 sc->sc_tx_busy = 0; 2256 sc->sc_tx_done = 1; 2257 } 2258 } 2259 } 2260 2261 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2262 goto again; 2263 2264 COM_UNLOCK(sc); 2265 2266 /* Wake up the poller. */ 2267 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2268 softintr_schedule(sc->sc_si); 2269 #else 2270 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2271 setsoftserial(); 2272 #else 2273 if (!com_softintr_scheduled) { 2274 com_softintr_scheduled = 1; 2275 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2276 } 2277 #endif 2278 #endif 2279 2280 #if NRND > 0 && defined(RND_COM) 2281 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2282 #endif 2283 2284 return (1); 2285 } 2286 2287 /* 2288 * The following functions are polled getc and putc routines, shared 2289 * by the console and kgdb glue. 2290 * 2291 * The read-ahead code is so that you can detect pending in-band 2292 * cn_magic in polled mode while doing output rather than having to 2293 * wait until the kernel decides it needs input. 2294 */ 2295 2296 #define MAX_READAHEAD 20 2297 static int com_readahead[MAX_READAHEAD]; 2298 static int com_readaheadcount = 0; 2299 2300 int 2301 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2302 { 2303 int s = splserial(); 2304 u_char stat, c; 2305 2306 /* got a character from reading things earlier */ 2307 if (com_readaheadcount > 0) { 2308 int i; 2309 2310 c = com_readahead[0]; 2311 for (i = 1; i < com_readaheadcount; i++) { 2312 com_readahead[i-1] = com_readahead[i]; 2313 } 2314 com_readaheadcount--; 2315 splx(s); 2316 return (c); 2317 } 2318 2319 /* block until a character becomes available */ 2320 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2321 ; 2322 2323 c = bus_space_read_1(iot, ioh, com_data); 2324 stat = bus_space_read_1(iot, ioh, com_iir); 2325 { 2326 int cn_trapped = 0; /* unused */ 2327 #ifdef DDB 2328 extern int db_active; 2329 if (!db_active) 2330 #endif 2331 cn_check_magic(dev, c, com_cnm_state); 2332 } 2333 splx(s); 2334 return (c); 2335 } 2336 2337 void 2338 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2339 { 2340 int s = splserial(); 2341 int cin, stat, timo; 2342 2343 if (com_readaheadcount < MAX_READAHEAD 2344 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2345 int cn_trapped = 0; 2346 cin = bus_space_read_1(iot, ioh, com_data); 2347 stat = bus_space_read_1(iot, ioh, com_iir); 2348 cn_check_magic(dev, cin, com_cnm_state); 2349 com_readahead[com_readaheadcount++] = cin; 2350 } 2351 2352 /* wait for any pending transmission to finish */ 2353 timo = 150000; 2354 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2355 continue; 2356 2357 bus_space_write_1(iot, ioh, com_data, c); 2358 COM_BARRIER(iot, ioh, BR | BW); 2359 2360 /* wait for this transmission to complete */ 2361 timo = 1500000; 2362 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2363 continue; 2364 2365 splx(s); 2366 } 2367 2368 /* 2369 * Initialize UART for use as console or KGDB line. 2370 */ 2371 int 2372 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2373 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2374 { 2375 bus_space_handle_t ioh; 2376 2377 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2378 return (ENOMEM); /* ??? */ 2379 2380 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2381 bus_space_write_1(iot, ioh, com_efr, 0); 2382 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2383 rate = comspeed(rate, frequency, type); 2384 bus_space_write_1(iot, ioh, com_dlbl, rate); 2385 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2386 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2387 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2388 bus_space_write_1(iot, ioh, com_fifo, 2389 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2390 bus_space_write_1(iot, ioh, com_ier, 0); 2391 2392 *iohp = ioh; 2393 return (0); 2394 } 2395 2396 /* 2397 * Following are all routines needed for COM to act as console 2398 */ 2399 struct consdev comcons = { 2400 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2401 NODEV, CN_NORMAL 2402 }; 2403 2404 2405 int 2406 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2407 int type, tcflag_t cflag) 2408 { 2409 int res; 2410 2411 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2412 if (res) 2413 return (res); 2414 2415 cn_tab = &comcons; 2416 cn_init_magic(&com_cnm_state); 2417 cn_set_magic("\047\001"); /* default magic is BREAK */ 2418 2419 comconstag = iot; 2420 comconsaddr = iobase; 2421 comconsrate = rate; 2422 comconscflag = cflag; 2423 2424 return (0); 2425 } 2426 2427 int 2428 comcngetc(dev_t dev) 2429 { 2430 2431 return (com_common_getc(dev, comconstag, comconsioh)); 2432 } 2433 2434 /* 2435 * Console kernel output character routine. 2436 */ 2437 void 2438 comcnputc(dev_t dev, int c) 2439 { 2440 2441 com_common_putc(dev, comconstag, comconsioh, c); 2442 } 2443 2444 void 2445 comcnpollc(dev_t dev, int on) 2446 { 2447 2448 } 2449 2450 #ifdef KGDB 2451 int 2452 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2453 int frequency, int type, tcflag_t cflag) 2454 { 2455 int res; 2456 2457 if (iot == comconstag && iobase == comconsaddr) { 2458 #if !defined(DDB) 2459 return (EBUSY); /* cannot share with console */ 2460 #else 2461 com_kgdb_ioh = comconsioh; 2462 #endif 2463 } else { 2464 2465 res = cominit(iot, iobase, rate, frequency, type, cflag, 2466 &com_kgdb_ioh); 2467 if (res) 2468 return (res); 2469 2470 /* 2471 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2472 * expects this to be initialized 2473 */ 2474 cn_init_magic(&com_cnm_state); 2475 cn_set_magic("\047\001"); 2476 } 2477 2478 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2479 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2480 2481 com_kgdb_iot = iot; 2482 com_kgdb_addr = iobase; 2483 2484 return (0); 2485 } 2486 2487 /* ARGSUSED */ 2488 int 2489 com_kgdb_getc(void *arg) 2490 { 2491 2492 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2493 } 2494 2495 /* ARGSUSED */ 2496 void 2497 com_kgdb_putc(void *arg, int c) 2498 { 2499 2500 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2501 } 2502 #endif /* KGDB */ 2503 2504 /* helper function to identify the com ports used by 2505 console or KGDB (and not yet autoconf attached) */ 2506 int 2507 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2508 { 2509 bus_space_handle_t help; 2510 2511 if (!comconsattached && 2512 iot == comconstag && iobase == comconsaddr) 2513 help = comconsioh; 2514 #ifdef KGDB 2515 else if (!com_kgdb_attached && 2516 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2517 help = com_kgdb_ioh; 2518 #endif 2519 else 2520 return (0); 2521 2522 if (ioh) 2523 *ioh = help; 2524 return (1); 2525 } 2526
Indexes created Wed Sep 24 22:09:59 GMT 2025