com.c revision 1.213
1 /* $NetBSD: com.c,v 1.213 2003/06/23 11:01:57 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.213 2003/06/23 11:01:57 martin Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 #include "opt_lockdebug.h" 86 #include "opt_multiprocessor.h" 87 88 #include "rnd.h" 89 #if NRND > 0 && defined(RND_COM) 90 #include <sys/rnd.h> 91 #endif 92 93 /* 94 * Override cnmagic(9) macro before including <sys/systm.h>. 95 * We need to know if cn_check_magic triggered debugger, so set a flag. 96 * Callers of cn_check_magic must declare int cn_trapped = 0; 97 * XXX: this is *ugly*! 98 */ 99 #define cn_trap() \ 100 do { \ 101 console_debugger(); \ 102 cn_trapped = 1; \ 103 } while (/* CONSTCOND */ 0) 104 105 #include <sys/param.h> 106 #include <sys/systm.h> 107 #include <sys/ioctl.h> 108 #include <sys/select.h> 109 #include <sys/tty.h> 110 #include <sys/proc.h> 111 #include <sys/user.h> 112 #include <sys/conf.h> 113 #include <sys/file.h> 114 #include <sys/uio.h> 115 #include <sys/kernel.h> 116 #include <sys/syslog.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 #include <sys/timepps.h> 120 #include <sys/vnode.h> 121 122 #include <machine/intr.h> 123 #include <machine/bus.h> 124 125 #include <dev/ic/comreg.h> 126 #include <dev/ic/comvar.h> 127 #include <dev/ic/ns16550reg.h> 128 #include <dev/ic/st16650reg.h> 129 #ifdef COM_HAYESP 130 #include <dev/ic/hayespreg.h> 131 #endif 132 #define com_lcr com_cfcr 133 #include <dev/cons.h> 134 135 #ifdef COM_HAYESP 136 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 137 #endif 138 139 static void com_enable_debugport(struct com_softc *); 140 141 void com_config(struct com_softc *); 142 void com_shutdown(struct com_softc *); 143 int comspeed(long, long, int); 144 static u_char cflag2lcr(tcflag_t); 145 int comparam(struct tty *, struct termios *); 146 void comstart(struct tty *); 147 int comhwiflow(struct tty *, int); 148 149 void com_loadchannelregs(struct com_softc *); 150 void com_hwiflow(struct com_softc *); 151 void com_break(struct com_softc *, int); 152 void com_modem(struct com_softc *, int); 153 void tiocm_to_com(struct com_softc *, u_long, int); 154 int com_to_tiocm(struct com_softc *); 155 void com_iflush(struct com_softc *); 156 157 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 158 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 159 160 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 161 bus_space_handle_t *); 162 163 int comcngetc(dev_t); 164 void comcnputc(dev_t, int); 165 void comcnpollc(dev_t, int); 166 167 #define integrate static inline 168 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 169 void comsoft(void *); 170 #else 171 #ifndef __NO_SOFT_SERIAL_INTERRUPT 172 void comsoft(void); 173 #else 174 void comsoft(void *); 175 struct callout comsoft_callout = CALLOUT_INITIALIZER; 176 #endif 177 #endif 178 integrate void com_rxsoft(struct com_softc *, struct tty *); 179 integrate void com_txsoft(struct com_softc *, struct tty *); 180 integrate void com_stsoft(struct com_softc *, struct tty *); 181 integrate void com_schedrx(struct com_softc *); 182 void comdiag(void *); 183 184 extern struct cfdriver com_cd; 185 186 dev_type_open(comopen); 187 dev_type_close(comclose); 188 dev_type_read(comread); 189 dev_type_write(comwrite); 190 dev_type_ioctl(comioctl); 191 dev_type_stop(comstop); 192 dev_type_tty(comtty); 193 dev_type_poll(compoll); 194 195 const struct cdevsw com_cdevsw = { 196 comopen, comclose, comread, comwrite, comioctl, 197 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 198 }; 199 200 /* 201 * Make this an option variable one can patch. 202 * But be warned: this must be a power of 2! 203 */ 204 u_int com_rbuf_size = COM_RING_SIZE; 205 206 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 207 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 208 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 209 210 static bus_addr_t comconsaddr; 211 static bus_space_tag_t comconstag; 212 static bus_space_handle_t comconsioh; 213 static int comconsattached; 214 static int comconsrate; 215 static tcflag_t comconscflag; 216 static struct cnm_state com_cnm_state; 217 218 static int ppscap = 219 PPS_TSFMT_TSPEC | 220 PPS_CAPTUREASSERT | 221 PPS_CAPTURECLEAR | 222 #ifdef PPS_SYNC 223 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 224 #endif /* PPS_SYNC */ 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 259 260 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 261 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 262 263 #else 264 265 #define COM_LOCK(sc) 266 #define COM_UNLOCK(sc) 267 268 #endif 269 270 /*ARGSUSED*/ 271 int 272 comspeed(long speed, long frequency, int type) 273 { 274 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 275 276 int x, err; 277 278 #if 0 279 if (speed == 0) 280 return (0); 281 #endif 282 if (speed <= 0) 283 return (-1); 284 x = divrnd(frequency / 16, speed); 285 if (x <= 0) 286 return (-1); 287 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 288 if (err < 0) 289 err = -err; 290 if (err > COM_TOLERANCE) 291 return (-1); 292 return (x); 293 294 #undef divrnd 295 } 296 297 #ifdef COM_DEBUG 298 int com_debug = 0; 299 300 void comstatus(struct com_softc *, char *); 301 void 302 comstatus(struct com_softc *sc, char *str) 303 { 304 struct tty *tp = sc->sc_tty; 305 306 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 309 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 310 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 311 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 312 sc->sc_tx_stopped ? "+" : "-"); 313 314 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 315 sc->sc_dev.dv_xname, str, 316 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 317 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 318 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 319 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 320 sc->sc_rx_flags); 321 } 322 #endif 323 324 int 325 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 326 { 327 328 /* force access to id reg */ 329 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 330 bus_space_write_1(iot, ioh, com_iir, 0); 331 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 332 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 333 return (0); 334 335 return (1); 336 } 337 338 #ifdef COM_HAYESP 339 int 340 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 341 { 342 char val, dips; 343 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 344 bus_space_tag_t iot = sc->sc_iot; 345 346 /* 347 * Hayes ESP cards have two iobases. One is for compatibility with 348 * 16550 serial chips, and at the same ISA PC base addresses. The 349 * other is for ESP-specific enhanced features, and lies at a 350 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 351 */ 352 353 /* Test for ESP signature */ 354 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 355 return (0); 356 357 /* 358 * ESP is present at ESP enhanced base address; unknown com port 359 */ 360 361 /* Get the dip-switch configurations */ 362 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 363 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 364 365 /* Determine which com port this ESP card services: bits 0,1 of */ 366 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 367 if (sc->sc_iobase != combaselist[dips & 0x03]) 368 return (0); 369 370 printf(": ESP"); 371 372 /* Check ESP Self Test bits. */ 373 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 374 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 376 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 377 if ((val & 0x70) < 0x20) { 378 printf("-old (%o)", val & 0x70); 379 /* we do not support the necessary features */ 380 return (0); 381 } 382 383 /* Check for ability to emulate 16550: bit 8 == 1 */ 384 if ((dips & 0x80) == 0) { 385 printf(" slave"); 386 /* XXX Does slave really mean no 16550 support?? */ 387 return (0); 388 } 389 390 /* 391 * If we made it this far, we are a full-featured ESP v2.0 (or 392 * better), at the correct com port address. 393 */ 394 395 sc->sc_type = COM_TYPE_HAYESP; 396 printf(", 1024 byte fifo\n"); 397 return (1); 398 } 399 #endif 400 401 static void 402 com_enable_debugport(struct com_softc *sc) 403 { 404 int s; 405 406 /* Turn on line break interrupt, set carrier. */ 407 s = splserial(); 408 COM_LOCK(sc); 409 sc->sc_ier = IER_ERXRDY; 410 #ifdef COM_PXA2X0 411 if (sc->sc_type == COM_TYPE_PXA2x0) 412 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 413 #endif 414 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 415 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 416 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 417 COM_UNLOCK(sc); 418 splx(s); 419 } 420 421 void 422 com_attach_subr(struct com_softc *sc) 423 { 424 bus_addr_t iobase = sc->sc_iobase; 425 bus_space_tag_t iot = sc->sc_iot; 426 bus_space_handle_t ioh = sc->sc_ioh; 427 struct tty *tp; 428 #ifdef COM16650 429 u_int8_t lcr; 430 #endif 431 #ifdef COM_HAYESP 432 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 433 int *hayespp; 434 #endif 435 const char *fifo_msg = NULL; 436 437 callout_init(&sc->sc_diag_callout); 438 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 439 simple_lock_init(&sc->sc_lock); 440 #endif 441 442 /* Disable interrupts before configuring the device. */ 443 #ifdef COM_PXA2X0 444 if (sc->sc_type == COM_TYPE_PXA2x0) 445 sc->sc_ier = IER_EUART; 446 else 447 #endif 448 sc->sc_ier = 0; 449 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 450 451 if (iot == comconstag && iobase == comconsaddr) { 452 comconsattached = 1; 453 454 /* Make sure the console is always "hardwired". */ 455 delay(1000); /* wait for output to finish */ 456 SET(sc->sc_hwflags, COM_HW_CONSOLE); 457 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 458 } 459 460 #ifdef COM_HAYESP 461 sc->sc_prescaler = 0; /* set prescaler to x1. */ 462 463 /* Look for a Hayes ESP board. */ 464 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 465 bus_space_handle_t hayespioh; 466 467 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 468 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 469 continue; 470 if (comprobeHAYESP(hayespioh, sc)) { 471 sc->sc_hayespioh = hayespioh; 472 sc->sc_fifolen = 1024; 473 474 break; 475 } 476 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 477 } 478 /* No ESP; look for other things. */ 479 if (sc->sc_type != COM_TYPE_HAYESP) { 480 #endif 481 sc->sc_fifolen = 1; 482 /* look for a NS 16550AF UART with FIFOs */ 483 bus_space_write_1(iot, ioh, com_fifo, 484 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 485 delay(100); 486 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 487 == IIR_FIFO_MASK) 488 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 489 == FIFO_TRIGGER_14) { 490 SET(sc->sc_hwflags, COM_HW_FIFO); 491 492 #ifdef COM16650 493 /* 494 * IIR changes into the EFR if LCR is set to LCR_EERS 495 * on 16650s. We also know IIR != 0 at this point. 496 * Write 0 into the EFR, and read it. If the result 497 * is 0, we have a 16650. 498 * 499 * Older 16650s were broken; the test to detect them 500 * is taken from the Linux driver. Apparently 501 * setting DLAB enable gives access to the EFR on 502 * these chips. 503 */ 504 lcr = bus_space_read_1(iot, ioh, com_lcr); 505 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 506 bus_space_write_1(iot, ioh, com_efr, 0); 507 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 508 bus_space_write_1(iot, ioh, com_lcr, 509 lcr | LCR_DLAB); 510 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 511 CLR(sc->sc_hwflags, COM_HW_FIFO); 512 sc->sc_fifolen = 0; 513 } else { 514 SET(sc->sc_hwflags, COM_HW_FLOW); 515 sc->sc_fifolen = 32; 516 } 517 } else 518 #endif 519 sc->sc_fifolen = 16; 520 521 #ifdef COM16650 522 bus_space_write_1(iot, ioh, com_lcr, lcr); 523 if (sc->sc_fifolen == 0) 524 fifo_msg = "st16650, broken fifo"; 525 else if (sc->sc_fifolen == 32) 526 fifo_msg = "st16650a, working fifo"; 527 else 528 #endif 529 fifo_msg = "ns16550a, working fifo"; 530 } else 531 fifo_msg = "ns16550, broken fifo"; 532 else 533 fifo_msg = "ns8250 or ns16450, no fifo"; 534 bus_space_write_1(iot, ioh, com_fifo, 0); 535 /* 536 * Some chips will clear down both Tx and Rx FIFOs when zero is 537 * written to com_fifo. If this chip is the console, writing zero 538 * results in some of the chip/FIFO description being lost, so delay 539 * printing it until now. 540 */ 541 delay(10); 542 aprint_normal(": %s\n", fifo_msg); 543 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 544 sc->sc_fifolen = 1; 545 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 546 } 547 #ifdef COM_HAYESP 548 } 549 #endif 550 551 tp = ttymalloc(); 552 tp->t_oproc = comstart; 553 tp->t_param = comparam; 554 tp->t_hwiflow = comhwiflow; 555 556 sc->sc_tty = tp; 557 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 558 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 559 sc->sc_rbavail = com_rbuf_size; 560 if (sc->sc_rbuf == NULL) { 561 aprint_error("%s: unable to allocate ring buffer\n", 562 sc->sc_dev.dv_xname); 563 return; 564 } 565 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 566 567 tty_attach(tp); 568 569 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 570 SET(sc->sc_mcr, MCR_IENABLE); 571 572 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 573 int maj; 574 575 /* locate the major number */ 576 maj = cdevsw_lookup_major(&com_cdevsw); 577 578 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 579 580 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 581 } 582 583 #ifdef KGDB 584 /* 585 * Allow kgdb to "take over" this port. If this is 586 * not the console and is the kgdb device, it has 587 * exclusive use. If it's the console _and_ the 588 * kgdb device, it doesn't. 589 */ 590 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 591 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 592 com_kgdb_attached = 1; 593 594 SET(sc->sc_hwflags, COM_HW_KGDB); 595 } 596 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 597 } 598 #endif 599 600 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 601 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 602 #endif 603 604 #if NRND > 0 && defined(RND_COM) 605 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 606 RND_TYPE_TTY, 0); 607 #endif 608 609 /* if there are no enable/disable functions, assume the device 610 is always enabled */ 611 if (!sc->enable) 612 sc->enabled = 1; 613 614 com_config(sc); 615 616 SET(sc->sc_hwflags, COM_HW_DEV_OK); 617 } 618 619 void 620 com_config(struct com_softc *sc) 621 { 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 625 /* Disable interrupts before configuring the device. */ 626 #ifdef COM_PXA2X0 627 if (sc->sc_type == COM_TYPE_PXA2x0) 628 sc->sc_ier = IER_EUART; 629 else 630 #endif 631 sc->sc_ier = 0; 632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 633 634 #ifdef COM_HAYESP 635 /* Look for a Hayes ESP board. */ 636 if (sc->sc_type == COM_TYPE_HAYESP) { 637 sc->sc_fifolen = 1024; 638 639 /* Set 16550 compatibility mode */ 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 641 HAYESP_SETMODE); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 644 HAYESP_MODE_SCALE); 645 646 /* Set RTS/CTS flow control */ 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 648 HAYESP_SETFLOWTYPE); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_FLOW_RTS); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_FLOW_CTS); 653 654 /* Set flow control levels */ 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 656 HAYESP_SETRXFLOW); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 661 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 662 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 663 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 664 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 665 } 666 #endif 667 668 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 669 com_enable_debugport(sc); 670 } 671 672 int 673 com_detach(struct device *self, int flags) 674 { 675 struct com_softc *sc = (struct com_softc *)self; 676 int maj, mn; 677 678 /* locate the major number */ 679 maj = cdevsw_lookup_major(&com_cdevsw); 680 681 /* Nuke the vnodes for any open instances. */ 682 mn = self->dv_unit; 683 vdevgone(maj, mn, mn, VCHR); 684 685 mn |= COMDIALOUT_MASK; 686 vdevgone(maj, mn, mn, VCHR); 687 688 if (sc->sc_rbuf == NULL) { 689 /* 690 * Ring buffer allocation failed in the com_attach_subr, 691 * only the tty is allocated, and nothing else. 692 */ 693 ttyfree(sc->sc_tty); 694 return 0; 695 } 696 697 /* Free the receive buffer. */ 698 free(sc->sc_rbuf, M_DEVBUF); 699 700 /* Detach and free the tty. */ 701 tty_detach(sc->sc_tty); 702 ttyfree(sc->sc_tty); 703 704 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 705 /* Unhook the soft interrupt handler. */ 706 softintr_disestablish(sc->sc_si); 707 #endif 708 709 #if NRND > 0 && defined(RND_COM) 710 /* Unhook the entropy source. */ 711 rnd_detach_source(&sc->rnd_source); 712 #endif 713 714 return (0); 715 } 716 717 int 718 com_activate(struct device *self, enum devact act) 719 { 720 struct com_softc *sc = (struct com_softc *)self; 721 int s, rv = 0; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 switch (act) { 726 case DVACT_ACTIVATE: 727 rv = EOPNOTSUPP; 728 break; 729 730 case DVACT_DEACTIVATE: 731 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 732 rv = EBUSY; 733 break; 734 } 735 736 if (sc->disable != NULL && sc->enabled != 0) { 737 (*sc->disable)(sc); 738 sc->enabled = 0; 739 } 740 break; 741 } 742 743 COM_UNLOCK(sc); 744 splx(s); 745 return (rv); 746 } 747 748 void 749 com_shutdown(struct com_softc *sc) 750 { 751 struct tty *tp = sc->sc_tty; 752 int s; 753 754 s = splserial(); 755 COM_LOCK(sc); 756 757 /* If we were asserting flow control, then deassert it. */ 758 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 759 com_hwiflow(sc); 760 761 /* Clear any break condition set with TIOCSBRK. */ 762 com_break(sc, 0); 763 764 /* Turn off PPS capture on last close. */ 765 sc->sc_ppsmask = 0; 766 sc->ppsparam.mode = 0; 767 768 /* 769 * Hang up if necessary. Wait a bit, so the other side has time to 770 * notice even if we immediately open the port again. 771 * Avoid tsleeping above splhigh(). 772 */ 773 if (ISSET(tp->t_cflag, HUPCL)) { 774 com_modem(sc, 0); 775 COM_UNLOCK(sc); 776 splx(s); 777 /* XXX tsleep will only timeout */ 778 (void) tsleep(sc, TTIPRI, ttclos, hz); 779 s = splserial(); 780 COM_LOCK(sc); 781 } 782 783 /* Turn off interrupts. */ 784 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 785 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 786 #ifdef COM_PXA2X0 787 if (sc->sc_type == COM_TYPE_PXA2x0) 788 sc->sc_ier |= IER_ERXTOUT; 789 #endif 790 } else 791 sc->sc_ier = 0; 792 793 #ifdef COM_PXA2X0 794 if (sc->sc_type == COM_TYPE_PXA2x0) 795 sc->sc_ier |= IER_EUART; 796 #endif 797 798 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 799 800 if (sc->disable) { 801 #ifdef DIAGNOSTIC 802 if (!sc->enabled) 803 panic("com_shutdown: not enabled?"); 804 #endif 805 (*sc->disable)(sc); 806 sc->enabled = 0; 807 } 808 COM_UNLOCK(sc); 809 splx(s); 810 } 811 812 int 813 comopen(dev_t dev, int flag, int mode, struct proc *p) 814 { 815 struct com_softc *sc; 816 struct tty *tp; 817 int s, s2; 818 int error; 819 820 sc = device_lookup(&com_cd, COMUNIT(dev)); 821 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 822 sc->sc_rbuf == NULL) 823 return (ENXIO); 824 825 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 826 return (ENXIO); 827 828 #ifdef KGDB 829 /* 830 * If this is the kgdb port, no other use is permitted. 831 */ 832 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 833 return (EBUSY); 834 #endif 835 836 tp = sc->sc_tty; 837 838 if (ISSET(tp->t_state, TS_ISOPEN) && 839 ISSET(tp->t_state, TS_XCLUDE) && 840 p->p_ucred->cr_uid != 0) 841 return (EBUSY); 842 843 s = spltty(); 844 845 /* 846 * Do the following iff this is a first open. 847 */ 848 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 849 struct termios t; 850 851 tp->t_dev = dev; 852 853 s2 = splserial(); 854 COM_LOCK(sc); 855 856 if (sc->enable) { 857 if ((*sc->enable)(sc)) { 858 COM_UNLOCK(sc); 859 splx(s2); 860 splx(s); 861 printf("%s: device enable failed\n", 862 sc->sc_dev.dv_xname); 863 return (EIO); 864 } 865 sc->enabled = 1; 866 com_config(sc); 867 } 868 869 /* Turn on interrupts. */ 870 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 871 #ifdef COM_PXA2X0 872 if (sc->sc_type == COM_TYPE_PXA2x0) 873 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 874 #endif 875 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 876 877 /* Fetch the current modem control status, needed later. */ 878 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 879 880 /* Clear PPS capture state on first open. */ 881 sc->sc_ppsmask = 0; 882 sc->ppsparam.mode = 0; 883 884 COM_UNLOCK(sc); 885 splx(s2); 886 887 /* 888 * Initialize the termios status to the defaults. Add in the 889 * sticky bits from TIOCSFLAGS. 890 */ 891 t.c_ispeed = 0; 892 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 893 t.c_ospeed = comconsrate; 894 t.c_cflag = comconscflag; 895 } else { 896 t.c_ospeed = TTYDEF_SPEED; 897 t.c_cflag = TTYDEF_CFLAG; 898 } 899 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 900 SET(t.c_cflag, CLOCAL); 901 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 902 SET(t.c_cflag, CRTSCTS); 903 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 904 SET(t.c_cflag, MDMBUF); 905 /* Make sure comparam() will do something. */ 906 tp->t_ospeed = 0; 907 (void) comparam(tp, &t); 908 tp->t_iflag = TTYDEF_IFLAG; 909 tp->t_oflag = TTYDEF_OFLAG; 910 tp->t_lflag = TTYDEF_LFLAG; 911 ttychars(tp); 912 ttsetwater(tp); 913 914 s2 = splserial(); 915 COM_LOCK(sc); 916 917 /* 918 * Turn on DTR. We must always do this, even if carrier is not 919 * present, because otherwise we'd have to use TIOCSDTR 920 * immediately after setting CLOCAL, which applications do not 921 * expect. We always assert DTR while the device is open 922 * unless explicitly requested to deassert it. 923 */ 924 com_modem(sc, 1); 925 926 /* Clear the input ring, and unblock. */ 927 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 928 sc->sc_rbavail = com_rbuf_size; 929 com_iflush(sc); 930 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 931 com_hwiflow(sc); 932 933 #ifdef COM_DEBUG 934 if (com_debug) 935 comstatus(sc, "comopen "); 936 #endif 937 938 COM_UNLOCK(sc); 939 splx(s2); 940 } 941 942 splx(s); 943 944 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 945 if (error) 946 goto bad; 947 948 error = (*tp->t_linesw->l_open)(dev, tp); 949 if (error) 950 goto bad; 951 952 return (0); 953 954 bad: 955 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 956 /* 957 * We failed to open the device, and nobody else had it opened. 958 * Clean up the state as appropriate. 959 */ 960 com_shutdown(sc); 961 } 962 963 return (error); 964 } 965 966 int 967 comclose(dev_t dev, int flag, int mode, struct proc *p) 968 { 969 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 970 struct tty *tp = sc->sc_tty; 971 972 /* XXX This is for cons.c. */ 973 if (!ISSET(tp->t_state, TS_ISOPEN)) 974 return (0); 975 976 (*tp->t_linesw->l_close)(tp, flag); 977 ttyclose(tp); 978 979 if (COM_ISALIVE(sc) == 0) 980 return (0); 981 982 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 983 /* 984 * Although we got a last close, the device may still be in 985 * use; e.g. if this was the dialout node, and there are still 986 * processes waiting for carrier on the non-dialout node. 987 */ 988 com_shutdown(sc); 989 } 990 991 return (0); 992 } 993 994 int 995 comread(dev_t dev, struct uio *uio, int flag) 996 { 997 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 998 struct tty *tp = sc->sc_tty; 999 1000 if (COM_ISALIVE(sc) == 0) 1001 return (EIO); 1002 1003 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1004 } 1005 1006 int 1007 comwrite(dev_t dev, struct uio *uio, int flag) 1008 { 1009 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1010 struct tty *tp = sc->sc_tty; 1011 1012 if (COM_ISALIVE(sc) == 0) 1013 return (EIO); 1014 1015 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1016 } 1017 1018 int 1019 compoll(dev_t dev, int events, struct proc *p) 1020 { 1021 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1022 struct tty *tp = sc->sc_tty; 1023 1024 if (COM_ISALIVE(sc) == 0) 1025 return (EIO); 1026 1027 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1028 } 1029 1030 struct tty * 1031 comtty(dev_t dev) 1032 { 1033 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1034 struct tty *tp = sc->sc_tty; 1035 1036 return (tp); 1037 } 1038 1039 int 1040 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1041 { 1042 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1043 struct tty *tp = sc->sc_tty; 1044 int error; 1045 int s; 1046 1047 if (COM_ISALIVE(sc) == 0) 1048 return (EIO); 1049 1050 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1051 if (error != EPASSTHROUGH) 1052 return (error); 1053 1054 error = ttioctl(tp, cmd, data, flag, p); 1055 if (error != EPASSTHROUGH) 1056 return (error); 1057 1058 error = 0; 1059 1060 s = splserial(); 1061 COM_LOCK(sc); 1062 1063 switch (cmd) { 1064 case TIOCSBRK: 1065 com_break(sc, 1); 1066 break; 1067 1068 case TIOCCBRK: 1069 com_break(sc, 0); 1070 break; 1071 1072 case TIOCSDTR: 1073 com_modem(sc, 1); 1074 break; 1075 1076 case TIOCCDTR: 1077 com_modem(sc, 0); 1078 break; 1079 1080 case TIOCGFLAGS: 1081 *(int *)data = sc->sc_swflags; 1082 break; 1083 1084 case TIOCSFLAGS: 1085 error = suser(p->p_ucred, &p->p_acflag); 1086 if (error) 1087 break; 1088 sc->sc_swflags = *(int *)data; 1089 break; 1090 1091 case TIOCMSET: 1092 case TIOCMBIS: 1093 case TIOCMBIC: 1094 tiocm_to_com(sc, cmd, *(int *)data); 1095 break; 1096 1097 case TIOCMGET: 1098 *(int *)data = com_to_tiocm(sc); 1099 break; 1100 1101 case PPS_IOC_CREATE: 1102 break; 1103 1104 case PPS_IOC_DESTROY: 1105 break; 1106 1107 case PPS_IOC_GETPARAMS: { 1108 pps_params_t *pp; 1109 pp = (pps_params_t *)data; 1110 *pp = sc->ppsparam; 1111 break; 1112 } 1113 1114 case PPS_IOC_SETPARAMS: { 1115 pps_params_t *pp; 1116 int mode; 1117 pp = (pps_params_t *)data; 1118 if (pp->mode & ~ppscap) { 1119 error = EINVAL; 1120 break; 1121 } 1122 sc->ppsparam = *pp; 1123 /* 1124 * Compute msr masks from user-specified timestamp state. 1125 */ 1126 mode = sc->ppsparam.mode; 1127 #ifdef PPS_SYNC 1128 if (mode & PPS_HARDPPSONASSERT) { 1129 mode |= PPS_CAPTUREASSERT; 1130 /* XXX revoke any previous HARDPPS source */ 1131 } 1132 if (mode & PPS_HARDPPSONCLEAR) { 1133 mode |= PPS_CAPTURECLEAR; 1134 /* XXX revoke any previous HARDPPS source */ 1135 } 1136 #endif /* PPS_SYNC */ 1137 switch (mode & PPS_CAPTUREBOTH) { 1138 case 0: 1139 sc->sc_ppsmask = 0; 1140 break; 1141 1142 case PPS_CAPTUREASSERT: 1143 sc->sc_ppsmask = MSR_DCD; 1144 sc->sc_ppsassert = MSR_DCD; 1145 sc->sc_ppsclear = -1; 1146 break; 1147 1148 case PPS_CAPTURECLEAR: 1149 sc->sc_ppsmask = MSR_DCD; 1150 sc->sc_ppsassert = -1; 1151 sc->sc_ppsclear = 0; 1152 break; 1153 1154 case PPS_CAPTUREBOTH: 1155 sc->sc_ppsmask = MSR_DCD; 1156 sc->sc_ppsassert = MSR_DCD; 1157 sc->sc_ppsclear = 0; 1158 break; 1159 1160 default: 1161 error = EINVAL; 1162 break; 1163 } 1164 break; 1165 } 1166 1167 case PPS_IOC_GETCAP: 1168 *(int*)data = ppscap; 1169 break; 1170 1171 case PPS_IOC_FETCH: { 1172 pps_info_t *pi; 1173 pi = (pps_info_t *)data; 1174 *pi = sc->ppsinfo; 1175 break; 1176 } 1177 1178 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1179 /* 1180 * Some GPS clocks models use the falling rather than 1181 * rising edge as the on-the-second signal. 1182 * The old API has no way to specify PPS polarity. 1183 */ 1184 sc->sc_ppsmask = MSR_DCD; 1185 #ifndef PPS_TRAILING_EDGE 1186 sc->sc_ppsassert = MSR_DCD; 1187 sc->sc_ppsclear = -1; 1188 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1189 &sc->ppsinfo.assert_timestamp); 1190 #else 1191 sc->sc_ppsassert = -1 1192 sc->sc_ppsclear = 0; 1193 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1194 &sc->ppsinfo.clear_timestamp); 1195 #endif 1196 break; 1197 1198 default: 1199 error = EPASSTHROUGH; 1200 break; 1201 } 1202 1203 COM_UNLOCK(sc); 1204 splx(s); 1205 1206 #ifdef COM_DEBUG 1207 if (com_debug) 1208 comstatus(sc, "comioctl "); 1209 #endif 1210 1211 return (error); 1212 } 1213 1214 integrate void 1215 com_schedrx(struct com_softc *sc) 1216 { 1217 1218 sc->sc_rx_ready = 1; 1219 1220 /* Wake up the poller. */ 1221 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1222 softintr_schedule(sc->sc_si); 1223 #else 1224 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1225 setsoftserial(); 1226 #else 1227 if (!com_softintr_scheduled) { 1228 com_softintr_scheduled = 1; 1229 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1230 } 1231 #endif 1232 #endif 1233 } 1234 1235 void 1236 com_break(struct com_softc *sc, int onoff) 1237 { 1238 1239 if (onoff) 1240 SET(sc->sc_lcr, LCR_SBREAK); 1241 else 1242 CLR(sc->sc_lcr, LCR_SBREAK); 1243 1244 if (!sc->sc_heldchange) { 1245 if (sc->sc_tx_busy) { 1246 sc->sc_heldtbc = sc->sc_tbc; 1247 sc->sc_tbc = 0; 1248 sc->sc_heldchange = 1; 1249 } else 1250 com_loadchannelregs(sc); 1251 } 1252 } 1253 1254 void 1255 com_modem(struct com_softc *sc, int onoff) 1256 { 1257 1258 if (sc->sc_mcr_dtr == 0) 1259 return; 1260 1261 if (onoff) 1262 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1263 else 1264 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1265 1266 if (!sc->sc_heldchange) { 1267 if (sc->sc_tx_busy) { 1268 sc->sc_heldtbc = sc->sc_tbc; 1269 sc->sc_tbc = 0; 1270 sc->sc_heldchange = 1; 1271 } else 1272 com_loadchannelregs(sc); 1273 } 1274 } 1275 1276 void 1277 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1278 { 1279 u_char combits; 1280 1281 combits = 0; 1282 if (ISSET(ttybits, TIOCM_DTR)) 1283 SET(combits, MCR_DTR); 1284 if (ISSET(ttybits, TIOCM_RTS)) 1285 SET(combits, MCR_RTS); 1286 1287 switch (how) { 1288 case TIOCMBIC: 1289 CLR(sc->sc_mcr, combits); 1290 break; 1291 1292 case TIOCMBIS: 1293 SET(sc->sc_mcr, combits); 1294 break; 1295 1296 case TIOCMSET: 1297 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1298 SET(sc->sc_mcr, combits); 1299 break; 1300 } 1301 1302 if (!sc->sc_heldchange) { 1303 if (sc->sc_tx_busy) { 1304 sc->sc_heldtbc = sc->sc_tbc; 1305 sc->sc_tbc = 0; 1306 sc->sc_heldchange = 1; 1307 } else 1308 com_loadchannelregs(sc); 1309 } 1310 } 1311 1312 int 1313 com_to_tiocm(struct com_softc *sc) 1314 { 1315 u_char combits; 1316 int ttybits = 0; 1317 1318 combits = sc->sc_mcr; 1319 if (ISSET(combits, MCR_DTR)) 1320 SET(ttybits, TIOCM_DTR); 1321 if (ISSET(combits, MCR_RTS)) 1322 SET(ttybits, TIOCM_RTS); 1323 1324 combits = sc->sc_msr; 1325 if (ISSET(combits, MSR_DCD)) 1326 SET(ttybits, TIOCM_CD); 1327 if (ISSET(combits, MSR_CTS)) 1328 SET(ttybits, TIOCM_CTS); 1329 if (ISSET(combits, MSR_DSR)) 1330 SET(ttybits, TIOCM_DSR); 1331 if (ISSET(combits, MSR_RI | MSR_TERI)) 1332 SET(ttybits, TIOCM_RI); 1333 1334 #ifdef COM_PXA2X0 1335 if (sc->sc_type == COM_TYPE_PXA2x0) { 1336 if ((sc->sc_ier & 0x0f) != 0) 1337 SET(ttybits, TIOCM_LE); 1338 } else 1339 #endif 1340 if ((sc->sc_ier & 0xbf) != 0) 1341 SET(ttybits, TIOCM_LE); 1342 1343 return (ttybits); 1344 } 1345 1346 static u_char 1347 cflag2lcr(tcflag_t cflag) 1348 { 1349 u_char lcr = 0; 1350 1351 switch (ISSET(cflag, CSIZE)) { 1352 case CS5: 1353 SET(lcr, LCR_5BITS); 1354 break; 1355 case CS6: 1356 SET(lcr, LCR_6BITS); 1357 break; 1358 case CS7: 1359 SET(lcr, LCR_7BITS); 1360 break; 1361 case CS8: 1362 SET(lcr, LCR_8BITS); 1363 break; 1364 } 1365 if (ISSET(cflag, PARENB)) { 1366 SET(lcr, LCR_PENAB); 1367 if (!ISSET(cflag, PARODD)) 1368 SET(lcr, LCR_PEVEN); 1369 } 1370 if (ISSET(cflag, CSTOPB)) 1371 SET(lcr, LCR_STOPB); 1372 1373 return (lcr); 1374 } 1375 1376 int 1377 comparam(struct tty *tp, struct termios *t) 1378 { 1379 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1380 int ospeed; 1381 u_char lcr; 1382 int s; 1383 1384 if (COM_ISALIVE(sc) == 0) 1385 return (EIO); 1386 1387 #ifdef COM_HAYESP 1388 if (sc->sc_type == COM_TYPE_HAYESP) { 1389 int prescaler, speed; 1390 1391 /* 1392 * Calculate UART clock prescaler. It should be in 1393 * range of 0 .. 3. 1394 */ 1395 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1396 prescaler++, speed /= 2) 1397 if ((ospeed = comspeed(speed, sc->sc_frequency, 1398 sc->sc_type)) > 0) 1399 break; 1400 1401 if (prescaler == 4) 1402 return (EINVAL); 1403 sc->sc_prescaler = prescaler; 1404 } else 1405 #endif 1406 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1407 1408 /* Check requested parameters. */ 1409 if (ospeed < 0) 1410 return (EINVAL); 1411 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1412 return (EINVAL); 1413 1414 /* 1415 * For the console, always force CLOCAL and !HUPCL, so that the port 1416 * is always active. 1417 */ 1418 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1419 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1420 SET(t->c_cflag, CLOCAL); 1421 CLR(t->c_cflag, HUPCL); 1422 } 1423 1424 /* 1425 * If there were no changes, don't do anything. This avoids dropping 1426 * input and improves performance when all we did was frob things like 1427 * VMIN and VTIME. 1428 */ 1429 if (tp->t_ospeed == t->c_ospeed && 1430 tp->t_cflag == t->c_cflag) 1431 return (0); 1432 1433 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1434 1435 s = splserial(); 1436 COM_LOCK(sc); 1437 1438 sc->sc_lcr = lcr; 1439 1440 /* 1441 * If we're not in a mode that assumes a connection is present, then 1442 * ignore carrier changes. 1443 */ 1444 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1445 sc->sc_msr_dcd = 0; 1446 else 1447 sc->sc_msr_dcd = MSR_DCD; 1448 /* 1449 * Set the flow control pins depending on the current flow control 1450 * mode. 1451 */ 1452 if (ISSET(t->c_cflag, CRTSCTS)) { 1453 sc->sc_mcr_dtr = MCR_DTR; 1454 sc->sc_mcr_rts = MCR_RTS; 1455 sc->sc_msr_cts = MSR_CTS; 1456 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1457 } else if (ISSET(t->c_cflag, MDMBUF)) { 1458 /* 1459 * For DTR/DCD flow control, make sure we don't toggle DTR for 1460 * carrier detection. 1461 */ 1462 sc->sc_mcr_dtr = 0; 1463 sc->sc_mcr_rts = MCR_DTR; 1464 sc->sc_msr_cts = MSR_DCD; 1465 sc->sc_efr = 0; 1466 } else { 1467 /* 1468 * If no flow control, then always set RTS. This will make 1469 * the other side happy if it mistakenly thinks we're doing 1470 * RTS/CTS flow control. 1471 */ 1472 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1473 sc->sc_mcr_rts = 0; 1474 sc->sc_msr_cts = 0; 1475 sc->sc_efr = 0; 1476 if (ISSET(sc->sc_mcr, MCR_DTR)) 1477 SET(sc->sc_mcr, MCR_RTS); 1478 else 1479 CLR(sc->sc_mcr, MCR_RTS); 1480 } 1481 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1482 1483 #if 0 1484 if (ospeed == 0) 1485 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1486 else 1487 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1488 #endif 1489 1490 sc->sc_dlbl = ospeed; 1491 sc->sc_dlbh = ospeed >> 8; 1492 1493 /* 1494 * Set the FIFO threshold based on the receive speed. 1495 * 1496 * * If it's a low speed, it's probably a mouse or some other 1497 * interactive device, so set the threshold low. 1498 * * If it's a high speed, trim the trigger level down to prevent 1499 * overflows. 1500 * * Otherwise set it a bit higher. 1501 */ 1502 if (sc->sc_type == COM_TYPE_HAYESP) 1503 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1504 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1505 sc->sc_fifo = FIFO_ENABLE | 1506 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1507 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1508 else 1509 sc->sc_fifo = 0; 1510 1511 /* And copy to tty. */ 1512 tp->t_ispeed = 0; 1513 tp->t_ospeed = t->c_ospeed; 1514 tp->t_cflag = t->c_cflag; 1515 1516 if (!sc->sc_heldchange) { 1517 if (sc->sc_tx_busy) { 1518 sc->sc_heldtbc = sc->sc_tbc; 1519 sc->sc_tbc = 0; 1520 sc->sc_heldchange = 1; 1521 } else 1522 com_loadchannelregs(sc); 1523 } 1524 1525 if (!ISSET(t->c_cflag, CHWFLOW)) { 1526 /* Disable the high water mark. */ 1527 sc->sc_r_hiwat = 0; 1528 sc->sc_r_lowat = 0; 1529 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1530 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1531 com_schedrx(sc); 1532 } 1533 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1534 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1535 com_hwiflow(sc); 1536 } 1537 } else { 1538 sc->sc_r_hiwat = com_rbuf_hiwat; 1539 sc->sc_r_lowat = com_rbuf_lowat; 1540 } 1541 1542 COM_UNLOCK(sc); 1543 splx(s); 1544 1545 /* 1546 * Update the tty layer's idea of the carrier bit, in case we changed 1547 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1548 * explicit request. 1549 */ 1550 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1551 1552 #ifdef COM_DEBUG 1553 if (com_debug) 1554 comstatus(sc, "comparam "); 1555 #endif 1556 1557 if (!ISSET(t->c_cflag, CHWFLOW)) { 1558 if (sc->sc_tx_stopped) { 1559 sc->sc_tx_stopped = 0; 1560 comstart(tp); 1561 } 1562 } 1563 1564 return (0); 1565 } 1566 1567 void 1568 com_iflush(struct com_softc *sc) 1569 { 1570 bus_space_tag_t iot = sc->sc_iot; 1571 bus_space_handle_t ioh = sc->sc_ioh; 1572 #ifdef DIAGNOSTIC 1573 int reg; 1574 #endif 1575 int timo; 1576 1577 #ifdef DIAGNOSTIC 1578 reg = 0xffff; 1579 #endif 1580 timo = 50000; 1581 /* flush any pending I/O */ 1582 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1583 && --timo) 1584 #ifdef DIAGNOSTIC 1585 reg = 1586 #else 1587 (void) 1588 #endif 1589 bus_space_read_1(iot, ioh, com_data); 1590 #ifdef DIAGNOSTIC 1591 if (!timo) 1592 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1593 reg); 1594 #endif 1595 } 1596 1597 void 1598 com_loadchannelregs(struct com_softc *sc) 1599 { 1600 bus_space_tag_t iot = sc->sc_iot; 1601 bus_space_handle_t ioh = sc->sc_ioh; 1602 1603 /* XXXXX necessary? */ 1604 com_iflush(sc); 1605 1606 #ifdef COM_PXA2X0 1607 if (sc->sc_type == COM_TYPE_PXA2x0) 1608 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1609 else 1610 #endif 1611 bus_space_write_1(iot, ioh, com_ier, 0); 1612 1613 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1614 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1615 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1616 } 1617 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1618 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1619 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1620 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1621 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1622 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1623 #ifdef COM_HAYESP 1624 if (sc->sc_type == COM_TYPE_HAYESP) { 1625 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1626 HAYESP_SETPRESCALER); 1627 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1628 sc->sc_prescaler); 1629 } 1630 #endif 1631 1632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1633 } 1634 1635 int 1636 comhwiflow(struct tty *tp, int block) 1637 { 1638 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1639 int s; 1640 1641 if (COM_ISALIVE(sc) == 0) 1642 return (0); 1643 1644 if (sc->sc_mcr_rts == 0) 1645 return (0); 1646 1647 s = splserial(); 1648 COM_LOCK(sc); 1649 1650 if (block) { 1651 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1652 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1653 com_hwiflow(sc); 1654 } 1655 } else { 1656 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1657 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1658 com_schedrx(sc); 1659 } 1660 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1661 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1662 com_hwiflow(sc); 1663 } 1664 } 1665 1666 COM_UNLOCK(sc); 1667 splx(s); 1668 return (1); 1669 } 1670 1671 /* 1672 * (un)block input via hw flowcontrol 1673 */ 1674 void 1675 com_hwiflow(struct com_softc *sc) 1676 { 1677 bus_space_tag_t iot = sc->sc_iot; 1678 bus_space_handle_t ioh = sc->sc_ioh; 1679 1680 if (sc->sc_mcr_rts == 0) 1681 return; 1682 1683 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1684 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1685 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1686 } else { 1687 SET(sc->sc_mcr, sc->sc_mcr_rts); 1688 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1689 } 1690 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1691 } 1692 1693 1694 void 1695 comstart(struct tty *tp) 1696 { 1697 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1698 bus_space_tag_t iot = sc->sc_iot; 1699 bus_space_handle_t ioh = sc->sc_ioh; 1700 int s; 1701 1702 if (COM_ISALIVE(sc) == 0) 1703 return; 1704 1705 s = spltty(); 1706 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1707 goto out; 1708 if (sc->sc_tx_stopped) 1709 goto out; 1710 1711 if (tp->t_outq.c_cc <= tp->t_lowat) { 1712 if (ISSET(tp->t_state, TS_ASLEEP)) { 1713 CLR(tp->t_state, TS_ASLEEP); 1714 wakeup(&tp->t_outq); 1715 } 1716 selwakeup(&tp->t_wsel); 1717 if (tp->t_outq.c_cc == 0) 1718 goto out; 1719 } 1720 1721 /* Grab the first contiguous region of buffer space. */ 1722 { 1723 u_char *tba; 1724 int tbc; 1725 1726 tba = tp->t_outq.c_cf; 1727 tbc = ndqb(&tp->t_outq, 0); 1728 1729 (void)splserial(); 1730 COM_LOCK(sc); 1731 1732 sc->sc_tba = tba; 1733 sc->sc_tbc = tbc; 1734 } 1735 1736 SET(tp->t_state, TS_BUSY); 1737 sc->sc_tx_busy = 1; 1738 1739 /* Enable transmit completion interrupts if necessary. */ 1740 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1741 SET(sc->sc_ier, IER_ETXRDY); 1742 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1743 } 1744 1745 /* Output the first chunk of the contiguous buffer. */ 1746 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1747 u_int n; 1748 1749 n = sc->sc_tbc; 1750 if (n > sc->sc_fifolen) 1751 n = sc->sc_fifolen; 1752 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1753 sc->sc_tbc -= n; 1754 sc->sc_tba += n; 1755 } 1756 COM_UNLOCK(sc); 1757 out: 1758 splx(s); 1759 return; 1760 } 1761 1762 /* 1763 * Stop output on a line. 1764 */ 1765 void 1766 comstop(struct tty *tp, int flag) 1767 { 1768 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1769 int s; 1770 1771 s = splserial(); 1772 COM_LOCK(sc); 1773 if (ISSET(tp->t_state, TS_BUSY)) { 1774 /* Stop transmitting at the next chunk. */ 1775 sc->sc_tbc = 0; 1776 sc->sc_heldtbc = 0; 1777 if (!ISSET(tp->t_state, TS_TTSTOP)) 1778 SET(tp->t_state, TS_FLUSH); 1779 } 1780 COM_UNLOCK(sc); 1781 splx(s); 1782 } 1783 1784 void 1785 comdiag(void *arg) 1786 { 1787 struct com_softc *sc = arg; 1788 int overflows, floods; 1789 int s; 1790 1791 s = splserial(); 1792 COM_LOCK(sc); 1793 overflows = sc->sc_overflows; 1794 sc->sc_overflows = 0; 1795 floods = sc->sc_floods; 1796 sc->sc_floods = 0; 1797 sc->sc_errors = 0; 1798 COM_UNLOCK(sc); 1799 splx(s); 1800 1801 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1802 sc->sc_dev.dv_xname, 1803 overflows, overflows == 1 ? "" : "s", 1804 floods, floods == 1 ? "" : "s"); 1805 } 1806 1807 integrate void 1808 com_rxsoft(struct com_softc *sc, struct tty *tp) 1809 { 1810 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1811 u_char *get, *end; 1812 u_int cc, scc; 1813 u_char lsr; 1814 int code; 1815 int s; 1816 1817 end = sc->sc_ebuf; 1818 get = sc->sc_rbget; 1819 scc = cc = com_rbuf_size - sc->sc_rbavail; 1820 1821 if (cc == com_rbuf_size) { 1822 sc->sc_floods++; 1823 if (sc->sc_errors++ == 0) 1824 callout_reset(&sc->sc_diag_callout, 60 * hz, 1825 comdiag, sc); 1826 } 1827 1828 /* If not yet open, drop the entire buffer content here */ 1829 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1830 get += cc << 1; 1831 if (get >= end) 1832 get -= com_rbuf_size << 1; 1833 cc = 0; 1834 } 1835 while (cc) { 1836 code = get[0]; 1837 lsr = get[1]; 1838 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1839 if (ISSET(lsr, LSR_OE)) { 1840 sc->sc_overflows++; 1841 if (sc->sc_errors++ == 0) 1842 callout_reset(&sc->sc_diag_callout, 1843 60 * hz, comdiag, sc); 1844 } 1845 if (ISSET(lsr, LSR_BI | LSR_FE)) 1846 SET(code, TTY_FE); 1847 if (ISSET(lsr, LSR_PE)) 1848 SET(code, TTY_PE); 1849 } 1850 if ((*rint)(code, tp) == -1) { 1851 /* 1852 * The line discipline's buffer is out of space. 1853 */ 1854 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1855 /* 1856 * We're either not using flow control, or the 1857 * line discipline didn't tell us to block for 1858 * some reason. Either way, we have no way to 1859 * know when there's more space available, so 1860 * just drop the rest of the data. 1861 */ 1862 get += cc << 1; 1863 if (get >= end) 1864 get -= com_rbuf_size << 1; 1865 cc = 0; 1866 } else { 1867 /* 1868 * Don't schedule any more receive processing 1869 * until the line discipline tells us there's 1870 * space available (through comhwiflow()). 1871 * Leave the rest of the data in the input 1872 * buffer. 1873 */ 1874 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1875 } 1876 break; 1877 } 1878 get += 2; 1879 if (get >= end) 1880 get = sc->sc_rbuf; 1881 cc--; 1882 } 1883 1884 if (cc != scc) { 1885 sc->sc_rbget = get; 1886 s = splserial(); 1887 COM_LOCK(sc); 1888 1889 cc = sc->sc_rbavail += scc - cc; 1890 /* Buffers should be ok again, release possible block. */ 1891 if (cc >= sc->sc_r_lowat) { 1892 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1893 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1894 SET(sc->sc_ier, IER_ERXRDY); 1895 #ifdef COM_PXA2X0 1896 if (sc->sc_type == COM_TYPE_PXA2x0) 1897 SET(sc->sc_ier, IER_ERXTOUT); 1898 #endif 1899 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1900 com_ier, sc->sc_ier); 1901 } 1902 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1903 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1904 com_hwiflow(sc); 1905 } 1906 } 1907 COM_UNLOCK(sc); 1908 splx(s); 1909 } 1910 } 1911 1912 integrate void 1913 com_txsoft(struct com_softc *sc, struct tty *tp) 1914 { 1915 1916 CLR(tp->t_state, TS_BUSY); 1917 if (ISSET(tp->t_state, TS_FLUSH)) 1918 CLR(tp->t_state, TS_FLUSH); 1919 else 1920 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1921 (*tp->t_linesw->l_start)(tp); 1922 } 1923 1924 integrate void 1925 com_stsoft(struct com_softc *sc, struct tty *tp) 1926 { 1927 u_char msr, delta; 1928 int s; 1929 1930 s = splserial(); 1931 COM_LOCK(sc); 1932 msr = sc->sc_msr; 1933 delta = sc->sc_msr_delta; 1934 sc->sc_msr_delta = 0; 1935 COM_UNLOCK(sc); 1936 splx(s); 1937 1938 if (ISSET(delta, sc->sc_msr_dcd)) { 1939 /* 1940 * Inform the tty layer that carrier detect changed. 1941 */ 1942 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1943 } 1944 1945 if (ISSET(delta, sc->sc_msr_cts)) { 1946 /* Block or unblock output according to flow control. */ 1947 if (ISSET(msr, sc->sc_msr_cts)) { 1948 sc->sc_tx_stopped = 0; 1949 (*tp->t_linesw->l_start)(tp); 1950 } else { 1951 sc->sc_tx_stopped = 1; 1952 } 1953 } 1954 1955 #ifdef COM_DEBUG 1956 if (com_debug) 1957 comstatus(sc, "com_stsoft"); 1958 #endif 1959 } 1960 1961 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1962 void 1963 comsoft(void *arg) 1964 { 1965 struct com_softc *sc = arg; 1966 struct tty *tp; 1967 1968 if (COM_ISALIVE(sc) == 0) 1969 return; 1970 1971 { 1972 #else 1973 void 1974 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1975 comsoft(void) 1976 #else 1977 comsoft(void *arg) 1978 #endif 1979 { 1980 struct com_softc *sc; 1981 struct tty *tp; 1982 int unit; 1983 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1984 int s; 1985 1986 s = splsoftserial(); 1987 com_softintr_scheduled = 0; 1988 #endif 1989 1990 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1991 sc = device_lookup(&com_cd, unit); 1992 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1993 continue; 1994 1995 if (COM_ISALIVE(sc) == 0) 1996 continue; 1997 1998 tp = sc->sc_tty; 1999 if (tp == NULL) 2000 continue; 2001 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2002 continue; 2003 #endif 2004 tp = sc->sc_tty; 2005 2006 if (sc->sc_rx_ready) { 2007 sc->sc_rx_ready = 0; 2008 com_rxsoft(sc, tp); 2009 } 2010 2011 if (sc->sc_st_check) { 2012 sc->sc_st_check = 0; 2013 com_stsoft(sc, tp); 2014 } 2015 2016 if (sc->sc_tx_done) { 2017 sc->sc_tx_done = 0; 2018 com_txsoft(sc, tp); 2019 } 2020 } 2021 2022 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2023 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2024 splx(s); 2025 #endif 2026 #endif 2027 } 2028 2029 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2030 /* there has got to be a better way to do comsoft() */ 2031 }} 2032 #endif 2033 2034 int 2035 comintr(void *arg) 2036 { 2037 struct com_softc *sc = arg; 2038 bus_space_tag_t iot = sc->sc_iot; 2039 bus_space_handle_t ioh = sc->sc_ioh; 2040 u_char *put, *end; 2041 u_int cc; 2042 u_char lsr, iir; 2043 2044 if (COM_ISALIVE(sc) == 0) 2045 return (0); 2046 2047 COM_LOCK(sc); 2048 iir = bus_space_read_1(iot, ioh, com_iir); 2049 if (ISSET(iir, IIR_NOPEND)) { 2050 COM_UNLOCK(sc); 2051 return (0); 2052 } 2053 2054 end = sc->sc_ebuf; 2055 put = sc->sc_rbput; 2056 cc = sc->sc_rbavail; 2057 2058 again: do { 2059 u_char msr, delta; 2060 2061 lsr = bus_space_read_1(iot, ioh, com_lsr); 2062 if (ISSET(lsr, LSR_BI)) { 2063 int cn_trapped = 0; 2064 2065 cn_check_magic(sc->sc_tty->t_dev, 2066 CNC_BREAK, com_cnm_state); 2067 if (cn_trapped) 2068 continue; 2069 #if defined(KGDB) && !defined(DDB) 2070 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2071 kgdb_connect(1); 2072 continue; 2073 } 2074 #endif 2075 } 2076 2077 if (ISSET(lsr, LSR_RCV_MASK) && 2078 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2079 while (cc > 0) { 2080 int cn_trapped = 0; 2081 put[0] = bus_space_read_1(iot, ioh, com_data); 2082 put[1] = lsr; 2083 cn_check_magic(sc->sc_tty->t_dev, 2084 put[0], com_cnm_state); 2085 if (cn_trapped) { 2086 lsr = bus_space_read_1(iot, ioh, com_lsr); 2087 if (!ISSET(lsr, LSR_RCV_MASK)) 2088 break; 2089 2090 continue; 2091 } 2092 put += 2; 2093 if (put >= end) 2094 put = sc->sc_rbuf; 2095 cc--; 2096 2097 lsr = bus_space_read_1(iot, ioh, com_lsr); 2098 if (!ISSET(lsr, LSR_RCV_MASK)) 2099 break; 2100 } 2101 2102 /* 2103 * Current string of incoming characters ended because 2104 * no more data was available or we ran out of space. 2105 * Schedule a receive event if any data was received. 2106 * If we're out of space, turn off receive interrupts. 2107 */ 2108 sc->sc_rbput = put; 2109 sc->sc_rbavail = cc; 2110 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2111 sc->sc_rx_ready = 1; 2112 2113 /* 2114 * See if we are in danger of overflowing a buffer. If 2115 * so, use hardware flow control to ease the pressure. 2116 */ 2117 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2118 cc < sc->sc_r_hiwat) { 2119 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2120 com_hwiflow(sc); 2121 } 2122 2123 /* 2124 * If we're out of space, disable receive interrupts 2125 * until the queue has drained a bit. 2126 */ 2127 if (!cc) { 2128 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2129 CLR(sc->sc_ier, IER_ERXRDY); 2130 #ifdef COM_PXA2X0 2131 if (sc->sc_type == COM_TYPE_PXA2x0) 2132 CLR(sc->sc_ier, IER_ERXTOUT); 2133 #endif 2134 bus_space_write_1(iot, ioh, com_ier, 2135 sc->sc_ier); 2136 } 2137 } else { 2138 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2139 #ifdef COM_PXA2X0 2140 if (sc->sc_type == COM_TYPE_PXA2x0) 2141 bus_space_write_1(iot, ioh, com_ier, 2142 IER_EUART); 2143 else 2144 #endif 2145 bus_space_write_1(iot, ioh, com_ier, 0); 2146 delay(10); 2147 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2148 continue; 2149 } 2150 } 2151 2152 msr = bus_space_read_1(iot, ioh, com_msr); 2153 delta = msr ^ sc->sc_msr; 2154 sc->sc_msr = msr; 2155 /* 2156 * Pulse-per-second (PSS) signals on edge of DCD? 2157 * Process these even if line discipline is ignoring DCD. 2158 */ 2159 if (delta & sc->sc_ppsmask) { 2160 struct timeval tv; 2161 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2162 /* XXX nanotime() */ 2163 microtime(&tv); 2164 TIMEVAL_TO_TIMESPEC(&tv, 2165 &sc->ppsinfo.assert_timestamp); 2166 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2167 timespecadd(&sc->ppsinfo.assert_timestamp, 2168 &sc->ppsparam.assert_offset, 2169 &sc->ppsinfo.assert_timestamp); 2170 } 2171 2172 #ifdef PPS_SYNC 2173 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2174 hardpps(&tv, tv.tv_usec); 2175 #endif 2176 sc->ppsinfo.assert_sequence++; 2177 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2178 2179 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2180 /* XXX nanotime() */ 2181 microtime(&tv); 2182 TIMEVAL_TO_TIMESPEC(&tv, 2183 &sc->ppsinfo.clear_timestamp); 2184 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2185 timespecadd(&sc->ppsinfo.clear_timestamp, 2186 &sc->ppsparam.clear_offset, 2187 &sc->ppsinfo.clear_timestamp); 2188 } 2189 2190 #ifdef PPS_SYNC 2191 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2192 hardpps(&tv, tv.tv_usec); 2193 #endif 2194 sc->ppsinfo.clear_sequence++; 2195 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2196 } 2197 } 2198 2199 /* 2200 * Process normal status changes 2201 */ 2202 if (ISSET(delta, sc->sc_msr_mask)) { 2203 SET(sc->sc_msr_delta, delta); 2204 2205 /* 2206 * Stop output immediately if we lose the output 2207 * flow control signal or carrier detect. 2208 */ 2209 if (ISSET(~msr, sc->sc_msr_mask)) { 2210 sc->sc_tbc = 0; 2211 sc->sc_heldtbc = 0; 2212 #ifdef COM_DEBUG 2213 if (com_debug) 2214 comstatus(sc, "comintr "); 2215 #endif 2216 } 2217 2218 sc->sc_st_check = 1; 2219 } 2220 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2221 || ((iir & IIR_IMASK) == 0)); 2222 2223 /* 2224 * Done handling any receive interrupts. See if data can be 2225 * transmitted as well. Schedule tx done event if no data left 2226 * and tty was marked busy. 2227 */ 2228 if (ISSET(lsr, LSR_TXRDY)) { 2229 /* 2230 * If we've delayed a parameter change, do it now, and restart 2231 * output. 2232 */ 2233 if (sc->sc_heldchange) { 2234 com_loadchannelregs(sc); 2235 sc->sc_heldchange = 0; 2236 sc->sc_tbc = sc->sc_heldtbc; 2237 sc->sc_heldtbc = 0; 2238 } 2239 2240 /* Output the next chunk of the contiguous buffer, if any. */ 2241 if (sc->sc_tbc > 0) { 2242 u_int n; 2243 2244 n = sc->sc_tbc; 2245 if (n > sc->sc_fifolen) 2246 n = sc->sc_fifolen; 2247 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2248 sc->sc_tbc -= n; 2249 sc->sc_tba += n; 2250 } else { 2251 /* Disable transmit completion interrupts if necessary. */ 2252 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2253 CLR(sc->sc_ier, IER_ETXRDY); 2254 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2255 } 2256 if (sc->sc_tx_busy) { 2257 sc->sc_tx_busy = 0; 2258 sc->sc_tx_done = 1; 2259 } 2260 } 2261 } 2262 2263 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2264 goto again; 2265 2266 COM_UNLOCK(sc); 2267 2268 /* Wake up the poller. */ 2269 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2270 softintr_schedule(sc->sc_si); 2271 #else 2272 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2273 setsoftserial(); 2274 #else 2275 if (!com_softintr_scheduled) { 2276 com_softintr_scheduled = 1; 2277 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2278 } 2279 #endif 2280 #endif 2281 2282 #if NRND > 0 && defined(RND_COM) 2283 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2284 #endif 2285 2286 return (1); 2287 } 2288 2289 /* 2290 * The following functions are polled getc and putc routines, shared 2291 * by the console and kgdb glue. 2292 * 2293 * The read-ahead code is so that you can detect pending in-band 2294 * cn_magic in polled mode while doing output rather than having to 2295 * wait until the kernel decides it needs input. 2296 */ 2297 2298 #define MAX_READAHEAD 20 2299 static int com_readahead[MAX_READAHEAD]; 2300 static int com_readaheadcount = 0; 2301 2302 int 2303 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2304 { 2305 int s = splserial(); 2306 u_char stat, c; 2307 2308 /* got a character from reading things earlier */ 2309 if (com_readaheadcount > 0) { 2310 int i; 2311 2312 c = com_readahead[0]; 2313 for (i = 1; i < com_readaheadcount; i++) { 2314 com_readahead[i-1] = com_readahead[i]; 2315 } 2316 com_readaheadcount--; 2317 splx(s); 2318 return (c); 2319 } 2320 2321 /* block until a character becomes available */ 2322 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2323 ; 2324 2325 c = bus_space_read_1(iot, ioh, com_data); 2326 stat = bus_space_read_1(iot, ioh, com_iir); 2327 { 2328 int cn_trapped = 0; /* unused */ 2329 #ifdef DDB 2330 extern int db_active; 2331 if (!db_active) 2332 #endif 2333 cn_check_magic(dev, c, com_cnm_state); 2334 } 2335 splx(s); 2336 return (c); 2337 } 2338 2339 void 2340 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2341 { 2342 int s = splserial(); 2343 int cin, stat, timo; 2344 2345 if (com_readaheadcount < MAX_READAHEAD 2346 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2347 int cn_trapped = 0; 2348 cin = bus_space_read_1(iot, ioh, com_data); 2349 stat = bus_space_read_1(iot, ioh, com_iir); 2350 cn_check_magic(dev, cin, com_cnm_state); 2351 com_readahead[com_readaheadcount++] = cin; 2352 } 2353 2354 /* wait for any pending transmission to finish */ 2355 timo = 150000; 2356 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2357 continue; 2358 2359 bus_space_write_1(iot, ioh, com_data, c); 2360 COM_BARRIER(iot, ioh, BR | BW); 2361 2362 /* wait for this transmission to complete */ 2363 timo = 1500000; 2364 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2365 continue; 2366 2367 splx(s); 2368 } 2369 2370 /* 2371 * Initialize UART for use as console or KGDB line. 2372 */ 2373 int 2374 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2375 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2376 { 2377 bus_space_handle_t ioh; 2378 2379 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2380 return (ENOMEM); /* ??? */ 2381 2382 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2383 bus_space_write_1(iot, ioh, com_efr, 0); 2384 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2385 rate = comspeed(rate, frequency, type); 2386 bus_space_write_1(iot, ioh, com_dlbl, rate); 2387 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2388 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2389 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2390 bus_space_write_1(iot, ioh, com_fifo, 2391 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2392 #ifdef COM_PXA2X0 2393 bus_space_write_1(iot, ioh, com_ier, 2394 type == COM_TYPE_PXA2x0 ? IER_EUART : 0); 2395 #else 2396 bus_space_write_1(iot, ioh, com_ier, 0); 2397 #endif 2398 2399 *iohp = ioh; 2400 return (0); 2401 } 2402 2403 /* 2404 * Following are all routines needed for COM to act as console 2405 */ 2406 struct consdev comcons = { 2407 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2408 NODEV, CN_NORMAL 2409 }; 2410 2411 2412 int 2413 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2414 int type, tcflag_t cflag) 2415 { 2416 int res; 2417 2418 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2419 if (res) 2420 return (res); 2421 2422 cn_tab = &comcons; 2423 cn_init_magic(&com_cnm_state); 2424 cn_set_magic("\047\001"); /* default magic is BREAK */ 2425 2426 comconstag = iot; 2427 comconsaddr = iobase; 2428 comconsrate = rate; 2429 comconscflag = cflag; 2430 2431 return (0); 2432 } 2433 2434 int 2435 comcngetc(dev_t dev) 2436 { 2437 2438 return (com_common_getc(dev, comconstag, comconsioh)); 2439 } 2440 2441 /* 2442 * Console kernel output character routine. 2443 */ 2444 void 2445 comcnputc(dev_t dev, int c) 2446 { 2447 2448 com_common_putc(dev, comconstag, comconsioh, c); 2449 } 2450 2451 void 2452 comcnpollc(dev_t dev, int on) 2453 { 2454 2455 } 2456 2457 #ifdef KGDB 2458 int 2459 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2460 int frequency, int type, tcflag_t cflag) 2461 { 2462 int res; 2463 2464 if (iot == comconstag && iobase == comconsaddr) { 2465 #if !defined(DDB) 2466 return (EBUSY); /* cannot share with console */ 2467 #else 2468 com_kgdb_ioh = comconsioh; 2469 #endif 2470 } else { 2471 2472 res = cominit(iot, iobase, rate, frequency, type, cflag, 2473 &com_kgdb_ioh); 2474 if (res) 2475 return (res); 2476 2477 /* 2478 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2479 * expects this to be initialized 2480 */ 2481 cn_init_magic(&com_cnm_state); 2482 cn_set_magic("\047\001"); 2483 } 2484 2485 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2486 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2487 2488 com_kgdb_iot = iot; 2489 com_kgdb_addr = iobase; 2490 2491 return (0); 2492 } 2493 2494 /* ARGSUSED */ 2495 int 2496 com_kgdb_getc(void *arg) 2497 { 2498 2499 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2500 } 2501 2502 /* ARGSUSED */ 2503 void 2504 com_kgdb_putc(void *arg, int c) 2505 { 2506 2507 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2508 } 2509 #endif /* KGDB */ 2510 2511 /* helper function to identify the com ports used by 2512 console or KGDB (and not yet autoconf attached) */ 2513 int 2514 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2515 { 2516 bus_space_handle_t help; 2517 2518 if (!comconsattached && 2519 iot == comconstag && iobase == comconsaddr) 2520 help = comconsioh; 2521 #ifdef KGDB 2522 else if (!com_kgdb_attached && 2523 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2524 help = com_kgdb_ioh; 2525 #endif 2526 else 2527 return (0); 2528 2529 if (ioh) 2530 *ioh = help; 2531 return (1); 2532 } 2533
Indexes created Wed Sep 24 05:09:52 GMT 2025