com.c revision 1.216.2.1
1 /* $NetBSD: com.c,v 1.216.2.1 2003/07/02 15:26:04 darrenr Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.216.2.1 2003/07/02 15:26:04 darrenr Exp $"); 81 82 #include "opt_com.h" 83 #include "opt_ddb.h" 84 #include "opt_kgdb.h" 85 #include "opt_lockdebug.h" 86 #include "opt_multiprocessor.h" 87 88 #include "rnd.h" 89 #if NRND > 0 && defined(RND_COM) 90 #include <sys/rnd.h> 91 #endif 92 93 /* 94 * Override cnmagic(9) macro before including <sys/systm.h>. 95 * We need to know if cn_check_magic triggered debugger, so set a flag. 96 * Callers of cn_check_magic must declare int cn_trapped = 0; 97 * XXX: this is *ugly*! 98 */ 99 #define cn_trap() \ 100 do { \ 101 console_debugger(); \ 102 cn_trapped = 1; \ 103 } while (/* CONSTCOND */ 0) 104 105 #include <sys/param.h> 106 #include <sys/systm.h> 107 #include <sys/ioctl.h> 108 #include <sys/select.h> 109 #include <sys/tty.h> 110 #include <sys/proc.h> 111 #include <sys/user.h> 112 #include <sys/conf.h> 113 #include <sys/file.h> 114 #include <sys/uio.h> 115 #include <sys/kernel.h> 116 #include <sys/syslog.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 #include <sys/timepps.h> 120 #include <sys/vnode.h> 121 122 #include <machine/intr.h> 123 #include <machine/bus.h> 124 125 #include <dev/ic/comreg.h> 126 #include <dev/ic/comvar.h> 127 #include <dev/ic/ns16550reg.h> 128 #include <dev/ic/st16650reg.h> 129 #ifdef COM_HAYESP 130 #include <dev/ic/hayespreg.h> 131 #endif 132 #define com_lcr com_cfcr 133 #include <dev/cons.h> 134 135 #ifdef COM_HAYESP 136 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 137 #endif 138 139 static void com_enable_debugport(struct com_softc *); 140 141 void com_config(struct com_softc *); 142 void com_shutdown(struct com_softc *); 143 int comspeed(long, long, int); 144 static u_char cflag2lcr(tcflag_t); 145 int comparam(struct tty *, struct termios *); 146 void comstart(struct tty *); 147 int comhwiflow(struct tty *, int); 148 149 void com_loadchannelregs(struct com_softc *); 150 void com_hwiflow(struct com_softc *); 151 void com_break(struct com_softc *, int); 152 void com_modem(struct com_softc *, int); 153 void tiocm_to_com(struct com_softc *, u_long, int); 154 int com_to_tiocm(struct com_softc *); 155 void com_iflush(struct com_softc *); 156 157 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 158 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 159 160 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 161 bus_space_handle_t *); 162 163 int comcngetc(dev_t); 164 void comcnputc(dev_t, int); 165 void comcnpollc(dev_t, int); 166 167 #define integrate static inline 168 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 169 void comsoft(void *); 170 #else 171 #ifndef __NO_SOFT_SERIAL_INTERRUPT 172 void comsoft(void); 173 #else 174 void comsoft(void *); 175 struct callout comsoft_callout = CALLOUT_INITIALIZER; 176 #endif 177 #endif 178 integrate void com_rxsoft(struct com_softc *, struct tty *); 179 integrate void com_txsoft(struct com_softc *, struct tty *); 180 integrate void com_stsoft(struct com_softc *, struct tty *); 181 integrate void com_schedrx(struct com_softc *); 182 void comdiag(void *); 183 184 extern struct cfdriver com_cd; 185 186 dev_type_open(comopen); 187 dev_type_close(comclose); 188 dev_type_read(comread); 189 dev_type_write(comwrite); 190 dev_type_ioctl(comioctl); 191 dev_type_stop(comstop); 192 dev_type_tty(comtty); 193 dev_type_poll(compoll); 194 195 const struct cdevsw com_cdevsw = { 196 comopen, comclose, comread, comwrite, comioctl, 197 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 198 }; 199 200 /* 201 * Make this an option variable one can patch. 202 * But be warned: this must be a power of 2! 203 */ 204 u_int com_rbuf_size = COM_RING_SIZE; 205 206 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 207 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 208 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 209 210 static bus_addr_t comconsaddr; 211 static bus_space_tag_t comconstag; 212 static bus_space_handle_t comconsioh; 213 static int comconsattached; 214 static int comconsrate; 215 static tcflag_t comconscflag; 216 static struct cnm_state com_cnm_state; 217 218 static int ppscap = 219 PPS_TSFMT_TSPEC | 220 PPS_CAPTUREASSERT | 221 PPS_CAPTURECLEAR | 222 #ifdef PPS_SYNC 223 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 224 #endif /* PPS_SYNC */ 225 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 226 227 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 228 #ifdef __NO_SOFT_SERIAL_INTERRUPT 229 volatile int com_softintr_scheduled; 230 #endif 231 #endif 232 233 #ifdef KGDB 234 #include <sys/kgdb.h> 235 236 static bus_addr_t com_kgdb_addr; 237 static bus_space_tag_t com_kgdb_iot; 238 static bus_space_handle_t com_kgdb_ioh; 239 static int com_kgdb_attached; 240 241 int com_kgdb_getc(void *); 242 void com_kgdb_putc(void *, int); 243 #endif /* KGDB */ 244 245 #define COMUNIT_MASK 0x7ffff 246 #define COMDIALOUT_MASK 0x80000 247 248 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 249 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 250 251 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 257 258 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 259 260 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 261 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 262 263 #else 264 265 #define COM_LOCK(sc) 266 #define COM_UNLOCK(sc) 267 268 #endif 269 270 /*ARGSUSED*/ 271 int 272 comspeed(long speed, long frequency, int type) 273 { 274 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 275 276 int x, err; 277 278 #if 0 279 if (speed == 0) 280 return (0); 281 #endif 282 if (speed <= 0) 283 return (-1); 284 x = divrnd(frequency / 16, speed); 285 if (x <= 0) 286 return (-1); 287 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 288 if (err < 0) 289 err = -err; 290 if (err > COM_TOLERANCE) 291 return (-1); 292 return (x); 293 294 #undef divrnd 295 } 296 297 #ifdef COM_DEBUG 298 int com_debug = 0; 299 300 void comstatus(struct com_softc *, char *); 301 void 302 comstatus(struct com_softc *sc, char *str) 303 { 304 struct tty *tp = sc->sc_tty; 305 306 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 307 sc->sc_dev.dv_xname, str, 308 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 309 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 310 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 311 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 312 sc->sc_tx_stopped ? "+" : "-"); 313 314 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 315 sc->sc_dev.dv_xname, str, 316 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 317 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 318 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 319 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 320 sc->sc_rx_flags); 321 } 322 #endif 323 324 int 325 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 326 { 327 328 /* force access to id reg */ 329 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 330 bus_space_write_1(iot, ioh, com_iir, 0); 331 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 332 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 333 return (0); 334 335 return (1); 336 } 337 338 #ifdef COM_HAYESP 339 int 340 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 341 { 342 char val, dips; 343 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 344 bus_space_tag_t iot = sc->sc_iot; 345 346 /* 347 * Hayes ESP cards have two iobases. One is for compatibility with 348 * 16550 serial chips, and at the same ISA PC base addresses. The 349 * other is for ESP-specific enhanced features, and lies at a 350 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 351 */ 352 353 /* Test for ESP signature */ 354 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 355 return (0); 356 357 /* 358 * ESP is present at ESP enhanced base address; unknown com port 359 */ 360 361 /* Get the dip-switch configurations */ 362 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 363 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 364 365 /* Determine which com port this ESP card services: bits 0,1 of */ 366 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 367 if (sc->sc_iobase != combaselist[dips & 0x03]) 368 return (0); 369 370 printf(": ESP"); 371 372 /* Check ESP Self Test bits. */ 373 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 374 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 376 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 377 if ((val & 0x70) < 0x20) { 378 printf("-old (%o)", val & 0x70); 379 /* we do not support the necessary features */ 380 return (0); 381 } 382 383 /* Check for ability to emulate 16550: bit 8 == 1 */ 384 if ((dips & 0x80) == 0) { 385 printf(" slave"); 386 /* XXX Does slave really mean no 16550 support?? */ 387 return (0); 388 } 389 390 /* 391 * If we made it this far, we are a full-featured ESP v2.0 (or 392 * better), at the correct com port address. 393 */ 394 395 sc->sc_type = COM_TYPE_HAYESP; 396 printf(", 1024 byte fifo\n"); 397 return (1); 398 } 399 #endif 400 401 static void 402 com_enable_debugport(struct com_softc *sc) 403 { 404 int s; 405 406 /* Turn on line break interrupt, set carrier. */ 407 s = splserial(); 408 COM_LOCK(sc); 409 sc->sc_ier = IER_ERXRDY; 410 #ifdef COM_PXA2X0 411 if (sc->sc_type == COM_TYPE_PXA2x0) 412 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 413 #endif 414 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 415 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 416 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 417 COM_UNLOCK(sc); 418 splx(s); 419 } 420 421 void 422 com_attach_subr(struct com_softc *sc) 423 { 424 bus_addr_t iobase = sc->sc_iobase; 425 bus_space_tag_t iot = sc->sc_iot; 426 bus_space_handle_t ioh = sc->sc_ioh; 427 struct tty *tp; 428 #ifdef COM16650 429 u_int8_t lcr; 430 #endif 431 #ifdef COM_HAYESP 432 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 433 int *hayespp; 434 #endif 435 const char *fifo_msg = NULL; 436 437 callout_init(&sc->sc_diag_callout); 438 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 439 simple_lock_init(&sc->sc_lock); 440 #endif 441 442 /* Disable interrupts before configuring the device. */ 443 #ifdef COM_PXA2X0 444 if (sc->sc_type == COM_TYPE_PXA2x0) 445 sc->sc_ier = IER_EUART; 446 else 447 #endif 448 sc->sc_ier = 0; 449 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 450 451 if (iot == comconstag && iobase == comconsaddr) { 452 comconsattached = 1; 453 454 /* Make sure the console is always "hardwired". */ 455 delay(1000); /* wait for output to finish */ 456 SET(sc->sc_hwflags, COM_HW_CONSOLE); 457 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 458 } 459 460 #ifdef COM_HAYESP 461 sc->sc_prescaler = 0; /* set prescaler to x1. */ 462 463 /* Look for a Hayes ESP board. */ 464 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 465 bus_space_handle_t hayespioh; 466 467 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 468 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 469 continue; 470 if (comprobeHAYESP(hayespioh, sc)) { 471 sc->sc_hayespioh = hayespioh; 472 sc->sc_fifolen = 1024; 473 474 break; 475 } 476 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 477 } 478 /* No ESP; look for other things. */ 479 if (sc->sc_type != COM_TYPE_HAYESP) { 480 #endif 481 sc->sc_fifolen = 1; 482 /* look for a NS 16550AF UART with FIFOs */ 483 bus_space_write_1(iot, ioh, com_fifo, 484 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 485 delay(100); 486 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 487 == IIR_FIFO_MASK) 488 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 489 == FIFO_TRIGGER_14) { 490 SET(sc->sc_hwflags, COM_HW_FIFO); 491 492 #ifdef COM16650 493 /* 494 * IIR changes into the EFR if LCR is set to LCR_EERS 495 * on 16650s. We also know IIR != 0 at this point. 496 * Write 0 into the EFR, and read it. If the result 497 * is 0, we have a 16650. 498 * 499 * Older 16650s were broken; the test to detect them 500 * is taken from the Linux driver. Apparently 501 * setting DLAB enable gives access to the EFR on 502 * these chips. 503 */ 504 lcr = bus_space_read_1(iot, ioh, com_lcr); 505 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 506 bus_space_write_1(iot, ioh, com_efr, 0); 507 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 508 bus_space_write_1(iot, ioh, com_lcr, 509 lcr | LCR_DLAB); 510 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 511 CLR(sc->sc_hwflags, COM_HW_FIFO); 512 sc->sc_fifolen = 0; 513 } else { 514 SET(sc->sc_hwflags, COM_HW_FLOW); 515 sc->sc_fifolen = 32; 516 } 517 } else 518 #endif 519 sc->sc_fifolen = 16; 520 521 #ifdef COM16650 522 bus_space_write_1(iot, ioh, com_lcr, lcr); 523 if (sc->sc_fifolen == 0) 524 fifo_msg = "st16650, broken fifo"; 525 else if (sc->sc_fifolen == 32) 526 fifo_msg = "st16650a, working fifo"; 527 else 528 #endif 529 fifo_msg = "ns16550a, working fifo"; 530 } else 531 fifo_msg = "ns16550, broken fifo"; 532 else 533 fifo_msg = "ns8250 or ns16450, no fifo"; 534 bus_space_write_1(iot, ioh, com_fifo, 0); 535 /* 536 * Some chips will clear down both Tx and Rx FIFOs when zero is 537 * written to com_fifo. If this chip is the console, writing zero 538 * results in some of the chip/FIFO description being lost, so delay 539 * printing it until now. 540 */ 541 delay(10); 542 aprint_normal(": %s\n", fifo_msg); 543 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 544 sc->sc_fifolen = 1; 545 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 546 } 547 #ifdef COM_HAYESP 548 } 549 #endif 550 551 tp = ttymalloc(); 552 tp->t_oproc = comstart; 553 tp->t_param = comparam; 554 tp->t_hwiflow = comhwiflow; 555 556 sc->sc_tty = tp; 557 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 558 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 559 sc->sc_rbavail = com_rbuf_size; 560 if (sc->sc_rbuf == NULL) { 561 aprint_error("%s: unable to allocate ring buffer\n", 562 sc->sc_dev.dv_xname); 563 return; 564 } 565 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 566 567 tty_attach(tp); 568 569 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 570 SET(sc->sc_mcr, MCR_IENABLE); 571 572 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 573 int maj; 574 575 /* locate the major number */ 576 maj = cdevsw_lookup_major(&com_cdevsw); 577 578 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 579 580 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 581 } 582 583 #ifdef KGDB 584 /* 585 * Allow kgdb to "take over" this port. If this is 586 * not the console and is the kgdb device, it has 587 * exclusive use. If it's the console _and_ the 588 * kgdb device, it doesn't. 589 */ 590 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 591 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 592 com_kgdb_attached = 1; 593 594 SET(sc->sc_hwflags, COM_HW_KGDB); 595 } 596 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 597 } 598 #endif 599 600 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 601 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 602 #endif 603 604 #if NRND > 0 && defined(RND_COM) 605 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 606 RND_TYPE_TTY, 0); 607 #endif 608 609 /* if there are no enable/disable functions, assume the device 610 is always enabled */ 611 if (!sc->enable) 612 sc->enabled = 1; 613 614 com_config(sc); 615 616 SET(sc->sc_hwflags, COM_HW_DEV_OK); 617 } 618 619 void 620 com_config(struct com_softc *sc) 621 { 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 625 /* Disable interrupts before configuring the device. */ 626 #ifdef COM_PXA2X0 627 if (sc->sc_type == COM_TYPE_PXA2x0) 628 sc->sc_ier = IER_EUART; 629 else 630 #endif 631 sc->sc_ier = 0; 632 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 633 634 #ifdef COM_HAYESP 635 /* Look for a Hayes ESP board. */ 636 if (sc->sc_type == COM_TYPE_HAYESP) { 637 sc->sc_fifolen = 1024; 638 639 /* Set 16550 compatibility mode */ 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 641 HAYESP_SETMODE); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 644 HAYESP_MODE_SCALE); 645 646 /* Set RTS/CTS flow control */ 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 648 HAYESP_SETFLOWTYPE); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_FLOW_RTS); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_FLOW_CTS); 653 654 /* Set flow control levels */ 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 656 HAYESP_SETRXFLOW); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 661 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 662 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 663 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 664 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 665 } 666 #endif 667 668 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 669 com_enable_debugport(sc); 670 } 671 672 int 673 com_detach(struct device *self, int flags) 674 { 675 struct com_softc *sc = (struct com_softc *)self; 676 int maj, mn; 677 678 /* locate the major number */ 679 maj = cdevsw_lookup_major(&com_cdevsw); 680 681 /* Nuke the vnodes for any open instances. */ 682 mn = self->dv_unit; 683 vdevgone(maj, mn, mn, VCHR); 684 685 mn |= COMDIALOUT_MASK; 686 vdevgone(maj, mn, mn, VCHR); 687 688 if (sc->sc_rbuf == NULL) { 689 /* 690 * Ring buffer allocation failed in the com_attach_subr, 691 * only the tty is allocated, and nothing else. 692 */ 693 ttyfree(sc->sc_tty); 694 return 0; 695 } 696 697 /* Free the receive buffer. */ 698 free(sc->sc_rbuf, M_DEVBUF); 699 700 /* Detach and free the tty. */ 701 tty_detach(sc->sc_tty); 702 ttyfree(sc->sc_tty); 703 704 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 705 /* Unhook the soft interrupt handler. */ 706 softintr_disestablish(sc->sc_si); 707 #endif 708 709 #if NRND > 0 && defined(RND_COM) 710 /* Unhook the entropy source. */ 711 rnd_detach_source(&sc->rnd_source); 712 #endif 713 714 return (0); 715 } 716 717 int 718 com_activate(struct device *self, enum devact act) 719 { 720 struct com_softc *sc = (struct com_softc *)self; 721 int s, rv = 0; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 switch (act) { 726 case DVACT_ACTIVATE: 727 rv = EOPNOTSUPP; 728 break; 729 730 case DVACT_DEACTIVATE: 731 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 732 rv = EBUSY; 733 break; 734 } 735 736 if (sc->disable != NULL && sc->enabled != 0) { 737 (*sc->disable)(sc); 738 sc->enabled = 0; 739 } 740 break; 741 } 742 743 COM_UNLOCK(sc); 744 splx(s); 745 return (rv); 746 } 747 748 void 749 com_shutdown(struct com_softc *sc) 750 { 751 struct tty *tp = sc->sc_tty; 752 int s; 753 754 s = splserial(); 755 COM_LOCK(sc); 756 757 /* If we were asserting flow control, then deassert it. */ 758 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 759 com_hwiflow(sc); 760 761 /* Clear any break condition set with TIOCSBRK. */ 762 com_break(sc, 0); 763 764 /* Turn off PPS capture on last close. */ 765 sc->sc_ppsmask = 0; 766 sc->ppsparam.mode = 0; 767 768 /* 769 * Hang up if necessary. Wait a bit, so the other side has time to 770 * notice even if we immediately open the port again. 771 * Avoid tsleeping above splhigh(). 772 */ 773 if (ISSET(tp->t_cflag, HUPCL)) { 774 com_modem(sc, 0); 775 COM_UNLOCK(sc); 776 splx(s); 777 /* XXX tsleep will only timeout */ 778 (void) tsleep(sc, TTIPRI, ttclos, hz); 779 s = splserial(); 780 COM_LOCK(sc); 781 } 782 783 /* Turn off interrupts. */ 784 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 785 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 786 #ifdef COM_PXA2X0 787 if (sc->sc_type == COM_TYPE_PXA2x0) 788 sc->sc_ier |= IER_ERXTOUT; 789 #endif 790 } else 791 sc->sc_ier = 0; 792 793 #ifdef COM_PXA2X0 794 if (sc->sc_type == COM_TYPE_PXA2x0) 795 sc->sc_ier |= IER_EUART; 796 #endif 797 798 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 799 800 if (sc->disable) { 801 #ifdef DIAGNOSTIC 802 if (!sc->enabled) 803 panic("com_shutdown: not enabled?"); 804 #endif 805 (*sc->disable)(sc); 806 sc->enabled = 0; 807 } 808 COM_UNLOCK(sc); 809 splx(s); 810 } 811 812 int 813 comopen(dev_t dev, int flag, int mode, struct lwp *l) 814 { 815 struct com_softc *sc; 816 struct tty *tp; 817 int s, s2; 818 int error; 819 820 sc = device_lookup(&com_cd, COMUNIT(dev)); 821 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 822 sc->sc_rbuf == NULL) 823 return (ENXIO); 824 825 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 826 return (ENXIO); 827 828 #ifdef KGDB 829 /* 830 * If this is the kgdb port, no other use is permitted. 831 */ 832 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 833 return (EBUSY); 834 #endif 835 836 tp = sc->sc_tty; 837 838 if (ISSET(tp->t_state, TS_ISOPEN) && 839 ISSET(tp->t_state, TS_XCLUDE) && 840 l->l_proc->p_ucred->cr_uid != 0) 841 return (EBUSY); 842 843 s = spltty(); 844 845 /* 846 * Do the following iff this is a first open. 847 */ 848 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 849 struct termios t; 850 851 tp->t_dev = dev; 852 853 s2 = splserial(); 854 COM_LOCK(sc); 855 856 if (sc->enable) { 857 if ((*sc->enable)(sc)) { 858 COM_UNLOCK(sc); 859 splx(s2); 860 splx(s); 861 printf("%s: device enable failed\n", 862 sc->sc_dev.dv_xname); 863 return (EIO); 864 } 865 sc->enabled = 1; 866 com_config(sc); 867 } 868 869 /* Turn on interrupts. */ 870 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 871 #ifdef COM_PXA2X0 872 if (sc->sc_type == COM_TYPE_PXA2x0) 873 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 874 #endif 875 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 876 877 /* Fetch the current modem control status, needed later. */ 878 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 879 880 /* Clear PPS capture state on first open. */ 881 sc->sc_ppsmask = 0; 882 sc->ppsparam.mode = 0; 883 884 COM_UNLOCK(sc); 885 splx(s2); 886 887 /* 888 * Initialize the termios status to the defaults. Add in the 889 * sticky bits from TIOCSFLAGS. 890 */ 891 t.c_ispeed = 0; 892 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 893 t.c_ospeed = comconsrate; 894 t.c_cflag = comconscflag; 895 } else { 896 t.c_ospeed = TTYDEF_SPEED; 897 t.c_cflag = TTYDEF_CFLAG; 898 } 899 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 900 SET(t.c_cflag, CLOCAL); 901 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 902 SET(t.c_cflag, CRTSCTS); 903 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 904 SET(t.c_cflag, MDMBUF); 905 /* Make sure comparam() will do something. */ 906 tp->t_ospeed = 0; 907 (void) comparam(tp, &t); 908 tp->t_iflag = TTYDEF_IFLAG; 909 tp->t_oflag = TTYDEF_OFLAG; 910 tp->t_lflag = TTYDEF_LFLAG; 911 ttychars(tp); 912 ttsetwater(tp); 913 914 s2 = splserial(); 915 COM_LOCK(sc); 916 917 /* 918 * Turn on DTR. We must always do this, even if carrier is not 919 * present, because otherwise we'd have to use TIOCSDTR 920 * immediately after setting CLOCAL, which applications do not 921 * expect. We always assert DTR while the device is open 922 * unless explicitly requested to deassert it. 923 */ 924 com_modem(sc, 1); 925 926 /* Clear the input ring, and unblock. */ 927 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 928 sc->sc_rbavail = com_rbuf_size; 929 com_iflush(sc); 930 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 931 com_hwiflow(sc); 932 933 #ifdef COM_DEBUG 934 if (com_debug) 935 comstatus(sc, "comopen "); 936 #endif 937 938 COM_UNLOCK(sc); 939 splx(s2); 940 } 941 942 splx(s); 943 944 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 945 if (error) 946 goto bad; 947 948 error = (*tp->t_linesw->l_open)(dev, tp); 949 if (error) 950 goto bad; 951 952 return (0); 953 954 bad: 955 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 956 /* 957 * We failed to open the device, and nobody else had it opened. 958 * Clean up the state as appropriate. 959 */ 960 com_shutdown(sc); 961 } 962 963 return (error); 964 } 965 966 int 967 comclose(dev_t dev, int flag, int mode, struct lwp *l) 968 { 969 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 970 struct tty *tp = sc->sc_tty; 971 972 /* XXX This is for cons.c. */ 973 if (!ISSET(tp->t_state, TS_ISOPEN)) 974 return (0); 975 976 (*tp->t_linesw->l_close)(tp, flag); 977 ttyclose(tp); 978 979 if (COM_ISALIVE(sc) == 0) 980 return (0); 981 982 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 983 /* 984 * Although we got a last close, the device may still be in 985 * use; e.g. if this was the dialout node, and there are still 986 * processes waiting for carrier on the non-dialout node. 987 */ 988 com_shutdown(sc); 989 } 990 991 return (0); 992 } 993 994 int 995 comread(dev_t dev, struct uio *uio, int flag) 996 { 997 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 998 struct tty *tp = sc->sc_tty; 999 1000 if (COM_ISALIVE(sc) == 0) 1001 return (EIO); 1002 1003 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1004 } 1005 1006 int 1007 comwrite(dev_t dev, struct uio *uio, int flag) 1008 { 1009 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1010 struct tty *tp = sc->sc_tty; 1011 1012 if (COM_ISALIVE(sc) == 0) 1013 return (EIO); 1014 1015 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1016 } 1017 1018 int 1019 compoll(dev_t dev, int events, struct lwp *l) 1020 { 1021 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1022 struct tty *tp = sc->sc_tty; 1023 1024 if (COM_ISALIVE(sc) == 0) 1025 return (EIO); 1026 1027 return (*tp->t_linesw->l_poll)(tp, events, l); 1028 } 1029 1030 struct tty * 1031 comtty(dev_t dev) 1032 { 1033 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1034 struct tty *tp = sc->sc_tty; 1035 1036 return (tp); 1037 } 1038 1039 int 1040 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1041 { 1042 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1043 struct tty *tp = sc->sc_tty; 1044 struct proc *p = l->l_proc; 1045 int error; 1046 int s; 1047 1048 if (COM_ISALIVE(sc) == 0) 1049 return (EIO); 1050 1051 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1052 if (error != EPASSTHROUGH) 1053 return (error); 1054 1055 error = ttioctl(tp, cmd, data, flag, l); 1056 if (error != EPASSTHROUGH) 1057 return (error); 1058 1059 error = 0; 1060 1061 s = splserial(); 1062 COM_LOCK(sc); 1063 1064 switch (cmd) { 1065 case TIOCSBRK: 1066 com_break(sc, 1); 1067 break; 1068 1069 case TIOCCBRK: 1070 com_break(sc, 0); 1071 break; 1072 1073 case TIOCSDTR: 1074 com_modem(sc, 1); 1075 break; 1076 1077 case TIOCCDTR: 1078 com_modem(sc, 0); 1079 break; 1080 1081 case TIOCGFLAGS: 1082 *(int *)data = sc->sc_swflags; 1083 break; 1084 1085 case TIOCSFLAGS: 1086 error = suser(p->p_ucred, &p->p_acflag); 1087 if (error) 1088 break; 1089 sc->sc_swflags = *(int *)data; 1090 break; 1091 1092 case TIOCMSET: 1093 case TIOCMBIS: 1094 case TIOCMBIC: 1095 tiocm_to_com(sc, cmd, *(int *)data); 1096 break; 1097 1098 case TIOCMGET: 1099 *(int *)data = com_to_tiocm(sc); 1100 break; 1101 1102 case PPS_IOC_CREATE: 1103 break; 1104 1105 case PPS_IOC_DESTROY: 1106 break; 1107 1108 case PPS_IOC_GETPARAMS: { 1109 pps_params_t *pp; 1110 pp = (pps_params_t *)data; 1111 *pp = sc->ppsparam; 1112 break; 1113 } 1114 1115 case PPS_IOC_SETPARAMS: { 1116 pps_params_t *pp; 1117 int mode; 1118 pp = (pps_params_t *)data; 1119 if (pp->mode & ~ppscap) { 1120 error = EINVAL; 1121 break; 1122 } 1123 sc->ppsparam = *pp; 1124 /* 1125 * Compute msr masks from user-specified timestamp state. 1126 */ 1127 mode = sc->ppsparam.mode; 1128 #ifdef PPS_SYNC 1129 if (mode & PPS_HARDPPSONASSERT) { 1130 mode |= PPS_CAPTUREASSERT; 1131 /* XXX revoke any previous HARDPPS source */ 1132 } 1133 if (mode & PPS_HARDPPSONCLEAR) { 1134 mode |= PPS_CAPTURECLEAR; 1135 /* XXX revoke any previous HARDPPS source */ 1136 } 1137 #endif /* PPS_SYNC */ 1138 switch (mode & PPS_CAPTUREBOTH) { 1139 case 0: 1140 sc->sc_ppsmask = 0; 1141 break; 1142 1143 case PPS_CAPTUREASSERT: 1144 sc->sc_ppsmask = MSR_DCD; 1145 sc->sc_ppsassert = MSR_DCD; 1146 sc->sc_ppsclear = -1; 1147 break; 1148 1149 case PPS_CAPTURECLEAR: 1150 sc->sc_ppsmask = MSR_DCD; 1151 sc->sc_ppsassert = -1; 1152 sc->sc_ppsclear = 0; 1153 break; 1154 1155 case PPS_CAPTUREBOTH: 1156 sc->sc_ppsmask = MSR_DCD; 1157 sc->sc_ppsassert = MSR_DCD; 1158 sc->sc_ppsclear = 0; 1159 break; 1160 1161 default: 1162 error = EINVAL; 1163 break; 1164 } 1165 break; 1166 } 1167 1168 case PPS_IOC_GETCAP: 1169 *(int*)data = ppscap; 1170 break; 1171 1172 case PPS_IOC_FETCH: { 1173 pps_info_t *pi; 1174 pi = (pps_info_t *)data; 1175 *pi = sc->ppsinfo; 1176 break; 1177 } 1178 1179 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1180 /* 1181 * Some GPS clocks models use the falling rather than 1182 * rising edge as the on-the-second signal. 1183 * The old API has no way to specify PPS polarity. 1184 */ 1185 sc->sc_ppsmask = MSR_DCD; 1186 #ifndef PPS_TRAILING_EDGE 1187 sc->sc_ppsassert = MSR_DCD; 1188 sc->sc_ppsclear = -1; 1189 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1190 &sc->ppsinfo.assert_timestamp); 1191 #else 1192 sc->sc_ppsassert = -1 1193 sc->sc_ppsclear = 0; 1194 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1195 &sc->ppsinfo.clear_timestamp); 1196 #endif 1197 break; 1198 1199 default: 1200 error = EPASSTHROUGH; 1201 break; 1202 } 1203 1204 COM_UNLOCK(sc); 1205 splx(s); 1206 1207 #ifdef COM_DEBUG 1208 if (com_debug) 1209 comstatus(sc, "comioctl "); 1210 #endif 1211 1212 return (error); 1213 } 1214 1215 integrate void 1216 com_schedrx(struct com_softc *sc) 1217 { 1218 1219 sc->sc_rx_ready = 1; 1220 1221 /* Wake up the poller. */ 1222 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1223 softintr_schedule(sc->sc_si); 1224 #else 1225 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1226 setsoftserial(); 1227 #else 1228 if (!com_softintr_scheduled) { 1229 com_softintr_scheduled = 1; 1230 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1231 } 1232 #endif 1233 #endif 1234 } 1235 1236 void 1237 com_break(struct com_softc *sc, int onoff) 1238 { 1239 1240 if (onoff) 1241 SET(sc->sc_lcr, LCR_SBREAK); 1242 else 1243 CLR(sc->sc_lcr, LCR_SBREAK); 1244 1245 if (!sc->sc_heldchange) { 1246 if (sc->sc_tx_busy) { 1247 sc->sc_heldtbc = sc->sc_tbc; 1248 sc->sc_tbc = 0; 1249 sc->sc_heldchange = 1; 1250 } else 1251 com_loadchannelregs(sc); 1252 } 1253 } 1254 1255 void 1256 com_modem(struct com_softc *sc, int onoff) 1257 { 1258 1259 if (sc->sc_mcr_dtr == 0) 1260 return; 1261 1262 if (onoff) 1263 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1264 else 1265 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1266 1267 if (!sc->sc_heldchange) { 1268 if (sc->sc_tx_busy) { 1269 sc->sc_heldtbc = sc->sc_tbc; 1270 sc->sc_tbc = 0; 1271 sc->sc_heldchange = 1; 1272 } else 1273 com_loadchannelregs(sc); 1274 } 1275 } 1276 1277 void 1278 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1279 { 1280 u_char combits; 1281 1282 combits = 0; 1283 if (ISSET(ttybits, TIOCM_DTR)) 1284 SET(combits, MCR_DTR); 1285 if (ISSET(ttybits, TIOCM_RTS)) 1286 SET(combits, MCR_RTS); 1287 1288 switch (how) { 1289 case TIOCMBIC: 1290 CLR(sc->sc_mcr, combits); 1291 break; 1292 1293 case TIOCMBIS: 1294 SET(sc->sc_mcr, combits); 1295 break; 1296 1297 case TIOCMSET: 1298 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1299 SET(sc->sc_mcr, combits); 1300 break; 1301 } 1302 1303 if (!sc->sc_heldchange) { 1304 if (sc->sc_tx_busy) { 1305 sc->sc_heldtbc = sc->sc_tbc; 1306 sc->sc_tbc = 0; 1307 sc->sc_heldchange = 1; 1308 } else 1309 com_loadchannelregs(sc); 1310 } 1311 } 1312 1313 int 1314 com_to_tiocm(struct com_softc *sc) 1315 { 1316 u_char combits; 1317 int ttybits = 0; 1318 1319 combits = sc->sc_mcr; 1320 if (ISSET(combits, MCR_DTR)) 1321 SET(ttybits, TIOCM_DTR); 1322 if (ISSET(combits, MCR_RTS)) 1323 SET(ttybits, TIOCM_RTS); 1324 1325 combits = sc->sc_msr; 1326 if (ISSET(combits, MSR_DCD)) 1327 SET(ttybits, TIOCM_CD); 1328 if (ISSET(combits, MSR_CTS)) 1329 SET(ttybits, TIOCM_CTS); 1330 if (ISSET(combits, MSR_DSR)) 1331 SET(ttybits, TIOCM_DSR); 1332 if (ISSET(combits, MSR_RI | MSR_TERI)) 1333 SET(ttybits, TIOCM_RI); 1334 1335 #ifdef COM_PXA2X0 1336 if (sc->sc_type == COM_TYPE_PXA2x0) { 1337 if ((sc->sc_ier & 0x0f) != 0) 1338 SET(ttybits, TIOCM_LE); 1339 } else 1340 #endif 1341 if ((sc->sc_ier & 0xbf) != 0) 1342 SET(ttybits, TIOCM_LE); 1343 1344 return (ttybits); 1345 } 1346 1347 static u_char 1348 cflag2lcr(tcflag_t cflag) 1349 { 1350 u_char lcr = 0; 1351 1352 switch (ISSET(cflag, CSIZE)) { 1353 case CS5: 1354 SET(lcr, LCR_5BITS); 1355 break; 1356 case CS6: 1357 SET(lcr, LCR_6BITS); 1358 break; 1359 case CS7: 1360 SET(lcr, LCR_7BITS); 1361 break; 1362 case CS8: 1363 SET(lcr, LCR_8BITS); 1364 break; 1365 } 1366 if (ISSET(cflag, PARENB)) { 1367 SET(lcr, LCR_PENAB); 1368 if (!ISSET(cflag, PARODD)) 1369 SET(lcr, LCR_PEVEN); 1370 } 1371 if (ISSET(cflag, CSTOPB)) 1372 SET(lcr, LCR_STOPB); 1373 1374 return (lcr); 1375 } 1376 1377 int 1378 comparam(struct tty *tp, struct termios *t) 1379 { 1380 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1381 int ospeed; 1382 u_char lcr; 1383 int s; 1384 1385 if (COM_ISALIVE(sc) == 0) 1386 return (EIO); 1387 1388 #ifdef COM_HAYESP 1389 if (sc->sc_type == COM_TYPE_HAYESP) { 1390 int prescaler, speed; 1391 1392 /* 1393 * Calculate UART clock prescaler. It should be in 1394 * range of 0 .. 3. 1395 */ 1396 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1397 prescaler++, speed /= 2) 1398 if ((ospeed = comspeed(speed, sc->sc_frequency, 1399 sc->sc_type)) > 0) 1400 break; 1401 1402 if (prescaler == 4) 1403 return (EINVAL); 1404 sc->sc_prescaler = prescaler; 1405 } else 1406 #endif 1407 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1408 1409 /* Check requested parameters. */ 1410 if (ospeed < 0) 1411 return (EINVAL); 1412 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1413 return (EINVAL); 1414 1415 /* 1416 * For the console, always force CLOCAL and !HUPCL, so that the port 1417 * is always active. 1418 */ 1419 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1420 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1421 SET(t->c_cflag, CLOCAL); 1422 CLR(t->c_cflag, HUPCL); 1423 } 1424 1425 /* 1426 * If there were no changes, don't do anything. This avoids dropping 1427 * input and improves performance when all we did was frob things like 1428 * VMIN and VTIME. 1429 */ 1430 if (tp->t_ospeed == t->c_ospeed && 1431 tp->t_cflag == t->c_cflag) 1432 return (0); 1433 1434 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1435 1436 s = splserial(); 1437 COM_LOCK(sc); 1438 1439 sc->sc_lcr = lcr; 1440 1441 /* 1442 * If we're not in a mode that assumes a connection is present, then 1443 * ignore carrier changes. 1444 */ 1445 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1446 sc->sc_msr_dcd = 0; 1447 else 1448 sc->sc_msr_dcd = MSR_DCD; 1449 /* 1450 * Set the flow control pins depending on the current flow control 1451 * mode. 1452 */ 1453 if (ISSET(t->c_cflag, CRTSCTS)) { 1454 sc->sc_mcr_dtr = MCR_DTR; 1455 sc->sc_mcr_rts = MCR_RTS; 1456 sc->sc_msr_cts = MSR_CTS; 1457 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1458 } else if (ISSET(t->c_cflag, MDMBUF)) { 1459 /* 1460 * For DTR/DCD flow control, make sure we don't toggle DTR for 1461 * carrier detection. 1462 */ 1463 sc->sc_mcr_dtr = 0; 1464 sc->sc_mcr_rts = MCR_DTR; 1465 sc->sc_msr_cts = MSR_DCD; 1466 sc->sc_efr = 0; 1467 } else { 1468 /* 1469 * If no flow control, then always set RTS. This will make 1470 * the other side happy if it mistakenly thinks we're doing 1471 * RTS/CTS flow control. 1472 */ 1473 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1474 sc->sc_mcr_rts = 0; 1475 sc->sc_msr_cts = 0; 1476 sc->sc_efr = 0; 1477 if (ISSET(sc->sc_mcr, MCR_DTR)) 1478 SET(sc->sc_mcr, MCR_RTS); 1479 else 1480 CLR(sc->sc_mcr, MCR_RTS); 1481 } 1482 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1483 1484 #if 0 1485 if (ospeed == 0) 1486 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1487 else 1488 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1489 #endif 1490 1491 sc->sc_dlbl = ospeed; 1492 sc->sc_dlbh = ospeed >> 8; 1493 1494 /* 1495 * Set the FIFO threshold based on the receive speed. 1496 * 1497 * * If it's a low speed, it's probably a mouse or some other 1498 * interactive device, so set the threshold low. 1499 * * If it's a high speed, trim the trigger level down to prevent 1500 * overflows. 1501 * * Otherwise set it a bit higher. 1502 */ 1503 if (sc->sc_type == COM_TYPE_HAYESP) 1504 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1505 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1506 sc->sc_fifo = FIFO_ENABLE | 1507 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1508 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1509 else 1510 sc->sc_fifo = 0; 1511 1512 /* And copy to tty. */ 1513 tp->t_ispeed = 0; 1514 tp->t_ospeed = t->c_ospeed; 1515 tp->t_cflag = t->c_cflag; 1516 1517 if (!sc->sc_heldchange) { 1518 if (sc->sc_tx_busy) { 1519 sc->sc_heldtbc = sc->sc_tbc; 1520 sc->sc_tbc = 0; 1521 sc->sc_heldchange = 1; 1522 } else 1523 com_loadchannelregs(sc); 1524 } 1525 1526 if (!ISSET(t->c_cflag, CHWFLOW)) { 1527 /* Disable the high water mark. */ 1528 sc->sc_r_hiwat = 0; 1529 sc->sc_r_lowat = 0; 1530 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1531 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1532 com_schedrx(sc); 1533 } 1534 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1535 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1536 com_hwiflow(sc); 1537 } 1538 } else { 1539 sc->sc_r_hiwat = com_rbuf_hiwat; 1540 sc->sc_r_lowat = com_rbuf_lowat; 1541 } 1542 1543 COM_UNLOCK(sc); 1544 splx(s); 1545 1546 /* 1547 * Update the tty layer's idea of the carrier bit, in case we changed 1548 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1549 * explicit request. 1550 */ 1551 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1552 1553 #ifdef COM_DEBUG 1554 if (com_debug) 1555 comstatus(sc, "comparam "); 1556 #endif 1557 1558 if (!ISSET(t->c_cflag, CHWFLOW)) { 1559 if (sc->sc_tx_stopped) { 1560 sc->sc_tx_stopped = 0; 1561 comstart(tp); 1562 } 1563 } 1564 1565 return (0); 1566 } 1567 1568 void 1569 com_iflush(struct com_softc *sc) 1570 { 1571 bus_space_tag_t iot = sc->sc_iot; 1572 bus_space_handle_t ioh = sc->sc_ioh; 1573 #ifdef DIAGNOSTIC 1574 int reg; 1575 #endif 1576 int timo; 1577 1578 #ifdef DIAGNOSTIC 1579 reg = 0xffff; 1580 #endif 1581 timo = 50000; 1582 /* flush any pending I/O */ 1583 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1584 && --timo) 1585 #ifdef DIAGNOSTIC 1586 reg = 1587 #else 1588 (void) 1589 #endif 1590 bus_space_read_1(iot, ioh, com_data); 1591 #ifdef DIAGNOSTIC 1592 if (!timo) 1593 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1594 reg); 1595 #endif 1596 } 1597 1598 void 1599 com_loadchannelregs(struct com_softc *sc) 1600 { 1601 bus_space_tag_t iot = sc->sc_iot; 1602 bus_space_handle_t ioh = sc->sc_ioh; 1603 1604 /* XXXXX necessary? */ 1605 com_iflush(sc); 1606 1607 #ifdef COM_PXA2X0 1608 if (sc->sc_type == COM_TYPE_PXA2x0) 1609 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1610 else 1611 #endif 1612 bus_space_write_1(iot, ioh, com_ier, 0); 1613 1614 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1615 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1616 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1617 } 1618 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1619 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1620 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1621 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1622 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1623 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1624 #ifdef COM_HAYESP 1625 if (sc->sc_type == COM_TYPE_HAYESP) { 1626 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1627 HAYESP_SETPRESCALER); 1628 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1629 sc->sc_prescaler); 1630 } 1631 #endif 1632 1633 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1634 } 1635 1636 int 1637 comhwiflow(struct tty *tp, int block) 1638 { 1639 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1640 int s; 1641 1642 if (COM_ISALIVE(sc) == 0) 1643 return (0); 1644 1645 if (sc->sc_mcr_rts == 0) 1646 return (0); 1647 1648 s = splserial(); 1649 COM_LOCK(sc); 1650 1651 if (block) { 1652 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1653 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1654 com_hwiflow(sc); 1655 } 1656 } else { 1657 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1658 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1659 com_schedrx(sc); 1660 } 1661 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1662 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1663 com_hwiflow(sc); 1664 } 1665 } 1666 1667 COM_UNLOCK(sc); 1668 splx(s); 1669 return (1); 1670 } 1671 1672 /* 1673 * (un)block input via hw flowcontrol 1674 */ 1675 void 1676 com_hwiflow(struct com_softc *sc) 1677 { 1678 bus_space_tag_t iot = sc->sc_iot; 1679 bus_space_handle_t ioh = sc->sc_ioh; 1680 1681 if (sc->sc_mcr_rts == 0) 1682 return; 1683 1684 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1685 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1686 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1687 } else { 1688 SET(sc->sc_mcr, sc->sc_mcr_rts); 1689 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1690 } 1691 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1692 } 1693 1694 1695 void 1696 comstart(struct tty *tp) 1697 { 1698 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1699 bus_space_tag_t iot = sc->sc_iot; 1700 bus_space_handle_t ioh = sc->sc_ioh; 1701 int s; 1702 1703 if (COM_ISALIVE(sc) == 0) 1704 return; 1705 1706 s = spltty(); 1707 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1708 goto out; 1709 if (sc->sc_tx_stopped) 1710 goto out; 1711 1712 if (tp->t_outq.c_cc <= tp->t_lowat) { 1713 if (ISSET(tp->t_state, TS_ASLEEP)) { 1714 CLR(tp->t_state, TS_ASLEEP); 1715 wakeup(&tp->t_outq); 1716 } 1717 selwakeup(&tp->t_wsel); 1718 if (tp->t_outq.c_cc == 0) 1719 goto out; 1720 } 1721 1722 /* Grab the first contiguous region of buffer space. */ 1723 { 1724 u_char *tba; 1725 int tbc; 1726 1727 tba = tp->t_outq.c_cf; 1728 tbc = ndqb(&tp->t_outq, 0); 1729 1730 (void)splserial(); 1731 COM_LOCK(sc); 1732 1733 sc->sc_tba = tba; 1734 sc->sc_tbc = tbc; 1735 } 1736 1737 SET(tp->t_state, TS_BUSY); 1738 sc->sc_tx_busy = 1; 1739 1740 /* Enable transmit completion interrupts if necessary. */ 1741 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1742 SET(sc->sc_ier, IER_ETXRDY); 1743 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1744 } 1745 1746 /* Output the first chunk of the contiguous buffer. */ 1747 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1748 u_int n; 1749 1750 n = sc->sc_tbc; 1751 if (n > sc->sc_fifolen) 1752 n = sc->sc_fifolen; 1753 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1754 sc->sc_tbc -= n; 1755 sc->sc_tba += n; 1756 } 1757 COM_UNLOCK(sc); 1758 out: 1759 splx(s); 1760 return; 1761 } 1762 1763 /* 1764 * Stop output on a line. 1765 */ 1766 void 1767 comstop(struct tty *tp, int flag) 1768 { 1769 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1770 int s; 1771 1772 s = splserial(); 1773 COM_LOCK(sc); 1774 if (ISSET(tp->t_state, TS_BUSY)) { 1775 /* Stop transmitting at the next chunk. */ 1776 sc->sc_tbc = 0; 1777 sc->sc_heldtbc = 0; 1778 if (!ISSET(tp->t_state, TS_TTSTOP)) 1779 SET(tp->t_state, TS_FLUSH); 1780 } 1781 COM_UNLOCK(sc); 1782 splx(s); 1783 } 1784 1785 void 1786 comdiag(void *arg) 1787 { 1788 struct com_softc *sc = arg; 1789 int overflows, floods; 1790 int s; 1791 1792 s = splserial(); 1793 COM_LOCK(sc); 1794 overflows = sc->sc_overflows; 1795 sc->sc_overflows = 0; 1796 floods = sc->sc_floods; 1797 sc->sc_floods = 0; 1798 sc->sc_errors = 0; 1799 COM_UNLOCK(sc); 1800 splx(s); 1801 1802 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1803 sc->sc_dev.dv_xname, 1804 overflows, overflows == 1 ? "" : "s", 1805 floods, floods == 1 ? "" : "s"); 1806 } 1807 1808 integrate void 1809 com_rxsoft(struct com_softc *sc, struct tty *tp) 1810 { 1811 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1812 u_char *get, *end; 1813 u_int cc, scc; 1814 u_char lsr; 1815 int code; 1816 int s; 1817 1818 end = sc->sc_ebuf; 1819 get = sc->sc_rbget; 1820 scc = cc = com_rbuf_size - sc->sc_rbavail; 1821 1822 if (cc == com_rbuf_size) { 1823 sc->sc_floods++; 1824 if (sc->sc_errors++ == 0) 1825 callout_reset(&sc->sc_diag_callout, 60 * hz, 1826 comdiag, sc); 1827 } 1828 1829 /* If not yet open, drop the entire buffer content here */ 1830 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1831 get += cc << 1; 1832 if (get >= end) 1833 get -= com_rbuf_size << 1; 1834 cc = 0; 1835 } 1836 while (cc) { 1837 code = get[0]; 1838 lsr = get[1]; 1839 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1840 if (ISSET(lsr, LSR_OE)) { 1841 sc->sc_overflows++; 1842 if (sc->sc_errors++ == 0) 1843 callout_reset(&sc->sc_diag_callout, 1844 60 * hz, comdiag, sc); 1845 } 1846 if (ISSET(lsr, LSR_BI | LSR_FE)) 1847 SET(code, TTY_FE); 1848 if (ISSET(lsr, LSR_PE)) 1849 SET(code, TTY_PE); 1850 } 1851 if ((*rint)(code, tp) == -1) { 1852 /* 1853 * The line discipline's buffer is out of space. 1854 */ 1855 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1856 /* 1857 * We're either not using flow control, or the 1858 * line discipline didn't tell us to block for 1859 * some reason. Either way, we have no way to 1860 * know when there's more space available, so 1861 * just drop the rest of the data. 1862 */ 1863 get += cc << 1; 1864 if (get >= end) 1865 get -= com_rbuf_size << 1; 1866 cc = 0; 1867 } else { 1868 /* 1869 * Don't schedule any more receive processing 1870 * until the line discipline tells us there's 1871 * space available (through comhwiflow()). 1872 * Leave the rest of the data in the input 1873 * buffer. 1874 */ 1875 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1876 } 1877 break; 1878 } 1879 get += 2; 1880 if (get >= end) 1881 get = sc->sc_rbuf; 1882 cc--; 1883 } 1884 1885 if (cc != scc) { 1886 sc->sc_rbget = get; 1887 s = splserial(); 1888 COM_LOCK(sc); 1889 1890 cc = sc->sc_rbavail += scc - cc; 1891 /* Buffers should be ok again, release possible block. */ 1892 if (cc >= sc->sc_r_lowat) { 1893 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1894 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1895 SET(sc->sc_ier, IER_ERXRDY); 1896 #ifdef COM_PXA2X0 1897 if (sc->sc_type == COM_TYPE_PXA2x0) 1898 SET(sc->sc_ier, IER_ERXTOUT); 1899 #endif 1900 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1901 com_ier, sc->sc_ier); 1902 } 1903 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1904 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1905 com_hwiflow(sc); 1906 } 1907 } 1908 COM_UNLOCK(sc); 1909 splx(s); 1910 } 1911 } 1912 1913 integrate void 1914 com_txsoft(struct com_softc *sc, struct tty *tp) 1915 { 1916 1917 CLR(tp->t_state, TS_BUSY); 1918 if (ISSET(tp->t_state, TS_FLUSH)) 1919 CLR(tp->t_state, TS_FLUSH); 1920 else 1921 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1922 (*tp->t_linesw->l_start)(tp); 1923 } 1924 1925 integrate void 1926 com_stsoft(struct com_softc *sc, struct tty *tp) 1927 { 1928 u_char msr, delta; 1929 int s; 1930 1931 s = splserial(); 1932 COM_LOCK(sc); 1933 msr = sc->sc_msr; 1934 delta = sc->sc_msr_delta; 1935 sc->sc_msr_delta = 0; 1936 COM_UNLOCK(sc); 1937 splx(s); 1938 1939 if (ISSET(delta, sc->sc_msr_dcd)) { 1940 /* 1941 * Inform the tty layer that carrier detect changed. 1942 */ 1943 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1944 } 1945 1946 if (ISSET(delta, sc->sc_msr_cts)) { 1947 /* Block or unblock output according to flow control. */ 1948 if (ISSET(msr, sc->sc_msr_cts)) { 1949 sc->sc_tx_stopped = 0; 1950 (*tp->t_linesw->l_start)(tp); 1951 } else { 1952 sc->sc_tx_stopped = 1; 1953 } 1954 } 1955 1956 #ifdef COM_DEBUG 1957 if (com_debug) 1958 comstatus(sc, "com_stsoft"); 1959 #endif 1960 } 1961 1962 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1963 void 1964 comsoft(void *arg) 1965 { 1966 struct com_softc *sc = arg; 1967 struct tty *tp; 1968 1969 if (COM_ISALIVE(sc) == 0) 1970 return; 1971 1972 { 1973 #else 1974 void 1975 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1976 comsoft(void) 1977 #else 1978 comsoft(void *arg) 1979 #endif 1980 { 1981 struct com_softc *sc; 1982 struct tty *tp; 1983 int unit; 1984 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1985 int s; 1986 1987 s = splsoftserial(); 1988 com_softintr_scheduled = 0; 1989 #endif 1990 1991 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1992 sc = device_lookup(&com_cd, unit); 1993 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1994 continue; 1995 1996 if (COM_ISALIVE(sc) == 0) 1997 continue; 1998 1999 tp = sc->sc_tty; 2000 if (tp == NULL) 2001 continue; 2002 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2003 continue; 2004 #endif 2005 tp = sc->sc_tty; 2006 2007 if (sc->sc_rx_ready) { 2008 sc->sc_rx_ready = 0; 2009 com_rxsoft(sc, tp); 2010 } 2011 2012 if (sc->sc_st_check) { 2013 sc->sc_st_check = 0; 2014 com_stsoft(sc, tp); 2015 } 2016 2017 if (sc->sc_tx_done) { 2018 sc->sc_tx_done = 0; 2019 com_txsoft(sc, tp); 2020 } 2021 } 2022 2023 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2024 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2025 splx(s); 2026 #endif 2027 #endif 2028 } 2029 2030 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2031 /* there has got to be a better way to do comsoft() */ 2032 }} 2033 #endif 2034 2035 int 2036 comintr(void *arg) 2037 { 2038 struct com_softc *sc = arg; 2039 bus_space_tag_t iot = sc->sc_iot; 2040 bus_space_handle_t ioh = sc->sc_ioh; 2041 u_char *put, *end; 2042 u_int cc; 2043 u_char lsr, iir; 2044 2045 if (COM_ISALIVE(sc) == 0) 2046 return (0); 2047 2048 COM_LOCK(sc); 2049 iir = bus_space_read_1(iot, ioh, com_iir); 2050 if (ISSET(iir, IIR_NOPEND)) { 2051 COM_UNLOCK(sc); 2052 return (0); 2053 } 2054 2055 end = sc->sc_ebuf; 2056 put = sc->sc_rbput; 2057 cc = sc->sc_rbavail; 2058 2059 again: do { 2060 u_char msr, delta; 2061 2062 lsr = bus_space_read_1(iot, ioh, com_lsr); 2063 if (ISSET(lsr, LSR_BI)) { 2064 int cn_trapped = 0; 2065 2066 cn_check_magic(sc->sc_tty->t_dev, 2067 CNC_BREAK, com_cnm_state); 2068 if (cn_trapped) 2069 continue; 2070 #if defined(KGDB) && !defined(DDB) 2071 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2072 kgdb_connect(1); 2073 continue; 2074 } 2075 #endif 2076 } 2077 2078 if (ISSET(lsr, LSR_RCV_MASK) && 2079 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2080 while (cc > 0) { 2081 int cn_trapped = 0; 2082 put[0] = bus_space_read_1(iot, ioh, com_data); 2083 put[1] = lsr; 2084 cn_check_magic(sc->sc_tty->t_dev, 2085 put[0], com_cnm_state); 2086 if (cn_trapped) { 2087 lsr = bus_space_read_1(iot, ioh, com_lsr); 2088 if (!ISSET(lsr, LSR_RCV_MASK)) 2089 break; 2090 2091 continue; 2092 } 2093 put += 2; 2094 if (put >= end) 2095 put = sc->sc_rbuf; 2096 cc--; 2097 2098 lsr = bus_space_read_1(iot, ioh, com_lsr); 2099 if (!ISSET(lsr, LSR_RCV_MASK)) 2100 break; 2101 } 2102 2103 /* 2104 * Current string of incoming characters ended because 2105 * no more data was available or we ran out of space. 2106 * Schedule a receive event if any data was received. 2107 * If we're out of space, turn off receive interrupts. 2108 */ 2109 sc->sc_rbput = put; 2110 sc->sc_rbavail = cc; 2111 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2112 sc->sc_rx_ready = 1; 2113 2114 /* 2115 * See if we are in danger of overflowing a buffer. If 2116 * so, use hardware flow control to ease the pressure. 2117 */ 2118 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2119 cc < sc->sc_r_hiwat) { 2120 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2121 com_hwiflow(sc); 2122 } 2123 2124 /* 2125 * If we're out of space, disable receive interrupts 2126 * until the queue has drained a bit. 2127 */ 2128 if (!cc) { 2129 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2130 CLR(sc->sc_ier, IER_ERXRDY); 2131 #ifdef COM_PXA2X0 2132 if (sc->sc_type == COM_TYPE_PXA2x0) 2133 CLR(sc->sc_ier, IER_ERXTOUT); 2134 #endif 2135 bus_space_write_1(iot, ioh, com_ier, 2136 sc->sc_ier); 2137 } 2138 } else { 2139 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2140 #ifdef COM_PXA2X0 2141 if (sc->sc_type == COM_TYPE_PXA2x0) 2142 bus_space_write_1(iot, ioh, com_ier, 2143 IER_EUART); 2144 else 2145 #endif 2146 bus_space_write_1(iot, ioh, com_ier, 0); 2147 delay(10); 2148 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2149 continue; 2150 } 2151 } 2152 2153 msr = bus_space_read_1(iot, ioh, com_msr); 2154 delta = msr ^ sc->sc_msr; 2155 sc->sc_msr = msr; 2156 /* 2157 * Pulse-per-second (PSS) signals on edge of DCD? 2158 * Process these even if line discipline is ignoring DCD. 2159 */ 2160 if (delta & sc->sc_ppsmask) { 2161 struct timeval tv; 2162 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2163 /* XXX nanotime() */ 2164 microtime(&tv); 2165 TIMEVAL_TO_TIMESPEC(&tv, 2166 &sc->ppsinfo.assert_timestamp); 2167 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2168 timespecadd(&sc->ppsinfo.assert_timestamp, 2169 &sc->ppsparam.assert_offset, 2170 &sc->ppsinfo.assert_timestamp); 2171 } 2172 2173 #ifdef PPS_SYNC 2174 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2175 hardpps(&tv, tv.tv_usec); 2176 #endif 2177 sc->ppsinfo.assert_sequence++; 2178 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2179 2180 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2181 /* XXX nanotime() */ 2182 microtime(&tv); 2183 TIMEVAL_TO_TIMESPEC(&tv, 2184 &sc->ppsinfo.clear_timestamp); 2185 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2186 timespecadd(&sc->ppsinfo.clear_timestamp, 2187 &sc->ppsparam.clear_offset, 2188 &sc->ppsinfo.clear_timestamp); 2189 } 2190 2191 #ifdef PPS_SYNC 2192 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2193 hardpps(&tv, tv.tv_usec); 2194 #endif 2195 sc->ppsinfo.clear_sequence++; 2196 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2197 } 2198 } 2199 2200 /* 2201 * Process normal status changes 2202 */ 2203 if (ISSET(delta, sc->sc_msr_mask)) { 2204 SET(sc->sc_msr_delta, delta); 2205 2206 /* 2207 * Stop output immediately if we lose the output 2208 * flow control signal or carrier detect. 2209 */ 2210 if (ISSET(~msr, sc->sc_msr_mask)) { 2211 sc->sc_tbc = 0; 2212 sc->sc_heldtbc = 0; 2213 #ifdef COM_DEBUG 2214 if (com_debug) 2215 comstatus(sc, "comintr "); 2216 #endif 2217 } 2218 2219 sc->sc_st_check = 1; 2220 } 2221 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2222 || ((iir & IIR_IMASK) == 0)); 2223 2224 /* 2225 * Done handling any receive interrupts. See if data can be 2226 * transmitted as well. Schedule tx done event if no data left 2227 * and tty was marked busy. 2228 */ 2229 if (ISSET(lsr, LSR_TXRDY)) { 2230 /* 2231 * If we've delayed a parameter change, do it now, and restart 2232 * output. 2233 */ 2234 if (sc->sc_heldchange) { 2235 com_loadchannelregs(sc); 2236 sc->sc_heldchange = 0; 2237 sc->sc_tbc = sc->sc_heldtbc; 2238 sc->sc_heldtbc = 0; 2239 } 2240 2241 /* Output the next chunk of the contiguous buffer, if any. */ 2242 if (sc->sc_tbc > 0) { 2243 u_int n; 2244 2245 n = sc->sc_tbc; 2246 if (n > sc->sc_fifolen) 2247 n = sc->sc_fifolen; 2248 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2249 sc->sc_tbc -= n; 2250 sc->sc_tba += n; 2251 } else { 2252 /* Disable transmit completion interrupts if necessary. */ 2253 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2254 CLR(sc->sc_ier, IER_ETXRDY); 2255 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2256 } 2257 if (sc->sc_tx_busy) { 2258 sc->sc_tx_busy = 0; 2259 sc->sc_tx_done = 1; 2260 } 2261 } 2262 } 2263 2264 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2265 goto again; 2266 2267 COM_UNLOCK(sc); 2268 2269 /* Wake up the poller. */ 2270 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2271 softintr_schedule(sc->sc_si); 2272 #else 2273 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2274 setsoftserial(); 2275 #else 2276 if (!com_softintr_scheduled) { 2277 com_softintr_scheduled = 1; 2278 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2279 } 2280 #endif 2281 #endif 2282 2283 #if NRND > 0 && defined(RND_COM) 2284 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2285 #endif 2286 2287 return (1); 2288 } 2289 2290 /* 2291 * The following functions are polled getc and putc routines, shared 2292 * by the console and kgdb glue. 2293 * 2294 * The read-ahead code is so that you can detect pending in-band 2295 * cn_magic in polled mode while doing output rather than having to 2296 * wait until the kernel decides it needs input. 2297 */ 2298 2299 #define MAX_READAHEAD 20 2300 static int com_readahead[MAX_READAHEAD]; 2301 static int com_readaheadcount = 0; 2302 2303 int 2304 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2305 { 2306 int s = splserial(); 2307 u_char stat, c; 2308 2309 /* got a character from reading things earlier */ 2310 if (com_readaheadcount > 0) { 2311 int i; 2312 2313 c = com_readahead[0]; 2314 for (i = 1; i < com_readaheadcount; i++) { 2315 com_readahead[i-1] = com_readahead[i]; 2316 } 2317 com_readaheadcount--; 2318 splx(s); 2319 return (c); 2320 } 2321 2322 /* block until a character becomes available */ 2323 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2324 ; 2325 2326 c = bus_space_read_1(iot, ioh, com_data); 2327 stat = bus_space_read_1(iot, ioh, com_iir); 2328 { 2329 int cn_trapped = 0; /* unused */ 2330 #ifdef DDB 2331 extern int db_active; 2332 if (!db_active) 2333 #endif 2334 cn_check_magic(dev, c, com_cnm_state); 2335 } 2336 splx(s); 2337 return (c); 2338 } 2339 2340 void 2341 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2342 { 2343 int s = splserial(); 2344 int cin, stat, timo; 2345 2346 if (com_readaheadcount < MAX_READAHEAD 2347 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2348 int cn_trapped = 0; 2349 cin = bus_space_read_1(iot, ioh, com_data); 2350 stat = bus_space_read_1(iot, ioh, com_iir); 2351 cn_check_magic(dev, cin, com_cnm_state); 2352 com_readahead[com_readaheadcount++] = cin; 2353 } 2354 2355 /* wait for any pending transmission to finish */ 2356 timo = 150000; 2357 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2358 continue; 2359 2360 bus_space_write_1(iot, ioh, com_data, c); 2361 COM_BARRIER(iot, ioh, BR | BW); 2362 2363 /* wait for this transmission to complete */ 2364 timo = 1500000; 2365 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2366 continue; 2367 2368 splx(s); 2369 } 2370 2371 /* 2372 * Initialize UART for use as console or KGDB line. 2373 */ 2374 int 2375 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2376 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2377 { 2378 bus_space_handle_t ioh; 2379 2380 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2381 return (ENOMEM); /* ??? */ 2382 2383 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2384 bus_space_write_1(iot, ioh, com_efr, 0); 2385 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2386 rate = comspeed(rate, frequency, type); 2387 bus_space_write_1(iot, ioh, com_dlbl, rate); 2388 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2389 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2390 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2391 bus_space_write_1(iot, ioh, com_fifo, 2392 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2393 #ifdef COM_PXA2X0 2394 bus_space_write_1(iot, ioh, com_ier, 2395 type == COM_TYPE_PXA2x0 ? IER_EUART : 0); 2396 #else 2397 bus_space_write_1(iot, ioh, com_ier, 0); 2398 #endif 2399 2400 *iohp = ioh; 2401 return (0); 2402 } 2403 2404 /* 2405 * Following are all routines needed for COM to act as console 2406 */ 2407 struct consdev comcons = { 2408 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2409 NODEV, CN_NORMAL 2410 }; 2411 2412 2413 int 2414 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2415 int type, tcflag_t cflag) 2416 { 2417 int res; 2418 2419 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2420 if (res) 2421 return (res); 2422 2423 cn_tab = &comcons; 2424 cn_init_magic(&com_cnm_state); 2425 cn_set_magic("\047\001"); /* default magic is BREAK */ 2426 2427 comconstag = iot; 2428 comconsaddr = iobase; 2429 comconsrate = rate; 2430 comconscflag = cflag; 2431 2432 return (0); 2433 } 2434 2435 int 2436 comcngetc(dev_t dev) 2437 { 2438 2439 return (com_common_getc(dev, comconstag, comconsioh)); 2440 } 2441 2442 /* 2443 * Console kernel output character routine. 2444 */ 2445 void 2446 comcnputc(dev_t dev, int c) 2447 { 2448 2449 com_common_putc(dev, comconstag, comconsioh, c); 2450 } 2451 2452 void 2453 comcnpollc(dev_t dev, int on) 2454 { 2455 2456 } 2457 2458 #ifdef KGDB 2459 int 2460 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2461 int frequency, int type, tcflag_t cflag) 2462 { 2463 int res; 2464 2465 if (iot == comconstag && iobase == comconsaddr) { 2466 #if !defined(DDB) 2467 return (EBUSY); /* cannot share with console */ 2468 #else 2469 com_kgdb_ioh = comconsioh; 2470 #endif 2471 } else { 2472 2473 res = cominit(iot, iobase, rate, frequency, type, cflag, 2474 &com_kgdb_ioh); 2475 if (res) 2476 return (res); 2477 2478 /* 2479 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2480 * expects this to be initialized 2481 */ 2482 cn_init_magic(&com_cnm_state); 2483 cn_set_magic("\047\001"); 2484 } 2485 2486 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2487 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2488 2489 com_kgdb_iot = iot; 2490 com_kgdb_addr = iobase; 2491 2492 return (0); 2493 } 2494 2495 /* ARGSUSED */ 2496 int 2497 com_kgdb_getc(void *arg) 2498 { 2499 2500 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2501 } 2502 2503 /* ARGSUSED */ 2504 void 2505 com_kgdb_putc(void *arg, int c) 2506 { 2507 2508 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2509 } 2510 #endif /* KGDB */ 2511 2512 /* helper function to identify the com ports used by 2513 console or KGDB (and not yet autoconf attached) */ 2514 int 2515 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2516 { 2517 bus_space_handle_t help; 2518 2519 if (!comconsattached && 2520 iot == comconstag && iobase == comconsaddr) 2521 help = comconsioh; 2522 #ifdef KGDB 2523 else if (!com_kgdb_attached && 2524 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2525 help = com_kgdb_ioh; 2526 #endif 2527 else 2528 return (0); 2529 2530 if (ioh) 2531 *ioh = help; 2532 return (1); 2533 } 2534
Indexes created Mon Oct 20 08:09:54 GMT 2025