com.c revision 1.216.2.3
1 /* $NetBSD: com.c,v 1.216.2.3 2004/08/12 11:41:23 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.216.2.3 2004/08/12 11:41:23 skrll Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/user.h> 114 #include <sys/conf.h> 115 #include <sys/file.h> 116 #include <sys/uio.h> 117 #include <sys/kernel.h> 118 #include <sys/syslog.h> 119 #include <sys/device.h> 120 #include <sys/malloc.h> 121 #include <sys/timepps.h> 122 #include <sys/vnode.h> 123 124 #include <machine/intr.h> 125 #include <machine/bus.h> 126 127 #include <dev/ic/comreg.h> 128 #include <dev/ic/comvar.h> 129 #include <dev/ic/ns16550reg.h> 130 #include <dev/ic/st16650reg.h> 131 #ifdef COM_HAYESP 132 #include <dev/ic/hayespreg.h> 133 #endif 134 #define com_lcr com_cfcr 135 #include <dev/cons.h> 136 137 #ifdef COM_HAYESP 138 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 139 #endif 140 141 static void com_enable_debugport(struct com_softc *); 142 143 void com_config(struct com_softc *); 144 void com_shutdown(struct com_softc *); 145 int comspeed(long, long, int); 146 static u_char cflag2lcr(tcflag_t); 147 int comparam(struct tty *, struct termios *); 148 void comstart(struct tty *); 149 int comhwiflow(struct tty *, int); 150 151 void com_loadchannelregs(struct com_softc *); 152 void com_hwiflow(struct com_softc *); 153 void com_break(struct com_softc *, int); 154 void com_modem(struct com_softc *, int); 155 void tiocm_to_com(struct com_softc *, u_long, int); 156 int com_to_tiocm(struct com_softc *); 157 void com_iflush(struct com_softc *); 158 159 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 160 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 161 162 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 163 bus_space_handle_t *); 164 165 int comcngetc(dev_t); 166 void comcnputc(dev_t, int); 167 void comcnpollc(dev_t, int); 168 169 #define integrate static inline 170 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 171 void comsoft(void *); 172 #else 173 #ifndef __NO_SOFT_SERIAL_INTERRUPT 174 void comsoft(void); 175 #else 176 void comsoft(void *); 177 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 178 #endif 179 #endif 180 integrate void com_rxsoft(struct com_softc *, struct tty *); 181 integrate void com_txsoft(struct com_softc *, struct tty *); 182 integrate void com_stsoft(struct com_softc *, struct tty *); 183 integrate void com_schedrx(struct com_softc *); 184 void comdiag(void *); 185 186 extern struct cfdriver com_cd; 187 188 dev_type_open(comopen); 189 dev_type_close(comclose); 190 dev_type_read(comread); 191 dev_type_write(comwrite); 192 dev_type_ioctl(comioctl); 193 dev_type_stop(comstop); 194 dev_type_tty(comtty); 195 dev_type_poll(compoll); 196 197 const struct cdevsw com_cdevsw = { 198 comopen, comclose, comread, comwrite, comioctl, 199 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 200 }; 201 202 /* 203 * Make this an option variable one can patch. 204 * But be warned: this must be a power of 2! 205 */ 206 u_int com_rbuf_size = COM_RING_SIZE; 207 208 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 209 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 210 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 211 212 static bus_addr_t comconsaddr; 213 static bus_space_tag_t comconstag; 214 static bus_space_handle_t comconsioh; 215 static int comconsattached; 216 static int comconsrate; 217 static tcflag_t comconscflag; 218 static struct cnm_state com_cnm_state; 219 220 static int ppscap = 221 PPS_TSFMT_TSPEC | 222 PPS_CAPTUREASSERT | 223 PPS_CAPTURECLEAR | 224 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 225 226 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 227 #ifdef __NO_SOFT_SERIAL_INTERRUPT 228 volatile int com_softintr_scheduled; 229 #endif 230 #endif 231 232 #ifdef KGDB 233 #include <sys/kgdb.h> 234 235 static bus_addr_t com_kgdb_addr; 236 static bus_space_tag_t com_kgdb_iot; 237 static bus_space_handle_t com_kgdb_ioh; 238 static int com_kgdb_attached; 239 240 int com_kgdb_getc(void *); 241 void com_kgdb_putc(void *, int); 242 #endif /* KGDB */ 243 244 #define COMUNIT_MASK 0x7ffff 245 #define COMDIALOUT_MASK 0x80000 246 247 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 248 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 249 250 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 251 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 252 253 #define BR BUS_SPACE_BARRIER_READ 254 #define BW BUS_SPACE_BARRIER_WRITE 255 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 256 257 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 258 259 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 260 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 261 262 #else 263 264 #define COM_LOCK(sc) 265 #define COM_UNLOCK(sc) 266 267 #endif 268 269 /*ARGSUSED*/ 270 int 271 comspeed(long speed, long frequency, int type) 272 { 273 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 274 275 int x, err; 276 277 #if 0 278 if (speed == 0) 279 return (0); 280 #endif 281 if (speed <= 0) 282 return (-1); 283 x = divrnd(frequency / 16, speed); 284 if (x <= 0) 285 return (-1); 286 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 287 if (err < 0) 288 err = -err; 289 if (err > COM_TOLERANCE) 290 return (-1); 291 return (x); 292 293 #undef divrnd 294 } 295 296 #ifdef COM_DEBUG 297 int com_debug = 0; 298 299 void comstatus(struct com_softc *, char *); 300 void 301 comstatus(struct com_softc *sc, char *str) 302 { 303 struct tty *tp = sc->sc_tty; 304 305 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 306 sc->sc_dev.dv_xname, str, 307 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 308 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 309 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 310 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 311 sc->sc_tx_stopped ? '+' : '-'); 312 313 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 314 sc->sc_dev.dv_xname, str, 315 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 316 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 317 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 318 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 319 sc->sc_rx_flags); 320 } 321 #endif 322 323 int 324 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 325 { 326 327 /* force access to id reg */ 328 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 329 bus_space_write_1(iot, ioh, com_iir, 0); 330 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 331 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 332 return (0); 333 334 return (1); 335 } 336 337 #ifdef COM_HAYESP 338 int 339 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 340 { 341 char val, dips; 342 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 343 bus_space_tag_t iot = sc->sc_iot; 344 345 /* 346 * Hayes ESP cards have two iobases. One is for compatibility with 347 * 16550 serial chips, and at the same ISA PC base addresses. The 348 * other is for ESP-specific enhanced features, and lies at a 349 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 350 */ 351 352 /* Test for ESP signature */ 353 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 354 return (0); 355 356 /* 357 * ESP is present at ESP enhanced base address; unknown com port 358 */ 359 360 /* Get the dip-switch configurations */ 361 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 362 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 363 364 /* Determine which com port this ESP card services: bits 0,1 of */ 365 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 366 if (sc->sc_iobase != combaselist[dips & 0x03]) 367 return (0); 368 369 printf(": ESP"); 370 371 /* Check ESP Self Test bits. */ 372 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 373 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 374 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 376 if ((val & 0x70) < 0x20) { 377 printf("-old (%o)", val & 0x70); 378 /* we do not support the necessary features */ 379 return (0); 380 } 381 382 /* Check for ability to emulate 16550: bit 8 == 1 */ 383 if ((dips & 0x80) == 0) { 384 printf(" slave"); 385 /* XXX Does slave really mean no 16550 support?? */ 386 return (0); 387 } 388 389 /* 390 * If we made it this far, we are a full-featured ESP v2.0 (or 391 * better), at the correct com port address. 392 */ 393 394 sc->sc_type = COM_TYPE_HAYESP; 395 printf(", 1024 byte fifo\n"); 396 return (1); 397 } 398 #endif 399 400 static void 401 com_enable_debugport(struct com_softc *sc) 402 { 403 int s; 404 405 /* Turn on line break interrupt, set carrier. */ 406 s = splserial(); 407 COM_LOCK(sc); 408 sc->sc_ier = IER_ERXRDY; 409 #ifdef COM_PXA2X0 410 if (sc->sc_type == COM_TYPE_PXA2x0) 411 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 412 #endif 413 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 414 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 415 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 416 COM_UNLOCK(sc); 417 splx(s); 418 } 419 420 void 421 com_attach_subr(struct com_softc *sc) 422 { 423 bus_addr_t iobase = sc->sc_iobase; 424 bus_space_tag_t iot = sc->sc_iot; 425 bus_space_handle_t ioh = sc->sc_ioh; 426 struct tty *tp; 427 #ifdef COM_16650 428 u_int8_t lcr; 429 #endif 430 #ifdef COM_HAYESP 431 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 432 int *hayespp; 433 #endif 434 const char *fifo_msg = NULL; 435 436 callout_init(&sc->sc_diag_callout); 437 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 438 simple_lock_init(&sc->sc_lock); 439 #endif 440 441 /* Disable interrupts before configuring the device. */ 442 #ifdef COM_PXA2X0 443 if (sc->sc_type == COM_TYPE_PXA2x0) 444 sc->sc_ier = IER_EUART; 445 else 446 #endif 447 sc->sc_ier = 0; 448 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 449 450 if (iot == comconstag && iobase == comconsaddr) { 451 comconsattached = 1; 452 453 /* Make sure the console is always "hardwired". */ 454 delay(10000); /* wait for output to finish */ 455 SET(sc->sc_hwflags, COM_HW_CONSOLE); 456 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 457 } 458 459 #ifdef COM_HAYESP 460 sc->sc_prescaler = 0; /* set prescaler to x1. */ 461 462 /* Look for a Hayes ESP board. */ 463 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 464 bus_space_handle_t hayespioh; 465 466 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 467 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 468 continue; 469 if (comprobeHAYESP(hayespioh, sc)) { 470 sc->sc_hayespioh = hayespioh; 471 sc->sc_fifolen = 1024; 472 473 break; 474 } 475 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 476 } 477 /* No ESP; look for other things. */ 478 if (sc->sc_type != COM_TYPE_HAYESP) { 479 #endif 480 sc->sc_fifolen = 1; 481 /* look for a NS 16550AF UART with FIFOs */ 482 bus_space_write_1(iot, ioh, com_fifo, 483 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 484 delay(100); 485 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 486 == IIR_FIFO_MASK) 487 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 488 == FIFO_TRIGGER_14) { 489 SET(sc->sc_hwflags, COM_HW_FIFO); 490 491 #ifdef COM_16650 492 /* 493 * IIR changes into the EFR if LCR is set to LCR_EERS 494 * on 16650s. We also know IIR != 0 at this point. 495 * Write 0 into the EFR, and read it. If the result 496 * is 0, we have a 16650. 497 * 498 * Older 16650s were broken; the test to detect them 499 * is taken from the Linux driver. Apparently 500 * setting DLAB enable gives access to the EFR on 501 * these chips. 502 */ 503 lcr = bus_space_read_1(iot, ioh, com_lcr); 504 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 505 bus_space_write_1(iot, ioh, com_efr, 0); 506 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 507 bus_space_write_1(iot, ioh, com_lcr, 508 lcr | LCR_DLAB); 509 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 510 CLR(sc->sc_hwflags, COM_HW_FIFO); 511 sc->sc_fifolen = 0; 512 } else { 513 SET(sc->sc_hwflags, COM_HW_FLOW); 514 sc->sc_fifolen = 32; 515 } 516 } else 517 #endif 518 sc->sc_fifolen = 16; 519 520 #ifdef COM_16650 521 bus_space_write_1(iot, ioh, com_lcr, lcr); 522 if (sc->sc_fifolen == 0) 523 fifo_msg = "st16650, broken fifo"; 524 else if (sc->sc_fifolen == 32) 525 fifo_msg = "st16650a, working fifo"; 526 else 527 #endif 528 fifo_msg = "ns16550a, working fifo"; 529 } else 530 fifo_msg = "ns16550, broken fifo"; 531 else 532 fifo_msg = "ns8250 or ns16450, no fifo"; 533 bus_space_write_1(iot, ioh, com_fifo, 0); 534 /* 535 * Some chips will clear down both Tx and Rx FIFOs when zero is 536 * written to com_fifo. If this chip is the console, writing zero 537 * results in some of the chip/FIFO description being lost, so delay 538 * printing it until now. 539 */ 540 delay(10); 541 aprint_normal(": %s\n", fifo_msg); 542 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 543 sc->sc_fifolen = 1; 544 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 545 } 546 #ifdef COM_HAYESP 547 } 548 #endif 549 550 tp = ttymalloc(); 551 tp->t_oproc = comstart; 552 tp->t_param = comparam; 553 tp->t_hwiflow = comhwiflow; 554 555 sc->sc_tty = tp; 556 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 557 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 558 sc->sc_rbavail = com_rbuf_size; 559 if (sc->sc_rbuf == NULL) { 560 aprint_error("%s: unable to allocate ring buffer\n", 561 sc->sc_dev.dv_xname); 562 return; 563 } 564 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 565 566 tty_attach(tp); 567 568 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 569 SET(sc->sc_mcr, MCR_IENABLE); 570 571 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 572 int maj; 573 574 /* locate the major number */ 575 maj = cdevsw_lookup_major(&com_cdevsw); 576 577 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 578 579 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 580 } 581 582 #ifdef KGDB 583 /* 584 * Allow kgdb to "take over" this port. If this is 585 * not the console and is the kgdb device, it has 586 * exclusive use. If it's the console _and_ the 587 * kgdb device, it doesn't. 588 */ 589 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 590 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 591 com_kgdb_attached = 1; 592 593 SET(sc->sc_hwflags, COM_HW_KGDB); 594 } 595 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 596 } 597 #endif 598 599 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 600 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 601 #endif 602 603 #if NRND > 0 && defined(RND_COM) 604 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 605 RND_TYPE_TTY, 0); 606 #endif 607 608 /* if there are no enable/disable functions, assume the device 609 is always enabled */ 610 if (!sc->enable) 611 sc->enabled = 1; 612 613 com_config(sc); 614 615 SET(sc->sc_hwflags, COM_HW_DEV_OK); 616 } 617 618 void 619 com_config(struct com_softc *sc) 620 { 621 bus_space_tag_t iot = sc->sc_iot; 622 bus_space_handle_t ioh = sc->sc_ioh; 623 624 /* Disable interrupts before configuring the device. */ 625 #ifdef COM_PXA2X0 626 if (sc->sc_type == COM_TYPE_PXA2x0) 627 sc->sc_ier = IER_EUART; 628 else 629 #endif 630 sc->sc_ier = 0; 631 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 632 (void) bus_space_read_1(iot, ioh, com_iir); 633 634 #ifdef COM_HAYESP 635 /* Look for a Hayes ESP board. */ 636 if (sc->sc_type == COM_TYPE_HAYESP) { 637 sc->sc_fifolen = 1024; 638 639 /* Set 16550 compatibility mode */ 640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 641 HAYESP_SETMODE); 642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 643 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 644 HAYESP_MODE_SCALE); 645 646 /* Set RTS/CTS flow control */ 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 648 HAYESP_SETFLOWTYPE); 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 650 HAYESP_FLOW_RTS); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_FLOW_CTS); 653 654 /* Set flow control levels */ 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 656 HAYESP_SETRXFLOW); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 661 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 662 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 663 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 664 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 665 } 666 #endif 667 668 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 669 com_enable_debugport(sc); 670 } 671 672 int 673 com_detach(struct device *self, int flags) 674 { 675 struct com_softc *sc = (struct com_softc *)self; 676 int maj, mn; 677 678 /* locate the major number */ 679 maj = cdevsw_lookup_major(&com_cdevsw); 680 681 /* Nuke the vnodes for any open instances. */ 682 mn = self->dv_unit; 683 vdevgone(maj, mn, mn, VCHR); 684 685 mn |= COMDIALOUT_MASK; 686 vdevgone(maj, mn, mn, VCHR); 687 688 if (sc->sc_rbuf == NULL) { 689 /* 690 * Ring buffer allocation failed in the com_attach_subr, 691 * only the tty is allocated, and nothing else. 692 */ 693 ttyfree(sc->sc_tty); 694 return 0; 695 } 696 697 /* Free the receive buffer. */ 698 free(sc->sc_rbuf, M_DEVBUF); 699 700 /* Detach and free the tty. */ 701 tty_detach(sc->sc_tty); 702 ttyfree(sc->sc_tty); 703 704 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 705 /* Unhook the soft interrupt handler. */ 706 softintr_disestablish(sc->sc_si); 707 #endif 708 709 #if NRND > 0 && defined(RND_COM) 710 /* Unhook the entropy source. */ 711 rnd_detach_source(&sc->rnd_source); 712 #endif 713 714 return (0); 715 } 716 717 int 718 com_activate(struct device *self, enum devact act) 719 { 720 struct com_softc *sc = (struct com_softc *)self; 721 int s, rv = 0; 722 723 s = splserial(); 724 COM_LOCK(sc); 725 switch (act) { 726 case DVACT_ACTIVATE: 727 rv = EOPNOTSUPP; 728 break; 729 730 case DVACT_DEACTIVATE: 731 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 732 rv = EBUSY; 733 break; 734 } 735 736 if (sc->disable != NULL && sc->enabled != 0) { 737 (*sc->disable)(sc); 738 sc->enabled = 0; 739 } 740 break; 741 } 742 743 COM_UNLOCK(sc); 744 splx(s); 745 return (rv); 746 } 747 748 void 749 com_shutdown(struct com_softc *sc) 750 { 751 struct tty *tp = sc->sc_tty; 752 int s; 753 754 s = splserial(); 755 COM_LOCK(sc); 756 757 /* If we were asserting flow control, then deassert it. */ 758 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 759 com_hwiflow(sc); 760 761 /* Clear any break condition set with TIOCSBRK. */ 762 com_break(sc, 0); 763 764 /* Turn off PPS capture on last close. */ 765 sc->sc_ppsmask = 0; 766 sc->ppsparam.mode = 0; 767 768 /* 769 * Hang up if necessary. Wait a bit, so the other side has time to 770 * notice even if we immediately open the port again. 771 * Avoid tsleeping above splhigh(). 772 */ 773 if (ISSET(tp->t_cflag, HUPCL)) { 774 com_modem(sc, 0); 775 COM_UNLOCK(sc); 776 splx(s); 777 /* XXX tsleep will only timeout */ 778 (void) tsleep(sc, TTIPRI, ttclos, hz); 779 s = splserial(); 780 COM_LOCK(sc); 781 } 782 783 /* Turn off interrupts. */ 784 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 785 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 786 #ifdef COM_PXA2X0 787 if (sc->sc_type == COM_TYPE_PXA2x0) 788 sc->sc_ier |= IER_ERXTOUT; 789 #endif 790 } else 791 sc->sc_ier = 0; 792 793 #ifdef COM_PXA2X0 794 if (sc->sc_type == COM_TYPE_PXA2x0) 795 sc->sc_ier |= IER_EUART; 796 #endif 797 798 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 799 800 if (sc->disable) { 801 #ifdef DIAGNOSTIC 802 if (!sc->enabled) 803 panic("com_shutdown: not enabled?"); 804 #endif 805 (*sc->disable)(sc); 806 sc->enabled = 0; 807 } 808 COM_UNLOCK(sc); 809 splx(s); 810 } 811 812 int 813 comopen(dev_t dev, int flag, int mode, struct lwp *l) 814 { 815 struct com_softc *sc; 816 struct tty *tp; 817 int s, s2; 818 int error; 819 820 sc = device_lookup(&com_cd, COMUNIT(dev)); 821 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 822 sc->sc_rbuf == NULL) 823 return (ENXIO); 824 825 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 826 return (ENXIO); 827 828 #ifdef KGDB 829 /* 830 * If this is the kgdb port, no other use is permitted. 831 */ 832 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 833 return (EBUSY); 834 #endif 835 836 tp = sc->sc_tty; 837 838 if (ISSET(tp->t_state, TS_ISOPEN) && 839 ISSET(tp->t_state, TS_XCLUDE) && 840 l->l_proc->p_ucred->cr_uid != 0) 841 return (EBUSY); 842 843 s = spltty(); 844 845 /* 846 * Do the following iff this is a first open. 847 */ 848 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 849 struct termios t; 850 851 tp->t_dev = dev; 852 853 s2 = splserial(); 854 COM_LOCK(sc); 855 856 if (sc->enable) { 857 if ((*sc->enable)(sc)) { 858 COM_UNLOCK(sc); 859 splx(s2); 860 splx(s); 861 printf("%s: device enable failed\n", 862 sc->sc_dev.dv_xname); 863 return (EIO); 864 } 865 sc->enabled = 1; 866 com_config(sc); 867 } 868 869 /* Turn on interrupts. */ 870 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 871 #ifdef COM_PXA2X0 872 if (sc->sc_type == COM_TYPE_PXA2x0) 873 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 874 #endif 875 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 876 877 /* Fetch the current modem control status, needed later. */ 878 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 879 880 /* Clear PPS capture state on first open. */ 881 sc->sc_ppsmask = 0; 882 sc->ppsparam.mode = 0; 883 884 COM_UNLOCK(sc); 885 splx(s2); 886 887 /* 888 * Initialize the termios status to the defaults. Add in the 889 * sticky bits from TIOCSFLAGS. 890 */ 891 t.c_ispeed = 0; 892 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 893 t.c_ospeed = comconsrate; 894 t.c_cflag = comconscflag; 895 } else { 896 t.c_ospeed = TTYDEF_SPEED; 897 t.c_cflag = TTYDEF_CFLAG; 898 } 899 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 900 SET(t.c_cflag, CLOCAL); 901 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 902 SET(t.c_cflag, CRTSCTS); 903 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 904 SET(t.c_cflag, MDMBUF); 905 /* Make sure comparam() will do something. */ 906 tp->t_ospeed = 0; 907 (void) comparam(tp, &t); 908 tp->t_iflag = TTYDEF_IFLAG; 909 tp->t_oflag = TTYDEF_OFLAG; 910 tp->t_lflag = TTYDEF_LFLAG; 911 ttychars(tp); 912 ttsetwater(tp); 913 914 s2 = splserial(); 915 COM_LOCK(sc); 916 917 /* 918 * Turn on DTR. We must always do this, even if carrier is not 919 * present, because otherwise we'd have to use TIOCSDTR 920 * immediately after setting CLOCAL, which applications do not 921 * expect. We always assert DTR while the device is open 922 * unless explicitly requested to deassert it. 923 */ 924 com_modem(sc, 1); 925 926 /* Clear the input ring, and unblock. */ 927 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 928 sc->sc_rbavail = com_rbuf_size; 929 com_iflush(sc); 930 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 931 com_hwiflow(sc); 932 933 #ifdef COM_DEBUG 934 if (com_debug) 935 comstatus(sc, "comopen "); 936 #endif 937 938 COM_UNLOCK(sc); 939 splx(s2); 940 } 941 942 splx(s); 943 944 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 945 if (error) 946 goto bad; 947 948 error = (*tp->t_linesw->l_open)(dev, tp); 949 if (error) 950 goto bad; 951 952 return (0); 953 954 bad: 955 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 956 /* 957 * We failed to open the device, and nobody else had it opened. 958 * Clean up the state as appropriate. 959 */ 960 com_shutdown(sc); 961 } 962 963 return (error); 964 } 965 966 int 967 comclose(dev_t dev, int flag, int mode, struct lwp *l) 968 { 969 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 970 struct tty *tp = sc->sc_tty; 971 972 /* XXX This is for cons.c. */ 973 if (!ISSET(tp->t_state, TS_ISOPEN)) 974 return (0); 975 976 (*tp->t_linesw->l_close)(tp, flag); 977 ttyclose(tp); 978 979 if (COM_ISALIVE(sc) == 0) 980 return (0); 981 982 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 983 /* 984 * Although we got a last close, the device may still be in 985 * use; e.g. if this was the dialout node, and there are still 986 * processes waiting for carrier on the non-dialout node. 987 */ 988 com_shutdown(sc); 989 } 990 991 return (0); 992 } 993 994 int 995 comread(dev_t dev, struct uio *uio, int flag) 996 { 997 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 998 struct tty *tp = sc->sc_tty; 999 1000 if (COM_ISALIVE(sc) == 0) 1001 return (EIO); 1002 1003 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1004 } 1005 1006 int 1007 comwrite(dev_t dev, struct uio *uio, int flag) 1008 { 1009 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1010 struct tty *tp = sc->sc_tty; 1011 1012 if (COM_ISALIVE(sc) == 0) 1013 return (EIO); 1014 1015 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1016 } 1017 1018 int 1019 compoll(dev_t dev, int events, struct lwp *l) 1020 { 1021 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1022 struct tty *tp = sc->sc_tty; 1023 1024 if (COM_ISALIVE(sc) == 0) 1025 return (EIO); 1026 1027 return (*tp->t_linesw->l_poll)(tp, events, l); 1028 } 1029 1030 struct tty * 1031 comtty(dev_t dev) 1032 { 1033 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1034 struct tty *tp = sc->sc_tty; 1035 1036 return (tp); 1037 } 1038 1039 int 1040 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1041 { 1042 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1043 struct tty *tp = sc->sc_tty; 1044 struct proc *p = l->l_proc; 1045 int error; 1046 int s; 1047 1048 if (COM_ISALIVE(sc) == 0) 1049 return (EIO); 1050 1051 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1052 if (error != EPASSTHROUGH) 1053 return (error); 1054 1055 error = ttioctl(tp, cmd, data, flag, l); 1056 if (error != EPASSTHROUGH) 1057 return (error); 1058 1059 error = 0; 1060 1061 s = splserial(); 1062 COM_LOCK(sc); 1063 1064 switch (cmd) { 1065 case TIOCSBRK: 1066 com_break(sc, 1); 1067 break; 1068 1069 case TIOCCBRK: 1070 com_break(sc, 0); 1071 break; 1072 1073 case TIOCSDTR: 1074 com_modem(sc, 1); 1075 break; 1076 1077 case TIOCCDTR: 1078 com_modem(sc, 0); 1079 break; 1080 1081 case TIOCGFLAGS: 1082 *(int *)data = sc->sc_swflags; 1083 break; 1084 1085 case TIOCSFLAGS: 1086 error = suser(p->p_ucred, &p->p_acflag); 1087 if (error) 1088 break; 1089 sc->sc_swflags = *(int *)data; 1090 break; 1091 1092 case TIOCMSET: 1093 case TIOCMBIS: 1094 case TIOCMBIC: 1095 tiocm_to_com(sc, cmd, *(int *)data); 1096 break; 1097 1098 case TIOCMGET: 1099 *(int *)data = com_to_tiocm(sc); 1100 break; 1101 1102 case PPS_IOC_CREATE: 1103 break; 1104 1105 case PPS_IOC_DESTROY: 1106 break; 1107 1108 case PPS_IOC_GETPARAMS: { 1109 pps_params_t *pp; 1110 pp = (pps_params_t *)data; 1111 *pp = sc->ppsparam; 1112 break; 1113 } 1114 1115 case PPS_IOC_SETPARAMS: { 1116 pps_params_t *pp; 1117 int mode; 1118 pp = (pps_params_t *)data; 1119 if (pp->mode & ~ppscap) { 1120 error = EINVAL; 1121 break; 1122 } 1123 sc->ppsparam = *pp; 1124 /* 1125 * Compute msr masks from user-specified timestamp state. 1126 */ 1127 mode = sc->ppsparam.mode; 1128 switch (mode & PPS_CAPTUREBOTH) { 1129 case 0: 1130 sc->sc_ppsmask = 0; 1131 break; 1132 1133 case PPS_CAPTUREASSERT: 1134 sc->sc_ppsmask = MSR_DCD; 1135 sc->sc_ppsassert = MSR_DCD; 1136 sc->sc_ppsclear = -1; 1137 break; 1138 1139 case PPS_CAPTURECLEAR: 1140 sc->sc_ppsmask = MSR_DCD; 1141 sc->sc_ppsassert = -1; 1142 sc->sc_ppsclear = 0; 1143 break; 1144 1145 case PPS_CAPTUREBOTH: 1146 sc->sc_ppsmask = MSR_DCD; 1147 sc->sc_ppsassert = MSR_DCD; 1148 sc->sc_ppsclear = 0; 1149 break; 1150 1151 default: 1152 error = EINVAL; 1153 break; 1154 } 1155 break; 1156 } 1157 1158 case PPS_IOC_GETCAP: 1159 *(int*)data = ppscap; 1160 break; 1161 1162 case PPS_IOC_FETCH: { 1163 pps_info_t *pi; 1164 pi = (pps_info_t *)data; 1165 *pi = sc->ppsinfo; 1166 break; 1167 } 1168 1169 #ifdef PPS_SYNC 1170 case PPS_IOC_KCBIND: { 1171 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1172 1173 if (edge == 0) { 1174 /* 1175 * remove binding for this source; ignore 1176 * the request if this is not the current 1177 * hardpps source 1178 */ 1179 if (pps_kc_hardpps_source == sc) { 1180 pps_kc_hardpps_source = NULL; 1181 pps_kc_hardpps_mode = 0; 1182 } 1183 } else { 1184 /* 1185 * bind hardpps to this source, replacing any 1186 * previously specified source or edges 1187 */ 1188 pps_kc_hardpps_source = sc; 1189 pps_kc_hardpps_mode = edge; 1190 } 1191 break; 1192 } 1193 #endif /* PPS_SYNC */ 1194 1195 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1196 /* 1197 * Some GPS clocks models use the falling rather than 1198 * rising edge as the on-the-second signal. 1199 * The old API has no way to specify PPS polarity. 1200 */ 1201 sc->sc_ppsmask = MSR_DCD; 1202 #ifndef PPS_TRAILING_EDGE 1203 sc->sc_ppsassert = MSR_DCD; 1204 sc->sc_ppsclear = -1; 1205 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1206 &sc->ppsinfo.assert_timestamp); 1207 #else 1208 sc->sc_ppsassert = -1; 1209 sc->sc_ppsclear = 0; 1210 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1211 &sc->ppsinfo.clear_timestamp); 1212 #endif 1213 break; 1214 1215 default: 1216 error = EPASSTHROUGH; 1217 break; 1218 } 1219 1220 COM_UNLOCK(sc); 1221 splx(s); 1222 1223 #ifdef COM_DEBUG 1224 if (com_debug) 1225 comstatus(sc, "comioctl "); 1226 #endif 1227 1228 return (error); 1229 } 1230 1231 integrate void 1232 com_schedrx(struct com_softc *sc) 1233 { 1234 1235 sc->sc_rx_ready = 1; 1236 1237 /* Wake up the poller. */ 1238 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1239 softintr_schedule(sc->sc_si); 1240 #else 1241 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1242 setsoftserial(); 1243 #else 1244 if (!com_softintr_scheduled) { 1245 com_softintr_scheduled = 1; 1246 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1247 } 1248 #endif 1249 #endif 1250 } 1251 1252 void 1253 com_break(struct com_softc *sc, int onoff) 1254 { 1255 1256 if (onoff) 1257 SET(sc->sc_lcr, LCR_SBREAK); 1258 else 1259 CLR(sc->sc_lcr, LCR_SBREAK); 1260 1261 if (!sc->sc_heldchange) { 1262 if (sc->sc_tx_busy) { 1263 sc->sc_heldtbc = sc->sc_tbc; 1264 sc->sc_tbc = 0; 1265 sc->sc_heldchange = 1; 1266 } else 1267 com_loadchannelregs(sc); 1268 } 1269 } 1270 1271 void 1272 com_modem(struct com_softc *sc, int onoff) 1273 { 1274 1275 if (sc->sc_mcr_dtr == 0) 1276 return; 1277 1278 if (onoff) 1279 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1280 else 1281 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1282 1283 if (!sc->sc_heldchange) { 1284 if (sc->sc_tx_busy) { 1285 sc->sc_heldtbc = sc->sc_tbc; 1286 sc->sc_tbc = 0; 1287 sc->sc_heldchange = 1; 1288 } else 1289 com_loadchannelregs(sc); 1290 } 1291 } 1292 1293 void 1294 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1295 { 1296 u_char combits; 1297 1298 combits = 0; 1299 if (ISSET(ttybits, TIOCM_DTR)) 1300 SET(combits, MCR_DTR); 1301 if (ISSET(ttybits, TIOCM_RTS)) 1302 SET(combits, MCR_RTS); 1303 1304 switch (how) { 1305 case TIOCMBIC: 1306 CLR(sc->sc_mcr, combits); 1307 break; 1308 1309 case TIOCMBIS: 1310 SET(sc->sc_mcr, combits); 1311 break; 1312 1313 case TIOCMSET: 1314 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1315 SET(sc->sc_mcr, combits); 1316 break; 1317 } 1318 1319 if (!sc->sc_heldchange) { 1320 if (sc->sc_tx_busy) { 1321 sc->sc_heldtbc = sc->sc_tbc; 1322 sc->sc_tbc = 0; 1323 sc->sc_heldchange = 1; 1324 } else 1325 com_loadchannelregs(sc); 1326 } 1327 } 1328 1329 int 1330 com_to_tiocm(struct com_softc *sc) 1331 { 1332 u_char combits; 1333 int ttybits = 0; 1334 1335 combits = sc->sc_mcr; 1336 if (ISSET(combits, MCR_DTR)) 1337 SET(ttybits, TIOCM_DTR); 1338 if (ISSET(combits, MCR_RTS)) 1339 SET(ttybits, TIOCM_RTS); 1340 1341 combits = sc->sc_msr; 1342 if (ISSET(combits, MSR_DCD)) 1343 SET(ttybits, TIOCM_CD); 1344 if (ISSET(combits, MSR_CTS)) 1345 SET(ttybits, TIOCM_CTS); 1346 if (ISSET(combits, MSR_DSR)) 1347 SET(ttybits, TIOCM_DSR); 1348 if (ISSET(combits, MSR_RI | MSR_TERI)) 1349 SET(ttybits, TIOCM_RI); 1350 1351 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1352 SET(ttybits, TIOCM_LE); 1353 1354 return (ttybits); 1355 } 1356 1357 static u_char 1358 cflag2lcr(tcflag_t cflag) 1359 { 1360 u_char lcr = 0; 1361 1362 switch (ISSET(cflag, CSIZE)) { 1363 case CS5: 1364 SET(lcr, LCR_5BITS); 1365 break; 1366 case CS6: 1367 SET(lcr, LCR_6BITS); 1368 break; 1369 case CS7: 1370 SET(lcr, LCR_7BITS); 1371 break; 1372 case CS8: 1373 SET(lcr, LCR_8BITS); 1374 break; 1375 } 1376 if (ISSET(cflag, PARENB)) { 1377 SET(lcr, LCR_PENAB); 1378 if (!ISSET(cflag, PARODD)) 1379 SET(lcr, LCR_PEVEN); 1380 } 1381 if (ISSET(cflag, CSTOPB)) 1382 SET(lcr, LCR_STOPB); 1383 1384 return (lcr); 1385 } 1386 1387 int 1388 comparam(struct tty *tp, struct termios *t) 1389 { 1390 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1391 int ospeed; 1392 u_char lcr; 1393 int s; 1394 1395 if (COM_ISALIVE(sc) == 0) 1396 return (EIO); 1397 1398 #ifdef COM_HAYESP 1399 if (sc->sc_type == COM_TYPE_HAYESP) { 1400 int prescaler, speed; 1401 1402 /* 1403 * Calculate UART clock prescaler. It should be in 1404 * range of 0 .. 3. 1405 */ 1406 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1407 prescaler++, speed /= 2) 1408 if ((ospeed = comspeed(speed, sc->sc_frequency, 1409 sc->sc_type)) > 0) 1410 break; 1411 1412 if (prescaler == 4) 1413 return (EINVAL); 1414 sc->sc_prescaler = prescaler; 1415 } else 1416 #endif 1417 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1418 1419 /* Check requested parameters. */ 1420 if (ospeed < 0) 1421 return (EINVAL); 1422 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1423 return (EINVAL); 1424 1425 /* 1426 * For the console, always force CLOCAL and !HUPCL, so that the port 1427 * is always active. 1428 */ 1429 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1430 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1431 SET(t->c_cflag, CLOCAL); 1432 CLR(t->c_cflag, HUPCL); 1433 } 1434 1435 /* 1436 * If there were no changes, don't do anything. This avoids dropping 1437 * input and improves performance when all we did was frob things like 1438 * VMIN and VTIME. 1439 */ 1440 if (tp->t_ospeed == t->c_ospeed && 1441 tp->t_cflag == t->c_cflag) 1442 return (0); 1443 1444 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1445 1446 s = splserial(); 1447 COM_LOCK(sc); 1448 1449 sc->sc_lcr = lcr; 1450 1451 /* 1452 * If we're not in a mode that assumes a connection is present, then 1453 * ignore carrier changes. 1454 */ 1455 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1456 sc->sc_msr_dcd = 0; 1457 else 1458 sc->sc_msr_dcd = MSR_DCD; 1459 /* 1460 * Set the flow control pins depending on the current flow control 1461 * mode. 1462 */ 1463 if (ISSET(t->c_cflag, CRTSCTS)) { 1464 sc->sc_mcr_dtr = MCR_DTR; 1465 sc->sc_mcr_rts = MCR_RTS; 1466 sc->sc_msr_cts = MSR_CTS; 1467 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1468 } else if (ISSET(t->c_cflag, MDMBUF)) { 1469 /* 1470 * For DTR/DCD flow control, make sure we don't toggle DTR for 1471 * carrier detection. 1472 */ 1473 sc->sc_mcr_dtr = 0; 1474 sc->sc_mcr_rts = MCR_DTR; 1475 sc->sc_msr_cts = MSR_DCD; 1476 sc->sc_efr = 0; 1477 } else { 1478 /* 1479 * If no flow control, then always set RTS. This will make 1480 * the other side happy if it mistakenly thinks we're doing 1481 * RTS/CTS flow control. 1482 */ 1483 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1484 sc->sc_mcr_rts = 0; 1485 sc->sc_msr_cts = 0; 1486 sc->sc_efr = 0; 1487 if (ISSET(sc->sc_mcr, MCR_DTR)) 1488 SET(sc->sc_mcr, MCR_RTS); 1489 else 1490 CLR(sc->sc_mcr, MCR_RTS); 1491 } 1492 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1493 1494 #if 0 1495 if (ospeed == 0) 1496 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1497 else 1498 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1499 #endif 1500 1501 sc->sc_dlbl = ospeed; 1502 sc->sc_dlbh = ospeed >> 8; 1503 1504 /* 1505 * Set the FIFO threshold based on the receive speed. 1506 * 1507 * * If it's a low speed, it's probably a mouse or some other 1508 * interactive device, so set the threshold low. 1509 * * If it's a high speed, trim the trigger level down to prevent 1510 * overflows. 1511 * * Otherwise set it a bit higher. 1512 */ 1513 if (sc->sc_type == COM_TYPE_HAYESP) 1514 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1515 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1516 sc->sc_fifo = FIFO_ENABLE | 1517 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8); 1518 else 1519 sc->sc_fifo = 0; 1520 1521 /* And copy to tty. */ 1522 tp->t_ispeed = 0; 1523 tp->t_ospeed = t->c_ospeed; 1524 tp->t_cflag = t->c_cflag; 1525 1526 if (!sc->sc_heldchange) { 1527 if (sc->sc_tx_busy) { 1528 sc->sc_heldtbc = sc->sc_tbc; 1529 sc->sc_tbc = 0; 1530 sc->sc_heldchange = 1; 1531 } else 1532 com_loadchannelregs(sc); 1533 } 1534 1535 if (!ISSET(t->c_cflag, CHWFLOW)) { 1536 /* Disable the high water mark. */ 1537 sc->sc_r_hiwat = 0; 1538 sc->sc_r_lowat = 0; 1539 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1540 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1541 com_schedrx(sc); 1542 } 1543 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1544 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1545 com_hwiflow(sc); 1546 } 1547 } else { 1548 sc->sc_r_hiwat = com_rbuf_hiwat; 1549 sc->sc_r_lowat = com_rbuf_lowat; 1550 } 1551 1552 COM_UNLOCK(sc); 1553 splx(s); 1554 1555 /* 1556 * Update the tty layer's idea of the carrier bit, in case we changed 1557 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1558 * explicit request. 1559 */ 1560 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1561 1562 #ifdef COM_DEBUG 1563 if (com_debug) 1564 comstatus(sc, "comparam "); 1565 #endif 1566 1567 if (!ISSET(t->c_cflag, CHWFLOW)) { 1568 if (sc->sc_tx_stopped) { 1569 sc->sc_tx_stopped = 0; 1570 comstart(tp); 1571 } 1572 } 1573 1574 return (0); 1575 } 1576 1577 void 1578 com_iflush(struct com_softc *sc) 1579 { 1580 bus_space_tag_t iot = sc->sc_iot; 1581 bus_space_handle_t ioh = sc->sc_ioh; 1582 #ifdef DIAGNOSTIC 1583 int reg; 1584 #endif 1585 int timo; 1586 1587 #ifdef DIAGNOSTIC 1588 reg = 0xffff; 1589 #endif 1590 timo = 50000; 1591 /* flush any pending I/O */ 1592 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1593 && --timo) 1594 #ifdef DIAGNOSTIC 1595 reg = 1596 #else 1597 (void) 1598 #endif 1599 bus_space_read_1(iot, ioh, com_data); 1600 #ifdef DIAGNOSTIC 1601 if (!timo) 1602 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1603 reg); 1604 #endif 1605 } 1606 1607 void 1608 com_loadchannelregs(struct com_softc *sc) 1609 { 1610 bus_space_tag_t iot = sc->sc_iot; 1611 bus_space_handle_t ioh = sc->sc_ioh; 1612 1613 /* XXXXX necessary? */ 1614 com_iflush(sc); 1615 1616 #ifdef COM_PXA2X0 1617 if (sc->sc_type == COM_TYPE_PXA2x0) 1618 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1619 else 1620 #endif 1621 bus_space_write_1(iot, ioh, com_ier, 0); 1622 1623 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1624 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1625 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1626 } 1627 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1628 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1629 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1630 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1631 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1632 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1633 #ifdef COM_HAYESP 1634 if (sc->sc_type == COM_TYPE_HAYESP) { 1635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1636 HAYESP_SETPRESCALER); 1637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1638 sc->sc_prescaler); 1639 } 1640 #endif 1641 1642 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1643 } 1644 1645 int 1646 comhwiflow(struct tty *tp, int block) 1647 { 1648 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1649 int s; 1650 1651 if (COM_ISALIVE(sc) == 0) 1652 return (0); 1653 1654 if (sc->sc_mcr_rts == 0) 1655 return (0); 1656 1657 s = splserial(); 1658 COM_LOCK(sc); 1659 1660 if (block) { 1661 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1662 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1663 com_hwiflow(sc); 1664 } 1665 } else { 1666 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1667 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1668 com_schedrx(sc); 1669 } 1670 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1671 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1672 com_hwiflow(sc); 1673 } 1674 } 1675 1676 COM_UNLOCK(sc); 1677 splx(s); 1678 return (1); 1679 } 1680 1681 /* 1682 * (un)block input via hw flowcontrol 1683 */ 1684 void 1685 com_hwiflow(struct com_softc *sc) 1686 { 1687 bus_space_tag_t iot = sc->sc_iot; 1688 bus_space_handle_t ioh = sc->sc_ioh; 1689 1690 if (sc->sc_mcr_rts == 0) 1691 return; 1692 1693 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1694 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1695 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1696 } else { 1697 SET(sc->sc_mcr, sc->sc_mcr_rts); 1698 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1699 } 1700 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1701 } 1702 1703 1704 void 1705 comstart(struct tty *tp) 1706 { 1707 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1708 bus_space_tag_t iot = sc->sc_iot; 1709 bus_space_handle_t ioh = sc->sc_ioh; 1710 int s; 1711 1712 if (COM_ISALIVE(sc) == 0) 1713 return; 1714 1715 s = spltty(); 1716 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1717 goto out; 1718 if (sc->sc_tx_stopped) 1719 goto out; 1720 1721 if (tp->t_outq.c_cc <= tp->t_lowat) { 1722 if (ISSET(tp->t_state, TS_ASLEEP)) { 1723 CLR(tp->t_state, TS_ASLEEP); 1724 wakeup(&tp->t_outq); 1725 } 1726 selwakeup(&tp->t_wsel); 1727 if (tp->t_outq.c_cc == 0) 1728 goto out; 1729 } 1730 1731 /* Grab the first contiguous region of buffer space. */ 1732 { 1733 u_char *tba; 1734 int tbc; 1735 1736 tba = tp->t_outq.c_cf; 1737 tbc = ndqb(&tp->t_outq, 0); 1738 1739 (void)splserial(); 1740 COM_LOCK(sc); 1741 1742 sc->sc_tba = tba; 1743 sc->sc_tbc = tbc; 1744 } 1745 1746 SET(tp->t_state, TS_BUSY); 1747 sc->sc_tx_busy = 1; 1748 1749 /* Enable transmit completion interrupts if necessary. */ 1750 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1751 SET(sc->sc_ier, IER_ETXRDY); 1752 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1753 } 1754 1755 #if 0 1756 /* Output the first chunk of the contiguous buffer. */ 1757 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1758 u_int n; 1759 1760 n = sc->sc_tbc; 1761 if (n > sc->sc_fifolen) 1762 n = sc->sc_fifolen; 1763 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1764 sc->sc_tbc -= n; 1765 sc->sc_tba += n; 1766 } 1767 #endif 1768 COM_UNLOCK(sc); 1769 out: 1770 splx(s); 1771 return; 1772 } 1773 1774 /* 1775 * Stop output on a line. 1776 */ 1777 void 1778 comstop(struct tty *tp, int flag) 1779 { 1780 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1781 int s; 1782 1783 s = splserial(); 1784 COM_LOCK(sc); 1785 if (ISSET(tp->t_state, TS_BUSY)) { 1786 /* Stop transmitting at the next chunk. */ 1787 sc->sc_tbc = 0; 1788 sc->sc_heldtbc = 0; 1789 if (!ISSET(tp->t_state, TS_TTSTOP)) 1790 SET(tp->t_state, TS_FLUSH); 1791 } 1792 COM_UNLOCK(sc); 1793 splx(s); 1794 } 1795 1796 void 1797 comdiag(void *arg) 1798 { 1799 struct com_softc *sc = arg; 1800 int overflows, floods; 1801 int s; 1802 1803 s = splserial(); 1804 COM_LOCK(sc); 1805 overflows = sc->sc_overflows; 1806 sc->sc_overflows = 0; 1807 floods = sc->sc_floods; 1808 sc->sc_floods = 0; 1809 sc->sc_errors = 0; 1810 COM_UNLOCK(sc); 1811 splx(s); 1812 1813 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1814 sc->sc_dev.dv_xname, 1815 overflows, overflows == 1 ? "" : "s", 1816 floods, floods == 1 ? "" : "s"); 1817 } 1818 1819 integrate void 1820 com_rxsoft(struct com_softc *sc, struct tty *tp) 1821 { 1822 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1823 u_char *get, *end; 1824 u_int cc, scc; 1825 u_char lsr; 1826 int code; 1827 int s; 1828 1829 end = sc->sc_ebuf; 1830 get = sc->sc_rbget; 1831 scc = cc = com_rbuf_size - sc->sc_rbavail; 1832 1833 if (cc == com_rbuf_size) { 1834 sc->sc_floods++; 1835 if (sc->sc_errors++ == 0) 1836 callout_reset(&sc->sc_diag_callout, 60 * hz, 1837 comdiag, sc); 1838 } 1839 1840 /* If not yet open, drop the entire buffer content here */ 1841 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1842 get += cc << 1; 1843 if (get >= end) 1844 get -= com_rbuf_size << 1; 1845 cc = 0; 1846 } 1847 while (cc) { 1848 code = get[0]; 1849 lsr = get[1]; 1850 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1851 if (ISSET(lsr, LSR_OE)) { 1852 sc->sc_overflows++; 1853 if (sc->sc_errors++ == 0) 1854 callout_reset(&sc->sc_diag_callout, 1855 60 * hz, comdiag, sc); 1856 } 1857 if (ISSET(lsr, LSR_BI | LSR_FE)) 1858 SET(code, TTY_FE); 1859 if (ISSET(lsr, LSR_PE)) 1860 SET(code, TTY_PE); 1861 } 1862 if ((*rint)(code, tp) == -1) { 1863 /* 1864 * The line discipline's buffer is out of space. 1865 */ 1866 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1867 /* 1868 * We're either not using flow control, or the 1869 * line discipline didn't tell us to block for 1870 * some reason. Either way, we have no way to 1871 * know when there's more space available, so 1872 * just drop the rest of the data. 1873 */ 1874 get += cc << 1; 1875 if (get >= end) 1876 get -= com_rbuf_size << 1; 1877 cc = 0; 1878 } else { 1879 /* 1880 * Don't schedule any more receive processing 1881 * until the line discipline tells us there's 1882 * space available (through comhwiflow()). 1883 * Leave the rest of the data in the input 1884 * buffer. 1885 */ 1886 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1887 } 1888 break; 1889 } 1890 get += 2; 1891 if (get >= end) 1892 get = sc->sc_rbuf; 1893 cc--; 1894 } 1895 1896 if (cc != scc) { 1897 sc->sc_rbget = get; 1898 s = splserial(); 1899 COM_LOCK(sc); 1900 1901 cc = sc->sc_rbavail += scc - cc; 1902 /* Buffers should be ok again, release possible block. */ 1903 if (cc >= sc->sc_r_lowat) { 1904 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1905 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1906 SET(sc->sc_ier, IER_ERXRDY); 1907 #ifdef COM_PXA2X0 1908 if (sc->sc_type == COM_TYPE_PXA2x0) 1909 SET(sc->sc_ier, IER_ERXTOUT); 1910 #endif 1911 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1912 com_ier, sc->sc_ier); 1913 } 1914 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1915 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1916 com_hwiflow(sc); 1917 } 1918 } 1919 COM_UNLOCK(sc); 1920 splx(s); 1921 } 1922 } 1923 1924 integrate void 1925 com_txsoft(struct com_softc *sc, struct tty *tp) 1926 { 1927 1928 CLR(tp->t_state, TS_BUSY); 1929 if (ISSET(tp->t_state, TS_FLUSH)) 1930 CLR(tp->t_state, TS_FLUSH); 1931 else 1932 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1933 (*tp->t_linesw->l_start)(tp); 1934 } 1935 1936 integrate void 1937 com_stsoft(struct com_softc *sc, struct tty *tp) 1938 { 1939 u_char msr, delta; 1940 int s; 1941 1942 s = splserial(); 1943 COM_LOCK(sc); 1944 msr = sc->sc_msr; 1945 delta = sc->sc_msr_delta; 1946 sc->sc_msr_delta = 0; 1947 COM_UNLOCK(sc); 1948 splx(s); 1949 1950 if (ISSET(delta, sc->sc_msr_dcd)) { 1951 /* 1952 * Inform the tty layer that carrier detect changed. 1953 */ 1954 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1955 } 1956 1957 if (ISSET(delta, sc->sc_msr_cts)) { 1958 /* Block or unblock output according to flow control. */ 1959 if (ISSET(msr, sc->sc_msr_cts)) { 1960 sc->sc_tx_stopped = 0; 1961 (*tp->t_linesw->l_start)(tp); 1962 } else { 1963 sc->sc_tx_stopped = 1; 1964 } 1965 } 1966 1967 #ifdef COM_DEBUG 1968 if (com_debug) 1969 comstatus(sc, "com_stsoft"); 1970 #endif 1971 } 1972 1973 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1974 void 1975 comsoft(void *arg) 1976 { 1977 struct com_softc *sc = arg; 1978 struct tty *tp; 1979 1980 if (COM_ISALIVE(sc) == 0) 1981 return; 1982 1983 { 1984 #else 1985 void 1986 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1987 comsoft(void) 1988 #else 1989 comsoft(void *arg) 1990 #endif 1991 { 1992 struct com_softc *sc; 1993 struct tty *tp; 1994 int unit; 1995 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1996 int s; 1997 1998 s = splsoftserial(); 1999 com_softintr_scheduled = 0; 2000 #endif 2001 2002 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2003 sc = device_lookup(&com_cd, unit); 2004 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2005 continue; 2006 2007 if (COM_ISALIVE(sc) == 0) 2008 continue; 2009 2010 tp = sc->sc_tty; 2011 if (tp == NULL) 2012 continue; 2013 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2014 continue; 2015 #endif 2016 tp = sc->sc_tty; 2017 2018 if (sc->sc_rx_ready) { 2019 sc->sc_rx_ready = 0; 2020 com_rxsoft(sc, tp); 2021 } 2022 2023 if (sc->sc_st_check) { 2024 sc->sc_st_check = 0; 2025 com_stsoft(sc, tp); 2026 } 2027 2028 if (sc->sc_tx_done) { 2029 sc->sc_tx_done = 0; 2030 com_txsoft(sc, tp); 2031 } 2032 } 2033 2034 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2035 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2036 splx(s); 2037 #endif 2038 #endif 2039 } 2040 2041 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2042 /* there has got to be a better way to do comsoft() */ 2043 }} 2044 #endif 2045 2046 int 2047 comintr(void *arg) 2048 { 2049 struct com_softc *sc = arg; 2050 bus_space_tag_t iot = sc->sc_iot; 2051 bus_space_handle_t ioh = sc->sc_ioh; 2052 u_char *put, *end; 2053 u_int cc; 2054 u_char lsr, iir; 2055 2056 if (COM_ISALIVE(sc) == 0) 2057 return (0); 2058 2059 COM_LOCK(sc); 2060 iir = bus_space_read_1(iot, ioh, com_iir); 2061 if (ISSET(iir, IIR_NOPEND)) { 2062 COM_UNLOCK(sc); 2063 return (0); 2064 } 2065 2066 end = sc->sc_ebuf; 2067 put = sc->sc_rbput; 2068 cc = sc->sc_rbavail; 2069 2070 again: do { 2071 u_char msr, delta; 2072 2073 lsr = bus_space_read_1(iot, ioh, com_lsr); 2074 if (ISSET(lsr, LSR_BI)) { 2075 int cn_trapped = 0; 2076 2077 cn_check_magic(sc->sc_tty->t_dev, 2078 CNC_BREAK, com_cnm_state); 2079 if (cn_trapped) 2080 continue; 2081 #if defined(KGDB) && !defined(DDB) 2082 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2083 kgdb_connect(1); 2084 continue; 2085 } 2086 #endif 2087 } 2088 2089 if (ISSET(lsr, LSR_RCV_MASK) && 2090 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2091 while (cc > 0) { 2092 int cn_trapped = 0; 2093 put[0] = bus_space_read_1(iot, ioh, com_data); 2094 put[1] = lsr; 2095 cn_check_magic(sc->sc_tty->t_dev, 2096 put[0], com_cnm_state); 2097 if (cn_trapped) 2098 goto next; 2099 put += 2; 2100 if (put >= end) 2101 put = sc->sc_rbuf; 2102 cc--; 2103 next: 2104 lsr = bus_space_read_1(iot, ioh, com_lsr); 2105 if (!ISSET(lsr, LSR_RCV_MASK)) 2106 break; 2107 } 2108 2109 /* 2110 * Current string of incoming characters ended because 2111 * no more data was available or we ran out of space. 2112 * Schedule a receive event if any data was received. 2113 * If we're out of space, turn off receive interrupts. 2114 */ 2115 sc->sc_rbput = put; 2116 sc->sc_rbavail = cc; 2117 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2118 sc->sc_rx_ready = 1; 2119 2120 /* 2121 * See if we are in danger of overflowing a buffer. If 2122 * so, use hardware flow control to ease the pressure. 2123 */ 2124 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2125 cc < sc->sc_r_hiwat) { 2126 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2127 com_hwiflow(sc); 2128 } 2129 2130 /* 2131 * If we're out of space, disable receive interrupts 2132 * until the queue has drained a bit. 2133 */ 2134 if (!cc) { 2135 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2136 #ifdef COM_PXA2X0 2137 if (sc->sc_type == COM_TYPE_PXA2x0) 2138 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 2139 else 2140 #endif 2141 CLR(sc->sc_ier, IER_ERXRDY); 2142 bus_space_write_1(iot, ioh, com_ier, 2143 sc->sc_ier); 2144 } 2145 } else { 2146 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 2147 (void) bus_space_read_1(iot, ioh, com_data); 2148 continue; 2149 } 2150 } 2151 2152 msr = bus_space_read_1(iot, ioh, com_msr); 2153 delta = msr ^ sc->sc_msr; 2154 sc->sc_msr = msr; 2155 /* 2156 * Pulse-per-second (PSS) signals on edge of DCD? 2157 * Process these even if line discipline is ignoring DCD. 2158 */ 2159 if (delta & sc->sc_ppsmask) { 2160 struct timeval tv; 2161 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2162 /* XXX nanotime() */ 2163 microtime(&tv); 2164 TIMEVAL_TO_TIMESPEC(&tv, 2165 &sc->ppsinfo.assert_timestamp); 2166 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2167 timespecadd(&sc->ppsinfo.assert_timestamp, 2168 &sc->ppsparam.assert_offset, 2169 &sc->ppsinfo.assert_timestamp); 2170 } 2171 2172 #ifdef PPS_SYNC 2173 if (pps_kc_hardpps_source == sc && 2174 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2175 hardpps(&tv, tv.tv_usec); 2176 } 2177 #endif 2178 sc->ppsinfo.assert_sequence++; 2179 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2180 2181 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2182 /* XXX nanotime() */ 2183 microtime(&tv); 2184 TIMEVAL_TO_TIMESPEC(&tv, 2185 &sc->ppsinfo.clear_timestamp); 2186 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2187 timespecadd(&sc->ppsinfo.clear_timestamp, 2188 &sc->ppsparam.clear_offset, 2189 &sc->ppsinfo.clear_timestamp); 2190 } 2191 2192 #ifdef PPS_SYNC 2193 if (pps_kc_hardpps_source == sc && 2194 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2195 hardpps(&tv, tv.tv_usec); 2196 } 2197 #endif 2198 sc->ppsinfo.clear_sequence++; 2199 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2200 } 2201 } 2202 2203 /* 2204 * Process normal status changes 2205 */ 2206 if (ISSET(delta, sc->sc_msr_mask)) { 2207 SET(sc->sc_msr_delta, delta); 2208 2209 /* 2210 * Stop output immediately if we lose the output 2211 * flow control signal or carrier detect. 2212 */ 2213 if (ISSET(~msr, sc->sc_msr_mask)) { 2214 sc->sc_tbc = 0; 2215 sc->sc_heldtbc = 0; 2216 #ifdef COM_DEBUG 2217 if (com_debug) 2218 comstatus(sc, "comintr "); 2219 #endif 2220 } 2221 2222 sc->sc_st_check = 1; 2223 } 2224 } while (!ISSET((iir = 2225 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2226 /* 2227 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2228 * by IIR read, so we can't do this way: `process all interrupts, 2229 * then do TX if possble'. 2230 */ 2231 (iir & IIR_IMASK) != IIR_TXRDY); 2232 2233 /* 2234 * Read LSR again, since there may be an interrupt between 2235 * the last LSR read and IIR read above. 2236 */ 2237 lsr = bus_space_read_1(iot, ioh, com_lsr); 2238 2239 /* 2240 * See if data can be transmitted as well. 2241 * Schedule tx done event if no data left 2242 * and tty was marked busy. 2243 */ 2244 if (ISSET(lsr, LSR_TXRDY)) { 2245 /* 2246 * If we've delayed a parameter change, do it now, and restart 2247 * output. 2248 */ 2249 if (sc->sc_heldchange) { 2250 com_loadchannelregs(sc); 2251 sc->sc_heldchange = 0; 2252 sc->sc_tbc = sc->sc_heldtbc; 2253 sc->sc_heldtbc = 0; 2254 } 2255 2256 /* Output the next chunk of the contiguous buffer, if any. */ 2257 if (sc->sc_tbc > 0) { 2258 u_int n; 2259 2260 n = sc->sc_tbc; 2261 if (n > sc->sc_fifolen) 2262 n = sc->sc_fifolen; 2263 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2264 sc->sc_tbc -= n; 2265 sc->sc_tba += n; 2266 } else { 2267 /* Disable transmit completion interrupts if necessary. */ 2268 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2269 CLR(sc->sc_ier, IER_ETXRDY); 2270 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2271 } 2272 if (sc->sc_tx_busy) { 2273 sc->sc_tx_busy = 0; 2274 sc->sc_tx_done = 1; 2275 } 2276 } 2277 } 2278 2279 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2280 goto again; 2281 2282 COM_UNLOCK(sc); 2283 2284 /* Wake up the poller. */ 2285 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2286 softintr_schedule(sc->sc_si); 2287 #else 2288 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2289 setsoftserial(); 2290 #else 2291 if (!com_softintr_scheduled) { 2292 com_softintr_scheduled = 1; 2293 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2294 } 2295 #endif 2296 #endif 2297 2298 #if NRND > 0 && defined(RND_COM) 2299 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2300 #endif 2301 2302 return (1); 2303 } 2304 2305 /* 2306 * The following functions are polled getc and putc routines, shared 2307 * by the console and kgdb glue. 2308 * 2309 * The read-ahead code is so that you can detect pending in-band 2310 * cn_magic in polled mode while doing output rather than having to 2311 * wait until the kernel decides it needs input. 2312 */ 2313 2314 #define MAX_READAHEAD 20 2315 static int com_readahead[MAX_READAHEAD]; 2316 static int com_readaheadcount = 0; 2317 2318 int 2319 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2320 { 2321 int s = splserial(); 2322 u_char stat, c; 2323 2324 /* got a character from reading things earlier */ 2325 if (com_readaheadcount > 0) { 2326 int i; 2327 2328 c = com_readahead[0]; 2329 for (i = 1; i < com_readaheadcount; i++) { 2330 com_readahead[i-1] = com_readahead[i]; 2331 } 2332 com_readaheadcount--; 2333 splx(s); 2334 return (c); 2335 } 2336 2337 /* block until a character becomes available */ 2338 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2339 ; 2340 2341 c = bus_space_read_1(iot, ioh, com_data); 2342 stat = bus_space_read_1(iot, ioh, com_iir); 2343 { 2344 int cn_trapped = 0; /* unused */ 2345 #ifdef DDB 2346 extern int db_active; 2347 if (!db_active) 2348 #endif 2349 cn_check_magic(dev, c, com_cnm_state); 2350 } 2351 splx(s); 2352 return (c); 2353 } 2354 2355 void 2356 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2357 { 2358 int s = splserial(); 2359 int cin, stat, timo; 2360 2361 if (com_readaheadcount < MAX_READAHEAD 2362 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2363 int cn_trapped = 0; 2364 cin = bus_space_read_1(iot, ioh, com_data); 2365 stat = bus_space_read_1(iot, ioh, com_iir); 2366 cn_check_magic(dev, cin, com_cnm_state); 2367 com_readahead[com_readaheadcount++] = cin; 2368 } 2369 2370 /* wait for any pending transmission to finish */ 2371 timo = 150000; 2372 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2373 continue; 2374 2375 bus_space_write_1(iot, ioh, com_data, c); 2376 COM_BARRIER(iot, ioh, BR | BW); 2377 2378 splx(s); 2379 } 2380 2381 /* 2382 * Initialize UART for use as console or KGDB line. 2383 */ 2384 int 2385 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2386 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2387 { 2388 bus_space_handle_t ioh; 2389 2390 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2391 return (ENOMEM); /* ??? */ 2392 2393 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2394 bus_space_write_1(iot, ioh, com_efr, 0); 2395 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2396 rate = comspeed(rate, frequency, type); 2397 bus_space_write_1(iot, ioh, com_dlbl, rate); 2398 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2399 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2400 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2401 bus_space_write_1(iot, ioh, com_fifo, 2402 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2403 #ifdef COM_PXA2X0 2404 if (type == COM_TYPE_PXA2x0) 2405 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2406 else 2407 #endif 2408 bus_space_write_1(iot, ioh, com_ier, 0); 2409 2410 *iohp = ioh; 2411 return (0); 2412 } 2413 2414 /* 2415 * Following are all routines needed for COM to act as console 2416 */ 2417 struct consdev comcons = { 2418 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2419 NODEV, CN_NORMAL 2420 }; 2421 2422 2423 int 2424 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2425 int type, tcflag_t cflag) 2426 { 2427 int res; 2428 2429 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2430 if (res) 2431 return (res); 2432 2433 cn_tab = &comcons; 2434 cn_init_magic(&com_cnm_state); 2435 cn_set_magic("\047\001"); /* default magic is BREAK */ 2436 2437 comconstag = iot; 2438 comconsaddr = iobase; 2439 comconsrate = rate; 2440 comconscflag = cflag; 2441 2442 return (0); 2443 } 2444 2445 int 2446 comcngetc(dev_t dev) 2447 { 2448 2449 return (com_common_getc(dev, comconstag, comconsioh)); 2450 } 2451 2452 /* 2453 * Console kernel output character routine. 2454 */ 2455 void 2456 comcnputc(dev_t dev, int c) 2457 { 2458 2459 com_common_putc(dev, comconstag, comconsioh, c); 2460 } 2461 2462 void 2463 comcnpollc(dev_t dev, int on) 2464 { 2465 2466 } 2467 2468 #ifdef KGDB 2469 int 2470 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2471 int frequency, int type, tcflag_t cflag) 2472 { 2473 int res; 2474 2475 if (iot == comconstag && iobase == comconsaddr) { 2476 #if !defined(DDB) 2477 return (EBUSY); /* cannot share with console */ 2478 #else 2479 com_kgdb_ioh = comconsioh; 2480 #endif 2481 } else { 2482 res = cominit(iot, iobase, rate, frequency, type, cflag, 2483 &com_kgdb_ioh); 2484 if (res) 2485 return (res); 2486 2487 /* 2488 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2489 * expects this to be initialized 2490 */ 2491 cn_init_magic(&com_cnm_state); 2492 cn_set_magic("\047\001"); 2493 } 2494 2495 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2496 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2497 2498 com_kgdb_iot = iot; 2499 com_kgdb_addr = iobase; 2500 2501 return (0); 2502 } 2503 2504 /* ARGSUSED */ 2505 int 2506 com_kgdb_getc(void *arg) 2507 { 2508 2509 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2510 } 2511 2512 /* ARGSUSED */ 2513 void 2514 com_kgdb_putc(void *arg, int c) 2515 { 2516 2517 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2518 } 2519 #endif /* KGDB */ 2520 2521 /* helper function to identify the com ports used by 2522 console or KGDB (and not yet autoconf attached) */ 2523 int 2524 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2525 { 2526 bus_space_handle_t help; 2527 2528 if (!comconsattached && 2529 iot == comconstag && iobase == comconsaddr) 2530 help = comconsioh; 2531 #ifdef KGDB 2532 else if (!com_kgdb_attached && 2533 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2534 help = com_kgdb_ioh; 2535 #endif 2536 else 2537 return (0); 2538 2539 if (ioh) 2540 *ioh = help; 2541 return (1); 2542 } 2543
Indexes created Mon Oct 20 20:10:13 GMT 2025