com.c revision 1.221
1 /* $NetBSD: com.c,v 1.221 2003/11/06 23:02:27 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.221 2003/11/06 23:02:27 simonb Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 84 #include "rnd.h" 85 #if NRND > 0 && defined(RND_COM) 86 #include <sys/rnd.h> 87 #endif 88 89 /* 90 * Override cnmagic(9) macro before including <sys/systm.h>. 91 * We need to know if cn_check_magic triggered debugger, so set a flag. 92 * Callers of cn_check_magic must declare int cn_trapped = 0; 93 * XXX: this is *ugly*! 94 */ 95 #define cn_trap() \ 96 do { \ 97 console_debugger(); \ 98 cn_trapped = 1; \ 99 } while (/* CONSTCOND */ 0) 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/ioctl.h> 104 #include <sys/select.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/device.h> 114 #include <sys/malloc.h> 115 #include <sys/timepps.h> 116 #include <sys/vnode.h> 117 118 #include <machine/intr.h> 119 #include <machine/bus.h> 120 121 #include <dev/ic/comreg.h> 122 #include <dev/ic/comvar.h> 123 #include <dev/ic/ns16550reg.h> 124 #include <dev/ic/st16650reg.h> 125 #ifdef COM_HAYESP 126 #include <dev/ic/hayespreg.h> 127 #endif 128 #define com_lcr com_cfcr 129 #include <dev/cons.h> 130 131 #ifdef COM_HAYESP 132 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 133 #endif 134 135 static void com_enable_debugport(struct com_softc *); 136 137 void com_config(struct com_softc *); 138 void com_shutdown(struct com_softc *); 139 int comspeed(long, long, int); 140 static u_char cflag2lcr(tcflag_t); 141 int comparam(struct tty *, struct termios *); 142 void comstart(struct tty *); 143 int comhwiflow(struct tty *, int); 144 145 void com_loadchannelregs(struct com_softc *); 146 void com_hwiflow(struct com_softc *); 147 void com_break(struct com_softc *, int); 148 void com_modem(struct com_softc *, int); 149 void tiocm_to_com(struct com_softc *, u_long, int); 150 int com_to_tiocm(struct com_softc *); 151 void com_iflush(struct com_softc *); 152 153 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 154 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 155 156 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 157 bus_space_handle_t *); 158 159 int comcngetc(dev_t); 160 void comcnputc(dev_t, int); 161 void comcnpollc(dev_t, int); 162 163 #define integrate static inline 164 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 165 void comsoft(void *); 166 #else 167 #ifndef __NO_SOFT_SERIAL_INTERRUPT 168 void comsoft(void); 169 #else 170 void comsoft(void *); 171 struct callout comsoft_callout = CALLOUT_INITIALIZER; 172 #endif 173 #endif 174 integrate void com_rxsoft(struct com_softc *, struct tty *); 175 integrate void com_txsoft(struct com_softc *, struct tty *); 176 integrate void com_stsoft(struct com_softc *, struct tty *); 177 integrate void com_schedrx(struct com_softc *); 178 void comdiag(void *); 179 180 extern struct cfdriver com_cd; 181 182 dev_type_open(comopen); 183 dev_type_close(comclose); 184 dev_type_read(comread); 185 dev_type_write(comwrite); 186 dev_type_ioctl(comioctl); 187 dev_type_stop(comstop); 188 dev_type_tty(comtty); 189 dev_type_poll(compoll); 190 191 const struct cdevsw com_cdevsw = { 192 comopen, comclose, comread, comwrite, comioctl, 193 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 194 }; 195 196 /* 197 * Make this an option variable one can patch. 198 * But be warned: this must be a power of 2! 199 */ 200 u_int com_rbuf_size = COM_RING_SIZE; 201 202 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 203 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 204 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 205 206 static bus_addr_t comconsaddr; 207 static bus_space_tag_t comconstag; 208 static bus_space_handle_t comconsioh; 209 static int comconsattached; 210 static int comconsrate; 211 static tcflag_t comconscflag; 212 static struct cnm_state com_cnm_state; 213 214 static int ppscap = 215 PPS_TSFMT_TSPEC | 216 PPS_CAPTUREASSERT | 217 PPS_CAPTURECLEAR | 218 #ifdef PPS_SYNC 219 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 220 #endif /* PPS_SYNC */ 221 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 222 223 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 224 #ifdef __NO_SOFT_SERIAL_INTERRUPT 225 volatile int com_softintr_scheduled; 226 #endif 227 #endif 228 229 #ifdef KGDB 230 #include <sys/kgdb.h> 231 232 static bus_addr_t com_kgdb_addr; 233 static bus_space_tag_t com_kgdb_iot; 234 static bus_space_handle_t com_kgdb_ioh; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #define COMUNIT_MASK 0x7ffff 242 #define COMDIALOUT_MASK 0x80000 243 244 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 245 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 246 247 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 248 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 249 250 #define BR BUS_SPACE_BARRIER_READ 251 #define BW BUS_SPACE_BARRIER_WRITE 252 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 253 254 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 255 256 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 257 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 258 259 #else 260 261 #define COM_LOCK(sc) 262 #define COM_UNLOCK(sc) 263 264 #endif 265 266 /*ARGSUSED*/ 267 int 268 comspeed(long speed, long frequency, int type) 269 { 270 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 271 272 int x, err; 273 274 #if 0 275 if (speed == 0) 276 return (0); 277 #endif 278 if (speed <= 0) 279 return (-1); 280 x = divrnd(frequency / 16, speed); 281 if (x <= 0) 282 return (-1); 283 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 284 if (err < 0) 285 err = -err; 286 if (err > COM_TOLERANCE) 287 return (-1); 288 return (x); 289 290 #undef divrnd 291 } 292 293 #ifdef COM_DEBUG 294 int com_debug = 0; 295 296 void comstatus(struct com_softc *, char *); 297 void 298 comstatus(struct com_softc *sc, char *str) 299 { 300 struct tty *tp = sc->sc_tty; 301 302 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 303 sc->sc_dev.dv_xname, str, 304 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 305 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 306 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 307 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 308 sc->sc_tx_stopped ? '+' : '-'); 309 310 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 311 sc->sc_dev.dv_xname, str, 312 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 313 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 314 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 315 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 316 sc->sc_rx_flags); 317 } 318 #endif 319 320 int 321 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 322 { 323 324 /* force access to id reg */ 325 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 326 bus_space_write_1(iot, ioh, com_iir, 0); 327 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 328 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 329 return (0); 330 331 return (1); 332 } 333 334 #ifdef COM_HAYESP 335 int 336 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 337 { 338 char val, dips; 339 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 340 bus_space_tag_t iot = sc->sc_iot; 341 342 /* 343 * Hayes ESP cards have two iobases. One is for compatibility with 344 * 16550 serial chips, and at the same ISA PC base addresses. The 345 * other is for ESP-specific enhanced features, and lies at a 346 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 347 */ 348 349 /* Test for ESP signature */ 350 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 351 return (0); 352 353 /* 354 * ESP is present at ESP enhanced base address; unknown com port 355 */ 356 357 /* Get the dip-switch configurations */ 358 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 359 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 360 361 /* Determine which com port this ESP card services: bits 0,1 of */ 362 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 363 if (sc->sc_iobase != combaselist[dips & 0x03]) 364 return (0); 365 366 printf(": ESP"); 367 368 /* Check ESP Self Test bits. */ 369 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 370 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 371 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 372 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 373 if ((val & 0x70) < 0x20) { 374 printf("-old (%o)", val & 0x70); 375 /* we do not support the necessary features */ 376 return (0); 377 } 378 379 /* Check for ability to emulate 16550: bit 8 == 1 */ 380 if ((dips & 0x80) == 0) { 381 printf(" slave"); 382 /* XXX Does slave really mean no 16550 support?? */ 383 return (0); 384 } 385 386 /* 387 * If we made it this far, we are a full-featured ESP v2.0 (or 388 * better), at the correct com port address. 389 */ 390 391 sc->sc_type = COM_TYPE_HAYESP; 392 printf(", 1024 byte fifo\n"); 393 return (1); 394 } 395 #endif 396 397 static void 398 com_enable_debugport(struct com_softc *sc) 399 { 400 int s; 401 402 /* Turn on line break interrupt, set carrier. */ 403 s = splserial(); 404 COM_LOCK(sc); 405 sc->sc_ier = IER_ERXRDY; 406 #ifdef COM_PXA2X0 407 if (sc->sc_type == COM_TYPE_PXA2x0) 408 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 409 #endif 410 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 411 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 412 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 413 COM_UNLOCK(sc); 414 splx(s); 415 } 416 417 void 418 com_attach_subr(struct com_softc *sc) 419 { 420 bus_addr_t iobase = sc->sc_iobase; 421 bus_space_tag_t iot = sc->sc_iot; 422 bus_space_handle_t ioh = sc->sc_ioh; 423 struct tty *tp; 424 #ifdef COM16650 425 u_int8_t lcr; 426 #endif 427 #ifdef COM_HAYESP 428 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 429 int *hayespp; 430 #endif 431 const char *fifo_msg = NULL; 432 433 callout_init(&sc->sc_diag_callout); 434 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 435 simple_lock_init(&sc->sc_lock); 436 #endif 437 438 /* Disable interrupts before configuring the device. */ 439 #ifdef COM_PXA2X0 440 if (sc->sc_type == COM_TYPE_PXA2x0) 441 sc->sc_ier = IER_EUART; 442 else 443 #endif 444 sc->sc_ier = 0; 445 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 446 447 if (iot == comconstag && iobase == comconsaddr) { 448 comconsattached = 1; 449 450 /* Make sure the console is always "hardwired". */ 451 delay(1000); /* wait for output to finish */ 452 SET(sc->sc_hwflags, COM_HW_CONSOLE); 453 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 454 } 455 456 #ifdef COM_HAYESP 457 sc->sc_prescaler = 0; /* set prescaler to x1. */ 458 459 /* Look for a Hayes ESP board. */ 460 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 461 bus_space_handle_t hayespioh; 462 463 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 464 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 465 continue; 466 if (comprobeHAYESP(hayespioh, sc)) { 467 sc->sc_hayespioh = hayespioh; 468 sc->sc_fifolen = 1024; 469 470 break; 471 } 472 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 473 } 474 /* No ESP; look for other things. */ 475 if (sc->sc_type != COM_TYPE_HAYESP) { 476 #endif 477 sc->sc_fifolen = 1; 478 /* look for a NS 16550AF UART with FIFOs */ 479 bus_space_write_1(iot, ioh, com_fifo, 480 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 481 delay(100); 482 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 483 == IIR_FIFO_MASK) 484 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 485 == FIFO_TRIGGER_14) { 486 SET(sc->sc_hwflags, COM_HW_FIFO); 487 488 #ifdef COM16650 489 /* 490 * IIR changes into the EFR if LCR is set to LCR_EERS 491 * on 16650s. We also know IIR != 0 at this point. 492 * Write 0 into the EFR, and read it. If the result 493 * is 0, we have a 16650. 494 * 495 * Older 16650s were broken; the test to detect them 496 * is taken from the Linux driver. Apparently 497 * setting DLAB enable gives access to the EFR on 498 * these chips. 499 */ 500 lcr = bus_space_read_1(iot, ioh, com_lcr); 501 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 502 bus_space_write_1(iot, ioh, com_efr, 0); 503 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 504 bus_space_write_1(iot, ioh, com_lcr, 505 lcr | LCR_DLAB); 506 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 507 CLR(sc->sc_hwflags, COM_HW_FIFO); 508 sc->sc_fifolen = 0; 509 } else { 510 SET(sc->sc_hwflags, COM_HW_FLOW); 511 sc->sc_fifolen = 32; 512 } 513 } else 514 #endif 515 sc->sc_fifolen = 16; 516 517 #ifdef COM16650 518 bus_space_write_1(iot, ioh, com_lcr, lcr); 519 if (sc->sc_fifolen == 0) 520 fifo_msg = "st16650, broken fifo"; 521 else if (sc->sc_fifolen == 32) 522 fifo_msg = "st16650a, working fifo"; 523 else 524 #endif 525 fifo_msg = "ns16550a, working fifo"; 526 } else 527 fifo_msg = "ns16550, broken fifo"; 528 else 529 fifo_msg = "ns8250 or ns16450, no fifo"; 530 bus_space_write_1(iot, ioh, com_fifo, 0); 531 /* 532 * Some chips will clear down both Tx and Rx FIFOs when zero is 533 * written to com_fifo. If this chip is the console, writing zero 534 * results in some of the chip/FIFO description being lost, so delay 535 * printing it until now. 536 */ 537 delay(10); 538 aprint_normal(": %s\n", fifo_msg); 539 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 540 sc->sc_fifolen = 1; 541 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 542 } 543 #ifdef COM_HAYESP 544 } 545 #endif 546 547 tp = ttymalloc(); 548 tp->t_oproc = comstart; 549 tp->t_param = comparam; 550 tp->t_hwiflow = comhwiflow; 551 552 sc->sc_tty = tp; 553 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 554 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 555 sc->sc_rbavail = com_rbuf_size; 556 if (sc->sc_rbuf == NULL) { 557 aprint_error("%s: unable to allocate ring buffer\n", 558 sc->sc_dev.dv_xname); 559 return; 560 } 561 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 562 563 tty_attach(tp); 564 565 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 566 SET(sc->sc_mcr, MCR_IENABLE); 567 568 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 569 int maj; 570 571 /* locate the major number */ 572 maj = cdevsw_lookup_major(&com_cdevsw); 573 574 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 575 576 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 577 } 578 579 #ifdef KGDB 580 /* 581 * Allow kgdb to "take over" this port. If this is 582 * not the console and is the kgdb device, it has 583 * exclusive use. If it's the console _and_ the 584 * kgdb device, it doesn't. 585 */ 586 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 587 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 588 com_kgdb_attached = 1; 589 590 SET(sc->sc_hwflags, COM_HW_KGDB); 591 } 592 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 593 } 594 #endif 595 596 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 597 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 598 #endif 599 600 #if NRND > 0 && defined(RND_COM) 601 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 602 RND_TYPE_TTY, 0); 603 #endif 604 605 /* if there are no enable/disable functions, assume the device 606 is always enabled */ 607 if (!sc->enable) 608 sc->enabled = 1; 609 610 com_config(sc); 611 612 SET(sc->sc_hwflags, COM_HW_DEV_OK); 613 } 614 615 void 616 com_config(struct com_softc *sc) 617 { 618 bus_space_tag_t iot = sc->sc_iot; 619 bus_space_handle_t ioh = sc->sc_ioh; 620 621 /* Disable interrupts before configuring the device. */ 622 #ifdef COM_PXA2X0 623 if (sc->sc_type == COM_TYPE_PXA2x0) 624 sc->sc_ier = IER_EUART; 625 else 626 #endif 627 sc->sc_ier = 0; 628 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 629 630 #ifdef COM_HAYESP 631 /* Look for a Hayes ESP board. */ 632 if (sc->sc_type == COM_TYPE_HAYESP) { 633 sc->sc_fifolen = 1024; 634 635 /* Set 16550 compatibility mode */ 636 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 637 HAYESP_SETMODE); 638 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 639 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 640 HAYESP_MODE_SCALE); 641 642 /* Set RTS/CTS flow control */ 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 644 HAYESP_SETFLOWTYPE); 645 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 646 HAYESP_FLOW_RTS); 647 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 648 HAYESP_FLOW_CTS); 649 650 /* Set flow control levels */ 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 652 HAYESP_SETRXFLOW); 653 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 654 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 656 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 659 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 660 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 661 } 662 #endif 663 664 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 665 com_enable_debugport(sc); 666 } 667 668 int 669 com_detach(struct device *self, int flags) 670 { 671 struct com_softc *sc = (struct com_softc *)self; 672 int maj, mn; 673 674 /* locate the major number */ 675 maj = cdevsw_lookup_major(&com_cdevsw); 676 677 /* Nuke the vnodes for any open instances. */ 678 mn = self->dv_unit; 679 vdevgone(maj, mn, mn, VCHR); 680 681 mn |= COMDIALOUT_MASK; 682 vdevgone(maj, mn, mn, VCHR); 683 684 if (sc->sc_rbuf == NULL) { 685 /* 686 * Ring buffer allocation failed in the com_attach_subr, 687 * only the tty is allocated, and nothing else. 688 */ 689 ttyfree(sc->sc_tty); 690 return 0; 691 } 692 693 /* Free the receive buffer. */ 694 free(sc->sc_rbuf, M_DEVBUF); 695 696 /* Detach and free the tty. */ 697 tty_detach(sc->sc_tty); 698 ttyfree(sc->sc_tty); 699 700 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 701 /* Unhook the soft interrupt handler. */ 702 softintr_disestablish(sc->sc_si); 703 #endif 704 705 #if NRND > 0 && defined(RND_COM) 706 /* Unhook the entropy source. */ 707 rnd_detach_source(&sc->rnd_source); 708 #endif 709 710 return (0); 711 } 712 713 int 714 com_activate(struct device *self, enum devact act) 715 { 716 struct com_softc *sc = (struct com_softc *)self; 717 int s, rv = 0; 718 719 s = splserial(); 720 COM_LOCK(sc); 721 switch (act) { 722 case DVACT_ACTIVATE: 723 rv = EOPNOTSUPP; 724 break; 725 726 case DVACT_DEACTIVATE: 727 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 728 rv = EBUSY; 729 break; 730 } 731 732 if (sc->disable != NULL && sc->enabled != 0) { 733 (*sc->disable)(sc); 734 sc->enabled = 0; 735 } 736 break; 737 } 738 739 COM_UNLOCK(sc); 740 splx(s); 741 return (rv); 742 } 743 744 void 745 com_shutdown(struct com_softc *sc) 746 { 747 struct tty *tp = sc->sc_tty; 748 int s; 749 750 s = splserial(); 751 COM_LOCK(sc); 752 753 /* If we were asserting flow control, then deassert it. */ 754 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 755 com_hwiflow(sc); 756 757 /* Clear any break condition set with TIOCSBRK. */ 758 com_break(sc, 0); 759 760 /* Turn off PPS capture on last close. */ 761 sc->sc_ppsmask = 0; 762 sc->ppsparam.mode = 0; 763 764 /* 765 * Hang up if necessary. Wait a bit, so the other side has time to 766 * notice even if we immediately open the port again. 767 * Avoid tsleeping above splhigh(). 768 */ 769 if (ISSET(tp->t_cflag, HUPCL)) { 770 com_modem(sc, 0); 771 COM_UNLOCK(sc); 772 splx(s); 773 /* XXX tsleep will only timeout */ 774 (void) tsleep(sc, TTIPRI, ttclos, hz); 775 s = splserial(); 776 COM_LOCK(sc); 777 } 778 779 /* Turn off interrupts. */ 780 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 781 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 782 #ifdef COM_PXA2X0 783 if (sc->sc_type == COM_TYPE_PXA2x0) 784 sc->sc_ier |= IER_ERXTOUT; 785 #endif 786 } else 787 sc->sc_ier = 0; 788 789 #ifdef COM_PXA2X0 790 if (sc->sc_type == COM_TYPE_PXA2x0) 791 sc->sc_ier |= IER_EUART; 792 #endif 793 794 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 795 796 if (sc->disable) { 797 #ifdef DIAGNOSTIC 798 if (!sc->enabled) 799 panic("com_shutdown: not enabled?"); 800 #endif 801 (*sc->disable)(sc); 802 sc->enabled = 0; 803 } 804 COM_UNLOCK(sc); 805 splx(s); 806 } 807 808 int 809 comopen(dev_t dev, int flag, int mode, struct proc *p) 810 { 811 struct com_softc *sc; 812 struct tty *tp; 813 int s, s2; 814 int error; 815 816 sc = device_lookup(&com_cd, COMUNIT(dev)); 817 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 818 sc->sc_rbuf == NULL) 819 return (ENXIO); 820 821 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 822 return (ENXIO); 823 824 #ifdef KGDB 825 /* 826 * If this is the kgdb port, no other use is permitted. 827 */ 828 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 829 return (EBUSY); 830 #endif 831 832 tp = sc->sc_tty; 833 834 if (ISSET(tp->t_state, TS_ISOPEN) && 835 ISSET(tp->t_state, TS_XCLUDE) && 836 p->p_ucred->cr_uid != 0) 837 return (EBUSY); 838 839 s = spltty(); 840 841 /* 842 * Do the following iff this is a first open. 843 */ 844 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 845 struct termios t; 846 847 tp->t_dev = dev; 848 849 s2 = splserial(); 850 COM_LOCK(sc); 851 852 if (sc->enable) { 853 if ((*sc->enable)(sc)) { 854 COM_UNLOCK(sc); 855 splx(s2); 856 splx(s); 857 printf("%s: device enable failed\n", 858 sc->sc_dev.dv_xname); 859 return (EIO); 860 } 861 sc->enabled = 1; 862 com_config(sc); 863 } 864 865 /* Turn on interrupts. */ 866 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 867 #ifdef COM_PXA2X0 868 if (sc->sc_type == COM_TYPE_PXA2x0) 869 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 870 #endif 871 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 872 873 /* Fetch the current modem control status, needed later. */ 874 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 875 876 /* Clear PPS capture state on first open. */ 877 sc->sc_ppsmask = 0; 878 sc->ppsparam.mode = 0; 879 880 COM_UNLOCK(sc); 881 splx(s2); 882 883 /* 884 * Initialize the termios status to the defaults. Add in the 885 * sticky bits from TIOCSFLAGS. 886 */ 887 t.c_ispeed = 0; 888 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 889 t.c_ospeed = comconsrate; 890 t.c_cflag = comconscflag; 891 } else { 892 t.c_ospeed = TTYDEF_SPEED; 893 t.c_cflag = TTYDEF_CFLAG; 894 } 895 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 896 SET(t.c_cflag, CLOCAL); 897 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 898 SET(t.c_cflag, CRTSCTS); 899 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 900 SET(t.c_cflag, MDMBUF); 901 /* Make sure comparam() will do something. */ 902 tp->t_ospeed = 0; 903 (void) comparam(tp, &t); 904 tp->t_iflag = TTYDEF_IFLAG; 905 tp->t_oflag = TTYDEF_OFLAG; 906 tp->t_lflag = TTYDEF_LFLAG; 907 ttychars(tp); 908 ttsetwater(tp); 909 910 s2 = splserial(); 911 COM_LOCK(sc); 912 913 /* 914 * Turn on DTR. We must always do this, even if carrier is not 915 * present, because otherwise we'd have to use TIOCSDTR 916 * immediately after setting CLOCAL, which applications do not 917 * expect. We always assert DTR while the device is open 918 * unless explicitly requested to deassert it. 919 */ 920 com_modem(sc, 1); 921 922 /* Clear the input ring, and unblock. */ 923 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 924 sc->sc_rbavail = com_rbuf_size; 925 com_iflush(sc); 926 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 927 com_hwiflow(sc); 928 929 #ifdef COM_DEBUG 930 if (com_debug) 931 comstatus(sc, "comopen "); 932 #endif 933 934 COM_UNLOCK(sc); 935 splx(s2); 936 } 937 938 splx(s); 939 940 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 941 if (error) 942 goto bad; 943 944 error = (*tp->t_linesw->l_open)(dev, tp); 945 if (error) 946 goto bad; 947 948 return (0); 949 950 bad: 951 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 952 /* 953 * We failed to open the device, and nobody else had it opened. 954 * Clean up the state as appropriate. 955 */ 956 com_shutdown(sc); 957 } 958 959 return (error); 960 } 961 962 int 963 comclose(dev_t dev, int flag, int mode, struct proc *p) 964 { 965 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 966 struct tty *tp = sc->sc_tty; 967 968 /* XXX This is for cons.c. */ 969 if (!ISSET(tp->t_state, TS_ISOPEN)) 970 return (0); 971 972 (*tp->t_linesw->l_close)(tp, flag); 973 ttyclose(tp); 974 975 if (COM_ISALIVE(sc) == 0) 976 return (0); 977 978 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 979 /* 980 * Although we got a last close, the device may still be in 981 * use; e.g. if this was the dialout node, and there are still 982 * processes waiting for carrier on the non-dialout node. 983 */ 984 com_shutdown(sc); 985 } 986 987 return (0); 988 } 989 990 int 991 comread(dev_t dev, struct uio *uio, int flag) 992 { 993 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 994 struct tty *tp = sc->sc_tty; 995 996 if (COM_ISALIVE(sc) == 0) 997 return (EIO); 998 999 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1000 } 1001 1002 int 1003 comwrite(dev_t dev, struct uio *uio, int flag) 1004 { 1005 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1006 struct tty *tp = sc->sc_tty; 1007 1008 if (COM_ISALIVE(sc) == 0) 1009 return (EIO); 1010 1011 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1012 } 1013 1014 int 1015 compoll(dev_t dev, int events, struct proc *p) 1016 { 1017 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1018 struct tty *tp = sc->sc_tty; 1019 1020 if (COM_ISALIVE(sc) == 0) 1021 return (EIO); 1022 1023 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1024 } 1025 1026 struct tty * 1027 comtty(dev_t dev) 1028 { 1029 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1030 struct tty *tp = sc->sc_tty; 1031 1032 return (tp); 1033 } 1034 1035 int 1036 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1037 { 1038 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1039 struct tty *tp = sc->sc_tty; 1040 int error; 1041 int s; 1042 1043 if (COM_ISALIVE(sc) == 0) 1044 return (EIO); 1045 1046 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1047 if (error != EPASSTHROUGH) 1048 return (error); 1049 1050 error = ttioctl(tp, cmd, data, flag, p); 1051 if (error != EPASSTHROUGH) 1052 return (error); 1053 1054 error = 0; 1055 1056 s = splserial(); 1057 COM_LOCK(sc); 1058 1059 switch (cmd) { 1060 case TIOCSBRK: 1061 com_break(sc, 1); 1062 break; 1063 1064 case TIOCCBRK: 1065 com_break(sc, 0); 1066 break; 1067 1068 case TIOCSDTR: 1069 com_modem(sc, 1); 1070 break; 1071 1072 case TIOCCDTR: 1073 com_modem(sc, 0); 1074 break; 1075 1076 case TIOCGFLAGS: 1077 *(int *)data = sc->sc_swflags; 1078 break; 1079 1080 case TIOCSFLAGS: 1081 error = suser(p->p_ucred, &p->p_acflag); 1082 if (error) 1083 break; 1084 sc->sc_swflags = *(int *)data; 1085 break; 1086 1087 case TIOCMSET: 1088 case TIOCMBIS: 1089 case TIOCMBIC: 1090 tiocm_to_com(sc, cmd, *(int *)data); 1091 break; 1092 1093 case TIOCMGET: 1094 *(int *)data = com_to_tiocm(sc); 1095 break; 1096 1097 case PPS_IOC_CREATE: 1098 break; 1099 1100 case PPS_IOC_DESTROY: 1101 break; 1102 1103 case PPS_IOC_GETPARAMS: { 1104 pps_params_t *pp; 1105 pp = (pps_params_t *)data; 1106 *pp = sc->ppsparam; 1107 break; 1108 } 1109 1110 case PPS_IOC_SETPARAMS: { 1111 pps_params_t *pp; 1112 int mode; 1113 pp = (pps_params_t *)data; 1114 if (pp->mode & ~ppscap) { 1115 error = EINVAL; 1116 break; 1117 } 1118 sc->ppsparam = *pp; 1119 /* 1120 * Compute msr masks from user-specified timestamp state. 1121 */ 1122 mode = sc->ppsparam.mode; 1123 #ifdef PPS_SYNC 1124 if (mode & PPS_HARDPPSONASSERT) { 1125 mode |= PPS_CAPTUREASSERT; 1126 /* XXX revoke any previous HARDPPS source */ 1127 } 1128 if (mode & PPS_HARDPPSONCLEAR) { 1129 mode |= PPS_CAPTURECLEAR; 1130 /* XXX revoke any previous HARDPPS source */ 1131 } 1132 #endif /* PPS_SYNC */ 1133 switch (mode & PPS_CAPTUREBOTH) { 1134 case 0: 1135 sc->sc_ppsmask = 0; 1136 break; 1137 1138 case PPS_CAPTUREASSERT: 1139 sc->sc_ppsmask = MSR_DCD; 1140 sc->sc_ppsassert = MSR_DCD; 1141 sc->sc_ppsclear = -1; 1142 break; 1143 1144 case PPS_CAPTURECLEAR: 1145 sc->sc_ppsmask = MSR_DCD; 1146 sc->sc_ppsassert = -1; 1147 sc->sc_ppsclear = 0; 1148 break; 1149 1150 case PPS_CAPTUREBOTH: 1151 sc->sc_ppsmask = MSR_DCD; 1152 sc->sc_ppsassert = MSR_DCD; 1153 sc->sc_ppsclear = 0; 1154 break; 1155 1156 default: 1157 error = EINVAL; 1158 break; 1159 } 1160 break; 1161 } 1162 1163 case PPS_IOC_GETCAP: 1164 *(int*)data = ppscap; 1165 break; 1166 1167 case PPS_IOC_FETCH: { 1168 pps_info_t *pi; 1169 pi = (pps_info_t *)data; 1170 *pi = sc->ppsinfo; 1171 break; 1172 } 1173 1174 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1175 /* 1176 * Some GPS clocks models use the falling rather than 1177 * rising edge as the on-the-second signal. 1178 * The old API has no way to specify PPS polarity. 1179 */ 1180 sc->sc_ppsmask = MSR_DCD; 1181 #ifndef PPS_TRAILING_EDGE 1182 sc->sc_ppsassert = MSR_DCD; 1183 sc->sc_ppsclear = -1; 1184 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1185 &sc->ppsinfo.assert_timestamp); 1186 #else 1187 sc->sc_ppsassert = -1; 1188 sc->sc_ppsclear = 0; 1189 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1190 &sc->ppsinfo.clear_timestamp); 1191 #endif 1192 break; 1193 1194 default: 1195 error = EPASSTHROUGH; 1196 break; 1197 } 1198 1199 COM_UNLOCK(sc); 1200 splx(s); 1201 1202 #ifdef COM_DEBUG 1203 if (com_debug) 1204 comstatus(sc, "comioctl "); 1205 #endif 1206 1207 return (error); 1208 } 1209 1210 integrate void 1211 com_schedrx(struct com_softc *sc) 1212 { 1213 1214 sc->sc_rx_ready = 1; 1215 1216 /* Wake up the poller. */ 1217 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1218 softintr_schedule(sc->sc_si); 1219 #else 1220 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1221 setsoftserial(); 1222 #else 1223 if (!com_softintr_scheduled) { 1224 com_softintr_scheduled = 1; 1225 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1226 } 1227 #endif 1228 #endif 1229 } 1230 1231 void 1232 com_break(struct com_softc *sc, int onoff) 1233 { 1234 1235 if (onoff) 1236 SET(sc->sc_lcr, LCR_SBREAK); 1237 else 1238 CLR(sc->sc_lcr, LCR_SBREAK); 1239 1240 if (!sc->sc_heldchange) { 1241 if (sc->sc_tx_busy) { 1242 sc->sc_heldtbc = sc->sc_tbc; 1243 sc->sc_tbc = 0; 1244 sc->sc_heldchange = 1; 1245 } else 1246 com_loadchannelregs(sc); 1247 } 1248 } 1249 1250 void 1251 com_modem(struct com_softc *sc, int onoff) 1252 { 1253 1254 if (sc->sc_mcr_dtr == 0) 1255 return; 1256 1257 if (onoff) 1258 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1259 else 1260 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1261 1262 if (!sc->sc_heldchange) { 1263 if (sc->sc_tx_busy) { 1264 sc->sc_heldtbc = sc->sc_tbc; 1265 sc->sc_tbc = 0; 1266 sc->sc_heldchange = 1; 1267 } else 1268 com_loadchannelregs(sc); 1269 } 1270 } 1271 1272 void 1273 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1274 { 1275 u_char combits; 1276 1277 combits = 0; 1278 if (ISSET(ttybits, TIOCM_DTR)) 1279 SET(combits, MCR_DTR); 1280 if (ISSET(ttybits, TIOCM_RTS)) 1281 SET(combits, MCR_RTS); 1282 1283 switch (how) { 1284 case TIOCMBIC: 1285 CLR(sc->sc_mcr, combits); 1286 break; 1287 1288 case TIOCMBIS: 1289 SET(sc->sc_mcr, combits); 1290 break; 1291 1292 case TIOCMSET: 1293 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1294 SET(sc->sc_mcr, combits); 1295 break; 1296 } 1297 1298 if (!sc->sc_heldchange) { 1299 if (sc->sc_tx_busy) { 1300 sc->sc_heldtbc = sc->sc_tbc; 1301 sc->sc_tbc = 0; 1302 sc->sc_heldchange = 1; 1303 } else 1304 com_loadchannelregs(sc); 1305 } 1306 } 1307 1308 int 1309 com_to_tiocm(struct com_softc *sc) 1310 { 1311 u_char combits; 1312 int ttybits = 0; 1313 1314 combits = sc->sc_mcr; 1315 if (ISSET(combits, MCR_DTR)) 1316 SET(ttybits, TIOCM_DTR); 1317 if (ISSET(combits, MCR_RTS)) 1318 SET(ttybits, TIOCM_RTS); 1319 1320 combits = sc->sc_msr; 1321 if (ISSET(combits, MSR_DCD)) 1322 SET(ttybits, TIOCM_CD); 1323 if (ISSET(combits, MSR_CTS)) 1324 SET(ttybits, TIOCM_CTS); 1325 if (ISSET(combits, MSR_DSR)) 1326 SET(ttybits, TIOCM_DSR); 1327 if (ISSET(combits, MSR_RI | MSR_TERI)) 1328 SET(ttybits, TIOCM_RI); 1329 1330 #ifdef COM_PXA2X0 1331 if (sc->sc_type == COM_TYPE_PXA2x0) { 1332 if ((sc->sc_ier & 0x0f) != 0) 1333 SET(ttybits, TIOCM_LE); 1334 } else 1335 #endif 1336 if ((sc->sc_ier & 0xbf) != 0) 1337 SET(ttybits, TIOCM_LE); 1338 1339 return (ttybits); 1340 } 1341 1342 static u_char 1343 cflag2lcr(tcflag_t cflag) 1344 { 1345 u_char lcr = 0; 1346 1347 switch (ISSET(cflag, CSIZE)) { 1348 case CS5: 1349 SET(lcr, LCR_5BITS); 1350 break; 1351 case CS6: 1352 SET(lcr, LCR_6BITS); 1353 break; 1354 case CS7: 1355 SET(lcr, LCR_7BITS); 1356 break; 1357 case CS8: 1358 SET(lcr, LCR_8BITS); 1359 break; 1360 } 1361 if (ISSET(cflag, PARENB)) { 1362 SET(lcr, LCR_PENAB); 1363 if (!ISSET(cflag, PARODD)) 1364 SET(lcr, LCR_PEVEN); 1365 } 1366 if (ISSET(cflag, CSTOPB)) 1367 SET(lcr, LCR_STOPB); 1368 1369 return (lcr); 1370 } 1371 1372 int 1373 comparam(struct tty *tp, struct termios *t) 1374 { 1375 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1376 int ospeed; 1377 u_char lcr; 1378 int s; 1379 1380 if (COM_ISALIVE(sc) == 0) 1381 return (EIO); 1382 1383 #ifdef COM_HAYESP 1384 if (sc->sc_type == COM_TYPE_HAYESP) { 1385 int prescaler, speed; 1386 1387 /* 1388 * Calculate UART clock prescaler. It should be in 1389 * range of 0 .. 3. 1390 */ 1391 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1392 prescaler++, speed /= 2) 1393 if ((ospeed = comspeed(speed, sc->sc_frequency, 1394 sc->sc_type)) > 0) 1395 break; 1396 1397 if (prescaler == 4) 1398 return (EINVAL); 1399 sc->sc_prescaler = prescaler; 1400 } else 1401 #endif 1402 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1403 1404 /* Check requested parameters. */ 1405 if (ospeed < 0) 1406 return (EINVAL); 1407 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1408 return (EINVAL); 1409 1410 /* 1411 * For the console, always force CLOCAL and !HUPCL, so that the port 1412 * is always active. 1413 */ 1414 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1415 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1416 SET(t->c_cflag, CLOCAL); 1417 CLR(t->c_cflag, HUPCL); 1418 } 1419 1420 /* 1421 * If there were no changes, don't do anything. This avoids dropping 1422 * input and improves performance when all we did was frob things like 1423 * VMIN and VTIME. 1424 */ 1425 if (tp->t_ospeed == t->c_ospeed && 1426 tp->t_cflag == t->c_cflag) 1427 return (0); 1428 1429 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1430 1431 s = splserial(); 1432 COM_LOCK(sc); 1433 1434 sc->sc_lcr = lcr; 1435 1436 /* 1437 * If we're not in a mode that assumes a connection is present, then 1438 * ignore carrier changes. 1439 */ 1440 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1441 sc->sc_msr_dcd = 0; 1442 else 1443 sc->sc_msr_dcd = MSR_DCD; 1444 /* 1445 * Set the flow control pins depending on the current flow control 1446 * mode. 1447 */ 1448 if (ISSET(t->c_cflag, CRTSCTS)) { 1449 sc->sc_mcr_dtr = MCR_DTR; 1450 sc->sc_mcr_rts = MCR_RTS; 1451 sc->sc_msr_cts = MSR_CTS; 1452 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1453 } else if (ISSET(t->c_cflag, MDMBUF)) { 1454 /* 1455 * For DTR/DCD flow control, make sure we don't toggle DTR for 1456 * carrier detection. 1457 */ 1458 sc->sc_mcr_dtr = 0; 1459 sc->sc_mcr_rts = MCR_DTR; 1460 sc->sc_msr_cts = MSR_DCD; 1461 sc->sc_efr = 0; 1462 } else { 1463 /* 1464 * If no flow control, then always set RTS. This will make 1465 * the other side happy if it mistakenly thinks we're doing 1466 * RTS/CTS flow control. 1467 */ 1468 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1469 sc->sc_mcr_rts = 0; 1470 sc->sc_msr_cts = 0; 1471 sc->sc_efr = 0; 1472 if (ISSET(sc->sc_mcr, MCR_DTR)) 1473 SET(sc->sc_mcr, MCR_RTS); 1474 else 1475 CLR(sc->sc_mcr, MCR_RTS); 1476 } 1477 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1478 1479 #if 0 1480 if (ospeed == 0) 1481 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1482 else 1483 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1484 #endif 1485 1486 sc->sc_dlbl = ospeed; 1487 sc->sc_dlbh = ospeed >> 8; 1488 1489 /* 1490 * Set the FIFO threshold based on the receive speed. 1491 * 1492 * * If it's a low speed, it's probably a mouse or some other 1493 * interactive device, so set the threshold low. 1494 * * If it's a high speed, trim the trigger level down to prevent 1495 * overflows. 1496 * * Otherwise set it a bit higher. 1497 */ 1498 if (sc->sc_type == COM_TYPE_HAYESP) 1499 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1500 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1501 sc->sc_fifo = FIFO_ENABLE | 1502 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1503 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1504 else 1505 sc->sc_fifo = 0; 1506 1507 /* And copy to tty. */ 1508 tp->t_ispeed = 0; 1509 tp->t_ospeed = t->c_ospeed; 1510 tp->t_cflag = t->c_cflag; 1511 1512 if (!sc->sc_heldchange) { 1513 if (sc->sc_tx_busy) { 1514 sc->sc_heldtbc = sc->sc_tbc; 1515 sc->sc_tbc = 0; 1516 sc->sc_heldchange = 1; 1517 } else 1518 com_loadchannelregs(sc); 1519 } 1520 1521 if (!ISSET(t->c_cflag, CHWFLOW)) { 1522 /* Disable the high water mark. */ 1523 sc->sc_r_hiwat = 0; 1524 sc->sc_r_lowat = 0; 1525 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1526 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1527 com_schedrx(sc); 1528 } 1529 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1530 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1531 com_hwiflow(sc); 1532 } 1533 } else { 1534 sc->sc_r_hiwat = com_rbuf_hiwat; 1535 sc->sc_r_lowat = com_rbuf_lowat; 1536 } 1537 1538 COM_UNLOCK(sc); 1539 splx(s); 1540 1541 /* 1542 * Update the tty layer's idea of the carrier bit, in case we changed 1543 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1544 * explicit request. 1545 */ 1546 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1547 1548 #ifdef COM_DEBUG 1549 if (com_debug) 1550 comstatus(sc, "comparam "); 1551 #endif 1552 1553 if (!ISSET(t->c_cflag, CHWFLOW)) { 1554 if (sc->sc_tx_stopped) { 1555 sc->sc_tx_stopped = 0; 1556 comstart(tp); 1557 } 1558 } 1559 1560 return (0); 1561 } 1562 1563 void 1564 com_iflush(struct com_softc *sc) 1565 { 1566 bus_space_tag_t iot = sc->sc_iot; 1567 bus_space_handle_t ioh = sc->sc_ioh; 1568 #ifdef DIAGNOSTIC 1569 int reg; 1570 #endif 1571 int timo; 1572 1573 #ifdef DIAGNOSTIC 1574 reg = 0xffff; 1575 #endif 1576 timo = 50000; 1577 /* flush any pending I/O */ 1578 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1579 && --timo) 1580 #ifdef DIAGNOSTIC 1581 reg = 1582 #else 1583 (void) 1584 #endif 1585 bus_space_read_1(iot, ioh, com_data); 1586 #ifdef DIAGNOSTIC 1587 if (!timo) 1588 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1589 reg); 1590 #endif 1591 } 1592 1593 void 1594 com_loadchannelregs(struct com_softc *sc) 1595 { 1596 bus_space_tag_t iot = sc->sc_iot; 1597 bus_space_handle_t ioh = sc->sc_ioh; 1598 1599 /* XXXXX necessary? */ 1600 com_iflush(sc); 1601 1602 #ifdef COM_PXA2X0 1603 if (sc->sc_type == COM_TYPE_PXA2x0) 1604 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1605 else 1606 #endif 1607 bus_space_write_1(iot, ioh, com_ier, 0); 1608 1609 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1610 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1611 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1612 } 1613 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1614 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1615 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1616 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1617 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1618 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1619 #ifdef COM_HAYESP 1620 if (sc->sc_type == COM_TYPE_HAYESP) { 1621 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1622 HAYESP_SETPRESCALER); 1623 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1624 sc->sc_prescaler); 1625 } 1626 #endif 1627 1628 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1629 } 1630 1631 int 1632 comhwiflow(struct tty *tp, int block) 1633 { 1634 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1635 int s; 1636 1637 if (COM_ISALIVE(sc) == 0) 1638 return (0); 1639 1640 if (sc->sc_mcr_rts == 0) 1641 return (0); 1642 1643 s = splserial(); 1644 COM_LOCK(sc); 1645 1646 if (block) { 1647 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1648 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1649 com_hwiflow(sc); 1650 } 1651 } else { 1652 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1653 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1654 com_schedrx(sc); 1655 } 1656 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1657 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1658 com_hwiflow(sc); 1659 } 1660 } 1661 1662 COM_UNLOCK(sc); 1663 splx(s); 1664 return (1); 1665 } 1666 1667 /* 1668 * (un)block input via hw flowcontrol 1669 */ 1670 void 1671 com_hwiflow(struct com_softc *sc) 1672 { 1673 bus_space_tag_t iot = sc->sc_iot; 1674 bus_space_handle_t ioh = sc->sc_ioh; 1675 1676 if (sc->sc_mcr_rts == 0) 1677 return; 1678 1679 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1680 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1681 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1682 } else { 1683 SET(sc->sc_mcr, sc->sc_mcr_rts); 1684 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1685 } 1686 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1687 } 1688 1689 1690 void 1691 comstart(struct tty *tp) 1692 { 1693 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1694 bus_space_tag_t iot = sc->sc_iot; 1695 bus_space_handle_t ioh = sc->sc_ioh; 1696 int s; 1697 1698 if (COM_ISALIVE(sc) == 0) 1699 return; 1700 1701 s = spltty(); 1702 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1703 goto out; 1704 if (sc->sc_tx_stopped) 1705 goto out; 1706 1707 if (tp->t_outq.c_cc <= tp->t_lowat) { 1708 if (ISSET(tp->t_state, TS_ASLEEP)) { 1709 CLR(tp->t_state, TS_ASLEEP); 1710 wakeup(&tp->t_outq); 1711 } 1712 selwakeup(&tp->t_wsel); 1713 if (tp->t_outq.c_cc == 0) 1714 goto out; 1715 } 1716 1717 /* Grab the first contiguous region of buffer space. */ 1718 { 1719 u_char *tba; 1720 int tbc; 1721 1722 tba = tp->t_outq.c_cf; 1723 tbc = ndqb(&tp->t_outq, 0); 1724 1725 (void)splserial(); 1726 COM_LOCK(sc); 1727 1728 sc->sc_tba = tba; 1729 sc->sc_tbc = tbc; 1730 } 1731 1732 SET(tp->t_state, TS_BUSY); 1733 sc->sc_tx_busy = 1; 1734 1735 /* Enable transmit completion interrupts if necessary. */ 1736 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1737 SET(sc->sc_ier, IER_ETXRDY); 1738 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1739 } 1740 1741 /* Output the first chunk of the contiguous buffer. */ 1742 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1743 u_int n; 1744 1745 n = sc->sc_tbc; 1746 if (n > sc->sc_fifolen) 1747 n = sc->sc_fifolen; 1748 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1749 sc->sc_tbc -= n; 1750 sc->sc_tba += n; 1751 } 1752 COM_UNLOCK(sc); 1753 out: 1754 splx(s); 1755 return; 1756 } 1757 1758 /* 1759 * Stop output on a line. 1760 */ 1761 void 1762 comstop(struct tty *tp, int flag) 1763 { 1764 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1765 int s; 1766 1767 s = splserial(); 1768 COM_LOCK(sc); 1769 if (ISSET(tp->t_state, TS_BUSY)) { 1770 /* Stop transmitting at the next chunk. */ 1771 sc->sc_tbc = 0; 1772 sc->sc_heldtbc = 0; 1773 if (!ISSET(tp->t_state, TS_TTSTOP)) 1774 SET(tp->t_state, TS_FLUSH); 1775 } 1776 COM_UNLOCK(sc); 1777 splx(s); 1778 } 1779 1780 void 1781 comdiag(void *arg) 1782 { 1783 struct com_softc *sc = arg; 1784 int overflows, floods; 1785 int s; 1786 1787 s = splserial(); 1788 COM_LOCK(sc); 1789 overflows = sc->sc_overflows; 1790 sc->sc_overflows = 0; 1791 floods = sc->sc_floods; 1792 sc->sc_floods = 0; 1793 sc->sc_errors = 0; 1794 COM_UNLOCK(sc); 1795 splx(s); 1796 1797 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1798 sc->sc_dev.dv_xname, 1799 overflows, overflows == 1 ? "" : "s", 1800 floods, floods == 1 ? "" : "s"); 1801 } 1802 1803 integrate void 1804 com_rxsoft(struct com_softc *sc, struct tty *tp) 1805 { 1806 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1807 u_char *get, *end; 1808 u_int cc, scc; 1809 u_char lsr; 1810 int code; 1811 int s; 1812 1813 end = sc->sc_ebuf; 1814 get = sc->sc_rbget; 1815 scc = cc = com_rbuf_size - sc->sc_rbavail; 1816 1817 if (cc == com_rbuf_size) { 1818 sc->sc_floods++; 1819 if (sc->sc_errors++ == 0) 1820 callout_reset(&sc->sc_diag_callout, 60 * hz, 1821 comdiag, sc); 1822 } 1823 1824 /* If not yet open, drop the entire buffer content here */ 1825 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1826 get += cc << 1; 1827 if (get >= end) 1828 get -= com_rbuf_size << 1; 1829 cc = 0; 1830 } 1831 while (cc) { 1832 code = get[0]; 1833 lsr = get[1]; 1834 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1835 if (ISSET(lsr, LSR_OE)) { 1836 sc->sc_overflows++; 1837 if (sc->sc_errors++ == 0) 1838 callout_reset(&sc->sc_diag_callout, 1839 60 * hz, comdiag, sc); 1840 } 1841 if (ISSET(lsr, LSR_BI | LSR_FE)) 1842 SET(code, TTY_FE); 1843 if (ISSET(lsr, LSR_PE)) 1844 SET(code, TTY_PE); 1845 } 1846 if ((*rint)(code, tp) == -1) { 1847 /* 1848 * The line discipline's buffer is out of space. 1849 */ 1850 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1851 /* 1852 * We're either not using flow control, or the 1853 * line discipline didn't tell us to block for 1854 * some reason. Either way, we have no way to 1855 * know when there's more space available, so 1856 * just drop the rest of the data. 1857 */ 1858 get += cc << 1; 1859 if (get >= end) 1860 get -= com_rbuf_size << 1; 1861 cc = 0; 1862 } else { 1863 /* 1864 * Don't schedule any more receive processing 1865 * until the line discipline tells us there's 1866 * space available (through comhwiflow()). 1867 * Leave the rest of the data in the input 1868 * buffer. 1869 */ 1870 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1871 } 1872 break; 1873 } 1874 get += 2; 1875 if (get >= end) 1876 get = sc->sc_rbuf; 1877 cc--; 1878 } 1879 1880 if (cc != scc) { 1881 sc->sc_rbget = get; 1882 s = splserial(); 1883 COM_LOCK(sc); 1884 1885 cc = sc->sc_rbavail += scc - cc; 1886 /* Buffers should be ok again, release possible block. */ 1887 if (cc >= sc->sc_r_lowat) { 1888 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1889 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1890 SET(sc->sc_ier, IER_ERXRDY); 1891 #ifdef COM_PXA2X0 1892 if (sc->sc_type == COM_TYPE_PXA2x0) 1893 SET(sc->sc_ier, IER_ERXTOUT); 1894 #endif 1895 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1896 com_ier, sc->sc_ier); 1897 } 1898 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1899 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1900 com_hwiflow(sc); 1901 } 1902 } 1903 COM_UNLOCK(sc); 1904 splx(s); 1905 } 1906 } 1907 1908 integrate void 1909 com_txsoft(struct com_softc *sc, struct tty *tp) 1910 { 1911 1912 CLR(tp->t_state, TS_BUSY); 1913 if (ISSET(tp->t_state, TS_FLUSH)) 1914 CLR(tp->t_state, TS_FLUSH); 1915 else 1916 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1917 (*tp->t_linesw->l_start)(tp); 1918 } 1919 1920 integrate void 1921 com_stsoft(struct com_softc *sc, struct tty *tp) 1922 { 1923 u_char msr, delta; 1924 int s; 1925 1926 s = splserial(); 1927 COM_LOCK(sc); 1928 msr = sc->sc_msr; 1929 delta = sc->sc_msr_delta; 1930 sc->sc_msr_delta = 0; 1931 COM_UNLOCK(sc); 1932 splx(s); 1933 1934 if (ISSET(delta, sc->sc_msr_dcd)) { 1935 /* 1936 * Inform the tty layer that carrier detect changed. 1937 */ 1938 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1939 } 1940 1941 if (ISSET(delta, sc->sc_msr_cts)) { 1942 /* Block or unblock output according to flow control. */ 1943 if (ISSET(msr, sc->sc_msr_cts)) { 1944 sc->sc_tx_stopped = 0; 1945 (*tp->t_linesw->l_start)(tp); 1946 } else { 1947 sc->sc_tx_stopped = 1; 1948 } 1949 } 1950 1951 #ifdef COM_DEBUG 1952 if (com_debug) 1953 comstatus(sc, "com_stsoft"); 1954 #endif 1955 } 1956 1957 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1958 void 1959 comsoft(void *arg) 1960 { 1961 struct com_softc *sc = arg; 1962 struct tty *tp; 1963 1964 if (COM_ISALIVE(sc) == 0) 1965 return; 1966 1967 { 1968 #else 1969 void 1970 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1971 comsoft(void) 1972 #else 1973 comsoft(void *arg) 1974 #endif 1975 { 1976 struct com_softc *sc; 1977 struct tty *tp; 1978 int unit; 1979 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1980 int s; 1981 1982 s = splsoftserial(); 1983 com_softintr_scheduled = 0; 1984 #endif 1985 1986 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1987 sc = device_lookup(&com_cd, unit); 1988 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1989 continue; 1990 1991 if (COM_ISALIVE(sc) == 0) 1992 continue; 1993 1994 tp = sc->sc_tty; 1995 if (tp == NULL) 1996 continue; 1997 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1998 continue; 1999 #endif 2000 tp = sc->sc_tty; 2001 2002 if (sc->sc_rx_ready) { 2003 sc->sc_rx_ready = 0; 2004 com_rxsoft(sc, tp); 2005 } 2006 2007 if (sc->sc_st_check) { 2008 sc->sc_st_check = 0; 2009 com_stsoft(sc, tp); 2010 } 2011 2012 if (sc->sc_tx_done) { 2013 sc->sc_tx_done = 0; 2014 com_txsoft(sc, tp); 2015 } 2016 } 2017 2018 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2019 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2020 splx(s); 2021 #endif 2022 #endif 2023 } 2024 2025 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2026 /* there has got to be a better way to do comsoft() */ 2027 }} 2028 #endif 2029 2030 int 2031 comintr(void *arg) 2032 { 2033 struct com_softc *sc = arg; 2034 bus_space_tag_t iot = sc->sc_iot; 2035 bus_space_handle_t ioh = sc->sc_ioh; 2036 u_char *put, *end; 2037 u_int cc; 2038 u_char lsr, iir; 2039 2040 if (COM_ISALIVE(sc) == 0) 2041 return (0); 2042 2043 COM_LOCK(sc); 2044 iir = bus_space_read_1(iot, ioh, com_iir); 2045 if (ISSET(iir, IIR_NOPEND)) { 2046 COM_UNLOCK(sc); 2047 return (0); 2048 } 2049 2050 end = sc->sc_ebuf; 2051 put = sc->sc_rbput; 2052 cc = sc->sc_rbavail; 2053 2054 again: do { 2055 u_char msr, delta; 2056 2057 lsr = bus_space_read_1(iot, ioh, com_lsr); 2058 if (ISSET(lsr, LSR_BI)) { 2059 int cn_trapped = 0; 2060 2061 cn_check_magic(sc->sc_tty->t_dev, 2062 CNC_BREAK, com_cnm_state); 2063 if (cn_trapped) 2064 continue; 2065 #if defined(KGDB) && !defined(DDB) 2066 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2067 kgdb_connect(1); 2068 continue; 2069 } 2070 #endif 2071 } 2072 2073 if (ISSET(lsr, LSR_RCV_MASK) && 2074 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2075 while (cc > 0) { 2076 int cn_trapped = 0; 2077 put[0] = bus_space_read_1(iot, ioh, com_data); 2078 put[1] = lsr; 2079 cn_check_magic(sc->sc_tty->t_dev, 2080 put[0], com_cnm_state); 2081 if (cn_trapped) { 2082 lsr = bus_space_read_1(iot, ioh, com_lsr); 2083 if (!ISSET(lsr, LSR_RCV_MASK)) 2084 break; 2085 2086 continue; 2087 } 2088 put += 2; 2089 if (put >= end) 2090 put = sc->sc_rbuf; 2091 cc--; 2092 2093 lsr = bus_space_read_1(iot, ioh, com_lsr); 2094 if (!ISSET(lsr, LSR_RCV_MASK)) 2095 break; 2096 } 2097 2098 /* 2099 * Current string of incoming characters ended because 2100 * no more data was available or we ran out of space. 2101 * Schedule a receive event if any data was received. 2102 * If we're out of space, turn off receive interrupts. 2103 */ 2104 sc->sc_rbput = put; 2105 sc->sc_rbavail = cc; 2106 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2107 sc->sc_rx_ready = 1; 2108 2109 /* 2110 * See if we are in danger of overflowing a buffer. If 2111 * so, use hardware flow control to ease the pressure. 2112 */ 2113 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2114 cc < sc->sc_r_hiwat) { 2115 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2116 com_hwiflow(sc); 2117 } 2118 2119 /* 2120 * If we're out of space, disable receive interrupts 2121 * until the queue has drained a bit. 2122 */ 2123 if (!cc) { 2124 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2125 CLR(sc->sc_ier, IER_ERXRDY); 2126 #ifdef COM_PXA2X0 2127 if (sc->sc_type == COM_TYPE_PXA2x0) 2128 CLR(sc->sc_ier, IER_ERXTOUT); 2129 #endif 2130 bus_space_write_1(iot, ioh, com_ier, 2131 sc->sc_ier); 2132 } 2133 } else { 2134 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2135 #ifdef COM_PXA2X0 2136 if (sc->sc_type == COM_TYPE_PXA2x0) 2137 bus_space_write_1(iot, ioh, com_ier, 2138 IER_EUART); 2139 else 2140 #endif 2141 bus_space_write_1(iot, ioh, com_ier, 0); 2142 delay(10); 2143 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2144 continue; 2145 } 2146 } 2147 2148 msr = bus_space_read_1(iot, ioh, com_msr); 2149 delta = msr ^ sc->sc_msr; 2150 sc->sc_msr = msr; 2151 /* 2152 * Pulse-per-second (PSS) signals on edge of DCD? 2153 * Process these even if line discipline is ignoring DCD. 2154 */ 2155 if (delta & sc->sc_ppsmask) { 2156 struct timeval tv; 2157 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2158 /* XXX nanotime() */ 2159 microtime(&tv); 2160 TIMEVAL_TO_TIMESPEC(&tv, 2161 &sc->ppsinfo.assert_timestamp); 2162 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2163 timespecadd(&sc->ppsinfo.assert_timestamp, 2164 &sc->ppsparam.assert_offset, 2165 &sc->ppsinfo.assert_timestamp); 2166 } 2167 2168 #ifdef PPS_SYNC 2169 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2170 hardpps(&tv, tv.tv_usec); 2171 #endif 2172 sc->ppsinfo.assert_sequence++; 2173 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2174 2175 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2176 /* XXX nanotime() */ 2177 microtime(&tv); 2178 TIMEVAL_TO_TIMESPEC(&tv, 2179 &sc->ppsinfo.clear_timestamp); 2180 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2181 timespecadd(&sc->ppsinfo.clear_timestamp, 2182 &sc->ppsparam.clear_offset, 2183 &sc->ppsinfo.clear_timestamp); 2184 } 2185 2186 #ifdef PPS_SYNC 2187 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2188 hardpps(&tv, tv.tv_usec); 2189 #endif 2190 sc->ppsinfo.clear_sequence++; 2191 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2192 } 2193 } 2194 2195 /* 2196 * Process normal status changes 2197 */ 2198 if (ISSET(delta, sc->sc_msr_mask)) { 2199 SET(sc->sc_msr_delta, delta); 2200 2201 /* 2202 * Stop output immediately if we lose the output 2203 * flow control signal or carrier detect. 2204 */ 2205 if (ISSET(~msr, sc->sc_msr_mask)) { 2206 sc->sc_tbc = 0; 2207 sc->sc_heldtbc = 0; 2208 #ifdef COM_DEBUG 2209 if (com_debug) 2210 comstatus(sc, "comintr "); 2211 #endif 2212 } 2213 2214 sc->sc_st_check = 1; 2215 } 2216 } while (ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_RXRDY) 2217 || ((iir & IIR_IMASK) == 0)); 2218 2219 /* 2220 * Done handling any receive interrupts. See if data can be 2221 * transmitted as well. Schedule tx done event if no data left 2222 * and tty was marked busy. 2223 */ 2224 if (ISSET(lsr, LSR_TXRDY)) { 2225 /* 2226 * If we've delayed a parameter change, do it now, and restart 2227 * output. 2228 */ 2229 if (sc->sc_heldchange) { 2230 com_loadchannelregs(sc); 2231 sc->sc_heldchange = 0; 2232 sc->sc_tbc = sc->sc_heldtbc; 2233 sc->sc_heldtbc = 0; 2234 } 2235 2236 /* Output the next chunk of the contiguous buffer, if any. */ 2237 if (sc->sc_tbc > 0) { 2238 u_int n; 2239 2240 n = sc->sc_tbc; 2241 if (n > sc->sc_fifolen) 2242 n = sc->sc_fifolen; 2243 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2244 sc->sc_tbc -= n; 2245 sc->sc_tba += n; 2246 } else { 2247 /* Disable transmit completion interrupts if necessary. */ 2248 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2249 CLR(sc->sc_ier, IER_ETXRDY); 2250 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2251 } 2252 if (sc->sc_tx_busy) { 2253 sc->sc_tx_busy = 0; 2254 sc->sc_tx_done = 1; 2255 } 2256 } 2257 } 2258 2259 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2260 goto again; 2261 2262 COM_UNLOCK(sc); 2263 2264 /* Wake up the poller. */ 2265 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2266 softintr_schedule(sc->sc_si); 2267 #else 2268 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2269 setsoftserial(); 2270 #else 2271 if (!com_softintr_scheduled) { 2272 com_softintr_scheduled = 1; 2273 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2274 } 2275 #endif 2276 #endif 2277 2278 #if NRND > 0 && defined(RND_COM) 2279 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2280 #endif 2281 2282 return (1); 2283 } 2284 2285 /* 2286 * The following functions are polled getc and putc routines, shared 2287 * by the console and kgdb glue. 2288 * 2289 * The read-ahead code is so that you can detect pending in-band 2290 * cn_magic in polled mode while doing output rather than having to 2291 * wait until the kernel decides it needs input. 2292 */ 2293 2294 #define MAX_READAHEAD 20 2295 static int com_readahead[MAX_READAHEAD]; 2296 static int com_readaheadcount = 0; 2297 2298 int 2299 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2300 { 2301 int s = splserial(); 2302 u_char stat, c; 2303 2304 /* got a character from reading things earlier */ 2305 if (com_readaheadcount > 0) { 2306 int i; 2307 2308 c = com_readahead[0]; 2309 for (i = 1; i < com_readaheadcount; i++) { 2310 com_readahead[i-1] = com_readahead[i]; 2311 } 2312 com_readaheadcount--; 2313 splx(s); 2314 return (c); 2315 } 2316 2317 /* block until a character becomes available */ 2318 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2319 ; 2320 2321 c = bus_space_read_1(iot, ioh, com_data); 2322 stat = bus_space_read_1(iot, ioh, com_iir); 2323 { 2324 int cn_trapped = 0; /* unused */ 2325 #ifdef DDB 2326 extern int db_active; 2327 if (!db_active) 2328 #endif 2329 cn_check_magic(dev, c, com_cnm_state); 2330 } 2331 splx(s); 2332 return (c); 2333 } 2334 2335 void 2336 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2337 { 2338 int s = splserial(); 2339 int cin, stat, timo; 2340 2341 if (com_readaheadcount < MAX_READAHEAD 2342 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2343 int cn_trapped = 0; 2344 cin = bus_space_read_1(iot, ioh, com_data); 2345 stat = bus_space_read_1(iot, ioh, com_iir); 2346 cn_check_magic(dev, cin, com_cnm_state); 2347 com_readahead[com_readaheadcount++] = cin; 2348 } 2349 2350 /* wait for any pending transmission to finish */ 2351 timo = 150000; 2352 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2353 continue; 2354 2355 bus_space_write_1(iot, ioh, com_data, c); 2356 COM_BARRIER(iot, ioh, BR | BW); 2357 2358 /* wait for this transmission to complete */ 2359 timo = 1500000; 2360 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2361 continue; 2362 2363 splx(s); 2364 } 2365 2366 /* 2367 * Initialize UART for use as console or KGDB line. 2368 */ 2369 int 2370 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2371 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2372 { 2373 bus_space_handle_t ioh; 2374 2375 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2376 return (ENOMEM); /* ??? */ 2377 2378 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2379 bus_space_write_1(iot, ioh, com_efr, 0); 2380 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2381 rate = comspeed(rate, frequency, type); 2382 bus_space_write_1(iot, ioh, com_dlbl, rate); 2383 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2384 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2385 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2386 bus_space_write_1(iot, ioh, com_fifo, 2387 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2388 #ifdef COM_PXA2X0 2389 if (sc->sc_type == COM_TYPE_PXA2x0) 2390 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2391 else 2392 #endif 2393 bus_space_write_1(iot, ioh, com_ier, 0); 2394 2395 *iohp = ioh; 2396 return (0); 2397 } 2398 2399 /* 2400 * Following are all routines needed for COM to act as console 2401 */ 2402 struct consdev comcons = { 2403 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2404 NODEV, CN_NORMAL 2405 }; 2406 2407 2408 int 2409 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2410 int type, tcflag_t cflag) 2411 { 2412 int res; 2413 2414 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2415 if (res) 2416 return (res); 2417 2418 cn_tab = &comcons; 2419 cn_init_magic(&com_cnm_state); 2420 cn_set_magic("\047\001"); /* default magic is BREAK */ 2421 2422 comconstag = iot; 2423 comconsaddr = iobase; 2424 comconsrate = rate; 2425 comconscflag = cflag; 2426 2427 return (0); 2428 } 2429 2430 int 2431 comcngetc(dev_t dev) 2432 { 2433 2434 return (com_common_getc(dev, comconstag, comconsioh)); 2435 } 2436 2437 /* 2438 * Console kernel output character routine. 2439 */ 2440 void 2441 comcnputc(dev_t dev, int c) 2442 { 2443 2444 com_common_putc(dev, comconstag, comconsioh, c); 2445 } 2446 2447 void 2448 comcnpollc(dev_t dev, int on) 2449 { 2450 2451 } 2452 2453 #ifdef KGDB 2454 int 2455 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2456 int frequency, int type, tcflag_t cflag) 2457 { 2458 int res; 2459 2460 if (iot == comconstag && iobase == comconsaddr) { 2461 #if !defined(DDB) 2462 return (EBUSY); /* cannot share with console */ 2463 #else 2464 com_kgdb_ioh = comconsioh; 2465 #endif 2466 } else { 2467 res = cominit(iot, iobase, rate, frequency, type, cflag, 2468 &com_kgdb_ioh); 2469 if (res) 2470 return (res); 2471 2472 /* 2473 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2474 * expects this to be initialized 2475 */ 2476 cn_init_magic(&com_cnm_state); 2477 cn_set_magic("\047\001"); 2478 } 2479 2480 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2481 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2482 2483 com_kgdb_iot = iot; 2484 com_kgdb_addr = iobase; 2485 2486 return (0); 2487 } 2488 2489 /* ARGSUSED */ 2490 int 2491 com_kgdb_getc(void *arg) 2492 { 2493 2494 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2495 } 2496 2497 /* ARGSUSED */ 2498 void 2499 com_kgdb_putc(void *arg, int c) 2500 { 2501 2502 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2503 } 2504 #endif /* KGDB */ 2505 2506 /* helper function to identify the com ports used by 2507 console or KGDB (and not yet autoconf attached) */ 2508 int 2509 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2510 { 2511 bus_space_handle_t help; 2512 2513 if (!comconsattached && 2514 iot == comconstag && iobase == comconsaddr) 2515 help = comconsioh; 2516 #ifdef KGDB 2517 else if (!com_kgdb_attached && 2518 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2519 help = com_kgdb_ioh; 2520 #endif 2521 else 2522 return (0); 2523 2524 if (ioh) 2525 *ioh = help; 2526 return (1); 2527 } 2528
Indexes created Sun Sep 21 20:09:37 GMT 2025