com.c revision 1.225
1 /* $NetBSD: com.c,v 1.225 2004/04/05 22:33:08 enami Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.225 2004/04/05 22:33:08 enami Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* 91 * Override cnmagic(9) macro before including <sys/systm.h>. 92 * We need to know if cn_check_magic triggered debugger, so set a flag. 93 * Callers of cn_check_magic must declare int cn_trapped = 0; 94 * XXX: this is *ugly*! 95 */ 96 #define cn_trap() \ 97 do { \ 98 console_debugger(); \ 99 cn_trapped = 1; \ 100 } while (/* CONSTCOND */ 0) 101 102 #include <sys/param.h> 103 #include <sys/systm.h> 104 #include <sys/ioctl.h> 105 #include <sys/select.h> 106 #include <sys/tty.h> 107 #include <sys/proc.h> 108 #include <sys/user.h> 109 #include <sys/conf.h> 110 #include <sys/file.h> 111 #include <sys/uio.h> 112 #include <sys/kernel.h> 113 #include <sys/syslog.h> 114 #include <sys/device.h> 115 #include <sys/malloc.h> 116 #include <sys/timepps.h> 117 #include <sys/vnode.h> 118 119 #include <machine/intr.h> 120 #include <machine/bus.h> 121 122 #include <dev/ic/comreg.h> 123 #include <dev/ic/comvar.h> 124 #include <dev/ic/ns16550reg.h> 125 #include <dev/ic/st16650reg.h> 126 #ifdef COM_HAYESP 127 #include <dev/ic/hayespreg.h> 128 #endif 129 #define com_lcr com_cfcr 130 #include <dev/cons.h> 131 132 #ifdef COM_HAYESP 133 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 134 #endif 135 136 static void com_enable_debugport(struct com_softc *); 137 138 void com_config(struct com_softc *); 139 void com_shutdown(struct com_softc *); 140 int comspeed(long, long, int); 141 static u_char cflag2lcr(tcflag_t); 142 int comparam(struct tty *, struct termios *); 143 void comstart(struct tty *); 144 int comhwiflow(struct tty *, int); 145 146 void com_loadchannelregs(struct com_softc *); 147 void com_hwiflow(struct com_softc *); 148 void com_break(struct com_softc *, int); 149 void com_modem(struct com_softc *, int); 150 void tiocm_to_com(struct com_softc *, u_long, int); 151 int com_to_tiocm(struct com_softc *); 152 void com_iflush(struct com_softc *); 153 154 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 155 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 156 157 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 158 bus_space_handle_t *); 159 160 int comcngetc(dev_t); 161 void comcnputc(dev_t, int); 162 void comcnpollc(dev_t, int); 163 164 #define integrate static inline 165 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 166 void comsoft(void *); 167 #else 168 #ifndef __NO_SOFT_SERIAL_INTERRUPT 169 void comsoft(void); 170 #else 171 void comsoft(void *); 172 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 173 #endif 174 #endif 175 integrate void com_rxsoft(struct com_softc *, struct tty *); 176 integrate void com_txsoft(struct com_softc *, struct tty *); 177 integrate void com_stsoft(struct com_softc *, struct tty *); 178 integrate void com_schedrx(struct com_softc *); 179 void comdiag(void *); 180 181 extern struct cfdriver com_cd; 182 183 dev_type_open(comopen); 184 dev_type_close(comclose); 185 dev_type_read(comread); 186 dev_type_write(comwrite); 187 dev_type_ioctl(comioctl); 188 dev_type_stop(comstop); 189 dev_type_tty(comtty); 190 dev_type_poll(compoll); 191 192 const struct cdevsw com_cdevsw = { 193 comopen, comclose, comread, comwrite, comioctl, 194 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 195 }; 196 197 /* 198 * Make this an option variable one can patch. 199 * But be warned: this must be a power of 2! 200 */ 201 u_int com_rbuf_size = COM_RING_SIZE; 202 203 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 204 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 205 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 206 207 static bus_addr_t comconsaddr; 208 static bus_space_tag_t comconstag; 209 static bus_space_handle_t comconsioh; 210 static int comconsattached; 211 static int comconsrate; 212 static tcflag_t comconscflag; 213 static struct cnm_state com_cnm_state; 214 215 static int ppscap = 216 PPS_TSFMT_TSPEC | 217 PPS_CAPTUREASSERT | 218 PPS_CAPTURECLEAR | 219 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 220 221 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 222 #ifdef __NO_SOFT_SERIAL_INTERRUPT 223 volatile int com_softintr_scheduled; 224 #endif 225 #endif 226 227 #ifdef KGDB 228 #include <sys/kgdb.h> 229 230 static bus_addr_t com_kgdb_addr; 231 static bus_space_tag_t com_kgdb_iot; 232 static bus_space_handle_t com_kgdb_ioh; 233 static int com_kgdb_attached; 234 235 int com_kgdb_getc(void *); 236 void com_kgdb_putc(void *, int); 237 #endif /* KGDB */ 238 239 #define COMUNIT_MASK 0x7ffff 240 #define COMDIALOUT_MASK 0x80000 241 242 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 243 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 244 245 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 246 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 247 248 #define BR BUS_SPACE_BARRIER_READ 249 #define BW BUS_SPACE_BARRIER_WRITE 250 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 251 252 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 253 254 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 255 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 256 257 #else 258 259 #define COM_LOCK(sc) 260 #define COM_UNLOCK(sc) 261 262 #endif 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, char *); 295 void 296 comstatus(struct com_softc *sc, char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 301 sc->sc_dev.dv_xname, str, 302 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 303 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 304 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 305 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 306 sc->sc_tx_stopped ? '+' : '-'); 307 308 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 309 sc->sc_dev.dv_xname, str, 310 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 311 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 312 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 313 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 314 sc->sc_rx_flags); 315 } 316 #endif 317 318 int 319 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 320 { 321 322 /* force access to id reg */ 323 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 324 bus_space_write_1(iot, ioh, com_iir, 0); 325 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 326 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 327 return (0); 328 329 return (1); 330 } 331 332 #ifdef COM_HAYESP 333 int 334 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 335 { 336 char val, dips; 337 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 338 bus_space_tag_t iot = sc->sc_iot; 339 340 /* 341 * Hayes ESP cards have two iobases. One is for compatibility with 342 * 16550 serial chips, and at the same ISA PC base addresses. The 343 * other is for ESP-specific enhanced features, and lies at a 344 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 345 */ 346 347 /* Test for ESP signature */ 348 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 349 return (0); 350 351 /* 352 * ESP is present at ESP enhanced base address; unknown com port 353 */ 354 355 /* Get the dip-switch configurations */ 356 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 357 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 358 359 /* Determine which com port this ESP card services: bits 0,1 of */ 360 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 361 if (sc->sc_iobase != combaselist[dips & 0x03]) 362 return (0); 363 364 printf(": ESP"); 365 366 /* Check ESP Self Test bits. */ 367 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 368 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 369 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 370 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 371 if ((val & 0x70) < 0x20) { 372 printf("-old (%o)", val & 0x70); 373 /* we do not support the necessary features */ 374 return (0); 375 } 376 377 /* Check for ability to emulate 16550: bit 8 == 1 */ 378 if ((dips & 0x80) == 0) { 379 printf(" slave"); 380 /* XXX Does slave really mean no 16550 support?? */ 381 return (0); 382 } 383 384 /* 385 * If we made it this far, we are a full-featured ESP v2.0 (or 386 * better), at the correct com port address. 387 */ 388 389 sc->sc_type = COM_TYPE_HAYESP; 390 printf(", 1024 byte fifo\n"); 391 return (1); 392 } 393 #endif 394 395 static void 396 com_enable_debugport(struct com_softc *sc) 397 { 398 int s; 399 400 /* Turn on line break interrupt, set carrier. */ 401 s = splserial(); 402 COM_LOCK(sc); 403 sc->sc_ier = IER_ERXRDY; 404 #ifdef COM_PXA2X0 405 if (sc->sc_type == COM_TYPE_PXA2x0) 406 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 407 #endif 408 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 409 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 410 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 411 COM_UNLOCK(sc); 412 splx(s); 413 } 414 415 void 416 com_attach_subr(struct com_softc *sc) 417 { 418 bus_addr_t iobase = sc->sc_iobase; 419 bus_space_tag_t iot = sc->sc_iot; 420 bus_space_handle_t ioh = sc->sc_ioh; 421 struct tty *tp; 422 #ifdef COM16650 423 u_int8_t lcr; 424 #endif 425 #ifdef COM_HAYESP 426 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 427 int *hayespp; 428 #endif 429 const char *fifo_msg = NULL; 430 431 callout_init(&sc->sc_diag_callout); 432 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 433 simple_lock_init(&sc->sc_lock); 434 #endif 435 436 /* Disable interrupts before configuring the device. */ 437 #ifdef COM_PXA2X0 438 if (sc->sc_type == COM_TYPE_PXA2x0) 439 sc->sc_ier = IER_EUART; 440 else 441 #endif 442 sc->sc_ier = 0; 443 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 444 445 if (iot == comconstag && iobase == comconsaddr) { 446 comconsattached = 1; 447 448 /* Make sure the console is always "hardwired". */ 449 delay(1000); /* wait for output to finish */ 450 SET(sc->sc_hwflags, COM_HW_CONSOLE); 451 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 452 } 453 454 #ifdef COM_HAYESP 455 sc->sc_prescaler = 0; /* set prescaler to x1. */ 456 457 /* Look for a Hayes ESP board. */ 458 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 459 bus_space_handle_t hayespioh; 460 461 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 462 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 463 continue; 464 if (comprobeHAYESP(hayespioh, sc)) { 465 sc->sc_hayespioh = hayespioh; 466 sc->sc_fifolen = 1024; 467 468 break; 469 } 470 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 471 } 472 /* No ESP; look for other things. */ 473 if (sc->sc_type != COM_TYPE_HAYESP) { 474 #endif 475 sc->sc_fifolen = 1; 476 /* look for a NS 16550AF UART with FIFOs */ 477 bus_space_write_1(iot, ioh, com_fifo, 478 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 479 delay(100); 480 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 481 == IIR_FIFO_MASK) 482 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 483 == FIFO_TRIGGER_14) { 484 SET(sc->sc_hwflags, COM_HW_FIFO); 485 486 #ifdef COM16650 487 /* 488 * IIR changes into the EFR if LCR is set to LCR_EERS 489 * on 16650s. We also know IIR != 0 at this point. 490 * Write 0 into the EFR, and read it. If the result 491 * is 0, we have a 16650. 492 * 493 * Older 16650s were broken; the test to detect them 494 * is taken from the Linux driver. Apparently 495 * setting DLAB enable gives access to the EFR on 496 * these chips. 497 */ 498 lcr = bus_space_read_1(iot, ioh, com_lcr); 499 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 500 bus_space_write_1(iot, ioh, com_efr, 0); 501 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 502 bus_space_write_1(iot, ioh, com_lcr, 503 lcr | LCR_DLAB); 504 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 505 CLR(sc->sc_hwflags, COM_HW_FIFO); 506 sc->sc_fifolen = 0; 507 } else { 508 SET(sc->sc_hwflags, COM_HW_FLOW); 509 sc->sc_fifolen = 32; 510 } 511 } else 512 #endif 513 sc->sc_fifolen = 16; 514 515 #ifdef COM16650 516 bus_space_write_1(iot, ioh, com_lcr, lcr); 517 if (sc->sc_fifolen == 0) 518 fifo_msg = "st16650, broken fifo"; 519 else if (sc->sc_fifolen == 32) 520 fifo_msg = "st16650a, working fifo"; 521 else 522 #endif 523 fifo_msg = "ns16550a, working fifo"; 524 } else 525 fifo_msg = "ns16550, broken fifo"; 526 else 527 fifo_msg = "ns8250 or ns16450, no fifo"; 528 bus_space_write_1(iot, ioh, com_fifo, 0); 529 /* 530 * Some chips will clear down both Tx and Rx FIFOs when zero is 531 * written to com_fifo. If this chip is the console, writing zero 532 * results in some of the chip/FIFO description being lost, so delay 533 * printing it until now. 534 */ 535 delay(10); 536 aprint_normal(": %s\n", fifo_msg); 537 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 538 sc->sc_fifolen = 1; 539 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 540 } 541 #ifdef COM_HAYESP 542 } 543 #endif 544 545 tp = ttymalloc(); 546 tp->t_oproc = comstart; 547 tp->t_param = comparam; 548 tp->t_hwiflow = comhwiflow; 549 550 sc->sc_tty = tp; 551 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 552 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 553 sc->sc_rbavail = com_rbuf_size; 554 if (sc->sc_rbuf == NULL) { 555 aprint_error("%s: unable to allocate ring buffer\n", 556 sc->sc_dev.dv_xname); 557 return; 558 } 559 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 560 561 tty_attach(tp); 562 563 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 564 SET(sc->sc_mcr, MCR_IENABLE); 565 566 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 567 int maj; 568 569 /* locate the major number */ 570 maj = cdevsw_lookup_major(&com_cdevsw); 571 572 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 573 574 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 575 } 576 577 #ifdef KGDB 578 /* 579 * Allow kgdb to "take over" this port. If this is 580 * not the console and is the kgdb device, it has 581 * exclusive use. If it's the console _and_ the 582 * kgdb device, it doesn't. 583 */ 584 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 585 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 586 com_kgdb_attached = 1; 587 588 SET(sc->sc_hwflags, COM_HW_KGDB); 589 } 590 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 591 } 592 #endif 593 594 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 595 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 596 #endif 597 598 #if NRND > 0 && defined(RND_COM) 599 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 600 RND_TYPE_TTY, 0); 601 #endif 602 603 /* if there are no enable/disable functions, assume the device 604 is always enabled */ 605 if (!sc->enable) 606 sc->enabled = 1; 607 608 com_config(sc); 609 610 SET(sc->sc_hwflags, COM_HW_DEV_OK); 611 } 612 613 void 614 com_config(struct com_softc *sc) 615 { 616 bus_space_tag_t iot = sc->sc_iot; 617 bus_space_handle_t ioh = sc->sc_ioh; 618 619 /* Disable interrupts before configuring the device. */ 620 #ifdef COM_PXA2X0 621 if (sc->sc_type == COM_TYPE_PXA2x0) 622 sc->sc_ier = IER_EUART; 623 else 624 #endif 625 sc->sc_ier = 0; 626 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 627 628 #ifdef COM_HAYESP 629 /* Look for a Hayes ESP board. */ 630 if (sc->sc_type == COM_TYPE_HAYESP) { 631 sc->sc_fifolen = 1024; 632 633 /* Set 16550 compatibility mode */ 634 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 635 HAYESP_SETMODE); 636 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 637 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 638 HAYESP_MODE_SCALE); 639 640 /* Set RTS/CTS flow control */ 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 642 HAYESP_SETFLOWTYPE); 643 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 644 HAYESP_FLOW_RTS); 645 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 646 HAYESP_FLOW_CTS); 647 648 /* Set flow control levels */ 649 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 650 HAYESP_SETRXFLOW); 651 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 652 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 653 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 654 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 655 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 656 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 657 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 658 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 659 } 660 #endif 661 662 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 663 com_enable_debugport(sc); 664 } 665 666 int 667 com_detach(struct device *self, int flags) 668 { 669 struct com_softc *sc = (struct com_softc *)self; 670 int maj, mn; 671 672 /* locate the major number */ 673 maj = cdevsw_lookup_major(&com_cdevsw); 674 675 /* Nuke the vnodes for any open instances. */ 676 mn = self->dv_unit; 677 vdevgone(maj, mn, mn, VCHR); 678 679 mn |= COMDIALOUT_MASK; 680 vdevgone(maj, mn, mn, VCHR); 681 682 if (sc->sc_rbuf == NULL) { 683 /* 684 * Ring buffer allocation failed in the com_attach_subr, 685 * only the tty is allocated, and nothing else. 686 */ 687 ttyfree(sc->sc_tty); 688 return 0; 689 } 690 691 /* Free the receive buffer. */ 692 free(sc->sc_rbuf, M_DEVBUF); 693 694 /* Detach and free the tty. */ 695 tty_detach(sc->sc_tty); 696 ttyfree(sc->sc_tty); 697 698 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 699 /* Unhook the soft interrupt handler. */ 700 softintr_disestablish(sc->sc_si); 701 #endif 702 703 #if NRND > 0 && defined(RND_COM) 704 /* Unhook the entropy source. */ 705 rnd_detach_source(&sc->rnd_source); 706 #endif 707 708 return (0); 709 } 710 711 int 712 com_activate(struct device *self, enum devact act) 713 { 714 struct com_softc *sc = (struct com_softc *)self; 715 int s, rv = 0; 716 717 s = splserial(); 718 COM_LOCK(sc); 719 switch (act) { 720 case DVACT_ACTIVATE: 721 rv = EOPNOTSUPP; 722 break; 723 724 case DVACT_DEACTIVATE: 725 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 726 rv = EBUSY; 727 break; 728 } 729 730 if (sc->disable != NULL && sc->enabled != 0) { 731 (*sc->disable)(sc); 732 sc->enabled = 0; 733 } 734 break; 735 } 736 737 COM_UNLOCK(sc); 738 splx(s); 739 return (rv); 740 } 741 742 void 743 com_shutdown(struct com_softc *sc) 744 { 745 struct tty *tp = sc->sc_tty; 746 int s; 747 748 s = splserial(); 749 COM_LOCK(sc); 750 751 /* If we were asserting flow control, then deassert it. */ 752 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 753 com_hwiflow(sc); 754 755 /* Clear any break condition set with TIOCSBRK. */ 756 com_break(sc, 0); 757 758 /* Turn off PPS capture on last close. */ 759 sc->sc_ppsmask = 0; 760 sc->ppsparam.mode = 0; 761 762 /* 763 * Hang up if necessary. Wait a bit, so the other side has time to 764 * notice even if we immediately open the port again. 765 * Avoid tsleeping above splhigh(). 766 */ 767 if (ISSET(tp->t_cflag, HUPCL)) { 768 com_modem(sc, 0); 769 COM_UNLOCK(sc); 770 splx(s); 771 /* XXX tsleep will only timeout */ 772 (void) tsleep(sc, TTIPRI, ttclos, hz); 773 s = splserial(); 774 COM_LOCK(sc); 775 } 776 777 /* Turn off interrupts. */ 778 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 779 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 780 #ifdef COM_PXA2X0 781 if (sc->sc_type == COM_TYPE_PXA2x0) 782 sc->sc_ier |= IER_ERXTOUT; 783 #endif 784 } else 785 sc->sc_ier = 0; 786 787 #ifdef COM_PXA2X0 788 if (sc->sc_type == COM_TYPE_PXA2x0) 789 sc->sc_ier |= IER_EUART; 790 #endif 791 792 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 793 794 if (sc->disable) { 795 #ifdef DIAGNOSTIC 796 if (!sc->enabled) 797 panic("com_shutdown: not enabled?"); 798 #endif 799 (*sc->disable)(sc); 800 sc->enabled = 0; 801 } 802 COM_UNLOCK(sc); 803 splx(s); 804 } 805 806 int 807 comopen(dev_t dev, int flag, int mode, struct proc *p) 808 { 809 struct com_softc *sc; 810 struct tty *tp; 811 int s, s2; 812 int error; 813 814 sc = device_lookup(&com_cd, COMUNIT(dev)); 815 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 816 sc->sc_rbuf == NULL) 817 return (ENXIO); 818 819 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 820 return (ENXIO); 821 822 #ifdef KGDB 823 /* 824 * If this is the kgdb port, no other use is permitted. 825 */ 826 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 827 return (EBUSY); 828 #endif 829 830 tp = sc->sc_tty; 831 832 if (ISSET(tp->t_state, TS_ISOPEN) && 833 ISSET(tp->t_state, TS_XCLUDE) && 834 p->p_ucred->cr_uid != 0) 835 return (EBUSY); 836 837 s = spltty(); 838 839 /* 840 * Do the following iff this is a first open. 841 */ 842 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 843 struct termios t; 844 845 tp->t_dev = dev; 846 847 s2 = splserial(); 848 COM_LOCK(sc); 849 850 if (sc->enable) { 851 if ((*sc->enable)(sc)) { 852 COM_UNLOCK(sc); 853 splx(s2); 854 splx(s); 855 printf("%s: device enable failed\n", 856 sc->sc_dev.dv_xname); 857 return (EIO); 858 } 859 sc->enabled = 1; 860 com_config(sc); 861 } 862 863 /* Turn on interrupts. */ 864 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 865 #ifdef COM_PXA2X0 866 if (sc->sc_type == COM_TYPE_PXA2x0) 867 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 868 #endif 869 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 870 871 /* Fetch the current modem control status, needed later. */ 872 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 873 874 /* Clear PPS capture state on first open. */ 875 sc->sc_ppsmask = 0; 876 sc->ppsparam.mode = 0; 877 878 COM_UNLOCK(sc); 879 splx(s2); 880 881 /* 882 * Initialize the termios status to the defaults. Add in the 883 * sticky bits from TIOCSFLAGS. 884 */ 885 t.c_ispeed = 0; 886 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 887 t.c_ospeed = comconsrate; 888 t.c_cflag = comconscflag; 889 } else { 890 t.c_ospeed = TTYDEF_SPEED; 891 t.c_cflag = TTYDEF_CFLAG; 892 } 893 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 894 SET(t.c_cflag, CLOCAL); 895 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 896 SET(t.c_cflag, CRTSCTS); 897 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 898 SET(t.c_cflag, MDMBUF); 899 /* Make sure comparam() will do something. */ 900 tp->t_ospeed = 0; 901 (void) comparam(tp, &t); 902 tp->t_iflag = TTYDEF_IFLAG; 903 tp->t_oflag = TTYDEF_OFLAG; 904 tp->t_lflag = TTYDEF_LFLAG; 905 ttychars(tp); 906 ttsetwater(tp); 907 908 s2 = splserial(); 909 COM_LOCK(sc); 910 911 /* 912 * Turn on DTR. We must always do this, even if carrier is not 913 * present, because otherwise we'd have to use TIOCSDTR 914 * immediately after setting CLOCAL, which applications do not 915 * expect. We always assert DTR while the device is open 916 * unless explicitly requested to deassert it. 917 */ 918 com_modem(sc, 1); 919 920 /* Clear the input ring, and unblock. */ 921 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 922 sc->sc_rbavail = com_rbuf_size; 923 com_iflush(sc); 924 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 925 com_hwiflow(sc); 926 927 #ifdef COM_DEBUG 928 if (com_debug) 929 comstatus(sc, "comopen "); 930 #endif 931 932 COM_UNLOCK(sc); 933 splx(s2); 934 } 935 936 splx(s); 937 938 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 939 if (error) 940 goto bad; 941 942 error = (*tp->t_linesw->l_open)(dev, tp); 943 if (error) 944 goto bad; 945 946 return (0); 947 948 bad: 949 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 950 /* 951 * We failed to open the device, and nobody else had it opened. 952 * Clean up the state as appropriate. 953 */ 954 com_shutdown(sc); 955 } 956 957 return (error); 958 } 959 960 int 961 comclose(dev_t dev, int flag, int mode, struct proc *p) 962 { 963 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 /* XXX This is for cons.c. */ 967 if (!ISSET(tp->t_state, TS_ISOPEN)) 968 return (0); 969 970 (*tp->t_linesw->l_close)(tp, flag); 971 ttyclose(tp); 972 973 if (COM_ISALIVE(sc) == 0) 974 return (0); 975 976 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 977 /* 978 * Although we got a last close, the device may still be in 979 * use; e.g. if this was the dialout node, and there are still 980 * processes waiting for carrier on the non-dialout node. 981 */ 982 com_shutdown(sc); 983 } 984 985 return (0); 986 } 987 988 int 989 comread(dev_t dev, struct uio *uio, int flag) 990 { 991 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 992 struct tty *tp = sc->sc_tty; 993 994 if (COM_ISALIVE(sc) == 0) 995 return (EIO); 996 997 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 998 } 999 1000 int 1001 comwrite(dev_t dev, struct uio *uio, int flag) 1002 { 1003 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1004 struct tty *tp = sc->sc_tty; 1005 1006 if (COM_ISALIVE(sc) == 0) 1007 return (EIO); 1008 1009 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1010 } 1011 1012 int 1013 compoll(dev_t dev, int events, struct proc *p) 1014 { 1015 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1016 struct tty *tp = sc->sc_tty; 1017 1018 if (COM_ISALIVE(sc) == 0) 1019 return (EIO); 1020 1021 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1022 } 1023 1024 struct tty * 1025 comtty(dev_t dev) 1026 { 1027 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1028 struct tty *tp = sc->sc_tty; 1029 1030 return (tp); 1031 } 1032 1033 int 1034 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1035 { 1036 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1037 struct tty *tp = sc->sc_tty; 1038 int error; 1039 int s; 1040 1041 if (COM_ISALIVE(sc) == 0) 1042 return (EIO); 1043 1044 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1045 if (error != EPASSTHROUGH) 1046 return (error); 1047 1048 error = ttioctl(tp, cmd, data, flag, p); 1049 if (error != EPASSTHROUGH) 1050 return (error); 1051 1052 error = 0; 1053 1054 s = splserial(); 1055 COM_LOCK(sc); 1056 1057 switch (cmd) { 1058 case TIOCSBRK: 1059 com_break(sc, 1); 1060 break; 1061 1062 case TIOCCBRK: 1063 com_break(sc, 0); 1064 break; 1065 1066 case TIOCSDTR: 1067 com_modem(sc, 1); 1068 break; 1069 1070 case TIOCCDTR: 1071 com_modem(sc, 0); 1072 break; 1073 1074 case TIOCGFLAGS: 1075 *(int *)data = sc->sc_swflags; 1076 break; 1077 1078 case TIOCSFLAGS: 1079 error = suser(p->p_ucred, &p->p_acflag); 1080 if (error) 1081 break; 1082 sc->sc_swflags = *(int *)data; 1083 break; 1084 1085 case TIOCMSET: 1086 case TIOCMBIS: 1087 case TIOCMBIC: 1088 tiocm_to_com(sc, cmd, *(int *)data); 1089 break; 1090 1091 case TIOCMGET: 1092 *(int *)data = com_to_tiocm(sc); 1093 break; 1094 1095 case PPS_IOC_CREATE: 1096 break; 1097 1098 case PPS_IOC_DESTROY: 1099 break; 1100 1101 case PPS_IOC_GETPARAMS: { 1102 pps_params_t *pp; 1103 pp = (pps_params_t *)data; 1104 *pp = sc->ppsparam; 1105 break; 1106 } 1107 1108 case PPS_IOC_SETPARAMS: { 1109 pps_params_t *pp; 1110 int mode; 1111 pp = (pps_params_t *)data; 1112 if (pp->mode & ~ppscap) { 1113 error = EINVAL; 1114 break; 1115 } 1116 sc->ppsparam = *pp; 1117 /* 1118 * Compute msr masks from user-specified timestamp state. 1119 */ 1120 mode = sc->ppsparam.mode; 1121 switch (mode & PPS_CAPTUREBOTH) { 1122 case 0: 1123 sc->sc_ppsmask = 0; 1124 break; 1125 1126 case PPS_CAPTUREASSERT: 1127 sc->sc_ppsmask = MSR_DCD; 1128 sc->sc_ppsassert = MSR_DCD; 1129 sc->sc_ppsclear = -1; 1130 break; 1131 1132 case PPS_CAPTURECLEAR: 1133 sc->sc_ppsmask = MSR_DCD; 1134 sc->sc_ppsassert = -1; 1135 sc->sc_ppsclear = 0; 1136 break; 1137 1138 case PPS_CAPTUREBOTH: 1139 sc->sc_ppsmask = MSR_DCD; 1140 sc->sc_ppsassert = MSR_DCD; 1141 sc->sc_ppsclear = 0; 1142 break; 1143 1144 default: 1145 error = EINVAL; 1146 break; 1147 } 1148 break; 1149 } 1150 1151 case PPS_IOC_GETCAP: 1152 *(int*)data = ppscap; 1153 break; 1154 1155 case PPS_IOC_FETCH: { 1156 pps_info_t *pi; 1157 pi = (pps_info_t *)data; 1158 *pi = sc->ppsinfo; 1159 break; 1160 } 1161 1162 #ifdef PPS_SYNC 1163 case PPS_IOC_KCBIND: { 1164 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1165 1166 if (edge == 0) { 1167 /* 1168 * remove binding for this source; ignore 1169 * the request if this is not the current 1170 * hardpps source 1171 */ 1172 if (pps_kc_hardpps_source == sc) { 1173 pps_kc_hardpps_source = NULL; 1174 pps_kc_hardpps_mode = 0; 1175 } 1176 } else { 1177 /* 1178 * bind hardpps to this source, replacing any 1179 * previously specified source or edges 1180 */ 1181 pps_kc_hardpps_source = sc; 1182 pps_kc_hardpps_mode = edge; 1183 } 1184 break; 1185 } 1186 #endif /* PPS_SYNC */ 1187 1188 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1189 /* 1190 * Some GPS clocks models use the falling rather than 1191 * rising edge as the on-the-second signal. 1192 * The old API has no way to specify PPS polarity. 1193 */ 1194 sc->sc_ppsmask = MSR_DCD; 1195 #ifndef PPS_TRAILING_EDGE 1196 sc->sc_ppsassert = MSR_DCD; 1197 sc->sc_ppsclear = -1; 1198 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1199 &sc->ppsinfo.assert_timestamp); 1200 #else 1201 sc->sc_ppsassert = -1; 1202 sc->sc_ppsclear = 0; 1203 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1204 &sc->ppsinfo.clear_timestamp); 1205 #endif 1206 break; 1207 1208 default: 1209 error = EPASSTHROUGH; 1210 break; 1211 } 1212 1213 COM_UNLOCK(sc); 1214 splx(s); 1215 1216 #ifdef COM_DEBUG 1217 if (com_debug) 1218 comstatus(sc, "comioctl "); 1219 #endif 1220 1221 return (error); 1222 } 1223 1224 integrate void 1225 com_schedrx(struct com_softc *sc) 1226 { 1227 1228 sc->sc_rx_ready = 1; 1229 1230 /* Wake up the poller. */ 1231 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1232 softintr_schedule(sc->sc_si); 1233 #else 1234 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1235 setsoftserial(); 1236 #else 1237 if (!com_softintr_scheduled) { 1238 com_softintr_scheduled = 1; 1239 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1240 } 1241 #endif 1242 #endif 1243 } 1244 1245 void 1246 com_break(struct com_softc *sc, int onoff) 1247 { 1248 1249 if (onoff) 1250 SET(sc->sc_lcr, LCR_SBREAK); 1251 else 1252 CLR(sc->sc_lcr, LCR_SBREAK); 1253 1254 if (!sc->sc_heldchange) { 1255 if (sc->sc_tx_busy) { 1256 sc->sc_heldtbc = sc->sc_tbc; 1257 sc->sc_tbc = 0; 1258 sc->sc_heldchange = 1; 1259 } else 1260 com_loadchannelregs(sc); 1261 } 1262 } 1263 1264 void 1265 com_modem(struct com_softc *sc, int onoff) 1266 { 1267 1268 if (sc->sc_mcr_dtr == 0) 1269 return; 1270 1271 if (onoff) 1272 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1273 else 1274 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1275 1276 if (!sc->sc_heldchange) { 1277 if (sc->sc_tx_busy) { 1278 sc->sc_heldtbc = sc->sc_tbc; 1279 sc->sc_tbc = 0; 1280 sc->sc_heldchange = 1; 1281 } else 1282 com_loadchannelregs(sc); 1283 } 1284 } 1285 1286 void 1287 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1288 { 1289 u_char combits; 1290 1291 combits = 0; 1292 if (ISSET(ttybits, TIOCM_DTR)) 1293 SET(combits, MCR_DTR); 1294 if (ISSET(ttybits, TIOCM_RTS)) 1295 SET(combits, MCR_RTS); 1296 1297 switch (how) { 1298 case TIOCMBIC: 1299 CLR(sc->sc_mcr, combits); 1300 break; 1301 1302 case TIOCMBIS: 1303 SET(sc->sc_mcr, combits); 1304 break; 1305 1306 case TIOCMSET: 1307 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1308 SET(sc->sc_mcr, combits); 1309 break; 1310 } 1311 1312 if (!sc->sc_heldchange) { 1313 if (sc->sc_tx_busy) { 1314 sc->sc_heldtbc = sc->sc_tbc; 1315 sc->sc_tbc = 0; 1316 sc->sc_heldchange = 1; 1317 } else 1318 com_loadchannelregs(sc); 1319 } 1320 } 1321 1322 int 1323 com_to_tiocm(struct com_softc *sc) 1324 { 1325 u_char combits; 1326 int ttybits = 0; 1327 1328 combits = sc->sc_mcr; 1329 if (ISSET(combits, MCR_DTR)) 1330 SET(ttybits, TIOCM_DTR); 1331 if (ISSET(combits, MCR_RTS)) 1332 SET(ttybits, TIOCM_RTS); 1333 1334 combits = sc->sc_msr; 1335 if (ISSET(combits, MSR_DCD)) 1336 SET(ttybits, TIOCM_CD); 1337 if (ISSET(combits, MSR_CTS)) 1338 SET(ttybits, TIOCM_CTS); 1339 if (ISSET(combits, MSR_DSR)) 1340 SET(ttybits, TIOCM_DSR); 1341 if (ISSET(combits, MSR_RI | MSR_TERI)) 1342 SET(ttybits, TIOCM_RI); 1343 1344 #ifdef COM_PXA2X0 1345 if (sc->sc_type == COM_TYPE_PXA2x0) { 1346 if ((sc->sc_ier & 0x0f) != 0) 1347 SET(ttybits, TIOCM_LE); 1348 } else 1349 #endif 1350 if ((sc->sc_ier & 0xbf) != 0) 1351 SET(ttybits, TIOCM_LE); 1352 1353 return (ttybits); 1354 } 1355 1356 static u_char 1357 cflag2lcr(tcflag_t cflag) 1358 { 1359 u_char lcr = 0; 1360 1361 switch (ISSET(cflag, CSIZE)) { 1362 case CS5: 1363 SET(lcr, LCR_5BITS); 1364 break; 1365 case CS6: 1366 SET(lcr, LCR_6BITS); 1367 break; 1368 case CS7: 1369 SET(lcr, LCR_7BITS); 1370 break; 1371 case CS8: 1372 SET(lcr, LCR_8BITS); 1373 break; 1374 } 1375 if (ISSET(cflag, PARENB)) { 1376 SET(lcr, LCR_PENAB); 1377 if (!ISSET(cflag, PARODD)) 1378 SET(lcr, LCR_PEVEN); 1379 } 1380 if (ISSET(cflag, CSTOPB)) 1381 SET(lcr, LCR_STOPB); 1382 1383 return (lcr); 1384 } 1385 1386 int 1387 comparam(struct tty *tp, struct termios *t) 1388 { 1389 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1390 int ospeed; 1391 u_char lcr; 1392 int s; 1393 1394 if (COM_ISALIVE(sc) == 0) 1395 return (EIO); 1396 1397 #ifdef COM_HAYESP 1398 if (sc->sc_type == COM_TYPE_HAYESP) { 1399 int prescaler, speed; 1400 1401 /* 1402 * Calculate UART clock prescaler. It should be in 1403 * range of 0 .. 3. 1404 */ 1405 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1406 prescaler++, speed /= 2) 1407 if ((ospeed = comspeed(speed, sc->sc_frequency, 1408 sc->sc_type)) > 0) 1409 break; 1410 1411 if (prescaler == 4) 1412 return (EINVAL); 1413 sc->sc_prescaler = prescaler; 1414 } else 1415 #endif 1416 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1417 1418 /* Check requested parameters. */ 1419 if (ospeed < 0) 1420 return (EINVAL); 1421 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1422 return (EINVAL); 1423 1424 /* 1425 * For the console, always force CLOCAL and !HUPCL, so that the port 1426 * is always active. 1427 */ 1428 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1429 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1430 SET(t->c_cflag, CLOCAL); 1431 CLR(t->c_cflag, HUPCL); 1432 } 1433 1434 /* 1435 * If there were no changes, don't do anything. This avoids dropping 1436 * input and improves performance when all we did was frob things like 1437 * VMIN and VTIME. 1438 */ 1439 if (tp->t_ospeed == t->c_ospeed && 1440 tp->t_cflag == t->c_cflag) 1441 return (0); 1442 1443 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1444 1445 s = splserial(); 1446 COM_LOCK(sc); 1447 1448 sc->sc_lcr = lcr; 1449 1450 /* 1451 * If we're not in a mode that assumes a connection is present, then 1452 * ignore carrier changes. 1453 */ 1454 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1455 sc->sc_msr_dcd = 0; 1456 else 1457 sc->sc_msr_dcd = MSR_DCD; 1458 /* 1459 * Set the flow control pins depending on the current flow control 1460 * mode. 1461 */ 1462 if (ISSET(t->c_cflag, CRTSCTS)) { 1463 sc->sc_mcr_dtr = MCR_DTR; 1464 sc->sc_mcr_rts = MCR_RTS; 1465 sc->sc_msr_cts = MSR_CTS; 1466 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1467 } else if (ISSET(t->c_cflag, MDMBUF)) { 1468 /* 1469 * For DTR/DCD flow control, make sure we don't toggle DTR for 1470 * carrier detection. 1471 */ 1472 sc->sc_mcr_dtr = 0; 1473 sc->sc_mcr_rts = MCR_DTR; 1474 sc->sc_msr_cts = MSR_DCD; 1475 sc->sc_efr = 0; 1476 } else { 1477 /* 1478 * If no flow control, then always set RTS. This will make 1479 * the other side happy if it mistakenly thinks we're doing 1480 * RTS/CTS flow control. 1481 */ 1482 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1483 sc->sc_mcr_rts = 0; 1484 sc->sc_msr_cts = 0; 1485 sc->sc_efr = 0; 1486 if (ISSET(sc->sc_mcr, MCR_DTR)) 1487 SET(sc->sc_mcr, MCR_RTS); 1488 else 1489 CLR(sc->sc_mcr, MCR_RTS); 1490 } 1491 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1492 1493 #if 0 1494 if (ospeed == 0) 1495 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1496 else 1497 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1498 #endif 1499 1500 sc->sc_dlbl = ospeed; 1501 sc->sc_dlbh = ospeed >> 8; 1502 1503 /* 1504 * Set the FIFO threshold based on the receive speed. 1505 * 1506 * * If it's a low speed, it's probably a mouse or some other 1507 * interactive device, so set the threshold low. 1508 * * If it's a high speed, trim the trigger level down to prevent 1509 * overflows. 1510 * * Otherwise set it a bit higher. 1511 */ 1512 if (sc->sc_type == COM_TYPE_HAYESP) 1513 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1514 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1515 sc->sc_fifo = FIFO_ENABLE | 1516 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1517 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1518 else 1519 sc->sc_fifo = 0; 1520 1521 /* And copy to tty. */ 1522 tp->t_ispeed = 0; 1523 tp->t_ospeed = t->c_ospeed; 1524 tp->t_cflag = t->c_cflag; 1525 1526 if (!sc->sc_heldchange) { 1527 if (sc->sc_tx_busy) { 1528 sc->sc_heldtbc = sc->sc_tbc; 1529 sc->sc_tbc = 0; 1530 sc->sc_heldchange = 1; 1531 } else 1532 com_loadchannelregs(sc); 1533 } 1534 1535 if (!ISSET(t->c_cflag, CHWFLOW)) { 1536 /* Disable the high water mark. */ 1537 sc->sc_r_hiwat = 0; 1538 sc->sc_r_lowat = 0; 1539 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1540 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1541 com_schedrx(sc); 1542 } 1543 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1544 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1545 com_hwiflow(sc); 1546 } 1547 } else { 1548 sc->sc_r_hiwat = com_rbuf_hiwat; 1549 sc->sc_r_lowat = com_rbuf_lowat; 1550 } 1551 1552 COM_UNLOCK(sc); 1553 splx(s); 1554 1555 /* 1556 * Update the tty layer's idea of the carrier bit, in case we changed 1557 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1558 * explicit request. 1559 */ 1560 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1561 1562 #ifdef COM_DEBUG 1563 if (com_debug) 1564 comstatus(sc, "comparam "); 1565 #endif 1566 1567 if (!ISSET(t->c_cflag, CHWFLOW)) { 1568 if (sc->sc_tx_stopped) { 1569 sc->sc_tx_stopped = 0; 1570 comstart(tp); 1571 } 1572 } 1573 1574 return (0); 1575 } 1576 1577 void 1578 com_iflush(struct com_softc *sc) 1579 { 1580 bus_space_tag_t iot = sc->sc_iot; 1581 bus_space_handle_t ioh = sc->sc_ioh; 1582 #ifdef DIAGNOSTIC 1583 int reg; 1584 #endif 1585 int timo; 1586 1587 #ifdef DIAGNOSTIC 1588 reg = 0xffff; 1589 #endif 1590 timo = 50000; 1591 /* flush any pending I/O */ 1592 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1593 && --timo) 1594 #ifdef DIAGNOSTIC 1595 reg = 1596 #else 1597 (void) 1598 #endif 1599 bus_space_read_1(iot, ioh, com_data); 1600 #ifdef DIAGNOSTIC 1601 if (!timo) 1602 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1603 reg); 1604 #endif 1605 } 1606 1607 void 1608 com_loadchannelregs(struct com_softc *sc) 1609 { 1610 bus_space_tag_t iot = sc->sc_iot; 1611 bus_space_handle_t ioh = sc->sc_ioh; 1612 1613 /* XXXXX necessary? */ 1614 com_iflush(sc); 1615 1616 #ifdef COM_PXA2X0 1617 if (sc->sc_type == COM_TYPE_PXA2x0) 1618 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1619 else 1620 #endif 1621 bus_space_write_1(iot, ioh, com_ier, 0); 1622 1623 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1624 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1625 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1626 } 1627 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1628 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1629 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1630 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1631 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1632 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1633 #ifdef COM_HAYESP 1634 if (sc->sc_type == COM_TYPE_HAYESP) { 1635 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1636 HAYESP_SETPRESCALER); 1637 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1638 sc->sc_prescaler); 1639 } 1640 #endif 1641 1642 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1643 } 1644 1645 int 1646 comhwiflow(struct tty *tp, int block) 1647 { 1648 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1649 int s; 1650 1651 if (COM_ISALIVE(sc) == 0) 1652 return (0); 1653 1654 if (sc->sc_mcr_rts == 0) 1655 return (0); 1656 1657 s = splserial(); 1658 COM_LOCK(sc); 1659 1660 if (block) { 1661 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1662 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1663 com_hwiflow(sc); 1664 } 1665 } else { 1666 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1667 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1668 com_schedrx(sc); 1669 } 1670 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1671 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1672 com_hwiflow(sc); 1673 } 1674 } 1675 1676 COM_UNLOCK(sc); 1677 splx(s); 1678 return (1); 1679 } 1680 1681 /* 1682 * (un)block input via hw flowcontrol 1683 */ 1684 void 1685 com_hwiflow(struct com_softc *sc) 1686 { 1687 bus_space_tag_t iot = sc->sc_iot; 1688 bus_space_handle_t ioh = sc->sc_ioh; 1689 1690 if (sc->sc_mcr_rts == 0) 1691 return; 1692 1693 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1694 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1695 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1696 } else { 1697 SET(sc->sc_mcr, sc->sc_mcr_rts); 1698 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1699 } 1700 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1701 } 1702 1703 1704 void 1705 comstart(struct tty *tp) 1706 { 1707 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1708 bus_space_tag_t iot = sc->sc_iot; 1709 bus_space_handle_t ioh = sc->sc_ioh; 1710 int s; 1711 1712 if (COM_ISALIVE(sc) == 0) 1713 return; 1714 1715 s = spltty(); 1716 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1717 goto out; 1718 if (sc->sc_tx_stopped) 1719 goto out; 1720 1721 if (tp->t_outq.c_cc <= tp->t_lowat) { 1722 if (ISSET(tp->t_state, TS_ASLEEP)) { 1723 CLR(tp->t_state, TS_ASLEEP); 1724 wakeup(&tp->t_outq); 1725 } 1726 selwakeup(&tp->t_wsel); 1727 if (tp->t_outq.c_cc == 0) 1728 goto out; 1729 } 1730 1731 /* Grab the first contiguous region of buffer space. */ 1732 { 1733 u_char *tba; 1734 int tbc; 1735 1736 tba = tp->t_outq.c_cf; 1737 tbc = ndqb(&tp->t_outq, 0); 1738 1739 (void)splserial(); 1740 COM_LOCK(sc); 1741 1742 sc->sc_tba = tba; 1743 sc->sc_tbc = tbc; 1744 } 1745 1746 SET(tp->t_state, TS_BUSY); 1747 sc->sc_tx_busy = 1; 1748 1749 /* Enable transmit completion interrupts if necessary. */ 1750 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1751 SET(sc->sc_ier, IER_ETXRDY); 1752 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1753 } 1754 1755 /* Output the first chunk of the contiguous buffer. */ 1756 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1757 u_int n; 1758 1759 n = sc->sc_tbc; 1760 if (n > sc->sc_fifolen) 1761 n = sc->sc_fifolen; 1762 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1763 sc->sc_tbc -= n; 1764 sc->sc_tba += n; 1765 } 1766 COM_UNLOCK(sc); 1767 out: 1768 splx(s); 1769 return; 1770 } 1771 1772 /* 1773 * Stop output on a line. 1774 */ 1775 void 1776 comstop(struct tty *tp, int flag) 1777 { 1778 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1779 int s; 1780 1781 s = splserial(); 1782 COM_LOCK(sc); 1783 if (ISSET(tp->t_state, TS_BUSY)) { 1784 /* Stop transmitting at the next chunk. */ 1785 sc->sc_tbc = 0; 1786 sc->sc_heldtbc = 0; 1787 if (!ISSET(tp->t_state, TS_TTSTOP)) 1788 SET(tp->t_state, TS_FLUSH); 1789 } 1790 COM_UNLOCK(sc); 1791 splx(s); 1792 } 1793 1794 void 1795 comdiag(void *arg) 1796 { 1797 struct com_softc *sc = arg; 1798 int overflows, floods; 1799 int s; 1800 1801 s = splserial(); 1802 COM_LOCK(sc); 1803 overflows = sc->sc_overflows; 1804 sc->sc_overflows = 0; 1805 floods = sc->sc_floods; 1806 sc->sc_floods = 0; 1807 sc->sc_errors = 0; 1808 COM_UNLOCK(sc); 1809 splx(s); 1810 1811 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1812 sc->sc_dev.dv_xname, 1813 overflows, overflows == 1 ? "" : "s", 1814 floods, floods == 1 ? "" : "s"); 1815 } 1816 1817 integrate void 1818 com_rxsoft(struct com_softc *sc, struct tty *tp) 1819 { 1820 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1821 u_char *get, *end; 1822 u_int cc, scc; 1823 u_char lsr; 1824 int code; 1825 int s; 1826 1827 end = sc->sc_ebuf; 1828 get = sc->sc_rbget; 1829 scc = cc = com_rbuf_size - sc->sc_rbavail; 1830 1831 if (cc == com_rbuf_size) { 1832 sc->sc_floods++; 1833 if (sc->sc_errors++ == 0) 1834 callout_reset(&sc->sc_diag_callout, 60 * hz, 1835 comdiag, sc); 1836 } 1837 1838 /* If not yet open, drop the entire buffer content here */ 1839 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1840 get += cc << 1; 1841 if (get >= end) 1842 get -= com_rbuf_size << 1; 1843 cc = 0; 1844 } 1845 while (cc) { 1846 code = get[0]; 1847 lsr = get[1]; 1848 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1849 if (ISSET(lsr, LSR_OE)) { 1850 sc->sc_overflows++; 1851 if (sc->sc_errors++ == 0) 1852 callout_reset(&sc->sc_diag_callout, 1853 60 * hz, comdiag, sc); 1854 } 1855 if (ISSET(lsr, LSR_BI | LSR_FE)) 1856 SET(code, TTY_FE); 1857 if (ISSET(lsr, LSR_PE)) 1858 SET(code, TTY_PE); 1859 } 1860 if ((*rint)(code, tp) == -1) { 1861 /* 1862 * The line discipline's buffer is out of space. 1863 */ 1864 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1865 /* 1866 * We're either not using flow control, or the 1867 * line discipline didn't tell us to block for 1868 * some reason. Either way, we have no way to 1869 * know when there's more space available, so 1870 * just drop the rest of the data. 1871 */ 1872 get += cc << 1; 1873 if (get >= end) 1874 get -= com_rbuf_size << 1; 1875 cc = 0; 1876 } else { 1877 /* 1878 * Don't schedule any more receive processing 1879 * until the line discipline tells us there's 1880 * space available (through comhwiflow()). 1881 * Leave the rest of the data in the input 1882 * buffer. 1883 */ 1884 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1885 } 1886 break; 1887 } 1888 get += 2; 1889 if (get >= end) 1890 get = sc->sc_rbuf; 1891 cc--; 1892 } 1893 1894 if (cc != scc) { 1895 sc->sc_rbget = get; 1896 s = splserial(); 1897 COM_LOCK(sc); 1898 1899 cc = sc->sc_rbavail += scc - cc; 1900 /* Buffers should be ok again, release possible block. */ 1901 if (cc >= sc->sc_r_lowat) { 1902 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1903 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1904 SET(sc->sc_ier, IER_ERXRDY); 1905 #ifdef COM_PXA2X0 1906 if (sc->sc_type == COM_TYPE_PXA2x0) 1907 SET(sc->sc_ier, IER_ERXTOUT); 1908 #endif 1909 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1910 com_ier, sc->sc_ier); 1911 } 1912 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1913 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1914 com_hwiflow(sc); 1915 } 1916 } 1917 COM_UNLOCK(sc); 1918 splx(s); 1919 } 1920 } 1921 1922 integrate void 1923 com_txsoft(struct com_softc *sc, struct tty *tp) 1924 { 1925 1926 CLR(tp->t_state, TS_BUSY); 1927 if (ISSET(tp->t_state, TS_FLUSH)) 1928 CLR(tp->t_state, TS_FLUSH); 1929 else 1930 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1931 (*tp->t_linesw->l_start)(tp); 1932 } 1933 1934 integrate void 1935 com_stsoft(struct com_softc *sc, struct tty *tp) 1936 { 1937 u_char msr, delta; 1938 int s; 1939 1940 s = splserial(); 1941 COM_LOCK(sc); 1942 msr = sc->sc_msr; 1943 delta = sc->sc_msr_delta; 1944 sc->sc_msr_delta = 0; 1945 COM_UNLOCK(sc); 1946 splx(s); 1947 1948 if (ISSET(delta, sc->sc_msr_dcd)) { 1949 /* 1950 * Inform the tty layer that carrier detect changed. 1951 */ 1952 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1953 } 1954 1955 if (ISSET(delta, sc->sc_msr_cts)) { 1956 /* Block or unblock output according to flow control. */ 1957 if (ISSET(msr, sc->sc_msr_cts)) { 1958 sc->sc_tx_stopped = 0; 1959 (*tp->t_linesw->l_start)(tp); 1960 } else { 1961 sc->sc_tx_stopped = 1; 1962 } 1963 } 1964 1965 #ifdef COM_DEBUG 1966 if (com_debug) 1967 comstatus(sc, "com_stsoft"); 1968 #endif 1969 } 1970 1971 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1972 void 1973 comsoft(void *arg) 1974 { 1975 struct com_softc *sc = arg; 1976 struct tty *tp; 1977 1978 if (COM_ISALIVE(sc) == 0) 1979 return; 1980 1981 { 1982 #else 1983 void 1984 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1985 comsoft(void) 1986 #else 1987 comsoft(void *arg) 1988 #endif 1989 { 1990 struct com_softc *sc; 1991 struct tty *tp; 1992 int unit; 1993 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1994 int s; 1995 1996 s = splsoftserial(); 1997 com_softintr_scheduled = 0; 1998 #endif 1999 2000 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2001 sc = device_lookup(&com_cd, unit); 2002 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2003 continue; 2004 2005 if (COM_ISALIVE(sc) == 0) 2006 continue; 2007 2008 tp = sc->sc_tty; 2009 if (tp == NULL) 2010 continue; 2011 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2012 continue; 2013 #endif 2014 tp = sc->sc_tty; 2015 2016 if (sc->sc_rx_ready) { 2017 sc->sc_rx_ready = 0; 2018 com_rxsoft(sc, tp); 2019 } 2020 2021 if (sc->sc_st_check) { 2022 sc->sc_st_check = 0; 2023 com_stsoft(sc, tp); 2024 } 2025 2026 if (sc->sc_tx_done) { 2027 sc->sc_tx_done = 0; 2028 com_txsoft(sc, tp); 2029 } 2030 } 2031 2032 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2033 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2034 splx(s); 2035 #endif 2036 #endif 2037 } 2038 2039 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2040 /* there has got to be a better way to do comsoft() */ 2041 }} 2042 #endif 2043 2044 int 2045 comintr(void *arg) 2046 { 2047 struct com_softc *sc = arg; 2048 bus_space_tag_t iot = sc->sc_iot; 2049 bus_space_handle_t ioh = sc->sc_ioh; 2050 u_char *put, *end; 2051 u_int cc; 2052 u_char lsr, iir; 2053 2054 if (COM_ISALIVE(sc) == 0) 2055 return (0); 2056 2057 COM_LOCK(sc); 2058 iir = bus_space_read_1(iot, ioh, com_iir); 2059 if (ISSET(iir, IIR_NOPEND)) { 2060 COM_UNLOCK(sc); 2061 return (0); 2062 } 2063 2064 end = sc->sc_ebuf; 2065 put = sc->sc_rbput; 2066 cc = sc->sc_rbavail; 2067 2068 again: do { 2069 u_char msr, delta; 2070 2071 lsr = bus_space_read_1(iot, ioh, com_lsr); 2072 if (ISSET(lsr, LSR_BI)) { 2073 int cn_trapped = 0; 2074 2075 cn_check_magic(sc->sc_tty->t_dev, 2076 CNC_BREAK, com_cnm_state); 2077 if (cn_trapped) 2078 continue; 2079 #if defined(KGDB) && !defined(DDB) 2080 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2081 kgdb_connect(1); 2082 continue; 2083 } 2084 #endif 2085 } 2086 2087 if (ISSET(lsr, LSR_RCV_MASK) && 2088 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2089 while (cc > 0) { 2090 int cn_trapped = 0; 2091 put[0] = bus_space_read_1(iot, ioh, com_data); 2092 put[1] = lsr; 2093 cn_check_magic(sc->sc_tty->t_dev, 2094 put[0], com_cnm_state); 2095 if (cn_trapped) { 2096 lsr = bus_space_read_1(iot, ioh, com_lsr); 2097 if (!ISSET(lsr, LSR_RCV_MASK)) 2098 break; 2099 2100 continue; 2101 } 2102 put += 2; 2103 if (put >= end) 2104 put = sc->sc_rbuf; 2105 cc--; 2106 2107 lsr = bus_space_read_1(iot, ioh, com_lsr); 2108 if (!ISSET(lsr, LSR_RCV_MASK)) 2109 break; 2110 } 2111 2112 /* 2113 * Current string of incoming characters ended because 2114 * no more data was available or we ran out of space. 2115 * Schedule a receive event if any data was received. 2116 * If we're out of space, turn off receive interrupts. 2117 */ 2118 sc->sc_rbput = put; 2119 sc->sc_rbavail = cc; 2120 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2121 sc->sc_rx_ready = 1; 2122 2123 /* 2124 * See if we are in danger of overflowing a buffer. If 2125 * so, use hardware flow control to ease the pressure. 2126 */ 2127 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2128 cc < sc->sc_r_hiwat) { 2129 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2130 com_hwiflow(sc); 2131 } 2132 2133 /* 2134 * If we're out of space, disable receive interrupts 2135 * until the queue has drained a bit. 2136 */ 2137 if (!cc) { 2138 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2139 CLR(sc->sc_ier, IER_ERXRDY); 2140 #ifdef COM_PXA2X0 2141 if (sc->sc_type == COM_TYPE_PXA2x0) 2142 CLR(sc->sc_ier, IER_ERXTOUT); 2143 #endif 2144 bus_space_write_1(iot, ioh, com_ier, 2145 sc->sc_ier); 2146 } 2147 } else { 2148 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2149 #ifdef COM_PXA2X0 2150 if (sc->sc_type == COM_TYPE_PXA2x0) 2151 bus_space_write_1(iot, ioh, com_ier, 2152 IER_EUART); 2153 else 2154 #endif 2155 bus_space_write_1(iot, ioh, com_ier, 0); 2156 delay(10); 2157 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2158 continue; 2159 } 2160 } 2161 2162 msr = bus_space_read_1(iot, ioh, com_msr); 2163 delta = msr ^ sc->sc_msr; 2164 sc->sc_msr = msr; 2165 /* 2166 * Pulse-per-second (PSS) signals on edge of DCD? 2167 * Process these even if line discipline is ignoring DCD. 2168 */ 2169 if (delta & sc->sc_ppsmask) { 2170 struct timeval tv; 2171 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2172 /* XXX nanotime() */ 2173 microtime(&tv); 2174 TIMEVAL_TO_TIMESPEC(&tv, 2175 &sc->ppsinfo.assert_timestamp); 2176 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2177 timespecadd(&sc->ppsinfo.assert_timestamp, 2178 &sc->ppsparam.assert_offset, 2179 &sc->ppsinfo.assert_timestamp); 2180 } 2181 2182 #ifdef PPS_SYNC 2183 if (pps_kc_hardpps_source == sc && 2184 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2185 hardpps(&tv, tv.tv_usec); 2186 } 2187 #endif 2188 sc->ppsinfo.assert_sequence++; 2189 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2190 2191 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2192 /* XXX nanotime() */ 2193 microtime(&tv); 2194 TIMEVAL_TO_TIMESPEC(&tv, 2195 &sc->ppsinfo.clear_timestamp); 2196 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2197 timespecadd(&sc->ppsinfo.clear_timestamp, 2198 &sc->ppsparam.clear_offset, 2199 &sc->ppsinfo.clear_timestamp); 2200 } 2201 2202 #ifdef PPS_SYNC 2203 if (pps_kc_hardpps_source == sc && 2204 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2205 hardpps(&tv, tv.tv_usec); 2206 } 2207 #endif 2208 sc->ppsinfo.clear_sequence++; 2209 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2210 } 2211 } 2212 2213 /* 2214 * Process normal status changes 2215 */ 2216 if (ISSET(delta, sc->sc_msr_mask)) { 2217 SET(sc->sc_msr_delta, delta); 2218 2219 /* 2220 * Stop output immediately if we lose the output 2221 * flow control signal or carrier detect. 2222 */ 2223 if (ISSET(~msr, sc->sc_msr_mask)) { 2224 sc->sc_tbc = 0; 2225 sc->sc_heldtbc = 0; 2226 #ifdef COM_DEBUG 2227 if (com_debug) 2228 comstatus(sc, "comintr "); 2229 #endif 2230 } 2231 2232 sc->sc_st_check = 1; 2233 } 2234 } while (!ISSET((iir = 2235 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2236 /* 2237 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2238 * by IIR read, so we can't do this way: `process all interrupts, 2239 * then do TX if possble'. 2240 */ 2241 (iir & IIR_IMASK) != IIR_TXRDY); 2242 2243 /* 2244 * Read LSR again, since there may be an interrupt between 2245 * the last LSR read and IIR read above. 2246 */ 2247 lsr = bus_space_read_1(iot, ioh, com_lsr); 2248 2249 /* 2250 * See if data can be transmitted as well. 2251 * Schedule tx done event if no data left 2252 * and tty was marked busy. 2253 */ 2254 if (ISSET(lsr, LSR_TXRDY)) { 2255 /* 2256 * If we've delayed a parameter change, do it now, and restart 2257 * output. 2258 */ 2259 if (sc->sc_heldchange) { 2260 com_loadchannelregs(sc); 2261 sc->sc_heldchange = 0; 2262 sc->sc_tbc = sc->sc_heldtbc; 2263 sc->sc_heldtbc = 0; 2264 } 2265 2266 /* Output the next chunk of the contiguous buffer, if any. */ 2267 if (sc->sc_tbc > 0) { 2268 u_int n; 2269 2270 n = sc->sc_tbc; 2271 if (n > sc->sc_fifolen) 2272 n = sc->sc_fifolen; 2273 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2274 sc->sc_tbc -= n; 2275 sc->sc_tba += n; 2276 } else { 2277 /* Disable transmit completion interrupts if necessary. */ 2278 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2279 CLR(sc->sc_ier, IER_ETXRDY); 2280 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2281 } 2282 if (sc->sc_tx_busy) { 2283 sc->sc_tx_busy = 0; 2284 sc->sc_tx_done = 1; 2285 } 2286 } 2287 } 2288 2289 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2290 goto again; 2291 2292 COM_UNLOCK(sc); 2293 2294 /* Wake up the poller. */ 2295 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2296 softintr_schedule(sc->sc_si); 2297 #else 2298 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2299 setsoftserial(); 2300 #else 2301 if (!com_softintr_scheduled) { 2302 com_softintr_scheduled = 1; 2303 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2304 } 2305 #endif 2306 #endif 2307 2308 #if NRND > 0 && defined(RND_COM) 2309 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2310 #endif 2311 2312 return (1); 2313 } 2314 2315 /* 2316 * The following functions are polled getc and putc routines, shared 2317 * by the console and kgdb glue. 2318 * 2319 * The read-ahead code is so that you can detect pending in-band 2320 * cn_magic in polled mode while doing output rather than having to 2321 * wait until the kernel decides it needs input. 2322 */ 2323 2324 #define MAX_READAHEAD 20 2325 static int com_readahead[MAX_READAHEAD]; 2326 static int com_readaheadcount = 0; 2327 2328 int 2329 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2330 { 2331 int s = splserial(); 2332 u_char stat, c; 2333 2334 /* got a character from reading things earlier */ 2335 if (com_readaheadcount > 0) { 2336 int i; 2337 2338 c = com_readahead[0]; 2339 for (i = 1; i < com_readaheadcount; i++) { 2340 com_readahead[i-1] = com_readahead[i]; 2341 } 2342 com_readaheadcount--; 2343 splx(s); 2344 return (c); 2345 } 2346 2347 /* block until a character becomes available */ 2348 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2349 ; 2350 2351 c = bus_space_read_1(iot, ioh, com_data); 2352 stat = bus_space_read_1(iot, ioh, com_iir); 2353 { 2354 int cn_trapped = 0; /* unused */ 2355 #ifdef DDB 2356 extern int db_active; 2357 if (!db_active) 2358 #endif 2359 cn_check_magic(dev, c, com_cnm_state); 2360 } 2361 splx(s); 2362 return (c); 2363 } 2364 2365 void 2366 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2367 { 2368 int s = splserial(); 2369 int cin, stat, timo; 2370 2371 if (com_readaheadcount < MAX_READAHEAD 2372 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2373 int cn_trapped = 0; 2374 cin = bus_space_read_1(iot, ioh, com_data); 2375 stat = bus_space_read_1(iot, ioh, com_iir); 2376 cn_check_magic(dev, cin, com_cnm_state); 2377 com_readahead[com_readaheadcount++] = cin; 2378 } 2379 2380 /* wait for any pending transmission to finish */ 2381 timo = 150000; 2382 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2383 continue; 2384 2385 bus_space_write_1(iot, ioh, com_data, c); 2386 COM_BARRIER(iot, ioh, BR | BW); 2387 2388 /* wait for this transmission to complete */ 2389 timo = 1500000; 2390 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2391 continue; 2392 2393 splx(s); 2394 } 2395 2396 /* 2397 * Initialize UART for use as console or KGDB line. 2398 */ 2399 int 2400 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2401 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2402 { 2403 bus_space_handle_t ioh; 2404 2405 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2406 return (ENOMEM); /* ??? */ 2407 2408 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2409 bus_space_write_1(iot, ioh, com_efr, 0); 2410 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2411 rate = comspeed(rate, frequency, type); 2412 bus_space_write_1(iot, ioh, com_dlbl, rate); 2413 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2414 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2415 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2416 bus_space_write_1(iot, ioh, com_fifo, 2417 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2418 #ifdef COM_PXA2X0 2419 if (type == COM_TYPE_PXA2x0) 2420 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2421 else 2422 #endif 2423 bus_space_write_1(iot, ioh, com_ier, 0); 2424 2425 *iohp = ioh; 2426 return (0); 2427 } 2428 2429 /* 2430 * Following are all routines needed for COM to act as console 2431 */ 2432 struct consdev comcons = { 2433 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2434 NODEV, CN_NORMAL 2435 }; 2436 2437 2438 int 2439 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2440 int type, tcflag_t cflag) 2441 { 2442 int res; 2443 2444 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2445 if (res) 2446 return (res); 2447 2448 cn_tab = &comcons; 2449 cn_init_magic(&com_cnm_state); 2450 cn_set_magic("\047\001"); /* default magic is BREAK */ 2451 2452 comconstag = iot; 2453 comconsaddr = iobase; 2454 comconsrate = rate; 2455 comconscflag = cflag; 2456 2457 return (0); 2458 } 2459 2460 int 2461 comcngetc(dev_t dev) 2462 { 2463 2464 return (com_common_getc(dev, comconstag, comconsioh)); 2465 } 2466 2467 /* 2468 * Console kernel output character routine. 2469 */ 2470 void 2471 comcnputc(dev_t dev, int c) 2472 { 2473 2474 com_common_putc(dev, comconstag, comconsioh, c); 2475 } 2476 2477 void 2478 comcnpollc(dev_t dev, int on) 2479 { 2480 2481 } 2482 2483 #ifdef KGDB 2484 int 2485 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2486 int frequency, int type, tcflag_t cflag) 2487 { 2488 int res; 2489 2490 if (iot == comconstag && iobase == comconsaddr) { 2491 #if !defined(DDB) 2492 return (EBUSY); /* cannot share with console */ 2493 #else 2494 com_kgdb_ioh = comconsioh; 2495 #endif 2496 } else { 2497 res = cominit(iot, iobase, rate, frequency, type, cflag, 2498 &com_kgdb_ioh); 2499 if (res) 2500 return (res); 2501 2502 /* 2503 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2504 * expects this to be initialized 2505 */ 2506 cn_init_magic(&com_cnm_state); 2507 cn_set_magic("\047\001"); 2508 } 2509 2510 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2511 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2512 2513 com_kgdb_iot = iot; 2514 com_kgdb_addr = iobase; 2515 2516 return (0); 2517 } 2518 2519 /* ARGSUSED */ 2520 int 2521 com_kgdb_getc(void *arg) 2522 { 2523 2524 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2525 } 2526 2527 /* ARGSUSED */ 2528 void 2529 com_kgdb_putc(void *arg, int c) 2530 { 2531 2532 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2533 } 2534 #endif /* KGDB */ 2535 2536 /* helper function to identify the com ports used by 2537 console or KGDB (and not yet autoconf attached) */ 2538 int 2539 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2540 { 2541 bus_space_handle_t help; 2542 2543 if (!comconsattached && 2544 iot == comconstag && iobase == comconsaddr) 2545 help = comconsioh; 2546 #ifdef KGDB 2547 else if (!com_kgdb_attached && 2548 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2549 help = com_kgdb_ioh; 2550 #endif 2551 else 2552 return (0); 2553 2554 if (ioh) 2555 *ioh = help; 2556 return (1); 2557 } 2558
Indexes created Wed Sep 24 02:09:48 GMT 2025